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[/] [ae18/] [trunk/] [sw/] [asm/] [ae18_core.asm] - Blame information for rev 3

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;;;
;;; $Id: ae18_core.asm,v 1.2 2006-12-29 08:17:17 sybreon Exp $
;;;
;;; Copyright (C) 2006 Shawn Tan Ser Ngiap 
;;;
;;; This library is free software; you can redistribute it and/or modify it
;;; under the terms of the GNU Lesser General Public License as published by
;;; the Free Software Foundation; either version 2.1 of the License,
;;; or (at your option) any later version.
;;;
;;; This library is distributed in the hope that it will be useful, but
;;; WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
;;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
;;; License for more details.
;;;
;;; You should have received a copy of the GNU Lesser General Public License
;;; along with this library; if not, write to the Free Software Foundation, Inc.,
;;; 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
;;;
;;; DESCRIPTION
;;; This file contains a simple test programme to test the functionality of
;;; the AE18 core. It is by no means an exhaustive test. However, it does
;;; perform at least each PIC18 command at least once. This file has been
;;; compiled using GPASM and GPLINK.
;;;
;;; 2006-12-27
;;; Passes ALL tests.
;;;
 
        include "p18f452.inc"
 
        processor p18f452
        radix   hex
 
_RAM    udata   0x020
reg0    res     1
reg1    res     1
reg2    res     2
_FSR    udata   0x100
fsr0    res     10
fsr1    res     10
fsr2    res     10
 
_RESET  code    0x0000
        goto    _START_TEST
_ERROR:
        goto    $
 
_ISRH   code    0x08
        goto    _ISRH_TEST
 
_ISRL   code    0x018
        goto    _ISRL_TEST
 
_MAIN   code    0x0020
 
        ;;
        ;; MAIN test code loop
        ;; Calls a series of test subroutines. Ends with a SLEEP.
        ;;
_START_TEST:
        ;; Clear WDT
        clrwdt
 
        rcall   _NPC_TEST
        rcall   _LW2W_TEST
        rcall   _BSR_TEST
        rcall   _F2F_TEST
        rcall   _FW2W_TEST
        rcall   _FW2F_TEST
        rcall   _SKIP_TEST
        rcall   _BCC_TEST
        rcall   _C_TEST
        rcall   _MUL_TEST
        rcall   _BIT_TEST
        rcall   _N2F_TEST
        rcall   _FSR_TEST
        rcall   _SHA_TEST
        rcall   _TBL_TEST
 
 
        ;; All tests OK!!
        sleep
 
        ;; BUGFIX! : Two NOPs required after SLEEP command.
        nop
        nop
 
        ;; RESET on wake up
        reset
 
        ;; Infinite Loop. It should NEVER loop.
        bra     $
 
        ;;
        ;; TABLE tests - OK
        ;; Tests to check that TBLRD is working
        ;;
_TBL_TEST:
        clrf    TBLPTRH
        clrf    TBLPTRL
        tblrd*+                 ; TABLAT = 10
        movf    TABLAT,W
        xorlw   0x10
        bnz     $
        tblrd*+                 ; TABLAT = EF
        movf    TABLAT,W
        xorlw   0xEF
        bnz     $
        retlw   0x00
 
        ;;
        ;; SHADOW test - OK
        ;; Tests to make sure that CALL,S and RETURN,S are working
        ;;
_SHA_TEST:
        movlw   0xA5            ; WREG = 0xA5
        call    _SHA0,1
        xorlw   0xA5            ; Z = 1
        bnz     $
        retlw   0x00
_SHA0:
        movlw   0x00            ; WREG = 0x00
        xorlw   0x00            ; Z = 1
        bnz     $
        return  1               ; WREG = 0xA5
 
        ;;
        ;; FSR test - OK
        ;; Uses INDF0/INDF1/INDF2 for moving values around
        ;;
_FSR_TEST:
        lfsr    2,fsr2
        lfsr    1,fsr1
        lfsr    0,fsr0
 
        movlw   0xA5
        movwf   INDF0           ; FSR2 = A5
        movff   fsr0,reg0       ; REG2 = FSR2
        xorwf   reg0,W          ; Z = 1
        bnz     $
 
        movlw   0xB6
        movwf   INDF1
        movff   fsr1,reg1
        xorwf   reg1,W
        bnz     $
 
        movlw   0xC7
        movwf   INDF2
        movff   fsr2,reg2
        xorwf   reg2,W
        bnz     $
 
        retlw   0x00
 
        ;;
        ;; SETF/NEGF/CLRF tests - OK
        ;; Miscellaneous mono op operations
        ;;
_N2F_TEST:
        clrf    reg0            ; Z = 1, N = 0
        movf    reg0,F
        bnz     $
        bn      $
        setf    reg0            ; Z = 0, N = 1
        movf    reg0,F
        bz      $
        bnn     $
        negf    reg0            ; REG0 = 0x01
        movf    reg0,F
        bz      $
        bn      $
        retlw   0x00
 
        ;;
        ;; BCC test - OK
        ;; Tests all the Z/N/C/OV conditional branches for
        ;; positive and negative results
        ;;
_BCC_TEST:
        ;; Positive tests
        movlw   0x01
        movwf   reg0            ; REG0 = 0x01
 
        rrcf    reg0,W          ; C = 1, WREG = 0x00
        bc      $+4
        bra     $
        rlcf    reg0,W          ; C = 0, WREG = 0x02
        bnc     $+4
        bra     $
 
        andlw   0x00            ; Z = 1
        bz      $+4
        bra     $
        iorlw   0x01            ; Z = 0
        bnz     $+4
        bra     $
 
        xorlw   0x81            ; N = 1
        bn      $+4
        bra     $
        xorlw   0x80            ; N = 0
        bnn     $+4
        bra     $
 
        ;; Negative test
        movlw   0x00            ; WREG = 0
        addlw   0x00            ; WREG = 0, C = 0
        iorlw   0xFF            ; Z = 0, N = 1
        bz      $
        bnn     $
        bc      $
 
        addlw   0x01            ; C = 1, Z = 1, N = 0
        bnc     $
        bnz     $
        bn      $
 
        ;; Test OV
        movlw   0x80
        addlw   0x80            ; C = 1, OV = 1, N = 0, Z = 1
        bnov    $
        bov     $+4
        bra     $
        retlw   0x00
 
        ;;
        ;; BSR test - OK
        ;; Simple test to check that BSR is working
        ;;
_BSR_TEST:
        movlw   0xA5            ; WREG = 0xA5
        movlb   0x02            ; BSR = 0x02
        movwf   0x00,B          ; (0x0200) = 0xA5
        movff   0x0200, 0x0000  ; (0x0000) = 0xA5
        swapf   0x0000,W        ; WREG = 0x5A;
        xorlw   0x5A            ; WREG = 0, Z = 1
        bnz     $
        retlw   0x00
 
        ;;
        ;; C used instruction tests
        ;; Tests a series of instructions that use C
        ;; TODO - verify
_C_TEST:
        movlw   0xFF            ; Indicate Start
        movlw   0x00
        addlw   0x00            ; C = 0
        movwf   reg2            ; REG2 = 0
 
        movlw   0x80            ; WREG = 0x80, C = 0
        addlw   0x80            ; WREG = 0x00, C = 1
        rrcf    reg2,W          ; WREG = 0x80, C = 0;
        addlw   0x80            ; WREG = 0x00, C = 1;
        rlcf    reg2,W          ; WREG = 0x01, C = 0;
 
        addlw   0xFF            ; WREG = 0x00, C = 1;
        addwfc  reg2,W          ; WREG = 0x01, C = 0;
 
        subwfb  reg2,W          ; WREG = 0xFE, C = 1;
        addwfc  reg2,W          ; WREG = 0xFF, C = 0;
        subfwb  reg2,W          ; WREG = 0xFE, C = 0;
 
        retlw   0x00
 
        ;;
        ;; SKIP tests - OK
        ;; Tests the various SNZ/SZ/SEQ/SGT/SLT instructions
        ;;
_SKIP_TEST:
        movlw   0x01            ; WREG = 0x01
        movwf   reg0            ; REG0 = 0x01
 
        btfss   reg0,0
        bra     $
        btfsc   reg0,1
        bra     $
 
        decfsz  reg0,f          ; REG0 = 0x00
        bra     $
        dcfsnz  reg0,f          ; REG0 = 0xFF
        bra     $
        incfsz  reg0,f          ; REG0 = 0x00
        bra     $
        infsnz  reg0,f          ; REG0 = 0x01
        bra     $
 
        cpfseq  reg0
        bra     $
        movlw   0x00            ; WREG = 0x00
        cpfsgt  reg0
        bra     $
        movlw   0x02
        cpfslt  reg0
        bra     $
 
        movlw   0x00
        movwf   reg2
        tstfsz  reg2
        bra     $
 
        retlw   0x00
 
        ;;
        ;; FILE * WREG => FILE tests - OK
        ;; Tests the series of byte file operations
        ;;
_FW2F_TEST:
        movlw   0xA5            ; WREG = 0xA5
        movwf   reg2            ; REG2 = 0xA5
 
        swapf   reg2,F          ; REG2 = 0x5A
        andwf   reg2,F          ; REG2 = 0x00
        iorwf   reg2,F          ; REG2 = 0xA5
        xorwf   reg2,F          ; REG2 = 0x00
 
        addwf   reg2,F          ; REG2 = 0xA5
        subwf   reg2,F          ; REG2 = 0x00
 
        movwf   reg2            ; REG2 = 0xA5
        rrncf   reg2,F          ; REG2 = 0xD2
        rlncf   reg2,F          ; REG2 = 0xA5
 
        comf    reg2,F          ; REG2 = 0x5A
        incf    reg2,F          ; REG2 = 0x5B
        decf    reg2,F          ; REG2 = 0x5A
 
        xorwf   reg2,W          ; WREG = 0xFF
        xorlw   0xFF
        bnz     $
        retlw   0x00
 
        ;;
        ;; FILE * WREG => WREG test - OK
        ;; Tests the series of byte file operations
        ;;
_FW2W_TEST:
        movlw   0xA5            ; WREG = 0xA5
        movwf   reg2            ; REG2 = 0xA5
 
        swapf   reg2,W          ; WREG = 0x5A
        andwf   reg2,W          ; WREG = 0x00
        iorwf   reg2,W          ; WREG = 0xA5
        xorwf   reg2,W          ; WREG = 0x00
 
        addwf   reg2,W          ; WREG = 0xA5
        subwf   reg2,W          ; WREG = 0x00
 
        rrncf   reg2,W          ; WREG = 0xD2
        rlncf   reg2,W          ; WREG = 0x4B
 
        comf    reg2,W          ; WREG = 0x5A
        incf    reg2,W          ; WREG = 0xA6
        decf    reg2,W          ; WREG = 0xA4
 
        xorlw   0xA4
        bnz     $
        retlw   0x00            ; WREG = 0x0
 
        ;;
        ;; MOVE FILE=>WREG/FILE=>FILE/WREG=>FILE tests - OK
        ;; Tests moves between FILE and WREG
        ;;
_F2F_TEST:
        movlw   0xA5            ; WREG = 0xA5
        movwf   reg0            ; REG0 = 0xA5
        movlw   0x00            ; WREG = 0x00
        movff   reg0,reg1       ; REG1 = 0xA5
        movf    reg0,f          ; REG0 = 0xA5
        movf    reg1,w          ; WREG = 0xA5
        xorlw   0xA5
        bnz     $
        retlw   0x00
 
        ;;
        ;; BIT test - OK
        ;; Tests the sequence of BIT ops
        ;;
_BIT_TEST:
        movlw   0xA5            ; WREG = 0xA5
        movwf   reg2            ; REG2 = 0xA5
        bcf     reg2,0          ;
        movf    reg2,W          ; WREG = 0xA4
        bsf     reg2,0          ;
        movf    reg2,W          ; WREG = 0xA5
        btg     reg2,0          ;
        movf    reg2,W          ; WREG = 0xA4
        xorlw   0xA4            ; Z = 1
        bnz     $
        retlw   0x00
 
        ;;
        ;; LIT * WREG => WREG tests - OK
        ;; Tests that the sequence of literal operations
        ;;
_LW2W_TEST:
        movlw   0xA5            ; WREG = 0xA5
        addlw   0x05            ; WREG = 0xAA
        sublw   0xFF            ; WREG = 0x55
        andlw   0xF0            ; WREG = 0x50
        iorlw   0x0A            ; WREG = 0x5A
        xorlw   0xFF            ; WREG = 0xA5
        xorlw   0xA5
        bnz     $
        retlw   0x00            ; WREG = 0x00
 
        ;;
        ;; NEAR test - OK
        ;; Tests the ability to perform BRA and RCALL by doing some
        ;; jump acrobatics.
        ;;
_NPC_TEST:
        bra     _NTFWD
        goto    $               ; Forward Jump
_NTFWD: bra     _NTBWD
_NTRET: return
        goto    $
_NTBWD: bra     _NTRET          ; Backward Jump
        goto    $
 
        ;;
        ;; MULLW/MULWF tests - OK
        ;; Tests that the multiplier produces the correct results
        ;;
_MUL_TEST:
        movlw   0x0A            ; WREG = 0x0A
        movwf   reg0            ; REG0 = 0x0A
        mullw   0xA0            ; PRODH,PRODL = 0x0640
 
        movf    PRODH,W         ; Z = 0
        xorlw   0x06            ; Z = 1
        bnz     $
        movf    PRODL,W         ; Z = 0
        xorlw   0x40            ; Z = 1
        bnz     $
 
        movlw   0x40            ; WREG = 0x40
        mulwf   reg0            ; PRODH,PRODL = 0x0280
 
        movf    PRODH,W         ; Z = 0
        xorlw   0x02            ; Z = 1
        bnz     $
        movf    PRODL,W         ; Z = 0
        xorlw   0x80            ; Z = 1
        bnz     $
 
        retlw   0x00
 
        ;;
        ;; Interrupt Response Test - OK
        ;; Just check to see if it jumps here and returns correctly.
        ;;
_ISRH_TEST:
_ISRL_TEST:
        nop                     ; Do something
        retfie  1
 
        ;; Add some NOP at the end to avoid simulation error
        ;; due to XXXX content at memory locations outside
        ;; of the end of the programme.
        nop
        nop
        nop
        nop
        nop
        nop
        nop
        nop
        nop
        end

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[/] [ae18/] [trunk/] [sw/] [asm/] [ae18_core.asm] - Blame information for rev 3

Line No.	Rev	Author	Line
1	2	sybreon	`;;;`
2	3	sybreon	`;;; $Id: ae18_core.asm,v 1.2 2006-12-29 08:17:17 sybreon Exp $`
3			`;;;`
4	2	sybreon	`;;; Copyright (C) 2006 Shawn Tan Ser Ngiap`
5			`;;;`
6			`;;; This library is free software; you can redistribute it and/or modify it`
7			`;;; under the terms of the GNU Lesser General Public License as published by`
8			`;;; the Free Software Foundation; either version 2.1 of the License,`
9			`;;; or (at your option) any later version.`
10			`;;;`
11			`;;; This library is distributed in the hope that it will be useful, but`
12			`;;; WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY`
13			`;;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public`
14			`;;; License for more details.`
15			`;;;`
16			`;;; You should have received a copy of the GNU Lesser General Public License`
17			`;;; along with this library; if not, write to the Free Software Foundation, Inc.,`
18			`;;; 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA`
19			`;;;`
20			`;;; DESCRIPTION`
21			`;;; This file contains a simple test programme to test the functionality of`
22			`;;; the AE18 core. It is by no means an exhaustive test. However, it does`
23			`;;; perform at least each PIC18 command at least once. This file has been`
24			`;;; compiled using GPASM and GPLINK.`
25			`;;;`
26			`;;; 2006-12-27`
27			`;;; Passes ALL tests.`
28			`;;;`
29
30			`include "p18f452.inc"`
31
32			`processor p18f452`
33			`radix hex`
34
35			`_RAM udata 0x020`
36			`reg0 res 1`
37			`reg1 res 1`
38			`reg2 res 2`
39			`_FSR udata 0x100`
40			`fsr0 res 10`
41			`fsr1 res 10`
42			`fsr2 res 10`
43
44			`_RESET code 0x0000`
45			`goto _START_TEST`
46			`_ERROR:`
47			`goto $`
48
49			`_ISRH code 0x08`
50			`goto _ISRH_TEST`
51
52			`_ISRL code 0x018`
53			`goto _ISRL_TEST`
54
55			`_MAIN code 0x0020`
56
57			`;;`
58			`;; MAIN test code loop`
59			`;; Calls a series of test subroutines. Ends with a SLEEP.`
60			`;;`
61			`_START_TEST:`
62			`;; Clear WDT`
63			`clrwdt`
64
65			`rcall _NPC_TEST`
66			`rcall _LW2W_TEST`
67			`rcall _BSR_TEST`
68			`rcall _F2F_TEST`
69			`rcall _FW2W_TEST`
70			`rcall _FW2F_TEST`
71			`rcall _SKIP_TEST`
72			`rcall _BCC_TEST`
73			`rcall _C_TEST`
74			`rcall _MUL_TEST`
75			`rcall _BIT_TEST`
76			`rcall _N2F_TEST`
77			`rcall _FSR_TEST`
78			`rcall _SHA_TEST`
79			`rcall _TBL_TEST`
80
81	3	sybreon
82	2	sybreon	`;; All tests OK!!`
83			`sleep`
84
85			`;; BUGFIX! : Two NOPs required after SLEEP command.`
86			`nop`
87			`nop`
88
89			`;; RESET on wake up`
90			`reset`
91
92			`;; Infinite Loop. It should NEVER loop.`
93			`bra $`
94
95			`;;`
96			`;; TABLE tests - OK`
97	3	sybreon	`;; Tests to check that TBLRD is working`
98	2	sybreon	`;;`
99			`_TBL_TEST:`
100	3	sybreon	`clrf TBLPTRH`
101			`clrf TBLPTRL`
102	2	sybreon	`tblrd*+ ; TABLAT = 10`
103	3	sybreon	`movf TABLAT,W`
104			`xorlw 0x10`
105			`bnz $`
106	2	sybreon	`tblrd*+ ; TABLAT = EF`
107	3	sybreon	`movf TABLAT,W`
108			`xorlw 0xEF`
109			`bnz $`
110	2	sybreon	`retlw 0x00`
111
112			`;;`
113			`;; SHADOW test - OK`
114			`;; Tests to make sure that CALL,S and RETURN,S are working`
115			`;;`
116			`_SHA_TEST:`
117			`movlw 0xA5 ; WREG = 0xA5`
118			`call _SHA0,1`
119			`xorlw 0xA5 ; Z = 1`
120			`bnz $`
121			`retlw 0x00`
122			`_SHA0:`
123			`movlw 0x00 ; WREG = 0x00`
124			`xorlw 0x00 ; Z = 1`
125			`bnz $`
126			`return 1 ; WREG = 0xA5`
127
128			`;;`
129			`;; FSR test - OK`
130			`;; Uses INDF0/INDF1/INDF2 for moving values around`
131			`;;`
132			`_FSR_TEST:`
133			`lfsr 2,fsr2`
134			`lfsr 1,fsr1`
135			`lfsr 0,fsr0`
136
137			`movlw 0xA5`
138			`movwf INDF0 ; FSR2 = A5`
139			`movff fsr0,reg0 ; REG2 = FSR2`
140			`xorwf reg0,W ; Z = 1`
141			`bnz $`
142
143			`movlw 0xB6`
144			`movwf INDF1`
145			`movff fsr1,reg1`
146			`xorwf reg1,W`
147			`bnz $`
148
149			`movlw 0xC7`
150			`movwf INDF2`
151			`movff fsr2,reg2`
152			`xorwf reg2,W`
153			`bnz $`
154
155			`retlw 0x00`
156
157			`;;`
158			`;; SETF/NEGF/CLRF tests - OK`
159			`;; Miscellaneous mono op operations`
160			`;;`
161			`_N2F_TEST:`
162			`clrf reg0 ; Z = 1, N = 0`
163			`movf reg0,F`
164			`bnz $`
165			`bn $`
166			`setf reg0 ; Z = 0, N = 1`
167			`movf reg0,F`
168			`bz $`
169			`bnn $`
170			`negf reg0 ; REG0 = 0x01`
171			`movf reg0,F`
172			`bz $`
173			`bn $`
174			`retlw 0x00`
175
176			`;;`
177			`;; BCC test - OK`
178			`;; Tests all the Z/N/C/OV conditional branches for`
179			`;; positive and negative results`
180			`;;`
181			`_BCC_TEST:`
182			`;; Positive tests`
183			`movlw 0x01`
184			`movwf reg0 ; REG0 = 0x01`
185
186			`rrcf reg0,W ; C = 1, WREG = 0x00`
187			`bc $+4`
188			`bra $`
189			`rlcf reg0,W ; C = 0, WREG = 0x02`
190			`bnc $+4`
191			`bra $`
192
193			`andlw 0x00 ; Z = 1`
194			`bz $+4`
195			`bra $`
196			`iorlw 0x01 ; Z = 0`
197			`bnz $+4`
198			`bra $`
199
200			`xorlw 0x81 ; N = 1`
201			`bn $+4`
202			`bra $`
203			`xorlw 0x80 ; N = 0`
204			`bnn $+4`
205			`bra $`
206
207			`;; Negative test`
208			`movlw 0x00 ; WREG = 0`
209			`addlw 0x00 ; WREG = 0, C = 0`
210			`iorlw 0xFF ; Z = 0, N = 1`
211			`bz $`
212			`bnn $`
213			`bc $`
214
215			`addlw 0x01 ; C = 1, Z = 1, N = 0`
216			`bnc $`
217			`bnz $`
218			`bn $`
219
220			`;; Test OV`
221			`movlw 0x80`
222			`addlw 0x80 ; C = 1, OV = 1, N = 0, Z = 1`
223			`bnov $`
224			`bov $+4`
225			`bra $`
226			`retlw 0x00`
227
228			`;;`
229			`;; BSR test - OK`
230			`;; Simple test to check that BSR is working`
231			`;;`
232			`_BSR_TEST:`
233			`movlw 0xA5 ; WREG = 0xA5`
234			`movlb 0x02 ; BSR = 0x02`
235			`movwf 0x00,B ; (0x0200) = 0xA5`
236			`movff 0x0200, 0x0000 ; (0x0000) = 0xA5`
237			`swapf 0x0000,W ; WREG = 0x5A;`
238			`xorlw 0x5A ; WREG = 0, Z = 1`
239			`bnz $`
240			`retlw 0x00`
241
242			`;;`
243			`;; C used instruction tests`
244			`;; Tests a series of instructions that use C`
245			`;; TODO - verify`
246			`_C_TEST:`
247			`movlw 0xFF ; Indicate Start`
248			`movlw 0x00`
249			`addlw 0x00 ; C = 0`
250			`movwf reg2 ; REG2 = 0`
251
252			`movlw 0x80 ; WREG = 0x80, C = 0`
253			`addlw 0x80 ; WREG = 0x00, C = 1`
254			`rrcf reg2,W ; WREG = 0x80, C = 0;`
255			`addlw 0x80 ; WREG = 0x00, C = 1;`
256			`rlcf reg2,W ; WREG = 0x01, C = 0;`
257
258			`addlw 0xFF ; WREG = 0x00, C = 1;`
259			`addwfc reg2,W ; WREG = 0x01, C = 0;`
260
261			`subwfb reg2,W ; WREG = 0xFE, C = 1;`
262			`addwfc reg2,W ; WREG = 0xFF, C = 0;`
263			`subfwb reg2,W ; WREG = 0xFE, C = 0;`
264
265			`retlw 0x00`
266
267			`;;`
268			`;; SKIP tests - OK`
269			`;; Tests the various SNZ/SZ/SEQ/SGT/SLT instructions`
270			`;;`
271			`_SKIP_TEST:`
272			`movlw 0x01 ; WREG = 0x01`
273			`movwf reg0 ; REG0 = 0x01`
274
275			`btfss reg0,0`
276			`bra $`
277			`btfsc reg0,1`
278			`bra $`
279
280			`decfsz reg0,f ; REG0 = 0x00`
281			`bra $`
282			`dcfsnz reg0,f ; REG0 = 0xFF`
283			`bra $`
284			`incfsz reg0,f ; REG0 = 0x00`
285			`bra $`
286			`infsnz reg0,f ; REG0 = 0x01`
287			`bra $`
288
289			`cpfseq reg0`
290			`bra $`
291			`movlw 0x00 ; WREG = 0x00`
292			`cpfsgt reg0`
293			`bra $`
294			`movlw 0x02`
295			`cpfslt reg0`
296			`bra $`
297
298			`movlw 0x00`
299			`movwf reg2`
300			`tstfsz reg2`
301			`bra $`
302
303			`retlw 0x00`
304
305			`;;`
306			`;; FILE * WREG => FILE tests - OK`
307			`;; Tests the series of byte file operations`
308			`;;`
309			`_FW2F_TEST:`
310			`movlw 0xA5 ; WREG = 0xA5`
311			`movwf reg2 ; REG2 = 0xA5`
312
313			`swapf reg2,F ; REG2 = 0x5A`
314			`andwf reg2,F ; REG2 = 0x00`
315			`iorwf reg2,F ; REG2 = 0xA5`
316			`xorwf reg2,F ; REG2 = 0x00`
317
318			`addwf reg2,F ; REG2 = 0xA5`
319			`subwf reg2,F ; REG2 = 0x00`
320
321			`movwf reg2 ; REG2 = 0xA5`
322			`rrncf reg2,F ; REG2 = 0xD2`
323			`rlncf reg2,F ; REG2 = 0xA5`
324
325			`comf reg2,F ; REG2 = 0x5A`
326			`incf reg2,F ; REG2 = 0x5B`
327			`decf reg2,F ; REG2 = 0x5A`
328
329	3	sybreon	`xorwf reg2,W ; WREG = 0xFF`
330			`xorlw 0xFF`
331	2	sybreon	`bnz $`
332			`retlw 0x00`
333
334			`;;`
335			`;; FILE * WREG => WREG test - OK`
336			`;; Tests the series of byte file operations`
337			`;;`
338			`_FW2W_TEST:`
339			`movlw 0xA5 ; WREG = 0xA5`
340			`movwf reg2 ; REG2 = 0xA5`
341
342			`swapf reg2,W ; WREG = 0x5A`
343			`andwf reg2,W ; WREG = 0x00`
344			`iorwf reg2,W ; WREG = 0xA5`
345			`xorwf reg2,W ; WREG = 0x00`
346
347			`addwf reg2,W ; WREG = 0xA5`
348			`subwf reg2,W ; WREG = 0x00`
349
350			`rrncf reg2,W ; WREG = 0xD2`
351			`rlncf reg2,W ; WREG = 0x4B`
352
353			`comf reg2,W ; WREG = 0x5A`
354			`incf reg2,W ; WREG = 0xA6`
355			`decf reg2,W ; WREG = 0xA4`
356
357			`xorlw 0xA4`
358			`bnz $`
359			`retlw 0x00 ; WREG = 0x0`
360
361			`;;`
362			`;; MOVE FILE=>WREG/FILE=>FILE/WREG=>FILE tests - OK`
363			`;; Tests moves between FILE and WREG`
364			`;;`
365			`_F2F_TEST:`
366			`movlw 0xA5 ; WREG = 0xA5`
367			`movwf reg0 ; REG0 = 0xA5`
368			`movlw 0x00 ; WREG = 0x00`
369			`movff reg0,reg1 ; REG1 = 0xA5`
370			`movf reg0,f ; REG0 = 0xA5`
371			`movf reg1,w ; WREG = 0xA5`
372			`xorlw 0xA5`
373			`bnz $`
374			`retlw 0x00`
375
376			`;;`
377			`;; BIT test - OK`
378			`;; Tests the sequence of BIT ops`
379			`;;`
380			`_BIT_TEST:`
381			`movlw 0xA5 ; WREG = 0xA5`
382			`movwf reg2 ; REG2 = 0xA5`
383			`bcf reg2,0 ;`
384			`movf reg2,W ; WREG = 0xA4`
385			`bsf reg2,0 ;`
386			`movf reg2,W ; WREG = 0xA5`
387			`btg reg2,0 ;`
388			`movf reg2,W ; WREG = 0xA4`
389			`xorlw 0xA4 ; Z = 1`
390			`bnz $`
391			`retlw 0x00`
392
393			`;;`
394			`;; LIT * WREG => WREG tests - OK`
395			`;; Tests that the sequence of literal operations`
396			`;;`
397			`_LW2W_TEST:`
398			`movlw 0xA5 ; WREG = 0xA5`
399			`addlw 0x05 ; WREG = 0xAA`
400			`sublw 0xFF ; WREG = 0x55`
401			`andlw 0xF0 ; WREG = 0x50`
402			`iorlw 0x0A ; WREG = 0x5A`
403			`xorlw 0xFF ; WREG = 0xA5`
404			`xorlw 0xA5`
405			`bnz $`
406			`retlw 0x00 ; WREG = 0x00`
407
408			`;;`
409			`;; NEAR test - OK`
410			`;; Tests the ability to perform BRA and RCALL by doing some`
411			`;; jump acrobatics.`
412			`;;`
413			`_NPC_TEST:`
414			`bra _NTFWD`
415			`goto $ ; Forward Jump`
416			`_NTFWD: bra _NTBWD`
417			`_NTRET: return`
418			`goto $`
419			`_NTBWD: bra _NTRET ; Backward Jump`
420			`goto $`
421
422			`;;`
423			`;; MULLW/MULWF tests - OK`
424			`;; Tests that the multiplier produces the correct results`
425			`;;`
426			`_MUL_TEST:`
427			`movlw 0x0A ; WREG = 0x0A`
428			`movwf reg0 ; REG0 = 0x0A`
429			`mullw 0xA0 ; PRODH,PRODL = 0x0640`
430
431			`movf PRODH,W ; Z = 0`
432			`xorlw 0x06 ; Z = 1`
433			`bnz $`
434			`movf PRODL,W ; Z = 0`
435			`xorlw 0x40 ; Z = 1`
436			`bnz $`
437
438			`movlw 0x40 ; WREG = 0x40`
439			`mulwf reg0 ; PRODH,PRODL = 0x0280`
440
441			`movf PRODH,W ; Z = 0`
442			`xorlw 0x02 ; Z = 1`
443			`bnz $`
444			`movf PRODL,W ; Z = 0`
445			`xorlw 0x80 ; Z = 1`
446			`bnz $`
447
448			`retlw 0x00`
449
450			`;;`
451			`;; Interrupt Response Test - OK`
452			`;; Just check to see if it jumps here and returns correctly.`
453			`;;`
454			`_ISRH_TEST:`
455			`_ISRL_TEST:`
456			`nop ; Do something`
457			`retfie 1`
458
459			`;; Add some NOP at the end to avoid simulation error`
460			`;; due to XXXX content at memory locations outside`
461			`;; of the end of the programme.`
462			`nop`
463			`nop`
464			`nop`
465			`nop`
466			`nop`
467			`nop`
468			`nop`
469			`nop`
470			`nop`
471			`end`