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[/] [ae18/] [trunk/] [sw/] [asm/] [ae18_core.asm] - Blame information for rev 5

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;;;
;;; $Id: ae18_core.asm,v 1.3 2006-12-29 17:54:21 sybreon Exp $
;;;
;;; Copyright (C) 2006 Shawn Tan Ser Ngiap 
;;;
;;; This library is free software; you can redistribute it and/or modify it
;;; under the terms of the GNU Lesser General Public License as published by
;;; the Free Software Foundation; either version 2.1 of the License,
;;; or (at your option) any later version.
;;;
;;; This library is distributed in the hope that it will be useful, but
;;; WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
;;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
;;; License for more details.
;;;
;;; You should have received a copy of the GNU Lesser General Public License
;;; along with this library; if not, write to the Free Software Foundation, Inc.,
;;; 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
;;;
;;; DESCRIPTION
;;; This file contains a simple test programme to test the functionality of
;;; the AE18 core. It is by no means an exhaustive test. However, it does
;;; perform at least each PIC18 command at least once. This file has been
;;; compiled using GPASM and GPLINK.
;;;
;;; 2006-12-27
;;; Passes ALL tests.
;;;
 
        include "p18f452.inc"
 
        processor p18f452
        radix   hex
 
_RAM    udata   0x020
reg0    res     1
reg1    res     1
reg2    res     2
_FSR    udata   0x100
fsr0    res     10
fsr1    res     10
fsr2    res     10
 
_RESET  code    0x0000
        goto    _START_TEST
_ERROR:
        goto    $
 
_ISRH   code    0x08
        goto    _ISRH_TEST
 
_ISRL   code    0x018
        goto    _ISRL_TEST
 
_MAIN   code    0x0020
 
        ;;
        ;; MAIN test code loop
        ;; Calls a series of test subroutines. Ends with a SLEEP.
        ;;
_START_TEST:
        ;; Clear WDT
        clrwdt
 
        rcall   _NPC_TEST
        rcall   _LW2W_TEST
        rcall   _BSR_TEST
        rcall   _F2F_TEST
        rcall   _FW2W_TEST
        rcall   _FW2F_TEST
        rcall   _SKIP_TEST
        rcall   _BCC_TEST
        rcall   _C_TEST
        rcall   _MUL_TEST
        rcall   _BIT_TEST
        rcall   _N2F_TEST
        rcall   _FSR_TEST
        rcall   _SHA_TEST
        rcall   _TBL_TEST
        rcall   _PCL_TEST
 
 
        ;; All tests OK!!
        sleep
 
        ;; BUGFIX! : Two NOPs required after SLEEP command.
        nop
        nop
 
        ;; RESET on wake up
        reset
 
        ;; Infinite Loop. It should NEVER loop.
        bra     $
 
        ;;
        ;; PCL tests - OK
        ;; Tests to check that PCLATU/PCLATH/PCL works.
        ;;
_PCL_TEST:
        movlw   UPPER(_PCL1)
        movwf   PCLATU
        movlw   HIGH(_PCL1)
        movwf   PCLATH
        movlw   LOW(_PCL1)
        movwf   PCL             ; Jump
        bra     $
_PCL1:
        movlw   0xFF
        movwf   PCLATU
        movwf   PCLATH
        movf    PCL,W           ; WREG = _PCL0
_PCL0:
        xorlw   LOW(_PCL0)
        bnz     $
        movf    PCLATH,W
        xorlw   HIGH(_PCL0)
        bnz     $
        movf    PCLATU,W
        xorlw   UPPER(_PCL0)
        bnz     $
 
        retlw   0x00
 
 
        ;;
        ;; TABLE tests - OK
        ;; Tests to check that TBLRD is working
        ;;
_TBL_TEST:
        clrf    TBLPTRH
        clrf    TBLPTRL
        tblrd*+                 ; TABLAT = 10
        movf    TABLAT,W
        xorlw   0x10
        bnz     $
        tblrd*+                 ; TABLAT = EF
        movf    TABLAT,W
        xorlw   0xEF
        bnz     $
        retlw   0x00
 
        ;;
        ;; SHADOW test - OK
        ;; Tests to make sure that CALL,S and RETURN,S are working
        ;;
_SHA_TEST:
        movlw   0xA5            ; WREG = 0xA5
        call    _SHA0,1
        xorlw   0xA5            ; Z = 1
        bnz     $
        retlw   0x00
_SHA0:
        movlw   0x00            ; WREG = 0x00
        xorlw   0x00            ; Z = 1
        bnz     $
        return  1               ; WREG = 0xA5
 
        ;;
        ;; FSR test - OK
        ;; Uses INDF0/INDF1/INDF2 for moving values around
        ;;
_FSR_TEST:
        lfsr    2,fsr2
        lfsr    1,fsr1
        lfsr    0,fsr0
 
        movlw   0xA5
        movwf   INDF0           ; FSR2 = A5
        movff   fsr0,reg0       ; REG2 = FSR2
        xorwf   reg0,W          ; Z = 1
        bnz     $
 
        movlw   0xB6
        movwf   INDF1
        movff   fsr1,reg1
        xorwf   reg1,W
        bnz     $
 
        movlw   0xC7
        movwf   INDF2
        movff   fsr2,reg2
        xorwf   reg2,W
        bnz     $
 
        retlw   0x00
 
        ;;
        ;; SETF/NEGF/CLRF tests - OK
        ;; Miscellaneous mono op operations
        ;;
_N2F_TEST:
        clrf    reg0            ; Z = 1, N = 0
        movf    reg0,F
        bnz     $
        bn      $
        setf    reg0            ; Z = 0, N = 1
        movf    reg0,F
        bz      $
        bnn     $
        negf    reg0            ; REG0 = 0x01
        movf    reg0,F
        bz      $
        bn      $
        retlw   0x00
 
        ;;
        ;; BCC test - OK
        ;; Tests all the Z/N/C/OV conditional branches for
        ;; positive and negative results
        ;;
_BCC_TEST:
        ;; Positive tests
        movlw   0x01
        movwf   reg0            ; REG0 = 0x01
 
        rrcf    reg0,W          ; C = 1, WREG = 0x00
        bc      $+4
        bra     $
        rlcf    reg0,W          ; C = 0, WREG = 0x02
        bnc     $+4
        bra     $
 
        andlw   0x00            ; Z = 1
        bz      $+4
        bra     $
        iorlw   0x01            ; Z = 0
        bnz     $+4
        bra     $
 
        xorlw   0x81            ; N = 1
        bn      $+4
        bra     $
        xorlw   0x80            ; N = 0
        bnn     $+4
        bra     $
 
        ;; Negative test
        movlw   0x00            ; WREG = 0
        addlw   0x00            ; WREG = 0, C = 0
        iorlw   0xFF            ; Z = 0, N = 1
        bz      $
        bnn     $
        bc      $
 
        addlw   0x01            ; C = 1, Z = 1, N = 0
        bnc     $
        bnz     $
        bn      $
 
        ;; Test OV
        movlw   0x80
        addlw   0x80            ; C = 1, OV = 1, N = 0, Z = 1
        bnov    $
        bov     $+4
        bra     $
        retlw   0x00
 
        ;;
        ;; BSR test - OK
        ;; Simple test to check that BSR is working
        ;;
_BSR_TEST:
        movlw   0xA5            ; WREG = 0xA5
        movlb   0x02            ; BSR = 0x02
        movwf   0x00,B          ; (0x0200) = 0xA5
        movff   0x0200, 0x0000  ; (0x0000) = 0xA5
        swapf   0x0000,W        ; WREG = 0x5A;
        xorlw   0x5A            ; WREG = 0, Z = 1
        bnz     $
        retlw   0x00
 
        ;;
        ;; C used instruction tests
        ;; Tests a series of instructions that use C
        ;; TODO - verify
_C_TEST:
        movlw   0xFF            ; Indicate Start
        movlw   0x00
        addlw   0x00            ; C = 0
        movwf   reg2            ; REG2 = 0
 
        movlw   0x80            ; WREG = 0x80, C = 0
        addlw   0x80            ; WREG = 0x00, C = 1
        rrcf    reg2,W          ; WREG = 0x80, C = 0;
        addlw   0x80            ; WREG = 0x00, C = 1;
        rlcf    reg2,W          ; WREG = 0x01, C = 0;
 
        addlw   0xFF            ; WREG = 0x00, C = 1;
        addwfc  reg2,W          ; WREG = 0x01, C = 0;
 
        subwfb  reg2,W          ; WREG = 0xFE, C = 1;
        addwfc  reg2,W          ; WREG = 0xFF, C = 0;
        subfwb  reg2,W          ; WREG = 0xFE, C = 0;
 
        retlw   0x00
 
        ;;
        ;; SKIP tests - OK
        ;; Tests the various SNZ/SZ/SEQ/SGT/SLT instructions
        ;;
_SKIP_TEST:
        movlw   0x01            ; WREG = 0x01
        movwf   reg0            ; REG0 = 0x01
 
        btfss   reg0,0
        bra     $
        btfsc   reg0,1
        bra     $
 
        decfsz  reg0,f          ; REG0 = 0x00
        bra     $
        dcfsnz  reg0,f          ; REG0 = 0xFF
        bra     $
        incfsz  reg0,f          ; REG0 = 0x00
        bra     $
        infsnz  reg0,f          ; REG0 = 0x01
        bra     $
 
        cpfseq  reg0
        bra     $
        movlw   0x00            ; WREG = 0x00
        cpfsgt  reg0
        bra     $
        movlw   0x02
        cpfslt  reg0
        bra     $
 
        movlw   0x00
        movwf   reg2
        tstfsz  reg2
        bra     $
 
        retlw   0x00
 
        ;;
        ;; FILE * WREG => FILE tests - OK
        ;; Tests the series of byte file operations
        ;;
_FW2F_TEST:
        movlw   0xA5            ; WREG = 0xA5
        movwf   reg2            ; REG2 = 0xA5
 
        swapf   reg2,F          ; REG2 = 0x5A
        andwf   reg2,F          ; REG2 = 0x00
        iorwf   reg2,F          ; REG2 = 0xA5
        xorwf   reg2,F          ; REG2 = 0x00
 
        addwf   reg2,F          ; REG2 = 0xA5
        subwf   reg2,F          ; REG2 = 0x00
 
        movwf   reg2            ; REG2 = 0xA5
        rrncf   reg2,F          ; REG2 = 0xD2
        rlncf   reg2,F          ; REG2 = 0xA5
 
        comf    reg2,F          ; REG2 = 0x5A
        incf    reg2,F          ; REG2 = 0x5B
        decf    reg2,F          ; REG2 = 0x5A
 
        xorwf   reg2,W          ; WREG = 0xFF
        xorlw   0xFF
        bnz     $
        retlw   0x00
 
        ;;
        ;; FILE * WREG => WREG test - OK
        ;; Tests the series of byte file operations
        ;;
_FW2W_TEST:
        movlw   0xA5            ; WREG = 0xA5
        movwf   reg2            ; REG2 = 0xA5
 
        swapf   reg2,W          ; WREG = 0x5A
        andwf   reg2,W          ; WREG = 0x00
        iorwf   reg2,W          ; WREG = 0xA5
        xorwf   reg2,W          ; WREG = 0x00
 
        addwf   reg2,W          ; WREG = 0xA5
        subwf   reg2,W          ; WREG = 0x00
 
        rrncf   reg2,W          ; WREG = 0xD2
        rlncf   reg2,W          ; WREG = 0x4B
 
        comf    reg2,W          ; WREG = 0x5A
        incf    reg2,W          ; WREG = 0xA6
        decf    reg2,W          ; WREG = 0xA4
 
        xorlw   0xA4
        bnz     $
        retlw   0x00            ; WREG = 0x0
 
        ;;
        ;; MOVE FILE=>WREG/FILE=>FILE/WREG=>FILE tests - OK
        ;; Tests moves between FILE and WREG
        ;;
_F2F_TEST:
        movlw   0xA5            ; WREG = 0xA5
        movwf   reg0            ; REG0 = 0xA5
        movlw   0x00            ; WREG = 0x00
        movff   reg0,reg1       ; REG1 = 0xA5
        movf    reg0,f          ; REG0 = 0xA5
        movf    reg1,w          ; WREG = 0xA5
        xorlw   0xA5
        bnz     $
        retlw   0x00
 
        ;;
        ;; BIT test - OK
        ;; Tests the sequence of BIT ops
        ;;
_BIT_TEST:
        movlw   0xA5            ; WREG = 0xA5
        movwf   reg2            ; REG2 = 0xA5
        bcf     reg2,0          ;
        movf    reg2,W          ; WREG = 0xA4
        bsf     reg2,0          ;
        movf    reg2,W          ; WREG = 0xA5
        btg     reg2,0          ;
        movf    reg2,W          ; WREG = 0xA4
        xorlw   0xA4            ; Z = 1
        bnz     $
        retlw   0x00
 
        ;;
        ;; LIT * WREG => WREG tests - OK
        ;; Tests that the sequence of literal operations
        ;;
_LW2W_TEST:
        movlw   0xA5            ; WREG = 0xA5
        addlw   0x05            ; WREG = 0xAA
        sublw   0xFF            ; WREG = 0x55
        andlw   0xF0            ; WREG = 0x50
        iorlw   0x0A            ; WREG = 0x5A
        xorlw   0xFF            ; WREG = 0xA5
        xorlw   0xA5
        bnz     $
        retlw   0x00            ; WREG = 0x00
 
        ;;
        ;; NEAR test - OK
        ;; Tests the ability to perform BRA and RCALL by doing some
        ;; jump acrobatics.
        ;;
_NPC_TEST:
        bra     _NTFWD
        goto    $               ; Forward Jump
_NTFWD: bra     _NTBWD
_NTRET: return
        goto    $
_NTBWD: bra     _NTRET          ; Backward Jump
        goto    $
 
        ;;
        ;; MULLW/MULWF tests - OK
        ;; Tests that the multiplier produces the correct results
        ;;
_MUL_TEST:
        movlw   0x0A            ; WREG = 0x0A
        movwf   reg0            ; REG0 = 0x0A
        mullw   0xA0            ; PRODH,PRODL = 0x0640
 
        movf    PRODH,W         ; Z = 0
        xorlw   0x06            ; Z = 1
        bnz     $
        movf    PRODL,W         ; Z = 0
        xorlw   0x40            ; Z = 1
        bnz     $
 
        movlw   0x40            ; WREG = 0x40
        mulwf   reg0            ; PRODH,PRODL = 0x0280
 
        movf    PRODH,W         ; Z = 0
        xorlw   0x02            ; Z = 1
        bnz     $
        movf    PRODL,W         ; Z = 0
        xorlw   0x80            ; Z = 1
        bnz     $
 
        retlw   0x00
 
        ;;
        ;; Interrupt Response Test - OK
        ;; Just check to see if it jumps here and returns correctly.
        ;;
_ISRH_TEST:
_ISRL_TEST:
        nop                     ; Do something
        retfie  1
 
        ;; Add some NOP at the end to avoid simulation error
        ;; due to XXXX content at memory locations outside
        ;; of the end of the programme.
        nop
        nop
        nop
        nop
        nop
        nop
        nop
        nop
        nop
        end

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Subversion Repositories ae18

[/] [ae18/] [trunk/] [sw/] [asm/] [ae18_core.asm] - Blame information for rev 5

Line No.	Rev	Author	Line
1	2	sybreon	`;;;`
2	5	sybreon	`;;; $Id: ae18_core.asm,v 1.3 2006-12-29 17:54:21 sybreon Exp $`
3	3	sybreon	`;;;`
4	2	sybreon	`;;; Copyright (C) 2006 Shawn Tan Ser Ngiap`
5			`;;;`
6			`;;; This library is free software; you can redistribute it and/or modify it`
7			`;;; under the terms of the GNU Lesser General Public License as published by`
8			`;;; the Free Software Foundation; either version 2.1 of the License,`
9			`;;; or (at your option) any later version.`
10			`;;;`
11			`;;; This library is distributed in the hope that it will be useful, but`
12			`;;; WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY`
13			`;;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public`
14			`;;; License for more details.`
15			`;;;`
16			`;;; You should have received a copy of the GNU Lesser General Public License`
17			`;;; along with this library; if not, write to the Free Software Foundation, Inc.,`
18			`;;; 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA`
19			`;;;`
20			`;;; DESCRIPTION`
21			`;;; This file contains a simple test programme to test the functionality of`
22			`;;; the AE18 core. It is by no means an exhaustive test. However, it does`
23			`;;; perform at least each PIC18 command at least once. This file has been`
24			`;;; compiled using GPASM and GPLINK.`
25			`;;;`
26			`;;; 2006-12-27`
27			`;;; Passes ALL tests.`
28			`;;;`
29
30			`include "p18f452.inc"`
31
32			`processor p18f452`
33			`radix hex`
34
35			`_RAM udata 0x020`
36			`reg0 res 1`
37			`reg1 res 1`
38			`reg2 res 2`
39			`_FSR udata 0x100`
40			`fsr0 res 10`
41			`fsr1 res 10`
42			`fsr2 res 10`
43
44			`_RESET code 0x0000`
45			`goto _START_TEST`
46			`_ERROR:`
47			`goto $`
48
49			`_ISRH code 0x08`
50			`goto _ISRH_TEST`
51
52			`_ISRL code 0x018`
53			`goto _ISRL_TEST`
54
55			`_MAIN code 0x0020`
56
57			`;;`
58			`;; MAIN test code loop`
59			`;; Calls a series of test subroutines. Ends with a SLEEP.`
60			`;;`
61			`_START_TEST:`
62			`;; Clear WDT`
63			`clrwdt`
64	5	sybreon
65	2	sybreon	`rcall _NPC_TEST`
66			`rcall _LW2W_TEST`
67			`rcall _BSR_TEST`
68			`rcall _F2F_TEST`
69			`rcall _FW2W_TEST`
70			`rcall _FW2F_TEST`
71			`rcall _SKIP_TEST`
72			`rcall _BCC_TEST`
73			`rcall _C_TEST`
74			`rcall _MUL_TEST`
75			`rcall _BIT_TEST`
76			`rcall _N2F_TEST`
77			`rcall _FSR_TEST`
78			`rcall _SHA_TEST`
79			`rcall _TBL_TEST`
80	5	sybreon	`rcall _PCL_TEST`
81
82	2	sybreon
83			`;; All tests OK!!`
84			`sleep`
85
86			`;; BUGFIX! : Two NOPs required after SLEEP command.`
87			`nop`
88			`nop`
89
90			`;; RESET on wake up`
91			`reset`
92
93			`;; Infinite Loop. It should NEVER loop.`
94			`bra $`
95
96	5	sybreon	`;;`
97			`;; PCL tests - OK`
98			`;; Tests to check that PCLATU/PCLATH/PCL works.`
99	2	sybreon	`;;`
100	5	sybreon	`_PCL_TEST:`
101			`movlw UPPER(_PCL1)`
102			`movwf PCLATU`
103			`movlw HIGH(_PCL1)`
104			`movwf PCLATH`
105			`movlw LOW(_PCL1)`
106			`movwf PCL ; Jump`
107			`bra $`
108			`_PCL1:`
109			`movlw 0xFF`
110			`movwf PCLATU`
111			`movwf PCLATH`
112			`movf PCL,W ; WREG = _PCL0`
113			`_PCL0:`
114			`xorlw LOW(_PCL0)`
115			`bnz $`
116			`movf PCLATH,W`
117			`xorlw HIGH(_PCL0)`
118			`bnz $`
119			`movf PCLATU,W`
120			`xorlw UPPER(_PCL0)`
121			`bnz $`
122
123			`retlw 0x00`
124
125
126			`;;`
127	2	sybreon	`;; TABLE tests - OK`
128	3	sybreon	`;; Tests to check that TBLRD is working`
129	2	sybreon	`;;`
130			`_TBL_TEST:`
131	3	sybreon	`clrf TBLPTRH`
132			`clrf TBLPTRL`
133	2	sybreon	`tblrd*+ ; TABLAT = 10`
134	3	sybreon	`movf TABLAT,W`
135			`xorlw 0x10`
136			`bnz $`
137	2	sybreon	`tblrd*+ ; TABLAT = EF`
138	3	sybreon	`movf TABLAT,W`
139			`xorlw 0xEF`
140			`bnz $`
141	2	sybreon	`retlw 0x00`
142
143			`;;`
144			`;; SHADOW test - OK`
145			`;; Tests to make sure that CALL,S and RETURN,S are working`
146			`;;`
147			`_SHA_TEST:`
148			`movlw 0xA5 ; WREG = 0xA5`
149			`call _SHA0,1`
150			`xorlw 0xA5 ; Z = 1`
151			`bnz $`
152			`retlw 0x00`
153			`_SHA0:`
154			`movlw 0x00 ; WREG = 0x00`
155			`xorlw 0x00 ; Z = 1`
156			`bnz $`
157			`return 1 ; WREG = 0xA5`
158
159			`;;`
160			`;; FSR test - OK`
161			`;; Uses INDF0/INDF1/INDF2 for moving values around`
162			`;;`
163			`_FSR_TEST:`
164			`lfsr 2,fsr2`
165			`lfsr 1,fsr1`
166			`lfsr 0,fsr0`
167
168			`movlw 0xA5`
169			`movwf INDF0 ; FSR2 = A5`
170			`movff fsr0,reg0 ; REG2 = FSR2`
171			`xorwf reg0,W ; Z = 1`
172			`bnz $`
173
174			`movlw 0xB6`
175			`movwf INDF1`
176			`movff fsr1,reg1`
177			`xorwf reg1,W`
178			`bnz $`
179
180			`movlw 0xC7`
181			`movwf INDF2`
182			`movff fsr2,reg2`
183			`xorwf reg2,W`
184			`bnz $`
185
186			`retlw 0x00`
187
188			`;;`
189			`;; SETF/NEGF/CLRF tests - OK`
190			`;; Miscellaneous mono op operations`
191			`;;`
192			`_N2F_TEST:`
193			`clrf reg0 ; Z = 1, N = 0`
194			`movf reg0,F`
195			`bnz $`
196			`bn $`
197			`setf reg0 ; Z = 0, N = 1`
198			`movf reg0,F`
199			`bz $`
200			`bnn $`
201			`negf reg0 ; REG0 = 0x01`
202			`movf reg0,F`
203			`bz $`
204			`bn $`
205			`retlw 0x00`
206
207			`;;`
208			`;; BCC test - OK`
209			`;; Tests all the Z/N/C/OV conditional branches for`
210			`;; positive and negative results`
211			`;;`
212			`_BCC_TEST:`
213			`;; Positive tests`
214			`movlw 0x01`
215			`movwf reg0 ; REG0 = 0x01`
216
217			`rrcf reg0,W ; C = 1, WREG = 0x00`
218			`bc $+4`
219			`bra $`
220			`rlcf reg0,W ; C = 0, WREG = 0x02`
221			`bnc $+4`
222			`bra $`
223
224			`andlw 0x00 ; Z = 1`
225			`bz $+4`
226			`bra $`
227			`iorlw 0x01 ; Z = 0`
228			`bnz $+4`
229			`bra $`
230
231			`xorlw 0x81 ; N = 1`
232			`bn $+4`
233			`bra $`
234			`xorlw 0x80 ; N = 0`
235			`bnn $+4`
236			`bra $`
237
238			`;; Negative test`
239			`movlw 0x00 ; WREG = 0`
240			`addlw 0x00 ; WREG = 0, C = 0`
241			`iorlw 0xFF ; Z = 0, N = 1`
242			`bz $`
243			`bnn $`
244			`bc $`
245
246			`addlw 0x01 ; C = 1, Z = 1, N = 0`
247			`bnc $`
248			`bnz $`
249			`bn $`
250
251			`;; Test OV`
252			`movlw 0x80`
253			`addlw 0x80 ; C = 1, OV = 1, N = 0, Z = 1`
254			`bnov $`
255			`bov $+4`
256			`bra $`
257			`retlw 0x00`
258
259			`;;`
260			`;; BSR test - OK`
261			`;; Simple test to check that BSR is working`
262			`;;`
263			`_BSR_TEST:`
264			`movlw 0xA5 ; WREG = 0xA5`
265			`movlb 0x02 ; BSR = 0x02`
266			`movwf 0x00,B ; (0x0200) = 0xA5`
267			`movff 0x0200, 0x0000 ; (0x0000) = 0xA5`
268			`swapf 0x0000,W ; WREG = 0x5A;`
269			`xorlw 0x5A ; WREG = 0, Z = 1`
270			`bnz $`
271			`retlw 0x00`
272
273			`;;`
274			`;; C used instruction tests`
275			`;; Tests a series of instructions that use C`
276			`;; TODO - verify`
277			`_C_TEST:`
278			`movlw 0xFF ; Indicate Start`
279			`movlw 0x00`
280			`addlw 0x00 ; C = 0`
281			`movwf reg2 ; REG2 = 0`
282
283			`movlw 0x80 ; WREG = 0x80, C = 0`
284			`addlw 0x80 ; WREG = 0x00, C = 1`
285			`rrcf reg2,W ; WREG = 0x80, C = 0;`
286			`addlw 0x80 ; WREG = 0x00, C = 1;`
287			`rlcf reg2,W ; WREG = 0x01, C = 0;`
288
289			`addlw 0xFF ; WREG = 0x00, C = 1;`
290			`addwfc reg2,W ; WREG = 0x01, C = 0;`
291
292			`subwfb reg2,W ; WREG = 0xFE, C = 1;`
293			`addwfc reg2,W ; WREG = 0xFF, C = 0;`
294			`subfwb reg2,W ; WREG = 0xFE, C = 0;`
295
296			`retlw 0x00`
297
298			`;;`
299			`;; SKIP tests - OK`
300			`;; Tests the various SNZ/SZ/SEQ/SGT/SLT instructions`
301			`;;`
302			`_SKIP_TEST:`
303			`movlw 0x01 ; WREG = 0x01`
304			`movwf reg0 ; REG0 = 0x01`
305
306			`btfss reg0,0`
307			`bra $`
308			`btfsc reg0,1`
309			`bra $`
310
311			`decfsz reg0,f ; REG0 = 0x00`
312			`bra $`
313			`dcfsnz reg0,f ; REG0 = 0xFF`
314			`bra $`
315			`incfsz reg0,f ; REG0 = 0x00`
316			`bra $`
317			`infsnz reg0,f ; REG0 = 0x01`
318			`bra $`
319
320			`cpfseq reg0`
321			`bra $`
322			`movlw 0x00 ; WREG = 0x00`
323			`cpfsgt reg0`
324			`bra $`
325			`movlw 0x02`
326			`cpfslt reg0`
327			`bra $`
328
329			`movlw 0x00`
330			`movwf reg2`
331			`tstfsz reg2`
332			`bra $`
333
334			`retlw 0x00`
335
336			`;;`
337			`;; FILE * WREG => FILE tests - OK`
338			`;; Tests the series of byte file operations`
339			`;;`
340			`_FW2F_TEST:`
341			`movlw 0xA5 ; WREG = 0xA5`
342			`movwf reg2 ; REG2 = 0xA5`
343
344			`swapf reg2,F ; REG2 = 0x5A`
345			`andwf reg2,F ; REG2 = 0x00`
346			`iorwf reg2,F ; REG2 = 0xA5`
347			`xorwf reg2,F ; REG2 = 0x00`
348
349			`addwf reg2,F ; REG2 = 0xA5`
350			`subwf reg2,F ; REG2 = 0x00`
351
352			`movwf reg2 ; REG2 = 0xA5`
353			`rrncf reg2,F ; REG2 = 0xD2`
354			`rlncf reg2,F ; REG2 = 0xA5`
355
356			`comf reg2,F ; REG2 = 0x5A`
357			`incf reg2,F ; REG2 = 0x5B`
358			`decf reg2,F ; REG2 = 0x5A`
359
360	3	sybreon	`xorwf reg2,W ; WREG = 0xFF`
361			`xorlw 0xFF`
362	2	sybreon	`bnz $`
363			`retlw 0x00`
364
365			`;;`
366			`;; FILE * WREG => WREG test - OK`
367			`;; Tests the series of byte file operations`
368			`;;`
369			`_FW2W_TEST:`
370			`movlw 0xA5 ; WREG = 0xA5`
371			`movwf reg2 ; REG2 = 0xA5`
372
373			`swapf reg2,W ; WREG = 0x5A`
374			`andwf reg2,W ; WREG = 0x00`
375			`iorwf reg2,W ; WREG = 0xA5`
376			`xorwf reg2,W ; WREG = 0x00`
377
378			`addwf reg2,W ; WREG = 0xA5`
379			`subwf reg2,W ; WREG = 0x00`
380
381			`rrncf reg2,W ; WREG = 0xD2`
382			`rlncf reg2,W ; WREG = 0x4B`
383
384			`comf reg2,W ; WREG = 0x5A`
385			`incf reg2,W ; WREG = 0xA6`
386			`decf reg2,W ; WREG = 0xA4`
387
388			`xorlw 0xA4`
389			`bnz $`
390			`retlw 0x00 ; WREG = 0x0`
391
392			`;;`
393			`;; MOVE FILE=>WREG/FILE=>FILE/WREG=>FILE tests - OK`
394			`;; Tests moves between FILE and WREG`
395			`;;`
396			`_F2F_TEST:`
397			`movlw 0xA5 ; WREG = 0xA5`
398			`movwf reg0 ; REG0 = 0xA5`
399			`movlw 0x00 ; WREG = 0x00`
400			`movff reg0,reg1 ; REG1 = 0xA5`
401			`movf reg0,f ; REG0 = 0xA5`
402			`movf reg1,w ; WREG = 0xA5`
403			`xorlw 0xA5`
404			`bnz $`
405			`retlw 0x00`
406
407			`;;`
408			`;; BIT test - OK`
409			`;; Tests the sequence of BIT ops`
410			`;;`
411			`_BIT_TEST:`
412			`movlw 0xA5 ; WREG = 0xA5`
413			`movwf reg2 ; REG2 = 0xA5`
414			`bcf reg2,0 ;`
415			`movf reg2,W ; WREG = 0xA4`
416			`bsf reg2,0 ;`
417			`movf reg2,W ; WREG = 0xA5`
418			`btg reg2,0 ;`
419			`movf reg2,W ; WREG = 0xA4`
420			`xorlw 0xA4 ; Z = 1`
421			`bnz $`
422			`retlw 0x00`
423
424			`;;`
425			`;; LIT * WREG => WREG tests - OK`
426			`;; Tests that the sequence of literal operations`
427			`;;`
428			`_LW2W_TEST:`
429			`movlw 0xA5 ; WREG = 0xA5`
430			`addlw 0x05 ; WREG = 0xAA`
431			`sublw 0xFF ; WREG = 0x55`
432			`andlw 0xF0 ; WREG = 0x50`
433			`iorlw 0x0A ; WREG = 0x5A`
434			`xorlw 0xFF ; WREG = 0xA5`
435			`xorlw 0xA5`
436			`bnz $`
437			`retlw 0x00 ; WREG = 0x00`
438
439			`;;`
440			`;; NEAR test - OK`
441			`;; Tests the ability to perform BRA and RCALL by doing some`
442			`;; jump acrobatics.`
443			`;;`
444			`_NPC_TEST:`
445			`bra _NTFWD`
446			`goto $ ; Forward Jump`
447			`_NTFWD: bra _NTBWD`
448			`_NTRET: return`
449			`goto $`
450			`_NTBWD: bra _NTRET ; Backward Jump`
451			`goto $`
452
453			`;;`
454			`;; MULLW/MULWF tests - OK`
455			`;; Tests that the multiplier produces the correct results`
456			`;;`
457			`_MUL_TEST:`
458			`movlw 0x0A ; WREG = 0x0A`
459			`movwf reg0 ; REG0 = 0x0A`
460			`mullw 0xA0 ; PRODH,PRODL = 0x0640`
461
462			`movf PRODH,W ; Z = 0`
463			`xorlw 0x06 ; Z = 1`
464			`bnz $`
465			`movf PRODL,W ; Z = 0`
466			`xorlw 0x40 ; Z = 1`
467			`bnz $`
468
469			`movlw 0x40 ; WREG = 0x40`
470			`mulwf reg0 ; PRODH,PRODL = 0x0280`
471
472			`movf PRODH,W ; Z = 0`
473			`xorlw 0x02 ; Z = 1`
474			`bnz $`
475			`movf PRODL,W ; Z = 0`
476			`xorlw 0x80 ; Z = 1`
477			`bnz $`
478
479			`retlw 0x00`
480
481			`;;`
482			`;; Interrupt Response Test - OK`
483			`;; Just check to see if it jumps here and returns correctly.`
484			`;;`
485			`_ISRH_TEST:`
486			`_ISRL_TEST:`
487			`nop ; Do something`
488			`retfie 1`
489
490			`;; Add some NOP at the end to avoid simulation error`
491			`;; due to XXXX content at memory locations outside`
492			`;; of the end of the programme.`
493			`nop`
494			`nop`
495			`nop`
496			`nop`
497			`nop`
498			`nop`
499			`nop`
500			`nop`
501			`nop`
502			`end`