OpenCores
URL https://opencores.org/ocsvn/aemb/aemb/trunk

Subversion Repositories aemb

[/] [aemb/] [trunk/] [lib/] [fasm/] [fasm_stack.v] - Blame information for rev 201

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 195 sybreon
/* $Id: fasm_fifo.v,v 1.2 2008/06/05 21:07:13 sybreon Exp $
2
**
3
** FASM MEMORY LIBRARY
4
** Copyright (C) 2004-2008 Shawn Tan <shawn.tan@aeste.net>
5
** All rights reserved.
6
**
7
** FASM is free software: you can redistribute it and/or modify it
8
** under the terms of the GNU Lesser General Public License as
9
** published by the Free Software Foundation, either version 3 of the
10
** License, or (at your option) any later version.
11
**
12
** FASM is distributed in the hope that it will be useful, but WITHOUT
13
** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14
** or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General
15
** Public License for more details.
16
**
17
** You should have received a copy of the GNU Lesser General Public
18
** License along with FASM. If not, see <http:**www.gnu.org/licenses/>.
19
*/
20
 
21
module fasm_stack (/*AUTOARG*/
22
   // Outputs
23
   dat_o, rok_o, wok_o,
24
   // Inputs
25
   dat_i, rde_i, wre_i, rst_i, ena_i, clk_i
26
   );
27
 
28
   parameter AW = 4;
29
   parameter DW = 32;
30
 
31
   output [DW-1:0] dat_o;
32
   output          rok_o,
33
                   wok_o;
34
 
35
   input [DW-1:0]  dat_i;
36
   input           rde_i,
37
                   wre_i;
38
 
39
   input           rst_i,
40
                   ena_i,
41
                   clk_i;
42
 
43
   /*AUTOREG*/
44
   // Beginning of automatic regs (for this module's undeclared outputs)
45
   reg                  rok_o;
46
   reg                  wok_o;
47
   // End of automatics
48
 
49
   reg [AW:1]           rRADR;
50
   wire [AW:1]          rWADR = (rde_i) ? rRADR - 1 : rRADR + 1;
51
 
52
   always @(posedge clk_i)
53
     if (rst_i) begin
54
        /*AUTORESET*/
55
        // Beginning of autoreset for uninitialized flops
56
        rRADR <= {(1+(AW)-(1)){1'b0}};
57
        // End of automatics
58
     end else if (ena_i) begin
59
        rRADR <= #1 rWADR;
60
     end
61
 
62
   /*
63
    fasm_tparam AUTO_TEMPLATE (
64
    .AW(AW),
65
    .DW(DW),
66
 
67
    .clk_i(clk_i),
68
    .rst_i(),
69
    .stb_i(),
70
    .wre_i(),
71
    .dat_i(),
72
    .adr_i(rRADR),
73
    .dat_o(dat_o),
74
 
75
    .xclk_i(clk_i),
76
    .xrst_i(),
77
    .xstb_i(),
78
    .xwre_i(wWRE),
79
    .xadr_i(rWADR),
80
    .xdat_i(dat_i),
81
    .xdat_o(),
82
    )
83
    */
84
 
85
   fasm_tparam
86
     #(/*AUTOINSTPARAM*/
87
       // Parameters
88
       .AW                              (AW),                    // Templated
89
       .DW                              (DW))                    // Templated
90
   stack0
91
     (/*AUTOINST*/
92
      // Outputs
93
      .dat_o                            (dat_o),                 // Templated
94
      .xdat_o                           (),                      // Templated
95
      // Inputs
96
      .dat_i                            (),                      // Templated
97
      .adr_i                            (rRADR),                 // Templated
98
      .wre_i                            (),                      // Templated
99
      .stb_i                            (),                      // Templated
100
      .rst_i                            (),                      // Templated
101
      .clk_i                            (clk_i),                 // Templated
102
      .xdat_i                           (dat_i),                 // Templated
103
      .xadr_i                           (rWADR),                 // Templated
104
      .xwre_i                           (wWRE),                  // Templated
105
      .xstb_i                           (),                      // Templated
106
      .xrst_i                           (),                      // Templated
107
      .xclk_i                           (clk_i));                // Templated
108
 
109
endmodule // fasm_stack
110
 
111
/*
112
 $Log$
113
 */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.