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sybreon |
/* $Id: aeMB2_regs.v,v 1.1 2008-04-18 00:21:52 sybreon Exp $
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**
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** AEMB2 EDK 6.2 COMPATIBLE CORE
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** Copyright (C) 2004-2008 Shawn Tan <shawn.tan@aeste.net>
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**
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** This file is part of AEMB.
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**
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** AEMB is free software: you can redistribute it and/or modify it
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** under the terms of the GNU Lesser General Public License as
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** published by the Free Software Foundation, either version 3 of the
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** License, or (at your option) any later version.
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**
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** AEMB is distributed in the hope that it will be useful, but WITHOUT
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** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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** or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General
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** Public License for more details.
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**
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** You should have received a copy of the GNU Lesser General Public
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** License along with AEMB. If not, see <http:**www.gnu.org/licenses/>.
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*/
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/**
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* Register File Wrapper
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* @file aeMB2_regs.v
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* A collection of general purpose and special function registers.
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*/
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module aeMB2_regs (/*AUTOARG*/
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// Outputs
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opd_if, opb_if, opa_if,
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// Inputs
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xwb_mx, sfr_mx, sel_mx, rpc_mx, rpc_if, rd_of, rd_ex, ra_of,
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opc_of, opa_of, mux_of, mux_ex, mul_mx, imm_of, ich_dat, grst,
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gpha, gclk, dwb_mx, dena, bsf_mx, alu_mx, alu_c
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);
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parameter AEMB_HTX = 1;
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/*AUTOOUTPUT*/
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// Beginning of automatic outputs (from unused autoinst outputs)
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output [31:0] opa_if; // From gprf0 of aeMB2_gprf.v
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output [31:0] opb_if; // From gprf0 of aeMB2_gprf.v
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output [31:0] opd_if; // From gprf0 of aeMB2_gprf.v
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// End of automatics
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/*AUTOINPUT*/
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// Beginning of automatic inputs (from unused autoinst inputs)
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input alu_c; // To sfrf0 of aeMB2_sfrf.v
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input [31:0] alu_mx; // To gprf0 of aeMB2_gprf.v
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input [31:0] bsf_mx; // To gprf0 of aeMB2_gprf.v
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input dena; // To sfrf0 of aeMB2_sfrf.v, ...
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input [31:0] dwb_mx; // To gprf0 of aeMB2_gprf.v
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input gclk; // To sfrf0 of aeMB2_sfrf.v, ...
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input gpha; // To sfrf0 of aeMB2_sfrf.v, ...
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input grst; // To sfrf0 of aeMB2_sfrf.v, ...
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input [31:0] ich_dat; // To sfrf0 of aeMB2_sfrf.v, ...
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input [15:0] imm_of; // To sfrf0 of aeMB2_sfrf.v
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input [31:0] mul_mx; // To gprf0 of aeMB2_gprf.v
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input [2:0] mux_ex; // To gprf0 of aeMB2_gprf.v
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input [2:0] mux_of; // To gprf0 of aeMB2_gprf.v
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input [31:0] opa_of; // To sfrf0 of aeMB2_sfrf.v
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input [5:0] opc_of; // To sfrf0 of aeMB2_sfrf.v
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input [4:0] ra_of; // To sfrf0 of aeMB2_sfrf.v
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input [4:0] rd_ex; // To gprf0 of aeMB2_gprf.v
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input [4:0] rd_of; // To sfrf0 of aeMB2_sfrf.v, ...
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input [31:2] rpc_if; // To sfrf0 of aeMB2_sfrf.v
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input [31:2] rpc_mx; // To gprf0 of aeMB2_gprf.v
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input [3:0] sel_mx; // To gprf0 of aeMB2_gprf.v
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input [31:0] sfr_mx; // To gprf0 of aeMB2_gprf.v
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input [31:0] xwb_mx; // To gprf0 of aeMB2_gprf.v
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// End of automatics
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/*AUTOWIRE*/
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aeMB2_sfrf
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#(/*AUTOINSTPARAM*/
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// Parameters
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.AEMB_HTX (AEMB_HTX))
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sfrf0
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(/*AUTOINST*/
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// Inputs
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.rpc_if (rpc_if[31:2]),
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.alu_c (alu_c),
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.opc_of (opc_of[5:0]),
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.imm_of (imm_of[15:0]),
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.ra_of (ra_of[4:0]),
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.rd_of (rd_of[4:0]),
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.opa_of (opa_of[31:0]),
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.ich_dat (ich_dat[15:10]),
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.gclk (gclk),
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.grst (grst),
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.gpha (gpha),
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.dena (dena));
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aeMB2_gprf
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#(/*AUTOINSTPARAM*/
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// Parameters
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.AEMB_HTX (AEMB_HTX))
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gprf0
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(/*AUTOINST*/
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// Outputs
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.opa_if (opa_if[31:0]),
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.opb_if (opb_if[31:0]),
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.opd_if (opd_if[31:0]),
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// Inputs
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.mux_of (mux_of[2:0]),
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.mux_ex (mux_ex[2:0]),
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.ich_dat (ich_dat[31:0]),
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.rd_of (rd_of[4:0]),
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.rd_ex (rd_ex[4:0]),
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.sel_mx (sel_mx[3:0]),
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.rpc_mx (rpc_mx[31:2]),
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.xwb_mx (xwb_mx[31:0]),
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.dwb_mx (dwb_mx[31:0]),
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.alu_mx (alu_mx[31:0]),
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.sfr_mx (sfr_mx[31:0]),
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.mul_mx (mul_mx[31:0]),
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.bsf_mx (bsf_mx[31:0]),
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.gclk (gclk),
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.grst (grst),
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.dena (dena),
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.gpha (gpha));
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endmodule // aeMB2_regs
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// $Log: not supported by cvs2svn $
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