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#!/bin/sh

# $Id: gccrom,v 1.10 2007-11-20 18:35:34 sybreon Exp $

# $Log: not supported by cvs2svn $

# Revision 1.9  2007/11/18 19:41:46  sybreon

# Minor simulation fixes.

#

# Revision 1.8  2007/11/09 20:52:37  sybreon

# Added some compilation optimisations.

#

# Revision 1.7  2007/11/04 05:16:25  sybreon

# Added -msoft-float and -mxl-soft-div compiler flags.

#

# Revision 1.6  2007/11/02 03:25:46  sybreon

# New EDK 3.2 compatible design with optional barrel-shifter and multiplier.

# Fixed various minor data hazard bugs.

# Code compatible with -O0/1/2/3/s generated code.

#

# Revision 1.5  2007/10/22 19:14:38  sybreon

# Recommended to compile code with -O2/3/s

#

# Revision 1.4  2007/04/30 15:57:31  sybreon

# Modified compilation sequence.

#

# Revision 1.3  2007/04/25 22:15:06  sybreon

# Added support for 8-bit and 16-bit data types.

#

# Revision 1.2  2007/04/04 06:14:39  sybreon

# Minor changes

#

# Revision 1.1  2007/03/09 17:41:56  sybreon

# initial import

#

# Compile using C++ pre-processor

mb-g++ -g -mstats -mxl-soft-div -msoft-float -mno-memcpy -msmall-divides -o rom.elf $@ && \

# Create a text listing of the compiled code

mb-objdump -dSC rom.elf > rom.dump && \

# Convert the ELF file to an SREC file

mb-objcopy -O srec rom.elf rom.srec && \

# Generate a Verilog VMEM file from the SREC file

srec_cat rom.srec -o ../sim/dump.rom -vmem 32 && \

#mb-run -v rom.elf 2> rom.run && \

#mb-objcopy -O binary rom.elf rom.bin && \

#hexdump -v -e'1/4 "%.8X\n"' rom.bin > ../sim/aeMB.rom && \

#rm rom.bin && \

# Cleanup code

rm rom.srec && \

# Say Cheeze!

echo "ROM generated"