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[/] [aes_decrypt_fpga/] [trunk/] [bench/] [verilog/] [aes_decrypt128_tb.sv] - Blame information for rev 2

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1 2 schengopen
`timescale 1ns/1ps
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// Uncomment the following line if you're targetting Xilinx FPGA
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//`define XILINX 1
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// generic_muxfx.v defines a generic 2-to-1 MUX. This file is used to provide
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// a generic definition of MUXF7 and MUXF8 in case you are not targetting Xilinx.
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// When targetting Xilinx, skip this file to allow the simulator to locate the
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// MUXF7 and MUXF8 in the Xilinx unisim library.
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`ifndef XILINX
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`include "generic/generic_muxfx.v"
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`endif
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`include "InvSbox.sv"
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`include "InvSubBytes.sv"
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`include "InvShiftRows.sv"
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`include "InvAddRoundKey.sv"
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`include "gfmul.sv"
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`include "InvMixCol_slice.sv"
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`include "InvMixColumns.sv"
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`include "decrypt.sv"
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`include "KschBuffer.sv"
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`include "Sbox.sv"
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`include "SubWord.sv"
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`include "RotWord.sv"
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`include "KeyExpand128.sv"
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`include "aes_decrypt128.sv"
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`include "aes_beh_model.sv"
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`define PERIOD 10
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`define T (`PERIOD/2)
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`define Tcko 1
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`define WAIT_N_CLK(num_of_clk) repeat(num_of_clk) @(posedge clk); #(`Tcko)
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module aes_decrypt128_tb;
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        logic   [0:127] ct;
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        logic   ct_vld;
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        wire    ct_rdy;
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        logic   [0:127] kt;
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        logic   kt_vld;
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        wire    kt_rdy;
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        wire    [0:127] pt;
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        wire    pt_vld;
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        logic   clk;
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        logic   rst;
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        int     sample_vec_failed = 0;
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        int     back_to_back_failed = 0;
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        int     RandVec_128_failed = 0;
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        int     failed = 0;
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        aes128_decrypt_t ref_model;
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        logic   [0:127] tmp_kt;
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        logic   [0:127] tmp_ct;
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        `include "decrypt_vec.sv"
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        task set_kt(input [0:127] x);
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                kt = x;
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                kt_vld = 1;
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                `WAIT_N_CLK(1);
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                kt_vld = 0;
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                `WAIT_N_CLK(1);
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        endtask
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        task set_ct(input [0:127] x);
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                ct = x;
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                ct_vld = 1;
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                `WAIT_N_CLK(1);
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                ct_vld = 0;
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                `WAIT_N_CLK(1);
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        endtask
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        function logic [0:127] rand128;
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                rand128 = {$random, $random, $random, $random};
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        endfunction
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        always
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        begin
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                clk <= 1;
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                #(`T);
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                clk <= 0;
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                #(`T);
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        end
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        aes_decrypt128 uut(.*);
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        initial begin
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                ref_model = new;
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                rst = 1;
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                kt_vld = 0;
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                ct_vld = 0;
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                `WAIT_N_CLK(3);
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                rst = 0;
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                `WAIT_N_CLK(1);
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                // FIPS-197 sample vector test. FIPS-197 appendix C.1.
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                $display("FIPS-197 sample vector test");
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                $display("kt=000102030405060708090a0b0c0d0e0f ct=69c4e0d86a7b0430d8cdb78070b4c55a");
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                wait (kt_rdy);
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                set_kt(128'h000102030405060708090a0b0c0d0e0f);
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                wait (ct_rdy);
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                set_ct(128'h69c4e0d86a7b0430d8cdb78070b4c55a);
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                wait (pt_vld);
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                $display("pt=%h expected=00112233445566778899aabbccddeeff",pt);
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                if (pt != 128'h00112233445566778899aabbccddeeff)
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                begin
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                        $display("***Mismatch");
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                        sample_vec_failed = 1;
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                        failed = 1;
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                end
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                $display("FIPS-197 sample vector test finished : %s", (sample_vec_failed)? "FAILED" : "PASSED");
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                `WAIT_N_CLK(2);
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                // Back-to-back ciphertext test.
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                // Two ciphertext are applied back-to-back with no dead cycle in between.
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                $display("\nBack-to-back ciphertext test");
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                tmp_ct = rand128();
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                tmp_kt = rand128();
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                ref_model.KeyExpand(tmp_kt);
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                ref_model.LoadCt(tmp_ct);
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                ref_model.run(0);
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                wait (kt_rdy);
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                set_kt(tmp_kt);
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                wait (ct_rdy);
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                set_ct(tmp_ct);
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                wait (pt_vld);
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                $display("kt=%h ct=%h pt=%h expected=%h",tmp_kt,tmp_ct,pt,ref_model.GetState());
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                if (pt != ref_model.GetState())
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                begin
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                        $display("***Mismatch");
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                        back_to_back_failed = 1;
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                        failed = 1;
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                end
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                tmp_ct = rand128();
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                ref_model.LoadCt(tmp_ct);
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                ref_model.run(0);
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                wait (ct_rdy);
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                set_ct(tmp_ct);
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                wait (pt_vld);
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                $display("kt=%h ct=%h pt=%h expected=%h",tmp_kt,tmp_ct,pt,ref_model.GetState());
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                if (pt != ref_model.GetState())
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                begin
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                        $display("***Mismatch");
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                        back_to_back_failed = 1;
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                        failed = 1;
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                end
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                $display("Back-to-back ciphertext test finished : %s", (back_to_back_failed)? "FAILED" : "PASSED");
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                `WAIT_N_CLK(2);
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                // ECB-AES128.Decrypt sample vector test. SP800-38a appendix F,1.2
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                $display("\nECB-AES128.Decrypt sample vector test");
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                for (int k=0; k<`ECB_DECRYPT_128_VEC_SIZE; k++)
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                begin
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                        set_kt(ECBDecrypt_128_kt);
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                        wait(ct_rdy);
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                        set_ct(ECBDecrypt_128_ct[k]);
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                        wait(pt_vld);
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                        $display("kt=%h ct=%h pt=%h expected=%h",ECBDecrypt_128_kt,ECBDecrypt_128_ct[k],pt,ECBDecrypt_128_pt[k]);
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                        if (pt != ECBDecrypt_128_pt[k])
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                        begin
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                                $display("***Mismatch");
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                                ECBDecrypt_128_failed = 1;
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                        end
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                end
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                $display("ECB-AES128.Decrypt sample vector test finished : %s", (ECBDecrypt_128_failed)? "FAILED" : "PASSED");
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                `WAIT_N_CLK(2);
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                // GFSbox Known Answer Test. AESAVS appendix B.1.
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                $display("\nGFSbox Known Answer Test");
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                for (int k=0; k<`GFSbox_128_VEC_SIZE; k++)
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                begin
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                        set_kt(GFSbox_128_kt);
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                        wait(ct_rdy);
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                        set_ct(GFSbox_128_ct[k]);
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                        wait(pt_vld);
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                        $display("kt=%h ct=%h pt=%h expected=%h",GFSbox_128_kt,GFSbox_128_ct[k],pt,GFSbox_128_pt[k]);
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                        if (pt != GFSbox_128_pt[k])
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                        begin
196
                                $display("***Mismatch");
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                                GFSbox_128_failed = 1;
198
                        end
199
                end
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201
                $display("GFSbox test finished : %s", (GFSbox_128_failed)? "FAILED" : "PASSED");
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                `WAIT_N_CLK(2);
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                // KeySbox Known Answer Test. AESAVS appendix C.1.
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                $display("\nKeySbox Known Answer Test");
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                for (int k=0; k<`KEYSBOX_128_VEC_SIZE; k++)
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                begin
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                        set_kt(KeySbox_128_kt[k]);
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                        wait(ct_rdy);
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                        set_ct(KeySbox_128_ct[k]);
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                        wait(pt_vld);
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                        $display("kt=%h ct=%h pt=%h expected=%h",KeySbox_128_kt[k],KeySbox_128_ct[k],pt,KeySbox_128_pt);
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                        if (pt != KeySbox_128_pt[k])
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                        begin
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                                $display("***Mismatch");
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                                KeySbox_128_failed = 1;
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                        end
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                end
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                $display("KeySbox test finished : %s", (KeySbox_128_failed)? "FAILED" : "PASSED");
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                `WAIT_N_CLK(2);
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                // VarTxt Known Answer Test. AESAVS appendix D.1.
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                $display("\nVarTxt Known Answer Test");
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                for (int k=0; k<`VARTXT_128_VEC_SIZE; k++)
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                begin
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                        set_kt(VarTxt_128_kt);
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                        wait(ct_rdy);
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                        set_ct(VarTxt_128_ct[k]);
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                        wait(pt_vld);
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                        $display("kt=%h ct=%h pt=%h expected=%h",VarTxt_128_kt,VarTxt_128_ct[k],pt,VarTxt_128_pt[k]);
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                        if (pt != VarTxt_128_pt[k])
235
                        begin
236
                                $display("***Mismatch");
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                                VarTxt_128_failed = 1;
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                        end
239
                end
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241
                $display("VarTxt Known Answer Test finished : %s", (VarTxt_128_failed)? "FAILED" : "PASSED");
242
                `WAIT_N_CLK(2);
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                // VarKey Known Answer Test. AESAVS appendix E.1.
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246
                $display("\nVarKey Known Answer Test");
247
                for (int k=0; k<`VARKEY_128_VEC_SIZE; k++)
248
                begin
249
                        set_kt(VarKey_128_kt[k]);
250
                        wait(ct_rdy);
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                        set_ct(VarKey_128_ct[k]);
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                        wait(pt_vld);
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                        $display("kt=%h ct=%h pt=%h expected=%h",VarKey_128_kt[k],VarKey_128_ct[k],pt,VarKey_128_pt);
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                        if (pt != VarKey_128_pt)
255
                        begin
256
                                $display("***Mismatch");
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                                VarKey_128_failed = 1;
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                        end
259
                end
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261
                $display("VarKey Known Answer Test finished : %s", (VarKey_128_failed)? "FAILED" : "PASSED");
262
                `WAIT_N_CLK(2);
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264
                // Random vector test against golden model.
265
 
266
                $display("\nRandom Vector Test");
267
                for (int k=0; k<1000; k++)
268
                begin
269
                        tmp_ct = rand128();
270
                        tmp_kt = rand128();
271
                        ref_model.KeyExpand(tmp_kt);
272
                        ref_model.LoadCt(tmp_ct);
273
                        ref_model.run(0);
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275
                        wait (kt_rdy);
276
                        set_kt(tmp_kt);
277
                        wait (ct_rdy);
278
                        set_ct(tmp_ct);
279
                        wait (pt_vld);
280
                        $display("kt=%h ct=%h pt=%h expected=%h",tmp_kt,tmp_ct,pt,ref_model.GetState());
281
                        if (pt != ref_model.GetState())
282
                        begin
283
                                $display("***Mismatch");
284
                                RandVec_128_failed = 1;
285
                        failed = 1;
286
                        end
287
                end
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289
                $display("Random Vector Test finished : %s", (RandVec_128_failed)? "FAILED" : "PASSED");
290
                `WAIT_N_CLK(2);
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292
                $display("\nAll tests finished : %s", (failed)? "FAILED" : "OK");
293
 
294
                $stop;
295
        end
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endmodule

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