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motilito |
//---------------------------------------------------------------------------------------
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// Project: High Throughput & Low Area AES Core
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//
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// File name: tb_kat.v (Jan 1, 2011)
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//
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// Writer: Moti Litochevski
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//
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// Description:
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// This file contains a basic test bench to demonstrate the core functionality &
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// interfaces including pipelined operation. For each key length the test bench
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// encrypts four plain text vectors using a single key and then decrypts the four
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// cipher text vectors using the same key.
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// The test bench demonstrates the key expansion, encryption and decryption for all
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// three key lengths with pipelined operation.
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//
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// Revision History:
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//
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// Rev <revnumber> <Date> <owner>
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// <comment>
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//
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//---------------------------------------------------------------------------------------
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motilito |
`timescale 1ns / 10ps
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motilito |
module test ();
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motilito |
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motilito |
//---------------------------------------------------------------------------------------
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// global signals
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reg clock;
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motilito |
reg reset;
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motilito |
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motilito |
// test bench variables
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integer dout_count;
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// UUT interface signals
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motilito |
reg key_start;
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motilito |
reg enable;
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reg enc_dec;
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reg [255:0] key_in;
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reg [1:0] key_mode;
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reg [127:0] data_in;
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reg data_in_valid;
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wire ready_out;
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wire [127:0] data_out;
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wire data_out_valid;
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wire key_ready;
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//---------------------------------------------------------------------------------------
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// test bench implementation
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// global clock generator
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initial clock = 1'b1;
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always #10 clock = ~clock;
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// gloabl reset generator
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initial
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begin
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motilito |
reset = 1'b1;
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motilito |
#100;
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motilito |
reset = 1'b0;
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motilito |
end
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// cosmetics
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initial
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begin
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// announce start of simulation
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$display("");
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$display("-------------------------------------");
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$display(" AES_HT_LA Simulation");
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$display("-------------------------------------");
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$display("");
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// VCD dump
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$dumpfile("test.vcd");
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$dumpvars(0, test);
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$display("");
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end
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// main test bench process control
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initial
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begin
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// default input values
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key_start = 1'b0;
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enable = 1'b1;
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enc_dec = 1'b0;
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key_in = 256'b0;
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key_mode = 2'b0;
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data_in = 128'b0;
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data_in_valid = 1'b0;
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dout_count = 0;
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// wait for reset release
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@(posedge clock);
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wait (~reset);
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@(posedge clock);
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// encryption for 128 bit key mode
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$display("Testing encryption for 128 bit key:");
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$display("-------------------------------------");
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// set core mode to encryption and key size to 128
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enc_dec <= 1'b0;
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key_mode <= 2'b00;
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// set the key value and start key expansion
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key_in[255:128] <= 128'h2b7e151628aed2a6abf7158809cf4f3c;
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motilito |
key_start <= 1'b1;
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motilito |
@(posedge clock);
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motilito |
key_start <= 1'b0;
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motilito |
@(posedge clock);
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// display key value
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$display("Key: 128'h%32h", key_in[255:128]);
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// wait for key expansion to finish
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while (!key_ready) @(posedge clock);
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// announce key expansion ended
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$display("Key expansion done");
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$display("");
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// first plain text input data
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data_in[127:0] <= 128'hdda97ca4864cdfe06eaf70a0ec0d7191;
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data_in_valid <= 1'b1;
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@ (posedge clock);
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// display data value
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$display("Plaintext Data 1: 128'h%32h", data_in);
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// second plain text input data
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data_in[127:0] <= 128'h3243f6a8885a308d313198a2e0370731;
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data_in_valid <= 1'b1;
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@ (posedge clock);
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// display data value
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$display("Plaintext Data 2: 128'h%32h", data_in);
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// third plain text input data
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data_in[127:0] <= 128'h00112233445566778899aabbccddeeff;
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data_in_valid <= 1'b1;
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@ (posedge clock);
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// display data value
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$display("Plaintext Data 3: 128'h%32h", data_in);
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// forth plain text input data
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data_in[127:0] <= 128'h8ea2b7ca516745bfeafc49904b496089;
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data_in_valid <= 1'b1;
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@ (posedge clock);
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// display data value
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$display("Plaintext Data 4: 128'h%32h", data_in);
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// no more data can be given to the core
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motilito |
data_in_valid <= 1'b0;
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motilito |
@(posedge clock);
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// announce state
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$display("");
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$display("Waiting for cipher text data");
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// wait for all output cipher text data
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dout_count = 0;
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while (dout_count < 4)
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begin
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// check for a new output data
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if (data_out_valid)
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dout_count <= dout_count + 1;
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// wait for next clock cycle
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@(posedge clock);
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end
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$display("");
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// continue with decryption of the same cipher text without key expansion
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$display("Testing decryption for 128 bit key:");
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$display("-------------------------------------");
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// set core mode to decryption
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enc_dec <= 1'b1;
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@(posedge clock);
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// display key value
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$display("Key: 128'h%32h", key_in[255:128]);
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// announce key expansion is not done again
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$display("Using the same key, expansion is not required.");
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$display("");
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// first cipher text input data
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data_in[127:0] <= 128'hef0bc156ed8ff21223f247b3e0318a99;
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data_in_valid <= 1'b1;
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@ (posedge clock);
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// display data value
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$display("Ciphertext Data 1: 128'h%32h", data_in);
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// second cipher text input data
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data_in[127:0] <= 128'hf91914cd01924b124c2ec316b4b35a79;
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data_in_valid <= 1'b1;
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@ (posedge clock);
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// display data value
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$display("Ciphertext Data 2: 128'h%32h", data_in);
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// third cipher text input data
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data_in[127:0] <= 128'h8df4e9aac5c7573a27d8d055d6e4d64b;
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data_in_valid <= 1'b1;
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@ (posedge clock);
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// display data value
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$display("Ciphertext Data 3: 128'h%32h", data_in);
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// forth cipher text input data
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data_in[127:0] <= 128'hec8ce641087165a463d4118dc35f9001;
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data_in_valid <= 1'b1;
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@ (posedge clock);
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// display data value
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$display("Ciphertext Data 4: 128'h%32h", data_in);
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// no more data can be given to the core
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data_in_valid <= 1'b0;
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// announce state
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$display("");
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$display("Waiting for plain text data");
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// wait for all output plain text data
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dout_count = 0;
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while (dout_count < 4)
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begin
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// check for a new output data
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if (data_out_valid)
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dout_count <= dout_count + 1;
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// wait for next clock cycle
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@(posedge clock);
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end
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$display("");
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// encryption for 192 bit key mode
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$display("Testing encryption for 192 bit key:");
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$display("-------------------------------------");
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// set core mode to encryption and key size to 192
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enc_dec <= 1'b0;
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key_mode <= 2'b01;
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// set the key value and start key expansion
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key_in[255:64] <= 192'h8e73b0f7da0e6452c810f32b809079e562f8ead2522c6b7b;
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key_start <= 1'b1;
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@(posedge clock);
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key_start <= 1'b0;
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@(posedge clock);
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// display key value
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$display("Key: 192'h%32h", key_in[255:64]);
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// wait for key expansion to finish
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while (!key_ready) @(posedge clock);
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// announce key expansion ended
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$display("Key expansion done");
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$display("");
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// first plain text input data
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data_in[127:0] <= 128'hdda97ca4864cdfe06eaf70a0ec0d7191;
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data_in_valid <= 1'b1;
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@ (posedge clock);
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// display data value
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$display("Plaintext Data 1: 128'h%32h", data_in);
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// second plain text input data
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data_in[127:0] <= 128'h3243f6a8885a308d313198a2e0370731;
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data_in_valid <= 1'b1;
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@ (posedge clock);
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// display data value
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$display("Plaintext Data 2: 128'h%32h", data_in);
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// third plain text input data
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data_in[127:0] <= 128'h00112233445566778899aabbccddeeff;
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data_in_valid <= 1'b1;
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@ (posedge clock);
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// display data value
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$display("Plaintext Data 3: 128'h%32h", data_in);
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// forth plain text input data
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data_in[127:0] <= 128'h8ea2b7ca516745bfeafc49904b496089;
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data_in_valid <= 1'b1;
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@ (posedge clock);
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// display data value
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$display("Plaintext Data 4: 128'h%32h", data_in);
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// no more data can be given to the core
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data_in_valid <= 1'b0;
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@(posedge clock);
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// announce state
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$display("");
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$display("Waiting for cipher text data");
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// wait for all output cipher text data
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dout_count = 0;
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while (dout_count < 4)
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begin
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// check for a new output data
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if (data_out_valid)
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dout_count <= dout_count + 1;
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// wait for next clock cycle
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@(posedge clock);
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end
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$display("");
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// continue with decryption of the same cipher text without key expansion
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$display("Testing decryption for 192 bit key:");
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$display("-------------------------------------");
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// set core mode to decryption
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enc_dec <= 1'b1;
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@(posedge clock);
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// display key value
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$display("Key: 192'h%32h", key_in[255:64]);
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// announce key expansion is not done again
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$display("Using the same key, expansion is not required.");
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$display("");
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289 |
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290 |
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// first cipher text input data
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data_in[127:0] <= 128'h17d3cbb6a98f64ccd134e0d0b7695aa9;
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data_in_valid <= 1'b1;
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@ (posedge clock);
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// display data value
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295 |
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$display("Ciphertext Data 1: 128'h%32h", data_in);
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296 |
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// second cipher text input data
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297 |
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data_in[127:0] <= 128'h4a7d86377de2a8faf00f8ef97c2eb982;
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298 |
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data_in_valid <= 1'b1;
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@ (posedge clock);
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300 |
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// display data value
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301 |
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$display("Ciphertext Data 2: 128'h%32h", data_in);
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302 |
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// third cipher text input data
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303 |
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data_in[127:0] <= 128'heb1b03f2acb64bcf28c9991cc8a4fa50;
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304 |
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data_in_valid <= 1'b1;
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305 |
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@ (posedge clock);
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306 |
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// display data value
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307 |
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$display("Ciphertext Data 3: 128'h%32h", data_in);
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308 |
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// forth cipher text input data
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309 |
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data_in[127:0] <= 128'h2adc503e1c9b669de6b5bc904035547d;
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310 |
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data_in_valid <= 1'b1;
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311 |
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@ (posedge clock);
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312 |
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// display data value
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313 |
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$display("Ciphertext Data 4: 128'h%32h", data_in);
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314 |
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// no more data can be given to the core
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315 |
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data_in_valid <= 1'b0;
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316 |
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317 |
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// announce state
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318 |
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$display("");
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319 |
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$display("Waiting for plain text data");
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320 |
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321 |
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// wait for all output plain text data
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322 |
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dout_count = 0;
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while (dout_count < 4)
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324 |
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begin
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325 |
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// check for a new output data
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326 |
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if (data_out_valid)
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dout_count <= dout_count + 1;
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328 |
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// wait for next clock cycle
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329 |
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@(posedge clock);
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330 |
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end
|
331 |
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$display("");
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332 |
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|
333 |
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// encryption for 256 bit key mode
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334 |
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$display("Testing encryption for 256 bit key:");
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335 |
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$display("-------------------------------------");
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336 |
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// set core mode to encryption and key size to 256
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337 |
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enc_dec <= 1'b0;
|
338 |
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key_mode <= 2'b10;
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339 |
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// set the key value and start key expansion
|
340 |
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key_in[255:0] <= 256'h603deb1015ca71be2b73aef0857d77811f352c073b6108d72d9810a30914dff4;
|
341 |
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key_start <= 1'b1;
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342 |
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@(posedge clock);
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343 |
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key_start <= 1'b0;
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344 |
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@(posedge clock);
|
345 |
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// display key value
|
346 |
|
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$display("Key: 256'h%32h", key_in[255:64]);
|
347 |
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// wait for key expansion to finish
|
348 |
|
|
while (!key_ready) @(posedge clock);
|
349 |
|
|
// announce key expansion ended
|
350 |
|
|
$display("Key expansion done");
|
351 |
|
|
$display("");
|
352 |
|
|
|
353 |
|
|
// first plain text input data
|
354 |
|
|
data_in[127:0] <= 128'hdda97ca4864cdfe06eaf70a0ec0d7191;
|
355 |
|
|
data_in_valid <= 1'b1;
|
356 |
|
|
@ (posedge clock);
|
357 |
|
|
// display data value
|
358 |
|
|
$display("Plaintext Data 1: 128'h%32h", data_in);
|
359 |
|
|
// second plain text input data
|
360 |
|
|
data_in[127:0] <= 128'h3243f6a8885a308d313198a2e0370731;
|
361 |
|
|
data_in_valid <= 1'b1;
|
362 |
|
|
@ (posedge clock);
|
363 |
|
|
// display data value
|
364 |
|
|
$display("Plaintext Data 2: 128'h%32h", data_in);
|
365 |
|
|
// third plain text input data
|
366 |
|
|
data_in[127:0] <= 128'h00112233445566778899aabbccddeeff;
|
367 |
|
|
data_in_valid <= 1'b1;
|
368 |
|
|
@ (posedge clock);
|
369 |
|
|
// display data value
|
370 |
|
|
$display("Plaintext Data 3: 128'h%32h", data_in);
|
371 |
|
|
// forth plain text input data
|
372 |
|
|
data_in[127:0] <= 128'h8ea2b7ca516745bfeafc49904b496089;
|
373 |
|
|
data_in_valid <= 1'b1;
|
374 |
|
|
@ (posedge clock);
|
375 |
|
|
// display data value
|
376 |
|
|
$display("Plaintext Data 4: 128'h%32h", data_in);
|
377 |
|
|
// no more data can be given to the core
|
378 |
|
|
data_in_valid <= 1'b0;
|
379 |
|
|
@(posedge clock);
|
380 |
|
|
|
381 |
|
|
// announce state
|
382 |
|
|
$display("");
|
383 |
|
|
$display("Waiting for cipher text data");
|
384 |
|
|
|
385 |
|
|
// wait for all output cipher text data
|
386 |
|
|
dout_count = 0;
|
387 |
|
|
while (dout_count < 4)
|
388 |
|
|
begin
|
389 |
|
|
// check for a new output data
|
390 |
|
|
if (data_out_valid)
|
391 |
|
|
dout_count <= dout_count + 1;
|
392 |
|
|
// wait for next clock cycle
|
393 |
|
|
@(posedge clock);
|
394 |
|
|
end
|
395 |
|
|
$display("");
|
396 |
|
|
|
397 |
|
|
// continue with decryption of the same cipher text without key expansion
|
398 |
|
|
$display("Testing decryption for 256 bit key:");
|
399 |
|
|
$display("-------------------------------------");
|
400 |
|
|
// set core mode to decryption
|
401 |
|
|
enc_dec <= 1'b1;
|
402 |
|
|
@(posedge clock);
|
403 |
|
|
// display key value
|
404 |
|
|
$display("Key: 256'h%32h", key_in[255:0]);
|
405 |
|
|
// announce key expansion is not done again
|
406 |
|
|
$display("Using the same key, expansion is not required.");
|
407 |
|
|
$display("");
|
408 |
|
|
|
409 |
|
|
// first cipher text input data
|
410 |
|
|
data_in[127:0] <= 128'h32573d9003bfd345029779298be53b96;
|
411 |
|
|
data_in_valid <= 1'b1;
|
412 |
|
|
@ (posedge clock);
|
413 |
|
|
// display data value
|
414 |
|
|
$display("Ciphertext Data 1: 128'h%32h", data_in);
|
415 |
|
|
// second cipher text input data
|
416 |
|
|
data_in[127:0] <= 128'ha5f464b57512d05db2bae8d2415b921d;
|
417 |
|
|
data_in_valid <= 1'b1;
|
418 |
|
|
@ (posedge clock);
|
419 |
|
|
// display data value
|
420 |
|
|
$display("Ciphertext Data 2: 128'h%32h", data_in);
|
421 |
|
|
// third cipher text input data
|
422 |
|
|
data_in[127:0] <= 128'hd83414223d20a0c928b136c884d07ea2;
|
423 |
|
|
data_in_valid <= 1'b1;
|
424 |
|
|
@ (posedge clock);
|
425 |
|
|
// display data value
|
426 |
|
|
$display("Ciphertext Data 3: 128'h%32h", data_in);
|
427 |
|
|
// forth cipher text input data
|
428 |
|
|
data_in[127:0] <= 128'hc1f968d2a6859137bd9ad9111ad7f6dc;
|
429 |
|
|
data_in_valid <= 1'b1;
|
430 |
|
|
@ (posedge clock);
|
431 |
|
|
// display data value
|
432 |
|
|
$display("Ciphertext Data 4: 128'h%32h", data_in);
|
433 |
|
|
// no more data can be given to the core
|
434 |
|
|
data_in_valid <= 1'b0;
|
435 |
|
|
|
436 |
|
|
// announce state
|
437 |
|
|
$display("");
|
438 |
|
|
$display("Waiting for plain text data");
|
439 |
|
|
|
440 |
|
|
// wait for all output plain text data
|
441 |
|
|
dout_count = 0;
|
442 |
|
|
while (dout_count < 4)
|
443 |
|
|
begin
|
444 |
|
|
// check for a new output data
|
445 |
|
|
if (data_out_valid)
|
446 |
|
|
dout_count <= dout_count + 1;
|
447 |
|
|
// wait for next clock cycle
|
448 |
|
|
@(posedge clock);
|
449 |
|
|
end
|
450 |
|
|
$display("");
|
451 |
|
|
|
452 |
|
|
// announce simulation end
|
453 |
|
|
$display(" Simulation Done !!!");
|
454 |
|
|
|
455 |
|
|
repeat (10) @(posedge clock);
|
456 |
6 |
motilito |
$finish;
|
457 |
|
|
end
|
458 |
|
|
|
459 |
8 |
motilito |
// unit under test
|
460 |
|
|
aes dut
|
461 |
|
|
(
|
462 |
|
|
.clk(clock),
|
463 |
|
|
.reset(reset),
|
464 |
|
|
.i_start(key_start),
|
465 |
|
|
.i_enable(enable),
|
466 |
|
|
.i_ende(enc_dec),
|
467 |
|
|
.i_key(key_in),
|
468 |
|
|
.i_key_mode(key_mode),
|
469 |
|
|
.i_data(data_in),
|
470 |
|
|
.i_data_valid(data_in_valid),
|
471 |
|
|
.o_ready(ready_out),
|
472 |
|
|
.o_data(data_out),
|
473 |
|
|
.o_data_valid(data_out_valid),
|
474 |
|
|
.o_key_ready(key_ready)
|
475 |
6 |
motilito |
);
|
476 |
|
|
|
477 |
8 |
motilito |
// display output data from the core
|
478 |
|
|
always @ (posedge clock)
|
479 |
6 |
motilito |
if (data_out_valid)
|
480 |
8 |
motilito |
$display("Output Data %1d: 128'h%16h", dout_count+1, data_out);
|
481 |
6 |
motilito |
|
482 |
|
|
endmodule
|
483 |
8 |
motilito |
//---------------------------------------------------------------------------------------
|
484 |
|
|
// Th.. Th.. Th.. Thats all folks !!!
|
485 |
|
|
//---------------------------------------------------------------------------------------
|