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[/] [aes_highthroughput_lowarea/] [trunk/] [verilog/] [rtl/] [mix_columns.v] - Blame information for rev 11

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1 5 motilito
//---------------------------------------------------------------------------------------
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//
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//      mix_columns modules file (converted from mix_columns functions)
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//
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//      Description:
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//              This file includes all functions implemented in the mix_columns.v original file 
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//              but implemented as modules. 
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//
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//  Author(s):
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//      - Moti Litochevski
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//
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//---------------------------------------------------------------------------------------
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// (multiply 2)
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module xtimes (
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        in, out
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);
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input   [7:0]    in;
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output  [7:0]    out;
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wire [3:0] xt;
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assign xt[3] = in[7];
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assign xt[2] = in[7];
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assign xt[1] = 1'b0;
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assign xt[0] = in[7];
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assign out[7:5] = in[6:4];
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assign out[4:1] = xt[3:0] ^ in[3:0];
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assign out[0]   = in[7];
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endmodule
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//---------------------------------------------------------------------------------------
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// multiply 3
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module MUL3 (
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        in, out
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);
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input   [7:0]    in;
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output  [7:0]    out;
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wire [7:0] xt;
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xtimes xt_u (.in(in), .out(xt));
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assign out = xt ^ in;
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endmodule
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//---------------------------------------------------------------------------------------
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// multiply E
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module MULE (
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        in, out
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);
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input   [7:0]    in;
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output  [7:0]    out;
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wire [7:0] xt1, xt2, xt3;
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xtimes xt_u1 (.in(in), .out(xt1));
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xtimes xt_u2 (.in(xt1), .out(xt2));
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xtimes xt_u3 (.in(xt2), .out(xt3));
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assign out = xt3 ^ xt2 ^ xt1;
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endmodule
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//---------------------------------------------------------------------------------------
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// multiply B
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module MULB (
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        in, out
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);
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input   [7:0]    in;
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output  [7:0]    out;
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wire [7:0] xt1, xt2, xt3;
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xtimes xt_u1 (.in(in), .out(xt1));
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xtimes xt_u2 (.in(xt1), .out(xt2));
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xtimes xt_u3 (.in(xt2), .out(xt3));
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assign out = xt3 ^ xt1 ^ in;
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endmodule
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//---------------------------------------------------------------------------------------
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// multiply D
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module MULD (
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        in, out
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);
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input   [7:0]    in;
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output  [7:0]    out;
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wire [7:0] xt1, xt2, xt3;
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xtimes xt_u1 (.in(in), .out(xt1));
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xtimes xt_u2 (.in(xt1), .out(xt2));
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xtimes xt_u3 (.in(xt2), .out(xt3));
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assign out = xt3 ^ xt2 ^ in;
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endmodule
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//---------------------------------------------------------------------------------------
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// multiply 9
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module MUL9 (
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        in, out
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);
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input   [7:0]    in;
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output  [7:0]    out;
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wire [7:0] xt1, xt2, xt3;
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xtimes xt_u1 (.in(in), .out(xt1));
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xtimes xt_u2 (.in(xt1), .out(xt2));
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xtimes xt_u3 (.in(xt2), .out(xt3));
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assign out = xt3 ^ in;
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endmodule
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//---------------------------------------------------------------------------------------
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module byte_mix_columns (
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        a, b, c, d, out
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);
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input   [7:0]    a, b, c, d;
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output  [7:0]    out;
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wire [7:0] mul2, mul3;
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xtimes xt_u (.in(a), .out(mul2));
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MUL3 mul3_u (.in(b), .out(mul3));
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assign out = mul2 ^ mul3 ^ c ^ d;
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endmodule
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//---------------------------------------------------------------------------------------
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module inv_byte_mix_columns (
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        a, b, c, d, out
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);
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input   [7:0]    a, b, c, d;
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output  [7:0]    out;
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wire [7:0] mule, mulb, muld, mul9;
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MULE mule_u (.in(a), .out(mule));
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MULB mulb_u (.in(b), .out(mulb));
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MULD muld_u (.in(c), .out(muld));
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MUL9 mul9_u (.in(d), .out(mul9));
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assign out = mule ^ mulb ^ muld ^ mul9;
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endmodule
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//---------------------------------------------------------------------------------------
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// Mix Columns for encryption word
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module word_mix_columns (
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        in, out
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);
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input   [31:0]   in;
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output  [31:0]   out;
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wire [7:0] si0,si1,si2,si3;
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wire [7:0] so0,so1,so2,so3;
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assign si0[7:0] = in[31:24];
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assign si1[7:0] = in[23:16];
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assign si2[7:0] = in[15:8];
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assign si3[7:0] = in[7:0];
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byte_mix_columns so0_u (.a(si0), .b(si1), .c(si2), .d(si3), .out(so0));
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byte_mix_columns so1_u (.a(si1), .b(si2), .c(si3), .d(si0), .out(so1));
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byte_mix_columns so2_u (.a(si2), .b(si3), .c(si0), .d(si1), .out(so2));
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byte_mix_columns so3_u (.a(si3), .b(si0), .c(si1), .d(si2), .out(so3));
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assign out = {so0, so1, so2, so3};
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endmodule
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//---------------------------------------------------------------------------------------
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// inverse Mix Columns for decryption word
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module inv_word_mix_columns (
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        in, out
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);
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input   [31:0]   in;
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output  [31:0]   out;
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wire [7:0] si0,si1,si2,si3;
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wire [7:0] so0,so1,so2,so3;
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assign si0 = in[31:24];
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assign si1 = in[23:16];
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assign si2 = in[15:8];
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assign si3 = in[7:0];
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inv_byte_mix_columns so0_u (.a(si0), .b(si1), .c(si2), .d(si3), .out(so0));
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inv_byte_mix_columns so1_u (.a(si1), .b(si2), .c(si3), .d(si0), .out(so1));
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inv_byte_mix_columns so2_u (.a(si2), .b(si3), .c(si0), .d(si1), .out(so2));
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inv_byte_mix_columns so3_u (.a(si3), .b(si0), .c(si1), .d(si2), .out(so3));
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assign out = {so0, so1, so2, so3};
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endmodule
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//---------------------------------------------------------------------------------------
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// Mix columns size: 4 words
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module mix_columns (
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        in, out
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);
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input   [127:0]  in;
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output  [127:0]  out;
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wire [31:0] so0,so1,so2,so3;
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word_mix_columns so0_u (.in(in[127:96]), .out(so0));
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word_mix_columns so1_u (.in(in[95:64]),  .out(so1));
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word_mix_columns so2_u (.in(in[63:32]),  .out(so2));
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word_mix_columns so3_u (.in(in[31:0]),   .out(so3));
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assign out = {so0, so1, so2, so3};
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endmodule
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//---------------------------------------------------------------------------------------
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// Inverse Mix columns size: 4 words
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module inv_mix_columns (
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        in, out
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);
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input   [127:0]  in;
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output  [127:0]  out;
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wire [31:0] so0,so1,so2,so3;
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inv_word_mix_columns so0_u (.in(in[127:96]), .out(so0));
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inv_word_mix_columns so1_u (.in(in[95:64]),  .out(so1));
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inv_word_mix_columns so2_u (.in(in[63:32]),  .out(so2));
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inv_word_mix_columns so3_u (.in(in[31:0]),   .out(so3));
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assign out = {so0, so1, so2, so3};
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endmodule
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//---------------------------------------------------------------------------------------

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