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https://opencores.org/ocsvn/ahb2wishbone/ahb2wishbone/trunk
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//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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//*****************************************************************************************************************
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// Copyright (c) 2007 TooMuch Semiconductor Solutions Pvt Ltd.
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//
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//File name : ahb_wb_driver.svh
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//Designer : Sanjay kumar
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//Date : 3rd Aug'2007
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//Description : ahb_wb_driver:Class to receive packets from the tlm fifo and passed it to the
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// interface of the AHB to Wishbone bridge.
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//Revision : 1.0
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//*****************************************************************************************************************
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///////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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import avm_pkg::*;
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import global::*;
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class ahb_wb_driver extends avm_threaded_component;
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// communication ports
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avm_nonblocking_get_port #(ahb_req_pkt) request_port;
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tlm_fifo #(ahb_req_pkt) fifo;
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virtual ahb_wb_if pin_if;
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function new(string name ,avm_named_component parent);
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super.new(name,parent);
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request_port =new("request_port",this);
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fifo =new("fifo",this);
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pin_if =null;
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endfunction
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task run;
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ahb_req_pkt req;
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ahb_res_pkt res;
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forever
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begin
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@(posedge pin_if.master_ab.hclk);
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if(pin_if.master_ab.hready && pin_if.master_ab.hresetn)
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begin
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if(request_port.try_get(req))
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write_to_bus(req);
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end
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end
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endtask
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// write data to bus
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virtual task write_to_bus(input ahb_req_pkt req);
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#2 pin_if.master_ab.htrans=req.mode;
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pin_if.master_ab.hwrite=req.wr;
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pin_if.master_ab.haddr =req.adr;
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pin_if.master_ab.hwdata=req.dat;
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//avm_report_message("Driver:Packet on interface",global::convert2string(req));
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endtask
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endclass
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