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[/] [ahb_master/] [trunk/] [src/] [base/] [axi2ahb_cmd.v] - Blame information for rev 2

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1 2 eyalhoc
 
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OUTFILE PREFIX_axi2ahb_cmd.v
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INCLUDE def_axi2ahb.txt
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module  PREFIX_axi2ahb_cmd (PORTS);
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   input                  clk;
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   input                  reset;
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   port                   AWGROUP_AXI_A;
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   port                   ARGROUP_AXI_A;
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   input                  GROUP_AHB;
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   input                  ahb_finish;
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   output                 cmd_empty;
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   output                 cmd_read;
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   output [ID_BITS-1:0]   cmd_id;
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   output [ADDR_BITS-1:0] cmd_addr;
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   output [3:0]           cmd_len;
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   output [1:0]           cmd_size;
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   output                 cmd_err;
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   wire                   AGROUP_AXI_A;
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   wire                   cmd_push;
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   wire                   cmd_pop;
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   wire                   cmd_empty;
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   wire                   cmd_full;
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   reg                    read;
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   wire                   err;
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   wire                   wreq, rreq;
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   wire                   wack, rack;
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   wire                   AERR;
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   assign                 wreq = AWVALID;
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   assign                 rreq = ARVALID;
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   assign                 wack = AWVALID & AWREADY;
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   assign                 rack = ARVALID & ARREADY;
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   always @(posedge clk or posedge reset)
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     if (reset)
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       read <= #FFD 1'b1;
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     else if (wreq & (rack | (~rreq)))
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       read <= #FFD 1'b0;
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     else if (rreq & (wack | (~wreq)))
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       read <= #FFD 1'b1;
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        //command mux
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        assign AGROUP_AXI_A = read ? ARGROUP_AXI_A : AWGROUP_AXI_A;
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   assign ARREADY = (~cmd_full) & read;
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   assign AWREADY = (~cmd_full) & (~read);
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   assign err =
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          ((ALEN != 4'd0) &
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           (ALEN != 4'd3) &
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           (ALEN != 4'd7) &
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           (ALEN != 4'd15)) |
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          (((ASIZE == 2'b01) & (AADDR[0] != 1'b0)) |
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           ((ASIZE == 2'b10) & (AADDR[1:0] != 2'b00)) |
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           ((ASIZE == 2'b11) & (AADDR[2:0] != 3'b000)));
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    assign                    cmd_push  = AVALID & AREADY;
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    assign                    cmd_pop   = ahb_finish;
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CREATE prgen_fifo.v DEFCMD(SWAP CONST(#FFD) #FFD)
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   prgen_fifo #(ID_BITS+ADDR_BITS+4+2+1+1, CMD_DEPTH)
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   cmd_fifo(
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            .clk(clk),
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            .reset(reset),
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            .push(cmd_push),
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            .pop(cmd_pop),
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            .din({
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                  AID,
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                  AADDR,
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                  ALEN,
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                  ASIZE,
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                  read,
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                  err
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                  }
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                 ),
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            .dout({
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                   cmd_id,
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                   cmd_addr,
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                   cmd_len,
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                   cmd_size,
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                   cmd_read,
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                   cmd_err
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                   }
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                  ),
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            .empty(cmd_empty),
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            .full(cmd_full)
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            );
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endmodule
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