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eyalhoc |
<##//////////////////////////////////////////////////////////////////
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//// ////
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//// Author: Eyal Hochberg ////
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//// eyal@provartec.com ////
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//// ////
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//// Downloaded from: http://www.opencores.org ////
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/////////////////////////////////////////////////////////////////////
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//// ////
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//// Copyright (C) 2010 Provartec LTD ////
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//// www.provartec.com ////
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//// info@provartec.com ////
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//// ////
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//// This source file may be used and distributed without ////
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//// restriction provided that this copyright statement is not ////
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//// removed from the file and that any derivative work contains ////
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//// the original copyright notice and the associated disclaimer.////
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//// ////
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//// This source file is free software; you can redistribute it ////
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//// and/or modify it under the terms of the GNU Lesser General ////
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//// Public License as published by the Free Software Foundation.////
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//// ////
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//// This source is distributed in the hope that it will be ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
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//// PURPOSE. See the GNU Lesser General Public License for more////
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//// details. http://www.gnu.org/licenses/lgpl.html ////
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//// ////
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//////////////////////////////////////////////////////////////////##>
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REQUIRE(1.5)
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INCLUDE def_ic_static.txt
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STARTUSER
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SWAP.GLOBAL #FFD #1 ##flip-flop delay
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SWAP.USER PREFIX fabric_MASTER_NUM_SLAVE_NUM ##prefix for all module and file names
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SWAP.USER MASTER_NUM 3 ##number of masters
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SWAP.USER SLAVE_NUM 6 ##number of slaves
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SWAP.USER CMD_DEPTH 4 ##AXI master command depth for read and write
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SWAP.USER SLV_DEPTH 8 ##AXI slave command depth for read and write
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SWAP.USER DATA_BITS 64 ##AXI data bits
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SWAP.USER ADDR_BITS 32 ##AXI address bits
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SWAP.USER SIZE_BITS 2 ##AXI size bits
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DEFINE.USER DEF_DECERR_SLV ##use interanl decode slave error
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SWAP.USER USER_BITS 4 ##AXI user bits
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SWAP.USER MSTR_ID_BITS 4 ##AXI ID bits
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UNDEF.USER UNIQUE_ID ##If defined all IDs must be unique, else bits will be added to slave IDs to identify masters
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GROUP.USER.TRUE(MASTER_NUM>0) M0_ID is { ##Supported AXI IDs for master 0 (binary)
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000
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001
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}
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GROUP.USER.TRUE(MASTER_NUM>1) M1_ID is { ##Supported AXI IDs for master 1 (binary)
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011
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}
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GROUP.USER.TRUE(MASTER_NUM>2) M2_ID is { ##Supported AXI IDs for master 2 (binary)
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000
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100
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101
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}
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GROUP.USER.TRUE(MASTER_NUM>3) M3_ID is { ##Supported AXI IDs for master 3 (binary)
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}
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GROUP.USER.TRUE(MASTER_NUM>4) M4_ID is { ##Supported AXI IDs for master 4 (binary)
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}
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GROUP.USER.TRUE(MASTER_NUM>5) M5_ID is { ##Supported AXI IDs for master 5 (binary)
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}
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GROUP.USER.TRUE(MASTER_NUM>6) M6_ID is { ##Supported AXI IDs for master 6 (binary)
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}
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GROUP.USER.TRUE(MASTER_NUM>7) M7_ID is { ##Supported AXI IDs for master 7 (binary)
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}
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