| 1 |
2 |
federico.a |
# ahb_master 0: module,name,fifo_length,fifo_he,fifo_hf,num_bits_adds,write_burst,read_burst,write_lat,read_lat,UUT_BaseAddr
|
| 2 |
|
|
ahb_master,ahb_mst0,8,1,7,4,0,0,2,2,0
|
| 3 |
|
|
# ahb_master 1: module,name,fifo_length,fifo_he,fifo_hf,num_bits_adds,write_burst,read_burst,write_lat,read_lat,UUT_BaseAddr
|
| 4 |
|
|
ahb_master,ahb_mst1,8,1,7,4,0,0,2,2,128
|
| 5 |
|
|
# ahb_master 2: module,name,fifo_length,fifo_he,fifo_hf,num_bits_adds,write_burst,read_burst,write_lat,read_lat,UUT_BaseAddr
|
| 6 |
|
|
ahb_master,ahb_mst2,8,1,7,4,0,0,2,2,256
|
| 7 |
|
|
# ahb_master 3: module,name,fifo_length,fifo_he,fifo_hf,num_bits_adds,write_burst,read_burst,write_lat,read_lat,UUT_BaseAddr
|
| 8 |
|
|
ahb_master,ahb_mst3,8,1,7,4,0,0,2,2,384
|
| 9 |
|
|
# ahb_master 4: module,name,fifo_length,fifo_he,fifo_hf,num_bits_adds,write_burst,read_burst,write_lat,read_lat,UUT_BaseAddr
|
| 10 |
|
|
ahb_master,ahb_mst4,8,1,7,4,0,0,2,2,512
|
| 11 |
|
|
# ahb_master 5: module,name,fifo_length,fifo_he,fifo_hf,num_bits_adds,write_burst,read_burst,write_lat,read_lat,UUT_BaseAddr
|
| 12 |
|
|
ahb_master,ahb_mst5,8,1,7,4,0,0,2,2,640
|
| 13 |
|
|
# ahb_slave 0:
|
| 14 |
|
|
# module,name,NOT_USED,type,add_h,add_l,remap add_h,remap add_l,NOT_USED,fifo_le,fifo_he,fifo_hf,num_bits_adds,write_burst,read_burst,write_lat,read_lat
|
| 15 |
|
|
ahb_slave,ahb_slv0,(SLAVE_LIST),wait,1023,0,1023,0,0,8,1,7,8,0,0,2,2
|
| 16 |
|
|
# ahb_arbiter 0: module,name,default master,master_list,slave_list,arbitration type
|
| 17 |
|
|
ahb_arbiter,ahb_arb0,0,(0,1,2,3,4,5),(0),0
|
