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2 |
federico.a |
# ahb_master 0: module,name,fifo_length,fifo_he,fifo_hf,num_bits_adds,write_burst,read_burst,write_lat,read_lat,UUT_BaseAddr
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2 |
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ahb_master,ahb_mst0,4,1,3,4,1,1,1,1,0
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3 |
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# ahb_master 1: module,name,fifo_length,fifo_he,fifo_hf,num_bits_adds,write_burst,read_burst,write_lat,read_lat,UUT_BaseAddr
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4 |
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ahb_master,ahb_mst1,8,1,7,4,0,1,2,2,128
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5 |
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# ahb_master 2: module,name,fifo_length,fifo_he,fifo_hf,num_bits_adds,write_burst,read_burst,write_lat,read_lat,UUT_BaseAddr
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6 |
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ahb_master,ahb_mst2,2,1,1,4,1,0,1,3,256
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7 |
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# ahb_master 3: module,name,fifo_length,fifo_he,fifo_hf,num_bits_adds,write_burst,read_burst,write_lat,read_lat,UUT_BaseAddr
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8 |
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ahb_master,ahb_mst3,8,1,7,4,1,1,2,2,384
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9 |
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# ahb_master 4: module,name,fifo_length,fifo_he,fifo_hf,num_bits_adds,write_burst,read_burst,write_lat,read_lat,UUT_BaseAddr
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10 |
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ahb_master,ahb_mst4,8,1,7,4,0,1,1,4,1024
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11 |
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# ahb_master 5: module,name,fifo_length,fifo_he,fifo_hf,num_bits_adds,write_burst,read_burst,write_lat,read_lat,UUT_BaseAddr
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12 |
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ahb_master,ahb_mst5,2,1,1,4,1,0,2,1,1152
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13 |
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# ahb_slave 0:
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14 |
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# module,name,NOT_USED,type,add_h,add_l,remap add_h,remap add_l,NOT_USED,fifo_le,fifo_he,fifo_hf,num_bits_adds,write_burst,read_burst,write_lat,read_lat
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15 |
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ahb_slave,ahb_slv0,(SLAVE_LIST),wait,1023,0,1023,0,0,8,1,7,8,0,0,2,2
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16 |
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# ahb_slave 1:
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17 |
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# module,name,NOT_USED,type,add_h,add_l,remap add_h,remap add_l,NOT_USED,fifo_le,fifo_he,fifo_hf,num_bits_adds,write_burst,read_burst,write_lat,read_lat
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18 |
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ahb_slave,ahb_slv1,(SLAVE_LIST),wait,1023,0,1023,0,0,8,1,7,8,0,0,2,2
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19 |
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# ahb_slave 2:
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20 |
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# module,name,NOT_USED,type,add_h,add_l,remap add_h,remap add_l,NOT_USED,fifo_le,fifo_he,fifo_hf,num_bits_adds,write_burst,read_burst,write_lat,read_lat
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21 |
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ahb_slave,ahb_slv2,(SLAVE_LIST),wait,1023,0,1023,0,0,8,1,7,8,0,0,2,2
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22 |
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# ahb_arbiter 0: module,name,default master,master_list,slave_list,arbitration type
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23 |
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ahb_arbiter,ahb_arb0,0,(5,4,3,2,1,0),(2,1,0),0
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