URL https://opencores.org/ocsvn/ahbmaster/ahbmaster/trunk

Subversion Repositories ahbmaster

[/] [ahbmaster/] [trunk/] [test79_AHBmaster/] [component/] [work/] [top/] [CoreUARTapb_0/] [rtl/] [vhdl/] [core/] [Clock_gen.vhd] - Blame information for rev 3

Details | Compare with Previous | View Log


-- ********************************************************************
-- Actel Corporation Proprietary and Confidential
--  Copyright 2008 Actel Corporation.  All rights reserved.
--
-- ANY USE OR REDISTRIBUTION IN PART OR IN WHOLE MUST BE HANDLED IN
-- ACCORDANCE WITH THE ACTEL LICENSE AGREEMENT AND MUST BE APPROVED
-- IN ADVANCE IN WRITING.
--
-- Description: CoreUART/ CoreUARTapb UART core
--
--
--  Revision Information:
-- Date     Description
-- Jun09    Revision 4.1
-- Aug10    Revision 4.2
-- 
 
-- SVN Revision Information:
-- SVN $Revision: 8508 $
-- SVN $Date: 2009-06-15 16:49:49 -0700 (Mon, 15 Jun 2009) $
--
-- Resolved SARs
-- SAR      Date     Who   Description
-- 20741    2Sep10   AS    Increased baud rate by ensuring fifo ctrl runs off
--                         sys clk (not baud clock).  See note below.
 
-- Notes:
-- best viewed with tabstops set to "4"
 
LIBRARY IEEE;
USE IEEE.std_logic_1164.all;
USE IEEE.std_logic_arith.all;
USE IEEE.std_logic_unsigned.all;
 
entity top_CoreUARTapb_0_Clock_gen is
             GENERIC (BAUD_VAL_FRCTN_EN :  integer := 0;
                      SYNC_RESET        :  integer := 0);
             port ( clk               : in   std_logic;                     -- system clock
                    reset_n           : in   std_logic;                     -- active low async reset
                    baud_val          : in   std_logic_vector(12 downto 0); -- value loaded into cntr  
                    BAUD_VAL_FRACTION : in   std_logic_vector(2 downto 0);  -- fractional part of baud value 
                    baud_clock        : out  std_logic;                     -- 16x baud clock pulse
                    xmit_pulse        : out  std_logic                      -- transmit pulse
             );
end entity top_CoreUARTapb_0_Clock_gen;
 
architecture rtl of top_CoreUARTapb_0_Clock_gen is
 
 
signal baud_cntr        : std_logic_vector(12 downto 0);             -- 16x clock division counter reg.
signal baud_clock_int   : std_logic;                                -- internal 16x baud clock pulse
signal xmit_clock       : std_logic;
signal xmit_cntr        : std_logic_vector(3 downto 0);              -- baud tx counter reg.
signal baud_cntr_one    : std_logic;
signal aresetn          : std_logic;
signal sresetn          : std_logic;
 
begin
aresetn <= '1' WHEN (SYNC_RESET=1) ELSE reset_n;
sresetn <= reset_n WHEN (SYNC_RESET=1) ELSE '1';
  --------------------------------------------------
  -- generate a x16 baud clock pulse
  --------------------------------------------------
UG09:IF(BAUD_VAL_FRCTN_EN = 1) GENERATE
 
    -- Add one cycle 1/8, 2/8, 3/8, 4/8, 5/8, 6/8, 7/8 of the time by freezing 
    -- baud_cntr for one cycle when count reaches 0 for certain xmit_cntr values.
    -- xmit_cntr values are identifed by looking for bits of this counter
    -- being certain combinations.
 
    make_baud_cntr_one: process(clk,aresetn)
    begin
        if (aresetn = '0') then
            baud_cntr_one <= '0';
        elsif(clk'event and clk='1') then
            if (sresetn = '0') then
                baud_cntr_one <= '0';
                    else
                if (baud_cntr = "0000000000001") then
                    baud_cntr_one <= '1';
                else
                    baud_cntr_one <= '0';
                end if;
            end if;
        end if;
    end process make_baud_cntr_one;
 
     make_baud_cntr1: process(clk, aresetn)
         begin
           if (aresetn = '0') then
                baud_cntr <= "0000000000000";
                baud_clock_int <= '0';
           elsif(clk'event and clk='1') then
                if (sresetn = '0') then
                    baud_cntr <= "0000000000000";
                    baud_clock_int <= '0';
                            else
                     case BAUD_VAL_FRACTION is
                        when "000" => if (baud_cntr = "0000000000000") then      --0
                                         baud_cntr <= baud_val;
                                         baud_clock_int <= '1';
                                      else
                                          baud_cntr <= baud_cntr - '1';
                                          baud_clock_int <= '0';
                                      end if;
 
                        when "001" => if (baud_cntr = "0000000000000") then
                                        if (xmit_cntr(2 downto 0) = "111" and baud_cntr_one = '1') then  --0.125
                                           baud_cntr <= baud_cntr;
                                           baud_clock_int <= '0';
                                        else
                                             baud_cntr <= baud_val;
                                             baud_clock_int <= '1';
                                        end if;
                                      else
                                          baud_cntr <= baud_cntr - '1';
                                          baud_clock_int <= '0';
                                      end if;
 
                        when "010" =>  if (baud_cntr = "0000000000000") then
                                        if (xmit_cntr(1 downto 0) = "11" and baud_cntr_one = '1') then --0.25
                                          baud_cntr <= baud_cntr;
                                          baud_clock_int <= '0';
                                        else
                                          baud_cntr <= baud_val;
                                          baud_clock_int <= '1';
                                         end if;
                                      else
                                        baud_cntr <= baud_cntr - '1';
                                        baud_clock_int <= '0';
                                      end if;
 
                        when "011" => if (baud_cntr = "0000000000000") then
                                        if ((((xmit_cntr(2) = '1') or (xmit_cntr(1) = '1')) and xmit_cntr(0) ='1') and (baud_cntr_one = '1')) then --0.375
                                          baud_cntr <= baud_cntr;
                                          baud_clock_int <= '0';
                                        else
                                          baud_cntr <= baud_val;
                                          baud_clock_int <= '1';
                                         end if;
                                      else
                                         baud_cntr <= baud_cntr - '1';
                                         baud_clock_int <= '0';
                                   end if;
 
                        when "100" => if (baud_cntr = "0000000000000") then
                                        if (xmit_cntr(0) = '1' and baud_cntr_one = '1') then --0.5
                                          baud_cntr <= baud_cntr;
                                          baud_clock_int <= '0';
                                        else
                                          baud_cntr <= baud_val;
                                          baud_clock_int <= '1';
                                        end if;
                                      else
                                        baud_cntr <= baud_cntr - '1';
                                        baud_clock_int <= '0';
                                     end if;
 
                       when "101" => if (baud_cntr = "0000000000000") then
                                       if (((xmit_cntr(2) = '1' and xmit_cntr(1) = '1') or xmit_cntr(0) = '1') and baud_cntr_one = '1') then --0.625  
                                          baud_cntr <= baud_cntr;
                                          baud_clock_int <= '0';
                                       else
                                          baud_cntr <= baud_val;
                                          baud_clock_int <= '1';
                                       end if;
                                     else
                                      baud_cntr <= baud_cntr - '1';
                                      baud_clock_int <= '0';
                                     end if;
 
                       when "110" => if (baud_cntr = "0000000000000") then
                                       if ((xmit_cntr(1) = '1' or xmit_cntr(0) = '1') and baud_cntr_one = '1') then -- 0.75
                                          baud_cntr <= baud_cntr;
                                          baud_clock_int <= '0';
                                       else
                                          baud_cntr <= baud_val;
                                          baud_clock_int <= '1';
                                       end if;
                                     else
                                      baud_cntr <= baud_cntr - '1';
                                      baud_clock_int <= '0';
                                     end if;
 
                        when "111" => if (baud_cntr = "0000000000000") then
                                     if (((xmit_cntr(1) = '1' or xmit_cntr(0) = '1') or xmit_cntr(2 downto 0) = "100") and baud_cntr_one = '1') then --  0.875
                                          baud_cntr <= baud_cntr;
                                          baud_clock_int <= '0';
                                       else
                                          baud_cntr <= baud_val;
                                          baud_clock_int <= '1';
                                       end if;
                                     else
                                      baud_cntr <= baud_cntr - '1';
                                      baud_clock_int <= '0';
                                     end if;
 
                        when others => if (baud_cntr = "0000000000000") then      --0
                                         baud_cntr <= baud_val;
                                         baud_clock_int <= '1';
                                       else
                                          baud_cntr <= baud_cntr - '1';
                                          baud_clock_int <= '0';
                                       end if;
                     end case;
                end if;
            end if;
    end process make_baud_cntr1;
END GENERATE;
 
UG10:IF(BAUD_VAL_FRCTN_EN= 0) GENERATE
      make_baud_cntr2:process(clk,aresetn)
       begin
           if (aresetn = '0') then
                baud_cntr <= "0000000000000";
                baud_clock_int <= '0';
           elsif(clk'event and clk='1') then
                if (sresetn = '0') then
                    baud_cntr <= "0000000000000";
                    baud_clock_int <= '0';
                            else
                     if (baud_cntr = "0000000000000") then
                         baud_cntr <= baud_val;
                         baud_clock_int <= '1';
                     else
                         baud_cntr <= baud_cntr - '1';
                         baud_clock_int <= '0';
                     end if;
                end if;
            end if;
         end process make_baud_cntr2;
END GENERATE;
 
  --baud_clock_int <= '1' when baud_cntr = "00000000" else
  --                  '0';                       
 
  ----------------------------------------------------
  -- generate a transmit clock pulse
  ----------------------------------------------------
 
  make_xmit_clock: process(clk,aresetn)
                   begin
                       if(aresetn = '0') then
                           xmit_cntr <= "0000";
                           xmit_clock <= '0';
                       elsif(clk'event and clk='1') then
                           if(sresetn = '0') then
                               xmit_cntr <= "0000";
                               xmit_clock <= '0';
                           else
                               if(baud_clock_int = '1') then
                                   xmit_cntr <= xmit_cntr + '1';
                                   if(xmit_cntr = "1111") then
                                       xmit_clock <= '1';
                                   else
                                       xmit_clock <= '0';
                                   end if;
                               end if;
                           end if;
                       end if;
                   end process;
 
xmit_pulse <= xmit_clock and baud_clock_int;
baud_clock <= baud_clock_int;
 
 
end rtl;

Browse

Tools

Subversion Repositories ahbmaster

[/] [ahbmaster/] [trunk/] [test79_AHBmaster/] [component/] [work/] [top/] [CoreUARTapb_0/] [rtl/] [vhdl/] [core/] [Clock_gen.vhd] - Blame information for rev 3

Line No.	Rev	Author	Line
1	3	uson	`-- ********************************************************************`
2			`-- Actel Corporation Proprietary and Confidential`
3			`-- Copyright 2008 Actel Corporation. All rights reserved.`
4			`--`
5			`-- ANY USE OR REDISTRIBUTION IN PART OR IN WHOLE MUST BE HANDLED IN`
6			`-- ACCORDANCE WITH THE ACTEL LICENSE AGREEMENT AND MUST BE APPROVED`
7			`-- IN ADVANCE IN WRITING.`
8			`--`
9			`-- Description: CoreUART/ CoreUARTapb UART core`
10			`--`
11			`--`
12			`-- Revision Information:`
13			`-- Date Description`
14			`-- Jun09 Revision 4.1`
15			`-- Aug10 Revision 4.2`
16			`--`
17
18			`-- SVN Revision Information:`
19			`-- SVN $Revision: 8508 $`
20			`-- SVN $Date: 2009-06-15 16:49:49 -0700 (Mon, 15 Jun 2009) $`
21			`--`
22			`-- Resolved SARs`
23			`-- SAR Date Who Description`
24			`-- 20741 2Sep10 AS Increased baud rate by ensuring fifo ctrl runs off`
25			`-- sys clk (not baud clock). See note below.`
26
27			`-- Notes:`
28			`-- best viewed with tabstops set to "4"`
29
30			`LIBRARY IEEE;`
31			`USE IEEE.std_logic_1164.all;`
32			`USE IEEE.std_logic_arith.all;`
33			`USE IEEE.std_logic_unsigned.all;`
34
35			`entity top_CoreUARTapb_0_Clock_gen is`
36			`GENERIC (BAUD_VAL_FRCTN_EN : integer := 0;`
37			`SYNC_RESET : integer := 0);`
38			`port ( clk : in std_logic; -- system clock`
39			`reset_n : in std_logic; -- active low async reset`
40			`baud_val : in std_logic_vector(12 downto 0); -- value loaded into cntr`
41			`BAUD_VAL_FRACTION : in std_logic_vector(2 downto 0); -- fractional part of baud value`
42			`baud_clock : out std_logic; -- 16x baud clock pulse`
43			`xmit_pulse : out std_logic -- transmit pulse`
44			`);`
45			`end entity top_CoreUARTapb_0_Clock_gen;`
46
47			`architecture rtl of top_CoreUARTapb_0_Clock_gen is`
48
49
50			`signal baud_cntr : std_logic_vector(12 downto 0); -- 16x clock division counter reg.`
51			`signal baud_clock_int : std_logic; -- internal 16x baud clock pulse`
52			`signal xmit_clock : std_logic;`
53			`signal xmit_cntr : std_logic_vector(3 downto 0); -- baud tx counter reg.`
54			`signal baud_cntr_one : std_logic;`
55			`signal aresetn : std_logic;`
56			`signal sresetn : std_logic;`
57
58			`begin`
59			`aresetn <= '1' WHEN (SYNC_RESET=1) ELSE reset_n;`
60			`sresetn <= reset_n WHEN (SYNC_RESET=1) ELSE '1';`
61			`--------------------------------------------------`
62			`-- generate a x16 baud clock pulse`
63			`--------------------------------------------------`
64			`UG09:IF(BAUD_VAL_FRCTN_EN = 1) GENERATE`
65
66			`-- Add one cycle 1/8, 2/8, 3/8, 4/8, 5/8, 6/8, 7/8 of the time by freezing`
67			`-- baud_cntr for one cycle when count reaches 0 for certain xmit_cntr values.`
68			`-- xmit_cntr values are identifed by looking for bits of this counter`
69			`-- being certain combinations.`
70
71			`make_baud_cntr_one: process(clk,aresetn)`
72			`begin`
73			`if (aresetn = '0') then`
74			`baud_cntr_one <= '0';`
75			`elsif(clk'event and clk='1') then`
76			`if (sresetn = '0') then`
77			`baud_cntr_one <= '0';`
78			`else`
79			`if (baud_cntr = "0000000000001") then`
80			`baud_cntr_one <= '1';`
81			`else`
82			`baud_cntr_one <= '0';`
83			`end if;`
84			`end if;`
85			`end if;`
86			`end process make_baud_cntr_one;`
87
88			`make_baud_cntr1: process(clk, aresetn)`
89			`begin`
90			`if (aresetn = '0') then`
91			`baud_cntr <= "0000000000000";`
92			`baud_clock_int <= '0';`
93			`elsif(clk'event and clk='1') then`
94			`if (sresetn = '0') then`
95			`baud_cntr <= "0000000000000";`
96			`baud_clock_int <= '0';`
97			`else`
98			`case BAUD_VAL_FRACTION is`
99			`when "000" => if (baud_cntr = "0000000000000") then --0`
100			`baud_cntr <= baud_val;`
101			`baud_clock_int <= '1';`
102			`else`
103			`baud_cntr <= baud_cntr - '1';`
104			`baud_clock_int <= '0';`
105			`end if;`
106
107			`when "001" => if (baud_cntr = "0000000000000") then`
108			`if (xmit_cntr(2 downto 0) = "111" and baud_cntr_one = '1') then --0.125`
109			`baud_cntr <= baud_cntr;`
110			`baud_clock_int <= '0';`
111			`else`
112			`baud_cntr <= baud_val;`
113			`baud_clock_int <= '1';`
114			`end if;`
115			`else`
116			`baud_cntr <= baud_cntr - '1';`
117			`baud_clock_int <= '0';`
118			`end if;`
119
120			`when "010" => if (baud_cntr = "0000000000000") then`
121			`if (xmit_cntr(1 downto 0) = "11" and baud_cntr_one = '1') then --0.25`
122			`baud_cntr <= baud_cntr;`
123			`baud_clock_int <= '0';`
124			`else`
125			`baud_cntr <= baud_val;`
126			`baud_clock_int <= '1';`
127			`end if;`
128			`else`
129			`baud_cntr <= baud_cntr - '1';`
130			`baud_clock_int <= '0';`
131			`end if;`
132
133			`when "011" => if (baud_cntr = "0000000000000") then`
134			`if ((((xmit_cntr(2) = '1') or (xmit_cntr(1) = '1')) and xmit_cntr(0) ='1') and (baud_cntr_one = '1')) then --0.375`
135			`baud_cntr <= baud_cntr;`
136			`baud_clock_int <= '0';`
137			`else`
138			`baud_cntr <= baud_val;`
139			`baud_clock_int <= '1';`
140			`end if;`
141			`else`
142			`baud_cntr <= baud_cntr - '1';`
143			`baud_clock_int <= '0';`
144			`end if;`
145
146			`when "100" => if (baud_cntr = "0000000000000") then`
147			`if (xmit_cntr(0) = '1' and baud_cntr_one = '1') then --0.5`
148			`baud_cntr <= baud_cntr;`
149			`baud_clock_int <= '0';`
150			`else`
151			`baud_cntr <= baud_val;`
152			`baud_clock_int <= '1';`
153			`end if;`
154			`else`
155			`baud_cntr <= baud_cntr - '1';`
156			`baud_clock_int <= '0';`
157			`end if;`
158
159			`when "101" => if (baud_cntr = "0000000000000") then`
160			`if (((xmit_cntr(2) = '1' and xmit_cntr(1) = '1') or xmit_cntr(0) = '1') and baud_cntr_one = '1') then --0.625`
161			`baud_cntr <= baud_cntr;`
162			`baud_clock_int <= '0';`
163			`else`
164			`baud_cntr <= baud_val;`
165			`baud_clock_int <= '1';`
166			`end if;`
167			`else`
168			`baud_cntr <= baud_cntr - '1';`
169			`baud_clock_int <= '0';`
170			`end if;`
171
172			`when "110" => if (baud_cntr = "0000000000000") then`
173			`if ((xmit_cntr(1) = '1' or xmit_cntr(0) = '1') and baud_cntr_one = '1') then -- 0.75`
174			`baud_cntr <= baud_cntr;`
175			`baud_clock_int <= '0';`
176			`else`
177			`baud_cntr <= baud_val;`
178			`baud_clock_int <= '1';`
179			`end if;`
180			`else`
181			`baud_cntr <= baud_cntr - '1';`
182			`baud_clock_int <= '0';`
183			`end if;`
184
185			`when "111" => if (baud_cntr = "0000000000000") then`
186			`if (((xmit_cntr(1) = '1' or xmit_cntr(0) = '1') or xmit_cntr(2 downto 0) = "100") and baud_cntr_one = '1') then -- 0.875`
187			`baud_cntr <= baud_cntr;`
188			`baud_clock_int <= '0';`
189			`else`
190			`baud_cntr <= baud_val;`
191			`baud_clock_int <= '1';`
192			`end if;`
193			`else`
194			`baud_cntr <= baud_cntr - '1';`
195			`baud_clock_int <= '0';`
196			`end if;`
197
198			`when others => if (baud_cntr = "0000000000000") then --0`
199			`baud_cntr <= baud_val;`
200			`baud_clock_int <= '1';`
201			`else`
202			`baud_cntr <= baud_cntr - '1';`
203			`baud_clock_int <= '0';`
204			`end if;`
205			`end case;`
206			`end if;`
207			`end if;`
208			`end process make_baud_cntr1;`
209			`END GENERATE;`
210
211			`UG10:IF(BAUD_VAL_FRCTN_EN= 0) GENERATE`
212			`make_baud_cntr2:process(clk,aresetn)`
213			`begin`
214			`if (aresetn = '0') then`
215			`baud_cntr <= "0000000000000";`
216			`baud_clock_int <= '0';`
217			`elsif(clk'event and clk='1') then`
218			`if (sresetn = '0') then`
219			`baud_cntr <= "0000000000000";`
220			`baud_clock_int <= '0';`
221			`else`
222			`if (baud_cntr = "0000000000000") then`
223			`baud_cntr <= baud_val;`
224			`baud_clock_int <= '1';`
225			`else`
226			`baud_cntr <= baud_cntr - '1';`
227			`baud_clock_int <= '0';`
228			`end if;`
229			`end if;`
230			`end if;`
231			`end process make_baud_cntr2;`
232			`END GENERATE;`
233
234			`--baud_clock_int <= '1' when baud_cntr = "00000000" else`
235			`-- '0';`
236
237			`----------------------------------------------------`
238			`-- generate a transmit clock pulse`
239			`----------------------------------------------------`
240
241			`make_xmit_clock: process(clk,aresetn)`
242			`begin`
243			`if(aresetn = '0') then`
244			`xmit_cntr <= "0000";`
245			`xmit_clock <= '0';`
246			`elsif(clk'event and clk='1') then`
247			`if(sresetn = '0') then`
248			`xmit_cntr <= "0000";`
249			`xmit_clock <= '0';`
250			`else`
251			`if(baud_clock_int = '1') then`
252			`xmit_cntr <= xmit_cntr + '1';`
253			`if(xmit_cntr = "1111") then`
254			`xmit_clock <= '1';`
255			`else`
256			`xmit_clock <= '0';`
257			`end if;`
258			`end if;`
259			`end if;`
260			`end if;`
261			`end process;`
262
263			`xmit_pulse <= xmit_clock and baud_clock_int;`
264			`baud_clock <= baud_clock_int;`
265
266
267			`end rtl;`