URL
https://opencores.org/ocsvn/ahbmaster/ahbmaster/trunk
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1 |
3 |
uson |
quietly set ACTELLIBNAME ProASIC3
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2 |
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quietly set PROJECT_DIR "C:/Actelprj/test79_AHBmaster"
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3 |
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4 |
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if {[file exists postsynth/_info]} {
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5 |
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echo "INFO: Simulation library postsynth already exists"
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6 |
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} else {
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7 |
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file delete -force postsynth
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8 |
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vlib postsynth
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9 |
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}
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10 |
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vmap postsynth postsynth
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11 |
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vmap proasic3 "C:/Microsemi/Libero_SoC_v11.8/Designer/lib/modelsim/precompiled/vhdl/proasic3"
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12 |
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vmap COREAHBLITE_LIB "../component/Actel/DirectCore/CoreAHBLite/5.3.101/mti/user_vhdl/COREAHBLITE_LIB"
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vcom -work COREAHBLITE_LIB -force_refresh
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14 |
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vlog -work COREAHBLITE_LIB -force_refresh
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15 |
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if {[file exists COREUARTAPB_LIB/_info]} {
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16 |
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echo "INFO: Simulation library COREUARTAPB_LIB already exists"
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17 |
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} else {
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18 |
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file delete -force COREUARTAPB_LIB
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19 |
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vlib COREUARTAPB_LIB
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}
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21 |
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vmap COREUARTAPB_LIB "COREUARTAPB_LIB"
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22 |
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23 |
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vcom -2008 -explicit -work COREAHBLITE_LIB "${PROJECT_DIR}/component/Actel/DirectCore/CoreAHBLite/5.3.101/rtl/vhdl/core/coreahblite_addrdec.vhd"
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24 |
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vcom -2008 -explicit -work COREAHBLITE_LIB "${PROJECT_DIR}/component/Actel/DirectCore/CoreAHBLite/5.3.101/rtl/vhdl/core/coreahblite_pkg.vhd"
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25 |
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vcom -2008 -explicit -work COREAHBLITE_LIB "${PROJECT_DIR}/component/work/top/CoreAHBLite_0/rtl/vhdl/core/components.vhd"
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26 |
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vcom -2008 -explicit -work COREUARTAPB_LIB "${PROJECT_DIR}/component/work/top/CoreUARTapb_0/rtl/vhdl/core/components.vhd"
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27 |
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vcom -2008 -explicit -work COREUARTAPB_LIB "${PROJECT_DIR}/component/work/top/CoreUARTapb_0/rtl/vhdl/core/coreuart_pkg.vhd"
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28 |
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vcom -2008 -explicit -work postsynth "${PROJECT_DIR}/synthesis/top.vhd"
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29 |
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vcom -2008 -explicit -work postsynth "${PROJECT_DIR}/stimulus/tb_clk.vhd"
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30 |
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vcom -2008 -explicit -work postsynth "${PROJECT_DIR}/component/work/tb_top/tb_top.vhd"
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31 |
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32 |
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vsim -L proasic3 -L postsynth -L COREAHBLITE_LIB -L COREUARTAPB_LIB -t 1ps postsynth.tb_top
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33 |
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add wave /tb_top/*
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34 |
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run 1000ns
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