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[/] [alpha_blender/] [trunk/] [alpha_blender/] [full_adder.vhd] - Blame information for rev 2

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Line No. Rev Author Line
1 2 hamidrm
library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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entity full_adder is
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    Port ( a : in  STD_LOGIC;
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           b : in  STD_LOGIC;
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           cin : in  STD_LOGIC;
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           cout : out  STD_LOGIC;
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           sum : out  STD_LOGIC);
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end full_adder;
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architecture Behavioral of full_adder is
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begin
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cout <= (a and b) or (b and cin) or (a and cin);
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sum <= (a xor b) xor cin;
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end Behavioral;
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