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.\" ========================================================================
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.\"
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.IX Title "GCC 1"
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.TH GCC 1 "2012-11-29" "gcc-4.8.0" "GNU"
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.\" For nroff, turn off justification. Always turn off hyphenation; it makes
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.\" way too many mistakes in technical documents.
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.if n .ad l
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.nh
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.SH "NAME"
|
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gcc \- GNU project C and C++ compiler
|
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.SH "SYNOPSIS"
|
135 |
|
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.IX Header "SYNOPSIS"
|
136 |
|
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gcc [\fB\-c\fR|\fB\-S\fR|\fB\-E\fR] [\fB\-std=\fR\fIstandard\fR]
|
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|
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[\fB\-g\fR] [\fB\-pg\fR] [\fB\-O\fR\fIlevel\fR]
|
138 |
|
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[\fB\-W\fR\fIwarn\fR...] [\fB\-Wpedantic\fR]
|
139 |
|
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[\fB\-I\fR\fIdir\fR...] [\fB\-L\fR\fIdir\fR...]
|
140 |
|
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[\fB\-D\fR\fImacro\fR[=\fIdefn\fR]...] [\fB\-U\fR\fImacro\fR]
|
141 |
|
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[\fB\-f\fR\fIoption\fR...] [\fB\-m\fR\fImachine-option\fR...]
|
142 |
|
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[\fB\-o\fR \fIoutfile\fR] [@\fIfile\fR] \fIinfile\fR...
|
143 |
|
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.PP
|
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|
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Only the most useful options are listed here; see below for the
|
145 |
|
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remainder. \fBg++\fR accepts mostly the same options as \fBgcc\fR.
|
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|
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.SH "DESCRIPTION"
|
147 |
|
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.IX Header "DESCRIPTION"
|
148 |
|
|
When you invoke \s-1GCC\s0, it normally does preprocessing, compilation,
|
149 |
|
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assembly and linking. The \*(L"overall options\*(R" allow you to stop this
|
150 |
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process at an intermediate stage. For example, the \fB\-c\fR option
|
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says not to run the linker. Then the output consists of object files
|
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|
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output by the assembler.
|
153 |
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.PP
|
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|
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Other options are passed on to one stage of processing. Some options
|
155 |
|
|
control the preprocessor and others the compiler itself. Yet other
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options control the assembler and linker; most of these are not
|
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documented here, since you rarely need to use any of them.
|
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.PP
|
159 |
|
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Most of the command-line options that you can use with \s-1GCC\s0 are useful
|
160 |
|
|
for C programs; when an option is only useful with another language
|
161 |
|
|
(usually \*(C+), the explanation says so explicitly. If the description
|
162 |
|
|
for a particular option does not mention a source language, you can use
|
163 |
|
|
that option with all supported languages.
|
164 |
|
|
.PP
|
165 |
|
|
The \fBgcc\fR program accepts options and file names as operands. Many
|
166 |
|
|
options have multi-letter names; therefore multiple single-letter options
|
167 |
|
|
may \fInot\fR be grouped: \fB\-dv\fR is very different from \fB\-d\ \-v\fR.
|
168 |
|
|
.PP
|
169 |
|
|
You can mix options and other arguments. For the most part, the order
|
170 |
|
|
you use doesn't matter. Order does matter when you use several
|
171 |
|
|
options of the same kind; for example, if you specify \fB\-L\fR more
|
172 |
|
|
than once, the directories are searched in the order specified. Also,
|
173 |
|
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the placement of the \fB\-l\fR option is significant.
|
174 |
|
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.PP
|
175 |
|
|
Many options have long names starting with \fB\-f\fR or with
|
176 |
|
|
\&\fB\-W\fR\-\-\-for example,
|
177 |
|
|
\&\fB\-fmove\-loop\-invariants\fR, \fB\-Wformat\fR and so on. Most of
|
178 |
|
|
these have both positive and negative forms; the negative form of
|
179 |
|
|
\&\fB\-ffoo\fR is \fB\-fno\-foo\fR. This manual documents
|
180 |
|
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only one of these two forms, whichever one is not the default.
|
181 |
|
|
.SH "OPTIONS"
|
182 |
|
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.IX Header "OPTIONS"
|
183 |
|
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.SS "Option Summary"
|
184 |
|
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.IX Subsection "Option Summary"
|
185 |
|
|
Here is a summary of all the options, grouped by type. Explanations are
|
186 |
|
|
in the following sections.
|
187 |
|
|
.IP "\fIOverall Options\fR" 4
|
188 |
|
|
.IX Item "Overall Options"
|
189 |
|
|
\&\fB\-c \-S \-E \-o\fR \fIfile\fR \fB\-no\-canonical\-prefixes
|
190 |
|
|
\&\-pipe \-pass\-exit\-codes
|
191 |
|
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\&\-x\fR \fIlanguage\fR \fB\-v \-### \-\-help\fR[\fB=\fR\fIclass\fR[\fB,...\fR]] \fB\-\-target\-help
|
192 |
|
|
\&\-\-version \-wrapper @\fR\fIfile\fR \fB\-fplugin=\fR\fIfile\fR \fB\-fplugin\-arg\-\fR\fIname\fR\fB=\fR\fIarg\fR
|
193 |
|
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\&\fB\-fdump\-ada\-spec\fR[\fB\-slim\fR] \fB\-fada\-spec\-parent=\fR\fIarg\fR \fB\-fdump\-go\-spec=\fR\fIfile\fR
|
194 |
|
|
.IP "\fIC Language Options\fR" 4
|
195 |
|
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.IX Item "C Language Options"
|
196 |
|
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\&\fB\-ansi \-std=\fR\fIstandard\fR \fB\-fgnu89\-inline
|
197 |
|
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\&\-aux\-info\fR \fIfilename\fR \fB\-fallow\-parameterless\-variadic\-functions
|
198 |
|
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\&\-fno\-asm \-fno\-builtin \-fno\-builtin\-\fR\fIfunction\fR
|
199 |
|
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\&\fB\-fhosted \-ffreestanding \-fopenmp \-fms\-extensions \-fplan9\-extensions
|
200 |
|
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\&\-trigraphs \-traditional \-traditional\-cpp
|
201 |
|
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\&\-fallow\-single\-precision \-fcond\-mismatch \-flax\-vector\-conversions
|
202 |
|
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\&\-fsigned\-bitfields \-fsigned\-char
|
203 |
|
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\&\-funsigned\-bitfields \-funsigned\-char\fR
|
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|
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.IP "\fI\*(C+ Language Options\fR" 4
|
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|
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.IX Item " Language Options"
|
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|
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\&\fB\-fabi\-version=\fR\fIn\fR \fB\-fno\-access\-control \-fcheck\-new
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\&\-fconstexpr\-depth=\fR\fIn\fR \fB\-ffriend\-injection
|
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\&\-fno\-elide\-constructors
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\&\-fno\-enforce\-eh\-specs
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\&\-ffor\-scope \-fno\-for\-scope \-fno\-gnu\-keywords
|
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\&\-fno\-implicit\-templates
|
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\&\-fno\-implicit\-inline\-templates
|
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\&\-fno\-implement\-inlines \-fms\-extensions
|
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|
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\&\-fno\-nonansi\-builtins \-fnothrow\-opt \-fno\-operator\-names
|
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\&\-fno\-optional\-diags \-fpermissive
|
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\&\-fno\-pretty\-templates
|
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\&\-frepo \-fno\-rtti \-fstats \-ftemplate\-backtrace\-limit=\fR\fIn\fR
|
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|
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\&\fB\-ftemplate\-depth=\fR\fIn\fR
|
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\&\fB\-fno\-threadsafe\-statics \-fuse\-cxa\-atexit \-fno\-weak \-nostdinc++
|
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|
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\&\-fno\-default\-inline \-fvisibility\-inlines\-hidden
|
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|
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\&\-fvisibility\-ms\-compat
|
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\&\-fext\-numeric\-literals
|
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|
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\&\-Wabi \-Wconversion\-null \-Wctor\-dtor\-privacy
|
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|
|
\&\-Wdelete\-non\-virtual\-dtor \-Wliteral\-suffix \-Wnarrowing
|
225 |
|
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\&\-Wnoexcept \-Wnon\-virtual\-dtor \-Wreorder
|
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|
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\&\-Weffc++ \-Wstrict\-null\-sentinel
|
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|
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\&\-Wno\-non\-template\-friend \-Wold\-style\-cast
|
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|
|
\&\-Woverloaded\-virtual \-Wno\-pmf\-conversions
|
229 |
|
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\&\-Wsign\-promo\fR
|
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|
|
.IP "\fIObjective-C and Objective\-\*(C+ Language Options\fR" 4
|
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|
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.IX Item "Objective-C and Objective- Language Options"
|
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|
|
\&\fB\-fconstant\-string\-class=\fR\fIclass-name\fR
|
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|
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\&\fB\-fgnu\-runtime \-fnext\-runtime
|
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|
|
\&\-fno\-nil\-receivers
|
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|
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\&\-fobjc\-abi\-version=\fR\fIn\fR
|
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|
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\&\fB\-fobjc\-call\-cxx\-cdtors
|
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|
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\&\-fobjc\-direct\-dispatch
|
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|
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\&\-fobjc\-exceptions
|
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|
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\&\-fobjc\-gc
|
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|
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\&\-fobjc\-nilcheck
|
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|
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\&\-fobjc\-std=objc1
|
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\&\-freplace\-objc\-classes
|
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|
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\&\-fzero\-link
|
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|
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\&\-gen\-decls
|
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\&\-Wassign\-intercept
|
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|
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\&\-Wno\-protocol \-Wselector
|
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|
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\&\-Wstrict\-selector\-match
|
248 |
|
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\&\-Wundeclared\-selector\fR
|
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|
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.IP "\fILanguage Independent Options\fR" 4
|
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|
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.IX Item "Language Independent Options"
|
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|
|
\&\fB\-fmessage\-length=\fR\fIn\fR
|
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|
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\&\fB\-fdiagnostics\-show\-location=\fR[\fBonce\fR|\fBevery-line\fR]
|
253 |
|
|
\&\fB\-fno\-diagnostics\-show\-option \-fno\-diagnostics\-show\-caret\fR
|
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|
|
.IP "\fIWarning Options\fR" 4
|
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|
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.IX Item "Warning Options"
|
256 |
|
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\&\fB\-fsyntax\-only \-fmax\-errors=\fR\fIn\fR \fB\-Wpedantic
|
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|
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\&\-pedantic\-errors
|
258 |
|
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\&\-w \-Wextra \-Wall \-Waddress \-Waggregate\-return \-Warray\-bounds
|
259 |
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\&\-Wno\-attributes \-Wno\-builtin\-macro\-redefined
|
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|
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\&\-Wc++\-compat \-Wc++11\-compat \-Wcast\-align \-Wcast\-qual
|
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|
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\&\-Wchar\-subscripts \-Wclobbered \-Wcomment
|
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\&\-Wconversion \-Wcoverage\-mismatch \-Wno\-cpp \-Wno\-deprecated
|
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|
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\&\-Wno\-deprecated\-declarations \-Wdisabled\-optimization
|
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|
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\&\-Wno\-div\-by\-zero \-Wdouble\-promotion \-Wempty\-body \-Wenum\-compare
|
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|
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\&\-Wno\-endif\-labels \-Werror \-Werror=*
|
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|
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\&\-Wfatal\-errors \-Wfloat\-equal \-Wformat \-Wformat=2
|
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\&\-Wno\-format\-contains\-nul \-Wno\-format\-extra\-args \-Wformat\-nonliteral
|
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\&\-Wformat\-security \-Wformat\-y2k
|
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\&\-Wframe\-larger\-than=\fR\fIlen\fR \fB\-Wno\-free\-nonheap\-object \-Wjump\-misses\-init
|
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\&\-Wignored\-qualifiers
|
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\&\-Wimplicit \-Wimplicit\-function\-declaration \-Wimplicit\-int
|
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\&\-Winit\-self \-Winline \-Wmaybe\-uninitialized
|
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|
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\&\-Wno\-int\-to\-pointer\-cast \-Wno\-invalid\-offsetof
|
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|
|
\&\-Winvalid\-pch \-Wlarger\-than=\fR\fIlen\fR \fB\-Wunsafe\-loop\-optimizations
|
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\&\-Wlogical\-op \-Wlong\-long
|
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|
|
\&\-Wmain \-Wmaybe\-uninitialized \-Wmissing\-braces \-Wmissing\-field\-initializers
|
277 |
|
|
\&\-Wmissing\-include\-dirs
|
278 |
|
|
\&\-Wno\-mudflap
|
279 |
|
|
\&\-Wno\-multichar \-Wnonnull \-Wno\-overflow
|
280 |
|
|
\&\-Woverlength\-strings \-Wpacked \-Wpacked\-bitfield\-compat \-Wpadded
|
281 |
|
|
\&\-Wparentheses \-Wpedantic\-ms\-format \-Wno\-pedantic\-ms\-format
|
282 |
|
|
\&\-Wpointer\-arith \-Wno\-pointer\-to\-int\-cast
|
283 |
|
|
\&\-Wredundant\-decls \-Wno\-return\-local\-addr
|
284 |
|
|
\&\-Wreturn\-type \-Wsequence\-point \-Wshadow
|
285 |
|
|
\&\-Wsign\-compare \-Wsign\-conversion \-Wsizeof\-pointer\-memaccess
|
286 |
|
|
\&\-Wstack\-protector \-Wstack\-usage=\fR\fIlen\fR \fB\-Wstrict\-aliasing
|
287 |
|
|
\&\-Wstrict\-aliasing=n \-Wstrict\-overflow \-Wstrict\-overflow=\fR\fIn\fR
|
288 |
|
|
\&\fB\-Wsuggest\-attribute=\fR[\fBpure\fR|\fBconst\fR|\fBnoreturn\fR|\fBformat\fR]
|
289 |
|
|
\&\fB\-Wmissing\-format\-attribute
|
290 |
|
|
\&\-Wswitch \-Wswitch\-default \-Wswitch\-enum \-Wsync\-nand
|
291 |
|
|
\&\-Wsystem\-headers \-Wtrampolines \-Wtrigraphs \-Wtype\-limits \-Wundef
|
292 |
|
|
\&\-Wuninitialized \-Wunknown\-pragmas \-Wno\-pragmas
|
293 |
|
|
\&\-Wunsuffixed\-float\-constants \-Wunused \-Wunused\-function
|
294 |
|
|
\&\-Wunused\-label \-Wunused\-local\-typedefs \-Wunused\-parameter
|
295 |
|
|
\&\-Wno\-unused\-result \-Wunused\-value \-Wunused\-variable
|
296 |
|
|
\&\-Wunused\-but\-set\-parameter \-Wunused\-but\-set\-variable
|
297 |
|
|
\&\-Wuseless\-cast \-Wvariadic\-macros \-Wvector\-operation\-performance
|
298 |
|
|
\&\-Wvla \-Wvolatile\-register\-var \-Wwrite\-strings \-Wzero\-as\-null\-pointer\-constant\fR
|
299 |
|
|
.IP "\fIC and Objective-C-only Warning Options\fR" 4
|
300 |
|
|
.IX Item "C and Objective-C-only Warning Options"
|
301 |
|
|
\&\fB\-Wbad\-function\-cast \-Wmissing\-declarations
|
302 |
|
|
\&\-Wmissing\-parameter\-type \-Wmissing\-prototypes \-Wnested\-externs
|
303 |
|
|
\&\-Wold\-style\-declaration \-Wold\-style\-definition
|
304 |
|
|
\&\-Wstrict\-prototypes \-Wtraditional \-Wtraditional\-conversion
|
305 |
|
|
\&\-Wdeclaration\-after\-statement \-Wpointer\-sign\fR
|
306 |
|
|
.IP "\fIDebugging Options\fR" 4
|
307 |
|
|
.IX Item "Debugging Options"
|
308 |
|
|
\&\fB\-d\fR\fIletters\fR \fB\-dumpspecs \-dumpmachine \-dumpversion
|
309 |
|
|
\&\-fsanitize=\fR\fIstyle\fR
|
310 |
|
|
\&\fB\-fdbg\-cnt\-list \-fdbg\-cnt=\fR\fIcounter-value-list\fR
|
311 |
|
|
\&\fB\-fdisable\-ipa\-\fR\fIpass_name\fR
|
312 |
|
|
\&\fB\-fdisable\-rtl\-\fR\fIpass_name\fR
|
313 |
|
|
\&\fB\-fdisable\-rtl\-\fR\fIpass-name\fR\fB=\fR\fIrange-list\fR
|
314 |
|
|
\&\fB\-fdisable\-tree\-\fR\fIpass_name\fR
|
315 |
|
|
\&\fB\-fdisable\-tree\-\fR\fIpass-name\fR\fB=\fR\fIrange-list\fR
|
316 |
|
|
\&\fB\-fdump\-noaddr \-fdump\-unnumbered \-fdump\-unnumbered\-links
|
317 |
|
|
\&\-fdump\-translation\-unit\fR[\fB\-\fR\fIn\fR]
|
318 |
|
|
\&\fB\-fdump\-class\-hierarchy\fR[\fB\-\fR\fIn\fR]
|
319 |
|
|
\&\fB\-fdump\-ipa\-all \-fdump\-ipa\-cgraph \-fdump\-ipa\-inline
|
320 |
|
|
\&\-fdump\-passes
|
321 |
|
|
\&\-fdump\-statistics
|
322 |
|
|
\&\-fdump\-tree\-all
|
323 |
|
|
\&\-fdump\-tree\-original\fR[\fB\-\fR\fIn\fR]
|
324 |
|
|
\&\fB\-fdump\-tree\-optimized\fR[\fB\-\fR\fIn\fR]
|
325 |
|
|
\&\fB\-fdump\-tree\-cfg \-fdump\-tree\-vcg \-fdump\-tree\-alias
|
326 |
|
|
\&\-fdump\-tree\-ch
|
327 |
|
|
\&\-fdump\-tree\-ssa\fR[\fB\-\fR\fIn\fR] \fB\-fdump\-tree\-pre\fR[\fB\-\fR\fIn\fR]
|
328 |
|
|
\&\fB\-fdump\-tree\-ccp\fR[\fB\-\fR\fIn\fR] \fB\-fdump\-tree\-dce\fR[\fB\-\fR\fIn\fR]
|
329 |
|
|
\&\fB\-fdump\-tree\-gimple\fR[\fB\-raw\fR] \fB\-fdump\-tree\-mudflap\fR[\fB\-\fR\fIn\fR]
|
330 |
|
|
\&\fB\-fdump\-tree\-dom\fR[\fB\-\fR\fIn\fR]
|
331 |
|
|
\&\fB\-fdump\-tree\-dse\fR[\fB\-\fR\fIn\fR]
|
332 |
|
|
\&\fB\-fdump\-tree\-phiprop\fR[\fB\-\fR\fIn\fR]
|
333 |
|
|
\&\fB\-fdump\-tree\-phiopt\fR[\fB\-\fR\fIn\fR]
|
334 |
|
|
\&\fB\-fdump\-tree\-forwprop\fR[\fB\-\fR\fIn\fR]
|
335 |
|
|
\&\fB\-fdump\-tree\-copyrename\fR[\fB\-\fR\fIn\fR]
|
336 |
|
|
\&\fB\-fdump\-tree\-nrv \-fdump\-tree\-vect
|
337 |
|
|
\&\-fdump\-tree\-sink
|
338 |
|
|
\&\-fdump\-tree\-sra\fR[\fB\-\fR\fIn\fR]
|
339 |
|
|
\&\fB\-fdump\-tree\-forwprop\fR[\fB\-\fR\fIn\fR]
|
340 |
|
|
\&\fB\-fdump\-tree\-fre\fR[\fB\-\fR\fIn\fR]
|
341 |
|
|
\&\fB\-fdump\-tree\-vrp\fR[\fB\-\fR\fIn\fR]
|
342 |
|
|
\&\fB\-ftree\-vectorizer\-verbose=\fR\fIn\fR
|
343 |
|
|
\&\fB\-fdump\-tree\-storeccp\fR[\fB\-\fR\fIn\fR]
|
344 |
|
|
\&\fB\-fdump\-final\-insns=\fR\fIfile\fR
|
345 |
|
|
\&\fB\-fcompare\-debug\fR[\fB=\fR\fIopts\fR] \fB\-fcompare\-debug\-second
|
346 |
|
|
\&\-feliminate\-dwarf2\-dups \-fno\-eliminate\-unused\-debug\-types
|
347 |
|
|
\&\-feliminate\-unused\-debug\-symbols \-femit\-class\-debug\-always
|
348 |
|
|
\&\-fenable\-\fR\fIkind\fR\fB\-\fR\fIpass\fR
|
349 |
|
|
\&\fB\-fenable\-\fR\fIkind\fR\fB\-\fR\fIpass\fR\fB=\fR\fIrange-list\fR
|
350 |
|
|
\&\fB\-fdebug\-types\-section \-fmem\-report\-wpa
|
351 |
|
|
\&\-fmem\-report \-fpre\-ipa\-mem\-report \-fpost\-ipa\-mem\-report \-fprofile\-arcs
|
352 |
|
|
\&\-fopt\-info
|
353 |
|
|
\&\-fopt\-info\-\fR\fIoptions\fR[\fB=\fR\fIfile\fR]
|
354 |
|
|
\&\fB\-frandom\-seed=\fR\fIstring\fR \fB\-fsched\-verbose=\fR\fIn\fR
|
355 |
|
|
\&\fB\-fsel\-sched\-verbose \-fsel\-sched\-dump\-cfg \-fsel\-sched\-pipelining\-verbose
|
356 |
|
|
\&\-fstack\-usage \-ftest\-coverage \-ftime\-report \-fvar\-tracking
|
357 |
|
|
\&\-fvar\-tracking\-assignments \-fvar\-tracking\-assignments\-toggle
|
358 |
|
|
\&\-g \-g\fR\fIlevel\fR \fB\-gtoggle \-gcoff \-gdwarf\-\fR\fIversion\fR
|
359 |
|
|
\&\fB\-ggdb \-grecord\-gcc\-switches \-gno\-record\-gcc\-switches
|
360 |
|
|
\&\-gstabs \-gstabs+ \-gstrict\-dwarf \-gno\-strict\-dwarf
|
361 |
|
|
\&\-gvms \-gxcoff \-gxcoff+
|
362 |
|
|
\&\-fno\-merge\-debug\-strings \-fno\-dwarf2\-cfi\-asm
|
363 |
|
|
\&\-fdebug\-prefix\-map=\fR\fIold\fR\fB=\fR\fInew\fR
|
364 |
|
|
\&\fB\-femit\-struct\-debug\-baseonly \-femit\-struct\-debug\-reduced
|
365 |
|
|
\&\-femit\-struct\-debug\-detailed\fR[\fB=\fR\fIspec-list\fR]
|
366 |
|
|
\&\fB\-p \-pg \-print\-file\-name=\fR\fIlibrary\fR \fB\-print\-libgcc\-file\-name
|
367 |
|
|
\&\-print\-multi\-directory \-print\-multi\-lib \-print\-multi\-os\-directory
|
368 |
|
|
\&\-print\-prog\-name=\fR\fIprogram\fR \fB\-print\-search\-dirs \-Q
|
369 |
|
|
\&\-print\-sysroot \-print\-sysroot\-headers\-suffix
|
370 |
|
|
\&\-save\-temps \-save\-temps=cwd \-save\-temps=obj \-time\fR[\fB=\fR\fIfile\fR]
|
371 |
|
|
.IP "\fIOptimization Options\fR" 4
|
372 |
|
|
.IX Item "Optimization Options"
|
373 |
|
|
\&\fB\-falign\-functions[=\fR\fIn\fR\fB] \-falign\-jumps[=\fR\fIn\fR\fB]
|
374 |
|
|
\&\-falign\-labels[=\fR\fIn\fR\fB] \-falign\-loops[=\fR\fIn\fR\fB]
|
375 |
|
|
\&\-fassociative\-math \-fauto\-inc\-dec \-fbranch\-probabilities
|
376 |
|
|
\&\-fbranch\-target\-load\-optimize \-fbranch\-target\-load\-optimize2
|
377 |
|
|
\&\-fbtr\-bb\-exclusive \-fcaller\-saves
|
378 |
|
|
\&\-fcheck\-data\-deps \-fcombine\-stack\-adjustments \-fconserve\-stack
|
379 |
|
|
\&\-fcompare\-elim \-fcprop\-registers \-fcrossjumping
|
380 |
|
|
\&\-fcse\-follow\-jumps \-fcse\-skip\-blocks \-fcx\-fortran\-rules
|
381 |
|
|
\&\-fcx\-limited\-range
|
382 |
|
|
\&\-fdata\-sections \-fdce \-fdelayed\-branch
|
383 |
|
|
\&\-fdelete\-null\-pointer\-checks \-fdevirtualize \-fdse
|
384 |
|
|
\&\-fearly\-inlining \-fipa\-sra \-fexpensive\-optimizations \-ffat\-lto\-objects
|
385 |
|
|
\&\-ffast\-math \-ffinite\-math\-only \-ffloat\-store \-fexcess\-precision=\fR\fIstyle\fR
|
386 |
|
|
\&\fB\-fforward\-propagate \-ffp\-contract=\fR\fIstyle\fR \fB\-ffunction\-sections
|
387 |
|
|
\&\-fgcse \-fgcse\-after\-reload \-fgcse\-las \-fgcse\-lm \-fgraphite\-identity
|
388 |
|
|
\&\-fgcse\-sm \-fhoist\-adjacent\-loads \-fif\-conversion
|
389 |
|
|
\&\-fif\-conversion2 \-findirect\-inlining
|
390 |
|
|
\&\-finline\-functions \-finline\-functions\-called\-once \-finline\-limit=\fR\fIn\fR
|
391 |
|
|
\&\fB\-finline\-small\-functions \-fipa\-cp \-fipa\-cp\-clone
|
392 |
|
|
\&\-fipa\-pta \-fipa\-profile \-fipa\-pure\-const \-fipa\-reference
|
393 |
|
|
\&\-fira\-algorithm=\fR\fIalgorithm\fR
|
394 |
|
|
\&\fB\-fira\-region=\fR\fIregion\fR \fB\-fira\-hoist\-pressure
|
395 |
|
|
\&\-fira\-loop\-pressure \-fno\-ira\-share\-save\-slots
|
396 |
|
|
\&\-fno\-ira\-share\-spill\-slots \-fira\-verbose=\fR\fIn\fR
|
397 |
|
|
\&\fB\-fivopts \-fkeep\-inline\-functions \-fkeep\-static\-consts
|
398 |
|
|
\&\-floop\-block \-floop\-interchange \-floop\-strip\-mine \-floop\-nest\-optimize
|
399 |
|
|
\&\-floop\-parallelize\-all \-flto \-flto\-compression\-level
|
400 |
|
|
\&\-flto\-partition=\fR\fIalg\fR \fB\-flto\-report \-fmerge\-all\-constants
|
401 |
|
|
\&\-fmerge\-constants \-fmodulo\-sched \-fmodulo\-sched\-allow\-regmoves
|
402 |
|
|
\&\-fmove\-loop\-invariants fmudflap \-fmudflapir \-fmudflapth \-fno\-branch\-count\-reg
|
403 |
|
|
\&\-fno\-default\-inline
|
404 |
|
|
\&\-fno\-defer\-pop \-fno\-function\-cse \-fno\-guess\-branch\-probability
|
405 |
|
|
\&\-fno\-inline \-fno\-math\-errno \-fno\-peephole \-fno\-peephole2
|
406 |
|
|
\&\-fno\-sched\-interblock \-fno\-sched\-spec \-fno\-signed\-zeros
|
407 |
|
|
\&\-fno\-toplevel\-reorder \-fno\-trapping\-math \-fno\-zero\-initialized\-in\-bss
|
408 |
|
|
\&\-fomit\-frame\-pointer \-foptimize\-register\-move \-foptimize\-sibling\-calls
|
409 |
|
|
\&\-fpartial\-inlining \-fpeel\-loops \-fpredictive\-commoning
|
410 |
|
|
\&\-fprefetch\-loop\-arrays \-fprofile\-report
|
411 |
|
|
\&\-fprofile\-correction \-fprofile\-dir=\fR\fIpath\fR \fB\-fprofile\-generate
|
412 |
|
|
\&\-fprofile\-generate=\fR\fIpath\fR
|
413 |
|
|
\&\fB\-fprofile\-use \-fprofile\-use=\fR\fIpath\fR \fB\-fprofile\-values
|
414 |
|
|
\&\-freciprocal\-math \-free \-fregmove \-frename\-registers \-freorder\-blocks
|
415 |
|
|
\&\-freorder\-blocks\-and\-partition \-freorder\-functions
|
416 |
|
|
\&\-frerun\-cse\-after\-loop \-freschedule\-modulo\-scheduled\-loops
|
417 |
|
|
\&\-frounding\-math \-fsched2\-use\-superblocks \-fsched\-pressure
|
418 |
|
|
\&\-fsched\-spec\-load \-fsched\-spec\-load\-dangerous
|
419 |
|
|
\&\-fsched\-stalled\-insns\-dep[=\fR\fIn\fR\fB] \-fsched\-stalled\-insns[=\fR\fIn\fR\fB]
|
420 |
|
|
\&\-fsched\-group\-heuristic \-fsched\-critical\-path\-heuristic
|
421 |
|
|
\&\-fsched\-spec\-insn\-heuristic \-fsched\-rank\-heuristic
|
422 |
|
|
\&\-fsched\-last\-insn\-heuristic \-fsched\-dep\-count\-heuristic
|
423 |
|
|
\&\-fschedule\-insns \-fschedule\-insns2 \-fsection\-anchors
|
424 |
|
|
\&\-fselective\-scheduling \-fselective\-scheduling2
|
425 |
|
|
\&\-fsel\-sched\-pipelining \-fsel\-sched\-pipelining\-outer\-loops
|
426 |
|
|
\&\-fshrink\-wrap \-fsignaling\-nans \-fsingle\-precision\-constant
|
427 |
|
|
\&\-fsplit\-ivs\-in\-unroller \-fsplit\-wide\-types \-fstack\-protector
|
428 |
|
|
\&\-fstack\-protector\-all \-fstrict\-aliasing \-fstrict\-overflow
|
429 |
|
|
\&\-fthread\-jumps \-ftracer \-ftree\-bit\-ccp
|
430 |
|
|
\&\-ftree\-builtin\-call\-dce \-ftree\-ccp \-ftree\-ch
|
431 |
|
|
\&\-ftree\-coalesce\-inline\-vars \-ftree\-coalesce\-vars \-ftree\-copy\-prop
|
432 |
|
|
\&\-ftree\-copyrename \-ftree\-dce \-ftree\-dominator\-opts \-ftree\-dse
|
433 |
|
|
\&\-ftree\-forwprop \-ftree\-fre \-ftree\-loop\-if\-convert
|
434 |
|
|
\&\-ftree\-loop\-if\-convert\-stores \-ftree\-loop\-im
|
435 |
|
|
\&\-ftree\-phiprop \-ftree\-loop\-distribution \-ftree\-loop\-distribute\-patterns
|
436 |
|
|
\&\-ftree\-loop\-ivcanon \-ftree\-loop\-linear \-ftree\-loop\-optimize
|
437 |
|
|
\&\-ftree\-parallelize\-loops=\fR\fIn\fR \fB\-ftree\-pre \-ftree\-partial\-pre \-ftree\-pta
|
438 |
|
|
\&\-ftree\-reassoc \-ftree\-sink \-ftree\-slsr \-ftree\-sra
|
439 |
|
|
\&\-ftree\-switch\-conversion \-ftree\-tail\-merge
|
440 |
|
|
\&\-ftree\-ter \-ftree\-vect\-loop\-version \-ftree\-vectorize \-ftree\-vrp
|
441 |
|
|
\&\-funit\-at\-a\-time \-funroll\-all\-loops \-funroll\-loops
|
442 |
|
|
\&\-funsafe\-loop\-optimizations \-funsafe\-math\-optimizations \-funswitch\-loops
|
443 |
|
|
\&\-fvariable\-expansion\-in\-unroller \-fvect\-cost\-model \-fvpt \-fweb
|
444 |
|
|
\&\-fwhole\-program \-fwpa \-fuse\-linker\-plugin
|
445 |
|
|
\&\-\-param\fR \fIname\fR\fB=\fR\fIvalue\fR
|
446 |
|
|
\&\fB\-O \-O0 \-O1 \-O2 \-O3 \-Os \-Ofast \-Og\fR
|
447 |
|
|
.IP "\fIPreprocessor Options\fR" 4
|
448 |
|
|
.IX Item "Preprocessor Options"
|
449 |
|
|
\&\fB\-A\fR\fIquestion\fR\fB=\fR\fIanswer\fR
|
450 |
|
|
\&\fB\-A\-\fR\fIquestion\fR[\fB=\fR\fIanswer\fR]
|
451 |
|
|
\&\fB\-C \-dD \-dI \-dM \-dN
|
452 |
|
|
\&\-D\fR\fImacro\fR[\fB=\fR\fIdefn\fR] \fB\-E \-H
|
453 |
|
|
\&\-idirafter\fR \fIdir\fR
|
454 |
|
|
\&\fB\-include\fR \fIfile\fR \fB\-imacros\fR \fIfile\fR
|
455 |
|
|
\&\fB\-iprefix\fR \fIfile\fR \fB\-iwithprefix\fR \fIdir\fR
|
456 |
|
|
\&\fB\-iwithprefixbefore\fR \fIdir\fR \fB\-isystem\fR \fIdir\fR
|
457 |
|
|
\&\fB\-imultilib\fR \fIdir\fR \fB\-isysroot\fR \fIdir\fR
|
458 |
|
|
\&\fB\-M \-MM \-MF \-MG \-MP \-MQ \-MT \-nostdinc
|
459 |
|
|
\&\-P \-fdebug\-cpp \-ftrack\-macro\-expansion \-fworking\-directory
|
460 |
|
|
\&\-remap \-trigraphs \-undef \-U\fR\fImacro\fR
|
461 |
|
|
\&\fB\-Wp,\fR\fIoption\fR \fB\-Xpreprocessor\fR \fIoption\fR \fB\-no\-integrated\-cpp\fR
|
462 |
|
|
.IP "\fIAssembler Option\fR" 4
|
463 |
|
|
.IX Item "Assembler Option"
|
464 |
|
|
\&\fB\-Wa,\fR\fIoption\fR \fB\-Xassembler\fR \fIoption\fR
|
465 |
|
|
.IP "\fILinker Options\fR" 4
|
466 |
|
|
.IX Item "Linker Options"
|
467 |
|
|
\&\fIobject-file-name\fR \fB\-l\fR\fIlibrary\fR
|
468 |
|
|
\&\fB\-nostartfiles \-nodefaultlibs \-nostdlib \-pie \-rdynamic
|
469 |
|
|
\&\-s \-static \-static\-libgcc \-static\-libstdc++
|
470 |
|
|
\&\-static\-libasan \-static\-libtsan
|
471 |
|
|
\&\-shared \-shared\-libgcc \-symbolic
|
472 |
|
|
\&\-T\fR \fIscript\fR \fB\-Wl,\fR\fIoption\fR \fB\-Xlinker\fR \fIoption\fR
|
473 |
|
|
\&\fB\-u\fR \fIsymbol\fR
|
474 |
|
|
.IP "\fIDirectory Options\fR" 4
|
475 |
|
|
.IX Item "Directory Options"
|
476 |
|
|
\&\fB\-B\fR\fIprefix\fR \fB\-I\fR\fIdir\fR \fB\-iplugindir=\fR\fIdir\fR
|
477 |
|
|
\&\fB\-iquote\fR\fIdir\fR \fB\-L\fR\fIdir\fR \fB\-specs=\fR\fIfile\fR \fB\-I\-
|
478 |
|
|
\&\-\-sysroot=\fR\fIdir\fR \fB\-\-no\-sysroot\-suffix\fR
|
479 |
|
|
.IP "\fIMachine Dependent Options\fR" 4
|
480 |
|
|
.IX Item "Machine Dependent Options"
|
481 |
|
|
\&\fIAArch64 Options\fR
|
482 |
|
|
\&\fB\-mbig\-endian \-mlittle\-endian
|
483 |
|
|
\&\-mgeneral\-regs\-only
|
484 |
|
|
\&\-mcmodel=tiny \-mcmodel=small \-mcmodel=large
|
485 |
|
|
\&\-mstrict\-align
|
486 |
|
|
\&\-momit\-leaf\-frame\-pointer \-mno\-omit\-leaf\-frame\-pointer
|
487 |
|
|
\&\-mtls\-dialect=desc \-mtls\-dialect=traditional
|
488 |
|
|
\&\-march=\fR\fIname\fR \fB\-mcpu=\fR\fIname\fR \fB\-mtune=\fR\fIname\fR
|
489 |
|
|
.Sp
|
490 |
|
|
\&\fIAdapteva Epiphany Options\fR
|
491 |
|
|
\&\fB\-mhalf\-reg\-file \-mprefer\-short\-insn\-regs
|
492 |
|
|
\&\-mbranch\-cost=\fR\fInum\fR \fB\-mcmove \-mnops=\fR\fInum\fR \fB\-msoft\-cmpsf
|
493 |
|
|
\&\-msplit\-lohi \-mpost\-inc \-mpost\-modify \-mstack\-offset=\fR\fInum\fR
|
494 |
|
|
\&\fB\-mround\-nearest \-mlong\-calls \-mshort\-calls \-msmall16
|
495 |
|
|
\&\-mfp\-mode=\fR\fImode\fR \fB\-mvect\-double \-max\-vect\-align=\fR\fInum\fR
|
496 |
|
|
\&\fB\-msplit\-vecmove\-early \-m1reg\-\fR\fIreg\fR
|
497 |
|
|
.Sp
|
498 |
|
|
\&\fI\s-1ARM\s0 Options\fR
|
499 |
|
|
\&\fB\-mapcs\-frame \-mno\-apcs\-frame
|
500 |
|
|
\&\-mabi=\fR\fIname\fR
|
501 |
|
|
\&\fB\-mapcs\-stack\-check \-mno\-apcs\-stack\-check
|
502 |
|
|
\&\-mapcs\-float \-mno\-apcs\-float
|
503 |
|
|
\&\-mapcs\-reentrant \-mno\-apcs\-reentrant
|
504 |
|
|
\&\-msched\-prolog \-mno\-sched\-prolog
|
505 |
|
|
\&\-mlittle\-endian \-mbig\-endian \-mwords\-little\-endian
|
506 |
|
|
\&\-mfloat\-abi=\fR\fIname\fR
|
507 |
|
|
\&\fB\-mfp16\-format=\fR\fIname\fR
|
508 |
|
|
\&\fB\-mthumb\-interwork \-mno\-thumb\-interwork
|
509 |
|
|
\&\-mcpu=\fR\fIname\fR \fB\-march=\fR\fIname\fR \fB\-mfpu=\fR\fIname\fR
|
510 |
|
|
\&\fB\-mstructure\-size\-boundary=\fR\fIn\fR
|
511 |
|
|
\&\fB\-mabort\-on\-noreturn
|
512 |
|
|
\&\-mlong\-calls \-mno\-long\-calls
|
513 |
|
|
\&\-msingle\-pic\-base \-mno\-single\-pic\-base
|
514 |
|
|
\&\-mpic\-register=\fR\fIreg\fR
|
515 |
|
|
\&\fB\-mnop\-fun\-dllimport
|
516 |
|
|
\&\-mcirrus\-fix\-invalid\-insns \-mno\-cirrus\-fix\-invalid\-insns
|
517 |
|
|
\&\-mpoke\-function\-name
|
518 |
|
|
\&\-mthumb \-marm
|
519 |
|
|
\&\-mtpcs\-frame \-mtpcs\-leaf\-frame
|
520 |
|
|
\&\-mcaller\-super\-interworking \-mcallee\-super\-interworking
|
521 |
|
|
\&\-mtp=\fR\fIname\fR \fB\-mtls\-dialect=\fR\fIdialect\fR
|
522 |
|
|
\&\fB\-mword\-relocations
|
523 |
|
|
\&\-mfix\-cortex\-m3\-ldrd
|
524 |
|
|
\&\-munaligned\-access\fR
|
525 |
|
|
.Sp
|
526 |
|
|
\&\fI\s-1AVR\s0 Options\fR
|
527 |
|
|
\&\fB\-mmcu=\fR\fImcu\fR \fB\-maccumulate\-args \-mbranch\-cost=\fR\fIcost\fR
|
528 |
|
|
\&\fB\-mcall\-prologues \-mint8 \-mno\-interrupts \-mrelax
|
529 |
|
|
\&\-mstrict\-X \-mtiny\-stack\fR
|
530 |
|
|
.Sp
|
531 |
|
|
\&\fIBlackfin Options\fR
|
532 |
|
|
\&\fB\-mcpu=\fR\fIcpu\fR[\fB\-\fR\fIsirevision\fR]
|
533 |
|
|
\&\fB\-msim \-momit\-leaf\-frame\-pointer \-mno\-omit\-leaf\-frame\-pointer
|
534 |
|
|
\&\-mspecld\-anomaly \-mno\-specld\-anomaly \-mcsync\-anomaly \-mno\-csync\-anomaly
|
535 |
|
|
\&\-mlow\-64k \-mno\-low64k \-mstack\-check\-l1 \-mid\-shared\-library
|
536 |
|
|
\&\-mno\-id\-shared\-library \-mshared\-library\-id=\fR\fIn\fR
|
537 |
|
|
\&\fB\-mleaf\-id\-shared\-library \-mno\-leaf\-id\-shared\-library
|
538 |
|
|
\&\-msep\-data \-mno\-sep\-data \-mlong\-calls \-mno\-long\-calls
|
539 |
|
|
\&\-mfast\-fp \-minline\-plt \-mmulticore \-mcorea \-mcoreb \-msdram
|
540 |
|
|
\&\-micplb\fR
|
541 |
|
|
.Sp
|
542 |
|
|
\&\fIC6X Options\fR
|
543 |
|
|
\&\fB\-mbig\-endian \-mlittle\-endian \-march=\fR\fIcpu\fR
|
544 |
|
|
\&\fB\-msim \-msdata=\fR\fIsdata-type\fR
|
545 |
|
|
.Sp
|
546 |
|
|
\&\fI\s-1CRIS\s0 Options\fR
|
547 |
|
|
\&\fB\-mcpu=\fR\fIcpu\fR \fB\-march=\fR\fIcpu\fR \fB\-mtune=\fR\fIcpu\fR
|
548 |
|
|
\&\fB\-mmax\-stack\-frame=\fR\fIn\fR \fB\-melinux\-stacksize=\fR\fIn\fR
|
549 |
|
|
\&\fB\-metrax4 \-metrax100 \-mpdebug \-mcc\-init \-mno\-side\-effects
|
550 |
|
|
\&\-mstack\-align \-mdata\-align \-mconst\-align
|
551 |
|
|
\&\-m32\-bit \-m16\-bit \-m8\-bit \-mno\-prologue\-epilogue \-mno\-gotplt
|
552 |
|
|
\&\-melf \-maout \-melinux \-mlinux \-sim \-sim2
|
553 |
|
|
\&\-mmul\-bug\-workaround \-mno\-mul\-bug\-workaround\fR
|
554 |
|
|
.Sp
|
555 |
|
|
\&\fI\s-1CR16\s0 Options\fR
|
556 |
|
|
\&\fB\-mmac
|
557 |
|
|
\&\-mcr16cplus \-mcr16c
|
558 |
|
|
\&\-msim \-mint32 \-mbit\-ops
|
559 |
|
|
\&\-mdata\-model=\fR\fImodel\fR
|
560 |
|
|
.Sp
|
561 |
|
|
\&\fIDarwin Options\fR
|
562 |
|
|
\&\fB\-all_load \-allowable_client \-arch \-arch_errors_fatal
|
563 |
|
|
\&\-arch_only \-bind_at_load \-bundle \-bundle_loader
|
564 |
|
|
\&\-client_name \-compatibility_version \-current_version
|
565 |
|
|
\&\-dead_strip
|
566 |
|
|
\&\-dependency\-file \-dylib_file \-dylinker_install_name
|
567 |
|
|
\&\-dynamic \-dynamiclib \-exported_symbols_list
|
568 |
|
|
\&\-filelist \-flat_namespace \-force_cpusubtype_ALL
|
569 |
|
|
\&\-force_flat_namespace \-headerpad_max_install_names
|
570 |
|
|
\&\-iframework
|
571 |
|
|
\&\-image_base \-init \-install_name \-keep_private_externs
|
572 |
|
|
\&\-multi_module \-multiply_defined \-multiply_defined_unused
|
573 |
|
|
\&\-noall_load \-no_dead_strip_inits_and_terms
|
574 |
|
|
\&\-nofixprebinding \-nomultidefs \-noprebind \-noseglinkedit
|
575 |
|
|
\&\-pagezero_size \-prebind \-prebind_all_twolevel_modules
|
576 |
|
|
\&\-private_bundle \-read_only_relocs \-sectalign
|
577 |
|
|
\&\-sectobjectsymbols \-whyload \-seg1addr
|
578 |
|
|
\&\-sectcreate \-sectobjectsymbols \-sectorder
|
579 |
|
|
\&\-segaddr \-segs_read_only_addr \-segs_read_write_addr
|
580 |
|
|
\&\-seg_addr_table \-seg_addr_table_filename \-seglinkedit
|
581 |
|
|
\&\-segprot \-segs_read_only_addr \-segs_read_write_addr
|
582 |
|
|
\&\-single_module \-static \-sub_library \-sub_umbrella
|
583 |
|
|
\&\-twolevel_namespace \-umbrella \-undefined
|
584 |
|
|
\&\-unexported_symbols_list \-weak_reference_mismatches
|
585 |
|
|
\&\-whatsloaded \-F \-gused \-gfull \-mmacosx\-version\-min=\fR\fIversion\fR
|
586 |
|
|
\&\fB\-mkernel \-mone\-byte\-bool\fR
|
587 |
|
|
.Sp
|
588 |
|
|
\&\fI\s-1DEC\s0 Alpha Options\fR
|
589 |
|
|
\&\fB\-mno\-fp\-regs \-msoft\-float
|
590 |
|
|
\&\-mieee \-mieee\-with\-inexact \-mieee\-conformant
|
591 |
|
|
\&\-mfp\-trap\-mode=\fR\fImode\fR \fB\-mfp\-rounding\-mode=\fR\fImode\fR
|
592 |
|
|
\&\fB\-mtrap\-precision=\fR\fImode\fR \fB\-mbuild\-constants
|
593 |
|
|
\&\-mcpu=\fR\fIcpu-type\fR \fB\-mtune=\fR\fIcpu-type\fR
|
594 |
|
|
\&\fB\-mbwx \-mmax \-mfix \-mcix
|
595 |
|
|
\&\-mfloat\-vax \-mfloat\-ieee
|
596 |
|
|
\&\-mexplicit\-relocs \-msmall\-data \-mlarge\-data
|
597 |
|
|
\&\-msmall\-text \-mlarge\-text
|
598 |
|
|
\&\-mmemory\-latency=\fR\fItime\fR
|
599 |
|
|
.Sp
|
600 |
|
|
\&\fI\s-1FR30\s0 Options\fR
|
601 |
|
|
\&\fB\-msmall\-model \-mno\-lsim\fR
|
602 |
|
|
.Sp
|
603 |
|
|
\&\fI\s-1FRV\s0 Options\fR
|
604 |
|
|
\&\fB\-mgpr\-32 \-mgpr\-64 \-mfpr\-32 \-mfpr\-64
|
605 |
|
|
\&\-mhard\-float \-msoft\-float
|
606 |
|
|
\&\-malloc\-cc \-mfixed\-cc \-mdword \-mno\-dword
|
607 |
|
|
\&\-mdouble \-mno\-double
|
608 |
|
|
\&\-mmedia \-mno\-media \-mmuladd \-mno\-muladd
|
609 |
|
|
\&\-mfdpic \-minline\-plt \-mgprel\-ro \-multilib\-library\-pic
|
610 |
|
|
\&\-mlinked\-fp \-mlong\-calls \-malign\-labels
|
611 |
|
|
\&\-mlibrary\-pic \-macc\-4 \-macc\-8
|
612 |
|
|
\&\-mpack \-mno\-pack \-mno\-eflags \-mcond\-move \-mno\-cond\-move
|
613 |
|
|
\&\-moptimize\-membar \-mno\-optimize\-membar
|
614 |
|
|
\&\-mscc \-mno\-scc \-mcond\-exec \-mno\-cond\-exec
|
615 |
|
|
\&\-mvliw\-branch \-mno\-vliw\-branch
|
616 |
|
|
\&\-mmulti\-cond\-exec \-mno\-multi\-cond\-exec \-mnested\-cond\-exec
|
617 |
|
|
\&\-mno\-nested\-cond\-exec \-mtomcat\-stats
|
618 |
|
|
\&\-mTLS \-mtls
|
619 |
|
|
\&\-mcpu=\fR\fIcpu\fR
|
620 |
|
|
.Sp
|
621 |
|
|
\&\fIGNU/Linux Options\fR
|
622 |
|
|
\&\fB\-mglibc \-muclibc \-mbionic \-mandroid
|
623 |
|
|
\&\-tno\-android\-cc \-tno\-android\-ld\fR
|
624 |
|
|
.Sp
|
625 |
|
|
\&\fIH8/300 Options\fR
|
626 |
|
|
\&\fB\-mrelax \-mh \-ms \-mn \-mexr \-mno\-exr \-mint32 \-malign\-300\fR
|
627 |
|
|
.Sp
|
628 |
|
|
\&\fI\s-1HPPA\s0 Options\fR
|
629 |
|
|
\&\fB\-march=\fR\fIarchitecture-type\fR
|
630 |
|
|
\&\fB\-mbig\-switch \-mdisable\-fpregs \-mdisable\-indexing
|
631 |
|
|
\&\-mfast\-indirect\-calls \-mgas \-mgnu\-ld \-mhp\-ld
|
632 |
|
|
\&\-mfixed\-range=\fR\fIregister-range\fR
|
633 |
|
|
\&\fB\-mjump\-in\-delay \-mlinker\-opt \-mlong\-calls
|
634 |
|
|
\&\-mlong\-load\-store \-mno\-big\-switch \-mno\-disable\-fpregs
|
635 |
|
|
\&\-mno\-disable\-indexing \-mno\-fast\-indirect\-calls \-mno\-gas
|
636 |
|
|
\&\-mno\-jump\-in\-delay \-mno\-long\-load\-store
|
637 |
|
|
\&\-mno\-portable\-runtime \-mno\-soft\-float
|
638 |
|
|
\&\-mno\-space\-regs \-msoft\-float \-mpa\-risc\-1\-0
|
639 |
|
|
\&\-mpa\-risc\-1\-1 \-mpa\-risc\-2\-0 \-mportable\-runtime
|
640 |
|
|
\&\-mschedule=\fR\fIcpu-type\fR \fB\-mspace\-regs \-msio \-mwsio
|
641 |
|
|
\&\-munix=\fR\fIunix-std\fR \fB\-nolibdld \-static \-threads\fR
|
642 |
|
|
.Sp
|
643 |
|
|
\&\fIi386 and x86\-64 Options\fR
|
644 |
|
|
\&\fB\-mtune=\fR\fIcpu-type\fR \fB\-march=\fR\fIcpu-type\fR
|
645 |
|
|
\&\fB\-mfpmath=\fR\fIunit\fR
|
646 |
|
|
\&\fB\-masm=\fR\fIdialect\fR \fB\-mno\-fancy\-math\-387
|
647 |
|
|
\&\-mno\-fp\-ret\-in\-387 \-msoft\-float
|
648 |
|
|
\&\-mno\-wide\-multiply \-mrtd \-malign\-double
|
649 |
|
|
\&\-mpreferred\-stack\-boundary=\fR\fInum\fR
|
650 |
|
|
\&\fB\-mincoming\-stack\-boundary=\fR\fInum\fR
|
651 |
|
|
\&\fB\-mcld \-mcx16 \-msahf \-mmovbe \-mcrc32
|
652 |
|
|
\&\-mrecip \-mrecip=\fR\fIopt\fR
|
653 |
|
|
\&\fB\-mvzeroupper \-mprefer\-avx128
|
654 |
|
|
\&\-mmmx \-msse \-msse2 \-msse3 \-mssse3 \-msse4.1 \-msse4.2 \-msse4 \-mavx
|
655 |
|
|
\&\-mavx2 \-maes \-mpclmul \-mfsgsbase \-mrdrnd \-mf16c \-mfma
|
656 |
|
|
\&\-msse4a \-m3dnow \-mpopcnt \-mabm \-mbmi \-mtbm \-mfma4 \-mxop \-mlzcnt
|
657 |
|
|
\&\-mbmi2 \-mrtm \-mlwp \-mthreads
|
658 |
|
|
\&\-mno\-align\-stringops \-minline\-all\-stringops
|
659 |
|
|
\&\-minline\-stringops\-dynamically \-mstringop\-strategy=\fR\fIalg\fR
|
660 |
|
|
\&\fB\-mpush\-args \-maccumulate\-outgoing\-args \-m128bit\-long\-double
|
661 |
|
|
\&\-m96bit\-long\-double \-mlong\-double\-64 \-mlong\-double\-80
|
662 |
|
|
\&\-mregparm=\fR\fInum\fR \fB\-msseregparm
|
663 |
|
|
\&\-mveclibabi=\fR\fItype\fR \fB\-mvect8\-ret\-in\-mem
|
664 |
|
|
\&\-mpc32 \-mpc64 \-mpc80 \-mstackrealign
|
665 |
|
|
\&\-momit\-leaf\-frame\-pointer \-mno\-red\-zone \-mno\-tls\-direct\-seg\-refs
|
666 |
|
|
\&\-mcmodel=\fR\fIcode-model\fR \fB\-mabi=\fR\fIname\fR \fB\-maddress\-mode=\fR\fImode\fR
|
667 |
|
|
\&\fB\-m32 \-m64 \-mx32 \-mlarge\-data\-threshold=\fR\fInum\fR
|
668 |
|
|
\&\fB\-msse2avx \-mfentry \-m8bit\-idiv
|
669 |
|
|
\&\-mavx256\-split\-unaligned\-load \-mavx256\-split\-unaligned\-store\fR
|
670 |
|
|
.Sp
|
671 |
|
|
\&\fIi386 and x86\-64 Windows Options\fR
|
672 |
|
|
\&\fB\-mconsole \-mcygwin \-mno\-cygwin \-mdll
|
673 |
|
|
\&\-mnop\-fun\-dllimport \-mthread
|
674 |
|
|
\&\-municode \-mwin32 \-mwindows \-fno\-set\-stack\-executable\fR
|
675 |
|
|
.Sp
|
676 |
|
|
\&\fI\s-1IA\-64\s0 Options\fR
|
677 |
|
|
\&\fB\-mbig\-endian \-mlittle\-endian \-mgnu\-as \-mgnu\-ld \-mno\-pic
|
678 |
|
|
\&\-mvolatile\-asm\-stop \-mregister\-names \-msdata \-mno\-sdata
|
679 |
|
|
\&\-mconstant\-gp \-mauto\-pic \-mfused\-madd
|
680 |
|
|
\&\-minline\-float\-divide\-min\-latency
|
681 |
|
|
\&\-minline\-float\-divide\-max\-throughput
|
682 |
|
|
\&\-mno\-inline\-float\-divide
|
683 |
|
|
\&\-minline\-int\-divide\-min\-latency
|
684 |
|
|
\&\-minline\-int\-divide\-max\-throughput
|
685 |
|
|
\&\-mno\-inline\-int\-divide
|
686 |
|
|
\&\-minline\-sqrt\-min\-latency \-minline\-sqrt\-max\-throughput
|
687 |
|
|
\&\-mno\-inline\-sqrt
|
688 |
|
|
\&\-mdwarf2\-asm \-mearly\-stop\-bits
|
689 |
|
|
\&\-mfixed\-range=\fR\fIregister-range\fR \fB\-mtls\-size=\fR\fItls-size\fR
|
690 |
|
|
\&\fB\-mtune=\fR\fIcpu-type\fR \fB\-milp32 \-mlp64
|
691 |
|
|
\&\-msched\-br\-data\-spec \-msched\-ar\-data\-spec \-msched\-control\-spec
|
692 |
|
|
\&\-msched\-br\-in\-data\-spec \-msched\-ar\-in\-data\-spec \-msched\-in\-control\-spec
|
693 |
|
|
\&\-msched\-spec\-ldc \-msched\-spec\-control\-ldc
|
694 |
|
|
\&\-msched\-prefer\-non\-data\-spec\-insns \-msched\-prefer\-non\-control\-spec\-insns
|
695 |
|
|
\&\-msched\-stop\-bits\-after\-every\-cycle \-msched\-count\-spec\-in\-critical\-path
|
696 |
|
|
\&\-msel\-sched\-dont\-check\-control\-spec \-msched\-fp\-mem\-deps\-zero\-cost
|
697 |
|
|
\&\-msched\-max\-memory\-insns\-hard\-limit \-msched\-max\-memory\-insns=\fR\fImax-insns\fR
|
698 |
|
|
.Sp
|
699 |
|
|
\&\fI\s-1LM32\s0 Options\fR
|
700 |
|
|
\&\fB\-mbarrel\-shift\-enabled \-mdivide\-enabled \-mmultiply\-enabled
|
701 |
|
|
\&\-msign\-extend\-enabled \-muser\-enabled\fR
|
702 |
|
|
.Sp
|
703 |
|
|
\&\fIM32R/D Options\fR
|
704 |
|
|
\&\fB\-m32r2 \-m32rx \-m32r
|
705 |
|
|
\&\-mdebug
|
706 |
|
|
\&\-malign\-loops \-mno\-align\-loops
|
707 |
|
|
\&\-missue\-rate=\fR\fInumber\fR
|
708 |
|
|
\&\fB\-mbranch\-cost=\fR\fInumber\fR
|
709 |
|
|
\&\fB\-mmodel=\fR\fIcode-size-model-type\fR
|
710 |
|
|
\&\fB\-msdata=\fR\fIsdata-type\fR
|
711 |
|
|
\&\fB\-mno\-flush\-func \-mflush\-func=\fR\fIname\fR
|
712 |
|
|
\&\fB\-mno\-flush\-trap \-mflush\-trap=\fR\fInumber\fR
|
713 |
|
|
\&\fB\-G\fR \fInum\fR
|
714 |
|
|
.Sp
|
715 |
|
|
\&\fIM32C Options\fR
|
716 |
|
|
\&\fB\-mcpu=\fR\fIcpu\fR \fB\-msim \-memregs=\fR\fInumber\fR
|
717 |
|
|
.Sp
|
718 |
|
|
\&\fIM680x0 Options\fR
|
719 |
|
|
\&\fB\-march=\fR\fIarch\fR \fB\-mcpu=\fR\fIcpu\fR \fB\-mtune=\fR\fItune\fR
|
720 |
|
|
\&\fB\-m68000 \-m68020 \-m68020\-40 \-m68020\-60 \-m68030 \-m68040
|
721 |
|
|
\&\-m68060 \-mcpu32 \-m5200 \-m5206e \-m528x \-m5307 \-m5407
|
722 |
|
|
\&\-mcfv4e \-mbitfield \-mno\-bitfield \-mc68000 \-mc68020
|
723 |
|
|
\&\-mnobitfield \-mrtd \-mno\-rtd \-mdiv \-mno\-div \-mshort
|
724 |
|
|
\&\-mno\-short \-mhard\-float \-m68881 \-msoft\-float \-mpcrel
|
725 |
|
|
\&\-malign\-int \-mstrict\-align \-msep\-data \-mno\-sep\-data
|
726 |
|
|
\&\-mshared\-library\-id=n \-mid\-shared\-library \-mno\-id\-shared\-library
|
727 |
|
|
\&\-mxgot \-mno\-xgot\fR
|
728 |
|
|
.Sp
|
729 |
|
|
\&\fIMCore Options\fR
|
730 |
|
|
\&\fB\-mhardlit \-mno\-hardlit \-mdiv \-mno\-div \-mrelax\-immediates
|
731 |
|
|
\&\-mno\-relax\-immediates \-mwide\-bitfields \-mno\-wide\-bitfields
|
732 |
|
|
\&\-m4byte\-functions \-mno\-4byte\-functions \-mcallgraph\-data
|
733 |
|
|
\&\-mno\-callgraph\-data \-mslow\-bytes \-mno\-slow\-bytes \-mno\-lsim
|
734 |
|
|
\&\-mlittle\-endian \-mbig\-endian \-m210 \-m340 \-mstack\-increment\fR
|
735 |
|
|
.Sp
|
736 |
|
|
\&\fIMeP Options\fR
|
737 |
|
|
\&\fB\-mabsdiff \-mall\-opts \-maverage \-mbased=\fR\fIn\fR \fB\-mbitops
|
738 |
|
|
\&\-mc=\fR\fIn\fR \fB\-mclip \-mconfig=\fR\fIname\fR \fB\-mcop \-mcop32 \-mcop64 \-mivc2
|
739 |
|
|
\&\-mdc \-mdiv \-meb \-mel \-mio\-volatile \-ml \-mleadz \-mm \-mminmax
|
740 |
|
|
\&\-mmult \-mno\-opts \-mrepeat \-ms \-msatur \-msdram \-msim \-msimnovec \-mtf
|
741 |
|
|
\&\-mtiny=\fR\fIn\fR
|
742 |
|
|
.Sp
|
743 |
|
|
\&\fIMicroBlaze Options\fR
|
744 |
|
|
\&\fB\-msoft\-float \-mhard\-float \-msmall\-divides \-mcpu=\fR\fIcpu\fR
|
745 |
|
|
\&\fB\-mmemcpy \-mxl\-soft\-mul \-mxl\-soft\-div \-mxl\-barrel\-shift
|
746 |
|
|
\&\-mxl\-pattern\-compare \-mxl\-stack\-check \-mxl\-gp\-opt \-mno\-clearbss
|
747 |
|
|
\&\-mxl\-multiply\-high \-mxl\-float\-convert \-mxl\-float\-sqrt
|
748 |
|
|
\&\-mxl\-mode\-\fR\fIapp-model\fR
|
749 |
|
|
.Sp
|
750 |
|
|
\&\fI\s-1MIPS\s0 Options\fR
|
751 |
|
|
\&\fB\-EL \-EB \-march=\fR\fIarch\fR \fB\-mtune=\fR\fIarch\fR
|
752 |
|
|
\&\fB\-mips1 \-mips2 \-mips3 \-mips4 \-mips32 \-mips32r2
|
753 |
|
|
\&\-mips64 \-mips64r2
|
754 |
|
|
\&\-mips16 \-mno\-mips16 \-mflip\-mips16
|
755 |
|
|
\&\-minterlink\-mips16 \-mno\-interlink\-mips16
|
756 |
|
|
\&\-mabi=\fR\fIabi\fR \fB\-mabicalls \-mno\-abicalls
|
757 |
|
|
\&\-mshared \-mno\-shared \-mplt \-mno\-plt \-mxgot \-mno\-xgot
|
758 |
|
|
\&\-mgp32 \-mgp64 \-mfp32 \-mfp64 \-mhard\-float \-msoft\-float
|
759 |
|
|
\&\-mno\-float \-msingle\-float \-mdouble\-float
|
760 |
|
|
\&\-mdsp \-mno\-dsp \-mdspr2 \-mno\-dspr2
|
761 |
|
|
\&\-mmcu \-mmno\-mcu
|
762 |
|
|
\&\-mfpu=\fR\fIfpu-type\fR
|
763 |
|
|
\&\fB\-msmartmips \-mno\-smartmips
|
764 |
|
|
\&\-mpaired\-single \-mno\-paired\-single \-mdmx \-mno\-mdmx
|
765 |
|
|
\&\-mips3d \-mno\-mips3d \-mmt \-mno\-mt \-mllsc \-mno\-llsc
|
766 |
|
|
\&\-mlong64 \-mlong32 \-msym32 \-mno\-sym32
|
767 |
|
|
\&\-G\fR\fInum\fR \fB\-mlocal\-sdata \-mno\-local\-sdata
|
768 |
|
|
\&\-mextern\-sdata \-mno\-extern\-sdata \-mgpopt \-mno\-gopt
|
769 |
|
|
\&\-membedded\-data \-mno\-embedded\-data
|
770 |
|
|
\&\-muninit\-const\-in\-rodata \-mno\-uninit\-const\-in\-rodata
|
771 |
|
|
\&\-mcode\-readable=\fR\fIsetting\fR
|
772 |
|
|
\&\fB\-msplit\-addresses \-mno\-split\-addresses
|
773 |
|
|
\&\-mexplicit\-relocs \-mno\-explicit\-relocs
|
774 |
|
|
\&\-mcheck\-zero\-division \-mno\-check\-zero\-division
|
775 |
|
|
\&\-mdivide\-traps \-mdivide\-breaks
|
776 |
|
|
\&\-mmemcpy \-mno\-memcpy \-mlong\-calls \-mno\-long\-calls
|
777 |
|
|
\&\-mmad \-mno\-mad \-mfused\-madd \-mno\-fused\-madd \-nocpp
|
778 |
|
|
\&\-mfix\-24k \-mno\-fix\-24k
|
779 |
|
|
\&\-mfix\-r4000 \-mno\-fix\-r4000 \-mfix\-r4400 \-mno\-fix\-r4400
|
780 |
|
|
\&\-mfix\-r10000 \-mno\-fix\-r10000 \-mfix\-vr4120 \-mno\-fix\-vr4120
|
781 |
|
|
\&\-mfix\-vr4130 \-mno\-fix\-vr4130 \-mfix\-sb1 \-mno\-fix\-sb1
|
782 |
|
|
\&\-mflush\-func=\fR\fIfunc\fR \fB\-mno\-flush\-func
|
783 |
|
|
\&\-mbranch\-cost=\fR\fInum\fR \fB\-mbranch\-likely \-mno\-branch\-likely
|
784 |
|
|
\&\-mfp\-exceptions \-mno\-fp\-exceptions
|
785 |
|
|
\&\-mvr4130\-align \-mno\-vr4130\-align \-msynci \-mno\-synci
|
786 |
|
|
\&\-mrelax\-pic\-calls \-mno\-relax\-pic\-calls \-mmcount\-ra\-address\fR
|
787 |
|
|
.Sp
|
788 |
|
|
\&\fI\s-1MMIX\s0 Options\fR
|
789 |
|
|
\&\fB\-mlibfuncs \-mno\-libfuncs \-mepsilon \-mno\-epsilon \-mabi=gnu
|
790 |
|
|
\&\-mabi=mmixware \-mzero\-extend \-mknuthdiv \-mtoplevel\-symbols
|
791 |
|
|
\&\-melf \-mbranch\-predict \-mno\-branch\-predict \-mbase\-addresses
|
792 |
|
|
\&\-mno\-base\-addresses \-msingle\-exit \-mno\-single\-exit\fR
|
793 |
|
|
.Sp
|
794 |
|
|
\&\fI\s-1MN10300\s0 Options\fR
|
795 |
|
|
\&\fB\-mmult\-bug \-mno\-mult\-bug
|
796 |
|
|
\&\-mno\-am33 \-mam33 \-mam33\-2 \-mam34
|
797 |
|
|
\&\-mtune=\fR\fIcpu-type\fR
|
798 |
|
|
\&\fB\-mreturn\-pointer\-on\-d0
|
799 |
|
|
\&\-mno\-crt0 \-mrelax \-mliw \-msetlb\fR
|
800 |
|
|
.Sp
|
801 |
|
|
\&\fIMoxie Options\fR
|
802 |
|
|
\&\fB\-meb \-mel \-mno\-crt0\fR
|
803 |
|
|
.Sp
|
804 |
|
|
\&\fI\s-1PDP\-11\s0 Options\fR
|
805 |
|
|
\&\fB\-mfpu \-msoft\-float \-mac0 \-mno\-ac0 \-m40 \-m45 \-m10
|
806 |
|
|
\&\-mbcopy \-mbcopy\-builtin \-mint32 \-mno\-int16
|
807 |
|
|
\&\-mint16 \-mno\-int32 \-mfloat32 \-mno\-float64
|
808 |
|
|
\&\-mfloat64 \-mno\-float32 \-mabshi \-mno\-abshi
|
809 |
|
|
\&\-mbranch\-expensive \-mbranch\-cheap
|
810 |
|
|
\&\-munix\-asm \-mdec\-asm\fR
|
811 |
|
|
.Sp
|
812 |
|
|
\&\fIpicoChip Options\fR
|
813 |
|
|
\&\fB\-mae=\fR\fIae_type\fR \fB\-mvliw\-lookahead=\fR\fIN\fR
|
814 |
|
|
\&\fB\-msymbol\-as\-address \-mno\-inefficient\-warnings\fR
|
815 |
|
|
.Sp
|
816 |
|
|
\&\fIPowerPC Options\fR
|
817 |
|
|
See \s-1RS/6000\s0 and PowerPC Options.
|
818 |
|
|
.Sp
|
819 |
|
|
\&\fI\s-1RL78\s0 Options\fR
|
820 |
|
|
\&\fB\-msim \-mmul=none \-mmul=g13 \-mmul=rl78\fR
|
821 |
|
|
.Sp
|
822 |
|
|
\&\fI\s-1RS/6000\s0 and PowerPC Options\fR
|
823 |
|
|
\&\fB\-mcpu=\fR\fIcpu-type\fR
|
824 |
|
|
\&\fB\-mtune=\fR\fIcpu-type\fR
|
825 |
|
|
\&\fB\-mcmodel=\fR\fIcode-model\fR
|
826 |
|
|
\&\fB\-mpowerpc64
|
827 |
|
|
\&\-maltivec \-mno\-altivec
|
828 |
|
|
\&\-mpowerpc\-gpopt \-mno\-powerpc\-gpopt
|
829 |
|
|
\&\-mpowerpc\-gfxopt \-mno\-powerpc\-gfxopt
|
830 |
|
|
\&\-mmfcrf \-mno\-mfcrf \-mpopcntb \-mno\-popcntb \-mpopcntd \-mno\-popcntd
|
831 |
|
|
\&\-mfprnd \-mno\-fprnd
|
832 |
|
|
\&\-mcmpb \-mno\-cmpb \-mmfpgpr \-mno\-mfpgpr \-mhard\-dfp \-mno\-hard\-dfp
|
833 |
|
|
\&\-mfull\-toc \-mminimal\-toc \-mno\-fp\-in\-toc \-mno\-sum\-in\-toc
|
834 |
|
|
\&\-m64 \-m32 \-mxl\-compat \-mno\-xl\-compat \-mpe
|
835 |
|
|
\&\-malign\-power \-malign\-natural
|
836 |
|
|
\&\-msoft\-float \-mhard\-float \-mmultiple \-mno\-multiple
|
837 |
|
|
\&\-msingle\-float \-mdouble\-float \-msimple\-fpu
|
838 |
|
|
\&\-mstring \-mno\-string \-mupdate \-mno\-update
|
839 |
|
|
\&\-mavoid\-indexed\-addresses \-mno\-avoid\-indexed\-addresses
|
840 |
|
|
\&\-mfused\-madd \-mno\-fused\-madd \-mbit\-align \-mno\-bit\-align
|
841 |
|
|
\&\-mstrict\-align \-mno\-strict\-align \-mrelocatable
|
842 |
|
|
\&\-mno\-relocatable \-mrelocatable\-lib \-mno\-relocatable\-lib
|
843 |
|
|
\&\-mtoc \-mno\-toc \-mlittle \-mlittle\-endian \-mbig \-mbig\-endian
|
844 |
|
|
\&\-mdynamic\-no\-pic \-maltivec \-mswdiv \-msingle\-pic\-base
|
845 |
|
|
\&\-mprioritize\-restricted\-insns=\fR\fIpriority\fR
|
846 |
|
|
\&\fB\-msched\-costly\-dep=\fR\fIdependence_type\fR
|
847 |
|
|
\&\fB\-minsert\-sched\-nops=\fR\fIscheme\fR
|
848 |
|
|
\&\fB\-mcall\-sysv \-mcall\-netbsd
|
849 |
|
|
\&\-maix\-struct\-return \-msvr4\-struct\-return
|
850 |
|
|
\&\-mabi=\fR\fIabi-type\fR \fB\-msecure\-plt \-mbss\-plt
|
851 |
|
|
\&\-mblock\-move\-inline\-limit=\fR\fInum\fR
|
852 |
|
|
\&\fB\-misel \-mno\-isel
|
853 |
|
|
\&\-misel=yes \-misel=no
|
854 |
|
|
\&\-mspe \-mno\-spe
|
855 |
|
|
\&\-mspe=yes \-mspe=no
|
856 |
|
|
\&\-mpaired
|
857 |
|
|
\&\-mgen\-cell\-microcode \-mwarn\-cell\-microcode
|
858 |
|
|
\&\-mvrsave \-mno\-vrsave
|
859 |
|
|
\&\-mmulhw \-mno\-mulhw
|
860 |
|
|
\&\-mdlmzb \-mno\-dlmzb
|
861 |
|
|
\&\-mfloat\-gprs=yes \-mfloat\-gprs=no \-mfloat\-gprs=single \-mfloat\-gprs=double
|
862 |
|
|
\&\-mprototype \-mno\-prototype
|
863 |
|
|
\&\-msim \-mmvme \-mads \-myellowknife \-memb \-msdata
|
864 |
|
|
\&\-msdata=\fR\fIopt\fR \fB\-mvxworks \-G\fR \fInum\fR \fB\-pthread
|
865 |
|
|
\&\-mrecip \-mrecip=\fR\fIopt\fR \fB\-mno\-recip \-mrecip\-precision
|
866 |
|
|
\&\-mno\-recip\-precision
|
867 |
|
|
\&\-mveclibabi=\fR\fItype\fR \fB\-mfriz \-mno\-friz
|
868 |
|
|
\&\-mpointers\-to\-nested\-functions \-mno\-pointers\-to\-nested\-functions
|
869 |
|
|
\&\-msave\-toc\-indirect \-mno\-save\-toc\-indirect\fR
|
870 |
|
|
.Sp
|
871 |
|
|
\&\fI\s-1RX\s0 Options\fR
|
872 |
|
|
\&\fB\-m64bit\-doubles \-m32bit\-doubles \-fpu \-nofpu
|
873 |
|
|
\&\-mcpu=
|
874 |
|
|
\&\-mbig\-endian\-data \-mlittle\-endian\-data
|
875 |
|
|
\&\-msmall\-data
|
876 |
|
|
\&\-msim \-mno\-sim
|
877 |
|
|
\&\-mas100\-syntax \-mno\-as100\-syntax
|
878 |
|
|
\&\-mrelax
|
879 |
|
|
\&\-mmax\-constant\-size=
|
880 |
|
|
\&\-mint\-register=
|
881 |
|
|
\&\-mpid
|
882 |
|
|
\&\-mno\-warn\-multiple\-fast\-interrupts
|
883 |
|
|
\&\-msave\-acc\-in\-interrupts\fR
|
884 |
|
|
.Sp
|
885 |
|
|
\&\fIS/390 and zSeries Options\fR
|
886 |
|
|
\&\fB\-mtune=\fR\fIcpu-type\fR \fB\-march=\fR\fIcpu-type\fR
|
887 |
|
|
\&\fB\-mhard\-float \-msoft\-float \-mhard\-dfp \-mno\-hard\-dfp
|
888 |
|
|
\&\-mlong\-double\-64 \-mlong\-double\-128
|
889 |
|
|
\&\-mbackchain \-mno\-backchain \-mpacked\-stack \-mno\-packed\-stack
|
890 |
|
|
\&\-msmall\-exec \-mno\-small\-exec \-mmvcle \-mno\-mvcle
|
891 |
|
|
\&\-m64 \-m31 \-mdebug \-mno\-debug \-mesa \-mzarch
|
892 |
|
|
\&\-mtpf\-trace \-mno\-tpf\-trace \-mfused\-madd \-mno\-fused\-madd
|
893 |
|
|
\&\-mwarn\-framesize \-mwarn\-dynamicstack \-mstack\-size \-mstack\-guard\fR
|
894 |
|
|
.Sp
|
895 |
|
|
\&\fIScore Options\fR
|
896 |
|
|
\&\fB\-meb \-mel
|
897 |
|
|
\&\-mnhwloop
|
898 |
|
|
\&\-muls
|
899 |
|
|
\&\-mmac
|
900 |
|
|
\&\-mscore5 \-mscore5u \-mscore7 \-mscore7d\fR
|
901 |
|
|
.Sp
|
902 |
|
|
\&\fI\s-1SH\s0 Options\fR
|
903 |
|
|
\&\fB\-m1 \-m2 \-m2e
|
904 |
|
|
\&\-m2a\-nofpu \-m2a\-single\-only \-m2a\-single \-m2a
|
905 |
|
|
\&\-m3 \-m3e
|
906 |
|
|
\&\-m4\-nofpu \-m4\-single\-only \-m4\-single \-m4
|
907 |
|
|
\&\-m4a\-nofpu \-m4a\-single\-only \-m4a\-single \-m4a \-m4al
|
908 |
|
|
\&\-m5\-64media \-m5\-64media\-nofpu
|
909 |
|
|
\&\-m5\-32media \-m5\-32media\-nofpu
|
910 |
|
|
\&\-m5\-compact \-m5\-compact\-nofpu
|
911 |
|
|
\&\-mb \-ml \-mdalign \-mrelax
|
912 |
|
|
\&\-mbigtable \-mfmovd \-mhitachi \-mrenesas \-mno\-renesas \-mnomacsave
|
913 |
|
|
\&\-mieee \-mno\-ieee \-mbitops \-misize \-minline\-ic_invalidate \-mpadstruct
|
914 |
|
|
\&\-mspace \-mprefergot \-musermode \-multcost=\fR\fInumber\fR \fB\-mdiv=\fR\fIstrategy\fR
|
915 |
|
|
\&\fB\-mdivsi3_libfunc=\fR\fIname\fR \fB\-mfixed\-range=\fR\fIregister-range\fR
|
916 |
|
|
\&\fB\-mindexed\-addressing \-mgettrcost=\fR\fInumber\fR \fB\-mpt\-fixed
|
917 |
|
|
\&\-maccumulate\-outgoing\-args \-minvalid\-symbols
|
918 |
|
|
\&\-matomic\-model=\fR\fIatomic-model\fR
|
919 |
|
|
\&\fB\-mbranch\-cost=\fR\fInum\fR \fB\-mzdcbranch \-mno\-zdcbranch \-mcbranchdi \-mcmpeqdi
|
920 |
|
|
\&\-mfused\-madd \-mno\-fused\-madd \-mfsca \-mno\-fsca \-mfsrra \-mno\-fsrra
|
921 |
|
|
\&\-mpretend\-cmove \-mtas\fR
|
922 |
|
|
.Sp
|
923 |
|
|
\&\fISolaris 2 Options\fR
|
924 |
|
|
\&\fB\-mimpure\-text \-mno\-impure\-text
|
925 |
|
|
\&\-pthreads \-pthread\fR
|
926 |
|
|
.Sp
|
927 |
|
|
\&\fI\s-1SPARC\s0 Options\fR
|
928 |
|
|
\&\fB\-mcpu=\fR\fIcpu-type\fR
|
929 |
|
|
\&\fB\-mtune=\fR\fIcpu-type\fR
|
930 |
|
|
\&\fB\-mcmodel=\fR\fIcode-model\fR
|
931 |
|
|
\&\fB\-mmemory\-model=\fR\fImem-model\fR
|
932 |
|
|
\&\fB\-m32 \-m64 \-mapp\-regs \-mno\-app\-regs
|
933 |
|
|
\&\-mfaster\-structs \-mno\-faster\-structs \-mflat \-mno\-flat
|
934 |
|
|
\&\-mfpu \-mno\-fpu \-mhard\-float \-msoft\-float
|
935 |
|
|
\&\-mhard\-quad\-float \-msoft\-quad\-float
|
936 |
|
|
\&\-mlittle\-endian
|
937 |
|
|
\&\-mstack\-bias \-mno\-stack\-bias
|
938 |
|
|
\&\-munaligned\-doubles \-mno\-unaligned\-doubles
|
939 |
|
|
\&\-mv8plus \-mno\-v8plus \-mvis \-mno\-vis
|
940 |
|
|
\&\-mvis2 \-mno\-vis2 \-mvis3 \-mno\-vis3
|
941 |
|
|
\&\-mcbcond \-mno\-cbcond
|
942 |
|
|
\&\-mfmaf \-mno\-fmaf \-mpopc \-mno\-popc
|
943 |
|
|
\&\-mfix\-at697f\fR
|
944 |
|
|
.Sp
|
945 |
|
|
\&\fI\s-1SPU\s0 Options\fR
|
946 |
|
|
\&\fB\-mwarn\-reloc \-merror\-reloc
|
947 |
|
|
\&\-msafe\-dma \-munsafe\-dma
|
948 |
|
|
\&\-mbranch\-hints
|
949 |
|
|
\&\-msmall\-mem \-mlarge\-mem \-mstdmain
|
950 |
|
|
\&\-mfixed\-range=\fR\fIregister-range\fR
|
951 |
|
|
\&\fB\-mea32 \-mea64
|
952 |
|
|
\&\-maddress\-space\-conversion \-mno\-address\-space\-conversion
|
953 |
|
|
\&\-mcache\-size=\fR\fIcache-size\fR
|
954 |
|
|
\&\fB\-matomic\-updates \-mno\-atomic\-updates\fR
|
955 |
|
|
.Sp
|
956 |
|
|
\&\fISystem V Options\fR
|
957 |
|
|
\&\fB\-Qy \-Qn \-YP,\fR\fIpaths\fR \fB\-Ym,\fR\fIdir\fR
|
958 |
|
|
.Sp
|
959 |
|
|
\&\fITILE-Gx Options\fR
|
960 |
|
|
\&\fB\-mcpu=\fR\fIcpu\fR \fB\-m32 \-m64 \-mcmodel=\fR\fIcode-model\fR
|
961 |
|
|
.Sp
|
962 |
|
|
\&\fITILEPro Options\fR
|
963 |
|
|
\&\fB\-mcpu=\fR\fIcpu\fR \fB\-m32\fR
|
964 |
|
|
.Sp
|
965 |
|
|
\&\fIV850 Options\fR
|
966 |
|
|
\&\fB\-mlong\-calls \-mno\-long\-calls \-mep \-mno\-ep
|
967 |
|
|
\&\-mprolog\-function \-mno\-prolog\-function \-mspace
|
968 |
|
|
\&\-mtda=\fR\fIn\fR \fB\-msda=\fR\fIn\fR \fB\-mzda=\fR\fIn\fR
|
969 |
|
|
\&\fB\-mapp\-regs \-mno\-app\-regs
|
970 |
|
|
\&\-mdisable\-callt \-mno\-disable\-callt
|
971 |
|
|
\&\-mv850e2v3
|
972 |
|
|
\&\-mv850e2
|
973 |
|
|
\&\-mv850e1 \-mv850es
|
974 |
|
|
\&\-mv850e
|
975 |
|
|
\&\-mv850 \-mbig\-switch\fR
|
976 |
|
|
.Sp
|
977 |
|
|
\&\fI\s-1VAX\s0 Options\fR
|
978 |
|
|
\&\fB\-mg \-mgnu \-munix\fR
|
979 |
|
|
.Sp
|
980 |
|
|
\&\fI\s-1VMS\s0 Options\fR
|
981 |
|
|
\&\fB\-mvms\-return\-codes \-mdebug\-main=\fR\fIprefix\fR \fB\-mmalloc64
|
982 |
|
|
\&\-mpointer\-size=\fR\fIsize\fR
|
983 |
|
|
.Sp
|
984 |
|
|
\&\fIVxWorks Options\fR
|
985 |
|
|
\&\fB\-mrtp \-non\-static \-Bstatic \-Bdynamic
|
986 |
|
|
\&\-Xbind\-lazy \-Xbind\-now\fR
|
987 |
|
|
.Sp
|
988 |
|
|
\&\fIx86\-64 Options\fR
|
989 |
|
|
See i386 and x86\-64 Options.
|
990 |
|
|
.Sp
|
991 |
|
|
\&\fIXstormy16 Options\fR
|
992 |
|
|
\&\fB\-msim\fR
|
993 |
|
|
.Sp
|
994 |
|
|
\&\fIXtensa Options\fR
|
995 |
|
|
\&\fB\-mconst16 \-mno\-const16
|
996 |
|
|
\&\-mfused\-madd \-mno\-fused\-madd
|
997 |
|
|
\&\-mforce\-no\-pic
|
998 |
|
|
\&\-mserialize\-volatile \-mno\-serialize\-volatile
|
999 |
|
|
\&\-mtext\-section\-literals \-mno\-text\-section\-literals
|
1000 |
|
|
\&\-mtarget\-align \-mno\-target\-align
|
1001 |
|
|
\&\-mlongcalls \-mno\-longcalls\fR
|
1002 |
|
|
.Sp
|
1003 |
|
|
\&\fIzSeries Options\fR
|
1004 |
|
|
See S/390 and zSeries Options.
|
1005 |
|
|
.IP "\fICode Generation Options\fR" 4
|
1006 |
|
|
.IX Item "Code Generation Options"
|
1007 |
|
|
\&\fB\-fcall\-saved\-\fR\fIreg\fR \fB\-fcall\-used\-\fR\fIreg\fR
|
1008 |
|
|
\&\fB\-ffixed\-\fR\fIreg\fR \fB\-fexceptions
|
1009 |
|
|
\&\-fnon\-call\-exceptions \-fdelete\-dead\-exceptions \-funwind\-tables
|
1010 |
|
|
\&\-fasynchronous\-unwind\-tables
|
1011 |
|
|
\&\-finhibit\-size\-directive \-finstrument\-functions
|
1012 |
|
|
\&\-finstrument\-functions\-exclude\-function\-list=\fR\fIsym\fR\fB,\fR\fIsym\fR\fB,...
|
1013 |
|
|
\&\-finstrument\-functions\-exclude\-file\-list=\fR\fIfile\fR\fB,\fR\fIfile\fR\fB,...
|
1014 |
|
|
\&\-fno\-common \-fno\-ident
|
1015 |
|
|
\&\-fpcc\-struct\-return \-fpic \-fPIC \-fpie \-fPIE
|
1016 |
|
|
\&\-fno\-jump\-tables
|
1017 |
|
|
\&\-frecord\-gcc\-switches
|
1018 |
|
|
\&\-freg\-struct\-return \-fshort\-enums
|
1019 |
|
|
\&\-fshort\-double \-fshort\-wchar
|
1020 |
|
|
\&\-fverbose\-asm \-fpack\-struct[=\fR\fIn\fR\fB] \-fstack\-check
|
1021 |
|
|
\&\-fstack\-limit\-register=\fR\fIreg\fR \fB\-fstack\-limit\-symbol=\fR\fIsym\fR
|
1022 |
|
|
\&\fB\-fno\-stack\-limit \-fsplit\-stack
|
1023 |
|
|
\&\-fleading\-underscore \-ftls\-model=\fR\fImodel\fR
|
1024 |
|
|
\&\fB\-fstack\-reuse=\fR\fIreuse_level\fR
|
1025 |
|
|
\&\fB\-ftrapv \-fwrapv \-fbounds\-check
|
1026 |
|
|
\&\-fvisibility \-fstrict\-volatile\-bitfields \-fsync\-libcalls\fR
|
1027 |
|
|
.SS "Options Controlling the Kind of Output"
|
1028 |
|
|
.IX Subsection "Options Controlling the Kind of Output"
|
1029 |
|
|
Compilation can involve up to four stages: preprocessing, compilation
|
1030 |
|
|
proper, assembly and linking, always in that order. \s-1GCC\s0 is capable of
|
1031 |
|
|
preprocessing and compiling several files either into several
|
1032 |
|
|
assembler input files, or into one assembler input file; then each
|
1033 |
|
|
assembler input file produces an object file, and linking combines all
|
1034 |
|
|
the object files (those newly compiled, and those specified as input)
|
1035 |
|
|
into an executable file.
|
1036 |
|
|
.PP
|
1037 |
|
|
For any given input file, the file name suffix determines what kind of
|
1038 |
|
|
compilation is done:
|
1039 |
|
|
.IP "\fIfile\fR\fB.c\fR" 4
|
1040 |
|
|
.IX Item "file.c"
|
1041 |
|
|
C source code that must be preprocessed.
|
1042 |
|
|
.IP "\fIfile\fR\fB.i\fR" 4
|
1043 |
|
|
.IX Item "file.i"
|
1044 |
|
|
C source code that should not be preprocessed.
|
1045 |
|
|
.IP "\fIfile\fR\fB.ii\fR" 4
|
1046 |
|
|
.IX Item "file.ii"
|
1047 |
|
|
\&\*(C+ source code that should not be preprocessed.
|
1048 |
|
|
.IP "\fIfile\fR\fB.m\fR" 4
|
1049 |
|
|
.IX Item "file.m"
|
1050 |
|
|
Objective-C source code. Note that you must link with the \fIlibobjc\fR
|
1051 |
|
|
library to make an Objective-C program work.
|
1052 |
|
|
.IP "\fIfile\fR\fB.mi\fR" 4
|
1053 |
|
|
.IX Item "file.mi"
|
1054 |
|
|
Objective-C source code that should not be preprocessed.
|
1055 |
|
|
.IP "\fIfile\fR\fB.mm\fR" 4
|
1056 |
|
|
.IX Item "file.mm"
|
1057 |
|
|
.PD 0
|
1058 |
|
|
.IP "\fIfile\fR\fB.M\fR" 4
|
1059 |
|
|
.IX Item "file.M"
|
1060 |
|
|
.PD
|
1061 |
|
|
Objective\-\*(C+ source code. Note that you must link with the \fIlibobjc\fR
|
1062 |
|
|
library to make an Objective\-\*(C+ program work. Note that \fB.M\fR refers
|
1063 |
|
|
to a literal capital M.
|
1064 |
|
|
.IP "\fIfile\fR\fB.mii\fR" 4
|
1065 |
|
|
.IX Item "file.mii"
|
1066 |
|
|
Objective\-\*(C+ source code that should not be preprocessed.
|
1067 |
|
|
.IP "\fIfile\fR\fB.h\fR" 4
|
1068 |
|
|
.IX Item "file.h"
|
1069 |
|
|
C, \*(C+, Objective-C or Objective\-\*(C+ header file to be turned into a
|
1070 |
|
|
precompiled header (default), or C, \*(C+ header file to be turned into an
|
1071 |
|
|
Ada spec (via the \fB\-fdump\-ada\-spec\fR switch).
|
1072 |
|
|
.IP "\fIfile\fR\fB.cc\fR" 4
|
1073 |
|
|
.IX Item "file.cc"
|
1074 |
|
|
.PD 0
|
1075 |
|
|
.IP "\fIfile\fR\fB.cp\fR" 4
|
1076 |
|
|
.IX Item "file.cp"
|
1077 |
|
|
.IP "\fIfile\fR\fB.cxx\fR" 4
|
1078 |
|
|
.IX Item "file.cxx"
|
1079 |
|
|
.IP "\fIfile\fR\fB.cpp\fR" 4
|
1080 |
|
|
.IX Item "file.cpp"
|
1081 |
|
|
.IP "\fIfile\fR\fB.CPP\fR" 4
|
1082 |
|
|
.IX Item "file.CPP"
|
1083 |
|
|
.IP "\fIfile\fR\fB.c++\fR" 4
|
1084 |
|
|
.IX Item "file.c++"
|
1085 |
|
|
.IP "\fIfile\fR\fB.C\fR" 4
|
1086 |
|
|
.IX Item "file.C"
|
1087 |
|
|
.PD
|
1088 |
|
|
\&\*(C+ source code that must be preprocessed. Note that in \fB.cxx\fR,
|
1089 |
|
|
the last two letters must both be literally \fBx\fR. Likewise,
|
1090 |
|
|
\&\fB.C\fR refers to a literal capital C.
|
1091 |
|
|
.IP "\fIfile\fR\fB.mm\fR" 4
|
1092 |
|
|
.IX Item "file.mm"
|
1093 |
|
|
.PD 0
|
1094 |
|
|
.IP "\fIfile\fR\fB.M\fR" 4
|
1095 |
|
|
.IX Item "file.M"
|
1096 |
|
|
.PD
|
1097 |
|
|
Objective\-\*(C+ source code that must be preprocessed.
|
1098 |
|
|
.IP "\fIfile\fR\fB.mii\fR" 4
|
1099 |
|
|
.IX Item "file.mii"
|
1100 |
|
|
Objective\-\*(C+ source code that should not be preprocessed.
|
1101 |
|
|
.IP "\fIfile\fR\fB.hh\fR" 4
|
1102 |
|
|
.IX Item "file.hh"
|
1103 |
|
|
.PD 0
|
1104 |
|
|
.IP "\fIfile\fR\fB.H\fR" 4
|
1105 |
|
|
.IX Item "file.H"
|
1106 |
|
|
.IP "\fIfile\fR\fB.hp\fR" 4
|
1107 |
|
|
.IX Item "file.hp"
|
1108 |
|
|
.IP "\fIfile\fR\fB.hxx\fR" 4
|
1109 |
|
|
.IX Item "file.hxx"
|
1110 |
|
|
.IP "\fIfile\fR\fB.hpp\fR" 4
|
1111 |
|
|
.IX Item "file.hpp"
|
1112 |
|
|
.IP "\fIfile\fR\fB.HPP\fR" 4
|
1113 |
|
|
.IX Item "file.HPP"
|
1114 |
|
|
.IP "\fIfile\fR\fB.h++\fR" 4
|
1115 |
|
|
.IX Item "file.h++"
|
1116 |
|
|
.IP "\fIfile\fR\fB.tcc\fR" 4
|
1117 |
|
|
.IX Item "file.tcc"
|
1118 |
|
|
.PD
|
1119 |
|
|
\&\*(C+ header file to be turned into a precompiled header or Ada spec.
|
1120 |
|
|
.IP "\fIfile\fR\fB.f\fR" 4
|
1121 |
|
|
.IX Item "file.f"
|
1122 |
|
|
.PD 0
|
1123 |
|
|
.IP "\fIfile\fR\fB.for\fR" 4
|
1124 |
|
|
.IX Item "file.for"
|
1125 |
|
|
.IP "\fIfile\fR\fB.ftn\fR" 4
|
1126 |
|
|
.IX Item "file.ftn"
|
1127 |
|
|
.PD
|
1128 |
|
|
Fixed form Fortran source code that should not be preprocessed.
|
1129 |
|
|
.IP "\fIfile\fR\fB.F\fR" 4
|
1130 |
|
|
.IX Item "file.F"
|
1131 |
|
|
.PD 0
|
1132 |
|
|
.IP "\fIfile\fR\fB.FOR\fR" 4
|
1133 |
|
|
.IX Item "file.FOR"
|
1134 |
|
|
.IP "\fIfile\fR\fB.fpp\fR" 4
|
1135 |
|
|
.IX Item "file.fpp"
|
1136 |
|
|
.IP "\fIfile\fR\fB.FPP\fR" 4
|
1137 |
|
|
.IX Item "file.FPP"
|
1138 |
|
|
.IP "\fIfile\fR\fB.FTN\fR" 4
|
1139 |
|
|
.IX Item "file.FTN"
|
1140 |
|
|
.PD
|
1141 |
|
|
Fixed form Fortran source code that must be preprocessed (with the traditional
|
1142 |
|
|
preprocessor).
|
1143 |
|
|
.IP "\fIfile\fR\fB.f90\fR" 4
|
1144 |
|
|
.IX Item "file.f90"
|
1145 |
|
|
.PD 0
|
1146 |
|
|
.IP "\fIfile\fR\fB.f95\fR" 4
|
1147 |
|
|
.IX Item "file.f95"
|
1148 |
|
|
.IP "\fIfile\fR\fB.f03\fR" 4
|
1149 |
|
|
.IX Item "file.f03"
|
1150 |
|
|
.IP "\fIfile\fR\fB.f08\fR" 4
|
1151 |
|
|
.IX Item "file.f08"
|
1152 |
|
|
.PD
|
1153 |
|
|
Free form Fortran source code that should not be preprocessed.
|
1154 |
|
|
.IP "\fIfile\fR\fB.F90\fR" 4
|
1155 |
|
|
.IX Item "file.F90"
|
1156 |
|
|
.PD 0
|
1157 |
|
|
.IP "\fIfile\fR\fB.F95\fR" 4
|
1158 |
|
|
.IX Item "file.F95"
|
1159 |
|
|
.IP "\fIfile\fR\fB.F03\fR" 4
|
1160 |
|
|
.IX Item "file.F03"
|
1161 |
|
|
.IP "\fIfile\fR\fB.F08\fR" 4
|
1162 |
|
|
.IX Item "file.F08"
|
1163 |
|
|
.PD
|
1164 |
|
|
Free form Fortran source code that must be preprocessed (with the
|
1165 |
|
|
traditional preprocessor).
|
1166 |
|
|
.IP "\fIfile\fR\fB.go\fR" 4
|
1167 |
|
|
.IX Item "file.go"
|
1168 |
|
|
Go source code.
|
1169 |
|
|
.IP "\fIfile\fR\fB.ads\fR" 4
|
1170 |
|
|
.IX Item "file.ads"
|
1171 |
|
|
Ada source code file that contains a library unit declaration (a
|
1172 |
|
|
declaration of a package, subprogram, or generic, or a generic
|
1173 |
|
|
instantiation), or a library unit renaming declaration (a package,
|
1174 |
|
|
generic, or subprogram renaming declaration). Such files are also
|
1175 |
|
|
called \fIspecs\fR.
|
1176 |
|
|
.IP "\fIfile\fR\fB.adb\fR" 4
|
1177 |
|
|
.IX Item "file.adb"
|
1178 |
|
|
Ada source code file containing a library unit body (a subprogram or
|
1179 |
|
|
package body). Such files are also called \fIbodies\fR.
|
1180 |
|
|
.IP "\fIfile\fR\fB.s\fR" 4
|
1181 |
|
|
.IX Item "file.s"
|
1182 |
|
|
Assembler code.
|
1183 |
|
|
.IP "\fIfile\fR\fB.S\fR" 4
|
1184 |
|
|
.IX Item "file.S"
|
1185 |
|
|
.PD 0
|
1186 |
|
|
.IP "\fIfile\fR\fB.sx\fR" 4
|
1187 |
|
|
.IX Item "file.sx"
|
1188 |
|
|
.PD
|
1189 |
|
|
Assembler code that must be preprocessed.
|
1190 |
|
|
.IP "\fIother\fR" 4
|
1191 |
|
|
.IX Item "other"
|
1192 |
|
|
An object file to be fed straight into linking.
|
1193 |
|
|
Any file name with no recognized suffix is treated this way.
|
1194 |
|
|
.PP
|
1195 |
|
|
You can specify the input language explicitly with the \fB\-x\fR option:
|
1196 |
|
|
.IP "\fB\-x\fR \fIlanguage\fR" 4
|
1197 |
|
|
.IX Item "-x language"
|
1198 |
|
|
Specify explicitly the \fIlanguage\fR for the following input files
|
1199 |
|
|
(rather than letting the compiler choose a default based on the file
|
1200 |
|
|
name suffix). This option applies to all following input files until
|
1201 |
|
|
the next \fB\-x\fR option. Possible values for \fIlanguage\fR are:
|
1202 |
|
|
.Sp
|
1203 |
|
|
.Vb 9
|
1204 |
|
|
\& c c\-header cpp\-output
|
1205 |
|
|
\& c++ c++\-header c++\-cpp\-output
|
1206 |
|
|
\& objective\-c objective\-c\-header objective\-c\-cpp\-output
|
1207 |
|
|
\& objective\-c++ objective\-c++\-header objective\-c++\-cpp\-output
|
1208 |
|
|
\& assembler assembler\-with\-cpp
|
1209 |
|
|
\& ada
|
1210 |
|
|
\& f77 f77\-cpp\-input f95 f95\-cpp\-input
|
1211 |
|
|
\& go
|
1212 |
|
|
\& java
|
1213 |
|
|
.Ve
|
1214 |
|
|
.IP "\fB\-x none\fR" 4
|
1215 |
|
|
.IX Item "-x none"
|
1216 |
|
|
Turn off any specification of a language, so that subsequent files are
|
1217 |
|
|
handled according to their file name suffixes (as they are if \fB\-x\fR
|
1218 |
|
|
has not been used at all).
|
1219 |
|
|
.IP "\fB\-pass\-exit\-codes\fR" 4
|
1220 |
|
|
.IX Item "-pass-exit-codes"
|
1221 |
|
|
Normally the \fBgcc\fR program exits with the code of 1 if any
|
1222 |
|
|
phase of the compiler returns a non-success return code. If you specify
|
1223 |
|
|
\&\fB\-pass\-exit\-codes\fR, the \fBgcc\fR program instead returns with
|
1224 |
|
|
the numerically highest error produced by any phase returning an error
|
1225 |
|
|
indication. The C, \*(C+, and Fortran front ends return 4 if an internal
|
1226 |
|
|
compiler error is encountered.
|
1227 |
|
|
.PP
|
1228 |
|
|
If you only want some of the stages of compilation, you can use
|
1229 |
|
|
\&\fB\-x\fR (or filename suffixes) to tell \fBgcc\fR where to start, and
|
1230 |
|
|
one of the options \fB\-c\fR, \fB\-S\fR, or \fB\-E\fR to say where
|
1231 |
|
|
\&\fBgcc\fR is to stop. Note that some combinations (for example,
|
1232 |
|
|
\&\fB\-x cpp-output \-E\fR) instruct \fBgcc\fR to do nothing at all.
|
1233 |
|
|
.IP "\fB\-c\fR" 4
|
1234 |
|
|
.IX Item "-c"
|
1235 |
|
|
Compile or assemble the source files, but do not link. The linking
|
1236 |
|
|
stage simply is not done. The ultimate output is in the form of an
|
1237 |
|
|
object file for each source file.
|
1238 |
|
|
.Sp
|
1239 |
|
|
By default, the object file name for a source file is made by replacing
|
1240 |
|
|
the suffix \fB.c\fR, \fB.i\fR, \fB.s\fR, etc., with \fB.o\fR.
|
1241 |
|
|
.Sp
|
1242 |
|
|
Unrecognized input files, not requiring compilation or assembly, are
|
1243 |
|
|
ignored.
|
1244 |
|
|
.IP "\fB\-S\fR" 4
|
1245 |
|
|
.IX Item "-S"
|
1246 |
|
|
Stop after the stage of compilation proper; do not assemble. The output
|
1247 |
|
|
is in the form of an assembler code file for each non-assembler input
|
1248 |
|
|
file specified.
|
1249 |
|
|
.Sp
|
1250 |
|
|
By default, the assembler file name for a source file is made by
|
1251 |
|
|
replacing the suffix \fB.c\fR, \fB.i\fR, etc., with \fB.s\fR.
|
1252 |
|
|
.Sp
|
1253 |
|
|
Input files that don't require compilation are ignored.
|
1254 |
|
|
.IP "\fB\-E\fR" 4
|
1255 |
|
|
.IX Item "-E"
|
1256 |
|
|
Stop after the preprocessing stage; do not run the compiler proper. The
|
1257 |
|
|
output is in the form of preprocessed source code, which is sent to the
|
1258 |
|
|
standard output.
|
1259 |
|
|
.Sp
|
1260 |
|
|
Input files that don't require preprocessing are ignored.
|
1261 |
|
|
.IP "\fB\-o\fR \fIfile\fR" 4
|
1262 |
|
|
.IX Item "-o file"
|
1263 |
|
|
Place output in file \fIfile\fR. This applies to whatever
|
1264 |
|
|
sort of output is being produced, whether it be an executable file,
|
1265 |
|
|
an object file, an assembler file or preprocessed C code.
|
1266 |
|
|
.Sp
|
1267 |
|
|
If \fB\-o\fR is not specified, the default is to put an executable
|
1268 |
|
|
file in \fIa.out\fR, the object file for
|
1269 |
|
|
\&\fI\fIsource\fI.\fIsuffix\fI\fR in \fI\fIsource\fI.o\fR, its
|
1270 |
|
|
assembler file in \fI\fIsource\fI.s\fR, a precompiled header file in
|
1271 |
|
|
\&\fI\fIsource\fI.\fIsuffix\fI.gch\fR, and all preprocessed C source on
|
1272 |
|
|
standard output.
|
1273 |
|
|
.IP "\fB\-v\fR" 4
|
1274 |
|
|
.IX Item "-v"
|
1275 |
|
|
Print (on standard error output) the commands executed to run the stages
|
1276 |
|
|
of compilation. Also print the version number of the compiler driver
|
1277 |
|
|
program and of the preprocessor and the compiler proper.
|
1278 |
|
|
.IP "\fB\-###\fR" 4
|
1279 |
|
|
.IX Item "-###"
|
1280 |
|
|
Like \fB\-v\fR except the commands are not executed and arguments
|
1281 |
|
|
are quoted unless they contain only alphanumeric characters or \f(CW\*(C`./\-_\*(C'\fR.
|
1282 |
|
|
This is useful for shell scripts to capture the driver-generated command lines.
|
1283 |
|
|
.IP "\fB\-pipe\fR" 4
|
1284 |
|
|
.IX Item "-pipe"
|
1285 |
|
|
Use pipes rather than temporary files for communication between the
|
1286 |
|
|
various stages of compilation. This fails to work on some systems where
|
1287 |
|
|
the assembler is unable to read from a pipe; but the \s-1GNU\s0 assembler has
|
1288 |
|
|
no trouble.
|
1289 |
|
|
.IP "\fB\-\-help\fR" 4
|
1290 |
|
|
.IX Item "--help"
|
1291 |
|
|
Print (on the standard output) a description of the command-line options
|
1292 |
|
|
understood by \fBgcc\fR. If the \fB\-v\fR option is also specified
|
1293 |
|
|
then \fB\-\-help\fR is also passed on to the various processes
|
1294 |
|
|
invoked by \fBgcc\fR, so that they can display the command-line options
|
1295 |
|
|
they accept. If the \fB\-Wextra\fR option has also been specified
|
1296 |
|
|
(prior to the \fB\-\-help\fR option), then command-line options that
|
1297 |
|
|
have no documentation associated with them are also displayed.
|
1298 |
|
|
.IP "\fB\-\-target\-help\fR" 4
|
1299 |
|
|
.IX Item "--target-help"
|
1300 |
|
|
Print (on the standard output) a description of target-specific command-line
|
1301 |
|
|
options for each tool. For some targets extra target-specific
|
1302 |
|
|
information may also be printed.
|
1303 |
|
|
.IP "\fB\-\-help={\fR\fIclass\fR|[\fB^\fR]\fIqualifier\fR\fB}\fR[\fB,...\fR]" 4
|
1304 |
|
|
.IX Item "--help={class|[^]qualifier}[,...]"
|
1305 |
|
|
Print (on the standard output) a description of the command-line
|
1306 |
|
|
options understood by the compiler that fit into all specified classes
|
1307 |
|
|
and qualifiers. These are the supported classes:
|
1308 |
|
|
.RS 4
|
1309 |
|
|
.IP "\fBoptimizers\fR" 4
|
1310 |
|
|
.IX Item "optimizers"
|
1311 |
|
|
Display all of the optimization options supported by the
|
1312 |
|
|
compiler.
|
1313 |
|
|
.IP "\fBwarnings\fR" 4
|
1314 |
|
|
.IX Item "warnings"
|
1315 |
|
|
Display all of the options controlling warning messages
|
1316 |
|
|
produced by the compiler.
|
1317 |
|
|
.IP "\fBtarget\fR" 4
|
1318 |
|
|
.IX Item "target"
|
1319 |
|
|
Display target-specific options. Unlike the
|
1320 |
|
|
\&\fB\-\-target\-help\fR option however, target-specific options of the
|
1321 |
|
|
linker and assembler are not displayed. This is because those
|
1322 |
|
|
tools do not currently support the extended \fB\-\-help=\fR syntax.
|
1323 |
|
|
.IP "\fBparams\fR" 4
|
1324 |
|
|
.IX Item "params"
|
1325 |
|
|
Display the values recognized by the \fB\-\-param\fR
|
1326 |
|
|
option.
|
1327 |
|
|
.IP "\fIlanguage\fR" 4
|
1328 |
|
|
.IX Item "language"
|
1329 |
|
|
Display the options supported for \fIlanguage\fR, where
|
1330 |
|
|
\&\fIlanguage\fR is the name of one of the languages supported in this
|
1331 |
|
|
version of \s-1GCC\s0.
|
1332 |
|
|
.IP "\fBcommon\fR" 4
|
1333 |
|
|
.IX Item "common"
|
1334 |
|
|
Display the options that are common to all languages.
|
1335 |
|
|
.RE
|
1336 |
|
|
.RS 4
|
1337 |
|
|
.Sp
|
1338 |
|
|
These are the supported qualifiers:
|
1339 |
|
|
.IP "\fBundocumented\fR" 4
|
1340 |
|
|
.IX Item "undocumented"
|
1341 |
|
|
Display only those options that are undocumented.
|
1342 |
|
|
.IP "\fBjoined\fR" 4
|
1343 |
|
|
.IX Item "joined"
|
1344 |
|
|
Display options taking an argument that appears after an equal
|
1345 |
|
|
sign in the same continuous piece of text, such as:
|
1346 |
|
|
\&\fB\-\-help=target\fR.
|
1347 |
|
|
.IP "\fBseparate\fR" 4
|
1348 |
|
|
.IX Item "separate"
|
1349 |
|
|
Display options taking an argument that appears as a separate word
|
1350 |
|
|
following the original option, such as: \fB\-o output-file\fR.
|
1351 |
|
|
.RE
|
1352 |
|
|
.RS 4
|
1353 |
|
|
.Sp
|
1354 |
|
|
Thus for example to display all the undocumented target-specific
|
1355 |
|
|
switches supported by the compiler, use:
|
1356 |
|
|
.Sp
|
1357 |
|
|
.Vb 1
|
1358 |
|
|
\& \-\-help=target,undocumented
|
1359 |
|
|
.Ve
|
1360 |
|
|
.Sp
|
1361 |
|
|
The sense of a qualifier can be inverted by prefixing it with the
|
1362 |
|
|
\&\fB^\fR character, so for example to display all binary warning
|
1363 |
|
|
options (i.e., ones that are either on or off and that do not take an
|
1364 |
|
|
argument) that have a description, use:
|
1365 |
|
|
.Sp
|
1366 |
|
|
.Vb 1
|
1367 |
|
|
\& \-\-help=warnings,^joined,^undocumented
|
1368 |
|
|
.Ve
|
1369 |
|
|
.Sp
|
1370 |
|
|
The argument to \fB\-\-help=\fR should not consist solely of inverted
|
1371 |
|
|
qualifiers.
|
1372 |
|
|
.Sp
|
1373 |
|
|
Combining several classes is possible, although this usually
|
1374 |
|
|
restricts the output so much that there is nothing to display. One
|
1375 |
|
|
case where it does work, however, is when one of the classes is
|
1376 |
|
|
\&\fItarget\fR. For example, to display all the target-specific
|
1377 |
|
|
optimization options, use:
|
1378 |
|
|
.Sp
|
1379 |
|
|
.Vb 1
|
1380 |
|
|
\& \-\-help=target,optimizers
|
1381 |
|
|
.Ve
|
1382 |
|
|
.Sp
|
1383 |
|
|
The \fB\-\-help=\fR option can be repeated on the command line. Each
|
1384 |
|
|
successive use displays its requested class of options, skipping
|
1385 |
|
|
those that have already been displayed.
|
1386 |
|
|
.Sp
|
1387 |
|
|
If the \fB\-Q\fR option appears on the command line before the
|
1388 |
|
|
\&\fB\-\-help=\fR option, then the descriptive text displayed by
|
1389 |
|
|
\&\fB\-\-help=\fR is changed. Instead of describing the displayed
|
1390 |
|
|
options, an indication is given as to whether the option is enabled,
|
1391 |
|
|
disabled or set to a specific value (assuming that the compiler
|
1392 |
|
|
knows this at the point where the \fB\-\-help=\fR option is used).
|
1393 |
|
|
.Sp
|
1394 |
|
|
Here is a truncated example from the \s-1ARM\s0 port of \fBgcc\fR:
|
1395 |
|
|
.Sp
|
1396 |
|
|
.Vb 5
|
1397 |
|
|
\& % gcc \-Q \-mabi=2 \-\-help=target \-c
|
1398 |
|
|
\& The following options are target specific:
|
1399 |
|
|
\& \-mabi= 2
|
1400 |
|
|
\& \-mabort\-on\-noreturn [disabled]
|
1401 |
|
|
\& \-mapcs [disabled]
|
1402 |
|
|
.Ve
|
1403 |
|
|
.Sp
|
1404 |
|
|
The output is sensitive to the effects of previous command-line
|
1405 |
|
|
options, so for example it is possible to find out which optimizations
|
1406 |
|
|
are enabled at \fB\-O2\fR by using:
|
1407 |
|
|
.Sp
|
1408 |
|
|
.Vb 1
|
1409 |
|
|
\& \-Q \-O2 \-\-help=optimizers
|
1410 |
|
|
.Ve
|
1411 |
|
|
.Sp
|
1412 |
|
|
Alternatively you can discover which binary optimizations are enabled
|
1413 |
|
|
by \fB\-O3\fR by using:
|
1414 |
|
|
.Sp
|
1415 |
|
|
.Vb 3
|
1416 |
|
|
\& gcc \-c \-Q \-O3 \-\-help=optimizers > /tmp/O3\-opts
|
1417 |
|
|
\& gcc \-c \-Q \-O2 \-\-help=optimizers > /tmp/O2\-opts
|
1418 |
|
|
\& diff /tmp/O2\-opts /tmp/O3\-opts | grep enabled
|
1419 |
|
|
.Ve
|
1420 |
|
|
.RE
|
1421 |
|
|
.IP "\fB\-no\-canonical\-prefixes\fR" 4
|
1422 |
|
|
.IX Item "-no-canonical-prefixes"
|
1423 |
|
|
Do not expand any symbolic links, resolve references to \fB/../\fR
|
1424 |
|
|
or \fB/./\fR, or make the path absolute when generating a relative
|
1425 |
|
|
prefix.
|
1426 |
|
|
.IP "\fB\-\-version\fR" 4
|
1427 |
|
|
.IX Item "--version"
|
1428 |
|
|
Display the version number and copyrights of the invoked \s-1GCC\s0.
|
1429 |
|
|
.IP "\fB\-wrapper\fR" 4
|
1430 |
|
|
.IX Item "-wrapper"
|
1431 |
|
|
Invoke all subcommands under a wrapper program. The name of the
|
1432 |
|
|
wrapper program and its parameters are passed as a comma separated
|
1433 |
|
|
list.
|
1434 |
|
|
.Sp
|
1435 |
|
|
.Vb 1
|
1436 |
|
|
\& gcc \-c t.c \-wrapper gdb,\-\-args
|
1437 |
|
|
.Ve
|
1438 |
|
|
.Sp
|
1439 |
|
|
This invokes all subprograms of \fBgcc\fR under
|
1440 |
|
|
\&\fBgdb \-\-args\fR, thus the invocation of \fBcc1\fR is
|
1441 |
|
|
\&\fBgdb \-\-args cc1 ...\fR.
|
1442 |
|
|
.IP "\fB\-fplugin=\fR\fIname\fR\fB.so\fR" 4
|
1443 |
|
|
.IX Item "-fplugin=name.so"
|
1444 |
|
|
Load the plugin code in file \fIname\fR.so, assumed to be a
|
1445 |
|
|
shared object to be dlopen'd by the compiler. The base name of
|
1446 |
|
|
the shared object file is used to identify the plugin for the
|
1447 |
|
|
purposes of argument parsing (See
|
1448 |
|
|
\&\fB\-fplugin\-arg\-\fR\fIname\fR\fB\-\fR\fIkey\fR\fB=\fR\fIvalue\fR below).
|
1449 |
|
|
Each plugin should define the callback functions specified in the
|
1450 |
|
|
Plugins \s-1API\s0.
|
1451 |
|
|
.IP "\fB\-fplugin\-arg\-\fR\fIname\fR\fB\-\fR\fIkey\fR\fB=\fR\fIvalue\fR" 4
|
1452 |
|
|
.IX Item "-fplugin-arg-name-key=value"
|
1453 |
|
|
Define an argument called \fIkey\fR with a value of \fIvalue\fR
|
1454 |
|
|
for the plugin called \fIname\fR.
|
1455 |
|
|
.IP "\fB\-fdump\-ada\-spec\fR[\fB\-slim\fR]" 4
|
1456 |
|
|
.IX Item "-fdump-ada-spec[-slim]"
|
1457 |
|
|
For C and \*(C+ source and include files, generate corresponding Ada
|
1458 |
|
|
specs.
|
1459 |
|
|
.IP "\fB\-fdump\-go\-spec=\fR\fIfile\fR" 4
|
1460 |
|
|
.IX Item "-fdump-go-spec=file"
|
1461 |
|
|
For input files in any language, generate corresponding Go
|
1462 |
|
|
declarations in \fIfile\fR. This generates Go \f(CW\*(C`const\*(C'\fR,
|
1463 |
|
|
\&\f(CW\*(C`type\*(C'\fR, \f(CW\*(C`var\*(C'\fR, and \f(CW\*(C`func\*(C'\fR declarations which may be a
|
1464 |
|
|
useful way to start writing a Go interface to code written in some
|
1465 |
|
|
other language.
|
1466 |
|
|
.IP "\fB@\fR\fIfile\fR" 4
|
1467 |
|
|
.IX Item "@file"
|
1468 |
|
|
Read command-line options from \fIfile\fR. The options read are
|
1469 |
|
|
inserted in place of the original @\fIfile\fR option. If \fIfile\fR
|
1470 |
|
|
does not exist, or cannot be read, then the option will be treated
|
1471 |
|
|
literally, and not removed.
|
1472 |
|
|
.Sp
|
1473 |
|
|
Options in \fIfile\fR are separated by whitespace. A whitespace
|
1474 |
|
|
character may be included in an option by surrounding the entire
|
1475 |
|
|
option in either single or double quotes. Any character (including a
|
1476 |
|
|
backslash) may be included by prefixing the character to be included
|
1477 |
|
|
with a backslash. The \fIfile\fR may itself contain additional
|
1478 |
|
|
@\fIfile\fR options; any such options will be processed recursively.
|
1479 |
|
|
.SS "Compiling \*(C+ Programs"
|
1480 |
|
|
.IX Subsection "Compiling Programs"
|
1481 |
|
|
\&\*(C+ source files conventionally use one of the suffixes \fB.C\fR,
|
1482 |
|
|
\&\fB.cc\fR, \fB.cpp\fR, \fB.CPP\fR, \fB.c++\fR, \fB.cp\fR, or
|
1483 |
|
|
\&\fB.cxx\fR; \*(C+ header files often use \fB.hh\fR, \fB.hpp\fR,
|
1484 |
|
|
\&\fB.H\fR, or (for shared template code) \fB.tcc\fR; and
|
1485 |
|
|
preprocessed \*(C+ files use the suffix \fB.ii\fR. \s-1GCC\s0 recognizes
|
1486 |
|
|
files with these names and compiles them as \*(C+ programs even if you
|
1487 |
|
|
call the compiler the same way as for compiling C programs (usually
|
1488 |
|
|
with the name \fBgcc\fR).
|
1489 |
|
|
.PP
|
1490 |
|
|
However, the use of \fBgcc\fR does not add the \*(C+ library.
|
1491 |
|
|
\&\fBg++\fR is a program that calls \s-1GCC\s0 and automatically specifies linking
|
1492 |
|
|
against the \*(C+ library. It treats \fB.c\fR,
|
1493 |
|
|
\&\fB.h\fR and \fB.i\fR files as \*(C+ source files instead of C source
|
1494 |
|
|
files unless \fB\-x\fR is used. This program is also useful when
|
1495 |
|
|
precompiling a C header file with a \fB.h\fR extension for use in \*(C+
|
1496 |
|
|
compilations. On many systems, \fBg++\fR is also installed with
|
1497 |
|
|
the name \fBc++\fR.
|
1498 |
|
|
.PP
|
1499 |
|
|
When you compile \*(C+ programs, you may specify many of the same
|
1500 |
|
|
command-line options that you use for compiling programs in any
|
1501 |
|
|
language; or command-line options meaningful for C and related
|
1502 |
|
|
languages; or options that are meaningful only for \*(C+ programs.
|
1503 |
|
|
.SS "Options Controlling C Dialect"
|
1504 |
|
|
.IX Subsection "Options Controlling C Dialect"
|
1505 |
|
|
The following options control the dialect of C (or languages derived
|
1506 |
|
|
from C, such as \*(C+, Objective-C and Objective\-\*(C+) that the compiler
|
1507 |
|
|
accepts:
|
1508 |
|
|
.IP "\fB\-ansi\fR" 4
|
1509 |
|
|
.IX Item "-ansi"
|
1510 |
|
|
In C mode, this is equivalent to \fB\-std=c90\fR. In \*(C+ mode, it is
|
1511 |
|
|
equivalent to \fB\-std=c++98\fR.
|
1512 |
|
|
.Sp
|
1513 |
|
|
This turns off certain features of \s-1GCC\s0 that are incompatible with \s-1ISO\s0
|
1514 |
|
|
C90 (when compiling C code), or of standard \*(C+ (when compiling \*(C+ code),
|
1515 |
|
|
such as the \f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`typeof\*(C'\fR keywords, and
|
1516 |
|
|
predefined macros such as \f(CW\*(C`unix\*(C'\fR and \f(CW\*(C`vax\*(C'\fR that identify the
|
1517 |
|
|
type of system you are using. It also enables the undesirable and
|
1518 |
|
|
rarely used \s-1ISO\s0 trigraph feature. For the C compiler,
|
1519 |
|
|
it disables recognition of \*(C+ style \fB//\fR comments as well as
|
1520 |
|
|
the \f(CW\*(C`inline\*(C'\fR keyword.
|
1521 |
|
|
.Sp
|
1522 |
|
|
The alternate keywords \f(CW\*(C`_\|_asm_\|_\*(C'\fR, \f(CW\*(C`_\|_extension_\|_\*(C'\fR,
|
1523 |
|
|
\&\f(CW\*(C`_\|_inline_\|_\*(C'\fR and \f(CW\*(C`_\|_typeof_\|_\*(C'\fR continue to work despite
|
1524 |
|
|
\&\fB\-ansi\fR. You would not want to use them in an \s-1ISO\s0 C program, of
|
1525 |
|
|
course, but it is useful to put them in header files that might be included
|
1526 |
|
|
in compilations done with \fB\-ansi\fR. Alternate predefined macros
|
1527 |
|
|
such as \f(CW\*(C`_\|_unix_\|_\*(C'\fR and \f(CW\*(C`_\|_vax_\|_\*(C'\fR are also available, with or
|
1528 |
|
|
without \fB\-ansi\fR.
|
1529 |
|
|
.Sp
|
1530 |
|
|
The \fB\-ansi\fR option does not cause non-ISO programs to be
|
1531 |
|
|
rejected gratuitously. For that, \fB\-Wpedantic\fR is required in
|
1532 |
|
|
addition to \fB\-ansi\fR.
|
1533 |
|
|
.Sp
|
1534 |
|
|
The macro \f(CW\*(C`_\|_STRICT_ANSI_\|_\*(C'\fR is predefined when the \fB\-ansi\fR
|
1535 |
|
|
option is used. Some header files may notice this macro and refrain
|
1536 |
|
|
from declaring certain functions or defining certain macros that the
|
1537 |
|
|
\&\s-1ISO\s0 standard doesn't call for; this is to avoid interfering with any
|
1538 |
|
|
programs that might use these names for other things.
|
1539 |
|
|
.Sp
|
1540 |
|
|
Functions that are normally built in but do not have semantics
|
1541 |
|
|
defined by \s-1ISO\s0 C (such as \f(CW\*(C`alloca\*(C'\fR and \f(CW\*(C`ffs\*(C'\fR) are not built-in
|
1542 |
|
|
functions when \fB\-ansi\fR is used.
|
1543 |
|
|
.IP "\fB\-std=\fR" 4
|
1544 |
|
|
.IX Item "-std="
|
1545 |
|
|
Determine the language standard. This option
|
1546 |
|
|
is currently only supported when compiling C or \*(C+.
|
1547 |
|
|
.Sp
|
1548 |
|
|
The compiler can accept several base standards, such as \fBc90\fR or
|
1549 |
|
|
\&\fBc++98\fR, and \s-1GNU\s0 dialects of those standards, such as
|
1550 |
|
|
\&\fBgnu90\fR or \fBgnu++98\fR. When a base standard is specified, the
|
1551 |
|
|
compiler accepts all programs following that standard plus those
|
1552 |
|
|
using \s-1GNU\s0 extensions that do not contradict it. For example,
|
1553 |
|
|
\&\fB\-std=c90\fR turns off certain features of \s-1GCC\s0 that are
|
1554 |
|
|
incompatible with \s-1ISO\s0 C90, such as the \f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`typeof\*(C'\fR
|
1555 |
|
|
keywords, but not other \s-1GNU\s0 extensions that do not have a meaning in
|
1556 |
|
|
\&\s-1ISO\s0 C90, such as omitting the middle term of a \f(CW\*(C`?:\*(C'\fR
|
1557 |
|
|
expression. On the other hand, when a \s-1GNU\s0 dialect of a standard is
|
1558 |
|
|
specified, all features supported by the compiler are enabled, even when
|
1559 |
|
|
those features change the meaning of the base standard. As a result, some
|
1560 |
|
|
strict-conforming programs may be rejected. The particular standard
|
1561 |
|
|
is used by \fB\-Wpedantic\fR to identify which features are \s-1GNU\s0
|
1562 |
|
|
extensions given that version of the standard. For example
|
1563 |
|
|
\&\fB\-std=gnu90 \-Wpedantic\fR warns about \*(C+ style \fB//\fR
|
1564 |
|
|
comments, while \fB\-std=gnu99 \-Wpedantic\fR does not.
|
1565 |
|
|
.Sp
|
1566 |
|
|
A value for this option must be provided; possible values are
|
1567 |
|
|
.RS 4
|
1568 |
|
|
.IP "\fBc90\fR" 4
|
1569 |
|
|
.IX Item "c90"
|
1570 |
|
|
.PD 0
|
1571 |
|
|
.IP "\fBc89\fR" 4
|
1572 |
|
|
.IX Item "c89"
|
1573 |
|
|
.IP "\fBiso9899:1990\fR" 4
|
1574 |
|
|
.IX Item "iso9899:1990"
|
1575 |
|
|
.PD
|
1576 |
|
|
Support all \s-1ISO\s0 C90 programs (certain \s-1GNU\s0 extensions that conflict
|
1577 |
|
|
with \s-1ISO\s0 C90 are disabled). Same as \fB\-ansi\fR for C code.
|
1578 |
|
|
.IP "\fBiso9899:199409\fR" 4
|
1579 |
|
|
.IX Item "iso9899:199409"
|
1580 |
|
|
\&\s-1ISO\s0 C90 as modified in amendment 1.
|
1581 |
|
|
.IP "\fBc99\fR" 4
|
1582 |
|
|
.IX Item "c99"
|
1583 |
|
|
.PD 0
|
1584 |
|
|
.IP "\fBc9x\fR" 4
|
1585 |
|
|
.IX Item "c9x"
|
1586 |
|
|
.IP "\fBiso9899:1999\fR" 4
|
1587 |
|
|
.IX Item "iso9899:1999"
|
1588 |
|
|
.IP "\fBiso9899:199x\fR" 4
|
1589 |
|
|
.IX Item "iso9899:199x"
|
1590 |
|
|
.PD
|
1591 |
|
|
\&\s-1ISO\s0 C99. Note that this standard is not yet fully supported; see
|
1592 |
|
|
<\fBhttp://gcc.gnu.org/c99status.html\fR> for more information. The
|
1593 |
|
|
names \fBc9x\fR and \fBiso9899:199x\fR are deprecated.
|
1594 |
|
|
.IP "\fBc11\fR" 4
|
1595 |
|
|
.IX Item "c11"
|
1596 |
|
|
.PD 0
|
1597 |
|
|
.IP "\fBc1x\fR" 4
|
1598 |
|
|
.IX Item "c1x"
|
1599 |
|
|
.IP "\fBiso9899:2011\fR" 4
|
1600 |
|
|
.IX Item "iso9899:2011"
|
1601 |
|
|
.PD
|
1602 |
|
|
\&\s-1ISO\s0 C11, the 2011 revision of the \s-1ISO\s0 C standard.
|
1603 |
|
|
Support is incomplete and experimental. The name \fBc1x\fR is
|
1604 |
|
|
deprecated.
|
1605 |
|
|
.IP "\fBgnu90\fR" 4
|
1606 |
|
|
.IX Item "gnu90"
|
1607 |
|
|
.PD 0
|
1608 |
|
|
.IP "\fBgnu89\fR" 4
|
1609 |
|
|
.IX Item "gnu89"
|
1610 |
|
|
.PD
|
1611 |
|
|
\&\s-1GNU\s0 dialect of \s-1ISO\s0 C90 (including some C99 features). This
|
1612 |
|
|
is the default for C code.
|
1613 |
|
|
.IP "\fBgnu99\fR" 4
|
1614 |
|
|
.IX Item "gnu99"
|
1615 |
|
|
.PD 0
|
1616 |
|
|
.IP "\fBgnu9x\fR" 4
|
1617 |
|
|
.IX Item "gnu9x"
|
1618 |
|
|
.PD
|
1619 |
|
|
\&\s-1GNU\s0 dialect of \s-1ISO\s0 C99. When \s-1ISO\s0 C99 is fully implemented in \s-1GCC\s0,
|
1620 |
|
|
this will become the default. The name \fBgnu9x\fR is deprecated.
|
1621 |
|
|
.IP "\fBgnu11\fR" 4
|
1622 |
|
|
.IX Item "gnu11"
|
1623 |
|
|
.PD 0
|
1624 |
|
|
.IP "\fBgnu1x\fR" 4
|
1625 |
|
|
.IX Item "gnu1x"
|
1626 |
|
|
.PD
|
1627 |
|
|
\&\s-1GNU\s0 dialect of \s-1ISO\s0 C11. Support is incomplete and experimental. The
|
1628 |
|
|
name \fBgnu1x\fR is deprecated.
|
1629 |
|
|
.IP "\fBc++98\fR" 4
|
1630 |
|
|
.IX Item "c++98"
|
1631 |
|
|
.PD 0
|
1632 |
|
|
.IP "\fBc++03\fR" 4
|
1633 |
|
|
.IX Item "c++03"
|
1634 |
|
|
.PD
|
1635 |
|
|
The 1998 \s-1ISO\s0 \*(C+ standard plus the 2003 technical corrigendum and some
|
1636 |
|
|
additional defect reports. Same as \fB\-ansi\fR for \*(C+ code.
|
1637 |
|
|
.IP "\fBgnu++98\fR" 4
|
1638 |
|
|
.IX Item "gnu++98"
|
1639 |
|
|
.PD 0
|
1640 |
|
|
.IP "\fBgnu++03\fR" 4
|
1641 |
|
|
.IX Item "gnu++03"
|
1642 |
|
|
.PD
|
1643 |
|
|
\&\s-1GNU\s0 dialect of \fB\-std=c++98\fR. This is the default for
|
1644 |
|
|
\&\*(C+ code.
|
1645 |
|
|
.IP "\fBc++11\fR" 4
|
1646 |
|
|
.IX Item "c++11"
|
1647 |
|
|
.PD 0
|
1648 |
|
|
.IP "\fBc++0x\fR" 4
|
1649 |
|
|
.IX Item "c++0x"
|
1650 |
|
|
.PD
|
1651 |
|
|
The 2011 \s-1ISO\s0 \*(C+ standard plus amendments. Support for \*(C+11 is still
|
1652 |
|
|
experimental, and may change in incompatible ways in future releases.
|
1653 |
|
|
The name \fBc++0x\fR is deprecated.
|
1654 |
|
|
.IP "\fBgnu++11\fR" 4
|
1655 |
|
|
.IX Item "gnu++11"
|
1656 |
|
|
.PD 0
|
1657 |
|
|
.IP "\fBgnu++0x\fR" 4
|
1658 |
|
|
.IX Item "gnu++0x"
|
1659 |
|
|
.PD
|
1660 |
|
|
\&\s-1GNU\s0 dialect of \fB\-std=c++11\fR. Support for \*(C+11 is still
|
1661 |
|
|
experimental, and may change in incompatible ways in future releases.
|
1662 |
|
|
The name \fBgnu++0x\fR is deprecated.
|
1663 |
|
|
.IP "\fBc++1y\fR" 4
|
1664 |
|
|
.IX Item "c++1y"
|
1665 |
|
|
The next revision of the \s-1ISO\s0 \*(C+ standard, tentatively planned for
|
1666 |
|
|
2017. Support is highly experimental, and will almost certainly
|
1667 |
|
|
change in incompatible ways in future releases.
|
1668 |
|
|
.IP "\fBgnu++1y\fR" 4
|
1669 |
|
|
.IX Item "gnu++1y"
|
1670 |
|
|
\&\s-1GNU\s0 dialect of \fB\-std=c++1y\fR. Support is highly experimental,
|
1671 |
|
|
and will almost certainly change in incompatible ways in future
|
1672 |
|
|
releases.
|
1673 |
|
|
.RE
|
1674 |
|
|
.RS 4
|
1675 |
|
|
.RE
|
1676 |
|
|
.IP "\fB\-fgnu89\-inline\fR" 4
|
1677 |
|
|
.IX Item "-fgnu89-inline"
|
1678 |
|
|
The option \fB\-fgnu89\-inline\fR tells \s-1GCC\s0 to use the traditional
|
1679 |
|
|
\&\s-1GNU\s0 semantics for \f(CW\*(C`inline\*(C'\fR functions when in C99 mode.
|
1680 |
|
|
This option
|
1681 |
|
|
is accepted and ignored by \s-1GCC\s0 versions 4.1.3 up to but not including
|
1682 |
|
|
4.3. In \s-1GCC\s0 versions 4.3 and later it changes the behavior of \s-1GCC\s0 in
|
1683 |
|
|
C99 mode. Using this option is roughly equivalent to adding the
|
1684 |
|
|
\&\f(CW\*(C`gnu_inline\*(C'\fR function attribute to all inline functions.
|
1685 |
|
|
.Sp
|
1686 |
|
|
The option \fB\-fno\-gnu89\-inline\fR explicitly tells \s-1GCC\s0 to use the
|
1687 |
|
|
C99 semantics for \f(CW\*(C`inline\*(C'\fR when in C99 or gnu99 mode (i.e., it
|
1688 |
|
|
specifies the default behavior). This option was first supported in
|
1689 |
|
|
\&\s-1GCC\s0 4.3. This option is not supported in \fB\-std=c90\fR or
|
1690 |
|
|
\&\fB\-std=gnu90\fR mode.
|
1691 |
|
|
.Sp
|
1692 |
|
|
The preprocessor macros \f(CW\*(C`_\|_GNUC_GNU_INLINE_\|_\*(C'\fR and
|
1693 |
|
|
\&\f(CW\*(C`_\|_GNUC_STDC_INLINE_\|_\*(C'\fR may be used to check which semantics are
|
1694 |
|
|
in effect for \f(CW\*(C`inline\*(C'\fR functions.
|
1695 |
|
|
.IP "\fB\-aux\-info\fR \fIfilename\fR" 4
|
1696 |
|
|
.IX Item "-aux-info filename"
|
1697 |
|
|
Output to the given filename prototyped declarations for all functions
|
1698 |
|
|
declared and/or defined in a translation unit, including those in header
|
1699 |
|
|
files. This option is silently ignored in any language other than C.
|
1700 |
|
|
.Sp
|
1701 |
|
|
Besides declarations, the file indicates, in comments, the origin of
|
1702 |
|
|
each declaration (source file and line), whether the declaration was
|
1703 |
|
|
implicit, prototyped or unprototyped (\fBI\fR, \fBN\fR for new or
|
1704 |
|
|
\&\fBO\fR for old, respectively, in the first character after the line
|
1705 |
|
|
number and the colon), and whether it came from a declaration or a
|
1706 |
|
|
definition (\fBC\fR or \fBF\fR, respectively, in the following
|
1707 |
|
|
character). In the case of function definitions, a K&R\-style list of
|
1708 |
|
|
arguments followed by their declarations is also provided, inside
|
1709 |
|
|
comments, after the declaration.
|
1710 |
|
|
.IP "\fB\-fallow\-parameterless\-variadic\-functions\fR" 4
|
1711 |
|
|
.IX Item "-fallow-parameterless-variadic-functions"
|
1712 |
|
|
Accept variadic functions without named parameters.
|
1713 |
|
|
.Sp
|
1714 |
|
|
Although it is possible to define such a function, this is not very
|
1715 |
|
|
useful as it is not possible to read the arguments. This is only
|
1716 |
|
|
supported for C as this construct is allowed by \*(C+.
|
1717 |
|
|
.IP "\fB\-fno\-asm\fR" 4
|
1718 |
|
|
.IX Item "-fno-asm"
|
1719 |
|
|
Do not recognize \f(CW\*(C`asm\*(C'\fR, \f(CW\*(C`inline\*(C'\fR or \f(CW\*(C`typeof\*(C'\fR as a
|
1720 |
|
|
keyword, so that code can use these words as identifiers. You can use
|
1721 |
|
|
the keywords \f(CW\*(C`_\|_asm_\|_\*(C'\fR, \f(CW\*(C`_\|_inline_\|_\*(C'\fR and \f(CW\*(C`_\|_typeof_\|_\*(C'\fR
|
1722 |
|
|
instead. \fB\-ansi\fR implies \fB\-fno\-asm\fR.
|
1723 |
|
|
.Sp
|
1724 |
|
|
In \*(C+, this switch only affects the \f(CW\*(C`typeof\*(C'\fR keyword, since
|
1725 |
|
|
\&\f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`inline\*(C'\fR are standard keywords. You may want to
|
1726 |
|
|
use the \fB\-fno\-gnu\-keywords\fR flag instead, which has the same
|
1727 |
|
|
effect. In C99 mode (\fB\-std=c99\fR or \fB\-std=gnu99\fR), this
|
1728 |
|
|
switch only affects the \f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`typeof\*(C'\fR keywords, since
|
1729 |
|
|
\&\f(CW\*(C`inline\*(C'\fR is a standard keyword in \s-1ISO\s0 C99.
|
1730 |
|
|
.IP "\fB\-fno\-builtin\fR" 4
|
1731 |
|
|
.IX Item "-fno-builtin"
|
1732 |
|
|
.PD 0
|
1733 |
|
|
.IP "\fB\-fno\-builtin\-\fR\fIfunction\fR" 4
|
1734 |
|
|
.IX Item "-fno-builtin-function"
|
1735 |
|
|
.PD
|
1736 |
|
|
Don't recognize built-in functions that do not begin with
|
1737 |
|
|
\&\fB_\|_builtin_\fR as prefix.
|
1738 |
|
|
.Sp
|
1739 |
|
|
\&\s-1GCC\s0 normally generates special code to handle certain built-in functions
|
1740 |
|
|
more efficiently; for instance, calls to \f(CW\*(C`alloca\*(C'\fR may become single
|
1741 |
|
|
instructions which adjust the stack directly, and calls to \f(CW\*(C`memcpy\*(C'\fR
|
1742 |
|
|
may become inline copy loops. The resulting code is often both smaller
|
1743 |
|
|
and faster, but since the function calls no longer appear as such, you
|
1744 |
|
|
cannot set a breakpoint on those calls, nor can you change the behavior
|
1745 |
|
|
of the functions by linking with a different library. In addition,
|
1746 |
|
|
when a function is recognized as a built-in function, \s-1GCC\s0 may use
|
1747 |
|
|
information about that function to warn about problems with calls to
|
1748 |
|
|
that function, or to generate more efficient code, even if the
|
1749 |
|
|
resulting code still contains calls to that function. For example,
|
1750 |
|
|
warnings are given with \fB\-Wformat\fR for bad calls to
|
1751 |
|
|
\&\f(CW\*(C`printf\*(C'\fR when \f(CW\*(C`printf\*(C'\fR is built in and \f(CW\*(C`strlen\*(C'\fR is
|
1752 |
|
|
known not to modify global memory.
|
1753 |
|
|
.Sp
|
1754 |
|
|
With the \fB\-fno\-builtin\-\fR\fIfunction\fR option
|
1755 |
|
|
only the built-in function \fIfunction\fR is
|
1756 |
|
|
disabled. \fIfunction\fR must not begin with \fB_\|_builtin_\fR. If a
|
1757 |
|
|
function is named that is not built-in in this version of \s-1GCC\s0, this
|
1758 |
|
|
option is ignored. There is no corresponding
|
1759 |
|
|
\&\fB\-fbuiltin\-\fR\fIfunction\fR option; if you wish to enable
|
1760 |
|
|
built-in functions selectively when using \fB\-fno\-builtin\fR or
|
1761 |
|
|
\&\fB\-ffreestanding\fR, you may define macros such as:
|
1762 |
|
|
.Sp
|
1763 |
|
|
.Vb 2
|
1764 |
|
|
\& #define abs(n) _\|_builtin_abs ((n))
|
1765 |
|
|
\& #define strcpy(d, s) _\|_builtin_strcpy ((d), (s))
|
1766 |
|
|
.Ve
|
1767 |
|
|
.IP "\fB\-fhosted\fR" 4
|
1768 |
|
|
.IX Item "-fhosted"
|
1769 |
|
|
Assert that compilation targets a hosted environment. This implies
|
1770 |
|
|
\&\fB\-fbuiltin\fR. A hosted environment is one in which the
|
1771 |
|
|
entire standard library is available, and in which \f(CW\*(C`main\*(C'\fR has a return
|
1772 |
|
|
type of \f(CW\*(C`int\*(C'\fR. Examples are nearly everything except a kernel.
|
1773 |
|
|
This is equivalent to \fB\-fno\-freestanding\fR.
|
1774 |
|
|
.IP "\fB\-ffreestanding\fR" 4
|
1775 |
|
|
.IX Item "-ffreestanding"
|
1776 |
|
|
Assert that compilation targets a freestanding environment. This
|
1777 |
|
|
implies \fB\-fno\-builtin\fR. A freestanding environment
|
1778 |
|
|
is one in which the standard library may not exist, and program startup may
|
1779 |
|
|
not necessarily be at \f(CW\*(C`main\*(C'\fR. The most obvious example is an \s-1OS\s0 kernel.
|
1780 |
|
|
This is equivalent to \fB\-fno\-hosted\fR.
|
1781 |
|
|
.IP "\fB\-fopenmp\fR" 4
|
1782 |
|
|
.IX Item "-fopenmp"
|
1783 |
|
|
Enable handling of OpenMP directives \f(CW\*(C`#pragma omp\*(C'\fR in C/\*(C+ and
|
1784 |
|
|
\&\f(CW\*(C`!$omp\*(C'\fR in Fortran. When \fB\-fopenmp\fR is specified, the
|
1785 |
|
|
compiler generates parallel code according to the OpenMP Application
|
1786 |
|
|
Program Interface v3.0 <\fBhttp://www.openmp.org/\fR>. This option
|
1787 |
|
|
implies \fB\-pthread\fR, and thus is only supported on targets that
|
1788 |
|
|
have support for \fB\-pthread\fR.
|
1789 |
|
|
.IP "\fB\-fgnu\-tm\fR" 4
|
1790 |
|
|
.IX Item "-fgnu-tm"
|
1791 |
|
|
When the option \fB\-fgnu\-tm\fR is specified, the compiler
|
1792 |
|
|
generates code for the Linux variant of Intel's current Transactional
|
1793 |
|
|
Memory \s-1ABI\s0 specification document (Revision 1.1, May 6 2009). This is
|
1794 |
|
|
an experimental feature whose interface may change in future versions
|
1795 |
|
|
of \s-1GCC\s0, as the official specification changes. Please note that not
|
1796 |
|
|
all architectures are supported for this feature.
|
1797 |
|
|
.Sp
|
1798 |
|
|
For more information on \s-1GCC\s0's support for transactional memory,
|
1799 |
|
|
.Sp
|
1800 |
|
|
Note that the transactional memory feature is not supported with
|
1801 |
|
|
non-call exceptions (\fB\-fnon\-call\-exceptions\fR).
|
1802 |
|
|
.IP "\fB\-fms\-extensions\fR" 4
|
1803 |
|
|
.IX Item "-fms-extensions"
|
1804 |
|
|
Accept some non-standard constructs used in Microsoft header files.
|
1805 |
|
|
.Sp
|
1806 |
|
|
In \*(C+ code, this allows member names in structures to be similar
|
1807 |
|
|
to previous types declarations.
|
1808 |
|
|
.Sp
|
1809 |
|
|
.Vb 4
|
1810 |
|
|
\& typedef int UOW;
|
1811 |
|
|
\& struct ABC {
|
1812 |
|
|
\& UOW UOW;
|
1813 |
|
|
\& };
|
1814 |
|
|
.Ve
|
1815 |
|
|
.Sp
|
1816 |
|
|
Some cases of unnamed fields in structures and unions are only
|
1817 |
|
|
accepted with this option.
|
1818 |
|
|
.IP "\fB\-fplan9\-extensions\fR" 4
|
1819 |
|
|
.IX Item "-fplan9-extensions"
|
1820 |
|
|
Accept some non-standard constructs used in Plan 9 code.
|
1821 |
|
|
.Sp
|
1822 |
|
|
This enables \fB\-fms\-extensions\fR, permits passing pointers to
|
1823 |
|
|
structures with anonymous fields to functions that expect pointers to
|
1824 |
|
|
elements of the type of the field, and permits referring to anonymous
|
1825 |
|
|
fields declared using a typedef. This is only
|
1826 |
|
|
supported for C, not \*(C+.
|
1827 |
|
|
.IP "\fB\-trigraphs\fR" 4
|
1828 |
|
|
.IX Item "-trigraphs"
|
1829 |
|
|
Support \s-1ISO\s0 C trigraphs. The \fB\-ansi\fR option (and \fB\-std\fR
|
1830 |
|
|
options for strict \s-1ISO\s0 C conformance) implies \fB\-trigraphs\fR.
|
1831 |
|
|
.IP "\fB\-traditional\fR" 4
|
1832 |
|
|
.IX Item "-traditional"
|
1833 |
|
|
.PD 0
|
1834 |
|
|
.IP "\fB\-traditional\-cpp\fR" 4
|
1835 |
|
|
.IX Item "-traditional-cpp"
|
1836 |
|
|
.PD
|
1837 |
|
|
Formerly, these options caused \s-1GCC\s0 to attempt to emulate a pre-standard
|
1838 |
|
|
C compiler. They are now only supported with the \fB\-E\fR switch.
|
1839 |
|
|
The preprocessor continues to support a pre-standard mode. See the \s-1GNU\s0
|
1840 |
|
|
\&\s-1CPP\s0 manual for details.
|
1841 |
|
|
.IP "\fB\-fcond\-mismatch\fR" 4
|
1842 |
|
|
.IX Item "-fcond-mismatch"
|
1843 |
|
|
Allow conditional expressions with mismatched types in the second and
|
1844 |
|
|
third arguments. The value of such an expression is void. This option
|
1845 |
|
|
is not supported for \*(C+.
|
1846 |
|
|
.IP "\fB\-flax\-vector\-conversions\fR" 4
|
1847 |
|
|
.IX Item "-flax-vector-conversions"
|
1848 |
|
|
Allow implicit conversions between vectors with differing numbers of
|
1849 |
|
|
elements and/or incompatible element types. This option should not be
|
1850 |
|
|
used for new code.
|
1851 |
|
|
.IP "\fB\-funsigned\-char\fR" 4
|
1852 |
|
|
.IX Item "-funsigned-char"
|
1853 |
|
|
Let the type \f(CW\*(C`char\*(C'\fR be unsigned, like \f(CW\*(C`unsigned char\*(C'\fR.
|
1854 |
|
|
.Sp
|
1855 |
|
|
Each kind of machine has a default for what \f(CW\*(C`char\*(C'\fR should
|
1856 |
|
|
be. It is either like \f(CW\*(C`unsigned char\*(C'\fR by default or like
|
1857 |
|
|
\&\f(CW\*(C`signed char\*(C'\fR by default.
|
1858 |
|
|
.Sp
|
1859 |
|
|
Ideally, a portable program should always use \f(CW\*(C`signed char\*(C'\fR or
|
1860 |
|
|
\&\f(CW\*(C`unsigned char\*(C'\fR when it depends on the signedness of an object.
|
1861 |
|
|
But many programs have been written to use plain \f(CW\*(C`char\*(C'\fR and
|
1862 |
|
|
expect it to be signed, or expect it to be unsigned, depending on the
|
1863 |
|
|
machines they were written for. This option, and its inverse, let you
|
1864 |
|
|
make such a program work with the opposite default.
|
1865 |
|
|
.Sp
|
1866 |
|
|
The type \f(CW\*(C`char\*(C'\fR is always a distinct type from each of
|
1867 |
|
|
\&\f(CW\*(C`signed char\*(C'\fR or \f(CW\*(C`unsigned char\*(C'\fR, even though its behavior
|
1868 |
|
|
is always just like one of those two.
|
1869 |
|
|
.IP "\fB\-fsigned\-char\fR" 4
|
1870 |
|
|
.IX Item "-fsigned-char"
|
1871 |
|
|
Let the type \f(CW\*(C`char\*(C'\fR be signed, like \f(CW\*(C`signed char\*(C'\fR.
|
1872 |
|
|
.Sp
|
1873 |
|
|
Note that this is equivalent to \fB\-fno\-unsigned\-char\fR, which is
|
1874 |
|
|
the negative form of \fB\-funsigned\-char\fR. Likewise, the option
|
1875 |
|
|
\&\fB\-fno\-signed\-char\fR is equivalent to \fB\-funsigned\-char\fR.
|
1876 |
|
|
.IP "\fB\-fsigned\-bitfields\fR" 4
|
1877 |
|
|
.IX Item "-fsigned-bitfields"
|
1878 |
|
|
.PD 0
|
1879 |
|
|
.IP "\fB\-funsigned\-bitfields\fR" 4
|
1880 |
|
|
.IX Item "-funsigned-bitfields"
|
1881 |
|
|
.IP "\fB\-fno\-signed\-bitfields\fR" 4
|
1882 |
|
|
.IX Item "-fno-signed-bitfields"
|
1883 |
|
|
.IP "\fB\-fno\-unsigned\-bitfields\fR" 4
|
1884 |
|
|
.IX Item "-fno-unsigned-bitfields"
|
1885 |
|
|
.PD
|
1886 |
|
|
These options control whether a bit-field is signed or unsigned, when the
|
1887 |
|
|
declaration does not use either \f(CW\*(C`signed\*(C'\fR or \f(CW\*(C`unsigned\*(C'\fR. By
|
1888 |
|
|
default, such a bit-field is signed, because this is consistent: the
|
1889 |
|
|
basic integer types such as \f(CW\*(C`int\*(C'\fR are signed types.
|
1890 |
|
|
.SS "Options Controlling \*(C+ Dialect"
|
1891 |
|
|
.IX Subsection "Options Controlling Dialect"
|
1892 |
|
|
This section describes the command-line options that are only meaningful
|
1893 |
|
|
for \*(C+ programs. You can also use most of the \s-1GNU\s0 compiler options
|
1894 |
|
|
regardless of what language your program is in. For example, you
|
1895 |
|
|
might compile a file \f(CW\*(C`firstClass.C\*(C'\fR like this:
|
1896 |
|
|
.PP
|
1897 |
|
|
.Vb 1
|
1898 |
|
|
\& g++ \-g \-frepo \-O \-c firstClass.C
|
1899 |
|
|
.Ve
|
1900 |
|
|
.PP
|
1901 |
|
|
In this example, only \fB\-frepo\fR is an option meant
|
1902 |
|
|
only for \*(C+ programs; you can use the other options with any
|
1903 |
|
|
language supported by \s-1GCC\s0.
|
1904 |
|
|
.PP
|
1905 |
|
|
Here is a list of options that are \fIonly\fR for compiling \*(C+ programs:
|
1906 |
|
|
.IP "\fB\-fabi\-version=\fR\fIn\fR" 4
|
1907 |
|
|
.IX Item "-fabi-version=n"
|
1908 |
|
|
Use version \fIn\fR of the \*(C+ \s-1ABI\s0. The default is version 2.
|
1909 |
|
|
.Sp
|
1910 |
|
|
Version 0 refers to the version conforming most closely to
|
1911 |
|
|
the \*(C+ \s-1ABI\s0 specification. Therefore, the \s-1ABI\s0 obtained using version 0
|
1912 |
|
|
will change in different versions of G++ as \s-1ABI\s0 bugs are fixed.
|
1913 |
|
|
.Sp
|
1914 |
|
|
Version 1 is the version of the \*(C+ \s-1ABI\s0 that first appeared in G++ 3.2.
|
1915 |
|
|
.Sp
|
1916 |
|
|
Version 2 is the version of the \*(C+ \s-1ABI\s0 that first appeared in G++ 3.4.
|
1917 |
|
|
.Sp
|
1918 |
|
|
Version 3 corrects an error in mangling a constant address as a
|
1919 |
|
|
template argument.
|
1920 |
|
|
.Sp
|
1921 |
|
|
Version 4, which first appeared in G++ 4.5, implements a standard
|
1922 |
|
|
mangling for vector types.
|
1923 |
|
|
.Sp
|
1924 |
|
|
Version 5, which first appeared in G++ 4.6, corrects the mangling of
|
1925 |
|
|
attribute const/volatile on function pointer types, decltype of a
|
1926 |
|
|
plain decl, and use of a function parameter in the declaration of
|
1927 |
|
|
another parameter.
|
1928 |
|
|
.Sp
|
1929 |
|
|
Version 6, which first appeared in G++ 4.7, corrects the promotion
|
1930 |
|
|
behavior of \*(C+11 scoped enums and the mangling of template argument
|
1931 |
|
|
packs, const/static_cast, prefix ++ and \-\-, and a class scope function
|
1932 |
|
|
used as a template argument.
|
1933 |
|
|
.Sp
|
1934 |
|
|
See also \fB\-Wabi\fR.
|
1935 |
|
|
.IP "\fB\-fno\-access\-control\fR" 4
|
1936 |
|
|
.IX Item "-fno-access-control"
|
1937 |
|
|
Turn off all access checking. This switch is mainly useful for working
|
1938 |
|
|
around bugs in the access control code.
|
1939 |
|
|
.IP "\fB\-fcheck\-new\fR" 4
|
1940 |
|
|
.IX Item "-fcheck-new"
|
1941 |
|
|
Check that the pointer returned by \f(CW\*(C`operator new\*(C'\fR is non-null
|
1942 |
|
|
before attempting to modify the storage allocated. This check is
|
1943 |
|
|
normally unnecessary because the \*(C+ standard specifies that
|
1944 |
|
|
\&\f(CW\*(C`operator new\*(C'\fR only returns \f(CW0\fR if it is declared
|
1945 |
|
|
\&\fB\f(BIthrow()\fB\fR, in which case the compiler always checks the
|
1946 |
|
|
return value even without this option. In all other cases, when
|
1947 |
|
|
\&\f(CW\*(C`operator new\*(C'\fR has a non-empty exception specification, memory
|
1948 |
|
|
exhaustion is signalled by throwing \f(CW\*(C`std::bad_alloc\*(C'\fR. See also
|
1949 |
|
|
\&\fBnew (nothrow)\fR.
|
1950 |
|
|
.IP "\fB\-fconstexpr\-depth=\fR\fIn\fR" 4
|
1951 |
|
|
.IX Item "-fconstexpr-depth=n"
|
1952 |
|
|
Set the maximum nested evaluation depth for \*(C+11 constexpr functions
|
1953 |
|
|
to \fIn\fR. A limit is needed to detect endless recursion during
|
1954 |
|
|
constant expression evaluation. The minimum specified by the standard
|
1955 |
|
|
is 512.
|
1956 |
|
|
.IP "\fB\-fdeduce\-init\-list\fR" 4
|
1957 |
|
|
.IX Item "-fdeduce-init-list"
|
1958 |
|
|
Enable deduction of a template type parameter as
|
1959 |
|
|
\&\f(CW\*(C`std::initializer_list\*(C'\fR from a brace-enclosed initializer list, i.e.
|
1960 |
|
|
.Sp
|
1961 |
|
|
.Vb 4
|
1962 |
|
|
\& template auto forward(T t) \-> decltype (realfn (t))
|
1963 |
|
|
\& {
|
1964 |
|
|
\& return realfn (t);
|
1965 |
|
|
\& }
|
1966 |
|
|
\&
|
1967 |
|
|
\& void f()
|
1968 |
|
|
\& {
|
1969 |
|
|
\& forward({1,2}); // call forward>
|
1970 |
|
|
\& }
|
1971 |
|
|
.Ve
|
1972 |
|
|
.Sp
|
1973 |
|
|
This deduction was implemented as a possible extension to the
|
1974 |
|
|
originally proposed semantics for the \*(C+11 standard, but was not part
|
1975 |
|
|
of the final standard, so it is disabled by default. This option is
|
1976 |
|
|
deprecated, and may be removed in a future version of G++.
|
1977 |
|
|
.IP "\fB\-ffriend\-injection\fR" 4
|
1978 |
|
|
.IX Item "-ffriend-injection"
|
1979 |
|
|
Inject friend functions into the enclosing namespace, so that they are
|
1980 |
|
|
visible outside the scope of the class in which they are declared.
|
1981 |
|
|
Friend functions were documented to work this way in the old Annotated
|
1982 |
|
|
\&\*(C+ Reference Manual, and versions of G++ before 4.1 always worked
|
1983 |
|
|
that way. However, in \s-1ISO\s0 \*(C+ a friend function that is not declared
|
1984 |
|
|
in an enclosing scope can only be found using argument dependent
|
1985 |
|
|
lookup. This option causes friends to be injected as they were in
|
1986 |
|
|
earlier releases.
|
1987 |
|
|
.Sp
|
1988 |
|
|
This option is for compatibility, and may be removed in a future
|
1989 |
|
|
release of G++.
|
1990 |
|
|
.IP "\fB\-fno\-elide\-constructors\fR" 4
|
1991 |
|
|
.IX Item "-fno-elide-constructors"
|
1992 |
|
|
The \*(C+ standard allows an implementation to omit creating a temporary
|
1993 |
|
|
that is only used to initialize another object of the same type.
|
1994 |
|
|
Specifying this option disables that optimization, and forces G++ to
|
1995 |
|
|
call the copy constructor in all cases.
|
1996 |
|
|
.IP "\fB\-fno\-enforce\-eh\-specs\fR" 4
|
1997 |
|
|
.IX Item "-fno-enforce-eh-specs"
|
1998 |
|
|
Don't generate code to check for violation of exception specifications
|
1999 |
|
|
at run time. This option violates the \*(C+ standard, but may be useful
|
2000 |
|
|
for reducing code size in production builds, much like defining
|
2001 |
|
|
\&\fB\s-1NDEBUG\s0\fR. This does not give user code permission to throw
|
2002 |
|
|
exceptions in violation of the exception specifications; the compiler
|
2003 |
|
|
still optimizes based on the specifications, so throwing an
|
2004 |
|
|
unexpected exception results in undefined behavior at run time.
|
2005 |
|
|
.IP "\fB\-ffor\-scope\fR" 4
|
2006 |
|
|
.IX Item "-ffor-scope"
|
2007 |
|
|
.PD 0
|
2008 |
|
|
.IP "\fB\-fno\-for\-scope\fR" 4
|
2009 |
|
|
.IX Item "-fno-for-scope"
|
2010 |
|
|
.PD
|
2011 |
|
|
If \fB\-ffor\-scope\fR is specified, the scope of variables declared in
|
2012 |
|
|
a \fIfor-init-statement\fR is limited to the \fBfor\fR loop itself,
|
2013 |
|
|
as specified by the \*(C+ standard.
|
2014 |
|
|
If \fB\-fno\-for\-scope\fR is specified, the scope of variables declared in
|
2015 |
|
|
a \fIfor-init-statement\fR extends to the end of the enclosing scope,
|
2016 |
|
|
as was the case in old versions of G++, and other (traditional)
|
2017 |
|
|
implementations of \*(C+.
|
2018 |
|
|
.Sp
|
2019 |
|
|
If neither flag is given, the default is to follow the standard,
|
2020 |
|
|
but to allow and give a warning for old-style code that would
|
2021 |
|
|
otherwise be invalid, or have different behavior.
|
2022 |
|
|
.IP "\fB\-fno\-gnu\-keywords\fR" 4
|
2023 |
|
|
.IX Item "-fno-gnu-keywords"
|
2024 |
|
|
Do not recognize \f(CW\*(C`typeof\*(C'\fR as a keyword, so that code can use this
|
2025 |
|
|
word as an identifier. You can use the keyword \f(CW\*(C`_\|_typeof_\|_\*(C'\fR instead.
|
2026 |
|
|
\&\fB\-ansi\fR implies \fB\-fno\-gnu\-keywords\fR.
|
2027 |
|
|
.IP "\fB\-fno\-implicit\-templates\fR" 4
|
2028 |
|
|
.IX Item "-fno-implicit-templates"
|
2029 |
|
|
Never emit code for non-inline templates that are instantiated
|
2030 |
|
|
implicitly (i.e. by use); only emit code for explicit instantiations.
|
2031 |
|
|
.IP "\fB\-fno\-implicit\-inline\-templates\fR" 4
|
2032 |
|
|
.IX Item "-fno-implicit-inline-templates"
|
2033 |
|
|
Don't emit code for implicit instantiations of inline templates, either.
|
2034 |
|
|
The default is to handle inlines differently so that compiles with and
|
2035 |
|
|
without optimization need the same set of explicit instantiations.
|
2036 |
|
|
.IP "\fB\-fno\-implement\-inlines\fR" 4
|
2037 |
|
|
.IX Item "-fno-implement-inlines"
|
2038 |
|
|
To save space, do not emit out-of-line copies of inline functions
|
2039 |
|
|
controlled by \fB#pragma implementation\fR. This causes linker
|
2040 |
|
|
errors if these functions are not inlined everywhere they are called.
|
2041 |
|
|
.IP "\fB\-fms\-extensions\fR" 4
|
2042 |
|
|
.IX Item "-fms-extensions"
|
2043 |
|
|
Disable Wpedantic warnings about constructs used in \s-1MFC\s0, such as implicit
|
2044 |
|
|
int and getting a pointer to member function via non-standard syntax.
|
2045 |
|
|
.IP "\fB\-fno\-nonansi\-builtins\fR" 4
|
2046 |
|
|
.IX Item "-fno-nonansi-builtins"
|
2047 |
|
|
Disable built-in declarations of functions that are not mandated by
|
2048 |
|
|
\&\s-1ANSI/ISO\s0 C. These include \f(CW\*(C`ffs\*(C'\fR, \f(CW\*(C`alloca\*(C'\fR, \f(CW\*(C`_exit\*(C'\fR,
|
2049 |
|
|
\&\f(CW\*(C`index\*(C'\fR, \f(CW\*(C`bzero\*(C'\fR, \f(CW\*(C`conjf\*(C'\fR, and other related functions.
|
2050 |
|
|
.IP "\fB\-fnothrow\-opt\fR" 4
|
2051 |
|
|
.IX Item "-fnothrow-opt"
|
2052 |
|
|
Treat a \f(CW\*(C`throw()\*(C'\fR exception specification as if it were a
|
2053 |
|
|
\&\f(CW\*(C`noexcept\*(C'\fR specification to reduce or eliminate the text size
|
2054 |
|
|
overhead relative to a function with no exception specification. If
|
2055 |
|
|
the function has local variables of types with non-trivial
|
2056 |
|
|
destructors, the exception specification actually makes the
|
2057 |
|
|
function smaller because the \s-1EH\s0 cleanups for those variables can be
|
2058 |
|
|
optimized away. The semantic effect is that an exception thrown out of
|
2059 |
|
|
a function with such an exception specification results in a call
|
2060 |
|
|
to \f(CW\*(C`terminate\*(C'\fR rather than \f(CW\*(C`unexpected\*(C'\fR.
|
2061 |
|
|
.IP "\fB\-fno\-operator\-names\fR" 4
|
2062 |
|
|
.IX Item "-fno-operator-names"
|
2063 |
|
|
Do not treat the operator name keywords \f(CW\*(C`and\*(C'\fR, \f(CW\*(C`bitand\*(C'\fR,
|
2064 |
|
|
\&\f(CW\*(C`bitor\*(C'\fR, \f(CW\*(C`compl\*(C'\fR, \f(CW\*(C`not\*(C'\fR, \f(CW\*(C`or\*(C'\fR and \f(CW\*(C`xor\*(C'\fR as
|
2065 |
|
|
synonyms as keywords.
|
2066 |
|
|
.IP "\fB\-fno\-optional\-diags\fR" 4
|
2067 |
|
|
.IX Item "-fno-optional-diags"
|
2068 |
|
|
Disable diagnostics that the standard says a compiler does not need to
|
2069 |
|
|
issue. Currently, the only such diagnostic issued by G++ is the one for
|
2070 |
|
|
a name having multiple meanings within a class.
|
2071 |
|
|
.IP "\fB\-fpermissive\fR" 4
|
2072 |
|
|
.IX Item "-fpermissive"
|
2073 |
|
|
Downgrade some diagnostics about nonconformant code from errors to
|
2074 |
|
|
warnings. Thus, using \fB\-fpermissive\fR allows some
|
2075 |
|
|
nonconforming code to compile.
|
2076 |
|
|
.IP "\fB\-fno\-pretty\-templates\fR" 4
|
2077 |
|
|
.IX Item "-fno-pretty-templates"
|
2078 |
|
|
When an error message refers to a specialization of a function
|
2079 |
|
|
template, the compiler normally prints the signature of the
|
2080 |
|
|
template followed by the template arguments and any typedefs or
|
2081 |
|
|
typenames in the signature (e.g. \f(CW\*(C`void f(T) [with T = int]\*(C'\fR
|
2082 |
|
|
rather than \f(CW\*(C`void f(int)\*(C'\fR) so that it's clear which template is
|
2083 |
|
|
involved. When an error message refers to a specialization of a class
|
2084 |
|
|
template, the compiler omits any template arguments that match
|
2085 |
|
|
the default template arguments for that template. If either of these
|
2086 |
|
|
behaviors make it harder to understand the error message rather than
|
2087 |
|
|
easier, you can use \fB\-fno\-pretty\-templates\fR to disable them.
|
2088 |
|
|
.IP "\fB\-frepo\fR" 4
|
2089 |
|
|
.IX Item "-frepo"
|
2090 |
|
|
Enable automatic template instantiation at link time. This option also
|
2091 |
|
|
implies \fB\-fno\-implicit\-templates\fR.
|
2092 |
|
|
.IP "\fB\-fno\-rtti\fR" 4
|
2093 |
|
|
.IX Item "-fno-rtti"
|
2094 |
|
|
Disable generation of information about every class with virtual
|
2095 |
|
|
functions for use by the \*(C+ run-time type identification features
|
2096 |
|
|
(\fBdynamic_cast\fR and \fBtypeid\fR). If you don't use those parts
|
2097 |
|
|
of the language, you can save some space by using this flag. Note that
|
2098 |
|
|
exception handling uses the same information, but G++ generates it as
|
2099 |
|
|
needed. The \fBdynamic_cast\fR operator can still be used for casts that
|
2100 |
|
|
do not require run-time type information, i.e. casts to \f(CW\*(C`void *\*(C'\fR or to
|
2101 |
|
|
unambiguous base classes.
|
2102 |
|
|
.IP "\fB\-fstats\fR" 4
|
2103 |
|
|
.IX Item "-fstats"
|
2104 |
|
|
Emit statistics about front-end processing at the end of the compilation.
|
2105 |
|
|
This information is generally only useful to the G++ development team.
|
2106 |
|
|
.IP "\fB\-fstrict\-enums\fR" 4
|
2107 |
|
|
.IX Item "-fstrict-enums"
|
2108 |
|
|
Allow the compiler to optimize using the assumption that a value of
|
2109 |
|
|
enumerated type can only be one of the values of the enumeration (as
|
2110 |
|
|
defined in the \*(C+ standard; basically, a value that can be
|
2111 |
|
|
represented in the minimum number of bits needed to represent all the
|
2112 |
|
|
enumerators). This assumption may not be valid if the program uses a
|
2113 |
|
|
cast to convert an arbitrary integer value to the enumerated type.
|
2114 |
|
|
.IP "\fB\-ftemplate\-backtrace\-limit=\fR\fIn\fR" 4
|
2115 |
|
|
.IX Item "-ftemplate-backtrace-limit=n"
|
2116 |
|
|
Set the maximum number of template instantiation notes for a single
|
2117 |
|
|
warning or error to \fIn\fR. The default value is 10.
|
2118 |
|
|
.IP "\fB\-ftemplate\-depth=\fR\fIn\fR" 4
|
2119 |
|
|
.IX Item "-ftemplate-depth=n"
|
2120 |
|
|
Set the maximum instantiation depth for template classes to \fIn\fR.
|
2121 |
|
|
A limit on the template instantiation depth is needed to detect
|
2122 |
|
|
endless recursions during template class instantiation. \s-1ANSI/ISO\s0 \*(C+
|
2123 |
|
|
conforming programs must not rely on a maximum depth greater than 17
|
2124 |
|
|
(changed to 1024 in \*(C+11). The default value is 900, as the compiler
|
2125 |
|
|
can run out of stack space before hitting 1024 in some situations.
|
2126 |
|
|
.IP "\fB\-fno\-threadsafe\-statics\fR" 4
|
2127 |
|
|
.IX Item "-fno-threadsafe-statics"
|
2128 |
|
|
Do not emit the extra code to use the routines specified in the \*(C+
|
2129 |
|
|
\&\s-1ABI\s0 for thread-safe initialization of local statics. You can use this
|
2130 |
|
|
option to reduce code size slightly in code that doesn't need to be
|
2131 |
|
|
thread-safe.
|
2132 |
|
|
.IP "\fB\-fuse\-cxa\-atexit\fR" 4
|
2133 |
|
|
.IX Item "-fuse-cxa-atexit"
|
2134 |
|
|
Register destructors for objects with static storage duration with the
|
2135 |
|
|
\&\f(CW\*(C`_\|_cxa_atexit\*(C'\fR function rather than the \f(CW\*(C`atexit\*(C'\fR function.
|
2136 |
|
|
This option is required for fully standards-compliant handling of static
|
2137 |
|
|
destructors, but only works if your C library supports
|
2138 |
|
|
\&\f(CW\*(C`_\|_cxa_atexit\*(C'\fR.
|
2139 |
|
|
.IP "\fB\-fno\-use\-cxa\-get\-exception\-ptr\fR" 4
|
2140 |
|
|
.IX Item "-fno-use-cxa-get-exception-ptr"
|
2141 |
|
|
Don't use the \f(CW\*(C`_\|_cxa_get_exception_ptr\*(C'\fR runtime routine. This
|
2142 |
|
|
causes \f(CW\*(C`std::uncaught_exception\*(C'\fR to be incorrect, but is necessary
|
2143 |
|
|
if the runtime routine is not available.
|
2144 |
|
|
.IP "\fB\-fvisibility\-inlines\-hidden\fR" 4
|
2145 |
|
|
.IX Item "-fvisibility-inlines-hidden"
|
2146 |
|
|
This switch declares that the user does not attempt to compare
|
2147 |
|
|
pointers to inline functions or methods where the addresses of the two functions
|
2148 |
|
|
are taken in different shared objects.
|
2149 |
|
|
.Sp
|
2150 |
|
|
The effect of this is that \s-1GCC\s0 may, effectively, mark inline methods with
|
2151 |
|
|
\&\f(CW\*(C`_\|_attribute_\|_ ((visibility ("hidden")))\*(C'\fR so that they do not
|
2152 |
|
|
appear in the export table of a \s-1DSO\s0 and do not require a \s-1PLT\s0 indirection
|
2153 |
|
|
when used within the \s-1DSO\s0. Enabling this option can have a dramatic effect
|
2154 |
|
|
on load and link times of a \s-1DSO\s0 as it massively reduces the size of the
|
2155 |
|
|
dynamic export table when the library makes heavy use of templates.
|
2156 |
|
|
.Sp
|
2157 |
|
|
The behavior of this switch is not quite the same as marking the
|
2158 |
|
|
methods as hidden directly, because it does not affect static variables
|
2159 |
|
|
local to the function or cause the compiler to deduce that
|
2160 |
|
|
the function is defined in only one shared object.
|
2161 |
|
|
.Sp
|
2162 |
|
|
You may mark a method as having a visibility explicitly to negate the
|
2163 |
|
|
effect of the switch for that method. For example, if you do want to
|
2164 |
|
|
compare pointers to a particular inline method, you might mark it as
|
2165 |
|
|
having default visibility. Marking the enclosing class with explicit
|
2166 |
|
|
visibility has no effect.
|
2167 |
|
|
.Sp
|
2168 |
|
|
Explicitly instantiated inline methods are unaffected by this option
|
2169 |
|
|
as their linkage might otherwise cross a shared library boundary.
|
2170 |
|
|
.IP "\fB\-fvisibility\-ms\-compat\fR" 4
|
2171 |
|
|
.IX Item "-fvisibility-ms-compat"
|
2172 |
|
|
This flag attempts to use visibility settings to make \s-1GCC\s0's \*(C+
|
2173 |
|
|
linkage model compatible with that of Microsoft Visual Studio.
|
2174 |
|
|
.Sp
|
2175 |
|
|
The flag makes these changes to \s-1GCC\s0's linkage model:
|
2176 |
|
|
.RS 4
|
2177 |
|
|
.IP "1." 4
|
2178 |
|
|
It sets the default visibility to \f(CW\*(C`hidden\*(C'\fR, like
|
2179 |
|
|
\&\fB\-fvisibility=hidden\fR.
|
2180 |
|
|
.IP "2." 4
|
2181 |
|
|
Types, but not their members, are not hidden by default.
|
2182 |
|
|
.IP "3." 4
|
2183 |
|
|
The One Definition Rule is relaxed for types without explicit
|
2184 |
|
|
visibility specifications that are defined in more than one
|
2185 |
|
|
shared object: those declarations are permitted if they are
|
2186 |
|
|
permitted when this option is not used.
|
2187 |
|
|
.RE
|
2188 |
|
|
.RS 4
|
2189 |
|
|
.Sp
|
2190 |
|
|
In new code it is better to use \fB\-fvisibility=hidden\fR and
|
2191 |
|
|
export those classes that are intended to be externally visible.
|
2192 |
|
|
Unfortunately it is possible for code to rely, perhaps accidentally,
|
2193 |
|
|
on the Visual Studio behavior.
|
2194 |
|
|
.Sp
|
2195 |
|
|
Among the consequences of these changes are that static data members
|
2196 |
|
|
of the same type with the same name but defined in different shared
|
2197 |
|
|
objects are different, so changing one does not change the other;
|
2198 |
|
|
and that pointers to function members defined in different shared
|
2199 |
|
|
objects may not compare equal. When this flag is given, it is a
|
2200 |
|
|
violation of the \s-1ODR\s0 to define types with the same name differently.
|
2201 |
|
|
.RE
|
2202 |
|
|
.IP "\fB\-fno\-weak\fR" 4
|
2203 |
|
|
.IX Item "-fno-weak"
|
2204 |
|
|
Do not use weak symbol support, even if it is provided by the linker.
|
2205 |
|
|
By default, G++ uses weak symbols if they are available. This
|
2206 |
|
|
option exists only for testing, and should not be used by end-users;
|
2207 |
|
|
it results in inferior code and has no benefits. This option may
|
2208 |
|
|
be removed in a future release of G++.
|
2209 |
|
|
.IP "\fB\-nostdinc++\fR" 4
|
2210 |
|
|
.IX Item "-nostdinc++"
|
2211 |
|
|
Do not search for header files in the standard directories specific to
|
2212 |
|
|
\&\*(C+, but do still search the other standard directories. (This option
|
2213 |
|
|
is used when building the \*(C+ library.)
|
2214 |
|
|
.PP
|
2215 |
|
|
In addition, these optimization, warning, and code generation options
|
2216 |
|
|
have meanings only for \*(C+ programs:
|
2217 |
|
|
.IP "\fB\-fno\-default\-inline\fR" 4
|
2218 |
|
|
.IX Item "-fno-default-inline"
|
2219 |
|
|
Do not assume \fBinline\fR for functions defined inside a class scope.
|
2220 |
|
|
Note that these
|
2221 |
|
|
functions have linkage like inline functions; they just aren't
|
2222 |
|
|
inlined by default.
|
2223 |
|
|
.IP "\fB\-Wabi\fR (C, Objective-C, \*(C+ and Objective\-\*(C+ only)" 4
|
2224 |
|
|
.IX Item "-Wabi (C, Objective-C, and Objective- only)"
|
2225 |
|
|
Warn when G++ generates code that is probably not compatible with the
|
2226 |
|
|
vendor-neutral \*(C+ \s-1ABI\s0. Although an effort has been made to warn about
|
2227 |
|
|
all such cases, there are probably some cases that are not warned about,
|
2228 |
|
|
even though G++ is generating incompatible code. There may also be
|
2229 |
|
|
cases where warnings are emitted even though the code that is generated
|
2230 |
|
|
is compatible.
|
2231 |
|
|
.Sp
|
2232 |
|
|
You should rewrite your code to avoid these warnings if you are
|
2233 |
|
|
concerned about the fact that code generated by G++ may not be binary
|
2234 |
|
|
compatible with code generated by other compilers.
|
2235 |
|
|
.Sp
|
2236 |
|
|
The known incompatibilities in \fB\-fabi\-version=2\fR (the default) include:
|
2237 |
|
|
.RS 4
|
2238 |
|
|
.IP "\(bu" 4
|
2239 |
|
|
A template with a non-type template parameter of reference type is
|
2240 |
|
|
mangled incorrectly:
|
2241 |
|
|
.Sp
|
2242 |
|
|
.Vb 3
|
2243 |
|
|
\& extern int N;
|
2244 |
|
|
\& template struct S {};
|
2245 |
|
|
\& void n (S) {2}
|
2246 |
|
|
.Ve
|
2247 |
|
|
.Sp
|
2248 |
|
|
This is fixed in \fB\-fabi\-version=3\fR.
|
2249 |
|
|
.IP "\(bu" 4
|
2250 |
|
|
\&\s-1SIMD\s0 vector types declared using \f(CW\*(C`_\|_attribute ((vector_size))\*(C'\fR are
|
2251 |
|
|
mangled in a non-standard way that does not allow for overloading of
|
2252 |
|
|
functions taking vectors of different sizes.
|
2253 |
|
|
.Sp
|
2254 |
|
|
The mangling is changed in \fB\-fabi\-version=4\fR.
|
2255 |
|
|
.RE
|
2256 |
|
|
.RS 4
|
2257 |
|
|
.Sp
|
2258 |
|
|
The known incompatibilities in \fB\-fabi\-version=1\fR include:
|
2259 |
|
|
.IP "\(bu" 4
|
2260 |
|
|
Incorrect handling of tail-padding for bit-fields. G++ may attempt to
|
2261 |
|
|
pack data into the same byte as a base class. For example:
|
2262 |
|
|
.Sp
|
2263 |
|
|
.Vb 2
|
2264 |
|
|
\& struct A { virtual void f(); int f1 : 1; };
|
2265 |
|
|
\& struct B : public A { int f2 : 1; };
|
2266 |
|
|
.Ve
|
2267 |
|
|
.Sp
|
2268 |
|
|
In this case, G++ places \f(CW\*(C`B::f2\*(C'\fR into the same byte
|
2269 |
|
|
as \f(CW\*(C`A::f1\*(C'\fR; other compilers do not. You can avoid this problem
|
2270 |
|
|
by explicitly padding \f(CW\*(C`A\*(C'\fR so that its size is a multiple of the
|
2271 |
|
|
byte size on your platform; that causes G++ and other compilers to
|
2272 |
|
|
lay out \f(CW\*(C`B\*(C'\fR identically.
|
2273 |
|
|
.IP "\(bu" 4
|
2274 |
|
|
Incorrect handling of tail-padding for virtual bases. G++ does not use
|
2275 |
|
|
tail padding when laying out virtual bases. For example:
|
2276 |
|
|
.Sp
|
2277 |
|
|
.Vb 3
|
2278 |
|
|
\& struct A { virtual void f(); char c1; };
|
2279 |
|
|
\& struct B { B(); char c2; };
|
2280 |
|
|
\& struct C : public A, public virtual B {};
|
2281 |
|
|
.Ve
|
2282 |
|
|
.Sp
|
2283 |
|
|
In this case, G++ does not place \f(CW\*(C`B\*(C'\fR into the tail-padding for
|
2284 |
|
|
\&\f(CW\*(C`A\*(C'\fR; other compilers do. You can avoid this problem by
|
2285 |
|
|
explicitly padding \f(CW\*(C`A\*(C'\fR so that its size is a multiple of its
|
2286 |
|
|
alignment (ignoring virtual base classes); that causes G++ and other
|
2287 |
|
|
compilers to lay out \f(CW\*(C`C\*(C'\fR identically.
|
2288 |
|
|
.IP "\(bu" 4
|
2289 |
|
|
Incorrect handling of bit-fields with declared widths greater than that
|
2290 |
|
|
of their underlying types, when the bit-fields appear in a union. For
|
2291 |
|
|
example:
|
2292 |
|
|
.Sp
|
2293 |
|
|
.Vb 1
|
2294 |
|
|
\& union U { int i : 4096; };
|
2295 |
|
|
.Ve
|
2296 |
|
|
.Sp
|
2297 |
|
|
Assuming that an \f(CW\*(C`int\*(C'\fR does not have 4096 bits, G++ makes the
|
2298 |
|
|
union too small by the number of bits in an \f(CW\*(C`int\*(C'\fR.
|
2299 |
|
|
.IP "\(bu" 4
|
2300 |
|
|
Empty classes can be placed at incorrect offsets. For example:
|
2301 |
|
|
.Sp
|
2302 |
|
|
.Vb 1
|
2303 |
|
|
\& struct A {};
|
2304 |
|
|
\&
|
2305 |
|
|
\& struct B {
|
2306 |
|
|
\& A a;
|
2307 |
|
|
\& virtual void f ();
|
2308 |
|
|
\& };
|
2309 |
|
|
\&
|
2310 |
|
|
\& struct C : public B, public A {};
|
2311 |
|
|
.Ve
|
2312 |
|
|
.Sp
|
2313 |
|
|
G++ places the \f(CW\*(C`A\*(C'\fR base class of \f(CW\*(C`C\*(C'\fR at a nonzero offset;
|
2314 |
|
|
it should be placed at offset zero. G++ mistakenly believes that the
|
2315 |
|
|
\&\f(CW\*(C`A\*(C'\fR data member of \f(CW\*(C`B\*(C'\fR is already at offset zero.
|
2316 |
|
|
.IP "\(bu" 4
|
2317 |
|
|
Names of template functions whose types involve \f(CW\*(C`typename\*(C'\fR or
|
2318 |
|
|
template template parameters can be mangled incorrectly.
|
2319 |
|
|
.Sp
|
2320 |
|
|
.Vb 2
|
2321 |
|
|
\& template
|
2322 |
|
|
\& void f(typename Q::X) {}
|
2323 |
|
|
\&
|
2324 |
|
|
\& template class Q>
|
2325 |
|
|
\& void f(typename Q::X) {}
|
2326 |
|
|
.Ve
|
2327 |
|
|
.Sp
|
2328 |
|
|
Instantiations of these templates may be mangled incorrectly.
|
2329 |
|
|
.RE
|
2330 |
|
|
.RS 4
|
2331 |
|
|
.Sp
|
2332 |
|
|
It also warns about psABI-related changes. The known psABI changes at this
|
2333 |
|
|
point include:
|
2334 |
|
|
.IP "\(bu" 4
|
2335 |
|
|
For SysV/x86\-64, unions with \f(CW\*(C`long double\*(C'\fR members are
|
2336 |
|
|
passed in memory as specified in psABI. For example:
|
2337 |
|
|
.Sp
|
2338 |
|
|
.Vb 4
|
2339 |
|
|
\& union U {
|
2340 |
|
|
\& long double ld;
|
2341 |
|
|
\& int i;
|
2342 |
|
|
\& };
|
2343 |
|
|
.Ve
|
2344 |
|
|
.Sp
|
2345 |
|
|
\&\f(CW\*(C`union U\*(C'\fR is always passed in memory.
|
2346 |
|
|
.RE
|
2347 |
|
|
.RS 4
|
2348 |
|
|
.RE
|
2349 |
|
|
.IP "\fB\-Wctor\-dtor\-privacy\fR (\*(C+ and Objective\-\*(C+ only)" 4
|
2350 |
|
|
.IX Item "-Wctor-dtor-privacy ( and Objective- only)"
|
2351 |
|
|
Warn when a class seems unusable because all the constructors or
|
2352 |
|
|
destructors in that class are private, and it has neither friends nor
|
2353 |
|
|
public static member functions.
|
2354 |
|
|
.IP "\fB\-Wdelete\-non\-virtual\-dtor\fR (\*(C+ and Objective\-\*(C+ only)" 4
|
2355 |
|
|
.IX Item "-Wdelete-non-virtual-dtor ( and Objective- only)"
|
2356 |
|
|
Warn when \fBdelete\fR is used to destroy an instance of a class that
|
2357 |
|
|
has virtual functions and non-virtual destructor. It is unsafe to delete
|
2358 |
|
|
an instance of a derived class through a pointer to a base class if the
|
2359 |
|
|
base class does not have a virtual destructor. This warning is enabled
|
2360 |
|
|
by \fB\-Wall\fR.
|
2361 |
|
|
.IP "\fB\-Wliteral\-suffix\fR (\*(C+ and Objective\-\*(C+ only)" 4
|
2362 |
|
|
.IX Item "-Wliteral-suffix ( and Objective- only)"
|
2363 |
|
|
Warn when a string or character literal is followed by a ud-suffix which does
|
2364 |
|
|
not begin with an underscore. As a conforming extension, \s-1GCC\s0 treats such
|
2365 |
|
|
suffixes as separate preprocessing tokens in order to maintain backwards
|
2366 |
|
|
compatibility with code that uses formatting macros from \f(CW\*(C`\*(C'\fR.
|
2367 |
|
|
For example:
|
2368 |
|
|
.Sp
|
2369 |
|
|
.Vb 3
|
2370 |
|
|
\& #define _\|_STDC_FORMAT_MACROS
|
2371 |
|
|
\& #include
|
2372 |
|
|
\& #include
|
2373 |
|
|
\&
|
2374 |
|
|
\& int main() {
|
2375 |
|
|
\& int64_t i64 = 123;
|
2376 |
|
|
\& printf("My int64: %"PRId64"\en", i64);
|
2377 |
|
|
\& }
|
2378 |
|
|
.Ve
|
2379 |
|
|
.Sp
|
2380 |
|
|
In this case, \f(CW\*(C`PRId64\*(C'\fR is treated as a separate preprocessing token.
|
2381 |
|
|
.Sp
|
2382 |
|
|
This warning is enabled by default.
|
2383 |
|
|
.IP "\fB\-Wnarrowing\fR (\*(C+ and Objective\-\*(C+ only)" 4
|
2384 |
|
|
.IX Item "-Wnarrowing ( and Objective- only)"
|
2385 |
|
|
Warn when a narrowing conversion prohibited by \*(C+11 occurs within
|
2386 |
|
|
\&\fB{ }\fR, e.g.
|
2387 |
|
|
.Sp
|
2388 |
|
|
.Vb 1
|
2389 |
|
|
\& int i = { 2.2 }; // error: narrowing from double to int
|
2390 |
|
|
.Ve
|
2391 |
|
|
.Sp
|
2392 |
|
|
This flag is included in \fB\-Wall\fR and \fB\-Wc++11\-compat\fR.
|
2393 |
|
|
.Sp
|
2394 |
|
|
With \fB\-std=c++11\fR, \fB\-Wno\-narrowing\fR suppresses the diagnostic
|
2395 |
|
|
required by the standard. Note that this does not affect the meaning
|
2396 |
|
|
of well-formed code; narrowing conversions are still considered
|
2397 |
|
|
ill-formed in \s-1SFINAE\s0 context.
|
2398 |
|
|
.IP "\fB\-Wnoexcept\fR (\*(C+ and Objective\-\*(C+ only)" 4
|
2399 |
|
|
.IX Item "-Wnoexcept ( and Objective- only)"
|
2400 |
|
|
Warn when a noexcept-expression evaluates to false because of a call
|
2401 |
|
|
to a function that does not have a non-throwing exception
|
2402 |
|
|
specification (i.e. \fB\f(BIthrow()\fB\fR or \fBnoexcept\fR) but is known by
|
2403 |
|
|
the compiler to never throw an exception.
|
2404 |
|
|
.IP "\fB\-Wnon\-virtual\-dtor\fR (\*(C+ and Objective\-\*(C+ only)" 4
|
2405 |
|
|
.IX Item "-Wnon-virtual-dtor ( and Objective- only)"
|
2406 |
|
|
Warn when a class has virtual functions and an accessible non-virtual
|
2407 |
|
|
destructor, in which case it is possible but unsafe to delete
|
2408 |
|
|
an instance of a derived class through a pointer to the base class.
|
2409 |
|
|
This warning is also enabled if \fB\-Weffc++\fR is specified.
|
2410 |
|
|
.IP "\fB\-Wreorder\fR (\*(C+ and Objective\-\*(C+ only)" 4
|
2411 |
|
|
.IX Item "-Wreorder ( and Objective- only)"
|
2412 |
|
|
Warn when the order of member initializers given in the code does not
|
2413 |
|
|
match the order in which they must be executed. For instance:
|
2414 |
|
|
.Sp
|
2415 |
|
|
.Vb 5
|
2416 |
|
|
\& struct A {
|
2417 |
|
|
\& int i;
|
2418 |
|
|
\& int j;
|
2419 |
|
|
\& A(): j (0), i (1) { }
|
2420 |
|
|
\& };
|
2421 |
|
|
.Ve
|
2422 |
|
|
.Sp
|
2423 |
|
|
The compiler rearranges the member initializers for \fBi\fR
|
2424 |
|
|
and \fBj\fR to match the declaration order of the members, emitting
|
2425 |
|
|
a warning to that effect. This warning is enabled by \fB\-Wall\fR.
|
2426 |
|
|
.IP "\fB\-fext\-numeric\-literals\fR (\*(C+ and Objective\-\*(C+ only)" 4
|
2427 |
|
|
.IX Item "-fext-numeric-literals ( and Objective- only)"
|
2428 |
|
|
Accept imaginary, fixed-point, or machine-defined
|
2429 |
|
|
literal number suffixes as \s-1GNU\s0 extensions.
|
2430 |
|
|
When this option is turned off these suffixes are treated
|
2431 |
|
|
as \*(C+11 user-defined literal numeric suffixes.
|
2432 |
|
|
This is on by default for all pre\-\*(C+11 dialects and all \s-1GNU\s0 dialects:
|
2433 |
|
|
\&\fB\-std=c++98\fR, \fB\-std=gnu++98\fR, \fB\-std=gnu++11\fR,
|
2434 |
|
|
\&\fB\-std=gnu++1y\fR.
|
2435 |
|
|
This option is off by default
|
2436 |
|
|
for \s-1ISO\s0 \*(C+11 onwards (\fB\-std=c++11\fR, ...).
|
2437 |
|
|
.PP
|
2438 |
|
|
The following \fB\-W...\fR options are not affected by \fB\-Wall\fR.
|
2439 |
|
|
.IP "\fB\-Weffc++\fR (\*(C+ and Objective\-\*(C+ only)" 4
|
2440 |
|
|
.IX Item "-Weffc++ ( and Objective- only)"
|
2441 |
|
|
Warn about violations of the following style guidelines from Scott Meyers'
|
2442 |
|
|
\&\fIEffective \*(C+, Second Edition\fR book:
|
2443 |
|
|
.RS 4
|
2444 |
|
|
.IP "\(bu" 4
|
2445 |
|
|
Item 11: Define a copy constructor and an assignment operator for classes
|
2446 |
|
|
with dynamically-allocated memory.
|
2447 |
|
|
.IP "\(bu" 4
|
2448 |
|
|
Item 12: Prefer initialization to assignment in constructors.
|
2449 |
|
|
.IP "\(bu" 4
|
2450 |
|
|
Item 14: Make destructors virtual in base classes.
|
2451 |
|
|
.IP "\(bu" 4
|
2452 |
|
|
Item 15: Have \f(CW\*(C`operator=\*(C'\fR return a reference to \f(CW*this\fR.
|
2453 |
|
|
.IP "\(bu" 4
|
2454 |
|
|
Item 23: Don't try to return a reference when you must return an object.
|
2455 |
|
|
.RE
|
2456 |
|
|
.RS 4
|
2457 |
|
|
.Sp
|
2458 |
|
|
Also warn about violations of the following style guidelines from
|
2459 |
|
|
Scott Meyers' \fIMore Effective \*(C+\fR book:
|
2460 |
|
|
.IP "\(bu" 4
|
2461 |
|
|
Item 6: Distinguish between prefix and postfix forms of increment and
|
2462 |
|
|
decrement operators.
|
2463 |
|
|
.IP "\(bu" 4
|
2464 |
|
|
Item 7: Never overload \f(CW\*(C`&&\*(C'\fR, \f(CW\*(C`||\*(C'\fR, or \f(CW\*(C`,\*(C'\fR.
|
2465 |
|
|
.RE
|
2466 |
|
|
.RS 4
|
2467 |
|
|
.Sp
|
2468 |
|
|
When selecting this option, be aware that the standard library
|
2469 |
|
|
headers do not obey all of these guidelines; use \fBgrep \-v\fR
|
2470 |
|
|
to filter out those warnings.
|
2471 |
|
|
.RE
|
2472 |
|
|
.IP "\fB\-Wstrict\-null\-sentinel\fR (\*(C+ and Objective\-\*(C+ only)" 4
|
2473 |
|
|
.IX Item "-Wstrict-null-sentinel ( and Objective- only)"
|
2474 |
|
|
Warn about the use of an uncasted \f(CW\*(C`NULL\*(C'\fR as sentinel. When
|
2475 |
|
|
compiling only with \s-1GCC\s0 this is a valid sentinel, as \f(CW\*(C`NULL\*(C'\fR is defined
|
2476 |
|
|
to \f(CW\*(C`_\|_null\*(C'\fR. Although it is a null pointer constant rather than a
|
2477 |
|
|
null pointer, it is guaranteed to be of the same size as a pointer.
|
2478 |
|
|
But this use is not portable across different compilers.
|
2479 |
|
|
.IP "\fB\-Wno\-non\-template\-friend\fR (\*(C+ and Objective\-\*(C+ only)" 4
|
2480 |
|
|
.IX Item "-Wno-non-template-friend ( and Objective- only)"
|
2481 |
|
|
Disable warnings when non-templatized friend functions are declared
|
2482 |
|
|
within a template. Since the advent of explicit template specification
|
2483 |
|
|
support in G++, if the name of the friend is an unqualified-id (i.e.,
|
2484 |
|
|
\&\fBfriend foo(int)\fR), the \*(C+ language specification demands that the
|
2485 |
|
|
friend declare or define an ordinary, nontemplate function. (Section
|
2486 |
|
|
14.5.3). Before G++ implemented explicit specification, unqualified-ids
|
2487 |
|
|
could be interpreted as a particular specialization of a templatized
|
2488 |
|
|
function. Because this non-conforming behavior is no longer the default
|
2489 |
|
|
behavior for G++, \fB\-Wnon\-template\-friend\fR allows the compiler to
|
2490 |
|
|
check existing code for potential trouble spots and is on by default.
|
2491 |
|
|
This new compiler behavior can be turned off with
|
2492 |
|
|
\&\fB\-Wno\-non\-template\-friend\fR, which keeps the conformant compiler code
|
2493 |
|
|
but disables the helpful warning.
|
2494 |
|
|
.IP "\fB\-Wold\-style\-cast\fR (\*(C+ and Objective\-\*(C+ only)" 4
|
2495 |
|
|
.IX Item "-Wold-style-cast ( and Objective- only)"
|
2496 |
|
|
Warn if an old-style (C\-style) cast to a non-void type is used within
|
2497 |
|
|
a \*(C+ program. The new-style casts (\fBdynamic_cast\fR,
|
2498 |
|
|
\&\fBstatic_cast\fR, \fBreinterpret_cast\fR, and \fBconst_cast\fR) are
|
2499 |
|
|
less vulnerable to unintended effects and much easier to search for.
|
2500 |
|
|
.IP "\fB\-Woverloaded\-virtual\fR (\*(C+ and Objective\-\*(C+ only)" 4
|
2501 |
|
|
.IX Item "-Woverloaded-virtual ( and Objective- only)"
|
2502 |
|
|
Warn when a function declaration hides virtual functions from a
|
2503 |
|
|
base class. For example, in:
|
2504 |
|
|
.Sp
|
2505 |
|
|
.Vb 3
|
2506 |
|
|
\& struct A {
|
2507 |
|
|
\& virtual void f();
|
2508 |
|
|
\& };
|
2509 |
|
|
\&
|
2510 |
|
|
\& struct B: public A {
|
2511 |
|
|
\& void f(int);
|
2512 |
|
|
\& };
|
2513 |
|
|
.Ve
|
2514 |
|
|
.Sp
|
2515 |
|
|
the \f(CW\*(C`A\*(C'\fR class version of \f(CW\*(C`f\*(C'\fR is hidden in \f(CW\*(C`B\*(C'\fR, and code
|
2516 |
|
|
like:
|
2517 |
|
|
.Sp
|
2518 |
|
|
.Vb 2
|
2519 |
|
|
\& B* b;
|
2520 |
|
|
\& b\->f();
|
2521 |
|
|
.Ve
|
2522 |
|
|
.Sp
|
2523 |
|
|
fails to compile.
|
2524 |
|
|
.IP "\fB\-Wno\-pmf\-conversions\fR (\*(C+ and Objective\-\*(C+ only)" 4
|
2525 |
|
|
.IX Item "-Wno-pmf-conversions ( and Objective- only)"
|
2526 |
|
|
Disable the diagnostic for converting a bound pointer to member function
|
2527 |
|
|
to a plain pointer.
|
2528 |
|
|
.IP "\fB\-Wsign\-promo\fR (\*(C+ and Objective\-\*(C+ only)" 4
|
2529 |
|
|
.IX Item "-Wsign-promo ( and Objective- only)"
|
2530 |
|
|
Warn when overload resolution chooses a promotion from unsigned or
|
2531 |
|
|
enumerated type to a signed type, over a conversion to an unsigned type of
|
2532 |
|
|
the same size. Previous versions of G++ tried to preserve
|
2533 |
|
|
unsignedness, but the standard mandates the current behavior.
|
2534 |
|
|
.Sp
|
2535 |
|
|
.Vb 4
|
2536 |
|
|
\& struct A {
|
2537 |
|
|
\& operator int ();
|
2538 |
|
|
\& A& operator = (int);
|
2539 |
|
|
\& };
|
2540 |
|
|
\&
|
2541 |
|
|
\& main ()
|
2542 |
|
|
\& {
|
2543 |
|
|
\& A a,b;
|
2544 |
|
|
\& a = b;
|
2545 |
|
|
\& }
|
2546 |
|
|
.Ve
|
2547 |
|
|
.Sp
|
2548 |
|
|
In this example, G++ synthesizes a default \fBA& operator =
|
2549 |
|
|
(const A&);\fR, while cfront uses the user-defined \fBoperator =\fR.
|
2550 |
|
|
.SS "Options Controlling Objective-C and Objective\-\*(C+ Dialects"
|
2551 |
|
|
.IX Subsection "Options Controlling Objective-C and Objective- Dialects"
|
2552 |
|
|
(\s-1NOTE:\s0 This manual does not describe the Objective-C and Objective\-\*(C+
|
2553 |
|
|
languages themselves.
|
2554 |
|
|
.PP
|
2555 |
|
|
This section describes the command-line options that are only meaningful
|
2556 |
|
|
for Objective-C and Objective\-\*(C+ programs. You can also use most of
|
2557 |
|
|
the language-independent \s-1GNU\s0 compiler options.
|
2558 |
|
|
For example, you might compile a file \f(CW\*(C`some_class.m\*(C'\fR like this:
|
2559 |
|
|
.PP
|
2560 |
|
|
.Vb 1
|
2561 |
|
|
\& gcc \-g \-fgnu\-runtime \-O \-c some_class.m
|
2562 |
|
|
.Ve
|
2563 |
|
|
.PP
|
2564 |
|
|
In this example, \fB\-fgnu\-runtime\fR is an option meant only for
|
2565 |
|
|
Objective-C and Objective\-\*(C+ programs; you can use the other options with
|
2566 |
|
|
any language supported by \s-1GCC\s0.
|
2567 |
|
|
.PP
|
2568 |
|
|
Note that since Objective-C is an extension of the C language, Objective-C
|
2569 |
|
|
compilations may also use options specific to the C front-end (e.g.,
|
2570 |
|
|
\&\fB\-Wtraditional\fR). Similarly, Objective\-\*(C+ compilations may use
|
2571 |
|
|
\&\*(C+\-specific options (e.g., \fB\-Wabi\fR).
|
2572 |
|
|
.PP
|
2573 |
|
|
Here is a list of options that are \fIonly\fR for compiling Objective-C
|
2574 |
|
|
and Objective\-\*(C+ programs:
|
2575 |
|
|
.IP "\fB\-fconstant\-string\-class=\fR\fIclass-name\fR" 4
|
2576 |
|
|
.IX Item "-fconstant-string-class=class-name"
|
2577 |
|
|
Use \fIclass-name\fR as the name of the class to instantiate for each
|
2578 |
|
|
literal string specified with the syntax \f(CW\*(C`@"..."\*(C'\fR. The default
|
2579 |
|
|
class name is \f(CW\*(C`NXConstantString\*(C'\fR if the \s-1GNU\s0 runtime is being used, and
|
2580 |
|
|
\&\f(CW\*(C`NSConstantString\*(C'\fR if the NeXT runtime is being used (see below). The
|
2581 |
|
|
\&\fB\-fconstant\-cfstrings\fR option, if also present, overrides the
|
2582 |
|
|
\&\fB\-fconstant\-string\-class\fR setting and cause \f(CW\*(C`@"..."\*(C'\fR literals
|
2583 |
|
|
to be laid out as constant CoreFoundation strings.
|
2584 |
|
|
.IP "\fB\-fgnu\-runtime\fR" 4
|
2585 |
|
|
.IX Item "-fgnu-runtime"
|
2586 |
|
|
Generate object code compatible with the standard \s-1GNU\s0 Objective-C
|
2587 |
|
|
runtime. This is the default for most types of systems.
|
2588 |
|
|
.IP "\fB\-fnext\-runtime\fR" 4
|
2589 |
|
|
.IX Item "-fnext-runtime"
|
2590 |
|
|
Generate output compatible with the NeXT runtime. This is the default
|
2591 |
|
|
for NeXT-based systems, including Darwin and Mac \s-1OS\s0 X. The macro
|
2592 |
|
|
\&\f(CW\*(C`_\|_NEXT_RUNTIME_\|_\*(C'\fR is predefined if (and only if) this option is
|
2593 |
|
|
used.
|
2594 |
|
|
.IP "\fB\-fno\-nil\-receivers\fR" 4
|
2595 |
|
|
.IX Item "-fno-nil-receivers"
|
2596 |
|
|
Assume that all Objective-C message dispatches (\f(CW\*(C`[receiver
|
2597 |
|
|
message:arg]\*(C'\fR) in this translation unit ensure that the receiver is
|
2598 |
|
|
not \f(CW\*(C`nil\*(C'\fR. This allows for more efficient entry points in the
|
2599 |
|
|
runtime to be used. This option is only available in conjunction with
|
2600 |
|
|
the NeXT runtime and \s-1ABI\s0 version 0 or 1.
|
2601 |
|
|
.IP "\fB\-fobjc\-abi\-version=\fR\fIn\fR" 4
|
2602 |
|
|
.IX Item "-fobjc-abi-version=n"
|
2603 |
|
|
Use version \fIn\fR of the Objective-C \s-1ABI\s0 for the selected runtime.
|
2604 |
|
|
This option is currently supported only for the NeXT runtime. In that
|
2605 |
|
|
case, Version 0 is the traditional (32\-bit) \s-1ABI\s0 without support for
|
2606 |
|
|
properties and other Objective-C 2.0 additions. Version 1 is the
|
2607 |
|
|
traditional (32\-bit) \s-1ABI\s0 with support for properties and other
|
2608 |
|
|
Objective-C 2.0 additions. Version 2 is the modern (64\-bit) \s-1ABI\s0. If
|
2609 |
|
|
nothing is specified, the default is Version 0 on 32\-bit target
|
2610 |
|
|
machines, and Version 2 on 64\-bit target machines.
|
2611 |
|
|
.IP "\fB\-fobjc\-call\-cxx\-cdtors\fR" 4
|
2612 |
|
|
.IX Item "-fobjc-call-cxx-cdtors"
|
2613 |
|
|
For each Objective-C class, check if any of its instance variables is a
|
2614 |
|
|
\&\*(C+ object with a non-trivial default constructor. If so, synthesize a
|
2615 |
|
|
special \f(CW\*(C`\- (id) .cxx_construct\*(C'\fR instance method which runs
|
2616 |
|
|
non-trivial default constructors on any such instance variables, in order,
|
2617 |
|
|
and then return \f(CW\*(C`self\*(C'\fR. Similarly, check if any instance variable
|
2618 |
|
|
is a \*(C+ object with a non-trivial destructor, and if so, synthesize a
|
2619 |
|
|
special \f(CW\*(C`\- (void) .cxx_destruct\*(C'\fR method which runs
|
2620 |
|
|
all such default destructors, in reverse order.
|
2621 |
|
|
.Sp
|
2622 |
|
|
The \f(CW\*(C`\- (id) .cxx_construct\*(C'\fR and \f(CW\*(C`\- (void) .cxx_destruct\*(C'\fR
|
2623 |
|
|
methods thusly generated only operate on instance variables
|
2624 |
|
|
declared in the current Objective-C class, and not those inherited
|
2625 |
|
|
from superclasses. It is the responsibility of the Objective-C
|
2626 |
|
|
runtime to invoke all such methods in an object's inheritance
|
2627 |
|
|
hierarchy. The \f(CW\*(C`\- (id) .cxx_construct\*(C'\fR methods are invoked
|
2628 |
|
|
by the runtime immediately after a new object instance is allocated;
|
2629 |
|
|
the \f(CW\*(C`\- (void) .cxx_destruct\*(C'\fR methods are invoked immediately
|
2630 |
|
|
before the runtime deallocates an object instance.
|
2631 |
|
|
.Sp
|
2632 |
|
|
As of this writing, only the NeXT runtime on Mac \s-1OS\s0 X 10.4 and later has
|
2633 |
|
|
support for invoking the \f(CW\*(C`\- (id) .cxx_construct\*(C'\fR and
|
2634 |
|
|
\&\f(CW\*(C`\- (void) .cxx_destruct\*(C'\fR methods.
|
2635 |
|
|
.IP "\fB\-fobjc\-direct\-dispatch\fR" 4
|
2636 |
|
|
.IX Item "-fobjc-direct-dispatch"
|
2637 |
|
|
Allow fast jumps to the message dispatcher. On Darwin this is
|
2638 |
|
|
accomplished via the comm page.
|
2639 |
|
|
.IP "\fB\-fobjc\-exceptions\fR" 4
|
2640 |
|
|
.IX Item "-fobjc-exceptions"
|
2641 |
|
|
Enable syntactic support for structured exception handling in
|
2642 |
|
|
Objective-C, similar to what is offered by \*(C+ and Java. This option
|
2643 |
|
|
is required to use the Objective-C keywords \f(CW@try\fR,
|
2644 |
|
|
\&\f(CW@throw\fR, \f(CW@catch\fR, \f(CW@finally\fR and
|
2645 |
|
|
\&\f(CW@synchronized\fR. This option is available with both the \s-1GNU\s0
|
2646 |
|
|
runtime and the NeXT runtime (but not available in conjunction with
|
2647 |
|
|
the NeXT runtime on Mac \s-1OS\s0 X 10.2 and earlier).
|
2648 |
|
|
.IP "\fB\-fobjc\-gc\fR" 4
|
2649 |
|
|
.IX Item "-fobjc-gc"
|
2650 |
|
|
Enable garbage collection (\s-1GC\s0) in Objective-C and Objective\-\*(C+
|
2651 |
|
|
programs. This option is only available with the NeXT runtime; the
|
2652 |
|
|
\&\s-1GNU\s0 runtime has a different garbage collection implementation that
|
2653 |
|
|
does not require special compiler flags.
|
2654 |
|
|
.IP "\fB\-fobjc\-nilcheck\fR" 4
|
2655 |
|
|
.IX Item "-fobjc-nilcheck"
|
2656 |
|
|
For the NeXT runtime with version 2 of the \s-1ABI\s0, check for a nil
|
2657 |
|
|
receiver in method invocations before doing the actual method call.
|
2658 |
|
|
This is the default and can be disabled using
|
2659 |
|
|
\&\fB\-fno\-objc\-nilcheck\fR. Class methods and super calls are never
|
2660 |
|
|
checked for nil in this way no matter what this flag is set to.
|
2661 |
|
|
Currently this flag does nothing when the \s-1GNU\s0 runtime, or an older
|
2662 |
|
|
version of the NeXT runtime \s-1ABI\s0, is used.
|
2663 |
|
|
.IP "\fB\-fobjc\-std=objc1\fR" 4
|
2664 |
|
|
.IX Item "-fobjc-std=objc1"
|
2665 |
|
|
Conform to the language syntax of Objective-C 1.0, the language
|
2666 |
|
|
recognized by \s-1GCC\s0 4.0. This only affects the Objective-C additions to
|
2667 |
|
|
the C/\*(C+ language; it does not affect conformance to C/\*(C+ standards,
|
2668 |
|
|
which is controlled by the separate C/\*(C+ dialect option flags. When
|
2669 |
|
|
this option is used with the Objective-C or Objective\-\*(C+ compiler,
|
2670 |
|
|
any Objective-C syntax that is not recognized by \s-1GCC\s0 4.0 is rejected.
|
2671 |
|
|
This is useful if you need to make sure that your Objective-C code can
|
2672 |
|
|
be compiled with older versions of \s-1GCC\s0.
|
2673 |
|
|
.IP "\fB\-freplace\-objc\-classes\fR" 4
|
2674 |
|
|
.IX Item "-freplace-objc-classes"
|
2675 |
|
|
Emit a special marker instructing \fB\f(BIld\fB\|(1)\fR not to statically link in
|
2676 |
|
|
the resulting object file, and allow \fB\f(BIdyld\fB\|(1)\fR to load it in at
|
2677 |
|
|
run time instead. This is used in conjunction with the Fix-and-Continue
|
2678 |
|
|
debugging mode, where the object file in question may be recompiled and
|
2679 |
|
|
dynamically reloaded in the course of program execution, without the need
|
2680 |
|
|
to restart the program itself. Currently, Fix-and-Continue functionality
|
2681 |
|
|
is only available in conjunction with the NeXT runtime on Mac \s-1OS\s0 X 10.3
|
2682 |
|
|
and later.
|
2683 |
|
|
.IP "\fB\-fzero\-link\fR" 4
|
2684 |
|
|
.IX Item "-fzero-link"
|
2685 |
|
|
When compiling for the NeXT runtime, the compiler ordinarily replaces calls
|
2686 |
|
|
to \f(CW\*(C`objc_getClass("...")\*(C'\fR (when the name of the class is known at
|
2687 |
|
|
compile time) with static class references that get initialized at load time,
|
2688 |
|
|
which improves run-time performance. Specifying the \fB\-fzero\-link\fR flag
|
2689 |
|
|
suppresses this behavior and causes calls to \f(CW\*(C`objc_getClass("...")\*(C'\fR
|
2690 |
|
|
to be retained. This is useful in Zero-Link debugging mode, since it allows
|
2691 |
|
|
for individual class implementations to be modified during program execution.
|
2692 |
|
|
The \s-1GNU\s0 runtime currently always retains calls to \f(CW\*(C`objc_get_class("...")\*(C'\fR
|
2693 |
|
|
regardless of command-line options.
|
2694 |
|
|
.IP "\fB\-gen\-decls\fR" 4
|
2695 |
|
|
.IX Item "-gen-decls"
|
2696 |
|
|
Dump interface declarations for all classes seen in the source file to a
|
2697 |
|
|
file named \fI\fIsourcename\fI.decl\fR.
|
2698 |
|
|
.IP "\fB\-Wassign\-intercept\fR (Objective-C and Objective\-\*(C+ only)" 4
|
2699 |
|
|
.IX Item "-Wassign-intercept (Objective-C and Objective- only)"
|
2700 |
|
|
Warn whenever an Objective-C assignment is being intercepted by the
|
2701 |
|
|
garbage collector.
|
2702 |
|
|
.IP "\fB\-Wno\-protocol\fR (Objective-C and Objective\-\*(C+ only)" 4
|
2703 |
|
|
.IX Item "-Wno-protocol (Objective-C and Objective- only)"
|
2704 |
|
|
If a class is declared to implement a protocol, a warning is issued for
|
2705 |
|
|
every method in the protocol that is not implemented by the class. The
|
2706 |
|
|
default behavior is to issue a warning for every method not explicitly
|
2707 |
|
|
implemented in the class, even if a method implementation is inherited
|
2708 |
|
|
from the superclass. If you use the \fB\-Wno\-protocol\fR option, then
|
2709 |
|
|
methods inherited from the superclass are considered to be implemented,
|
2710 |
|
|
and no warning is issued for them.
|
2711 |
|
|
.IP "\fB\-Wselector\fR (Objective-C and Objective\-\*(C+ only)" 4
|
2712 |
|
|
.IX Item "-Wselector (Objective-C and Objective- only)"
|
2713 |
|
|
Warn if multiple methods of different types for the same selector are
|
2714 |
|
|
found during compilation. The check is performed on the list of methods
|
2715 |
|
|
in the final stage of compilation. Additionally, a check is performed
|
2716 |
|
|
for each selector appearing in a \f(CW\*(C`@selector(...)\*(C'\fR
|
2717 |
|
|
expression, and a corresponding method for that selector has been found
|
2718 |
|
|
during compilation. Because these checks scan the method table only at
|
2719 |
|
|
the end of compilation, these warnings are not produced if the final
|
2720 |
|
|
stage of compilation is not reached, for example because an error is
|
2721 |
|
|
found during compilation, or because the \fB\-fsyntax\-only\fR option is
|
2722 |
|
|
being used.
|
2723 |
|
|
.IP "\fB\-Wstrict\-selector\-match\fR (Objective-C and Objective\-\*(C+ only)" 4
|
2724 |
|
|
.IX Item "-Wstrict-selector-match (Objective-C and Objective- only)"
|
2725 |
|
|
Warn if multiple methods with differing argument and/or return types are
|
2726 |
|
|
found for a given selector when attempting to send a message using this
|
2727 |
|
|
selector to a receiver of type \f(CW\*(C`id\*(C'\fR or \f(CW\*(C`Class\*(C'\fR. When this flag
|
2728 |
|
|
is off (which is the default behavior), the compiler omits such warnings
|
2729 |
|
|
if any differences found are confined to types that share the same size
|
2730 |
|
|
and alignment.
|
2731 |
|
|
.IP "\fB\-Wundeclared\-selector\fR (Objective-C and Objective\-\*(C+ only)" 4
|
2732 |
|
|
.IX Item "-Wundeclared-selector (Objective-C and Objective- only)"
|
2733 |
|
|
Warn if a \f(CW\*(C`@selector(...)\*(C'\fR expression referring to an
|
2734 |
|
|
undeclared selector is found. A selector is considered undeclared if no
|
2735 |
|
|
method with that name has been declared before the
|
2736 |
|
|
\&\f(CW\*(C`@selector(...)\*(C'\fR expression, either explicitly in an
|
2737 |
|
|
\&\f(CW@interface\fR or \f(CW@protocol\fR declaration, or implicitly in
|
2738 |
|
|
an \f(CW@implementation\fR section. This option always performs its
|
2739 |
|
|
checks as soon as a \f(CW\*(C`@selector(...)\*(C'\fR expression is found,
|
2740 |
|
|
while \fB\-Wselector\fR only performs its checks in the final stage of
|
2741 |
|
|
compilation. This also enforces the coding style convention
|
2742 |
|
|
that methods and selectors must be declared before being used.
|
2743 |
|
|
.IP "\fB\-print\-objc\-runtime\-info\fR" 4
|
2744 |
|
|
.IX Item "-print-objc-runtime-info"
|
2745 |
|
|
Generate C header describing the largest structure that is passed by
|
2746 |
|
|
value, if any.
|
2747 |
|
|
.SS "Options to Control Diagnostic Messages Formatting"
|
2748 |
|
|
.IX Subsection "Options to Control Diagnostic Messages Formatting"
|
2749 |
|
|
Traditionally, diagnostic messages have been formatted irrespective of
|
2750 |
|
|
the output device's aspect (e.g. its width, ...). You can use the
|
2751 |
|
|
options described below
|
2752 |
|
|
to control the formatting algorithm for diagnostic messages,
|
2753 |
|
|
e.g. how many characters per line, how often source location
|
2754 |
|
|
information should be reported. Note that some language front ends may not
|
2755 |
|
|
honor these options.
|
2756 |
|
|
.IP "\fB\-fmessage\-length=\fR\fIn\fR" 4
|
2757 |
|
|
.IX Item "-fmessage-length=n"
|
2758 |
|
|
Try to format error messages so that they fit on lines of about \fIn\fR
|
2759 |
|
|
characters. The default is 72 characters for \fBg++\fR and 0 for the rest of
|
2760 |
|
|
the front ends supported by \s-1GCC\s0. If \fIn\fR is zero, then no
|
2761 |
|
|
line-wrapping is done; each error message appears on a single
|
2762 |
|
|
line.
|
2763 |
|
|
.IP "\fB\-fdiagnostics\-show\-location=once\fR" 4
|
2764 |
|
|
.IX Item "-fdiagnostics-show-location=once"
|
2765 |
|
|
Only meaningful in line-wrapping mode. Instructs the diagnostic messages
|
2766 |
|
|
reporter to emit source location information \fIonce\fR; that is, in
|
2767 |
|
|
case the message is too long to fit on a single physical line and has to
|
2768 |
|
|
be wrapped, the source location won't be emitted (as prefix) again,
|
2769 |
|
|
over and over, in subsequent continuation lines. This is the default
|
2770 |
|
|
behavior.
|
2771 |
|
|
.IP "\fB\-fdiagnostics\-show\-location=every\-line\fR" 4
|
2772 |
|
|
.IX Item "-fdiagnostics-show-location=every-line"
|
2773 |
|
|
Only meaningful in line-wrapping mode. Instructs the diagnostic
|
2774 |
|
|
messages reporter to emit the same source location information (as
|
2775 |
|
|
prefix) for physical lines that result from the process of breaking
|
2776 |
|
|
a message which is too long to fit on a single line.
|
2777 |
|
|
.IP "\fB\-fno\-diagnostics\-show\-option\fR" 4
|
2778 |
|
|
.IX Item "-fno-diagnostics-show-option"
|
2779 |
|
|
By default, each diagnostic emitted includes text indicating the
|
2780 |
|
|
command-line option that directly controls the diagnostic (if such an
|
2781 |
|
|
option is known to the diagnostic machinery). Specifying the
|
2782 |
|
|
\&\fB\-fno\-diagnostics\-show\-option\fR flag suppresses that behavior.
|
2783 |
|
|
.IP "\fB\-fno\-diagnostics\-show\-caret\fR" 4
|
2784 |
|
|
.IX Item "-fno-diagnostics-show-caret"
|
2785 |
|
|
By default, each diagnostic emitted includes the original source line
|
2786 |
|
|
and a caret '^' indicating the column. This option suppresses this
|
2787 |
|
|
information.
|
2788 |
|
|
.SS "Options to Request or Suppress Warnings"
|
2789 |
|
|
.IX Subsection "Options to Request or Suppress Warnings"
|
2790 |
|
|
Warnings are diagnostic messages that report constructions that
|
2791 |
|
|
are not inherently erroneous but that are risky or suggest there
|
2792 |
|
|
may have been an error.
|
2793 |
|
|
.PP
|
2794 |
|
|
The following language-independent options do not enable specific
|
2795 |
|
|
warnings but control the kinds of diagnostics produced by \s-1GCC\s0.
|
2796 |
|
|
.IP "\fB\-fsyntax\-only\fR" 4
|
2797 |
|
|
.IX Item "-fsyntax-only"
|
2798 |
|
|
Check the code for syntax errors, but don't do anything beyond that.
|
2799 |
|
|
.IP "\fB\-fmax\-errors=\fR\fIn\fR" 4
|
2800 |
|
|
.IX Item "-fmax-errors=n"
|
2801 |
|
|
Limits the maximum number of error messages to \fIn\fR, at which point
|
2802 |
|
|
\&\s-1GCC\s0 bails out rather than attempting to continue processing the source
|
2803 |
|
|
code. If \fIn\fR is 0 (the default), there is no limit on the number
|
2804 |
|
|
of error messages produced. If \fB\-Wfatal\-errors\fR is also
|
2805 |
|
|
specified, then \fB\-Wfatal\-errors\fR takes precedence over this
|
2806 |
|
|
option.
|
2807 |
|
|
.IP "\fB\-w\fR" 4
|
2808 |
|
|
.IX Item "-w"
|
2809 |
|
|
Inhibit all warning messages.
|
2810 |
|
|
.IP "\fB\-Werror\fR" 4
|
2811 |
|
|
.IX Item "-Werror"
|
2812 |
|
|
Make all warnings into errors.
|
2813 |
|
|
.IP "\fB\-Werror=\fR" 4
|
2814 |
|
|
.IX Item "-Werror="
|
2815 |
|
|
Make the specified warning into an error. The specifier for a warning
|
2816 |
|
|
is appended; for example \fB\-Werror=switch\fR turns the warnings
|
2817 |
|
|
controlled by \fB\-Wswitch\fR into errors. This switch takes a
|
2818 |
|
|
negative form, to be used to negate \fB\-Werror\fR for specific
|
2819 |
|
|
warnings; for example \fB\-Wno\-error=switch\fR makes
|
2820 |
|
|
\&\fB\-Wswitch\fR warnings not be errors, even when \fB\-Werror\fR
|
2821 |
|
|
is in effect.
|
2822 |
|
|
.Sp
|
2823 |
|
|
The warning message for each controllable warning includes the
|
2824 |
|
|
option that controls the warning. That option can then be used with
|
2825 |
|
|
\&\fB\-Werror=\fR and \fB\-Wno\-error=\fR as described above.
|
2826 |
|
|
(Printing of the option in the warning message can be disabled using the
|
2827 |
|
|
\&\fB\-fno\-diagnostics\-show\-option\fR flag.)
|
2828 |
|
|
.Sp
|
2829 |
|
|
Note that specifying \fB\-Werror=\fR\fIfoo\fR automatically implies
|
2830 |
|
|
\&\fB\-W\fR\fIfoo\fR. However, \fB\-Wno\-error=\fR\fIfoo\fR does not
|
2831 |
|
|
imply anything.
|
2832 |
|
|
.IP "\fB\-Wfatal\-errors\fR" 4
|
2833 |
|
|
.IX Item "-Wfatal-errors"
|
2834 |
|
|
This option causes the compiler to abort compilation on the first error
|
2835 |
|
|
occurred rather than trying to keep going and printing further error
|
2836 |
|
|
messages.
|
2837 |
|
|
.PP
|
2838 |
|
|
You can request many specific warnings with options beginning with
|
2839 |
|
|
\&\fB\-W\fR, for example \fB\-Wimplicit\fR to request warnings on
|
2840 |
|
|
implicit declarations. Each of these specific warning options also
|
2841 |
|
|
has a negative form beginning \fB\-Wno\-\fR to turn off warnings; for
|
2842 |
|
|
example, \fB\-Wno\-implicit\fR. This manual lists only one of the
|
2843 |
|
|
two forms, whichever is not the default. For further
|
2844 |
|
|
language-specific options also refer to \fB\*(C+ Dialect Options\fR and
|
2845 |
|
|
\&\fBObjective-C and Objective\-\*(C+ Dialect Options\fR.
|
2846 |
|
|
.PP
|
2847 |
|
|
When an unrecognized warning option is requested (e.g.,
|
2848 |
|
|
\&\fB\-Wunknown\-warning\fR), \s-1GCC\s0 emits a diagnostic stating
|
2849 |
|
|
that the option is not recognized. However, if the \fB\-Wno\-\fR form
|
2850 |
|
|
is used, the behavior is slightly different: no diagnostic is
|
2851 |
|
|
produced for \fB\-Wno\-unknown\-warning\fR unless other diagnostics
|
2852 |
|
|
are being produced. This allows the use of new \fB\-Wno\-\fR options
|
2853 |
|
|
with old compilers, but if something goes wrong, the compiler
|
2854 |
|
|
warns that an unrecognized option is present.
|
2855 |
|
|
.IP "\fB\-Wpedantic\fR" 4
|
2856 |
|
|
.IX Item "-Wpedantic"
|
2857 |
|
|
.PD 0
|
2858 |
|
|
.IP "\fB\-pedantic\fR" 4
|
2859 |
|
|
.IX Item "-pedantic"
|
2860 |
|
|
.PD
|
2861 |
|
|
Issue all the warnings demanded by strict \s-1ISO\s0 C and \s-1ISO\s0 \*(C+;
|
2862 |
|
|
reject all programs that use forbidden extensions, and some other
|
2863 |
|
|
programs that do not follow \s-1ISO\s0 C and \s-1ISO\s0 \*(C+. For \s-1ISO\s0 C, follows the
|
2864 |
|
|
version of the \s-1ISO\s0 C standard specified by any \fB\-std\fR option used.
|
2865 |
|
|
.Sp
|
2866 |
|
|
Valid \s-1ISO\s0 C and \s-1ISO\s0 \*(C+ programs should compile properly with or without
|
2867 |
|
|
this option (though a rare few require \fB\-ansi\fR or a
|
2868 |
|
|
\&\fB\-std\fR option specifying the required version of \s-1ISO\s0 C). However,
|
2869 |
|
|
without this option, certain \s-1GNU\s0 extensions and traditional C and \*(C+
|
2870 |
|
|
features are supported as well. With this option, they are rejected.
|
2871 |
|
|
.Sp
|
2872 |
|
|
\&\fB\-Wpedantic\fR does not cause warning messages for use of the
|
2873 |
|
|
alternate keywords whose names begin and end with \fB_\|_\fR. Pedantic
|
2874 |
|
|
warnings are also disabled in the expression that follows
|
2875 |
|
|
\&\f(CW\*(C`_\|_extension_\|_\*(C'\fR. However, only system header files should use
|
2876 |
|
|
these escape routes; application programs should avoid them.
|
2877 |
|
|
.Sp
|
2878 |
|
|
Some users try to use \fB\-Wpedantic\fR to check programs for strict \s-1ISO\s0
|
2879 |
|
|
C conformance. They soon find that it does not do quite what they want:
|
2880 |
|
|
it finds some non-ISO practices, but not all\-\-\-only those for which
|
2881 |
|
|
\&\s-1ISO\s0 C \fIrequires\fR a diagnostic, and some others for which
|
2882 |
|
|
diagnostics have been added.
|
2883 |
|
|
.Sp
|
2884 |
|
|
A feature to report any failure to conform to \s-1ISO\s0 C might be useful in
|
2885 |
|
|
some instances, but would require considerable additional work and would
|
2886 |
|
|
be quite different from \fB\-Wpedantic\fR. We don't have plans to
|
2887 |
|
|
support such a feature in the near future.
|
2888 |
|
|
.Sp
|
2889 |
|
|
Where the standard specified with \fB\-std\fR represents a \s-1GNU\s0
|
2890 |
|
|
extended dialect of C, such as \fBgnu90\fR or \fBgnu99\fR, there is a
|
2891 |
|
|
corresponding \fIbase standard\fR, the version of \s-1ISO\s0 C on which the \s-1GNU\s0
|
2892 |
|
|
extended dialect is based. Warnings from \fB\-Wpedantic\fR are given
|
2893 |
|
|
where they are required by the base standard. (It does not make sense
|
2894 |
|
|
for such warnings to be given only for features not in the specified \s-1GNU\s0
|
2895 |
|
|
C dialect, since by definition the \s-1GNU\s0 dialects of C include all
|
2896 |
|
|
features the compiler supports with the given option, and there would be
|
2897 |
|
|
nothing to warn about.)
|
2898 |
|
|
.IP "\fB\-pedantic\-errors\fR" 4
|
2899 |
|
|
.IX Item "-pedantic-errors"
|
2900 |
|
|
Like \fB\-Wpedantic\fR, except that errors are produced rather than
|
2901 |
|
|
warnings.
|
2902 |
|
|
.IP "\fB\-Wall\fR" 4
|
2903 |
|
|
.IX Item "-Wall"
|
2904 |
|
|
This enables all the warnings about constructions that some users
|
2905 |
|
|
consider questionable, and that are easy to avoid (or modify to
|
2906 |
|
|
prevent the warning), even in conjunction with macros. This also
|
2907 |
|
|
enables some language-specific warnings described in \fB\*(C+ Dialect
|
2908 |
|
|
Options\fR and \fBObjective-C and Objective\-\*(C+ Dialect Options\fR.
|
2909 |
|
|
.Sp
|
2910 |
|
|
\&\fB\-Wall\fR turns on the following warning flags:
|
2911 |
|
|
.Sp
|
2912 |
|
|
\&\fB\-Waddress
|
2913 |
|
|
\&\-Warray\-bounds\fR (only with\fB \fR\fB\-O2\fR)
|
2914 |
|
|
\&\fB\-Wc++11\-compat
|
2915 |
|
|
\&\-Wchar\-subscripts
|
2916 |
|
|
\&\-Wenum\-compare\fR (in C/ObjC; this is on by default in \*(C+)
|
2917 |
|
|
\&\fB\-Wimplicit\-int\fR (C and Objective-C only)
|
2918 |
|
|
\&\fB\-Wimplicit\-function\-declaration\fR (C and Objective-C only)
|
2919 |
|
|
\&\fB\-Wcomment
|
2920 |
|
|
\&\-Wformat
|
2921 |
|
|
\&\-Wmain\fR (only for C/ObjC and unless\fB \fR\fB\-ffreestanding\fR)
|
2922 |
|
|
\&\fB\-Wmaybe\-uninitialized
|
2923 |
|
|
\&\-Wmissing\-braces\fR (only for C/ObjC)
|
2924 |
|
|
\&\fB\-Wnonnull
|
2925 |
|
|
\&\-Wparentheses
|
2926 |
|
|
\&\-Wpointer\-sign
|
2927 |
|
|
\&\-Wreorder
|
2928 |
|
|
\&\-Wreturn\-type
|
2929 |
|
|
\&\-Wsequence\-point
|
2930 |
|
|
\&\-Wsign\-compare\fR (only in \*(C+)
|
2931 |
|
|
\&\fB\-Wstrict\-aliasing
|
2932 |
|
|
\&\-Wstrict\-overflow=1
|
2933 |
|
|
\&\-Wswitch
|
2934 |
|
|
\&\-Wtrigraphs
|
2935 |
|
|
\&\-Wuninitialized
|
2936 |
|
|
\&\-Wunknown\-pragmas
|
2937 |
|
|
\&\-Wunused\-function
|
2938 |
|
|
\&\-Wunused\-label
|
2939 |
|
|
\&\-Wunused\-value
|
2940 |
|
|
\&\-Wunused\-variable
|
2941 |
|
|
\&\-Wvolatile\-register\-var\fR
|
2942 |
|
|
.Sp
|
2943 |
|
|
Note that some warning flags are not implied by \fB\-Wall\fR. Some of
|
2944 |
|
|
them warn about constructions that users generally do not consider
|
2945 |
|
|
questionable, but which occasionally you might wish to check for;
|
2946 |
|
|
others warn about constructions that are necessary or hard to avoid in
|
2947 |
|
|
some cases, and there is no simple way to modify the code to suppress
|
2948 |
|
|
the warning. Some of them are enabled by \fB\-Wextra\fR but many of
|
2949 |
|
|
them must be enabled individually.
|
2950 |
|
|
.IP "\fB\-Wextra\fR" 4
|
2951 |
|
|
.IX Item "-Wextra"
|
2952 |
|
|
This enables some extra warning flags that are not enabled by
|
2953 |
|
|
\&\fB\-Wall\fR. (This option used to be called \fB\-W\fR. The older
|
2954 |
|
|
name is still supported, but the newer name is more descriptive.)
|
2955 |
|
|
.Sp
|
2956 |
|
|
\&\fB\-Wclobbered
|
2957 |
|
|
\&\-Wempty\-body
|
2958 |
|
|
\&\-Wignored\-qualifiers
|
2959 |
|
|
\&\-Wmissing\-field\-initializers
|
2960 |
|
|
\&\-Wmissing\-parameter\-type\fR (C only)
|
2961 |
|
|
\&\fB\-Wold\-style\-declaration\fR (C only)
|
2962 |
|
|
\&\fB\-Woverride\-init
|
2963 |
|
|
\&\-Wsign\-compare
|
2964 |
|
|
\&\-Wtype\-limits
|
2965 |
|
|
\&\-Wuninitialized
|
2966 |
|
|
\&\-Wunused\-parameter\fR (only with\fB \fR\fB\-Wunused\fR\fB \fRor\fB \fR\fB\-Wall\fR)
|
2967 |
|
|
\&\fB\-Wunused\-but\-set\-parameter\fR (only with\fB \fR\fB\-Wunused\fR\fB \fRor\fB \fR\fB\-Wall\fR) \fB \fR
|
2968 |
|
|
.Sp
|
2969 |
|
|
The option \fB\-Wextra\fR also prints warning messages for the
|
2970 |
|
|
following cases:
|
2971 |
|
|
.RS 4
|
2972 |
|
|
.IP "\(bu" 4
|
2973 |
|
|
A pointer is compared against integer zero with \fB<\fR, \fB<=\fR,
|
2974 |
|
|
\&\fB>\fR, or \fB>=\fR.
|
2975 |
|
|
.IP "\(bu" 4
|
2976 |
|
|
(\*(C+ only) An enumerator and a non-enumerator both appear in a
|
2977 |
|
|
conditional expression.
|
2978 |
|
|
.IP "\(bu" 4
|
2979 |
|
|
(\*(C+ only) Ambiguous virtual bases.
|
2980 |
|
|
.IP "\(bu" 4
|
2981 |
|
|
(\*(C+ only) Subscripting an array that has been declared \fBregister\fR.
|
2982 |
|
|
.IP "\(bu" 4
|
2983 |
|
|
(\*(C+ only) Taking the address of a variable that has been declared
|
2984 |
|
|
\&\fBregister\fR.
|
2985 |
|
|
.IP "\(bu" 4
|
2986 |
|
|
(\*(C+ only) A base class is not initialized in a derived class's copy
|
2987 |
|
|
constructor.
|
2988 |
|
|
.RE
|
2989 |
|
|
.RS 4
|
2990 |
|
|
.RE
|
2991 |
|
|
.IP "\fB\-Wchar\-subscripts\fR" 4
|
2992 |
|
|
.IX Item "-Wchar-subscripts"
|
2993 |
|
|
Warn if an array subscript has type \f(CW\*(C`char\*(C'\fR. This is a common cause
|
2994 |
|
|
of error, as programmers often forget that this type is signed on some
|
2995 |
|
|
machines.
|
2996 |
|
|
This warning is enabled by \fB\-Wall\fR.
|
2997 |
|
|
.IP "\fB\-Wcomment\fR" 4
|
2998 |
|
|
.IX Item "-Wcomment"
|
2999 |
|
|
Warn whenever a comment-start sequence \fB/*\fR appears in a \fB/*\fR
|
3000 |
|
|
comment, or whenever a Backslash-Newline appears in a \fB//\fR comment.
|
3001 |
|
|
This warning is enabled by \fB\-Wall\fR.
|
3002 |
|
|
.IP "\fB\-Wno\-coverage\-mismatch\fR" 4
|
3003 |
|
|
.IX Item "-Wno-coverage-mismatch"
|
3004 |
|
|
Warn if feedback profiles do not match when using the
|
3005 |
|
|
\&\fB\-fprofile\-use\fR option.
|
3006 |
|
|
If a source file is changed between compiling with \fB\-fprofile\-gen\fR and
|
3007 |
|
|
with \fB\-fprofile\-use\fR, the files with the profile feedback can fail
|
3008 |
|
|
to match the source file and \s-1GCC\s0 cannot use the profile feedback
|
3009 |
|
|
information. By default, this warning is enabled and is treated as an
|
3010 |
|
|
error. \fB\-Wno\-coverage\-mismatch\fR can be used to disable the
|
3011 |
|
|
warning or \fB\-Wno\-error=coverage\-mismatch\fR can be used to
|
3012 |
|
|
disable the error. Disabling the error for this warning can result in
|
3013 |
|
|
poorly optimized code and is useful only in the
|
3014 |
|
|
case of very minor changes such as bug fixes to an existing code-base.
|
3015 |
|
|
Completely disabling the warning is not recommended.
|
3016 |
|
|
.IP "\fB\-Wno\-cpp\fR" 4
|
3017 |
|
|
.IX Item "-Wno-cpp"
|
3018 |
|
|
(C, Objective-C, \*(C+, Objective\-\*(C+ and Fortran only)
|
3019 |
|
|
.Sp
|
3020 |
|
|
Suppress warning messages emitted by \f(CW\*(C`#warning\*(C'\fR directives.
|
3021 |
|
|
.IP "\fB\-Wdouble\-promotion\fR (C, \*(C+, Objective-C and Objective\-\*(C+ only)" 4
|
3022 |
|
|
.IX Item "-Wdouble-promotion (C, , Objective-C and Objective- only)"
|
3023 |
|
|
Give a warning when a value of type \f(CW\*(C`float\*(C'\fR is implicitly
|
3024 |
|
|
promoted to \f(CW\*(C`double\*(C'\fR. CPUs with a 32\-bit \*(L"single-precision\*(R"
|
3025 |
|
|
floating-point unit implement \f(CW\*(C`float\*(C'\fR in hardware, but emulate
|
3026 |
|
|
\&\f(CW\*(C`double\*(C'\fR in software. On such a machine, doing computations
|
3027 |
|
|
using \f(CW\*(C`double\*(C'\fR values is much more expensive because of the
|
3028 |
|
|
overhead required for software emulation.
|
3029 |
|
|
.Sp
|
3030 |
|
|
It is easy to accidentally do computations with \f(CW\*(C`double\*(C'\fR because
|
3031 |
|
|
floating-point literals are implicitly of type \f(CW\*(C`double\*(C'\fR. For
|
3032 |
|
|
example, in:
|
3033 |
|
|
.Sp
|
3034 |
|
|
.Vb 4
|
3035 |
|
|
\& float area(float radius)
|
3036 |
|
|
\& {
|
3037 |
|
|
\& return 3.14159 * radius * radius;
|
3038 |
|
|
\& }
|
3039 |
|
|
.Ve
|
3040 |
|
|
.Sp
|
3041 |
|
|
the compiler performs the entire computation with \f(CW\*(C`double\*(C'\fR
|
3042 |
|
|
because the floating-point literal is a \f(CW\*(C`double\*(C'\fR.
|
3043 |
|
|
.IP "\fB\-Wformat\fR" 4
|
3044 |
|
|
.IX Item "-Wformat"
|
3045 |
|
|
.PD 0
|
3046 |
|
|
.IP "\fB\-Wformat=\fR\fIn\fR" 4
|
3047 |
|
|
.IX Item "-Wformat=n"
|
3048 |
|
|
.PD
|
3049 |
|
|
Check calls to \f(CW\*(C`printf\*(C'\fR and \f(CW\*(C`scanf\*(C'\fR, etc., to make sure that
|
3050 |
|
|
the arguments supplied have types appropriate to the format string
|
3051 |
|
|
specified, and that the conversions specified in the format string make
|
3052 |
|
|
sense. This includes standard functions, and others specified by format
|
3053 |
|
|
attributes, in the \f(CW\*(C`printf\*(C'\fR,
|
3054 |
|
|
\&\f(CW\*(C`scanf\*(C'\fR, \f(CW\*(C`strftime\*(C'\fR and \f(CW\*(C`strfmon\*(C'\fR (an X/Open extension,
|
3055 |
|
|
not in the C standard) families (or other target-specific families).
|
3056 |
|
|
Which functions are checked without format attributes having been
|
3057 |
|
|
specified depends on the standard version selected, and such checks of
|
3058 |
|
|
functions without the attribute specified are disabled by
|
3059 |
|
|
\&\fB\-ffreestanding\fR or \fB\-fno\-builtin\fR.
|
3060 |
|
|
.Sp
|
3061 |
|
|
The formats are checked against the format features supported by \s-1GNU\s0
|
3062 |
|
|
libc version 2.2. These include all \s-1ISO\s0 C90 and C99 features, as well
|
3063 |
|
|
as features from the Single Unix Specification and some \s-1BSD\s0 and \s-1GNU\s0
|
3064 |
|
|
extensions. Other library implementations may not support all these
|
3065 |
|
|
features; \s-1GCC\s0 does not support warning about features that go beyond a
|
3066 |
|
|
particular library's limitations. However, if \fB\-Wpedantic\fR is used
|
3067 |
|
|
with \fB\-Wformat\fR, warnings are given about format features not
|
3068 |
|
|
in the selected standard version (but not for \f(CW\*(C`strfmon\*(C'\fR formats,
|
3069 |
|
|
since those are not in any version of the C standard).
|
3070 |
|
|
.RS 4
|
3071 |
|
|
.IP "\fB\-Wformat=1\fR" 4
|
3072 |
|
|
.IX Item "-Wformat=1"
|
3073 |
|
|
.PD 0
|
3074 |
|
|
.IP "\fB\-Wformat\fR" 4
|
3075 |
|
|
.IX Item "-Wformat"
|
3076 |
|
|
.PD
|
3077 |
|
|
Option \fB\-Wformat\fR is equivalent to \fB\-Wformat=1\fR, and
|
3078 |
|
|
\&\fB\-Wno\-format\fR is equivalent to \fB\-Wformat=0\fR. Since
|
3079 |
|
|
\&\fB\-Wformat\fR also checks for null format arguments for several
|
3080 |
|
|
functions, \fB\-Wformat\fR also implies \fB\-Wnonnull\fR. Some
|
3081 |
|
|
aspects of this level of format checking can be disabled by the
|
3082 |
|
|
options: \fB\-Wno\-format\-contains\-nul\fR,
|
3083 |
|
|
\&\fB\-Wno\-format\-extra\-args\fR, and \fB\-Wno\-format\-zero\-length\fR.
|
3084 |
|
|
\&\fB\-Wformat\fR is enabled by \fB\-Wall\fR.
|
3085 |
|
|
.IP "\fB\-Wno\-format\-contains\-nul\fR" 4
|
3086 |
|
|
.IX Item "-Wno-format-contains-nul"
|
3087 |
|
|
If \fB\-Wformat\fR is specified, do not warn about format strings that
|
3088 |
|
|
contain \s-1NUL\s0 bytes.
|
3089 |
|
|
.IP "\fB\-Wno\-format\-extra\-args\fR" 4
|
3090 |
|
|
.IX Item "-Wno-format-extra-args"
|
3091 |
|
|
If \fB\-Wformat\fR is specified, do not warn about excess arguments to a
|
3092 |
|
|
\&\f(CW\*(C`printf\*(C'\fR or \f(CW\*(C`scanf\*(C'\fR format function. The C standard specifies
|
3093 |
|
|
that such arguments are ignored.
|
3094 |
|
|
.Sp
|
3095 |
|
|
Where the unused arguments lie between used arguments that are
|
3096 |
|
|
specified with \fB$\fR operand number specifications, normally
|
3097 |
|
|
warnings are still given, since the implementation could not know what
|
3098 |
|
|
type to pass to \f(CW\*(C`va_arg\*(C'\fR to skip the unused arguments. However,
|
3099 |
|
|
in the case of \f(CW\*(C`scanf\*(C'\fR formats, this option suppresses the
|
3100 |
|
|
warning if the unused arguments are all pointers, since the Single
|
3101 |
|
|
Unix Specification says that such unused arguments are allowed.
|
3102 |
|
|
.IP "\fB\-Wno\-format\-zero\-length\fR" 4
|
3103 |
|
|
.IX Item "-Wno-format-zero-length"
|
3104 |
|
|
If \fB\-Wformat\fR is specified, do not warn about zero-length formats.
|
3105 |
|
|
The C standard specifies that zero-length formats are allowed.
|
3106 |
|
|
.IP "\fB\-Wformat=2\fR" 4
|
3107 |
|
|
.IX Item "-Wformat=2"
|
3108 |
|
|
Enable \fB\-Wformat\fR plus additional format checks. Currently
|
3109 |
|
|
equivalent to \fB\-Wformat \-Wformat\-nonliteral \-Wformat\-security
|
3110 |
|
|
\&\-Wformat\-y2k\fR.
|
3111 |
|
|
.IP "\fB\-Wformat\-nonliteral\fR" 4
|
3112 |
|
|
.IX Item "-Wformat-nonliteral"
|
3113 |
|
|
If \fB\-Wformat\fR is specified, also warn if the format string is not a
|
3114 |
|
|
string literal and so cannot be checked, unless the format function
|
3115 |
|
|
takes its format arguments as a \f(CW\*(C`va_list\*(C'\fR.
|
3116 |
|
|
.IP "\fB\-Wformat\-security\fR" 4
|
3117 |
|
|
.IX Item "-Wformat-security"
|
3118 |
|
|
If \fB\-Wformat\fR is specified, also warn about uses of format
|
3119 |
|
|
functions that represent possible security problems. At present, this
|
3120 |
|
|
warns about calls to \f(CW\*(C`printf\*(C'\fR and \f(CW\*(C`scanf\*(C'\fR functions where the
|
3121 |
|
|
format string is not a string literal and there are no format arguments,
|
3122 |
|
|
as in \f(CW\*(C`printf (foo);\*(C'\fR. This may be a security hole if the format
|
3123 |
|
|
string came from untrusted input and contains \fB\f(CB%n\fB\fR. (This is
|
3124 |
|
|
currently a subset of what \fB\-Wformat\-nonliteral\fR warns about, but
|
3125 |
|
|
in future warnings may be added to \fB\-Wformat\-security\fR that are not
|
3126 |
|
|
included in \fB\-Wformat\-nonliteral\fR.)
|
3127 |
|
|
.IP "\fB\-Wformat\-y2k\fR" 4
|
3128 |
|
|
.IX Item "-Wformat-y2k"
|
3129 |
|
|
If \fB\-Wformat\fR is specified, also warn about \f(CW\*(C`strftime\*(C'\fR
|
3130 |
|
|
formats that may yield only a two-digit year.
|
3131 |
|
|
.RE
|
3132 |
|
|
.RS 4
|
3133 |
|
|
.RE
|
3134 |
|
|
.IP "\fB\-Wnonnull\fR" 4
|
3135 |
|
|
.IX Item "-Wnonnull"
|
3136 |
|
|
Warn about passing a null pointer for arguments marked as
|
3137 |
|
|
requiring a non-null value by the \f(CW\*(C`nonnull\*(C'\fR function attribute.
|
3138 |
|
|
.Sp
|
3139 |
|
|
\&\fB\-Wnonnull\fR is included in \fB\-Wall\fR and \fB\-Wformat\fR. It
|
3140 |
|
|
can be disabled with the \fB\-Wno\-nonnull\fR option.
|
3141 |
|
|
.IP "\fB\-Winit\-self\fR (C, \*(C+, Objective-C and Objective\-\*(C+ only)" 4
|
3142 |
|
|
.IX Item "-Winit-self (C, , Objective-C and Objective- only)"
|
3143 |
|
|
Warn about uninitialized variables that are initialized with themselves.
|
3144 |
|
|
Note this option can only be used with the \fB\-Wuninitialized\fR option.
|
3145 |
|
|
.Sp
|
3146 |
|
|
For example, \s-1GCC\s0 warns about \f(CW\*(C`i\*(C'\fR being uninitialized in the
|
3147 |
|
|
following snippet only when \fB\-Winit\-self\fR has been specified:
|
3148 |
|
|
.Sp
|
3149 |
|
|
.Vb 5
|
3150 |
|
|
\& int f()
|
3151 |
|
|
\& {
|
3152 |
|
|
\& int i = i;
|
3153 |
|
|
\& return i;
|
3154 |
|
|
\& }
|
3155 |
|
|
.Ve
|
3156 |
|
|
.Sp
|
3157 |
|
|
This warning is enabled by \fB\-Wall\fR in \*(C+.
|
3158 |
|
|
.IP "\fB\-Wimplicit\-int\fR (C and Objective-C only)" 4
|
3159 |
|
|
.IX Item "-Wimplicit-int (C and Objective-C only)"
|
3160 |
|
|
Warn when a declaration does not specify a type.
|
3161 |
|
|
This warning is enabled by \fB\-Wall\fR.
|
3162 |
|
|
.IP "\fB\-Wimplicit\-function\-declaration\fR (C and Objective-C only)" 4
|
3163 |
|
|
.IX Item "-Wimplicit-function-declaration (C and Objective-C only)"
|
3164 |
|
|
Give a warning whenever a function is used before being declared. In
|
3165 |
|
|
C99 mode (\fB\-std=c99\fR or \fB\-std=gnu99\fR), this warning is
|
3166 |
|
|
enabled by default and it is made into an error by
|
3167 |
|
|
\&\fB\-pedantic\-errors\fR. This warning is also enabled by
|
3168 |
|
|
\&\fB\-Wall\fR.
|
3169 |
|
|
.IP "\fB\-Wimplicit\fR (C and Objective-C only)" 4
|
3170 |
|
|
.IX Item "-Wimplicit (C and Objective-C only)"
|
3171 |
|
|
Same as \fB\-Wimplicit\-int\fR and \fB\-Wimplicit\-function\-declaration\fR.
|
3172 |
|
|
This warning is enabled by \fB\-Wall\fR.
|
3173 |
|
|
.IP "\fB\-Wignored\-qualifiers\fR (C and \*(C+ only)" 4
|
3174 |
|
|
.IX Item "-Wignored-qualifiers (C and only)"
|
3175 |
|
|
Warn if the return type of a function has a type qualifier
|
3176 |
|
|
such as \f(CW\*(C`const\*(C'\fR. For \s-1ISO\s0 C such a type qualifier has no effect,
|
3177 |
|
|
since the value returned by a function is not an lvalue.
|
3178 |
|
|
For \*(C+, the warning is only emitted for scalar types or \f(CW\*(C`void\*(C'\fR.
|
3179 |
|
|
\&\s-1ISO\s0 C prohibits qualified \f(CW\*(C`void\*(C'\fR return types on function
|
3180 |
|
|
definitions, so such return types always receive a warning
|
3181 |
|
|
even without this option.
|
3182 |
|
|
.Sp
|
3183 |
|
|
This warning is also enabled by \fB\-Wextra\fR.
|
3184 |
|
|
.IP "\fB\-Wmain\fR" 4
|
3185 |
|
|
.IX Item "-Wmain"
|
3186 |
|
|
Warn if the type of \fBmain\fR is suspicious. \fBmain\fR should be
|
3187 |
|
|
a function with external linkage, returning int, taking either zero
|
3188 |
|
|
arguments, two, or three arguments of appropriate types. This warning
|
3189 |
|
|
is enabled by default in \*(C+ and is enabled by either \fB\-Wall\fR
|
3190 |
|
|
or \fB\-Wpedantic\fR.
|
3191 |
|
|
.IP "\fB\-Wmissing\-braces\fR" 4
|
3192 |
|
|
.IX Item "-Wmissing-braces"
|
3193 |
|
|
Warn if an aggregate or union initializer is not fully bracketed. In
|
3194 |
|
|
the following example, the initializer for \fBa\fR is not fully
|
3195 |
|
|
bracketed, but that for \fBb\fR is fully bracketed. This warning is
|
3196 |
|
|
enabled by \fB\-Wall\fR in C.
|
3197 |
|
|
.Sp
|
3198 |
|
|
.Vb 2
|
3199 |
|
|
\& int a[2][2] = { 0, 1, 2, 3 };
|
3200 |
|
|
\& int b[2][2] = { { 0, 1 }, { 2, 3 } };
|
3201 |
|
|
.Ve
|
3202 |
|
|
.Sp
|
3203 |
|
|
This warning is enabled by \fB\-Wall\fR.
|
3204 |
|
|
.IP "\fB\-Wmissing\-include\-dirs\fR (C, \*(C+, Objective-C and Objective\-\*(C+ only)" 4
|
3205 |
|
|
.IX Item "-Wmissing-include-dirs (C, , Objective-C and Objective- only)"
|
3206 |
|
|
Warn if a user-supplied include directory does not exist.
|
3207 |
|
|
.IP "\fB\-Wparentheses\fR" 4
|
3208 |
|
|
.IX Item "-Wparentheses"
|
3209 |
|
|
Warn if parentheses are omitted in certain contexts, such
|
3210 |
|
|
as when there is an assignment in a context where a truth value
|
3211 |
|
|
is expected, or when operators are nested whose precedence people
|
3212 |
|
|
often get confused about.
|
3213 |
|
|
.Sp
|
3214 |
|
|
Also warn if a comparison like \fBx<=y<=z\fR appears; this is
|
3215 |
|
|
equivalent to \fB(x<=y ? 1 : 0) <= z\fR, which is a different
|
3216 |
|
|
interpretation from that of ordinary mathematical notation.
|
3217 |
|
|
.Sp
|
3218 |
|
|
Also warn about constructions where there may be confusion to which
|
3219 |
|
|
\&\f(CW\*(C`if\*(C'\fR statement an \f(CW\*(C`else\*(C'\fR branch belongs. Here is an example of
|
3220 |
|
|
such a case:
|
3221 |
|
|
.Sp
|
3222 |
|
|
.Vb 7
|
3223 |
|
|
\& {
|
3224 |
|
|
\& if (a)
|
3225 |
|
|
\& if (b)
|
3226 |
|
|
\& foo ();
|
3227 |
|
|
\& else
|
3228 |
|
|
\& bar ();
|
3229 |
|
|
\& }
|
3230 |
|
|
.Ve
|
3231 |
|
|
.Sp
|
3232 |
|
|
In C/\*(C+, every \f(CW\*(C`else\*(C'\fR branch belongs to the innermost possible
|
3233 |
|
|
\&\f(CW\*(C`if\*(C'\fR statement, which in this example is \f(CW\*(C`if (b)\*(C'\fR. This is
|
3234 |
|
|
often not what the programmer expected, as illustrated in the above
|
3235 |
|
|
example by indentation the programmer chose. When there is the
|
3236 |
|
|
potential for this confusion, \s-1GCC\s0 issues a warning when this flag
|
3237 |
|
|
is specified. To eliminate the warning, add explicit braces around
|
3238 |
|
|
the innermost \f(CW\*(C`if\*(C'\fR statement so there is no way the \f(CW\*(C`else\*(C'\fR
|
3239 |
|
|
can belong to the enclosing \f(CW\*(C`if\*(C'\fR. The resulting code
|
3240 |
|
|
looks like this:
|
3241 |
|
|
.Sp
|
3242 |
|
|
.Vb 9
|
3243 |
|
|
\& {
|
3244 |
|
|
\& if (a)
|
3245 |
|
|
\& {
|
3246 |
|
|
\& if (b)
|
3247 |
|
|
\& foo ();
|
3248 |
|
|
\& else
|
3249 |
|
|
\& bar ();
|
3250 |
|
|
\& }
|
3251 |
|
|
\& }
|
3252 |
|
|
.Ve
|
3253 |
|
|
.Sp
|
3254 |
|
|
Also warn for dangerous uses of the \s-1GNU\s0 extension to
|
3255 |
|
|
\&\f(CW\*(C`?:\*(C'\fR with omitted middle operand. When the condition
|
3256 |
|
|
in the \f(CW\*(C`?\*(C'\fR: operator is a boolean expression, the omitted value is
|
3257 |
|
|
always 1. Often programmers expect it to be a value computed
|
3258 |
|
|
inside the conditional expression instead.
|
3259 |
|
|
.Sp
|
3260 |
|
|
This warning is enabled by \fB\-Wall\fR.
|
3261 |
|
|
.IP "\fB\-Wsequence\-point\fR" 4
|
3262 |
|
|
.IX Item "-Wsequence-point"
|
3263 |
|
|
Warn about code that may have undefined semantics because of violations
|
3264 |
|
|
of sequence point rules in the C and \*(C+ standards.
|
3265 |
|
|
.Sp
|
3266 |
|
|
The C and \*(C+ standards define the order in which expressions in a C/\*(C+
|
3267 |
|
|
program are evaluated in terms of \fIsequence points\fR, which represent
|
3268 |
|
|
a partial ordering between the execution of parts of the program: those
|
3269 |
|
|
executed before the sequence point, and those executed after it. These
|
3270 |
|
|
occur after the evaluation of a full expression (one which is not part
|
3271 |
|
|
of a larger expression), after the evaluation of the first operand of a
|
3272 |
|
|
\&\f(CW\*(C`&&\*(C'\fR, \f(CW\*(C`||\*(C'\fR, \f(CW\*(C`? :\*(C'\fR or \f(CW\*(C`,\*(C'\fR (comma) operator, before a
|
3273 |
|
|
function is called (but after the evaluation of its arguments and the
|
3274 |
|
|
expression denoting the called function), and in certain other places.
|
3275 |
|
|
Other than as expressed by the sequence point rules, the order of
|
3276 |
|
|
evaluation of subexpressions of an expression is not specified. All
|
3277 |
|
|
these rules describe only a partial order rather than a total order,
|
3278 |
|
|
since, for example, if two functions are called within one expression
|
3279 |
|
|
with no sequence point between them, the order in which the functions
|
3280 |
|
|
are called is not specified. However, the standards committee have
|
3281 |
|
|
ruled that function calls do not overlap.
|
3282 |
|
|
.Sp
|
3283 |
|
|
It is not specified when between sequence points modifications to the
|
3284 |
|
|
values of objects take effect. Programs whose behavior depends on this
|
3285 |
|
|
have undefined behavior; the C and \*(C+ standards specify that \*(L"Between
|
3286 |
|
|
the previous and next sequence point an object shall have its stored
|
3287 |
|
|
value modified at most once by the evaluation of an expression.
|
3288 |
|
|
Furthermore, the prior value shall be read only to determine the value
|
3289 |
|
|
to be stored.\*(R". If a program breaks these rules, the results on any
|
3290 |
|
|
particular implementation are entirely unpredictable.
|
3291 |
|
|
.Sp
|
3292 |
|
|
Examples of code with undefined behavior are \f(CW\*(C`a = a++;\*(C'\fR, \f(CW\*(C`a[n]
|
3293 |
|
|
= b[n++]\*(C'\fR and \f(CW\*(C`a[i++] = i;\*(C'\fR. Some more complicated cases are not
|
3294 |
|
|
diagnosed by this option, and it may give an occasional false positive
|
3295 |
|
|
result, but in general it has been found fairly effective at detecting
|
3296 |
|
|
this sort of problem in programs.
|
3297 |
|
|
.Sp
|
3298 |
|
|
The standard is worded confusingly, therefore there is some debate
|
3299 |
|
|
over the precise meaning of the sequence point rules in subtle cases.
|
3300 |
|
|
Links to discussions of the problem, including proposed formal
|
3301 |
|
|
definitions, may be found on the \s-1GCC\s0 readings page, at
|
3302 |
|
|
<\fBhttp://gcc.gnu.org/readings.html\fR>.
|
3303 |
|
|
.Sp
|
3304 |
|
|
This warning is enabled by \fB\-Wall\fR for C and \*(C+.
|
3305 |
|
|
.IP "\fB\-Wno\-return\-local\-addr\fR" 4
|
3306 |
|
|
.IX Item "-Wno-return-local-addr"
|
3307 |
|
|
Do not warn about returning a pointer (or in \*(C+, a reference) to a
|
3308 |
|
|
variable that goes out of scope after the function returns.
|
3309 |
|
|
.IP "\fB\-Wreturn\-type\fR" 4
|
3310 |
|
|
.IX Item "-Wreturn-type"
|
3311 |
|
|
Warn whenever a function is defined with a return type that defaults
|
3312 |
|
|
to \f(CW\*(C`int\*(C'\fR. Also warn about any \f(CW\*(C`return\*(C'\fR statement with no
|
3313 |
|
|
return value in a function whose return type is not \f(CW\*(C`void\*(C'\fR
|
3314 |
|
|
(falling off the end of the function body is considered returning
|
3315 |
|
|
without a value), and about a \f(CW\*(C`return\*(C'\fR statement with an
|
3316 |
|
|
expression in a function whose return type is \f(CW\*(C`void\*(C'\fR.
|
3317 |
|
|
.Sp
|
3318 |
|
|
For \*(C+, a function without return type always produces a diagnostic
|
3319 |
|
|
message, even when \fB\-Wno\-return\-type\fR is specified. The only
|
3320 |
|
|
exceptions are \fBmain\fR and functions defined in system headers.
|
3321 |
|
|
.Sp
|
3322 |
|
|
This warning is enabled by \fB\-Wall\fR.
|
3323 |
|
|
.IP "\fB\-Wswitch\fR" 4
|
3324 |
|
|
.IX Item "-Wswitch"
|
3325 |
|
|
Warn whenever a \f(CW\*(C`switch\*(C'\fR statement has an index of enumerated type
|
3326 |
|
|
and lacks a \f(CW\*(C`case\*(C'\fR for one or more of the named codes of that
|
3327 |
|
|
enumeration. (The presence of a \f(CW\*(C`default\*(C'\fR label prevents this
|
3328 |
|
|
warning.) \f(CW\*(C`case\*(C'\fR labels outside the enumeration range also
|
3329 |
|
|
provoke warnings when this option is used (even if there is a
|
3330 |
|
|
\&\f(CW\*(C`default\*(C'\fR label).
|
3331 |
|
|
This warning is enabled by \fB\-Wall\fR.
|
3332 |
|
|
.IP "\fB\-Wswitch\-default\fR" 4
|
3333 |
|
|
.IX Item "-Wswitch-default"
|
3334 |
|
|
Warn whenever a \f(CW\*(C`switch\*(C'\fR statement does not have a \f(CW\*(C`default\*(C'\fR
|
3335 |
|
|
case.
|
3336 |
|
|
.IP "\fB\-Wswitch\-enum\fR" 4
|
3337 |
|
|
.IX Item "-Wswitch-enum"
|
3338 |
|
|
Warn whenever a \f(CW\*(C`switch\*(C'\fR statement has an index of enumerated type
|
3339 |
|
|
and lacks a \f(CW\*(C`case\*(C'\fR for one or more of the named codes of that
|
3340 |
|
|
enumeration. \f(CW\*(C`case\*(C'\fR labels outside the enumeration range also
|
3341 |
|
|
provoke warnings when this option is used. The only difference
|
3342 |
|
|
between \fB\-Wswitch\fR and this option is that this option gives a
|
3343 |
|
|
warning about an omitted enumeration code even if there is a
|
3344 |
|
|
\&\f(CW\*(C`default\*(C'\fR label.
|
3345 |
|
|
.IP "\fB\-Wsync\-nand\fR (C and \*(C+ only)" 4
|
3346 |
|
|
.IX Item "-Wsync-nand (C and only)"
|
3347 |
|
|
Warn when \f(CW\*(C`_\|_sync_fetch_and_nand\*(C'\fR and \f(CW\*(C`_\|_sync_nand_and_fetch\*(C'\fR
|
3348 |
|
|
built-in functions are used. These functions changed semantics in \s-1GCC\s0 4.4.
|
3349 |
|
|
.IP "\fB\-Wtrigraphs\fR" 4
|
3350 |
|
|
.IX Item "-Wtrigraphs"
|
3351 |
|
|
Warn if any trigraphs are encountered that might change the meaning of
|
3352 |
|
|
the program (trigraphs within comments are not warned about).
|
3353 |
|
|
This warning is enabled by \fB\-Wall\fR.
|
3354 |
|
|
.IP "\fB\-Wunused\-but\-set\-parameter\fR" 4
|
3355 |
|
|
.IX Item "-Wunused-but-set-parameter"
|
3356 |
|
|
Warn whenever a function parameter is assigned to, but otherwise unused
|
3357 |
|
|
(aside from its declaration).
|
3358 |
|
|
.Sp
|
3359 |
|
|
To suppress this warning use the \fBunused\fR attribute.
|
3360 |
|
|
.Sp
|
3361 |
|
|
This warning is also enabled by \fB\-Wunused\fR together with
|
3362 |
|
|
\&\fB\-Wextra\fR.
|
3363 |
|
|
.IP "\fB\-Wunused\-but\-set\-variable\fR" 4
|
3364 |
|
|
.IX Item "-Wunused-but-set-variable"
|
3365 |
|
|
Warn whenever a local variable is assigned to, but otherwise unused
|
3366 |
|
|
(aside from its declaration).
|
3367 |
|
|
This warning is enabled by \fB\-Wall\fR.
|
3368 |
|
|
.Sp
|
3369 |
|
|
To suppress this warning use the \fBunused\fR attribute.
|
3370 |
|
|
.Sp
|
3371 |
|
|
This warning is also enabled by \fB\-Wunused\fR, which is enabled
|
3372 |
|
|
by \fB\-Wall\fR.
|
3373 |
|
|
.IP "\fB\-Wunused\-function\fR" 4
|
3374 |
|
|
.IX Item "-Wunused-function"
|
3375 |
|
|
Warn whenever a static function is declared but not defined or a
|
3376 |
|
|
non-inline static function is unused.
|
3377 |
|
|
This warning is enabled by \fB\-Wall\fR.
|
3378 |
|
|
.IP "\fB\-Wunused\-label\fR" 4
|
3379 |
|
|
.IX Item "-Wunused-label"
|
3380 |
|
|
Warn whenever a label is declared but not used.
|
3381 |
|
|
This warning is enabled by \fB\-Wall\fR.
|
3382 |
|
|
.Sp
|
3383 |
|
|
To suppress this warning use the \fBunused\fR attribute.
|
3384 |
|
|
.IP "\fB\-Wunused\-local\-typedefs\fR (C, Objective-C, \*(C+ and Objective\-\*(C+ only)" 4
|
3385 |
|
|
.IX Item "-Wunused-local-typedefs (C, Objective-C, and Objective- only)"
|
3386 |
|
|
Warn when a typedef locally defined in a function is not used.
|
3387 |
|
|
This warning is enabled by \fB\-Wall\fR.
|
3388 |
|
|
.IP "\fB\-Wunused\-parameter\fR" 4
|
3389 |
|
|
.IX Item "-Wunused-parameter"
|
3390 |
|
|
Warn whenever a function parameter is unused aside from its declaration.
|
3391 |
|
|
.Sp
|
3392 |
|
|
To suppress this warning use the \fBunused\fR attribute.
|
3393 |
|
|
.IP "\fB\-Wno\-unused\-result\fR" 4
|
3394 |
|
|
.IX Item "-Wno-unused-result"
|
3395 |
|
|
Do not warn if a caller of a function marked with attribute
|
3396 |
|
|
\&\f(CW\*(C`warn_unused_result\*(C'\fR does not use
|
3397 |
|
|
its return value. The default is \fB\-Wunused\-result\fR.
|
3398 |
|
|
.IP "\fB\-Wunused\-variable\fR" 4
|
3399 |
|
|
.IX Item "-Wunused-variable"
|
3400 |
|
|
Warn whenever a local variable or non-constant static variable is unused
|
3401 |
|
|
aside from its declaration.
|
3402 |
|
|
This warning is enabled by \fB\-Wall\fR.
|
3403 |
|
|
.Sp
|
3404 |
|
|
To suppress this warning use the \fBunused\fR attribute.
|
3405 |
|
|
.IP "\fB\-Wunused\-value\fR" 4
|
3406 |
|
|
.IX Item "-Wunused-value"
|
3407 |
|
|
Warn whenever a statement computes a result that is explicitly not
|
3408 |
|
|
used. To suppress this warning cast the unused expression to
|
3409 |
|
|
\&\fBvoid\fR. This includes an expression-statement or the left-hand
|
3410 |
|
|
side of a comma expression that contains no side effects. For example,
|
3411 |
|
|
an expression such as \fBx[i,j]\fR causes a warning, while
|
3412 |
|
|
\&\fBx[(void)i,j]\fR does not.
|
3413 |
|
|
.Sp
|
3414 |
|
|
This warning is enabled by \fB\-Wall\fR.
|
3415 |
|
|
.IP "\fB\-Wunused\fR" 4
|
3416 |
|
|
.IX Item "-Wunused"
|
3417 |
|
|
All the above \fB\-Wunused\fR options combined.
|
3418 |
|
|
.Sp
|
3419 |
|
|
In order to get a warning about an unused function parameter, you must
|
3420 |
|
|
either specify \fB\-Wextra \-Wunused\fR (note that \fB\-Wall\fR implies
|
3421 |
|
|
\&\fB\-Wunused\fR), or separately specify \fB\-Wunused\-parameter\fR.
|
3422 |
|
|
.IP "\fB\-Wuninitialized\fR" 4
|
3423 |
|
|
.IX Item "-Wuninitialized"
|
3424 |
|
|
Warn if an automatic variable is used without first being initialized
|
3425 |
|
|
or if a variable may be clobbered by a \f(CW\*(C`setjmp\*(C'\fR call. In \*(C+,
|
3426 |
|
|
warn if a non-static reference or non-static \fBconst\fR member
|
3427 |
|
|
appears in a class without constructors.
|
3428 |
|
|
.Sp
|
3429 |
|
|
If you want to warn about code that uses the uninitialized value of the
|
3430 |
|
|
variable in its own initializer, use the \fB\-Winit\-self\fR option.
|
3431 |
|
|
.Sp
|
3432 |
|
|
These warnings occur for individual uninitialized or clobbered
|
3433 |
|
|
elements of structure, union or array variables as well as for
|
3434 |
|
|
variables that are uninitialized or clobbered as a whole. They do
|
3435 |
|
|
not occur for variables or elements declared \f(CW\*(C`volatile\*(C'\fR. Because
|
3436 |
|
|
these warnings depend on optimization, the exact variables or elements
|
3437 |
|
|
for which there are warnings depends on the precise optimization
|
3438 |
|
|
options and version of \s-1GCC\s0 used.
|
3439 |
|
|
.Sp
|
3440 |
|
|
Note that there may be no warning about a variable that is used only
|
3441 |
|
|
to compute a value that itself is never used, because such
|
3442 |
|
|
computations may be deleted by data flow analysis before the warnings
|
3443 |
|
|
are printed.
|
3444 |
|
|
.IP "\fB\-Wmaybe\-uninitialized\fR" 4
|
3445 |
|
|
.IX Item "-Wmaybe-uninitialized"
|
3446 |
|
|
For an automatic variable, if there exists a path from the function
|
3447 |
|
|
entry to a use of the variable that is initialized, but there exist
|
3448 |
|
|
some other paths for which the variable is not initialized, the compiler
|
3449 |
|
|
emits a warning if it cannot prove the uninitialized paths are not
|
3450 |
|
|
executed at run time. These warnings are made optional because \s-1GCC\s0 is
|
3451 |
|
|
not smart enough to see all the reasons why the code might be correct
|
3452 |
|
|
in spite of appearing to have an error. Here is one example of how
|
3453 |
|
|
this can happen:
|
3454 |
|
|
.Sp
|
3455 |
|
|
.Vb 12
|
3456 |
|
|
\& {
|
3457 |
|
|
\& int x;
|
3458 |
|
|
\& switch (y)
|
3459 |
|
|
\& {
|
3460 |
|
|
\& case 1: x = 1;
|
3461 |
|
|
\& break;
|
3462 |
|
|
\& case 2: x = 4;
|
3463 |
|
|
\& break;
|
3464 |
|
|
\& case 3: x = 5;
|
3465 |
|
|
\& }
|
3466 |
|
|
\& foo (x);
|
3467 |
|
|
\& }
|
3468 |
|
|
.Ve
|
3469 |
|
|
.Sp
|
3470 |
|
|
If the value of \f(CW\*(C`y\*(C'\fR is always 1, 2 or 3, then \f(CW\*(C`x\*(C'\fR is
|
3471 |
|
|
always initialized, but \s-1GCC\s0 doesn't know this. To suppress the
|
3472 |
|
|
warning, you need to provide a default case with \fIassert\fR\|(0) or
|
3473 |
|
|
similar code.
|
3474 |
|
|
.Sp
|
3475 |
|
|
This option also warns when a non-volatile automatic variable might be
|
3476 |
|
|
changed by a call to \f(CW\*(C`longjmp\*(C'\fR. These warnings as well are possible
|
3477 |
|
|
only in optimizing compilation.
|
3478 |
|
|
.Sp
|
3479 |
|
|
The compiler sees only the calls to \f(CW\*(C`setjmp\*(C'\fR. It cannot know
|
3480 |
|
|
where \f(CW\*(C`longjmp\*(C'\fR will be called; in fact, a signal handler could
|
3481 |
|
|
call it at any point in the code. As a result, you may get a warning
|
3482 |
|
|
even when there is in fact no problem because \f(CW\*(C`longjmp\*(C'\fR cannot
|
3483 |
|
|
in fact be called at the place that would cause a problem.
|
3484 |
|
|
.Sp
|
3485 |
|
|
Some spurious warnings can be avoided if you declare all the functions
|
3486 |
|
|
you use that never return as \f(CW\*(C`noreturn\*(C'\fR.
|
3487 |
|
|
.Sp
|
3488 |
|
|
This warning is enabled by \fB\-Wall\fR or \fB\-Wextra\fR.
|
3489 |
|
|
.IP "\fB\-Wunknown\-pragmas\fR" 4
|
3490 |
|
|
.IX Item "-Wunknown-pragmas"
|
3491 |
|
|
Warn when a \f(CW\*(C`#pragma\*(C'\fR directive is encountered that is not understood by
|
3492 |
|
|
\&\s-1GCC\s0. If this command-line option is used, warnings are even issued
|
3493 |
|
|
for unknown pragmas in system header files. This is not the case if
|
3494 |
|
|
the warnings are only enabled by the \fB\-Wall\fR command-line option.
|
3495 |
|
|
.IP "\fB\-Wno\-pragmas\fR" 4
|
3496 |
|
|
.IX Item "-Wno-pragmas"
|
3497 |
|
|
Do not warn about misuses of pragmas, such as incorrect parameters,
|
3498 |
|
|
invalid syntax, or conflicts between pragmas. See also
|
3499 |
|
|
\&\fB\-Wunknown\-pragmas\fR.
|
3500 |
|
|
.IP "\fB\-Wstrict\-aliasing\fR" 4
|
3501 |
|
|
.IX Item "-Wstrict-aliasing"
|
3502 |
|
|
This option is only active when \fB\-fstrict\-aliasing\fR is active.
|
3503 |
|
|
It warns about code that might break the strict aliasing rules that the
|
3504 |
|
|
compiler is using for optimization. The warning does not catch all
|
3505 |
|
|
cases, but does attempt to catch the more common pitfalls. It is
|
3506 |
|
|
included in \fB\-Wall\fR.
|
3507 |
|
|
It is equivalent to \fB\-Wstrict\-aliasing=3\fR
|
3508 |
|
|
.IP "\fB\-Wstrict\-aliasing=n\fR" 4
|
3509 |
|
|
.IX Item "-Wstrict-aliasing=n"
|
3510 |
|
|
This option is only active when \fB\-fstrict\-aliasing\fR is active.
|
3511 |
|
|
It warns about code that might break the strict aliasing rules that the
|
3512 |
|
|
compiler is using for optimization.
|
3513 |
|
|
Higher levels correspond to higher accuracy (fewer false positives).
|
3514 |
|
|
Higher levels also correspond to more effort, similar to the way \fB\-O\fR
|
3515 |
|
|
works.
|
3516 |
|
|
\&\fB\-Wstrict\-aliasing\fR is equivalent to \fB\-Wstrict\-aliasing=3\fR.
|
3517 |
|
|
.Sp
|
3518 |
|
|
Level 1: Most aggressive, quick, least accurate.
|
3519 |
|
|
Possibly useful when higher levels
|
3520 |
|
|
do not warn but \fB\-fstrict\-aliasing\fR still breaks the code, as it has very few
|
3521 |
|
|
false negatives. However, it has many false positives.
|
3522 |
|
|
Warns for all pointer conversions between possibly incompatible types,
|
3523 |
|
|
even if never dereferenced. Runs in the front end only.
|
3524 |
|
|
.Sp
|
3525 |
|
|
Level 2: Aggressive, quick, not too precise.
|
3526 |
|
|
May still have many false positives (not as many as level 1 though),
|
3527 |
|
|
and few false negatives (but possibly more than level 1).
|
3528 |
|
|
Unlike level 1, it only warns when an address is taken. Warns about
|
3529 |
|
|
incomplete types. Runs in the front end only.
|
3530 |
|
|
.Sp
|
3531 |
|
|
Level 3 (default for \fB\-Wstrict\-aliasing\fR):
|
3532 |
|
|
Should have very few false positives and few false
|
3533 |
|
|
negatives. Slightly slower than levels 1 or 2 when optimization is enabled.
|
3534 |
|
|
Takes care of the common pun+dereference pattern in the front end:
|
3535 |
|
|
\&\f(CW\*(C`*(int*)&some_float\*(C'\fR.
|
3536 |
|
|
If optimization is enabled, it also runs in the back end, where it deals
|
3537 |
|
|
with multiple statement cases using flow-sensitive points-to information.
|
3538 |
|
|
Only warns when the converted pointer is dereferenced.
|
3539 |
|
|
Does not warn about incomplete types.
|
3540 |
|
|
.IP "\fB\-Wstrict\-overflow\fR" 4
|
3541 |
|
|
.IX Item "-Wstrict-overflow"
|
3542 |
|
|
.PD 0
|
3543 |
|
|
.IP "\fB\-Wstrict\-overflow=\fR\fIn\fR" 4
|
3544 |
|
|
.IX Item "-Wstrict-overflow=n"
|
3545 |
|
|
.PD
|
3546 |
|
|
This option is only active when \fB\-fstrict\-overflow\fR is active.
|
3547 |
|
|
It warns about cases where the compiler optimizes based on the
|
3548 |
|
|
assumption that signed overflow does not occur. Note that it does not
|
3549 |
|
|
warn about all cases where the code might overflow: it only warns
|
3550 |
|
|
about cases where the compiler implements some optimization. Thus
|
3551 |
|
|
this warning depends on the optimization level.
|
3552 |
|
|
.Sp
|
3553 |
|
|
An optimization that assumes that signed overflow does not occur is
|
3554 |
|
|
perfectly safe if the values of the variables involved are such that
|
3555 |
|
|
overflow never does, in fact, occur. Therefore this warning can
|
3556 |
|
|
easily give a false positive: a warning about code that is not
|
3557 |
|
|
actually a problem. To help focus on important issues, several
|
3558 |
|
|
warning levels are defined. No warnings are issued for the use of
|
3559 |
|
|
undefined signed overflow when estimating how many iterations a loop
|
3560 |
|
|
requires, in particular when determining whether a loop will be
|
3561 |
|
|
executed at all.
|
3562 |
|
|
.RS 4
|
3563 |
|
|
.IP "\fB\-Wstrict\-overflow=1\fR" 4
|
3564 |
|
|
.IX Item "-Wstrict-overflow=1"
|
3565 |
|
|
Warn about cases that are both questionable and easy to avoid. For
|
3566 |
|
|
example, with \fB\-fstrict\-overflow\fR, the compiler simplifies
|
3567 |
|
|
\&\f(CW\*(C`x + 1 > x\*(C'\fR to \f(CW1\fR. This level of
|
3568 |
|
|
\&\fB\-Wstrict\-overflow\fR is enabled by \fB\-Wall\fR; higher levels
|
3569 |
|
|
are not, and must be explicitly requested.
|
3570 |
|
|
.IP "\fB\-Wstrict\-overflow=2\fR" 4
|
3571 |
|
|
.IX Item "-Wstrict-overflow=2"
|
3572 |
|
|
Also warn about other cases where a comparison is simplified to a
|
3573 |
|
|
constant. For example: \f(CW\*(C`abs (x) >= 0\*(C'\fR. This can only be
|
3574 |
|
|
simplified when \fB\-fstrict\-overflow\fR is in effect, because
|
3575 |
|
|
\&\f(CW\*(C`abs (INT_MIN)\*(C'\fR overflows to \f(CW\*(C`INT_MIN\*(C'\fR, which is less than
|
3576 |
|
|
zero. \fB\-Wstrict\-overflow\fR (with no level) is the same as
|
3577 |
|
|
\&\fB\-Wstrict\-overflow=2\fR.
|
3578 |
|
|
.IP "\fB\-Wstrict\-overflow=3\fR" 4
|
3579 |
|
|
.IX Item "-Wstrict-overflow=3"
|
3580 |
|
|
Also warn about other cases where a comparison is simplified. For
|
3581 |
|
|
example: \f(CW\*(C`x + 1 > 1\*(C'\fR is simplified to \f(CW\*(C`x > 0\*(C'\fR.
|
3582 |
|
|
.IP "\fB\-Wstrict\-overflow=4\fR" 4
|
3583 |
|
|
.IX Item "-Wstrict-overflow=4"
|
3584 |
|
|
Also warn about other simplifications not covered by the above cases.
|
3585 |
|
|
For example: \f(CW\*(C`(x * 10) / 5\*(C'\fR is simplified to \f(CW\*(C`x * 2\*(C'\fR.
|
3586 |
|
|
.IP "\fB\-Wstrict\-overflow=5\fR" 4
|
3587 |
|
|
.IX Item "-Wstrict-overflow=5"
|
3588 |
|
|
Also warn about cases where the compiler reduces the magnitude of a
|
3589 |
|
|
constant involved in a comparison. For example: \f(CW\*(C`x + 2 > y\*(C'\fR is
|
3590 |
|
|
simplified to \f(CW\*(C`x + 1 >= y\*(C'\fR. This is reported only at the
|
3591 |
|
|
highest warning level because this simplification applies to many
|
3592 |
|
|
comparisons, so this warning level gives a very large number of
|
3593 |
|
|
false positives.
|
3594 |
|
|
.RE
|
3595 |
|
|
.RS 4
|
3596 |
|
|
.RE
|
3597 |
|
|
.IP "\fB\-Wsuggest\-attribute=\fR[\fBpure\fR|\fBconst\fR|\fBnoreturn\fR|\fBformat\fR]" 4
|
3598 |
|
|
.IX Item "-Wsuggest-attribute=[pure|const|noreturn|format]"
|
3599 |
|
|
Warn for cases where adding an attribute may be beneficial. The
|
3600 |
|
|
attributes currently supported are listed below.
|
3601 |
|
|
.RS 4
|
3602 |
|
|
.IP "\fB\-Wsuggest\-attribute=pure\fR" 4
|
3603 |
|
|
.IX Item "-Wsuggest-attribute=pure"
|
3604 |
|
|
.PD 0
|
3605 |
|
|
.IP "\fB\-Wsuggest\-attribute=const\fR" 4
|
3606 |
|
|
.IX Item "-Wsuggest-attribute=const"
|
3607 |
|
|
.IP "\fB\-Wsuggest\-attribute=noreturn\fR" 4
|
3608 |
|
|
.IX Item "-Wsuggest-attribute=noreturn"
|
3609 |
|
|
.PD
|
3610 |
|
|
Warn about functions that might be candidates for attributes
|
3611 |
|
|
\&\f(CW\*(C`pure\*(C'\fR, \f(CW\*(C`const\*(C'\fR or \f(CW\*(C`noreturn\*(C'\fR. The compiler only warns for
|
3612 |
|
|
functions visible in other compilation units or (in the case of \f(CW\*(C`pure\*(C'\fR and
|
3613 |
|
|
\&\f(CW\*(C`const\*(C'\fR) if it cannot prove that the function returns normally. A function
|
3614 |
|
|
returns normally if it doesn't contain an infinite loop or return abnormally
|
3615 |
|
|
by throwing, calling \f(CW\*(C`abort()\*(C'\fR or trapping. This analysis requires option
|
3616 |
|
|
\&\fB\-fipa\-pure\-const\fR, which is enabled by default at \fB\-O\fR and
|
3617 |
|
|
higher. Higher optimization levels improve the accuracy of the analysis.
|
3618 |
|
|
.IP "\fB\-Wsuggest\-attribute=format\fR" 4
|
3619 |
|
|
.IX Item "-Wsuggest-attribute=format"
|
3620 |
|
|
.PD 0
|
3621 |
|
|
.IP "\fB\-Wmissing\-format\-attribute\fR" 4
|
3622 |
|
|
.IX Item "-Wmissing-format-attribute"
|
3623 |
|
|
.PD
|
3624 |
|
|
Warn about function pointers that might be candidates for \f(CW\*(C`format\*(C'\fR
|
3625 |
|
|
attributes. Note these are only possible candidates, not absolute ones.
|
3626 |
|
|
\&\s-1GCC\s0 guesses that function pointers with \f(CW\*(C`format\*(C'\fR attributes that
|
3627 |
|
|
are used in assignment, initialization, parameter passing or return
|
3628 |
|
|
statements should have a corresponding \f(CW\*(C`format\*(C'\fR attribute in the
|
3629 |
|
|
resulting type. I.e. the left-hand side of the assignment or
|
3630 |
|
|
initialization, the type of the parameter variable, or the return type
|
3631 |
|
|
of the containing function respectively should also have a \f(CW\*(C`format\*(C'\fR
|
3632 |
|
|
attribute to avoid the warning.
|
3633 |
|
|
.Sp
|
3634 |
|
|
\&\s-1GCC\s0 also warns about function definitions that might be
|
3635 |
|
|
candidates for \f(CW\*(C`format\*(C'\fR attributes. Again, these are only
|
3636 |
|
|
possible candidates. \s-1GCC\s0 guesses that \f(CW\*(C`format\*(C'\fR attributes
|
3637 |
|
|
might be appropriate for any function that calls a function like
|
3638 |
|
|
\&\f(CW\*(C`vprintf\*(C'\fR or \f(CW\*(C`vscanf\*(C'\fR, but this might not always be the
|
3639 |
|
|
case, and some functions for which \f(CW\*(C`format\*(C'\fR attributes are
|
3640 |
|
|
appropriate may not be detected.
|
3641 |
|
|
.RE
|
3642 |
|
|
.RS 4
|
3643 |
|
|
.RE
|
3644 |
|
|
.IP "\fB\-Warray\-bounds\fR" 4
|
3645 |
|
|
.IX Item "-Warray-bounds"
|
3646 |
|
|
This option is only active when \fB\-ftree\-vrp\fR is active
|
3647 |
|
|
(default for \fB\-O2\fR and above). It warns about subscripts to arrays
|
3648 |
|
|
that are always out of bounds. This warning is enabled by \fB\-Wall\fR.
|
3649 |
|
|
.IP "\fB\-Wno\-div\-by\-zero\fR" 4
|
3650 |
|
|
.IX Item "-Wno-div-by-zero"
|
3651 |
|
|
Do not warn about compile-time integer division by zero. Floating-point
|
3652 |
|
|
division by zero is not warned about, as it can be a legitimate way of
|
3653 |
|
|
obtaining infinities and NaNs.
|
3654 |
|
|
.IP "\fB\-Wsystem\-headers\fR" 4
|
3655 |
|
|
.IX Item "-Wsystem-headers"
|
3656 |
|
|
Print warning messages for constructs found in system header files.
|
3657 |
|
|
Warnings from system headers are normally suppressed, on the assumption
|
3658 |
|
|
that they usually do not indicate real problems and would only make the
|
3659 |
|
|
compiler output harder to read. Using this command-line option tells
|
3660 |
|
|
\&\s-1GCC\s0 to emit warnings from system headers as if they occurred in user
|
3661 |
|
|
code. However, note that using \fB\-Wall\fR in conjunction with this
|
3662 |
|
|
option does \fInot\fR warn about unknown pragmas in system
|
3663 |
|
|
headers\-\-\-for that, \fB\-Wunknown\-pragmas\fR must also be used.
|
3664 |
|
|
.IP "\fB\-Wtrampolines\fR" 4
|
3665 |
|
|
.IX Item "-Wtrampolines"
|
3666 |
|
|
.Vb 1
|
3667 |
|
|
\& Warn about trampolines generated for pointers to nested functions.
|
3668 |
|
|
\&
|
3669 |
|
|
\& A trampoline is a small piece of data or code that is created at run
|
3670 |
|
|
\& time on the stack when the address of a nested function is taken, and
|
3671 |
|
|
\& is used to call the nested function indirectly. For some targets, it
|
3672 |
|
|
\& is made up of data only and thus requires no special treatment. But,
|
3673 |
|
|
\& for most targets, it is made up of code and thus requires the stack
|
3674 |
|
|
\& to be made executable in order for the program to work properly.
|
3675 |
|
|
.Ve
|
3676 |
|
|
.IP "\fB\-Wfloat\-equal\fR" 4
|
3677 |
|
|
.IX Item "-Wfloat-equal"
|
3678 |
|
|
Warn if floating-point values are used in equality comparisons.
|
3679 |
|
|
.Sp
|
3680 |
|
|
The idea behind this is that sometimes it is convenient (for the
|
3681 |
|
|
programmer) to consider floating-point values as approximations to
|
3682 |
|
|
infinitely precise real numbers. If you are doing this, then you need
|
3683 |
|
|
to compute (by analyzing the code, or in some other way) the maximum or
|
3684 |
|
|
likely maximum error that the computation introduces, and allow for it
|
3685 |
|
|
when performing comparisons (and when producing output, but that's a
|
3686 |
|
|
different problem). In particular, instead of testing for equality, you
|
3687 |
|
|
should check to see whether the two values have ranges that overlap; and
|
3688 |
|
|
this is done with the relational operators, so equality comparisons are
|
3689 |
|
|
probably mistaken.
|
3690 |
|
|
.IP "\fB\-Wtraditional\fR (C and Objective-C only)" 4
|
3691 |
|
|
.IX Item "-Wtraditional (C and Objective-C only)"
|
3692 |
|
|
Warn about certain constructs that behave differently in traditional and
|
3693 |
|
|
\&\s-1ISO\s0 C. Also warn about \s-1ISO\s0 C constructs that have no traditional C
|
3694 |
|
|
equivalent, and/or problematic constructs that should be avoided.
|
3695 |
|
|
.RS 4
|
3696 |
|
|
.IP "\(bu" 4
|
3697 |
|
|
Macro parameters that appear within string literals in the macro body.
|
3698 |
|
|
In traditional C macro replacement takes place within string literals,
|
3699 |
|
|
but in \s-1ISO\s0 C it does not.
|
3700 |
|
|
.IP "\(bu" 4
|
3701 |
|
|
In traditional C, some preprocessor directives did not exist.
|
3702 |
|
|
Traditional preprocessors only considered a line to be a directive
|
3703 |
|
|
if the \fB#\fR appeared in column 1 on the line. Therefore
|
3704 |
|
|
\&\fB\-Wtraditional\fR warns about directives that traditional C
|
3705 |
|
|
understands but ignores because the \fB#\fR does not appear as the
|
3706 |
|
|
first character on the line. It also suggests you hide directives like
|
3707 |
|
|
\&\fB#pragma\fR not understood by traditional C by indenting them. Some
|
3708 |
|
|
traditional implementations do not recognize \fB#elif\fR, so this option
|
3709 |
|
|
suggests avoiding it altogether.
|
3710 |
|
|
.IP "\(bu" 4
|
3711 |
|
|
A function-like macro that appears without arguments.
|
3712 |
|
|
.IP "\(bu" 4
|
3713 |
|
|
The unary plus operator.
|
3714 |
|
|
.IP "\(bu" 4
|
3715 |
|
|
The \fBU\fR integer constant suffix, or the \fBF\fR or \fBL\fR floating-point
|
3716 |
|
|
constant suffixes. (Traditional C does support the \fBL\fR suffix on integer
|
3717 |
|
|
constants.) Note, these suffixes appear in macros defined in the system
|
3718 |
|
|
headers of most modern systems, e.g. the \fB_MIN\fR/\fB_MAX\fR macros in \f(CW\*(C`\*(C'\fR.
|
3719 |
|
|
Use of these macros in user code might normally lead to spurious
|
3720 |
|
|
warnings, however \s-1GCC\s0's integrated preprocessor has enough context to
|
3721 |
|
|
avoid warning in these cases.
|
3722 |
|
|
.IP "\(bu" 4
|
3723 |
|
|
A function declared external in one block and then used after the end of
|
3724 |
|
|
the block.
|
3725 |
|
|
.IP "\(bu" 4
|
3726 |
|
|
A \f(CW\*(C`switch\*(C'\fR statement has an operand of type \f(CW\*(C`long\*(C'\fR.
|
3727 |
|
|
.IP "\(bu" 4
|
3728 |
|
|
A non\-\f(CW\*(C`static\*(C'\fR function declaration follows a \f(CW\*(C`static\*(C'\fR one.
|
3729 |
|
|
This construct is not accepted by some traditional C compilers.
|
3730 |
|
|
.IP "\(bu" 4
|
3731 |
|
|
The \s-1ISO\s0 type of an integer constant has a different width or
|
3732 |
|
|
signedness from its traditional type. This warning is only issued if
|
3733 |
|
|
the base of the constant is ten. I.e. hexadecimal or octal values, which
|
3734 |
|
|
typically represent bit patterns, are not warned about.
|
3735 |
|
|
.IP "\(bu" 4
|
3736 |
|
|
Usage of \s-1ISO\s0 string concatenation is detected.
|
3737 |
|
|
.IP "\(bu" 4
|
3738 |
|
|
Initialization of automatic aggregates.
|
3739 |
|
|
.IP "\(bu" 4
|
3740 |
|
|
Identifier conflicts with labels. Traditional C lacks a separate
|
3741 |
|
|
namespace for labels.
|
3742 |
|
|
.IP "\(bu" 4
|
3743 |
|
|
Initialization of unions. If the initializer is zero, the warning is
|
3744 |
|
|
omitted. This is done under the assumption that the zero initializer in
|
3745 |
|
|
user code appears conditioned on e.g. \f(CW\*(C`_\|_STDC_\|_\*(C'\fR to avoid missing
|
3746 |
|
|
initializer warnings and relies on default initialization to zero in the
|
3747 |
|
|
traditional C case.
|
3748 |
|
|
.IP "\(bu" 4
|
3749 |
|
|
Conversions by prototypes between fixed/floating\-point values and vice
|
3750 |
|
|
versa. The absence of these prototypes when compiling with traditional
|
3751 |
|
|
C causes serious problems. This is a subset of the possible
|
3752 |
|
|
conversion warnings; for the full set use \fB\-Wtraditional\-conversion\fR.
|
3753 |
|
|
.IP "\(bu" 4
|
3754 |
|
|
Use of \s-1ISO\s0 C style function definitions. This warning intentionally is
|
3755 |
|
|
\&\fInot\fR issued for prototype declarations or variadic functions
|
3756 |
|
|
because these \s-1ISO\s0 C features appear in your code when using
|
3757 |
|
|
libiberty's traditional C compatibility macros, \f(CW\*(C`PARAMS\*(C'\fR and
|
3758 |
|
|
\&\f(CW\*(C`VPARAMS\*(C'\fR. This warning is also bypassed for nested functions
|
3759 |
|
|
because that feature is already a \s-1GCC\s0 extension and thus not relevant to
|
3760 |
|
|
traditional C compatibility.
|
3761 |
|
|
.RE
|
3762 |
|
|
.RS 4
|
3763 |
|
|
.RE
|
3764 |
|
|
.IP "\fB\-Wtraditional\-conversion\fR (C and Objective-C only)" 4
|
3765 |
|
|
.IX Item "-Wtraditional-conversion (C and Objective-C only)"
|
3766 |
|
|
Warn if a prototype causes a type conversion that is different from what
|
3767 |
|
|
would happen to the same argument in the absence of a prototype. This
|
3768 |
|
|
includes conversions of fixed point to floating and vice versa, and
|
3769 |
|
|
conversions changing the width or signedness of a fixed-point argument
|
3770 |
|
|
except when the same as the default promotion.
|
3771 |
|
|
.IP "\fB\-Wdeclaration\-after\-statement\fR (C and Objective-C only)" 4
|
3772 |
|
|
.IX Item "-Wdeclaration-after-statement (C and Objective-C only)"
|
3773 |
|
|
Warn when a declaration is found after a statement in a block. This
|
3774 |
|
|
construct, known from \*(C+, was introduced with \s-1ISO\s0 C99 and is by default
|
3775 |
|
|
allowed in \s-1GCC\s0. It is not supported by \s-1ISO\s0 C90 and was not supported by
|
3776 |
|
|
\&\s-1GCC\s0 versions before \s-1GCC\s0 3.0.
|
3777 |
|
|
.IP "\fB\-Wundef\fR" 4
|
3778 |
|
|
.IX Item "-Wundef"
|
3779 |
|
|
Warn if an undefined identifier is evaluated in an \fB#if\fR directive.
|
3780 |
|
|
.IP "\fB\-Wno\-endif\-labels\fR" 4
|
3781 |
|
|
.IX Item "-Wno-endif-labels"
|
3782 |
|
|
Do not warn whenever an \fB#else\fR or an \fB#endif\fR are followed by text.
|
3783 |
|
|
.IP "\fB\-Wshadow\fR" 4
|
3784 |
|
|
.IX Item "-Wshadow"
|
3785 |
|
|
Warn whenever a local variable or type declaration shadows another variable,
|
3786 |
|
|
parameter, type, or class member (in \*(C+), or whenever a built-in function
|
3787 |
|
|
is shadowed. Note that in \*(C+, the compiler warns if a local variable
|
3788 |
|
|
shadows an explicit typedef, but not if it shadows a struct/class/enum.
|
3789 |
|
|
.IP "\fB\-Wlarger\-than=\fR\fIlen\fR" 4
|
3790 |
|
|
.IX Item "-Wlarger-than=len"
|
3791 |
|
|
Warn whenever an object of larger than \fIlen\fR bytes is defined.
|
3792 |
|
|
.IP "\fB\-Wframe\-larger\-than=\fR\fIlen\fR" 4
|
3793 |
|
|
.IX Item "-Wframe-larger-than=len"
|
3794 |
|
|
Warn if the size of a function frame is larger than \fIlen\fR bytes.
|
3795 |
|
|
The computation done to determine the stack frame size is approximate
|
3796 |
|
|
and not conservative.
|
3797 |
|
|
The actual requirements may be somewhat greater than \fIlen\fR
|
3798 |
|
|
even if you do not get a warning. In addition, any space allocated
|
3799 |
|
|
via \f(CW\*(C`alloca\*(C'\fR, variable-length arrays, or related constructs
|
3800 |
|
|
is not included by the compiler when determining
|
3801 |
|
|
whether or not to issue a warning.
|
3802 |
|
|
.IP "\fB\-Wno\-free\-nonheap\-object\fR" 4
|
3803 |
|
|
.IX Item "-Wno-free-nonheap-object"
|
3804 |
|
|
Do not warn when attempting to free an object that was not allocated
|
3805 |
|
|
on the heap.
|
3806 |
|
|
.IP "\fB\-Wstack\-usage=\fR\fIlen\fR" 4
|
3807 |
|
|
.IX Item "-Wstack-usage=len"
|
3808 |
|
|
Warn if the stack usage of a function might be larger than \fIlen\fR bytes.
|
3809 |
|
|
The computation done to determine the stack usage is conservative.
|
3810 |
|
|
Any space allocated via \f(CW\*(C`alloca\*(C'\fR, variable-length arrays, or related
|
3811 |
|
|
constructs is included by the compiler when determining whether or not to
|
3812 |
|
|
issue a warning.
|
3813 |
|
|
.Sp
|
3814 |
|
|
The message is in keeping with the output of \fB\-fstack\-usage\fR.
|
3815 |
|
|
.RS 4
|
3816 |
|
|
.IP "\(bu" 4
|
3817 |
|
|
If the stack usage is fully static but exceeds the specified amount, it's:
|
3818 |
|
|
.Sp
|
3819 |
|
|
.Vb 1
|
3820 |
|
|
\& warning: stack usage is 1120 bytes
|
3821 |
|
|
.Ve
|
3822 |
|
|
.IP "\(bu" 4
|
3823 |
|
|
If the stack usage is (partly) dynamic but bounded, it's:
|
3824 |
|
|
.Sp
|
3825 |
|
|
.Vb 1
|
3826 |
|
|
\& warning: stack usage might be 1648 bytes
|
3827 |
|
|
.Ve
|
3828 |
|
|
.IP "\(bu" 4
|
3829 |
|
|
If the stack usage is (partly) dynamic and not bounded, it's:
|
3830 |
|
|
.Sp
|
3831 |
|
|
.Vb 1
|
3832 |
|
|
\& warning: stack usage might be unbounded
|
3833 |
|
|
.Ve
|
3834 |
|
|
.RE
|
3835 |
|
|
.RS 4
|
3836 |
|
|
.RE
|
3837 |
|
|
.IP "\fB\-Wunsafe\-loop\-optimizations\fR" 4
|
3838 |
|
|
.IX Item "-Wunsafe-loop-optimizations"
|
3839 |
|
|
Warn if the loop cannot be optimized because the compiler cannot
|
3840 |
|
|
assume anything on the bounds of the loop indices. With
|
3841 |
|
|
\&\fB\-funsafe\-loop\-optimizations\fR warn if the compiler makes
|
3842 |
|
|
such assumptions.
|
3843 |
|
|
.IP "\fB\-Wno\-pedantic\-ms\-format\fR (MinGW targets only)" 4
|
3844 |
|
|
.IX Item "-Wno-pedantic-ms-format (MinGW targets only)"
|
3845 |
|
|
When used in combination with \fB\-Wformat\fR
|
3846 |
|
|
and \fB\-pedantic\fR without \s-1GNU\s0 extensions, this option
|
3847 |
|
|
disables the warnings about non-ISO \f(CW\*(C`printf\*(C'\fR / \f(CW\*(C`scanf\*(C'\fR format
|
3848 |
|
|
width specifiers \f(CW\*(C`I32\*(C'\fR, \f(CW\*(C`I64\*(C'\fR, and \f(CW\*(C`I\*(C'\fR used on Windows targets,
|
3849 |
|
|
which depend on the \s-1MS\s0 runtime.
|
3850 |
|
|
.IP "\fB\-Wpointer\-arith\fR" 4
|
3851 |
|
|
.IX Item "-Wpointer-arith"
|
3852 |
|
|
Warn about anything that depends on the \*(L"size of\*(R" a function type or
|
3853 |
|
|
of \f(CW\*(C`void\*(C'\fR. \s-1GNU\s0 C assigns these types a size of 1, for
|
3854 |
|
|
convenience in calculations with \f(CW\*(C`void *\*(C'\fR pointers and pointers
|
3855 |
|
|
to functions. In \*(C+, warn also when an arithmetic operation involves
|
3856 |
|
|
\&\f(CW\*(C`NULL\*(C'\fR. This warning is also enabled by \fB\-Wpedantic\fR.
|
3857 |
|
|
.IP "\fB\-Wtype\-limits\fR" 4
|
3858 |
|
|
.IX Item "-Wtype-limits"
|
3859 |
|
|
Warn if a comparison is always true or always false due to the limited
|
3860 |
|
|
range of the data type, but do not warn for constant expressions. For
|
3861 |
|
|
example, warn if an unsigned variable is compared against zero with
|
3862 |
|
|
\&\fB<\fR or \fB>=\fR. This warning is also enabled by
|
3863 |
|
|
\&\fB\-Wextra\fR.
|
3864 |
|
|
.IP "\fB\-Wbad\-function\-cast\fR (C and Objective-C only)" 4
|
3865 |
|
|
.IX Item "-Wbad-function-cast (C and Objective-C only)"
|
3866 |
|
|
Warn whenever a function call is cast to a non-matching type.
|
3867 |
|
|
For example, warn if \f(CW\*(C`int malloc()\*(C'\fR is cast to \f(CW\*(C`anything *\*(C'\fR.
|
3868 |
|
|
.IP "\fB\-Wc++\-compat\fR (C and Objective-C only)" 4
|
3869 |
|
|
.IX Item "-Wc++-compat (C and Objective-C only)"
|
3870 |
|
|
Warn about \s-1ISO\s0 C constructs that are outside of the common subset of
|
3871 |
|
|
\&\s-1ISO\s0 C and \s-1ISO\s0 \*(C+, e.g. request for implicit conversion from
|
3872 |
|
|
\&\f(CW\*(C`void *\*(C'\fR to a pointer to non\-\f(CW\*(C`void\*(C'\fR type.
|
3873 |
|
|
.IP "\fB\-Wc++11\-compat\fR (\*(C+ and Objective\-\*(C+ only)" 4
|
3874 |
|
|
.IX Item "-Wc++11-compat ( and Objective- only)"
|
3875 |
|
|
Warn about \*(C+ constructs whose meaning differs between \s-1ISO\s0 \*(C+ 1998
|
3876 |
|
|
and \s-1ISO\s0 \*(C+ 2011, e.g., identifiers in \s-1ISO\s0 \*(C+ 1998 that are keywords
|
3877 |
|
|
in \s-1ISO\s0 \*(C+ 2011. This warning turns on \fB\-Wnarrowing\fR and is
|
3878 |
|
|
enabled by \fB\-Wall\fR.
|
3879 |
|
|
.IP "\fB\-Wcast\-qual\fR" 4
|
3880 |
|
|
.IX Item "-Wcast-qual"
|
3881 |
|
|
Warn whenever a pointer is cast so as to remove a type qualifier from
|
3882 |
|
|
the target type. For example, warn if a \f(CW\*(C`const char *\*(C'\fR is cast
|
3883 |
|
|
to an ordinary \f(CW\*(C`char *\*(C'\fR.
|
3884 |
|
|
.Sp
|
3885 |
|
|
Also warn when making a cast that introduces a type qualifier in an
|
3886 |
|
|
unsafe way. For example, casting \f(CW\*(C`char **\*(C'\fR to \f(CW\*(C`const char **\*(C'\fR
|
3887 |
|
|
is unsafe, as in this example:
|
3888 |
|
|
.Sp
|
3889 |
|
|
.Vb 6
|
3890 |
|
|
\& /* p is char ** value. */
|
3891 |
|
|
\& const char **q = (const char **) p;
|
3892 |
|
|
\& /* Assignment of readonly string to const char * is OK. */
|
3893 |
|
|
\& *q = "string";
|
3894 |
|
|
\& /* Now char** pointer points to read\-only memory. */
|
3895 |
|
|
\& **p = \*(Aqb\*(Aq;
|
3896 |
|
|
.Ve
|
3897 |
|
|
.IP "\fB\-Wcast\-align\fR" 4
|
3898 |
|
|
.IX Item "-Wcast-align"
|
3899 |
|
|
Warn whenever a pointer is cast such that the required alignment of the
|
3900 |
|
|
target is increased. For example, warn if a \f(CW\*(C`char *\*(C'\fR is cast to
|
3901 |
|
|
an \f(CW\*(C`int *\*(C'\fR on machines where integers can only be accessed at
|
3902 |
|
|
two\- or four-byte boundaries.
|
3903 |
|
|
.IP "\fB\-Wwrite\-strings\fR" 4
|
3904 |
|
|
.IX Item "-Wwrite-strings"
|
3905 |
|
|
When compiling C, give string constants the type \f(CW\*(C`const
|
3906 |
|
|
char[\f(CIlength\f(CW]\*(C'\fR so that copying the address of one into a
|
3907 |
|
|
non\-\f(CW\*(C`const\*(C'\fR \f(CW\*(C`char *\*(C'\fR pointer produces a warning. These
|
3908 |
|
|
warnings help you find at compile time code that can try to write
|
3909 |
|
|
into a string constant, but only if you have been very careful about
|
3910 |
|
|
using \f(CW\*(C`const\*(C'\fR in declarations and prototypes. Otherwise, it is
|
3911 |
|
|
just a nuisance. This is why we did not make \fB\-Wall\fR request
|
3912 |
|
|
these warnings.
|
3913 |
|
|
.Sp
|
3914 |
|
|
When compiling \*(C+, warn about the deprecated conversion from string
|
3915 |
|
|
literals to \f(CW\*(C`char *\*(C'\fR. This warning is enabled by default for \*(C+
|
3916 |
|
|
programs.
|
3917 |
|
|
.IP "\fB\-Wclobbered\fR" 4
|
3918 |
|
|
.IX Item "-Wclobbered"
|
3919 |
|
|
Warn for variables that might be changed by \fBlongjmp\fR or
|
3920 |
|
|
\&\fBvfork\fR. This warning is also enabled by \fB\-Wextra\fR.
|
3921 |
|
|
.IP "\fB\-Wconversion\fR" 4
|
3922 |
|
|
.IX Item "-Wconversion"
|
3923 |
|
|
Warn for implicit conversions that may alter a value. This includes
|
3924 |
|
|
conversions between real and integer, like \f(CW\*(C`abs (x)\*(C'\fR when
|
3925 |
|
|
\&\f(CW\*(C`x\*(C'\fR is \f(CW\*(C`double\*(C'\fR; conversions between signed and unsigned,
|
3926 |
|
|
like \f(CW\*(C`unsigned ui = \-1\*(C'\fR; and conversions to smaller types, like
|
3927 |
|
|
\&\f(CW\*(C`sqrtf (M_PI)\*(C'\fR. Do not warn for explicit casts like \f(CW\*(C`abs
|
3928 |
|
|
((int) x)\*(C'\fR and \f(CW\*(C`ui = (unsigned) \-1\*(C'\fR, or if the value is not
|
3929 |
|
|
changed by the conversion like in \f(CW\*(C`abs (2.0)\*(C'\fR. Warnings about
|
3930 |
|
|
conversions between signed and unsigned integers can be disabled by
|
3931 |
|
|
using \fB\-Wno\-sign\-conversion\fR.
|
3932 |
|
|
.Sp
|
3933 |
|
|
For \*(C+, also warn for confusing overload resolution for user-defined
|
3934 |
|
|
conversions; and conversions that never use a type conversion
|
3935 |
|
|
operator: conversions to \f(CW\*(C`void\*(C'\fR, the same type, a base class or a
|
3936 |
|
|
reference to them. Warnings about conversions between signed and
|
3937 |
|
|
unsigned integers are disabled by default in \*(C+ unless
|
3938 |
|
|
\&\fB\-Wsign\-conversion\fR is explicitly enabled.
|
3939 |
|
|
.IP "\fB\-Wno\-conversion\-null\fR (\*(C+ and Objective\-\*(C+ only)" 4
|
3940 |
|
|
.IX Item "-Wno-conversion-null ( and Objective- only)"
|
3941 |
|
|
Do not warn for conversions between \f(CW\*(C`NULL\*(C'\fR and non-pointer
|
3942 |
|
|
types. \fB\-Wconversion\-null\fR is enabled by default.
|
3943 |
|
|
.IP "\fB\-Wzero\-as\-null\-pointer\-constant\fR (\*(C+ and Objective\-\*(C+ only)" 4
|
3944 |
|
|
.IX Item "-Wzero-as-null-pointer-constant ( and Objective- only)"
|
3945 |
|
|
Warn when a literal '0' is used as null pointer constant. This can
|
3946 |
|
|
be useful to facilitate the conversion to \f(CW\*(C`nullptr\*(C'\fR in \*(C+11.
|
3947 |
|
|
.IP "\fB\-Wuseless\-cast\fR (\*(C+ and Objective\-\*(C+ only)" 4
|
3948 |
|
|
.IX Item "-Wuseless-cast ( and Objective- only)"
|
3949 |
|
|
Warn when an expression is casted to its own type.
|
3950 |
|
|
.IP "\fB\-Wempty\-body\fR" 4
|
3951 |
|
|
.IX Item "-Wempty-body"
|
3952 |
|
|
Warn if an empty body occurs in an \fBif\fR, \fBelse\fR or \fBdo
|
3953 |
|
|
while\fR statement. This warning is also enabled by \fB\-Wextra\fR.
|
3954 |
|
|
.IP "\fB\-Wenum\-compare\fR" 4
|
3955 |
|
|
.IX Item "-Wenum-compare"
|
3956 |
|
|
Warn about a comparison between values of different enumerated types.
|
3957 |
|
|
In \*(C+ enumeral mismatches in conditional expressions are also
|
3958 |
|
|
diagnosed and the warning is enabled by default. In C this warning is
|
3959 |
|
|
enabled by \fB\-Wall\fR.
|
3960 |
|
|
.IP "\fB\-Wjump\-misses\-init\fR (C, Objective-C only)" 4
|
3961 |
|
|
.IX Item "-Wjump-misses-init (C, Objective-C only)"
|
3962 |
|
|
Warn if a \f(CW\*(C`goto\*(C'\fR statement or a \f(CW\*(C`switch\*(C'\fR statement jumps
|
3963 |
|
|
forward across the initialization of a variable, or jumps backward to a
|
3964 |
|
|
label after the variable has been initialized. This only warns about
|
3965 |
|
|
variables that are initialized when they are declared. This warning is
|
3966 |
|
|
only supported for C and Objective-C; in \*(C+ this sort of branch is an
|
3967 |
|
|
error in any case.
|
3968 |
|
|
.Sp
|
3969 |
|
|
\&\fB\-Wjump\-misses\-init\fR is included in \fB\-Wc++\-compat\fR. It
|
3970 |
|
|
can be disabled with the \fB\-Wno\-jump\-misses\-init\fR option.
|
3971 |
|
|
.IP "\fB\-Wsign\-compare\fR" 4
|
3972 |
|
|
.IX Item "-Wsign-compare"
|
3973 |
|
|
Warn when a comparison between signed and unsigned values could produce
|
3974 |
|
|
an incorrect result when the signed value is converted to unsigned.
|
3975 |
|
|
This warning is also enabled by \fB\-Wextra\fR; to get the other warnings
|
3976 |
|
|
of \fB\-Wextra\fR without this warning, use \fB\-Wextra \-Wno\-sign\-compare\fR.
|
3977 |
|
|
.IP "\fB\-Wsign\-conversion\fR" 4
|
3978 |
|
|
.IX Item "-Wsign-conversion"
|
3979 |
|
|
Warn for implicit conversions that may change the sign of an integer
|
3980 |
|
|
value, like assigning a signed integer expression to an unsigned
|
3981 |
|
|
integer variable. An explicit cast silences the warning. In C, this
|
3982 |
|
|
option is enabled also by \fB\-Wconversion\fR.
|
3983 |
|
|
.IP "\fB\-Wsizeof\-pointer\-memaccess\fR" 4
|
3984 |
|
|
.IX Item "-Wsizeof-pointer-memaccess"
|
3985 |
|
|
Warn for suspicious length parameters to certain string and memory built-in
|
3986 |
|
|
functions if the argument uses \f(CW\*(C`sizeof\*(C'\fR. This warning warns e.g.
|
3987 |
|
|
about \f(CW\*(C`memset (ptr, 0, sizeof (ptr));\*(C'\fR if \f(CW\*(C`ptr\*(C'\fR is not an array,
|
3988 |
|
|
but a pointer, and suggests a possible fix, or about
|
3989 |
|
|
\&\f(CW\*(C`memcpy (&foo, ptr, sizeof (&foo));\*(C'\fR. This warning is enabled by
|
3990 |
|
|
\&\fB\-Wall\fR.
|
3991 |
|
|
.IP "\fB\-Waddress\fR" 4
|
3992 |
|
|
.IX Item "-Waddress"
|
3993 |
|
|
Warn about suspicious uses of memory addresses. These include using
|
3994 |
|
|
the address of a function in a conditional expression, such as
|
3995 |
|
|
\&\f(CW\*(C`void func(void); if (func)\*(C'\fR, and comparisons against the memory
|
3996 |
|
|
address of a string literal, such as \f(CW\*(C`if (x == "abc")\*(C'\fR. Such
|
3997 |
|
|
uses typically indicate a programmer error: the address of a function
|
3998 |
|
|
always evaluates to true, so their use in a conditional usually
|
3999 |
|
|
indicate that the programmer forgot the parentheses in a function
|
4000 |
|
|
call; and comparisons against string literals result in unspecified
|
4001 |
|
|
behavior and are not portable in C, so they usually indicate that the
|
4002 |
|
|
programmer intended to use \f(CW\*(C`strcmp\*(C'\fR. This warning is enabled by
|
4003 |
|
|
\&\fB\-Wall\fR.
|
4004 |
|
|
.IP "\fB\-Wlogical\-op\fR" 4
|
4005 |
|
|
.IX Item "-Wlogical-op"
|
4006 |
|
|
Warn about suspicious uses of logical operators in expressions.
|
4007 |
|
|
This includes using logical operators in contexts where a
|
4008 |
|
|
bit-wise operator is likely to be expected.
|
4009 |
|
|
.IP "\fB\-Waggregate\-return\fR" 4
|
4010 |
|
|
.IX Item "-Waggregate-return"
|
4011 |
|
|
Warn if any functions that return structures or unions are defined or
|
4012 |
|
|
called. (In languages where you can return an array, this also elicits
|
4013 |
|
|
a warning.)
|
4014 |
|
|
.IP "\fB\-Wno\-attributes\fR" 4
|
4015 |
|
|
.IX Item "-Wno-attributes"
|
4016 |
|
|
Do not warn if an unexpected \f(CW\*(C`_\|_attribute_\|_\*(C'\fR is used, such as
|
4017 |
|
|
unrecognized attributes, function attributes applied to variables,
|
4018 |
|
|
etc. This does not stop errors for incorrect use of supported
|
4019 |
|
|
attributes.
|
4020 |
|
|
.IP "\fB\-Wno\-builtin\-macro\-redefined\fR" 4
|
4021 |
|
|
.IX Item "-Wno-builtin-macro-redefined"
|
4022 |
|
|
Do not warn if certain built-in macros are redefined. This suppresses
|
4023 |
|
|
warnings for redefinition of \f(CW\*(C`_\|_TIMESTAMP_\|_\*(C'\fR, \f(CW\*(C`_\|_TIME_\|_\*(C'\fR,
|
4024 |
|
|
\&\f(CW\*(C`_\|_DATE_\|_\*(C'\fR, \f(CW\*(C`_\|_FILE_\|_\*(C'\fR, and \f(CW\*(C`_\|_BASE_FILE_\|_\*(C'\fR.
|
4025 |
|
|
.IP "\fB\-Wstrict\-prototypes\fR (C and Objective-C only)" 4
|
4026 |
|
|
.IX Item "-Wstrict-prototypes (C and Objective-C only)"
|
4027 |
|
|
Warn if a function is declared or defined without specifying the
|
4028 |
|
|
argument types. (An old-style function definition is permitted without
|
4029 |
|
|
a warning if preceded by a declaration that specifies the argument
|
4030 |
|
|
types.)
|
4031 |
|
|
.IP "\fB\-Wold\-style\-declaration\fR (C and Objective-C only)" 4
|
4032 |
|
|
.IX Item "-Wold-style-declaration (C and Objective-C only)"
|
4033 |
|
|
Warn for obsolescent usages, according to the C Standard, in a
|
4034 |
|
|
declaration. For example, warn if storage-class specifiers like
|
4035 |
|
|
\&\f(CW\*(C`static\*(C'\fR are not the first things in a declaration. This warning
|
4036 |
|
|
is also enabled by \fB\-Wextra\fR.
|
4037 |
|
|
.IP "\fB\-Wold\-style\-definition\fR (C and Objective-C only)" 4
|
4038 |
|
|
.IX Item "-Wold-style-definition (C and Objective-C only)"
|
4039 |
|
|
Warn if an old-style function definition is used. A warning is given
|
4040 |
|
|
even if there is a previous prototype.
|
4041 |
|
|
.IP "\fB\-Wmissing\-parameter\-type\fR (C and Objective-C only)" 4
|
4042 |
|
|
.IX Item "-Wmissing-parameter-type (C and Objective-C only)"
|
4043 |
|
|
A function parameter is declared without a type specifier in K&R\-style
|
4044 |
|
|
functions:
|
4045 |
|
|
.Sp
|
4046 |
|
|
.Vb 1
|
4047 |
|
|
\& void foo(bar) { }
|
4048 |
|
|
.Ve
|
4049 |
|
|
.Sp
|
4050 |
|
|
This warning is also enabled by \fB\-Wextra\fR.
|
4051 |
|
|
.IP "\fB\-Wmissing\-prototypes\fR (C and Objective-C only)" 4
|
4052 |
|
|
.IX Item "-Wmissing-prototypes (C and Objective-C only)"
|
4053 |
|
|
Warn if a global function is defined without a previous prototype
|
4054 |
|
|
declaration. This warning is issued even if the definition itself
|
4055 |
|
|
provides a prototype. Use this option to detect global functions
|
4056 |
|
|
that do not have a matching prototype declaration in a header file.
|
4057 |
|
|
This option is not valid for \*(C+ because all function declarations
|
4058 |
|
|
provide prototypes and a non-matching declaration will declare an
|
4059 |
|
|
overload rather than conflict with an earlier declaration.
|
4060 |
|
|
Use \fB\-Wmissing\-declarations\fR to detect missing declarations in \*(C+.
|
4061 |
|
|
.IP "\fB\-Wmissing\-declarations\fR" 4
|
4062 |
|
|
.IX Item "-Wmissing-declarations"
|
4063 |
|
|
Warn if a global function is defined without a previous declaration.
|
4064 |
|
|
Do so even if the definition itself provides a prototype.
|
4065 |
|
|
Use this option to detect global functions that are not declared in
|
4066 |
|
|
header files. In C, no warnings are issued for functions with previous
|
4067 |
|
|
non-prototype declarations; use \fB\-Wmissing\-prototype\fR to detect
|
4068 |
|
|
missing prototypes. In \*(C+, no warnings are issued for function templates,
|
4069 |
|
|
or for inline functions, or for functions in anonymous namespaces.
|
4070 |
|
|
.IP "\fB\-Wmissing\-field\-initializers\fR" 4
|
4071 |
|
|
.IX Item "-Wmissing-field-initializers"
|
4072 |
|
|
Warn if a structure's initializer has some fields missing. For
|
4073 |
|
|
example, the following code causes such a warning, because
|
4074 |
|
|
\&\f(CW\*(C`x.h\*(C'\fR is implicitly zero:
|
4075 |
|
|
.Sp
|
4076 |
|
|
.Vb 2
|
4077 |
|
|
\& struct s { int f, g, h; };
|
4078 |
|
|
\& struct s x = { 3, 4 };
|
4079 |
|
|
.Ve
|
4080 |
|
|
.Sp
|
4081 |
|
|
This option does not warn about designated initializers, so the following
|
4082 |
|
|
modification does not trigger a warning:
|
4083 |
|
|
.Sp
|
4084 |
|
|
.Vb 2
|
4085 |
|
|
\& struct s { int f, g, h; };
|
4086 |
|
|
\& struct s x = { .f = 3, .g = 4 };
|
4087 |
|
|
.Ve
|
4088 |
|
|
.Sp
|
4089 |
|
|
This warning is included in \fB\-Wextra\fR. To get other \fB\-Wextra\fR
|
4090 |
|
|
warnings without this one, use \fB\-Wextra \-Wno\-missing\-field\-initializers\fR.
|
4091 |
|
|
.IP "\fB\-Wno\-multichar\fR" 4
|
4092 |
|
|
.IX Item "-Wno-multichar"
|
4093 |
|
|
Do not warn if a multicharacter constant (\fB'\s-1FOOF\s0'\fR) is used.
|
4094 |
|
|
Usually they indicate a typo in the user's code, as they have
|
4095 |
|
|
implementation-defined values, and should not be used in portable code.
|
4096 |
|
|
.IP "\fB\-Wnormalized=\fR" 4
|
4097 |
|
|
.IX Item "-Wnormalized="
|
4098 |
|
|
In \s-1ISO\s0 C and \s-1ISO\s0 \*(C+, two identifiers are different if they are
|
4099 |
|
|
different sequences of characters. However, sometimes when characters
|
4100 |
|
|
outside the basic \s-1ASCII\s0 character set are used, you can have two
|
4101 |
|
|
different character sequences that look the same. To avoid confusion,
|
4102 |
|
|
the \s-1ISO\s0 10646 standard sets out some \fInormalization rules\fR which
|
4103 |
|
|
when applied ensure that two sequences that look the same are turned into
|
4104 |
|
|
the same sequence. \s-1GCC\s0 can warn you if you are using identifiers that
|
4105 |
|
|
have not been normalized; this option controls that warning.
|
4106 |
|
|
.Sp
|
4107 |
|
|
There are four levels of warning supported by \s-1GCC\s0. The default is
|
4108 |
|
|
\&\fB\-Wnormalized=nfc\fR, which warns about any identifier that is
|
4109 |
|
|
not in the \s-1ISO\s0 10646 \*(L"C\*(R" normalized form, \fI\s-1NFC\s0\fR. \s-1NFC\s0 is the
|
4110 |
|
|
recommended form for most uses.
|
4111 |
|
|
.Sp
|
4112 |
|
|
Unfortunately, there are some characters allowed in identifiers by
|
4113 |
|
|
\&\s-1ISO\s0 C and \s-1ISO\s0 \*(C+ that, when turned into \s-1NFC\s0, are not allowed in
|
4114 |
|
|
identifiers. That is, there's no way to use these symbols in portable
|
4115 |
|
|
\&\s-1ISO\s0 C or \*(C+ and have all your identifiers in \s-1NFC\s0.
|
4116 |
|
|
\&\fB\-Wnormalized=id\fR suppresses the warning for these characters.
|
4117 |
|
|
It is hoped that future versions of the standards involved will correct
|
4118 |
|
|
this, which is why this option is not the default.
|
4119 |
|
|
.Sp
|
4120 |
|
|
You can switch the warning off for all characters by writing
|
4121 |
|
|
\&\fB\-Wnormalized=none\fR. You should only do this if you
|
4122 |
|
|
are using some other normalization scheme (like \*(L"D\*(R"), because
|
4123 |
|
|
otherwise you can easily create bugs that are literally impossible to see.
|
4124 |
|
|
.Sp
|
4125 |
|
|
Some characters in \s-1ISO\s0 10646 have distinct meanings but look identical
|
4126 |
|
|
in some fonts or display methodologies, especially once formatting has
|
4127 |
|
|
been applied. For instance \f(CW\*(C`\eu207F\*(C'\fR, \*(L"\s-1SUPERSCRIPT\s0 \s-1LATIN\s0 \s-1SMALL\s0
|
4128 |
|
|
\&\s-1LETTER\s0 N\*(R", displays just like a regular \f(CW\*(C`n\*(C'\fR that has been
|
4129 |
|
|
placed in a superscript. \s-1ISO\s0 10646 defines the \fI\s-1NFKC\s0\fR
|
4130 |
|
|
normalization scheme to convert all these into a standard form as
|
4131 |
|
|
well, and \s-1GCC\s0 warns if your code is not in \s-1NFKC\s0 if you use
|
4132 |
|
|
\&\fB\-Wnormalized=nfkc\fR. This warning is comparable to warning
|
4133 |
|
|
about every identifier that contains the letter O because it might be
|
4134 |
|
|
confused with the digit 0, and so is not the default, but may be
|
4135 |
|
|
useful as a local coding convention if the programming environment
|
4136 |
|
|
cannot be fixed to display these characters distinctly.
|
4137 |
|
|
.IP "\fB\-Wno\-deprecated\fR" 4
|
4138 |
|
|
.IX Item "-Wno-deprecated"
|
4139 |
|
|
Do not warn about usage of deprecated features.
|
4140 |
|
|
.IP "\fB\-Wno\-deprecated\-declarations\fR" 4
|
4141 |
|
|
.IX Item "-Wno-deprecated-declarations"
|
4142 |
|
|
Do not warn about uses of functions,
|
4143 |
|
|
variables, and types marked as deprecated by using the \f(CW\*(C`deprecated\*(C'\fR
|
4144 |
|
|
attribute.
|
4145 |
|
|
.IP "\fB\-Wno\-overflow\fR" 4
|
4146 |
|
|
.IX Item "-Wno-overflow"
|
4147 |
|
|
Do not warn about compile-time overflow in constant expressions.
|
4148 |
|
|
.IP "\fB\-Woverride\-init\fR (C and Objective-C only)" 4
|
4149 |
|
|
.IX Item "-Woverride-init (C and Objective-C only)"
|
4150 |
|
|
Warn if an initialized field without side effects is overridden when
|
4151 |
|
|
using designated initializers.
|
4152 |
|
|
.Sp
|
4153 |
|
|
This warning is included in \fB\-Wextra\fR. To get other
|
4154 |
|
|
\&\fB\-Wextra\fR warnings without this one, use \fB\-Wextra
|
4155 |
|
|
\&\-Wno\-override\-init\fR.
|
4156 |
|
|
.IP "\fB\-Wpacked\fR" 4
|
4157 |
|
|
.IX Item "-Wpacked"
|
4158 |
|
|
Warn if a structure is given the packed attribute, but the packed
|
4159 |
|
|
attribute has no effect on the layout or size of the structure.
|
4160 |
|
|
Such structures may be mis-aligned for little benefit. For
|
4161 |
|
|
instance, in this code, the variable \f(CW\*(C`f.x\*(C'\fR in \f(CW\*(C`struct bar\*(C'\fR
|
4162 |
|
|
is misaligned even though \f(CW\*(C`struct bar\*(C'\fR does not itself
|
4163 |
|
|
have the packed attribute:
|
4164 |
|
|
.Sp
|
4165 |
|
|
.Vb 8
|
4166 |
|
|
\& struct foo {
|
4167 |
|
|
\& int x;
|
4168 |
|
|
\& char a, b, c, d;
|
4169 |
|
|
\& } _\|_attribute_\|_((packed));
|
4170 |
|
|
\& struct bar {
|
4171 |
|
|
\& char z;
|
4172 |
|
|
\& struct foo f;
|
4173 |
|
|
\& };
|
4174 |
|
|
.Ve
|
4175 |
|
|
.IP "\fB\-Wpacked\-bitfield\-compat\fR" 4
|
4176 |
|
|
.IX Item "-Wpacked-bitfield-compat"
|
4177 |
|
|
The 4.1, 4.2 and 4.3 series of \s-1GCC\s0 ignore the \f(CW\*(C`packed\*(C'\fR attribute
|
4178 |
|
|
on bit-fields of type \f(CW\*(C`char\*(C'\fR. This has been fixed in \s-1GCC\s0 4.4 but
|
4179 |
|
|
the change can lead to differences in the structure layout. \s-1GCC\s0
|
4180 |
|
|
informs you when the offset of such a field has changed in \s-1GCC\s0 4.4.
|
4181 |
|
|
For example there is no longer a 4\-bit padding between field \f(CW\*(C`a\*(C'\fR
|
4182 |
|
|
and \f(CW\*(C`b\*(C'\fR in this structure:
|
4183 |
|
|
.Sp
|
4184 |
|
|
.Vb 5
|
4185 |
|
|
\& struct foo
|
4186 |
|
|
\& {
|
4187 |
|
|
\& char a:4;
|
4188 |
|
|
\& char b:8;
|
4189 |
|
|
\& } _\|_attribute_\|_ ((packed));
|
4190 |
|
|
.Ve
|
4191 |
|
|
.Sp
|
4192 |
|
|
This warning is enabled by default. Use
|
4193 |
|
|
\&\fB\-Wno\-packed\-bitfield\-compat\fR to disable this warning.
|
4194 |
|
|
.IP "\fB\-Wpadded\fR" 4
|
4195 |
|
|
.IX Item "-Wpadded"
|
4196 |
|
|
Warn if padding is included in a structure, either to align an element
|
4197 |
|
|
of the structure or to align the whole structure. Sometimes when this
|
4198 |
|
|
happens it is possible to rearrange the fields of the structure to
|
4199 |
|
|
reduce the padding and so make the structure smaller.
|
4200 |
|
|
.IP "\fB\-Wredundant\-decls\fR" 4
|
4201 |
|
|
.IX Item "-Wredundant-decls"
|
4202 |
|
|
Warn if anything is declared more than once in the same scope, even in
|
4203 |
|
|
cases where multiple declaration is valid and changes nothing.
|
4204 |
|
|
.IP "\fB\-Wnested\-externs\fR (C and Objective-C only)" 4
|
4205 |
|
|
.IX Item "-Wnested-externs (C and Objective-C only)"
|
4206 |
|
|
Warn if an \f(CW\*(C`extern\*(C'\fR declaration is encountered within a function.
|
4207 |
|
|
.IP "\fB\-Wno\-inherited\-variadic\-ctor\fR" 4
|
4208 |
|
|
.IX Item "-Wno-inherited-variadic-ctor"
|
4209 |
|
|
Suppress warnings about use of \*(C+11 inheriting constructors when the
|
4210 |
|
|
base class inherited from has a C variadic constructor; the warning is
|
4211 |
|
|
on by default because the ellipsis is not inherited.
|
4212 |
|
|
.IP "\fB\-Winline\fR" 4
|
4213 |
|
|
.IX Item "-Winline"
|
4214 |
|
|
Warn if a function that is declared as inline cannot be inlined.
|
4215 |
|
|
Even with this option, the compiler does not warn about failures to
|
4216 |
|
|
inline functions declared in system headers.
|
4217 |
|
|
.Sp
|
4218 |
|
|
The compiler uses a variety of heuristics to determine whether or not
|
4219 |
|
|
to inline a function. For example, the compiler takes into account
|
4220 |
|
|
the size of the function being inlined and the amount of inlining
|
4221 |
|
|
that has already been done in the current function. Therefore,
|
4222 |
|
|
seemingly insignificant changes in the source program can cause the
|
4223 |
|
|
warnings produced by \fB\-Winline\fR to appear or disappear.
|
4224 |
|
|
.IP "\fB\-Wno\-invalid\-offsetof\fR (\*(C+ and Objective\-\*(C+ only)" 4
|
4225 |
|
|
.IX Item "-Wno-invalid-offsetof ( and Objective- only)"
|
4226 |
|
|
Suppress warnings from applying the \fBoffsetof\fR macro to a non-POD
|
4227 |
|
|
type. According to the 1998 \s-1ISO\s0 \*(C+ standard, applying \fBoffsetof\fR
|
4228 |
|
|
to a non-POD type is undefined. In existing \*(C+ implementations,
|
4229 |
|
|
however, \fBoffsetof\fR typically gives meaningful results even when
|
4230 |
|
|
applied to certain kinds of non-POD types (such as a simple
|
4231 |
|
|
\&\fBstruct\fR that fails to be a \s-1POD\s0 type only by virtue of having a
|
4232 |
|
|
constructor). This flag is for users who are aware that they are
|
4233 |
|
|
writing nonportable code and who have deliberately chosen to ignore the
|
4234 |
|
|
warning about it.
|
4235 |
|
|
.Sp
|
4236 |
|
|
The restrictions on \fBoffsetof\fR may be relaxed in a future version
|
4237 |
|
|
of the \*(C+ standard.
|
4238 |
|
|
.IP "\fB\-Wno\-int\-to\-pointer\-cast\fR" 4
|
4239 |
|
|
.IX Item "-Wno-int-to-pointer-cast"
|
4240 |
|
|
Suppress warnings from casts to pointer type of an integer of a
|
4241 |
|
|
different size. In \*(C+, casting to a pointer type of smaller size is
|
4242 |
|
|
an error. \fBWint-to-pointer-cast\fR is enabled by default.
|
4243 |
|
|
.IP "\fB\-Wno\-pointer\-to\-int\-cast\fR (C and Objective-C only)" 4
|
4244 |
|
|
.IX Item "-Wno-pointer-to-int-cast (C and Objective-C only)"
|
4245 |
|
|
Suppress warnings from casts from a pointer to an integer type of a
|
4246 |
|
|
different size.
|
4247 |
|
|
.IP "\fB\-Winvalid\-pch\fR" 4
|
4248 |
|
|
.IX Item "-Winvalid-pch"
|
4249 |
|
|
Warn if a precompiled header is found in
|
4250 |
|
|
the search path but can't be used.
|
4251 |
|
|
.IP "\fB\-Wlong\-long\fR" 4
|
4252 |
|
|
.IX Item "-Wlong-long"
|
4253 |
|
|
Warn if \fBlong long\fR type is used. This is enabled by either
|
4254 |
|
|
\&\fB\-Wpedantic\fR or \fB\-Wtraditional\fR in \s-1ISO\s0 C90 and \*(C+98
|
4255 |
|
|
modes. To inhibit the warning messages, use \fB\-Wno\-long\-long\fR.
|
4256 |
|
|
.IP "\fB\-Wvariadic\-macros\fR" 4
|
4257 |
|
|
.IX Item "-Wvariadic-macros"
|
4258 |
|
|
Warn if variadic macros are used in pedantic \s-1ISO\s0 C90 mode, or the \s-1GNU\s0
|
4259 |
|
|
alternate syntax when in pedantic \s-1ISO\s0 C99 mode. This is default.
|
4260 |
|
|
To inhibit the warning messages, use \fB\-Wno\-variadic\-macros\fR.
|
4261 |
|
|
.IP "\fB\-Wvarargs\fR" 4
|
4262 |
|
|
.IX Item "-Wvarargs"
|
4263 |
|
|
Warn upon questionable usage of the macros used to handle variable
|
4264 |
|
|
arguments like \fBva_start\fR. This is default. To inhibit the
|
4265 |
|
|
warning messages, use \fB\-Wno\-varargs\fR.
|
4266 |
|
|
.IP "\fB\-Wvector\-operation\-performance\fR" 4
|
4267 |
|
|
.IX Item "-Wvector-operation-performance"
|
4268 |
|
|
Warn if vector operation is not implemented via \s-1SIMD\s0 capabilities of the
|
4269 |
|
|
architecture. Mainly useful for the performance tuning.
|
4270 |
|
|
Vector operation can be implemented \f(CW\*(C`piecewise\*(C'\fR, which means that the
|
4271 |
|
|
scalar operation is performed on every vector element;
|
4272 |
|
|
\&\f(CW\*(C`in parallel\*(C'\fR, which means that the vector operation is implemented
|
4273 |
|
|
using scalars of wider type, which normally is more performance efficient;
|
4274 |
|
|
and \f(CW\*(C`as a single scalar\*(C'\fR, which means that vector fits into a
|
4275 |
|
|
scalar type.
|
4276 |
|
|
.IP "\fB\-Wno\-virtual\-move\-assign\fR" 4
|
4277 |
|
|
.IX Item "-Wno-virtual-move-assign"
|
4278 |
|
|
Suppress warnings about inheriting from a virtual base with a
|
4279 |
|
|
non-trivial \*(C+11 move assignment operator. This is dangerous because
|
4280 |
|
|
if the virtual base is reachable along more than one path, it will be
|
4281 |
|
|
moved multiple times, which can mean both objects end up in the
|
4282 |
|
|
moved-from state. If the move assignment operator is written to avoid
|
4283 |
|
|
moving from a moved-from object, this warning can be disabled.
|
4284 |
|
|
.IP "\fB\-Wvla\fR" 4
|
4285 |
|
|
.IX Item "-Wvla"
|
4286 |
|
|
Warn if variable length array is used in the code.
|
4287 |
|
|
\&\fB\-Wno\-vla\fR prevents the \fB\-Wpedantic\fR warning of
|
4288 |
|
|
the variable length array.
|
4289 |
|
|
.IP "\fB\-Wvolatile\-register\-var\fR" 4
|
4290 |
|
|
.IX Item "-Wvolatile-register-var"
|
4291 |
|
|
Warn if a register variable is declared volatile. The volatile
|
4292 |
|
|
modifier does not inhibit all optimizations that may eliminate reads
|
4293 |
|
|
and/or writes to register variables. This warning is enabled by
|
4294 |
|
|
\&\fB\-Wall\fR.
|
4295 |
|
|
.IP "\fB\-Wdisabled\-optimization\fR" 4
|
4296 |
|
|
.IX Item "-Wdisabled-optimization"
|
4297 |
|
|
Warn if a requested optimization pass is disabled. This warning does
|
4298 |
|
|
not generally indicate that there is anything wrong with your code; it
|
4299 |
|
|
merely indicates that \s-1GCC\s0's optimizers are unable to handle the code
|
4300 |
|
|
effectively. Often, the problem is that your code is too big or too
|
4301 |
|
|
complex; \s-1GCC\s0 refuses to optimize programs when the optimization
|
4302 |
|
|
itself is likely to take inordinate amounts of time.
|
4303 |
|
|
.IP "\fB\-Wpointer\-sign\fR (C and Objective-C only)" 4
|
4304 |
|
|
.IX Item "-Wpointer-sign (C and Objective-C only)"
|
4305 |
|
|
Warn for pointer argument passing or assignment with different signedness.
|
4306 |
|
|
This option is only supported for C and Objective-C. It is implied by
|
4307 |
|
|
\&\fB\-Wall\fR and by \fB\-Wpedantic\fR, which can be disabled with
|
4308 |
|
|
\&\fB\-Wno\-pointer\-sign\fR.
|
4309 |
|
|
.IP "\fB\-Wstack\-protector\fR" 4
|
4310 |
|
|
.IX Item "-Wstack-protector"
|
4311 |
|
|
This option is only active when \fB\-fstack\-protector\fR is active. It
|
4312 |
|
|
warns about functions that are not protected against stack smashing.
|
4313 |
|
|
.IP "\fB\-Wno\-mudflap\fR" 4
|
4314 |
|
|
.IX Item "-Wno-mudflap"
|
4315 |
|
|
Suppress warnings about constructs that cannot be instrumented by
|
4316 |
|
|
\&\fB\-fmudflap\fR.
|
4317 |
|
|
.IP "\fB\-Woverlength\-strings\fR" 4
|
4318 |
|
|
.IX Item "-Woverlength-strings"
|
4319 |
|
|
Warn about string constants that are longer than the \*(L"minimum
|
4320 |
|
|
maximum\*(R" length specified in the C standard. Modern compilers
|
4321 |
|
|
generally allow string constants that are much longer than the
|
4322 |
|
|
standard's minimum limit, but very portable programs should avoid
|
4323 |
|
|
using longer strings.
|
4324 |
|
|
.Sp
|
4325 |
|
|
The limit applies \fIafter\fR string constant concatenation, and does
|
4326 |
|
|
not count the trailing \s-1NUL\s0. In C90, the limit was 509 characters; in
|
4327 |
|
|
C99, it was raised to 4095. \*(C+98 does not specify a normative
|
4328 |
|
|
minimum maximum, so we do not diagnose overlength strings in \*(C+.
|
4329 |
|
|
.Sp
|
4330 |
|
|
This option is implied by \fB\-Wpedantic\fR, and can be disabled with
|
4331 |
|
|
\&\fB\-Wno\-overlength\-strings\fR.
|
4332 |
|
|
.IP "\fB\-Wunsuffixed\-float\-constants\fR (C and Objective-C only)" 4
|
4333 |
|
|
.IX Item "-Wunsuffixed-float-constants (C and Objective-C only)"
|
4334 |
|
|
Issue a warning for any floating constant that does not have
|
4335 |
|
|
a suffix. When used together with \fB\-Wsystem\-headers\fR it
|
4336 |
|
|
warns about such constants in system header files. This can be useful
|
4337 |
|
|
when preparing code to use with the \f(CW\*(C`FLOAT_CONST_DECIMAL64\*(C'\fR pragma
|
4338 |
|
|
from the decimal floating-point extension to C99.
|
4339 |
|
|
.SS "Options for Debugging Your Program or \s-1GCC\s0"
|
4340 |
|
|
.IX Subsection "Options for Debugging Your Program or GCC"
|
4341 |
|
|
\&\s-1GCC\s0 has various special options that are used for debugging
|
4342 |
|
|
either your program or \s-1GCC:\s0
|
4343 |
|
|
.IP "\fB\-g\fR" 4
|
4344 |
|
|
.IX Item "-g"
|
4345 |
|
|
Produce debugging information in the operating system's native format
|
4346 |
|
|
(stabs, \s-1COFF\s0, \s-1XCOFF\s0, or \s-1DWARF\s0 2). \s-1GDB\s0 can work with this debugging
|
4347 |
|
|
information.
|
4348 |
|
|
.Sp
|
4349 |
|
|
On most systems that use stabs format, \fB\-g\fR enables use of extra
|
4350 |
|
|
debugging information that only \s-1GDB\s0 can use; this extra information
|
4351 |
|
|
makes debugging work better in \s-1GDB\s0 but probably makes other debuggers
|
4352 |
|
|
crash or
|
4353 |
|
|
refuse to read the program. If you want to control for certain whether
|
4354 |
|
|
to generate the extra information, use \fB\-gstabs+\fR, \fB\-gstabs\fR,
|
4355 |
|
|
\&\fB\-gxcoff+\fR, \fB\-gxcoff\fR, or \fB\-gvms\fR (see below).
|
4356 |
|
|
.Sp
|
4357 |
|
|
\&\s-1GCC\s0 allows you to use \fB\-g\fR with
|
4358 |
|
|
\&\fB\-O\fR. The shortcuts taken by optimized code may occasionally
|
4359 |
|
|
produce surprising results: some variables you declared may not exist
|
4360 |
|
|
at all; flow of control may briefly move where you did not expect it;
|
4361 |
|
|
some statements may not be executed because they compute constant
|
4362 |
|
|
results or their values are already at hand; some statements may
|
4363 |
|
|
execute in different places because they have been moved out of loops.
|
4364 |
|
|
.Sp
|
4365 |
|
|
Nevertheless it proves possible to debug optimized output. This makes
|
4366 |
|
|
it reasonable to use the optimizer for programs that might have bugs.
|
4367 |
|
|
.Sp
|
4368 |
|
|
The following options are useful when \s-1GCC\s0 is generated with the
|
4369 |
|
|
capability for more than one debugging format.
|
4370 |
|
|
.IP "\fB\-gsplit\-dwarf\fR" 4
|
4371 |
|
|
.IX Item "-gsplit-dwarf"
|
4372 |
|
|
Separate as much dwarf debugging information as possible into a
|
4373 |
|
|
separate output file with the extension .dwo. This option allows
|
4374 |
|
|
the build system to avoid linking files with debug information. To
|
4375 |
|
|
be useful, this option requires a debugger capable of reading .dwo
|
4376 |
|
|
files.
|
4377 |
|
|
.IP "\fB\-ggdb\fR" 4
|
4378 |
|
|
.IX Item "-ggdb"
|
4379 |
|
|
Produce debugging information for use by \s-1GDB\s0. This means to use the
|
4380 |
|
|
most expressive format available (\s-1DWARF\s0 2, stabs, or the native format
|
4381 |
|
|
if neither of those are supported), including \s-1GDB\s0 extensions if at all
|
4382 |
|
|
possible.
|
4383 |
|
|
.IP "\fB\-gpubnames\fR" 4
|
4384 |
|
|
.IX Item "-gpubnames"
|
4385 |
|
|
Generate dwarf .debug_pubnames and .debug_pubtypes sections.
|
4386 |
|
|
.IP "\fB\-gstabs\fR" 4
|
4387 |
|
|
.IX Item "-gstabs"
|
4388 |
|
|
Produce debugging information in stabs format (if that is supported),
|
4389 |
|
|
without \s-1GDB\s0 extensions. This is the format used by \s-1DBX\s0 on most \s-1BSD\s0
|
4390 |
|
|
systems. On \s-1MIPS\s0, Alpha and System V Release 4 systems this option
|
4391 |
|
|
produces stabs debugging output that is not understood by \s-1DBX\s0 or \s-1SDB\s0.
|
4392 |
|
|
On System V Release 4 systems this option requires the \s-1GNU\s0 assembler.
|
4393 |
|
|
.IP "\fB\-feliminate\-unused\-debug\-symbols\fR" 4
|
4394 |
|
|
.IX Item "-feliminate-unused-debug-symbols"
|
4395 |
|
|
Produce debugging information in stabs format (if that is supported),
|
4396 |
|
|
for only symbols that are actually used.
|
4397 |
|
|
.IP "\fB\-femit\-class\-debug\-always\fR" 4
|
4398 |
|
|
.IX Item "-femit-class-debug-always"
|
4399 |
|
|
Instead of emitting debugging information for a \*(C+ class in only one
|
4400 |
|
|
object file, emit it in all object files using the class. This option
|
4401 |
|
|
should be used only with debuggers that are unable to handle the way \s-1GCC\s0
|
4402 |
|
|
normally emits debugging information for classes because using this
|
4403 |
|
|
option increases the size of debugging information by as much as a
|
4404 |
|
|
factor of two.
|
4405 |
|
|
.IP "\fB\-fdebug\-types\-section\fR" 4
|
4406 |
|
|
.IX Item "-fdebug-types-section"
|
4407 |
|
|
When using \s-1DWARF\s0 Version 4 or higher, type DIEs can be put into
|
4408 |
|
|
their own \f(CW\*(C`.debug_types\*(C'\fR section instead of making them part of the
|
4409 |
|
|
\&\f(CW\*(C`.debug_info\*(C'\fR section. It is more efficient to put them in a separate
|
4410 |
|
|
comdat sections since the linker can then remove duplicates.
|
4411 |
|
|
But not all \s-1DWARF\s0 consumers support \f(CW\*(C`.debug_types\*(C'\fR sections yet
|
4412 |
|
|
and on some objects \f(CW\*(C`.debug_types\*(C'\fR produces larger instead of smaller
|
4413 |
|
|
debugging information.
|
4414 |
|
|
.IP "\fB\-gstabs+\fR" 4
|
4415 |
|
|
.IX Item "-gstabs+"
|
4416 |
|
|
Produce debugging information in stabs format (if that is supported),
|
4417 |
|
|
using \s-1GNU\s0 extensions understood only by the \s-1GNU\s0 debugger (\s-1GDB\s0). The
|
4418 |
|
|
use of these extensions is likely to make other debuggers crash or
|
4419 |
|
|
refuse to read the program.
|
4420 |
|
|
.IP "\fB\-gcoff\fR" 4
|
4421 |
|
|
.IX Item "-gcoff"
|
4422 |
|
|
Produce debugging information in \s-1COFF\s0 format (if that is supported).
|
4423 |
|
|
This is the format used by \s-1SDB\s0 on most System V systems prior to
|
4424 |
|
|
System V Release 4.
|
4425 |
|
|
.IP "\fB\-gxcoff\fR" 4
|
4426 |
|
|
.IX Item "-gxcoff"
|
4427 |
|
|
Produce debugging information in \s-1XCOFF\s0 format (if that is supported).
|
4428 |
|
|
This is the format used by the \s-1DBX\s0 debugger on \s-1IBM\s0 \s-1RS/6000\s0 systems.
|
4429 |
|
|
.IP "\fB\-gxcoff+\fR" 4
|
4430 |
|
|
.IX Item "-gxcoff+"
|
4431 |
|
|
Produce debugging information in \s-1XCOFF\s0 format (if that is supported),
|
4432 |
|
|
using \s-1GNU\s0 extensions understood only by the \s-1GNU\s0 debugger (\s-1GDB\s0). The
|
4433 |
|
|
use of these extensions is likely to make other debuggers crash or
|
4434 |
|
|
refuse to read the program, and may cause assemblers other than the \s-1GNU\s0
|
4435 |
|
|
assembler (\s-1GAS\s0) to fail with an error.
|
4436 |
|
|
.IP "\fB\-gdwarf\-\fR\fIversion\fR" 4
|
4437 |
|
|
.IX Item "-gdwarf-version"
|
4438 |
|
|
Produce debugging information in \s-1DWARF\s0 format (if that is supported).
|
4439 |
|
|
The value of \fIversion\fR may be either 2, 3 or 4; the default version
|
4440 |
|
|
for most targets is 4.
|
4441 |
|
|
.Sp
|
4442 |
|
|
Note that with \s-1DWARF\s0 Version 2, some ports require and always
|
4443 |
|
|
use some non-conflicting \s-1DWARF\s0 3 extensions in the unwind tables.
|
4444 |
|
|
.Sp
|
4445 |
|
|
Version 4 may require \s-1GDB\s0 7.0 and \fB\-fvar\-tracking\-assignments\fR
|
4446 |
|
|
for maximum benefit.
|
4447 |
|
|
.IP "\fB\-grecord\-gcc\-switches\fR" 4
|
4448 |
|
|
.IX Item "-grecord-gcc-switches"
|
4449 |
|
|
This switch causes the command-line options used to invoke the
|
4450 |
|
|
compiler that may affect code generation to be appended to the
|
4451 |
|
|
DW_AT_producer attribute in \s-1DWARF\s0 debugging information. The options
|
4452 |
|
|
are concatenated with spaces separating them from each other and from
|
4453 |
|
|
the compiler version. See also \fB\-frecord\-gcc\-switches\fR for another
|
4454 |
|
|
way of storing compiler options into the object file. This is the default.
|
4455 |
|
|
.IP "\fB\-gno\-record\-gcc\-switches\fR" 4
|
4456 |
|
|
.IX Item "-gno-record-gcc-switches"
|
4457 |
|
|
Disallow appending command-line options to the DW_AT_producer attribute
|
4458 |
|
|
in \s-1DWARF\s0 debugging information.
|
4459 |
|
|
.IP "\fB\-gstrict\-dwarf\fR" 4
|
4460 |
|
|
.IX Item "-gstrict-dwarf"
|
4461 |
|
|
Disallow using extensions of later \s-1DWARF\s0 standard version than selected
|
4462 |
|
|
with \fB\-gdwarf\-\fR\fIversion\fR. On most targets using non-conflicting
|
4463 |
|
|
\&\s-1DWARF\s0 extensions from later standard versions is allowed.
|
4464 |
|
|
.IP "\fB\-gno\-strict\-dwarf\fR" 4
|
4465 |
|
|
.IX Item "-gno-strict-dwarf"
|
4466 |
|
|
Allow using extensions of later \s-1DWARF\s0 standard version than selected with
|
4467 |
|
|
\&\fB\-gdwarf\-\fR\fIversion\fR.
|
4468 |
|
|
.IP "\fB\-gvms\fR" 4
|
4469 |
|
|
.IX Item "-gvms"
|
4470 |
|
|
Produce debugging information in Alpha/VMS debug format (if that is
|
4471 |
|
|
supported). This is the format used by \s-1DEBUG\s0 on Alpha/VMS systems.
|
4472 |
|
|
.IP "\fB\-g\fR\fIlevel\fR" 4
|
4473 |
|
|
.IX Item "-glevel"
|
4474 |
|
|
.PD 0
|
4475 |
|
|
.IP "\fB\-ggdb\fR\fIlevel\fR" 4
|
4476 |
|
|
.IX Item "-ggdblevel"
|
4477 |
|
|
.IP "\fB\-gstabs\fR\fIlevel\fR" 4
|
4478 |
|
|
.IX Item "-gstabslevel"
|
4479 |
|
|
.IP "\fB\-gcoff\fR\fIlevel\fR" 4
|
4480 |
|
|
.IX Item "-gcofflevel"
|
4481 |
|
|
.IP "\fB\-gxcoff\fR\fIlevel\fR" 4
|
4482 |
|
|
.IX Item "-gxcofflevel"
|
4483 |
|
|
.IP "\fB\-gvms\fR\fIlevel\fR" 4
|
4484 |
|
|
.IX Item "-gvmslevel"
|
4485 |
|
|
.PD
|
4486 |
|
|
Request debugging information and also use \fIlevel\fR to specify how
|
4487 |
|
|
much information. The default level is 2.
|
4488 |
|
|
.Sp
|
4489 |
|
|
Level 0 produces no debug information at all. Thus, \fB\-g0\fR negates
|
4490 |
|
|
\&\fB\-g\fR.
|
4491 |
|
|
.Sp
|
4492 |
|
|
Level 1 produces minimal information, enough for making backtraces in
|
4493 |
|
|
parts of the program that you don't plan to debug. This includes
|
4494 |
|
|
descriptions of functions and external variables, but no information
|
4495 |
|
|
about local variables and no line numbers.
|
4496 |
|
|
.Sp
|
4497 |
|
|
Level 3 includes extra information, such as all the macro definitions
|
4498 |
|
|
present in the program. Some debuggers support macro expansion when
|
4499 |
|
|
you use \fB\-g3\fR.
|
4500 |
|
|
.Sp
|
4501 |
|
|
\&\fB\-gdwarf\-2\fR does not accept a concatenated debug level, because
|
4502 |
|
|
\&\s-1GCC\s0 used to support an option \fB\-gdwarf\fR that meant to generate
|
4503 |
|
|
debug information in version 1 of the \s-1DWARF\s0 format (which is very
|
4504 |
|
|
different from version 2), and it would have been too confusing. That
|
4505 |
|
|
debug format is long obsolete, but the option cannot be changed now.
|
4506 |
|
|
Instead use an additional \fB\-g\fR\fIlevel\fR option to change the
|
4507 |
|
|
debug level for \s-1DWARF\s0.
|
4508 |
|
|
.IP "\fB\-gtoggle\fR" 4
|
4509 |
|
|
.IX Item "-gtoggle"
|
4510 |
|
|
Turn off generation of debug info, if leaving out this option
|
4511 |
|
|
generates it, or turn it on at level 2 otherwise. The position of this
|
4512 |
|
|
argument in the command line does not matter; it takes effect after all
|
4513 |
|
|
other options are processed, and it does so only once, no matter how
|
4514 |
|
|
many times it is given. This is mainly intended to be used with
|
4515 |
|
|
\&\fB\-fcompare\-debug\fR.
|
4516 |
|
|
.IP "\fB\-fdump\-final\-insns\fR[\fB=\fR\fIfile\fR]" 4
|
4517 |
|
|
.IX Item "-fdump-final-insns[=file]"
|
4518 |
|
|
Dump the final internal representation (\s-1RTL\s0) to \fIfile\fR. If the
|
4519 |
|
|
optional argument is omitted (or if \fIfile\fR is \f(CW\*(C`.\*(C'\fR), the name
|
4520 |
|
|
of the dump file is determined by appending \f(CW\*(C`.gkd\*(C'\fR to the
|
4521 |
|
|
compilation output file name.
|
4522 |
|
|
.IP "\fB\-fcompare\-debug\fR[\fB=\fR\fIopts\fR]" 4
|
4523 |
|
|
.IX Item "-fcompare-debug[=opts]"
|
4524 |
|
|
If no error occurs during compilation, run the compiler a second time,
|
4525 |
|
|
adding \fIopts\fR and \fB\-fcompare\-debug\-second\fR to the arguments
|
4526 |
|
|
passed to the second compilation. Dump the final internal
|
4527 |
|
|
representation in both compilations, and print an error if they differ.
|
4528 |
|
|
.Sp
|
4529 |
|
|
If the equal sign is omitted, the default \fB\-gtoggle\fR is used.
|
4530 |
|
|
.Sp
|
4531 |
|
|
The environment variable \fB\s-1GCC_COMPARE_DEBUG\s0\fR, if defined, non-empty
|
4532 |
|
|
and nonzero, implicitly enables \fB\-fcompare\-debug\fR. If
|
4533 |
|
|
\&\fB\s-1GCC_COMPARE_DEBUG\s0\fR is defined to a string starting with a dash,
|
4534 |
|
|
then it is used for \fIopts\fR, otherwise the default \fB\-gtoggle\fR
|
4535 |
|
|
is used.
|
4536 |
|
|
.Sp
|
4537 |
|
|
\&\fB\-fcompare\-debug=\fR, with the equal sign but without \fIopts\fR,
|
4538 |
|
|
is equivalent to \fB\-fno\-compare\-debug\fR, which disables the dumping
|
4539 |
|
|
of the final representation and the second compilation, preventing even
|
4540 |
|
|
\&\fB\s-1GCC_COMPARE_DEBUG\s0\fR from taking effect.
|
4541 |
|
|
.Sp
|
4542 |
|
|
To verify full coverage during \fB\-fcompare\-debug\fR testing, set
|
4543 |
|
|
\&\fB\s-1GCC_COMPARE_DEBUG\s0\fR to say \fB\-fcompare\-debug\-not\-overridden\fR,
|
4544 |
|
|
which \s-1GCC\s0 rejects as an invalid option in any actual compilation
|
4545 |
|
|
(rather than preprocessing, assembly or linking). To get just a
|
4546 |
|
|
warning, setting \fB\s-1GCC_COMPARE_DEBUG\s0\fR to \fB\-w%n\-fcompare\-debug
|
4547 |
|
|
not overridden\fR will do.
|
4548 |
|
|
.IP "\fB\-fcompare\-debug\-second\fR" 4
|
4549 |
|
|
.IX Item "-fcompare-debug-second"
|
4550 |
|
|
This option is implicitly passed to the compiler for the second
|
4551 |
|
|
compilation requested by \fB\-fcompare\-debug\fR, along with options to
|
4552 |
|
|
silence warnings, and omitting other options that would cause
|
4553 |
|
|
side-effect compiler outputs to files or to the standard output. Dump
|
4554 |
|
|
files and preserved temporary files are renamed so as to contain the
|
4555 |
|
|
\&\f(CW\*(C`.gk\*(C'\fR additional extension during the second compilation, to avoid
|
4556 |
|
|
overwriting those generated by the first.
|
4557 |
|
|
.Sp
|
4558 |
|
|
When this option is passed to the compiler driver, it causes the
|
4559 |
|
|
\&\fIfirst\fR compilation to be skipped, which makes it useful for little
|
4560 |
|
|
other than debugging the compiler proper.
|
4561 |
|
|
.IP "\fB\-feliminate\-dwarf2\-dups\fR" 4
|
4562 |
|
|
.IX Item "-feliminate-dwarf2-dups"
|
4563 |
|
|
Compress \s-1DWARF\s0 2 debugging information by eliminating duplicated
|
4564 |
|
|
information about each symbol. This option only makes sense when
|
4565 |
|
|
generating \s-1DWARF\s0 2 debugging information with \fB\-gdwarf\-2\fR.
|
4566 |
|
|
.IP "\fB\-femit\-struct\-debug\-baseonly\fR" 4
|
4567 |
|
|
.IX Item "-femit-struct-debug-baseonly"
|
4568 |
|
|
Emit debug information for struct-like types
|
4569 |
|
|
only when the base name of the compilation source file
|
4570 |
|
|
matches the base name of file in which the struct is defined.
|
4571 |
|
|
.Sp
|
4572 |
|
|
This option substantially reduces the size of debugging information,
|
4573 |
|
|
but at significant potential loss in type information to the debugger.
|
4574 |
|
|
See \fB\-femit\-struct\-debug\-reduced\fR for a less aggressive option.
|
4575 |
|
|
See \fB\-femit\-struct\-debug\-detailed\fR for more detailed control.
|
4576 |
|
|
.Sp
|
4577 |
|
|
This option works only with \s-1DWARF\s0 2.
|
4578 |
|
|
.IP "\fB\-femit\-struct\-debug\-reduced\fR" 4
|
4579 |
|
|
.IX Item "-femit-struct-debug-reduced"
|
4580 |
|
|
Emit debug information for struct-like types
|
4581 |
|
|
only when the base name of the compilation source file
|
4582 |
|
|
matches the base name of file in which the type is defined,
|
4583 |
|
|
unless the struct is a template or defined in a system header.
|
4584 |
|
|
.Sp
|
4585 |
|
|
This option significantly reduces the size of debugging information,
|
4586 |
|
|
with some potential loss in type information to the debugger.
|
4587 |
|
|
See \fB\-femit\-struct\-debug\-baseonly\fR for a more aggressive option.
|
4588 |
|
|
See \fB\-femit\-struct\-debug\-detailed\fR for more detailed control.
|
4589 |
|
|
.Sp
|
4590 |
|
|
This option works only with \s-1DWARF\s0 2.
|
4591 |
|
|
.IP "\fB\-femit\-struct\-debug\-detailed\fR[\fB=\fR\fIspec-list\fR]" 4
|
4592 |
|
|
.IX Item "-femit-struct-debug-detailed[=spec-list]"
|
4593 |
|
|
Specify the struct-like types
|
4594 |
|
|
for which the compiler generates debug information.
|
4595 |
|
|
The intent is to reduce duplicate struct debug information
|
4596 |
|
|
between different object files within the same program.
|
4597 |
|
|
.Sp
|
4598 |
|
|
This option is a detailed version of
|
4599 |
|
|
\&\fB\-femit\-struct\-debug\-reduced\fR and \fB\-femit\-struct\-debug\-baseonly\fR,
|
4600 |
|
|
which serves for most needs.
|
4601 |
|
|
.Sp
|
4602 |
|
|
A specification has the syntax[\fBdir:\fR|\fBind:\fR][\fBord:\fR|\fBgen:\fR](\fBany\fR|\fBsys\fR|\fBbase\fR|\fBnone\fR)
|
4603 |
|
|
.Sp
|
4604 |
|
|
The optional first word limits the specification to
|
4605 |
|
|
structs that are used directly (\fBdir:\fR) or used indirectly (\fBind:\fR).
|
4606 |
|
|
A struct type is used directly when it is the type of a variable, member.
|
4607 |
|
|
Indirect uses arise through pointers to structs.
|
4608 |
|
|
That is, when use of an incomplete struct is valid, the use is indirect.
|
4609 |
|
|
An example is
|
4610 |
|
|
\&\fBstruct one direct; struct two * indirect;\fR.
|
4611 |
|
|
.Sp
|
4612 |
|
|
The optional second word limits the specification to
|
4613 |
|
|
ordinary structs (\fBord:\fR) or generic structs (\fBgen:\fR).
|
4614 |
|
|
Generic structs are a bit complicated to explain.
|
4615 |
|
|
For \*(C+, these are non-explicit specializations of template classes,
|
4616 |
|
|
or non-template classes within the above.
|
4617 |
|
|
Other programming languages have generics,
|
4618 |
|
|
but \fB\-femit\-struct\-debug\-detailed\fR does not yet implement them.
|
4619 |
|
|
.Sp
|
4620 |
|
|
The third word specifies the source files for those
|
4621 |
|
|
structs for which the compiler should emit debug information.
|
4622 |
|
|
The values \fBnone\fR and \fBany\fR have the normal meaning.
|
4623 |
|
|
The value \fBbase\fR means that
|
4624 |
|
|
the base of name of the file in which the type declaration appears
|
4625 |
|
|
must match the base of the name of the main compilation file.
|
4626 |
|
|
In practice, this means that when compiling \fIfoo.c\fR, debug information
|
4627 |
|
|
is generated for types declared in that file and \fIfoo.h\fR,
|
4628 |
|
|
but not other header files.
|
4629 |
|
|
The value \fBsys\fR means those types satisfying \fBbase\fR
|
4630 |
|
|
or declared in system or compiler headers.
|
4631 |
|
|
.Sp
|
4632 |
|
|
You may need to experiment to determine the best settings for your application.
|
4633 |
|
|
.Sp
|
4634 |
|
|
The default is \fB\-femit\-struct\-debug\-detailed=all\fR.
|
4635 |
|
|
.Sp
|
4636 |
|
|
This option works only with \s-1DWARF\s0 2.
|
4637 |
|
|
.IP "\fB\-fno\-merge\-debug\-strings\fR" 4
|
4638 |
|
|
.IX Item "-fno-merge-debug-strings"
|
4639 |
|
|
Direct the linker to not merge together strings in the debugging
|
4640 |
|
|
information that are identical in different object files. Merging is
|
4641 |
|
|
not supported by all assemblers or linkers. Merging decreases the size
|
4642 |
|
|
of the debug information in the output file at the cost of increasing
|
4643 |
|
|
link processing time. Merging is enabled by default.
|
4644 |
|
|
.IP "\fB\-fdebug\-prefix\-map=\fR\fIold\fR\fB=\fR\fInew\fR" 4
|
4645 |
|
|
.IX Item "-fdebug-prefix-map=old=new"
|
4646 |
|
|
When compiling files in directory \fI\fIold\fI\fR, record debugging
|
4647 |
|
|
information describing them as in \fI\fInew\fI\fR instead.
|
4648 |
|
|
.IP "\fB\-fno\-dwarf2\-cfi\-asm\fR" 4
|
4649 |
|
|
.IX Item "-fno-dwarf2-cfi-asm"
|
4650 |
|
|
Emit \s-1DWARF\s0 2 unwind info as compiler generated \f(CW\*(C`.eh_frame\*(C'\fR section
|
4651 |
|
|
instead of using \s-1GAS\s0 \f(CW\*(C`.cfi_*\*(C'\fR directives.
|
4652 |
|
|
.IP "\fB\-p\fR" 4
|
4653 |
|
|
.IX Item "-p"
|
4654 |
|
|
Generate extra code to write profile information suitable for the
|
4655 |
|
|
analysis program \fBprof\fR. You must use this option when compiling
|
4656 |
|
|
the source files you want data about, and you must also use it when
|
4657 |
|
|
linking.
|
4658 |
|
|
.IP "\fB\-pg\fR" 4
|
4659 |
|
|
.IX Item "-pg"
|
4660 |
|
|
Generate extra code to write profile information suitable for the
|
4661 |
|
|
analysis program \fBgprof\fR. You must use this option when compiling
|
4662 |
|
|
the source files you want data about, and you must also use it when
|
4663 |
|
|
linking.
|
4664 |
|
|
.IP "\fB\-Q\fR" 4
|
4665 |
|
|
.IX Item "-Q"
|
4666 |
|
|
Makes the compiler print out each function name as it is compiled, and
|
4667 |
|
|
print some statistics about each pass when it finishes.
|
4668 |
|
|
.IP "\fB\-ftime\-report\fR" 4
|
4669 |
|
|
.IX Item "-ftime-report"
|
4670 |
|
|
Makes the compiler print some statistics about the time consumed by each
|
4671 |
|
|
pass when it finishes.
|
4672 |
|
|
.IP "\fB\-fmem\-report\fR" 4
|
4673 |
|
|
.IX Item "-fmem-report"
|
4674 |
|
|
Makes the compiler print some statistics about permanent memory
|
4675 |
|
|
allocation when it finishes.
|
4676 |
|
|
.IP "\fB\-fmem\-report\-wpa\fR" 4
|
4677 |
|
|
.IX Item "-fmem-report-wpa"
|
4678 |
|
|
Makes the compiler print some statistics about permanent memory
|
4679 |
|
|
allocation for the \s-1WPA\s0 phase only.
|
4680 |
|
|
.IP "\fB\-fpre\-ipa\-mem\-report\fR" 4
|
4681 |
|
|
.IX Item "-fpre-ipa-mem-report"
|
4682 |
|
|
.PD 0
|
4683 |
|
|
.IP "\fB\-fpost\-ipa\-mem\-report\fR" 4
|
4684 |
|
|
.IX Item "-fpost-ipa-mem-report"
|
4685 |
|
|
.PD
|
4686 |
|
|
Makes the compiler print some statistics about permanent memory
|
4687 |
|
|
allocation before or after interprocedural optimization.
|
4688 |
|
|
.IP "\fB\-fprofile\-report\fR" 4
|
4689 |
|
|
.IX Item "-fprofile-report"
|
4690 |
|
|
Makes the compiler print some statistics about consistency of the
|
4691 |
|
|
(estimated) profile and effect of individual passes.
|
4692 |
|
|
.IP "\fB\-fstack\-usage\fR" 4
|
4693 |
|
|
.IX Item "-fstack-usage"
|
4694 |
|
|
Makes the compiler output stack usage information for the program, on a
|
4695 |
|
|
per-function basis. The filename for the dump is made by appending
|
4696 |
|
|
\&\fI.su\fR to the \fIauxname\fR. \fIauxname\fR is generated from the name of
|
4697 |
|
|
the output file, if explicitly specified and it is not an executable,
|
4698 |
|
|
otherwise it is the basename of the source file. An entry is made up
|
4699 |
|
|
of three fields:
|
4700 |
|
|
.RS 4
|
4701 |
|
|
.IP "\(bu" 4
|
4702 |
|
|
The name of the function.
|
4703 |
|
|
.IP "\(bu" 4
|
4704 |
|
|
A number of bytes.
|
4705 |
|
|
.IP "\(bu" 4
|
4706 |
|
|
One or more qualifiers: \f(CW\*(C`static\*(C'\fR, \f(CW\*(C`dynamic\*(C'\fR, \f(CW\*(C`bounded\*(C'\fR.
|
4707 |
|
|
.RE
|
4708 |
|
|
.RS 4
|
4709 |
|
|
.Sp
|
4710 |
|
|
The qualifier \f(CW\*(C`static\*(C'\fR means that the function manipulates the stack
|
4711 |
|
|
statically: a fixed number of bytes are allocated for the frame on function
|
4712 |
|
|
entry and released on function exit; no stack adjustments are otherwise made
|
4713 |
|
|
in the function. The second field is this fixed number of bytes.
|
4714 |
|
|
.Sp
|
4715 |
|
|
The qualifier \f(CW\*(C`dynamic\*(C'\fR means that the function manipulates the stack
|
4716 |
|
|
dynamically: in addition to the static allocation described above, stack
|
4717 |
|
|
adjustments are made in the body of the function, for example to push/pop
|
4718 |
|
|
arguments around function calls. If the qualifier \f(CW\*(C`bounded\*(C'\fR is also
|
4719 |
|
|
present, the amount of these adjustments is bounded at compile time and
|
4720 |
|
|
the second field is an upper bound of the total amount of stack used by
|
4721 |
|
|
the function. If it is not present, the amount of these adjustments is
|
4722 |
|
|
not bounded at compile time and the second field only represents the
|
4723 |
|
|
bounded part.
|
4724 |
|
|
.RE
|
4725 |
|
|
.IP "\fB\-fprofile\-arcs\fR" 4
|
4726 |
|
|
.IX Item "-fprofile-arcs"
|
4727 |
|
|
Add code so that program flow \fIarcs\fR are instrumented. During
|
4728 |
|
|
execution the program records how many times each branch and call is
|
4729 |
|
|
executed and how many times it is taken or returns. When the compiled
|
4730 |
|
|
program exits it saves this data to a file called
|
4731 |
|
|
\&\fI\fIauxname\fI.gcda\fR for each source file. The data may be used for
|
4732 |
|
|
profile-directed optimizations (\fB\-fbranch\-probabilities\fR), or for
|
4733 |
|
|
test coverage analysis (\fB\-ftest\-coverage\fR). Each object file's
|
4734 |
|
|
\&\fIauxname\fR is generated from the name of the output file, if
|
4735 |
|
|
explicitly specified and it is not the final executable, otherwise it is
|
4736 |
|
|
the basename of the source file. In both cases any suffix is removed
|
4737 |
|
|
(e.g. \fIfoo.gcda\fR for input file \fIdir/foo.c\fR, or
|
4738 |
|
|
\&\fIdir/foo.gcda\fR for output file specified as \fB\-o dir/foo.o\fR).
|
4739 |
|
|
.IP "\fB\-\-coverage\fR" 4
|
4740 |
|
|
.IX Item "--coverage"
|
4741 |
|
|
This option is used to compile and link code instrumented for coverage
|
4742 |
|
|
analysis. The option is a synonym for \fB\-fprofile\-arcs\fR
|
4743 |
|
|
\&\fB\-ftest\-coverage\fR (when compiling) and \fB\-lgcov\fR (when
|
4744 |
|
|
linking). See the documentation for those options for more details.
|
4745 |
|
|
.RS 4
|
4746 |
|
|
.IP "\(bu" 4
|
4747 |
|
|
Compile the source files with \fB\-fprofile\-arcs\fR plus optimization
|
4748 |
|
|
and code generation options. For test coverage analysis, use the
|
4749 |
|
|
additional \fB\-ftest\-coverage\fR option. You do not need to profile
|
4750 |
|
|
every source file in a program.
|
4751 |
|
|
.IP "\(bu" 4
|
4752 |
|
|
Link your object files with \fB\-lgcov\fR or \fB\-fprofile\-arcs\fR
|
4753 |
|
|
(the latter implies the former).
|
4754 |
|
|
.IP "\(bu" 4
|
4755 |
|
|
Run the program on a representative workload to generate the arc profile
|
4756 |
|
|
information. This may be repeated any number of times. You can run
|
4757 |
|
|
concurrent instances of your program, and provided that the file system
|
4758 |
|
|
supports locking, the data files will be correctly updated. Also
|
4759 |
|
|
\&\f(CW\*(C`fork\*(C'\fR calls are detected and correctly handled (double counting
|
4760 |
|
|
will not happen).
|
4761 |
|
|
.IP "\(bu" 4
|
4762 |
|
|
For profile-directed optimizations, compile the source files again with
|
4763 |
|
|
the same optimization and code generation options plus
|
4764 |
|
|
\&\fB\-fbranch\-probabilities\fR.
|
4765 |
|
|
.IP "\(bu" 4
|
4766 |
|
|
For test coverage analysis, use \fBgcov\fR to produce human readable
|
4767 |
|
|
information from the \fI.gcno\fR and \fI.gcda\fR files. Refer to the
|
4768 |
|
|
\&\fBgcov\fR documentation for further information.
|
4769 |
|
|
.RE
|
4770 |
|
|
.RS 4
|
4771 |
|
|
.Sp
|
4772 |
|
|
With \fB\-fprofile\-arcs\fR, for each function of your program \s-1GCC\s0
|
4773 |
|
|
creates a program flow graph, then finds a spanning tree for the graph.
|
4774 |
|
|
Only arcs that are not on the spanning tree have to be instrumented: the
|
4775 |
|
|
compiler adds code to count the number of times that these arcs are
|
4776 |
|
|
executed. When an arc is the only exit or only entrance to a block, the
|
4777 |
|
|
instrumentation code can be added to the block; otherwise, a new basic
|
4778 |
|
|
block must be created to hold the instrumentation code.
|
4779 |
|
|
.RE
|
4780 |
|
|
.IP "\fB\-ftest\-coverage\fR" 4
|
4781 |
|
|
.IX Item "-ftest-coverage"
|
4782 |
|
|
Produce a notes file that the \fBgcov\fR code-coverage utility can use to
|
4783 |
|
|
show program coverage. Each source file's note file is called
|
4784 |
|
|
\&\fI\fIauxname\fI.gcno\fR. Refer to the \fB\-fprofile\-arcs\fR option
|
4785 |
|
|
above for a description of \fIauxname\fR and instructions on how to
|
4786 |
|
|
generate test coverage data. Coverage data matches the source files
|
4787 |
|
|
more closely if you do not optimize.
|
4788 |
|
|
.IP "\fB\-fdbg\-cnt\-list\fR" 4
|
4789 |
|
|
.IX Item "-fdbg-cnt-list"
|
4790 |
|
|
Print the name and the counter upper bound for all debug counters.
|
4791 |
|
|
.IP "\fB\-fdbg\-cnt=\fR\fIcounter-value-list\fR" 4
|
4792 |
|
|
.IX Item "-fdbg-cnt=counter-value-list"
|
4793 |
|
|
Set the internal debug counter upper bound. \fIcounter-value-list\fR
|
4794 |
|
|
is a comma-separated list of \fIname\fR:\fIvalue\fR pairs
|
4795 |
|
|
which sets the upper bound of each debug counter \fIname\fR to \fIvalue\fR.
|
4796 |
|
|
All debug counters have the initial upper bound of \f(CW\*(C`UINT_MAX\*(C'\fR;
|
4797 |
|
|
thus \f(CW\*(C`dbg_cnt()\*(C'\fR returns true always unless the upper bound
|
4798 |
|
|
is set by this option.
|
4799 |
|
|
For example, with \fB\-fdbg\-cnt=dce:10,tail_call:0\fR,
|
4800 |
|
|
\&\f(CW\*(C`dbg_cnt(dce)\*(C'\fR returns true only for first 10 invocations.
|
4801 |
|
|
.IP "\fB\-fenable\-\fR\fIkind\fR\fB\-\fR\fIpass\fR" 4
|
4802 |
|
|
.IX Item "-fenable-kind-pass"
|
4803 |
|
|
.PD 0
|
4804 |
|
|
.IP "\fB\-fdisable\-\fR\fIkind\fR\fB\-\fR\fIpass\fR\fB=\fR\fIrange-list\fR" 4
|
4805 |
|
|
.IX Item "-fdisable-kind-pass=range-list"
|
4806 |
|
|
.PD
|
4807 |
|
|
This is a set of options that are used to explicitly disable/enable
|
4808 |
|
|
optimization passes. These options are intended for use for debugging \s-1GCC\s0.
|
4809 |
|
|
Compiler users should use regular options for enabling/disabling
|
4810 |
|
|
passes instead.
|
4811 |
|
|
.RS 4
|
4812 |
|
|
.IP "\fB\-fdisable\-ipa\-\fR\fIpass\fR" 4
|
4813 |
|
|
.IX Item "-fdisable-ipa-pass"
|
4814 |
|
|
Disable \s-1IPA\s0 pass \fIpass\fR. \fIpass\fR is the pass name. If the same pass is
|
4815 |
|
|
statically invoked in the compiler multiple times, the pass name should be
|
4816 |
|
|
appended with a sequential number starting from 1.
|
4817 |
|
|
.IP "\fB\-fdisable\-rtl\-\fR\fIpass\fR" 4
|
4818 |
|
|
.IX Item "-fdisable-rtl-pass"
|
4819 |
|
|
.PD 0
|
4820 |
|
|
.IP "\fB\-fdisable\-rtl\-\fR\fIpass\fR\fB=\fR\fIrange-list\fR" 4
|
4821 |
|
|
.IX Item "-fdisable-rtl-pass=range-list"
|
4822 |
|
|
.PD
|
4823 |
|
|
Disable \s-1RTL\s0 pass \fIpass\fR. \fIpass\fR is the pass name. If the same pass is
|
4824 |
|
|
statically invoked in the compiler multiple times, the pass name should be
|
4825 |
|
|
appended with a sequential number starting from 1. \fIrange-list\fR is a
|
4826 |
|
|
comma-separated list of function ranges or assembler names. Each range is a number
|
4827 |
|
|
pair separated by a colon. The range is inclusive in both ends. If the range
|
4828 |
|
|
is trivial, the number pair can be simplified as a single number. If the
|
4829 |
|
|
function's call graph node's \fIuid\fR falls within one of the specified ranges,
|
4830 |
|
|
the \fIpass\fR is disabled for that function. The \fIuid\fR is shown in the
|
4831 |
|
|
function header of a dump file, and the pass names can be dumped by using
|
4832 |
|
|
option \fB\-fdump\-passes\fR.
|
4833 |
|
|
.IP "\fB\-fdisable\-tree\-\fR\fIpass\fR" 4
|
4834 |
|
|
.IX Item "-fdisable-tree-pass"
|
4835 |
|
|
.PD 0
|
4836 |
|
|
.IP "\fB\-fdisable\-tree\-\fR\fIpass\fR\fB=\fR\fIrange-list\fR" 4
|
4837 |
|
|
.IX Item "-fdisable-tree-pass=range-list"
|
4838 |
|
|
.PD
|
4839 |
|
|
Disable tree pass \fIpass\fR. See \fB\-fdisable\-rtl\fR for the description of
|
4840 |
|
|
option arguments.
|
4841 |
|
|
.IP "\fB\-fenable\-ipa\-\fR\fIpass\fR" 4
|
4842 |
|
|
.IX Item "-fenable-ipa-pass"
|
4843 |
|
|
Enable \s-1IPA\s0 pass \fIpass\fR. \fIpass\fR is the pass name. If the same pass is
|
4844 |
|
|
statically invoked in the compiler multiple times, the pass name should be
|
4845 |
|
|
appended with a sequential number starting from 1.
|
4846 |
|
|
.IP "\fB\-fenable\-rtl\-\fR\fIpass\fR" 4
|
4847 |
|
|
.IX Item "-fenable-rtl-pass"
|
4848 |
|
|
.PD 0
|
4849 |
|
|
.IP "\fB\-fenable\-rtl\-\fR\fIpass\fR\fB=\fR\fIrange-list\fR" 4
|
4850 |
|
|
.IX Item "-fenable-rtl-pass=range-list"
|
4851 |
|
|
.PD
|
4852 |
|
|
Enable \s-1RTL\s0 pass \fIpass\fR. See \fB\-fdisable\-rtl\fR for option argument
|
4853 |
|
|
description and examples.
|
4854 |
|
|
.IP "\fB\-fenable\-tree\-\fR\fIpass\fR" 4
|
4855 |
|
|
.IX Item "-fenable-tree-pass"
|
4856 |
|
|
.PD 0
|
4857 |
|
|
.IP "\fB\-fenable\-tree\-\fR\fIpass\fR\fB=\fR\fIrange-list\fR" 4
|
4858 |
|
|
.IX Item "-fenable-tree-pass=range-list"
|
4859 |
|
|
.PD
|
4860 |
|
|
Enable tree pass \fIpass\fR. See \fB\-fdisable\-rtl\fR for the description
|
4861 |
|
|
of option arguments.
|
4862 |
|
|
.RE
|
4863 |
|
|
.RS 4
|
4864 |
|
|
.Sp
|
4865 |
|
|
Here are some examples showing uses of these options.
|
4866 |
|
|
.Sp
|
4867 |
|
|
.Vb 10
|
4868 |
|
|
\& # disable ccp1 for all functions
|
4869 |
|
|
\& \-fdisable\-tree\-ccp1
|
4870 |
|
|
\& # disable complete unroll for function whose cgraph node uid is 1
|
4871 |
|
|
\& \-fenable\-tree\-cunroll=1
|
4872 |
|
|
\& # disable gcse2 for functions at the following ranges [1,1],
|
4873 |
|
|
\& # [300,400], and [400,1000]
|
4874 |
|
|
\& # disable gcse2 for functions foo and foo2
|
4875 |
|
|
\& \-fdisable\-rtl\-gcse2=foo,foo2
|
4876 |
|
|
\& # disable early inlining
|
4877 |
|
|
\& \-fdisable\-tree\-einline
|
4878 |
|
|
\& # disable ipa inlining
|
4879 |
|
|
\& \-fdisable\-ipa\-inline
|
4880 |
|
|
\& # enable tree full unroll
|
4881 |
|
|
\& \-fenable\-tree\-unroll
|
4882 |
|
|
.Ve
|
4883 |
|
|
.RE
|
4884 |
|
|
.IP "\fB\-d\fR\fIletters\fR" 4
|
4885 |
|
|
.IX Item "-dletters"
|
4886 |
|
|
.PD 0
|
4887 |
|
|
.IP "\fB\-fdump\-rtl\-\fR\fIpass\fR" 4
|
4888 |
|
|
.IX Item "-fdump-rtl-pass"
|
4889 |
|
|
.IP "\fB\-fdump\-rtl\-\fR\fIpass\fR\fB=\fR\fIfilename\fR" 4
|
4890 |
|
|
.IX Item "-fdump-rtl-pass=filename"
|
4891 |
|
|
.PD
|
4892 |
|
|
Says to make debugging dumps during compilation at times specified by
|
4893 |
|
|
\&\fIletters\fR. This is used for debugging the RTL-based passes of the
|
4894 |
|
|
compiler. The file names for most of the dumps are made by appending
|
4895 |
|
|
a pass number and a word to the \fIdumpname\fR, and the files are
|
4896 |
|
|
created in the directory of the output file. In case of
|
4897 |
|
|
\&\fB=\fR\fIfilename\fR option, the dump is output on the given file
|
4898 |
|
|
instead of the pass numbered dump files. Note that the pass number is
|
4899 |
|
|
computed statically as passes get registered into the pass manager.
|
4900 |
|
|
Thus the numbering is not related to the dynamic order of execution of
|
4901 |
|
|
passes. In particular, a pass installed by a plugin could have a
|
4902 |
|
|
number over 200 even if it executed quite early. \fIdumpname\fR is
|
4903 |
|
|
generated from the name of the output file, if explicitly specified
|
4904 |
|
|
and it is not an executable, otherwise it is the basename of the
|
4905 |
|
|
source file. These switches may have different effects when
|
4906 |
|
|
\&\fB\-E\fR is used for preprocessing.
|
4907 |
|
|
.Sp
|
4908 |
|
|
Debug dumps can be enabled with a \fB\-fdump\-rtl\fR switch or some
|
4909 |
|
|
\&\fB\-d\fR option \fIletters\fR. Here are the possible
|
4910 |
|
|
letters for use in \fIpass\fR and \fIletters\fR, and their meanings:
|
4911 |
|
|
.RS 4
|
4912 |
|
|
.IP "\fB\-fdump\-rtl\-alignments\fR" 4
|
4913 |
|
|
.IX Item "-fdump-rtl-alignments"
|
4914 |
|
|
Dump after branch alignments have been computed.
|
4915 |
|
|
.IP "\fB\-fdump\-rtl\-asmcons\fR" 4
|
4916 |
|
|
.IX Item "-fdump-rtl-asmcons"
|
4917 |
|
|
Dump after fixing rtl statements that have unsatisfied in/out constraints.
|
4918 |
|
|
.IP "\fB\-fdump\-rtl\-auto_inc_dec\fR" 4
|
4919 |
|
|
.IX Item "-fdump-rtl-auto_inc_dec"
|
4920 |
|
|
Dump after auto-inc-dec discovery. This pass is only run on
|
4921 |
|
|
architectures that have auto inc or auto dec instructions.
|
4922 |
|
|
.IP "\fB\-fdump\-rtl\-barriers\fR" 4
|
4923 |
|
|
.IX Item "-fdump-rtl-barriers"
|
4924 |
|
|
Dump after cleaning up the barrier instructions.
|
4925 |
|
|
.IP "\fB\-fdump\-rtl\-bbpart\fR" 4
|
4926 |
|
|
.IX Item "-fdump-rtl-bbpart"
|
4927 |
|
|
Dump after partitioning hot and cold basic blocks.
|
4928 |
|
|
.IP "\fB\-fdump\-rtl\-bbro\fR" 4
|
4929 |
|
|
.IX Item "-fdump-rtl-bbro"
|
4930 |
|
|
Dump after block reordering.
|
4931 |
|
|
.IP "\fB\-fdump\-rtl\-btl1\fR" 4
|
4932 |
|
|
.IX Item "-fdump-rtl-btl1"
|
4933 |
|
|
.PD 0
|
4934 |
|
|
.IP "\fB\-fdump\-rtl\-btl2\fR" 4
|
4935 |
|
|
.IX Item "-fdump-rtl-btl2"
|
4936 |
|
|
.PD
|
4937 |
|
|
\&\fB\-fdump\-rtl\-btl1\fR and \fB\-fdump\-rtl\-btl2\fR enable dumping
|
4938 |
|
|
after the two branch
|
4939 |
|
|
target load optimization passes.
|
4940 |
|
|
.IP "\fB\-fdump\-rtl\-bypass\fR" 4
|
4941 |
|
|
.IX Item "-fdump-rtl-bypass"
|
4942 |
|
|
Dump after jump bypassing and control flow optimizations.
|
4943 |
|
|
.IP "\fB\-fdump\-rtl\-combine\fR" 4
|
4944 |
|
|
.IX Item "-fdump-rtl-combine"
|
4945 |
|
|
Dump after the \s-1RTL\s0 instruction combination pass.
|
4946 |
|
|
.IP "\fB\-fdump\-rtl\-compgotos\fR" 4
|
4947 |
|
|
.IX Item "-fdump-rtl-compgotos"
|
4948 |
|
|
Dump after duplicating the computed gotos.
|
4949 |
|
|
.IP "\fB\-fdump\-rtl\-ce1\fR" 4
|
4950 |
|
|
.IX Item "-fdump-rtl-ce1"
|
4951 |
|
|
.PD 0
|
4952 |
|
|
.IP "\fB\-fdump\-rtl\-ce2\fR" 4
|
4953 |
|
|
.IX Item "-fdump-rtl-ce2"
|
4954 |
|
|
.IP "\fB\-fdump\-rtl\-ce3\fR" 4
|
4955 |
|
|
.IX Item "-fdump-rtl-ce3"
|
4956 |
|
|
.PD
|
4957 |
|
|
\&\fB\-fdump\-rtl\-ce1\fR, \fB\-fdump\-rtl\-ce2\fR, and
|
4958 |
|
|
\&\fB\-fdump\-rtl\-ce3\fR enable dumping after the three
|
4959 |
|
|
if conversion passes.
|
4960 |
|
|
.IP "\fB\-fdump\-rtl\-cprop_hardreg\fR" 4
|
4961 |
|
|
.IX Item "-fdump-rtl-cprop_hardreg"
|
4962 |
|
|
Dump after hard register copy propagation.
|
4963 |
|
|
.IP "\fB\-fdump\-rtl\-csa\fR" 4
|
4964 |
|
|
.IX Item "-fdump-rtl-csa"
|
4965 |
|
|
Dump after combining stack adjustments.
|
4966 |
|
|
.IP "\fB\-fdump\-rtl\-cse1\fR" 4
|
4967 |
|
|
.IX Item "-fdump-rtl-cse1"
|
4968 |
|
|
.PD 0
|
4969 |
|
|
.IP "\fB\-fdump\-rtl\-cse2\fR" 4
|
4970 |
|
|
.IX Item "-fdump-rtl-cse2"
|
4971 |
|
|
.PD
|
4972 |
|
|
\&\fB\-fdump\-rtl\-cse1\fR and \fB\-fdump\-rtl\-cse2\fR enable dumping after
|
4973 |
|
|
the two common subexpression elimination passes.
|
4974 |
|
|
.IP "\fB\-fdump\-rtl\-dce\fR" 4
|
4975 |
|
|
.IX Item "-fdump-rtl-dce"
|
4976 |
|
|
Dump after the standalone dead code elimination passes.
|
4977 |
|
|
.IP "\fB\-fdump\-rtl\-dbr\fR" 4
|
4978 |
|
|
.IX Item "-fdump-rtl-dbr"
|
4979 |
|
|
Dump after delayed branch scheduling.
|
4980 |
|
|
.IP "\fB\-fdump\-rtl\-dce1\fR" 4
|
4981 |
|
|
.IX Item "-fdump-rtl-dce1"
|
4982 |
|
|
.PD 0
|
4983 |
|
|
.IP "\fB\-fdump\-rtl\-dce2\fR" 4
|
4984 |
|
|
.IX Item "-fdump-rtl-dce2"
|
4985 |
|
|
.PD
|
4986 |
|
|
\&\fB\-fdump\-rtl\-dce1\fR and \fB\-fdump\-rtl\-dce2\fR enable dumping after
|
4987 |
|
|
the two dead store elimination passes.
|
4988 |
|
|
.IP "\fB\-fdump\-rtl\-eh\fR" 4
|
4989 |
|
|
.IX Item "-fdump-rtl-eh"
|
4990 |
|
|
Dump after finalization of \s-1EH\s0 handling code.
|
4991 |
|
|
.IP "\fB\-fdump\-rtl\-eh_ranges\fR" 4
|
4992 |
|
|
.IX Item "-fdump-rtl-eh_ranges"
|
4993 |
|
|
Dump after conversion of \s-1EH\s0 handling range regions.
|
4994 |
|
|
.IP "\fB\-fdump\-rtl\-expand\fR" 4
|
4995 |
|
|
.IX Item "-fdump-rtl-expand"
|
4996 |
|
|
Dump after \s-1RTL\s0 generation.
|
4997 |
|
|
.IP "\fB\-fdump\-rtl\-fwprop1\fR" 4
|
4998 |
|
|
.IX Item "-fdump-rtl-fwprop1"
|
4999 |
|
|
.PD 0
|
5000 |
|
|
.IP "\fB\-fdump\-rtl\-fwprop2\fR" 4
|
5001 |
|
|
.IX Item "-fdump-rtl-fwprop2"
|
5002 |
|
|
.PD
|
5003 |
|
|
\&\fB\-fdump\-rtl\-fwprop1\fR and \fB\-fdump\-rtl\-fwprop2\fR enable
|
5004 |
|
|
dumping after the two forward propagation passes.
|
5005 |
|
|
.IP "\fB\-fdump\-rtl\-gcse1\fR" 4
|
5006 |
|
|
.IX Item "-fdump-rtl-gcse1"
|
5007 |
|
|
.PD 0
|
5008 |
|
|
.IP "\fB\-fdump\-rtl\-gcse2\fR" 4
|
5009 |
|
|
.IX Item "-fdump-rtl-gcse2"
|
5010 |
|
|
.PD
|
5011 |
|
|
\&\fB\-fdump\-rtl\-gcse1\fR and \fB\-fdump\-rtl\-gcse2\fR enable dumping
|
5012 |
|
|
after global common subexpression elimination.
|
5013 |
|
|
.IP "\fB\-fdump\-rtl\-init\-regs\fR" 4
|
5014 |
|
|
.IX Item "-fdump-rtl-init-regs"
|
5015 |
|
|
Dump after the initialization of the registers.
|
5016 |
|
|
.IP "\fB\-fdump\-rtl\-initvals\fR" 4
|
5017 |
|
|
.IX Item "-fdump-rtl-initvals"
|
5018 |
|
|
Dump after the computation of the initial value sets.
|
5019 |
|
|
.IP "\fB\-fdump\-rtl\-into_cfglayout\fR" 4
|
5020 |
|
|
.IX Item "-fdump-rtl-into_cfglayout"
|
5021 |
|
|
Dump after converting to cfglayout mode.
|
5022 |
|
|
.IP "\fB\-fdump\-rtl\-ira\fR" 4
|
5023 |
|
|
.IX Item "-fdump-rtl-ira"
|
5024 |
|
|
Dump after iterated register allocation.
|
5025 |
|
|
.IP "\fB\-fdump\-rtl\-jump\fR" 4
|
5026 |
|
|
.IX Item "-fdump-rtl-jump"
|
5027 |
|
|
Dump after the second jump optimization.
|
5028 |
|
|
.IP "\fB\-fdump\-rtl\-loop2\fR" 4
|
5029 |
|
|
.IX Item "-fdump-rtl-loop2"
|
5030 |
|
|
\&\fB\-fdump\-rtl\-loop2\fR enables dumping after the rtl
|
5031 |
|
|
loop optimization passes.
|
5032 |
|
|
.IP "\fB\-fdump\-rtl\-mach\fR" 4
|
5033 |
|
|
.IX Item "-fdump-rtl-mach"
|
5034 |
|
|
Dump after performing the machine dependent reorganization pass, if that
|
5035 |
|
|
pass exists.
|
5036 |
|
|
.IP "\fB\-fdump\-rtl\-mode_sw\fR" 4
|
5037 |
|
|
.IX Item "-fdump-rtl-mode_sw"
|
5038 |
|
|
Dump after removing redundant mode switches.
|
5039 |
|
|
.IP "\fB\-fdump\-rtl\-rnreg\fR" 4
|
5040 |
|
|
.IX Item "-fdump-rtl-rnreg"
|
5041 |
|
|
Dump after register renumbering.
|
5042 |
|
|
.IP "\fB\-fdump\-rtl\-outof_cfglayout\fR" 4
|
5043 |
|
|
.IX Item "-fdump-rtl-outof_cfglayout"
|
5044 |
|
|
Dump after converting from cfglayout mode.
|
5045 |
|
|
.IP "\fB\-fdump\-rtl\-peephole2\fR" 4
|
5046 |
|
|
.IX Item "-fdump-rtl-peephole2"
|
5047 |
|
|
Dump after the peephole pass.
|
5048 |
|
|
.IP "\fB\-fdump\-rtl\-postreload\fR" 4
|
5049 |
|
|
.IX Item "-fdump-rtl-postreload"
|
5050 |
|
|
Dump after post-reload optimizations.
|
5051 |
|
|
.IP "\fB\-fdump\-rtl\-pro_and_epilogue\fR" 4
|
5052 |
|
|
.IX Item "-fdump-rtl-pro_and_epilogue"
|
5053 |
|
|
Dump after generating the function prologues and epilogues.
|
5054 |
|
|
.IP "\fB\-fdump\-rtl\-regmove\fR" 4
|
5055 |
|
|
.IX Item "-fdump-rtl-regmove"
|
5056 |
|
|
Dump after the register move pass.
|
5057 |
|
|
.IP "\fB\-fdump\-rtl\-sched1\fR" 4
|
5058 |
|
|
.IX Item "-fdump-rtl-sched1"
|
5059 |
|
|
.PD 0
|
5060 |
|
|
.IP "\fB\-fdump\-rtl\-sched2\fR" 4
|
5061 |
|
|
.IX Item "-fdump-rtl-sched2"
|
5062 |
|
|
.PD
|
5063 |
|
|
\&\fB\-fdump\-rtl\-sched1\fR and \fB\-fdump\-rtl\-sched2\fR enable dumping
|
5064 |
|
|
after the basic block scheduling passes.
|
5065 |
|
|
.IP "\fB\-fdump\-rtl\-see\fR" 4
|
5066 |
|
|
.IX Item "-fdump-rtl-see"
|
5067 |
|
|
Dump after sign extension elimination.
|
5068 |
|
|
.IP "\fB\-fdump\-rtl\-seqabstr\fR" 4
|
5069 |
|
|
.IX Item "-fdump-rtl-seqabstr"
|
5070 |
|
|
Dump after common sequence discovery.
|
5071 |
|
|
.IP "\fB\-fdump\-rtl\-shorten\fR" 4
|
5072 |
|
|
.IX Item "-fdump-rtl-shorten"
|
5073 |
|
|
Dump after shortening branches.
|
5074 |
|
|
.IP "\fB\-fdump\-rtl\-sibling\fR" 4
|
5075 |
|
|
.IX Item "-fdump-rtl-sibling"
|
5076 |
|
|
Dump after sibling call optimizations.
|
5077 |
|
|
.IP "\fB\-fdump\-rtl\-split1\fR" 4
|
5078 |
|
|
.IX Item "-fdump-rtl-split1"
|
5079 |
|
|
.PD 0
|
5080 |
|
|
.IP "\fB\-fdump\-rtl\-split2\fR" 4
|
5081 |
|
|
.IX Item "-fdump-rtl-split2"
|
5082 |
|
|
.IP "\fB\-fdump\-rtl\-split3\fR" 4
|
5083 |
|
|
.IX Item "-fdump-rtl-split3"
|
5084 |
|
|
.IP "\fB\-fdump\-rtl\-split4\fR" 4
|
5085 |
|
|
.IX Item "-fdump-rtl-split4"
|
5086 |
|
|
.IP "\fB\-fdump\-rtl\-split5\fR" 4
|
5087 |
|
|
.IX Item "-fdump-rtl-split5"
|
5088 |
|
|
.PD
|
5089 |
|
|
\&\fB\-fdump\-rtl\-split1\fR, \fB\-fdump\-rtl\-split2\fR,
|
5090 |
|
|
\&\fB\-fdump\-rtl\-split3\fR, \fB\-fdump\-rtl\-split4\fR and
|
5091 |
|
|
\&\fB\-fdump\-rtl\-split5\fR enable dumping after five rounds of
|
5092 |
|
|
instruction splitting.
|
5093 |
|
|
.IP "\fB\-fdump\-rtl\-sms\fR" 4
|
5094 |
|
|
.IX Item "-fdump-rtl-sms"
|
5095 |
|
|
Dump after modulo scheduling. This pass is only run on some
|
5096 |
|
|
architectures.
|
5097 |
|
|
.IP "\fB\-fdump\-rtl\-stack\fR" 4
|
5098 |
|
|
.IX Item "-fdump-rtl-stack"
|
5099 |
|
|
Dump after conversion from \s-1GCC\s0's \*(L"flat register file\*(R" registers to the
|
5100 |
|
|
x87's stack-like registers. This pass is only run on x86 variants.
|
5101 |
|
|
.IP "\fB\-fdump\-rtl\-subreg1\fR" 4
|
5102 |
|
|
.IX Item "-fdump-rtl-subreg1"
|
5103 |
|
|
.PD 0
|
5104 |
|
|
.IP "\fB\-fdump\-rtl\-subreg2\fR" 4
|
5105 |
|
|
.IX Item "-fdump-rtl-subreg2"
|
5106 |
|
|
.PD
|
5107 |
|
|
\&\fB\-fdump\-rtl\-subreg1\fR and \fB\-fdump\-rtl\-subreg2\fR enable dumping after
|
5108 |
|
|
the two subreg expansion passes.
|
5109 |
|
|
.IP "\fB\-fdump\-rtl\-unshare\fR" 4
|
5110 |
|
|
.IX Item "-fdump-rtl-unshare"
|
5111 |
|
|
Dump after all rtl has been unshared.
|
5112 |
|
|
.IP "\fB\-fdump\-rtl\-vartrack\fR" 4
|
5113 |
|
|
.IX Item "-fdump-rtl-vartrack"
|
5114 |
|
|
Dump after variable tracking.
|
5115 |
|
|
.IP "\fB\-fdump\-rtl\-vregs\fR" 4
|
5116 |
|
|
.IX Item "-fdump-rtl-vregs"
|
5117 |
|
|
Dump after converting virtual registers to hard registers.
|
5118 |
|
|
.IP "\fB\-fdump\-rtl\-web\fR" 4
|
5119 |
|
|
.IX Item "-fdump-rtl-web"
|
5120 |
|
|
Dump after live range splitting.
|
5121 |
|
|
.IP "\fB\-fdump\-rtl\-regclass\fR" 4
|
5122 |
|
|
.IX Item "-fdump-rtl-regclass"
|
5123 |
|
|
.PD 0
|
5124 |
|
|
.IP "\fB\-fdump\-rtl\-subregs_of_mode_init\fR" 4
|
5125 |
|
|
.IX Item "-fdump-rtl-subregs_of_mode_init"
|
5126 |
|
|
.IP "\fB\-fdump\-rtl\-subregs_of_mode_finish\fR" 4
|
5127 |
|
|
.IX Item "-fdump-rtl-subregs_of_mode_finish"
|
5128 |
|
|
.IP "\fB\-fdump\-rtl\-dfinit\fR" 4
|
5129 |
|
|
.IX Item "-fdump-rtl-dfinit"
|
5130 |
|
|
.IP "\fB\-fdump\-rtl\-dfinish\fR" 4
|
5131 |
|
|
.IX Item "-fdump-rtl-dfinish"
|
5132 |
|
|
.PD
|
5133 |
|
|
These dumps are defined but always produce empty files.
|
5134 |
|
|
.IP "\fB\-da\fR" 4
|
5135 |
|
|
.IX Item "-da"
|
5136 |
|
|
.PD 0
|
5137 |
|
|
.IP "\fB\-fdump\-rtl\-all\fR" 4
|
5138 |
|
|
.IX Item "-fdump-rtl-all"
|
5139 |
|
|
.PD
|
5140 |
|
|
Produce all the dumps listed above.
|
5141 |
|
|
.IP "\fB\-dA\fR" 4
|
5142 |
|
|
.IX Item "-dA"
|
5143 |
|
|
Annotate the assembler output with miscellaneous debugging information.
|
5144 |
|
|
.IP "\fB\-dD\fR" 4
|
5145 |
|
|
.IX Item "-dD"
|
5146 |
|
|
Dump all macro definitions, at the end of preprocessing, in addition to
|
5147 |
|
|
normal output.
|
5148 |
|
|
.IP "\fB\-dH\fR" 4
|
5149 |
|
|
.IX Item "-dH"
|
5150 |
|
|
Produce a core dump whenever an error occurs.
|
5151 |
|
|
.IP "\fB\-dp\fR" 4
|
5152 |
|
|
.IX Item "-dp"
|
5153 |
|
|
Annotate the assembler output with a comment indicating which
|
5154 |
|
|
pattern and alternative is used. The length of each instruction is
|
5155 |
|
|
also printed.
|
5156 |
|
|
.IP "\fB\-dP\fR" 4
|
5157 |
|
|
.IX Item "-dP"
|
5158 |
|
|
Dump the \s-1RTL\s0 in the assembler output as a comment before each instruction.
|
5159 |
|
|
Also turns on \fB\-dp\fR annotation.
|
5160 |
|
|
.IP "\fB\-dx\fR" 4
|
5161 |
|
|
.IX Item "-dx"
|
5162 |
|
|
Just generate \s-1RTL\s0 for a function instead of compiling it. Usually used
|
5163 |
|
|
with \fB\-fdump\-rtl\-expand\fR.
|
5164 |
|
|
.RE
|
5165 |
|
|
.RS 4
|
5166 |
|
|
.RE
|
5167 |
|
|
.IP "\fB\-fdump\-noaddr\fR" 4
|
5168 |
|
|
.IX Item "-fdump-noaddr"
|
5169 |
|
|
When doing debugging dumps, suppress address output. This makes it more
|
5170 |
|
|
feasible to use diff on debugging dumps for compiler invocations with
|
5171 |
|
|
different compiler binaries and/or different
|
5172 |
|
|
text / bss / data / heap / stack / dso start locations.
|
5173 |
|
|
.IP "\fB\-fdump\-unnumbered\fR" 4
|
5174 |
|
|
.IX Item "-fdump-unnumbered"
|
5175 |
|
|
When doing debugging dumps, suppress instruction numbers and address output.
|
5176 |
|
|
This makes it more feasible to use diff on debugging dumps for compiler
|
5177 |
|
|
invocations with different options, in particular with and without
|
5178 |
|
|
\&\fB\-g\fR.
|
5179 |
|
|
.IP "\fB\-fdump\-unnumbered\-links\fR" 4
|
5180 |
|
|
.IX Item "-fdump-unnumbered-links"
|
5181 |
|
|
When doing debugging dumps (see \fB\-d\fR option above), suppress
|
5182 |
|
|
instruction numbers for the links to the previous and next instructions
|
5183 |
|
|
in a sequence.
|
5184 |
|
|
.IP "\fB\-fdump\-translation\-unit\fR (\*(C+ only)" 4
|
5185 |
|
|
.IX Item "-fdump-translation-unit ( only)"
|
5186 |
|
|
.PD 0
|
5187 |
|
|
.IP "\fB\-fdump\-translation\-unit\-\fR\fIoptions\fR\fB \fR(\*(C+ only)" 4
|
5188 |
|
|
.IX Item "-fdump-translation-unit-options ( only)"
|
5189 |
|
|
.PD
|
5190 |
|
|
Dump a representation of the tree structure for the entire translation
|
5191 |
|
|
unit to a file. The file name is made by appending \fI.tu\fR to the
|
5192 |
|
|
source file name, and the file is created in the same directory as the
|
5193 |
|
|
output file. If the \fB\-\fR\fIoptions\fR form is used, \fIoptions\fR
|
5194 |
|
|
controls the details of the dump as described for the
|
5195 |
|
|
\&\fB\-fdump\-tree\fR options.
|
5196 |
|
|
.IP "\fB\-fdump\-class\-hierarchy\fR (\*(C+ only)" 4
|
5197 |
|
|
.IX Item "-fdump-class-hierarchy ( only)"
|
5198 |
|
|
.PD 0
|
5199 |
|
|
.IP "\fB\-fdump\-class\-hierarchy\-\fR\fIoptions\fR\fB \fR(\*(C+ only)" 4
|
5200 |
|
|
.IX Item "-fdump-class-hierarchy-options ( only)"
|
5201 |
|
|
.PD
|
5202 |
|
|
Dump a representation of each class's hierarchy and virtual function
|
5203 |
|
|
table layout to a file. The file name is made by appending
|
5204 |
|
|
\&\fI.class\fR to the source file name, and the file is created in the
|
5205 |
|
|
same directory as the output file. If the \fB\-\fR\fIoptions\fR form
|
5206 |
|
|
is used, \fIoptions\fR controls the details of the dump as described
|
5207 |
|
|
for the \fB\-fdump\-tree\fR options.
|
5208 |
|
|
.IP "\fB\-fdump\-ipa\-\fR\fIswitch\fR" 4
|
5209 |
|
|
.IX Item "-fdump-ipa-switch"
|
5210 |
|
|
Control the dumping at various stages of inter-procedural analysis
|
5211 |
|
|
language tree to a file. The file name is generated by appending a
|
5212 |
|
|
switch specific suffix to the source file name, and the file is created
|
5213 |
|
|
in the same directory as the output file. The following dumps are
|
5214 |
|
|
possible:
|
5215 |
|
|
.RS 4
|
5216 |
|
|
.IP "\fBall\fR" 4
|
5217 |
|
|
.IX Item "all"
|
5218 |
|
|
Enables all inter-procedural analysis dumps.
|
5219 |
|
|
.IP "\fBcgraph\fR" 4
|
5220 |
|
|
.IX Item "cgraph"
|
5221 |
|
|
Dumps information about call-graph optimization, unused function removal,
|
5222 |
|
|
and inlining decisions.
|
5223 |
|
|
.IP "\fBinline\fR" 4
|
5224 |
|
|
.IX Item "inline"
|
5225 |
|
|
Dump after function inlining.
|
5226 |
|
|
.RE
|
5227 |
|
|
.RS 4
|
5228 |
|
|
.RE
|
5229 |
|
|
.IP "\fB\-fdump\-passes\fR" 4
|
5230 |
|
|
.IX Item "-fdump-passes"
|
5231 |
|
|
Dump the list of optimization passes that are turned on and off by
|
5232 |
|
|
the current command-line options.
|
5233 |
|
|
.IP "\fB\-fdump\-statistics\-\fR\fIoption\fR" 4
|
5234 |
|
|
.IX Item "-fdump-statistics-option"
|
5235 |
|
|
Enable and control dumping of pass statistics in a separate file. The
|
5236 |
|
|
file name is generated by appending a suffix ending in
|
5237 |
|
|
\&\fB.statistics\fR to the source file name, and the file is created in
|
5238 |
|
|
the same directory as the output file. If the \fB\-\fR\fIoption\fR
|
5239 |
|
|
form is used, \fB\-stats\fR causes counters to be summed over the
|
5240 |
|
|
whole compilation unit while \fB\-details\fR dumps every event as
|
5241 |
|
|
the passes generate them. The default with no option is to sum
|
5242 |
|
|
counters for each function compiled.
|
5243 |
|
|
.IP "\fB\-fdump\-tree\-\fR\fIswitch\fR" 4
|
5244 |
|
|
.IX Item "-fdump-tree-switch"
|
5245 |
|
|
.PD 0
|
5246 |
|
|
.IP "\fB\-fdump\-tree\-\fR\fIswitch\fR\fB\-\fR\fIoptions\fR" 4
|
5247 |
|
|
.IX Item "-fdump-tree-switch-options"
|
5248 |
|
|
.IP "\fB\-fdump\-tree\-\fR\fIswitch\fR\fB\-\fR\fIoptions\fR\fB=\fR\fIfilename\fR" 4
|
5249 |
|
|
.IX Item "-fdump-tree-switch-options=filename"
|
5250 |
|
|
.PD
|
5251 |
|
|
Control the dumping at various stages of processing the intermediate
|
5252 |
|
|
language tree to a file. The file name is generated by appending a
|
5253 |
|
|
switch-specific suffix to the source file name, and the file is
|
5254 |
|
|
created in the same directory as the output file. In case of
|
5255 |
|
|
\&\fB=\fR\fIfilename\fR option, the dump is output on the given file
|
5256 |
|
|
instead of the auto named dump files. If the \fB\-\fR\fIoptions\fR
|
5257 |
|
|
form is used, \fIoptions\fR is a list of \fB\-\fR separated options
|
5258 |
|
|
which control the details of the dump. Not all options are applicable
|
5259 |
|
|
to all dumps; those that are not meaningful are ignored. The
|
5260 |
|
|
following options are available
|
5261 |
|
|
.RS 4
|
5262 |
|
|
.IP "\fBaddress\fR" 4
|
5263 |
|
|
.IX Item "address"
|
5264 |
|
|
Print the address of each node. Usually this is not meaningful as it
|
5265 |
|
|
changes according to the environment and source file. Its primary use
|
5266 |
|
|
is for tying up a dump file with a debug environment.
|
5267 |
|
|
.IP "\fBasmname\fR" 4
|
5268 |
|
|
.IX Item "asmname"
|
5269 |
|
|
If \f(CW\*(C`DECL_ASSEMBLER_NAME\*(C'\fR has been set for a given decl, use that
|
5270 |
|
|
in the dump instead of \f(CW\*(C`DECL_NAME\*(C'\fR. Its primary use is ease of
|
5271 |
|
|
use working backward from mangled names in the assembly file.
|
5272 |
|
|
.IP "\fBslim\fR" 4
|
5273 |
|
|
.IX Item "slim"
|
5274 |
|
|
When dumping front-end intermediate representations, inhibit dumping
|
5275 |
|
|
of members of a scope or body of a function merely because that scope
|
5276 |
|
|
has been reached. Only dump such items when they are directly reachable
|
5277 |
|
|
by some other path.
|
5278 |
|
|
.Sp
|
5279 |
|
|
When dumping pretty-printed trees, this option inhibits dumping the
|
5280 |
|
|
bodies of control structures.
|
5281 |
|
|
.Sp
|
5282 |
|
|
When dumping \s-1RTL\s0, print the \s-1RTL\s0 in slim (condensed) form instead of
|
5283 |
|
|
the default LISP-like representation.
|
5284 |
|
|
.IP "\fBraw\fR" 4
|
5285 |
|
|
.IX Item "raw"
|
5286 |
|
|
Print a raw representation of the tree. By default, trees are
|
5287 |
|
|
pretty-printed into a C\-like representation.
|
5288 |
|
|
.IP "\fBdetails\fR" 4
|
5289 |
|
|
.IX Item "details"
|
5290 |
|
|
Enable more detailed dumps (not honored by every dump option). Also
|
5291 |
|
|
include information from the optimization passes.
|
5292 |
|
|
.IP "\fBstats\fR" 4
|
5293 |
|
|
.IX Item "stats"
|
5294 |
|
|
Enable dumping various statistics about the pass (not honored by every dump
|
5295 |
|
|
option).
|
5296 |
|
|
.IP "\fBblocks\fR" 4
|
5297 |
|
|
.IX Item "blocks"
|
5298 |
|
|
Enable showing basic block boundaries (disabled in raw dumps).
|
5299 |
|
|
.IP "\fBgraph\fR" 4
|
5300 |
|
|
.IX Item "graph"
|
5301 |
|
|
For each of the other indicated dump files (\fB\-fdump\-rtl\-\fR\fIpass\fR),
|
5302 |
|
|
dump a representation of the control flow graph suitable for viewing with
|
5303 |
|
|
GraphViz to \fI\fIfile\fI.\fIpassid\fI.\fIpass\fI.dot\fR. Note that if
|
5304 |
|
|
the file contains more than one function, the generated file cannot be
|
5305 |
|
|
used directly by GraphViz. You must cut and paste each function's
|
5306 |
|
|
graph into its own separate file first.
|
5307 |
|
|
.Sp
|
5308 |
|
|
This option currently only works for \s-1RTL\s0 dumps, and the \s-1RTL\s0 is always
|
5309 |
|
|
dumped in slim form.
|
5310 |
|
|
.IP "\fBvops\fR" 4
|
5311 |
|
|
.IX Item "vops"
|
5312 |
|
|
Enable showing virtual operands for every statement.
|
5313 |
|
|
.IP "\fBlineno\fR" 4
|
5314 |
|
|
.IX Item "lineno"
|
5315 |
|
|
Enable showing line numbers for statements.
|
5316 |
|
|
.IP "\fBuid\fR" 4
|
5317 |
|
|
.IX Item "uid"
|
5318 |
|
|
Enable showing the unique \s-1ID\s0 (\f(CW\*(C`DECL_UID\*(C'\fR) for each variable.
|
5319 |
|
|
.IP "\fBverbose\fR" 4
|
5320 |
|
|
.IX Item "verbose"
|
5321 |
|
|
Enable showing the tree dump for each statement.
|
5322 |
|
|
.IP "\fBeh\fR" 4
|
5323 |
|
|
.IX Item "eh"
|
5324 |
|
|
Enable showing the \s-1EH\s0 region number holding each statement.
|
5325 |
|
|
.IP "\fBscev\fR" 4
|
5326 |
|
|
.IX Item "scev"
|
5327 |
|
|
Enable showing scalar evolution analysis details.
|
5328 |
|
|
.IP "\fBoptimized\fR" 4
|
5329 |
|
|
.IX Item "optimized"
|
5330 |
|
|
Enable showing optimization information (only available in certain
|
5331 |
|
|
passes).
|
5332 |
|
|
.IP "\fBmissed\fR" 4
|
5333 |
|
|
.IX Item "missed"
|
5334 |
|
|
Enable showing missed optimization information (only available in certain
|
5335 |
|
|
passes).
|
5336 |
|
|
.IP "\fBnotes\fR" 4
|
5337 |
|
|
.IX Item "notes"
|
5338 |
|
|
Enable other detailed optimization information (only available in
|
5339 |
|
|
certain passes).
|
5340 |
|
|
.IP "\fB=\fR\fIfilename\fR" 4
|
5341 |
|
|
.IX Item "=filename"
|
5342 |
|
|
Instead of an auto named dump file, output into the given file
|
5343 |
|
|
name. The file names \fIstdout\fR and \fIstderr\fR are treated
|
5344 |
|
|
specially and are considered already open standard streams. For
|
5345 |
|
|
example,
|
5346 |
|
|
.Sp
|
5347 |
|
|
.Vb 2
|
5348 |
|
|
\& gcc \-O2 \-ftree\-vectorize \-fdump\-tree\-vect\-blocks=foo.dump
|
5349 |
|
|
\& \-fdump\-tree\-pre=stderr file.c
|
5350 |
|
|
.Ve
|
5351 |
|
|
.Sp
|
5352 |
|
|
outputs vectorizer dump into \fIfoo.dump\fR, while the \s-1PRE\s0 dump is
|
5353 |
|
|
output on to \fIstderr\fR. If two conflicting dump filenames are
|
5354 |
|
|
given for the same pass, then the latter option overrides the earlier
|
5355 |
|
|
one.
|
5356 |
|
|
.IP "\fBall\fR" 4
|
5357 |
|
|
.IX Item "all"
|
5358 |
|
|
Turn on all options, except \fBraw\fR, \fBslim\fR, \fBverbose\fR
|
5359 |
|
|
and \fBlineno\fR.
|
5360 |
|
|
.IP "\fBoptall\fR" 4
|
5361 |
|
|
.IX Item "optall"
|
5362 |
|
|
Turn on all optimization options, i.e., \fBoptimized\fR,
|
5363 |
|
|
\&\fBmissed\fR, and \fBnote\fR.
|
5364 |
|
|
.RE
|
5365 |
|
|
.RS 4
|
5366 |
|
|
.Sp
|
5367 |
|
|
The following tree dumps are possible:
|
5368 |
|
|
.IP "\fBoriginal\fR" 4
|
5369 |
|
|
.IX Item "original"
|
5370 |
|
|
Dump before any tree based optimization, to \fI\fIfile\fI.original\fR.
|
5371 |
|
|
.IP "\fBoptimized\fR" 4
|
5372 |
|
|
.IX Item "optimized"
|
5373 |
|
|
Dump after all tree based optimization, to \fI\fIfile\fI.optimized\fR.
|
5374 |
|
|
.IP "\fBgimple\fR" 4
|
5375 |
|
|
.IX Item "gimple"
|
5376 |
|
|
Dump each function before and after the gimplification pass to a file. The
|
5377 |
|
|
file name is made by appending \fI.gimple\fR to the source file name.
|
5378 |
|
|
.IP "\fBcfg\fR" 4
|
5379 |
|
|
.IX Item "cfg"
|
5380 |
|
|
Dump the control flow graph of each function to a file. The file name is
|
5381 |
|
|
made by appending \fI.cfg\fR to the source file name.
|
5382 |
|
|
.IP "\fBvcg\fR" 4
|
5383 |
|
|
.IX Item "vcg"
|
5384 |
|
|
Dump the control flow graph of each function to a file in \s-1VCG\s0 format. The
|
5385 |
|
|
file name is made by appending \fI.vcg\fR to the source file name. Note
|
5386 |
|
|
that if the file contains more than one function, the generated file cannot
|
5387 |
|
|
be used directly by \s-1VCG\s0. You must cut and paste each function's
|
5388 |
|
|
graph into its own separate file first.
|
5389 |
|
|
.IP "\fBch\fR" 4
|
5390 |
|
|
.IX Item "ch"
|
5391 |
|
|
Dump each function after copying loop headers. The file name is made by
|
5392 |
|
|
appending \fI.ch\fR to the source file name.
|
5393 |
|
|
.IP "\fBssa\fR" 4
|
5394 |
|
|
.IX Item "ssa"
|
5395 |
|
|
Dump \s-1SSA\s0 related information to a file. The file name is made by appending
|
5396 |
|
|
\&\fI.ssa\fR to the source file name.
|
5397 |
|
|
.IP "\fBalias\fR" 4
|
5398 |
|
|
.IX Item "alias"
|
5399 |
|
|
Dump aliasing information for each function. The file name is made by
|
5400 |
|
|
appending \fI.alias\fR to the source file name.
|
5401 |
|
|
.IP "\fBccp\fR" 4
|
5402 |
|
|
.IX Item "ccp"
|
5403 |
|
|
Dump each function after \s-1CCP\s0. The file name is made by appending
|
5404 |
|
|
\&\fI.ccp\fR to the source file name.
|
5405 |
|
|
.IP "\fBstoreccp\fR" 4
|
5406 |
|
|
.IX Item "storeccp"
|
5407 |
|
|
Dump each function after STORE-CCP. The file name is made by appending
|
5408 |
|
|
\&\fI.storeccp\fR to the source file name.
|
5409 |
|
|
.IP "\fBpre\fR" 4
|
5410 |
|
|
.IX Item "pre"
|
5411 |
|
|
Dump trees after partial redundancy elimination. The file name is made
|
5412 |
|
|
by appending \fI.pre\fR to the source file name.
|
5413 |
|
|
.IP "\fBfre\fR" 4
|
5414 |
|
|
.IX Item "fre"
|
5415 |
|
|
Dump trees after full redundancy elimination. The file name is made
|
5416 |
|
|
by appending \fI.fre\fR to the source file name.
|
5417 |
|
|
.IP "\fBcopyprop\fR" 4
|
5418 |
|
|
.IX Item "copyprop"
|
5419 |
|
|
Dump trees after copy propagation. The file name is made
|
5420 |
|
|
by appending \fI.copyprop\fR to the source file name.
|
5421 |
|
|
.IP "\fBstore_copyprop\fR" 4
|
5422 |
|
|
.IX Item "store_copyprop"
|
5423 |
|
|
Dump trees after store copy-propagation. The file name is made
|
5424 |
|
|
by appending \fI.store_copyprop\fR to the source file name.
|
5425 |
|
|
.IP "\fBdce\fR" 4
|
5426 |
|
|
.IX Item "dce"
|
5427 |
|
|
Dump each function after dead code elimination. The file name is made by
|
5428 |
|
|
appending \fI.dce\fR to the source file name.
|
5429 |
|
|
.IP "\fBmudflap\fR" 4
|
5430 |
|
|
.IX Item "mudflap"
|
5431 |
|
|
Dump each function after adding mudflap instrumentation. The file name is
|
5432 |
|
|
made by appending \fI.mudflap\fR to the source file name.
|
5433 |
|
|
.IP "\fBsra\fR" 4
|
5434 |
|
|
.IX Item "sra"
|
5435 |
|
|
Dump each function after performing scalar replacement of aggregates. The
|
5436 |
|
|
file name is made by appending \fI.sra\fR to the source file name.
|
5437 |
|
|
.IP "\fBsink\fR" 4
|
5438 |
|
|
.IX Item "sink"
|
5439 |
|
|
Dump each function after performing code sinking. The file name is made
|
5440 |
|
|
by appending \fI.sink\fR to the source file name.
|
5441 |
|
|
.IP "\fBdom\fR" 4
|
5442 |
|
|
.IX Item "dom"
|
5443 |
|
|
Dump each function after applying dominator tree optimizations. The file
|
5444 |
|
|
name is made by appending \fI.dom\fR to the source file name.
|
5445 |
|
|
.IP "\fBdse\fR" 4
|
5446 |
|
|
.IX Item "dse"
|
5447 |
|
|
Dump each function after applying dead store elimination. The file
|
5448 |
|
|
name is made by appending \fI.dse\fR to the source file name.
|
5449 |
|
|
.IP "\fBphiopt\fR" 4
|
5450 |
|
|
.IX Item "phiopt"
|
5451 |
|
|
Dump each function after optimizing \s-1PHI\s0 nodes into straightline code. The file
|
5452 |
|
|
name is made by appending \fI.phiopt\fR to the source file name.
|
5453 |
|
|
.IP "\fBforwprop\fR" 4
|
5454 |
|
|
.IX Item "forwprop"
|
5455 |
|
|
Dump each function after forward propagating single use variables. The file
|
5456 |
|
|
name is made by appending \fI.forwprop\fR to the source file name.
|
5457 |
|
|
.IP "\fBcopyrename\fR" 4
|
5458 |
|
|
.IX Item "copyrename"
|
5459 |
|
|
Dump each function after applying the copy rename optimization. The file
|
5460 |
|
|
name is made by appending \fI.copyrename\fR to the source file name.
|
5461 |
|
|
.IP "\fBnrv\fR" 4
|
5462 |
|
|
.IX Item "nrv"
|
5463 |
|
|
Dump each function after applying the named return value optimization on
|
5464 |
|
|
generic trees. The file name is made by appending \fI.nrv\fR to the source
|
5465 |
|
|
file name.
|
5466 |
|
|
.IP "\fBvect\fR" 4
|
5467 |
|
|
.IX Item "vect"
|
5468 |
|
|
Dump each function after applying vectorization of loops. The file name is
|
5469 |
|
|
made by appending \fI.vect\fR to the source file name.
|
5470 |
|
|
.IP "\fBslp\fR" 4
|
5471 |
|
|
.IX Item "slp"
|
5472 |
|
|
Dump each function after applying vectorization of basic blocks. The file name
|
5473 |
|
|
is made by appending \fI.slp\fR to the source file name.
|
5474 |
|
|
.IP "\fBvrp\fR" 4
|
5475 |
|
|
.IX Item "vrp"
|
5476 |
|
|
Dump each function after Value Range Propagation (\s-1VRP\s0). The file name
|
5477 |
|
|
is made by appending \fI.vrp\fR to the source file name.
|
5478 |
|
|
.IP "\fBall\fR" 4
|
5479 |
|
|
.IX Item "all"
|
5480 |
|
|
Enable all the available tree dumps with the flags provided in this option.
|
5481 |
|
|
.RE
|
5482 |
|
|
.RS 4
|
5483 |
|
|
.RE
|
5484 |
|
|
.IP "\fB\-fopt\-info\fR" 4
|
5485 |
|
|
.IX Item "-fopt-info"
|
5486 |
|
|
.PD 0
|
5487 |
|
|
.IP "\fB\-fopt\-info\-\fR\fIoptions\fR" 4
|
5488 |
|
|
.IX Item "-fopt-info-options"
|
5489 |
|
|
.IP "\fB\-fopt\-info\-\fR\fIoptions\fR\fB=\fR\fIfilename\fR" 4
|
5490 |
|
|
.IX Item "-fopt-info-options=filename"
|
5491 |
|
|
.PD
|
5492 |
|
|
Controls optimization dumps from various optimization passes. If the
|
5493 |
|
|
\&\fB\-\fR\fIoptions\fR form is used, \fIoptions\fR is a list of
|
5494 |
|
|
\&\fB\-\fR separated options to select the dump details and
|
5495 |
|
|
optimizations. If \fIoptions\fR is not specified, it defaults to
|
5496 |
|
|
\&\fBall\fR for details and \fBoptall\fR for optimization
|
5497 |
|
|
groups. If the \fIfilename\fR is not specified, it defaults to
|
5498 |
|
|
\&\fIstderr\fR. Note that the output \fIfilename\fR will be overwritten
|
5499 |
|
|
in case of multiple translation units. If a combined output from
|
5500 |
|
|
multiple translation units is desired, \fIstderr\fR should be used
|
5501 |
|
|
instead.
|
5502 |
|
|
.Sp
|
5503 |
|
|
The options can be divided into two groups, 1) options describing the
|
5504 |
|
|
verbosity of the dump, and 2) options describing which optimizations
|
5505 |
|
|
should be included. The options from both the groups can be freely
|
5506 |
|
|
mixed as they are non-overlapping. However, in case of any conflicts,
|
5507 |
|
|
the latter options override the earlier options on the command
|
5508 |
|
|
line. Though multiple \-fopt\-info options are accepted, only one of
|
5509 |
|
|
them can have \fB=filename\fR. If other filenames are provided then
|
5510 |
|
|
all but the first one are ignored.
|
5511 |
|
|
.Sp
|
5512 |
|
|
The dump verbosity has the following options
|
5513 |
|
|
.RS 4
|
5514 |
|
|
.IP "\fBoptimized\fR" 4
|
5515 |
|
|
.IX Item "optimized"
|
5516 |
|
|
Print information when an optimization is successfully applied. It is
|
5517 |
|
|
up to a pass to decide which information is relevant. For example, the
|
5518 |
|
|
vectorizer passes print the source location of loops which got
|
5519 |
|
|
successfully vectorized.
|
5520 |
|
|
.IP "\fBmissed\fR" 4
|
5521 |
|
|
.IX Item "missed"
|
5522 |
|
|
Print information about missed optimizations. Individual passes
|
5523 |
|
|
control which informations to include in the output. For example,
|
5524 |
|
|
.Sp
|
5525 |
|
|
.Vb 1
|
5526 |
|
|
\& gcc \-O2 \-ftree\-vectorize \-fopt\-info\-vec\-missed
|
5527 |
|
|
.Ve
|
5528 |
|
|
.Sp
|
5529 |
|
|
will print information about missed optimization opportunities from
|
5530 |
|
|
vectorization passes on stderr.
|
5531 |
|
|
.IP "\fBnote\fR" 4
|
5532 |
|
|
.IX Item "note"
|
5533 |
|
|
Print verbose information about optimizations, such as certain
|
5534 |
|
|
transformations, more detailed messages about decisions etc.
|
5535 |
|
|
.IP "\fBall\fR" 4
|
5536 |
|
|
.IX Item "all"
|
5537 |
|
|
Print detailed optimization information. This includes
|
5538 |
|
|
\&\fIoptimized\fR, \fImissed\fR, and \fInote\fR.
|
5539 |
|
|
.RE
|
5540 |
|
|
.RS 4
|
5541 |
|
|
.Sp
|
5542 |
|
|
The second set of options describes a group of optimizations and may
|
5543 |
|
|
include one or more of the following.
|
5544 |
|
|
.IP "\fBipa\fR" 4
|
5545 |
|
|
.IX Item "ipa"
|
5546 |
|
|
Enable dumps from all interprocedural optimizations.
|
5547 |
|
|
.IP "\fBloop\fR" 4
|
5548 |
|
|
.IX Item "loop"
|
5549 |
|
|
Enable dumps from all loop optimizations.
|
5550 |
|
|
.IP "\fBinline\fR" 4
|
5551 |
|
|
.IX Item "inline"
|
5552 |
|
|
Enable dumps from all inlining optimizations.
|
5553 |
|
|
.IP "\fBvec\fR" 4
|
5554 |
|
|
.IX Item "vec"
|
5555 |
|
|
Enable dumps from all vectorization optimizations.
|
5556 |
|
|
.RE
|
5557 |
|
|
.RS 4
|
5558 |
|
|
.Sp
|
5559 |
|
|
For example,
|
5560 |
|
|
.Sp
|
5561 |
|
|
.Vb 1
|
5562 |
|
|
\& gcc \-O3 \-fopt\-info\-missed=missed.all
|
5563 |
|
|
.Ve
|
5564 |
|
|
.Sp
|
5565 |
|
|
outputs missed optimization report from all the passes into
|
5566 |
|
|
\&\fImissed.all\fR.
|
5567 |
|
|
.Sp
|
5568 |
|
|
As another example,
|
5569 |
|
|
.Sp
|
5570 |
|
|
.Vb 1
|
5571 |
|
|
\& gcc \-O3 \-fopt\-info\-inline\-optimized\-missed=inline.txt
|
5572 |
|
|
.Ve
|
5573 |
|
|
.Sp
|
5574 |
|
|
will output information about missed optimizations as well as
|
5575 |
|
|
optimized locations from all the inlining passes into
|
5576 |
|
|
\&\fIinline.txt\fR.
|
5577 |
|
|
.Sp
|
5578 |
|
|
If the \fIfilename\fR is provided, then the dumps from all the
|
5579 |
|
|
applicable optimizations are concatenated into the \fIfilename\fR.
|
5580 |
|
|
Otherwise the dump is output onto \fIstderr\fR. If \fIoptions\fR is
|
5581 |
|
|
omitted, it defaults to \fBall-optall\fR, which means dump all
|
5582 |
|
|
available optimization info from all the passes. In the following
|
5583 |
|
|
example, all optimization info is output on to \fIstderr\fR.
|
5584 |
|
|
.Sp
|
5585 |
|
|
.Vb 1
|
5586 |
|
|
\& gcc \-O3 \-fopt\-info
|
5587 |
|
|
.Ve
|
5588 |
|
|
.Sp
|
5589 |
|
|
Note that \fB\-fopt\-info\-vec\-missed\fR behaves the same as
|
5590 |
|
|
\&\fB\-fopt\-info\-missed\-vec\fR.
|
5591 |
|
|
.Sp
|
5592 |
|
|
As another example, consider
|
5593 |
|
|
.Sp
|
5594 |
|
|
.Vb 1
|
5595 |
|
|
\& gcc \-fopt\-info\-vec\-missed=vec.miss \-fopt\-info\-loop\-optimized=loop.opt
|
5596 |
|
|
.Ve
|
5597 |
|
|
.Sp
|
5598 |
|
|
Here the two output filenames \fIvec.miss\fR and \fIloop.opt\fR are
|
5599 |
|
|
in conflict since only one output file is allowed. In this case, only
|
5600 |
|
|
the first option takes effect and the subsequent options are
|
5601 |
|
|
ignored. Thus only the \fIvec.miss\fR is produced which cotaints
|
5602 |
|
|
dumps from the vectorizer about missed opportunities.
|
5603 |
|
|
.RE
|
5604 |
|
|
.IP "\fB\-ftree\-vectorizer\-verbose=\fR\fIn\fR" 4
|
5605 |
|
|
.IX Item "-ftree-vectorizer-verbose=n"
|
5606 |
|
|
This option is deprecated and is implemented in terms of
|
5607 |
|
|
\&\fB\-fopt\-info\fR. Please use \fB\-fopt\-info\-\fR\fIkind\fR form
|
5608 |
|
|
instead, where \fIkind\fR is one of the valid opt-info options. It
|
5609 |
|
|
prints additional optimization information. For \fIn\fR=0 no
|
5610 |
|
|
diagnostic information is reported. If \fIn\fR=1 the vectorizer
|
5611 |
|
|
reports each loop that got vectorized, and the total number of loops
|
5612 |
|
|
that got vectorized. If \fIn\fR=2 the vectorizer reports locations
|
5613 |
|
|
which could not be vectorized and the reasons for those. For any
|
5614 |
|
|
higher verbosity levels all the analysis and transformation
|
5615 |
|
|
information from the vectorizer is reported.
|
5616 |
|
|
.Sp
|
5617 |
|
|
Note that the information output by \fB\-ftree\-vectorizer\-verbose\fR
|
5618 |
|
|
option is sent to \fIstderr\fR. If the equivalent form
|
5619 |
|
|
\&\fB\-fopt\-info\-\fR\fIoptions\fR\fB=\fR\fIfilename\fR is used then the
|
5620 |
|
|
output is sent into \fIfilename\fR instead.
|
5621 |
|
|
.IP "\fB\-frandom\-seed=\fR\fIstring\fR" 4
|
5622 |
|
|
.IX Item "-frandom-seed=string"
|
5623 |
|
|
This option provides a seed that \s-1GCC\s0 uses in place of
|
5624 |
|
|
random numbers in generating certain symbol names
|
5625 |
|
|
that have to be different in every compiled file. It is also used to
|
5626 |
|
|
place unique stamps in coverage data files and the object files that
|
5627 |
|
|
produce them. You can use the \fB\-frandom\-seed\fR option to produce
|
5628 |
|
|
reproducibly identical object files.
|
5629 |
|
|
.Sp
|
5630 |
|
|
The \fIstring\fR should be different for every file you compile.
|
5631 |
|
|
.IP "\fB\-fsched\-verbose=\fR\fIn\fR" 4
|
5632 |
|
|
.IX Item "-fsched-verbose=n"
|
5633 |
|
|
On targets that use instruction scheduling, this option controls the
|
5634 |
|
|
amount of debugging output the scheduler prints. This information is
|
5635 |
|
|
written to standard error, unless \fB\-fdump\-rtl\-sched1\fR or
|
5636 |
|
|
\&\fB\-fdump\-rtl\-sched2\fR is specified, in which case it is output
|
5637 |
|
|
to the usual dump listing file, \fI.sched1\fR or \fI.sched2\fR
|
5638 |
|
|
respectively. However for \fIn\fR greater than nine, the output is
|
5639 |
|
|
always printed to standard error.
|
5640 |
|
|
.Sp
|
5641 |
|
|
For \fIn\fR greater than zero, \fB\-fsched\-verbose\fR outputs the
|
5642 |
|
|
same information as \fB\-fdump\-rtl\-sched1\fR and \fB\-fdump\-rtl\-sched2\fR.
|
5643 |
|
|
For \fIn\fR greater than one, it also output basic block probabilities,
|
5644 |
|
|
detailed ready list information and unit/insn info. For \fIn\fR greater
|
5645 |
|
|
than two, it includes \s-1RTL\s0 at abort point, control-flow and regions info.
|
5646 |
|
|
And for \fIn\fR over four, \fB\-fsched\-verbose\fR also includes
|
5647 |
|
|
dependence info.
|
5648 |
|
|
.IP "\fB\-save\-temps\fR" 4
|
5649 |
|
|
.IX Item "-save-temps"
|
5650 |
|
|
.PD 0
|
5651 |
|
|
.IP "\fB\-save\-temps=cwd\fR" 4
|
5652 |
|
|
.IX Item "-save-temps=cwd"
|
5653 |
|
|
.PD
|
5654 |
|
|
Store the usual \*(L"temporary\*(R" intermediate files permanently; place them
|
5655 |
|
|
in the current directory and name them based on the source file. Thus,
|
5656 |
|
|
compiling \fIfoo.c\fR with \fB\-c \-save\-temps\fR produces files
|
5657 |
|
|
\&\fIfoo.i\fR and \fIfoo.s\fR, as well as \fIfoo.o\fR. This creates a
|
5658 |
|
|
preprocessed \fIfoo.i\fR output file even though the compiler now
|
5659 |
|
|
normally uses an integrated preprocessor.
|
5660 |
|
|
.Sp
|
5661 |
|
|
When used in combination with the \fB\-x\fR command-line option,
|
5662 |
|
|
\&\fB\-save\-temps\fR is sensible enough to avoid over writing an
|
5663 |
|
|
input source file with the same extension as an intermediate file.
|
5664 |
|
|
The corresponding intermediate file may be obtained by renaming the
|
5665 |
|
|
source file before using \fB\-save\-temps\fR.
|
5666 |
|
|
.Sp
|
5667 |
|
|
If you invoke \s-1GCC\s0 in parallel, compiling several different source
|
5668 |
|
|
files that share a common base name in different subdirectories or the
|
5669 |
|
|
same source file compiled for multiple output destinations, it is
|
5670 |
|
|
likely that the different parallel compilers will interfere with each
|
5671 |
|
|
other, and overwrite the temporary files. For instance:
|
5672 |
|
|
.Sp
|
5673 |
|
|
.Vb 2
|
5674 |
|
|
\& gcc \-save\-temps \-o outdir1/foo.o indir1/foo.c&
|
5675 |
|
|
\& gcc \-save\-temps \-o outdir2/foo.o indir2/foo.c&
|
5676 |
|
|
.Ve
|
5677 |
|
|
.Sp
|
5678 |
|
|
may result in \fIfoo.i\fR and \fIfoo.o\fR being written to
|
5679 |
|
|
simultaneously by both compilers.
|
5680 |
|
|
.IP "\fB\-save\-temps=obj\fR" 4
|
5681 |
|
|
.IX Item "-save-temps=obj"
|
5682 |
|
|
Store the usual \*(L"temporary\*(R" intermediate files permanently. If the
|
5683 |
|
|
\&\fB\-o\fR option is used, the temporary files are based on the
|
5684 |
|
|
object file. If the \fB\-o\fR option is not used, the
|
5685 |
|
|
\&\fB\-save\-temps=obj\fR switch behaves like \fB\-save\-temps\fR.
|
5686 |
|
|
.Sp
|
5687 |
|
|
For example:
|
5688 |
|
|
.Sp
|
5689 |
|
|
.Vb 3
|
5690 |
|
|
\& gcc \-save\-temps=obj \-c foo.c
|
5691 |
|
|
\& gcc \-save\-temps=obj \-c bar.c \-o dir/xbar.o
|
5692 |
|
|
\& gcc \-save\-temps=obj foobar.c \-o dir2/yfoobar
|
5693 |
|
|
.Ve
|
5694 |
|
|
.Sp
|
5695 |
|
|
creates \fIfoo.i\fR, \fIfoo.s\fR, \fIdir/xbar.i\fR,
|
5696 |
|
|
\&\fIdir/xbar.s\fR, \fIdir2/yfoobar.i\fR, \fIdir2/yfoobar.s\fR, and
|
5697 |
|
|
\&\fIdir2/yfoobar.o\fR.
|
5698 |
|
|
.IP "\fB\-time\fR[\fB=\fR\fIfile\fR]" 4
|
5699 |
|
|
.IX Item "-time[=file]"
|
5700 |
|
|
Report the \s-1CPU\s0 time taken by each subprocess in the compilation
|
5701 |
|
|
sequence. For C source files, this is the compiler proper and assembler
|
5702 |
|
|
(plus the linker if linking is done).
|
5703 |
|
|
.Sp
|
5704 |
|
|
Without the specification of an output file, the output looks like this:
|
5705 |
|
|
.Sp
|
5706 |
|
|
.Vb 2
|
5707 |
|
|
\& # cc1 0.12 0.01
|
5708 |
|
|
\& # as 0.00 0.01
|
5709 |
|
|
.Ve
|
5710 |
|
|
.Sp
|
5711 |
|
|
The first number on each line is the \*(L"user time\*(R", that is time spent
|
5712 |
|
|
executing the program itself. The second number is \*(L"system time\*(R",
|
5713 |
|
|
time spent executing operating system routines on behalf of the program.
|
5714 |
|
|
Both numbers are in seconds.
|
5715 |
|
|
.Sp
|
5716 |
|
|
With the specification of an output file, the output is appended to the
|
5717 |
|
|
named file, and it looks like this:
|
5718 |
|
|
.Sp
|
5719 |
|
|
.Vb 2
|
5720 |
|
|
\& 0.12 0.01 cc1
|
5721 |
|
|
\& 0.00 0.01 as
|
5722 |
|
|
.Ve
|
5723 |
|
|
.Sp
|
5724 |
|
|
The \*(L"user time\*(R" and the \*(L"system time\*(R" are moved before the program
|
5725 |
|
|
name, and the options passed to the program are displayed, so that one
|
5726 |
|
|
can later tell what file was being compiled, and with which options.
|
5727 |
|
|
.IP "\fB\-fvar\-tracking\fR" 4
|
5728 |
|
|
.IX Item "-fvar-tracking"
|
5729 |
|
|
Run variable tracking pass. It computes where variables are stored at each
|
5730 |
|
|
position in code. Better debugging information is then generated
|
5731 |
|
|
(if the debugging information format supports this information).
|
5732 |
|
|
.Sp
|
5733 |
|
|
It is enabled by default when compiling with optimization (\fB\-Os\fR,
|
5734 |
|
|
\&\fB\-O\fR, \fB\-O2\fR, ...), debugging information (\fB\-g\fR) and
|
5735 |
|
|
the debug info format supports it.
|
5736 |
|
|
.IP "\fB\-fvar\-tracking\-assignments\fR" 4
|
5737 |
|
|
.IX Item "-fvar-tracking-assignments"
|
5738 |
|
|
Annotate assignments to user variables early in the compilation and
|
5739 |
|
|
attempt to carry the annotations over throughout the compilation all the
|
5740 |
|
|
way to the end, in an attempt to improve debug information while
|
5741 |
|
|
optimizing. Use of \fB\-gdwarf\-4\fR is recommended along with it.
|
5742 |
|
|
.Sp
|
5743 |
|
|
It can be enabled even if var-tracking is disabled, in which case
|
5744 |
|
|
annotations are created and maintained, but discarded at the end.
|
5745 |
|
|
.IP "\fB\-fvar\-tracking\-assignments\-toggle\fR" 4
|
5746 |
|
|
.IX Item "-fvar-tracking-assignments-toggle"
|
5747 |
|
|
Toggle \fB\-fvar\-tracking\-assignments\fR, in the same way that
|
5748 |
|
|
\&\fB\-gtoggle\fR toggles \fB\-g\fR.
|
5749 |
|
|
.IP "\fB\-print\-file\-name=\fR\fIlibrary\fR" 4
|
5750 |
|
|
.IX Item "-print-file-name=library"
|
5751 |
|
|
Print the full absolute name of the library file \fIlibrary\fR that
|
5752 |
|
|
would be used when linking\-\-\-and don't do anything else. With this
|
5753 |
|
|
option, \s-1GCC\s0 does not compile or link anything; it just prints the
|
5754 |
|
|
file name.
|
5755 |
|
|
.IP "\fB\-print\-multi\-directory\fR" 4
|
5756 |
|
|
.IX Item "-print-multi-directory"
|
5757 |
|
|
Print the directory name corresponding to the multilib selected by any
|
5758 |
|
|
other switches present in the command line. This directory is supposed
|
5759 |
|
|
to exist in \fB\s-1GCC_EXEC_PREFIX\s0\fR.
|
5760 |
|
|
.IP "\fB\-print\-multi\-lib\fR" 4
|
5761 |
|
|
.IX Item "-print-multi-lib"
|
5762 |
|
|
Print the mapping from multilib directory names to compiler switches
|
5763 |
|
|
that enable them. The directory name is separated from the switches by
|
5764 |
|
|
\&\fB;\fR, and each switch starts with an \fB@\fR instead of the
|
5765 |
|
|
\&\fB\-\fR, without spaces between multiple switches. This is supposed to
|
5766 |
|
|
ease shell processing.
|
5767 |
|
|
.IP "\fB\-print\-multi\-os\-directory\fR" 4
|
5768 |
|
|
.IX Item "-print-multi-os-directory"
|
5769 |
|
|
Print the path to \s-1OS\s0 libraries for the selected
|
5770 |
|
|
multilib, relative to some \fIlib\fR subdirectory. If \s-1OS\s0 libraries are
|
5771 |
|
|
present in the \fIlib\fR subdirectory and no multilibs are used, this is
|
5772 |
|
|
usually just \fI.\fR, if \s-1OS\s0 libraries are present in \fIlib\fIsuffix\fI\fR
|
5773 |
|
|
sibling directories this prints e.g. \fI../lib64\fR, \fI../lib\fR or
|
5774 |
|
|
\&\fI../lib32\fR, or if \s-1OS\s0 libraries are present in \fIlib/\fIsubdir\fI\fR
|
5775 |
|
|
subdirectories it prints e.g. \fIamd64\fR, \fIsparcv9\fR or \fIev6\fR.
|
5776 |
|
|
.IP "\fB\-print\-multiarch\fR" 4
|
5777 |
|
|
.IX Item "-print-multiarch"
|
5778 |
|
|
Print the path to \s-1OS\s0 libraries for the selected multiarch,
|
5779 |
|
|
relative to some \fIlib\fR subdirectory.
|
5780 |
|
|
.IP "\fB\-print\-prog\-name=\fR\fIprogram\fR" 4
|
5781 |
|
|
.IX Item "-print-prog-name=program"
|
5782 |
|
|
Like \fB\-print\-file\-name\fR, but searches for a program such as \fBcpp\fR.
|
5783 |
|
|
.IP "\fB\-print\-libgcc\-file\-name\fR" 4
|
5784 |
|
|
.IX Item "-print-libgcc-file-name"
|
5785 |
|
|
Same as \fB\-print\-file\-name=libgcc.a\fR.
|
5786 |
|
|
.Sp
|
5787 |
|
|
This is useful when you use \fB\-nostdlib\fR or \fB\-nodefaultlibs\fR
|
5788 |
|
|
but you do want to link with \fIlibgcc.a\fR. You can do:
|
5789 |
|
|
.Sp
|
5790 |
|
|
.Vb 1
|
5791 |
|
|
\& gcc \-nostdlib ... \`gcc \-print\-libgcc\-file\-name\`
|
5792 |
|
|
.Ve
|
5793 |
|
|
.IP "\fB\-print\-search\-dirs\fR" 4
|
5794 |
|
|
.IX Item "-print-search-dirs"
|
5795 |
|
|
Print the name of the configured installation directory and a list of
|
5796 |
|
|
program and library directories \fBgcc\fR searches\-\-\-and don't do anything else.
|
5797 |
|
|
.Sp
|
5798 |
|
|
This is useful when \fBgcc\fR prints the error message
|
5799 |
|
|
\&\fBinstallation problem, cannot exec cpp0: No such file or directory\fR.
|
5800 |
|
|
To resolve this you either need to put \fIcpp0\fR and the other compiler
|
5801 |
|
|
components where \fBgcc\fR expects to find them, or you can set the environment
|
5802 |
|
|
variable \fB\s-1GCC_EXEC_PREFIX\s0\fR to the directory where you installed them.
|
5803 |
|
|
Don't forget the trailing \fB/\fR.
|
5804 |
|
|
.IP "\fB\-print\-sysroot\fR" 4
|
5805 |
|
|
.IX Item "-print-sysroot"
|
5806 |
|
|
Print the target sysroot directory that is used during
|
5807 |
|
|
compilation. This is the target sysroot specified either at configure
|
5808 |
|
|
time or using the \fB\-\-sysroot\fR option, possibly with an extra
|
5809 |
|
|
suffix that depends on compilation options. If no target sysroot is
|
5810 |
|
|
specified, the option prints nothing.
|
5811 |
|
|
.IP "\fB\-print\-sysroot\-headers\-suffix\fR" 4
|
5812 |
|
|
.IX Item "-print-sysroot-headers-suffix"
|
5813 |
|
|
Print the suffix added to the target sysroot when searching for
|
5814 |
|
|
headers, or give an error if the compiler is not configured with such
|
5815 |
|
|
a suffix\-\-\-and don't do anything else.
|
5816 |
|
|
.IP "\fB\-dumpmachine\fR" 4
|
5817 |
|
|
.IX Item "-dumpmachine"
|
5818 |
|
|
Print the compiler's target machine (for example,
|
5819 |
|
|
\&\fBi686\-pc\-linux\-gnu\fR)\-\-\-and don't do anything else.
|
5820 |
|
|
.IP "\fB\-dumpversion\fR" 4
|
5821 |
|
|
.IX Item "-dumpversion"
|
5822 |
|
|
Print the compiler version (for example, \fB3.0\fR)\-\-\-and don't do
|
5823 |
|
|
anything else.
|
5824 |
|
|
.IP "\fB\-dumpspecs\fR" 4
|
5825 |
|
|
.IX Item "-dumpspecs"
|
5826 |
|
|
Print the compiler's built-in specs\-\-\-and don't do anything else. (This
|
5827 |
|
|
is used when \s-1GCC\s0 itself is being built.)
|
5828 |
|
|
.IP "\fB\-fno\-eliminate\-unused\-debug\-types\fR" 4
|
5829 |
|
|
.IX Item "-fno-eliminate-unused-debug-types"
|
5830 |
|
|
Normally, when producing \s-1DWARF\s0 2 output, \s-1GCC\s0 avoids producing debug symbol
|
5831 |
|
|
output for types that are nowhere used in the source file being compiled.
|
5832 |
|
|
Sometimes it is useful to have \s-1GCC\s0 emit debugging
|
5833 |
|
|
information for all types declared in a compilation
|
5834 |
|
|
unit, regardless of whether or not they are actually used
|
5835 |
|
|
in that compilation unit, for example
|
5836 |
|
|
if, in the debugger, you want to cast a value to a type that is
|
5837 |
|
|
not actually used in your program (but is declared). More often,
|
5838 |
|
|
however, this results in a significant amount of wasted space.
|
5839 |
|
|
.SS "Options That Control Optimization"
|
5840 |
|
|
.IX Subsection "Options That Control Optimization"
|
5841 |
|
|
These options control various sorts of optimizations.
|
5842 |
|
|
.PP
|
5843 |
|
|
Without any optimization option, the compiler's goal is to reduce the
|
5844 |
|
|
cost of compilation and to make debugging produce the expected
|
5845 |
|
|
results. Statements are independent: if you stop the program with a
|
5846 |
|
|
breakpoint between statements, you can then assign a new value to any
|
5847 |
|
|
variable or change the program counter to any other statement in the
|
5848 |
|
|
function and get exactly the results you expect from the source
|
5849 |
|
|
code.
|
5850 |
|
|
.PP
|
5851 |
|
|
Turning on optimization flags makes the compiler attempt to improve
|
5852 |
|
|
the performance and/or code size at the expense of compilation time
|
5853 |
|
|
and possibly the ability to debug the program.
|
5854 |
|
|
.PP
|
5855 |
|
|
The compiler performs optimization based on the knowledge it has of the
|
5856 |
|
|
program. Compiling multiple files at once to a single output file mode allows
|
5857 |
|
|
the compiler to use information gained from all of the files when compiling
|
5858 |
|
|
each of them.
|
5859 |
|
|
.PP
|
5860 |
|
|
Not all optimizations are controlled directly by a flag. Only
|
5861 |
|
|
optimizations that have a flag are listed in this section.
|
5862 |
|
|
.PP
|
5863 |
|
|
Most optimizations are only enabled if an \fB\-O\fR level is set on
|
5864 |
|
|
the command line. Otherwise they are disabled, even if individual
|
5865 |
|
|
optimization flags are specified.
|
5866 |
|
|
.PP
|
5867 |
|
|
Depending on the target and how \s-1GCC\s0 was configured, a slightly different
|
5868 |
|
|
set of optimizations may be enabled at each \fB\-O\fR level than
|
5869 |
|
|
those listed here. You can invoke \s-1GCC\s0 with \fB\-Q \-\-help=optimizers\fR
|
5870 |
|
|
to find out the exact set of optimizations that are enabled at each level.
|
5871 |
|
|
.IP "\fB\-O\fR" 4
|
5872 |
|
|
.IX Item "-O"
|
5873 |
|
|
.PD 0
|
5874 |
|
|
.IP "\fB\-O1\fR" 4
|
5875 |
|
|
.IX Item "-O1"
|
5876 |
|
|
.PD
|
5877 |
|
|
Optimize. Optimizing compilation takes somewhat more time, and a lot
|
5878 |
|
|
more memory for a large function.
|
5879 |
|
|
.Sp
|
5880 |
|
|
With \fB\-O\fR, the compiler tries to reduce code size and execution
|
5881 |
|
|
time, without performing any optimizations that take a great deal of
|
5882 |
|
|
compilation time.
|
5883 |
|
|
.Sp
|
5884 |
|
|
\&\fB\-O\fR turns on the following optimization flags:
|
5885 |
|
|
.Sp
|
5886 |
|
|
\&\fB\-fauto\-inc\-dec
|
5887 |
|
|
\&\-fcompare\-elim
|
5888 |
|
|
\&\-fcprop\-registers
|
5889 |
|
|
\&\-fdce
|
5890 |
|
|
\&\-fdefer\-pop
|
5891 |
|
|
\&\-fdelayed\-branch
|
5892 |
|
|
\&\-fdse
|
5893 |
|
|
\&\-fguess\-branch\-probability
|
5894 |
|
|
\&\-fif\-conversion2
|
5895 |
|
|
\&\-fif\-conversion
|
5896 |
|
|
\&\-fipa\-pure\-const
|
5897 |
|
|
\&\-fipa\-profile
|
5898 |
|
|
\&\-fipa\-reference
|
5899 |
|
|
\&\-fmerge\-constants
|
5900 |
|
|
\&\-fsplit\-wide\-types
|
5901 |
|
|
\&\-ftree\-bit\-ccp
|
5902 |
|
|
\&\-ftree\-builtin\-call\-dce
|
5903 |
|
|
\&\-ftree\-ccp
|
5904 |
|
|
\&\-ftree\-ch
|
5905 |
|
|
\&\-ftree\-copyrename
|
5906 |
|
|
\&\-ftree\-dce
|
5907 |
|
|
\&\-ftree\-dominator\-opts
|
5908 |
|
|
\&\-ftree\-dse
|
5909 |
|
|
\&\-ftree\-forwprop
|
5910 |
|
|
\&\-ftree\-fre
|
5911 |
|
|
\&\-ftree\-phiprop
|
5912 |
|
|
\&\-ftree\-slsr
|
5913 |
|
|
\&\-ftree\-sra
|
5914 |
|
|
\&\-ftree\-pta
|
5915 |
|
|
\&\-ftree\-ter
|
5916 |
|
|
\&\-funit\-at\-a\-time\fR
|
5917 |
|
|
.Sp
|
5918 |
|
|
\&\fB\-O\fR also turns on \fB\-fomit\-frame\-pointer\fR on machines
|
5919 |
|
|
where doing so does not interfere with debugging.
|
5920 |
|
|
.IP "\fB\-O2\fR" 4
|
5921 |
|
|
.IX Item "-O2"
|
5922 |
|
|
Optimize even more. \s-1GCC\s0 performs nearly all supported optimizations
|
5923 |
|
|
that do not involve a space-speed tradeoff.
|
5924 |
|
|
As compared to \fB\-O\fR, this option increases both compilation time
|
5925 |
|
|
and the performance of the generated code.
|
5926 |
|
|
.Sp
|
5927 |
|
|
\&\fB\-O2\fR turns on all optimization flags specified by \fB\-O\fR. It
|
5928 |
|
|
also turns on the following optimization flags:
|
5929 |
|
|
\&\fB\-fthread\-jumps
|
5930 |
|
|
\&\-falign\-functions \-falign\-jumps
|
5931 |
|
|
\&\-falign\-loops \-falign\-labels
|
5932 |
|
|
\&\-fcaller\-saves
|
5933 |
|
|
\&\-fcrossjumping
|
5934 |
|
|
\&\-fcse\-follow\-jumps \-fcse\-skip\-blocks
|
5935 |
|
|
\&\-fdelete\-null\-pointer\-checks
|
5936 |
|
|
\&\-fdevirtualize
|
5937 |
|
|
\&\-fexpensive\-optimizations
|
5938 |
|
|
\&\-fgcse \-fgcse\-lm
|
5939 |
|
|
\&\-fhoist\-adjacent\-loads
|
5940 |
|
|
\&\-finline\-small\-functions
|
5941 |
|
|
\&\-findirect\-inlining
|
5942 |
|
|
\&\-fipa\-sra
|
5943 |
|
|
\&\-foptimize\-sibling\-calls
|
5944 |
|
|
\&\-fpartial\-inlining
|
5945 |
|
|
\&\-fpeephole2
|
5946 |
|
|
\&\-fregmove
|
5947 |
|
|
\&\-freorder\-blocks \-freorder\-functions
|
5948 |
|
|
\&\-frerun\-cse\-after\-loop
|
5949 |
|
|
\&\-fsched\-interblock \-fsched\-spec
|
5950 |
|
|
\&\-fschedule\-insns \-fschedule\-insns2
|
5951 |
|
|
\&\-fstrict\-aliasing \-fstrict\-overflow
|
5952 |
|
|
\&\-ftree\-switch\-conversion \-ftree\-tail\-merge
|
5953 |
|
|
\&\-ftree\-pre
|
5954 |
|
|
\&\-ftree\-vrp\fR
|
5955 |
|
|
.Sp
|
5956 |
|
|
Please note the warning under \fB\-fgcse\fR about
|
5957 |
|
|
invoking \fB\-O2\fR on programs that use computed gotos.
|
5958 |
|
|
.IP "\fB\-O3\fR" 4
|
5959 |
|
|
.IX Item "-O3"
|
5960 |
|
|
Optimize yet more. \fB\-O3\fR turns on all optimizations specified
|
5961 |
|
|
by \fB\-O2\fR and also turns on the \fB\-finline\-functions\fR,
|
5962 |
|
|
\&\fB\-funswitch\-loops\fR, \fB\-fpredictive\-commoning\fR,
|
5963 |
|
|
\&\fB\-fgcse\-after\-reload\fR, \fB\-ftree\-vectorize\fR,
|
5964 |
|
|
\&\fB\-fvect\-cost\-model\fR,
|
5965 |
|
|
\&\fB\-ftree\-partial\-pre\fR and \fB\-fipa\-cp\-clone\fR options.
|
5966 |
|
|
.IP "\fB\-O0\fR" 4
|
5967 |
|
|
.IX Item "-O0"
|
5968 |
|
|
Reduce compilation time and make debugging produce the expected
|
5969 |
|
|
results. This is the default.
|
5970 |
|
|
.IP "\fB\-Os\fR" 4
|
5971 |
|
|
.IX Item "-Os"
|
5972 |
|
|
Optimize for size. \fB\-Os\fR enables all \fB\-O2\fR optimizations that
|
5973 |
|
|
do not typically increase code size. It also performs further
|
5974 |
|
|
optimizations designed to reduce code size.
|
5975 |
|
|
.Sp
|
5976 |
|
|
\&\fB\-Os\fR disables the following optimization flags:
|
5977 |
|
|
\&\fB\-falign\-functions \-falign\-jumps \-falign\-loops
|
5978 |
|
|
\&\-falign\-labels \-freorder\-blocks \-freorder\-blocks\-and\-partition
|
5979 |
|
|
\&\-fprefetch\-loop\-arrays \-ftree\-vect\-loop\-version\fR
|
5980 |
|
|
.IP "\fB\-Ofast\fR" 4
|
5981 |
|
|
.IX Item "-Ofast"
|
5982 |
|
|
Disregard strict standards compliance. \fB\-Ofast\fR enables all
|
5983 |
|
|
\&\fB\-O3\fR optimizations. It also enables optimizations that are not
|
5984 |
|
|
valid for all standard-compliant programs.
|
5985 |
|
|
It turns on \fB\-ffast\-math\fR and the Fortran-specific
|
5986 |
|
|
\&\fB\-fno\-protect\-parens\fR and \fB\-fstack\-arrays\fR.
|
5987 |
|
|
.IP "\fB\-Og\fR" 4
|
5988 |
|
|
.IX Item "-Og"
|
5989 |
|
|
Optimize debugging experience. \fB\-Og\fR enables optimizations
|
5990 |
|
|
that do not interfere with debugging. It should be the optimization
|
5991 |
|
|
level of choice for the standard edit-compile-debug cycle, offering
|
5992 |
|
|
a reasonable level of optimization while maintaining fast compilation
|
5993 |
|
|
and a good debugging experience.
|
5994 |
|
|
.Sp
|
5995 |
|
|
If you use multiple \fB\-O\fR options, with or without level numbers,
|
5996 |
|
|
the last such option is the one that is effective.
|
5997 |
|
|
.PP
|
5998 |
|
|
Options of the form \fB\-f\fR\fIflag\fR specify machine-independent
|
5999 |
|
|
flags. Most flags have both positive and negative forms; the negative
|
6000 |
|
|
form of \fB\-ffoo\fR is \fB\-fno\-foo\fR. In the table
|
6001 |
|
|
below, only one of the forms is listed\-\-\-the one you typically
|
6002 |
|
|
use. You can figure out the other form by either removing \fBno\-\fR
|
6003 |
|
|
or adding it.
|
6004 |
|
|
.PP
|
6005 |
|
|
The following options control specific optimizations. They are either
|
6006 |
|
|
activated by \fB\-O\fR options or are related to ones that are. You
|
6007 |
|
|
can use the following flags in the rare cases when \*(L"fine-tuning\*(R" of
|
6008 |
|
|
optimizations to be performed is desired.
|
6009 |
|
|
.IP "\fB\-fno\-default\-inline\fR" 4
|
6010 |
|
|
.IX Item "-fno-default-inline"
|
6011 |
|
|
Do not make member functions inline by default merely because they are
|
6012 |
|
|
defined inside the class scope (\*(C+ only). Otherwise, when you specify
|
6013 |
|
|
\&\fB\-O\fR, member functions defined inside class scope are compiled
|
6014 |
|
|
inline by default; i.e., you don't need to add \fBinline\fR in front of
|
6015 |
|
|
the member function name.
|
6016 |
|
|
.IP "\fB\-fno\-defer\-pop\fR" 4
|
6017 |
|
|
.IX Item "-fno-defer-pop"
|
6018 |
|
|
Always pop the arguments to each function call as soon as that function
|
6019 |
|
|
returns. For machines that must pop arguments after a function call,
|
6020 |
|
|
the compiler normally lets arguments accumulate on the stack for several
|
6021 |
|
|
function calls and pops them all at once.
|
6022 |
|
|
.Sp
|
6023 |
|
|
Disabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
6024 |
|
|
.IP "\fB\-fforward\-propagate\fR" 4
|
6025 |
|
|
.IX Item "-fforward-propagate"
|
6026 |
|
|
Perform a forward propagation pass on \s-1RTL\s0. The pass tries to combine two
|
6027 |
|
|
instructions and checks if the result can be simplified. If loop unrolling
|
6028 |
|
|
is active, two passes are performed and the second is scheduled after
|
6029 |
|
|
loop unrolling.
|
6030 |
|
|
.Sp
|
6031 |
|
|
This option is enabled by default at optimization levels \fB\-O\fR,
|
6032 |
|
|
\&\fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
6033 |
|
|
.IP "\fB\-ffp\-contract=\fR\fIstyle\fR" 4
|
6034 |
|
|
.IX Item "-ffp-contract=style"
|
6035 |
|
|
\&\fB\-ffp\-contract=off\fR disables floating-point expression contraction.
|
6036 |
|
|
\&\fB\-ffp\-contract=fast\fR enables floating-point expression contraction
|
6037 |
|
|
such as forming of fused multiply-add operations if the target has
|
6038 |
|
|
native support for them.
|
6039 |
|
|
\&\fB\-ffp\-contract=on\fR enables floating-point expression contraction
|
6040 |
|
|
if allowed by the language standard. This is currently not implemented
|
6041 |
|
|
and treated equal to \fB\-ffp\-contract=off\fR.
|
6042 |
|
|
.Sp
|
6043 |
|
|
The default is \fB\-ffp\-contract=fast\fR.
|
6044 |
|
|
.IP "\fB\-fomit\-frame\-pointer\fR" 4
|
6045 |
|
|
.IX Item "-fomit-frame-pointer"
|
6046 |
|
|
Don't keep the frame pointer in a register for functions that
|
6047 |
|
|
don't need one. This avoids the instructions to save, set up and
|
6048 |
|
|
restore frame pointers; it also makes an extra register available
|
6049 |
|
|
in many functions. \fBIt also makes debugging impossible on
|
6050 |
|
|
some machines.\fR
|
6051 |
|
|
.Sp
|
6052 |
|
|
On some machines, such as the \s-1VAX\s0, this flag has no effect, because
|
6053 |
|
|
the standard calling sequence automatically handles the frame pointer
|
6054 |
|
|
and nothing is saved by pretending it doesn't exist. The
|
6055 |
|
|
machine-description macro \f(CW\*(C`FRAME_POINTER_REQUIRED\*(C'\fR controls
|
6056 |
|
|
whether a target machine supports this flag.
|
6057 |
|
|
.Sp
|
6058 |
|
|
Starting with \s-1GCC\s0 version 4.6, the default setting (when not optimizing for
|
6059 |
|
|
size) for 32\-bit GNU/Linux x86 and 32\-bit Darwin x86 targets has been changed to
|
6060 |
|
|
\&\fB\-fomit\-frame\-pointer\fR. The default can be reverted to
|
6061 |
|
|
\&\fB\-fno\-omit\-frame\-pointer\fR by configuring \s-1GCC\s0 with the
|
6062 |
|
|
\&\fB\-\-enable\-frame\-pointer\fR configure option.
|
6063 |
|
|
.Sp
|
6064 |
|
|
Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
6065 |
|
|
.IP "\fB\-foptimize\-sibling\-calls\fR" 4
|
6066 |
|
|
.IX Item "-foptimize-sibling-calls"
|
6067 |
|
|
Optimize sibling and tail recursive calls.
|
6068 |
|
|
.Sp
|
6069 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
6070 |
|
|
.IP "\fB\-fno\-inline\fR" 4
|
6071 |
|
|
.IX Item "-fno-inline"
|
6072 |
|
|
Do not expand any functions inline apart from those marked with
|
6073 |
|
|
the \f(CW\*(C`always_inline\*(C'\fR attribute. This is the default when not
|
6074 |
|
|
optimizing.
|
6075 |
|
|
.Sp
|
6076 |
|
|
Single functions can be exempted from inlining by marking them
|
6077 |
|
|
with the \f(CW\*(C`noinline\*(C'\fR attribute.
|
6078 |
|
|
.IP "\fB\-finline\-small\-functions\fR" 4
|
6079 |
|
|
.IX Item "-finline-small-functions"
|
6080 |
|
|
Integrate functions into their callers when their body is smaller than expected
|
6081 |
|
|
function call code (so overall size of program gets smaller). The compiler
|
6082 |
|
|
heuristically decides which functions are simple enough to be worth integrating
|
6083 |
|
|
in this way. This inlining applies to all functions, even those not declared
|
6084 |
|
|
inline.
|
6085 |
|
|
.Sp
|
6086 |
|
|
Enabled at level \fB\-O2\fR.
|
6087 |
|
|
.IP "\fB\-findirect\-inlining\fR" 4
|
6088 |
|
|
.IX Item "-findirect-inlining"
|
6089 |
|
|
Inline also indirect calls that are discovered to be known at compile
|
6090 |
|
|
time thanks to previous inlining. This option has any effect only
|
6091 |
|
|
when inlining itself is turned on by the \fB\-finline\-functions\fR
|
6092 |
|
|
or \fB\-finline\-small\-functions\fR options.
|
6093 |
|
|
.Sp
|
6094 |
|
|
Enabled at level \fB\-O2\fR.
|
6095 |
|
|
.IP "\fB\-finline\-functions\fR" 4
|
6096 |
|
|
.IX Item "-finline-functions"
|
6097 |
|
|
Consider all functions for inlining, even if they are not declared inline.
|
6098 |
|
|
The compiler heuristically decides which functions are worth integrating
|
6099 |
|
|
in this way.
|
6100 |
|
|
.Sp
|
6101 |
|
|
If all calls to a given function are integrated, and the function is
|
6102 |
|
|
declared \f(CW\*(C`static\*(C'\fR, then the function is normally not output as
|
6103 |
|
|
assembler code in its own right.
|
6104 |
|
|
.Sp
|
6105 |
|
|
Enabled at level \fB\-O3\fR.
|
6106 |
|
|
.IP "\fB\-finline\-functions\-called\-once\fR" 4
|
6107 |
|
|
.IX Item "-finline-functions-called-once"
|
6108 |
|
|
Consider all \f(CW\*(C`static\*(C'\fR functions called once for inlining into their
|
6109 |
|
|
caller even if they are not marked \f(CW\*(C`inline\*(C'\fR. If a call to a given
|
6110 |
|
|
function is integrated, then the function is not output as assembler code
|
6111 |
|
|
in its own right.
|
6112 |
|
|
.Sp
|
6113 |
|
|
Enabled at levels \fB\-O1\fR, \fB\-O2\fR, \fB\-O3\fR and \fB\-Os\fR.
|
6114 |
|
|
.IP "\fB\-fearly\-inlining\fR" 4
|
6115 |
|
|
.IX Item "-fearly-inlining"
|
6116 |
|
|
Inline functions marked by \f(CW\*(C`always_inline\*(C'\fR and functions whose body seems
|
6117 |
|
|
smaller than the function call overhead early before doing
|
6118 |
|
|
\&\fB\-fprofile\-generate\fR instrumentation and real inlining pass. Doing so
|
6119 |
|
|
makes profiling significantly cheaper and usually inlining faster on programs
|
6120 |
|
|
having large chains of nested wrapper functions.
|
6121 |
|
|
.Sp
|
6122 |
|
|
Enabled by default.
|
6123 |
|
|
.IP "\fB\-fipa\-sra\fR" 4
|
6124 |
|
|
.IX Item "-fipa-sra"
|
6125 |
|
|
Perform interprocedural scalar replacement of aggregates, removal of
|
6126 |
|
|
unused parameters and replacement of parameters passed by reference
|
6127 |
|
|
by parameters passed by value.
|
6128 |
|
|
.Sp
|
6129 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR and \fB\-Os\fR.
|
6130 |
|
|
.IP "\fB\-finline\-limit=\fR\fIn\fR" 4
|
6131 |
|
|
.IX Item "-finline-limit=n"
|
6132 |
|
|
By default, \s-1GCC\s0 limits the size of functions that can be inlined. This flag
|
6133 |
|
|
allows coarse control of this limit. \fIn\fR is the size of functions that
|
6134 |
|
|
can be inlined in number of pseudo instructions.
|
6135 |
|
|
.Sp
|
6136 |
|
|
Inlining is actually controlled by a number of parameters, which may be
|
6137 |
|
|
specified individually by using \fB\-\-param\fR \fIname\fR\fB=\fR\fIvalue\fR.
|
6138 |
|
|
The \fB\-finline\-limit=\fR\fIn\fR option sets some of these parameters
|
6139 |
|
|
as follows:
|
6140 |
|
|
.RS 4
|
6141 |
|
|
.IP "\fBmax-inline-insns-single\fR" 4
|
6142 |
|
|
.IX Item "max-inline-insns-single"
|
6143 |
|
|
is set to \fIn\fR/2.
|
6144 |
|
|
.IP "\fBmax-inline-insns-auto\fR" 4
|
6145 |
|
|
.IX Item "max-inline-insns-auto"
|
6146 |
|
|
is set to \fIn\fR/2.
|
6147 |
|
|
.RE
|
6148 |
|
|
.RS 4
|
6149 |
|
|
.Sp
|
6150 |
|
|
See below for a documentation of the individual
|
6151 |
|
|
parameters controlling inlining and for the defaults of these parameters.
|
6152 |
|
|
.Sp
|
6153 |
|
|
\&\fINote:\fR there may be no value to \fB\-finline\-limit\fR that results
|
6154 |
|
|
in default behavior.
|
6155 |
|
|
.Sp
|
6156 |
|
|
\&\fINote:\fR pseudo instruction represents, in this particular context, an
|
6157 |
|
|
abstract measurement of function's size. In no way does it represent a count
|
6158 |
|
|
of assembly instructions and as such its exact meaning might change from one
|
6159 |
|
|
release to an another.
|
6160 |
|
|
.RE
|
6161 |
|
|
.IP "\fB\-fno\-keep\-inline\-dllexport\fR" 4
|
6162 |
|
|
.IX Item "-fno-keep-inline-dllexport"
|
6163 |
|
|
This is a more fine-grained version of \fB\-fkeep\-inline\-functions\fR,
|
6164 |
|
|
which applies only to functions that are declared using the \f(CW\*(C`dllexport\*(C'\fR
|
6165 |
|
|
attribute or declspec
|
6166 |
|
|
.IP "\fB\-fkeep\-inline\-functions\fR" 4
|
6167 |
|
|
.IX Item "-fkeep-inline-functions"
|
6168 |
|
|
In C, emit \f(CW\*(C`static\*(C'\fR functions that are declared \f(CW\*(C`inline\*(C'\fR
|
6169 |
|
|
into the object file, even if the function has been inlined into all
|
6170 |
|
|
of its callers. This switch does not affect functions using the
|
6171 |
|
|
\&\f(CW\*(C`extern inline\*(C'\fR extension in \s-1GNU\s0 C90. In \*(C+, emit any and all
|
6172 |
|
|
inline functions into the object file.
|
6173 |
|
|
.IP "\fB\-fkeep\-static\-consts\fR" 4
|
6174 |
|
|
.IX Item "-fkeep-static-consts"
|
6175 |
|
|
Emit variables declared \f(CW\*(C`static const\*(C'\fR when optimization isn't turned
|
6176 |
|
|
on, even if the variables aren't referenced.
|
6177 |
|
|
.Sp
|
6178 |
|
|
\&\s-1GCC\s0 enables this option by default. If you want to force the compiler to
|
6179 |
|
|
check if a variable is referenced, regardless of whether or not
|
6180 |
|
|
optimization is turned on, use the \fB\-fno\-keep\-static\-consts\fR option.
|
6181 |
|
|
.IP "\fB\-fmerge\-constants\fR" 4
|
6182 |
|
|
.IX Item "-fmerge-constants"
|
6183 |
|
|
Attempt to merge identical constants (string constants and floating-point
|
6184 |
|
|
constants) across compilation units.
|
6185 |
|
|
.Sp
|
6186 |
|
|
This option is the default for optimized compilation if the assembler and
|
6187 |
|
|
linker support it. Use \fB\-fno\-merge\-constants\fR to inhibit this
|
6188 |
|
|
behavior.
|
6189 |
|
|
.Sp
|
6190 |
|
|
Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
6191 |
|
|
.IP "\fB\-fmerge\-all\-constants\fR" 4
|
6192 |
|
|
.IX Item "-fmerge-all-constants"
|
6193 |
|
|
Attempt to merge identical constants and identical variables.
|
6194 |
|
|
.Sp
|
6195 |
|
|
This option implies \fB\-fmerge\-constants\fR. In addition to
|
6196 |
|
|
\&\fB\-fmerge\-constants\fR this considers e.g. even constant initialized
|
6197 |
|
|
arrays or initialized constant variables with integral or floating-point
|
6198 |
|
|
types. Languages like C or \*(C+ require each variable, including multiple
|
6199 |
|
|
instances of the same variable in recursive calls, to have distinct locations,
|
6200 |
|
|
so using this option results in non-conforming
|
6201 |
|
|
behavior.
|
6202 |
|
|
.IP "\fB\-fmodulo\-sched\fR" 4
|
6203 |
|
|
.IX Item "-fmodulo-sched"
|
6204 |
|
|
Perform swing modulo scheduling immediately before the first scheduling
|
6205 |
|
|
pass. This pass looks at innermost loops and reorders their
|
6206 |
|
|
instructions by overlapping different iterations.
|
6207 |
|
|
.IP "\fB\-fmodulo\-sched\-allow\-regmoves\fR" 4
|
6208 |
|
|
.IX Item "-fmodulo-sched-allow-regmoves"
|
6209 |
|
|
Perform more aggressive SMS-based modulo scheduling with register moves
|
6210 |
|
|
allowed. By setting this flag certain anti-dependences edges are
|
6211 |
|
|
deleted, which triggers the generation of reg-moves based on the
|
6212 |
|
|
life-range analysis. This option is effective only with
|
6213 |
|
|
\&\fB\-fmodulo\-sched\fR enabled.
|
6214 |
|
|
.IP "\fB\-fno\-branch\-count\-reg\fR" 4
|
6215 |
|
|
.IX Item "-fno-branch-count-reg"
|
6216 |
|
|
Do not use \*(L"decrement and branch\*(R" instructions on a count register,
|
6217 |
|
|
but instead generate a sequence of instructions that decrement a
|
6218 |
|
|
register, compare it against zero, then branch based upon the result.
|
6219 |
|
|
This option is only meaningful on architectures that support such
|
6220 |
|
|
instructions, which include x86, PowerPC, \s-1IA\-64\s0 and S/390.
|
6221 |
|
|
.Sp
|
6222 |
|
|
The default is \fB\-fbranch\-count\-reg\fR.
|
6223 |
|
|
.IP "\fB\-fno\-function\-cse\fR" 4
|
6224 |
|
|
.IX Item "-fno-function-cse"
|
6225 |
|
|
Do not put function addresses in registers; make each instruction that
|
6226 |
|
|
calls a constant function contain the function's address explicitly.
|
6227 |
|
|
.Sp
|
6228 |
|
|
This option results in less efficient code, but some strange hacks
|
6229 |
|
|
that alter the assembler output may be confused by the optimizations
|
6230 |
|
|
performed when this option is not used.
|
6231 |
|
|
.Sp
|
6232 |
|
|
The default is \fB\-ffunction\-cse\fR
|
6233 |
|
|
.IP "\fB\-fno\-zero\-initialized\-in\-bss\fR" 4
|
6234 |
|
|
.IX Item "-fno-zero-initialized-in-bss"
|
6235 |
|
|
If the target supports a \s-1BSS\s0 section, \s-1GCC\s0 by default puts variables that
|
6236 |
|
|
are initialized to zero into \s-1BSS\s0. This can save space in the resulting
|
6237 |
|
|
code.
|
6238 |
|
|
.Sp
|
6239 |
|
|
This option turns off this behavior because some programs explicitly
|
6240 |
|
|
rely on variables going to the data section\-\-\-e.g., so that the
|
6241 |
|
|
resulting executable can find the beginning of that section and/or make
|
6242 |
|
|
assumptions based on that.
|
6243 |
|
|
.Sp
|
6244 |
|
|
The default is \fB\-fzero\-initialized\-in\-bss\fR.
|
6245 |
|
|
.IP "\fB\-fsanitize=address\fR" 4
|
6246 |
|
|
.IX Item "-fsanitize=address"
|
6247 |
|
|
Enable AddressSanitizer, a fast memory error detector.
|
6248 |
|
|
Memory access instructions will be instrumented to detect
|
6249 |
|
|
out-of-bounds and use-after-free bugs.
|
6250 |
|
|
See <\fBhttp://code.google.com/p/address\-sanitizer/\fR> for more details.
|
6251 |
|
|
.IP "\fB\-fsanitize=thread\fR" 4
|
6252 |
|
|
.IX Item "-fsanitize=thread"
|
6253 |
|
|
Enable ThreadSanitizer, a fast data race detector.
|
6254 |
|
|
Memory access instructions will be instrumented to detect
|
6255 |
|
|
data race bugs.
|
6256 |
|
|
See <\fBhttp://code.google.com/p/data\-race\-test/wiki/ThreadSanitizer\fR> for more details.
|
6257 |
|
|
.IP "\fB\-fmudflap \-fmudflapth \-fmudflapir\fR" 4
|
6258 |
|
|
.IX Item "-fmudflap -fmudflapth -fmudflapir"
|
6259 |
|
|
For front-ends that support it (C and \*(C+), instrument all risky
|
6260 |
|
|
pointer/array dereferencing operations, some standard library
|
6261 |
|
|
string/heap functions, and some other associated constructs with
|
6262 |
|
|
range/validity tests. Modules so instrumented should be immune to
|
6263 |
|
|
buffer overflows, invalid heap use, and some other classes of C/\*(C+
|
6264 |
|
|
programming errors. The instrumentation relies on a separate runtime
|
6265 |
|
|
library (\fIlibmudflap\fR), which is linked into a program if
|
6266 |
|
|
\&\fB\-fmudflap\fR is given at link time. Run-time behavior of the
|
6267 |
|
|
instrumented program is controlled by the \fB\s-1MUDFLAP_OPTIONS\s0\fR
|
6268 |
|
|
environment variable. See \f(CW\*(C`env MUDFLAP_OPTIONS=\-help a.out\*(C'\fR
|
6269 |
|
|
for its options.
|
6270 |
|
|
.Sp
|
6271 |
|
|
Use \fB\-fmudflapth\fR instead of \fB\-fmudflap\fR to compile and to
|
6272 |
|
|
link if your program is multi-threaded. Use \fB\-fmudflapir\fR, in
|
6273 |
|
|
addition to \fB\-fmudflap\fR or \fB\-fmudflapth\fR, if
|
6274 |
|
|
instrumentation should ignore pointer reads. This produces less
|
6275 |
|
|
instrumentation (and therefore faster execution) and still provides
|
6276 |
|
|
some protection against outright memory corrupting writes, but allows
|
6277 |
|
|
erroneously read data to propagate within a program.
|
6278 |
|
|
.IP "\fB\-fthread\-jumps\fR" 4
|
6279 |
|
|
.IX Item "-fthread-jumps"
|
6280 |
|
|
Perform optimizations that check to see if a jump branches to a
|
6281 |
|
|
location where another comparison subsumed by the first is found. If
|
6282 |
|
|
so, the first branch is redirected to either the destination of the
|
6283 |
|
|
second branch or a point immediately following it, depending on whether
|
6284 |
|
|
the condition is known to be true or false.
|
6285 |
|
|
.Sp
|
6286 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
6287 |
|
|
.IP "\fB\-fsplit\-wide\-types\fR" 4
|
6288 |
|
|
.IX Item "-fsplit-wide-types"
|
6289 |
|
|
When using a type that occupies multiple registers, such as \f(CW\*(C`long
|
6290 |
|
|
long\*(C'\fR on a 32\-bit system, split the registers apart and allocate them
|
6291 |
|
|
independently. This normally generates better code for those types,
|
6292 |
|
|
but may make debugging more difficult.
|
6293 |
|
|
.Sp
|
6294 |
|
|
Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR,
|
6295 |
|
|
\&\fB\-Os\fR.
|
6296 |
|
|
.IP "\fB\-fcse\-follow\-jumps\fR" 4
|
6297 |
|
|
.IX Item "-fcse-follow-jumps"
|
6298 |
|
|
In common subexpression elimination (\s-1CSE\s0), scan through jump instructions
|
6299 |
|
|
when the target of the jump is not reached by any other path. For
|
6300 |
|
|
example, when \s-1CSE\s0 encounters an \f(CW\*(C`if\*(C'\fR statement with an
|
6301 |
|
|
\&\f(CW\*(C`else\*(C'\fR clause, \s-1CSE\s0 follows the jump when the condition
|
6302 |
|
|
tested is false.
|
6303 |
|
|
.Sp
|
6304 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
6305 |
|
|
.IP "\fB\-fcse\-skip\-blocks\fR" 4
|
6306 |
|
|
.IX Item "-fcse-skip-blocks"
|
6307 |
|
|
This is similar to \fB\-fcse\-follow\-jumps\fR, but causes \s-1CSE\s0 to
|
6308 |
|
|
follow jumps that conditionally skip over blocks. When \s-1CSE\s0
|
6309 |
|
|
encounters a simple \f(CW\*(C`if\*(C'\fR statement with no else clause,
|
6310 |
|
|
\&\fB\-fcse\-skip\-blocks\fR causes \s-1CSE\s0 to follow the jump around the
|
6311 |
|
|
body of the \f(CW\*(C`if\*(C'\fR.
|
6312 |
|
|
.Sp
|
6313 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
6314 |
|
|
.IP "\fB\-frerun\-cse\-after\-loop\fR" 4
|
6315 |
|
|
.IX Item "-frerun-cse-after-loop"
|
6316 |
|
|
Re-run common subexpression elimination after loop optimizations are
|
6317 |
|
|
performed.
|
6318 |
|
|
.Sp
|
6319 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
6320 |
|
|
.IP "\fB\-fgcse\fR" 4
|
6321 |
|
|
.IX Item "-fgcse"
|
6322 |
|
|
Perform a global common subexpression elimination pass.
|
6323 |
|
|
This pass also performs global constant and copy propagation.
|
6324 |
|
|
.Sp
|
6325 |
|
|
\&\fINote:\fR When compiling a program using computed gotos, a \s-1GCC\s0
|
6326 |
|
|
extension, you may get better run-time performance if you disable
|
6327 |
|
|
the global common subexpression elimination pass by adding
|
6328 |
|
|
\&\fB\-fno\-gcse\fR to the command line.
|
6329 |
|
|
.Sp
|
6330 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
6331 |
|
|
.IP "\fB\-fgcse\-lm\fR" 4
|
6332 |
|
|
.IX Item "-fgcse-lm"
|
6333 |
|
|
When \fB\-fgcse\-lm\fR is enabled, global common subexpression elimination
|
6334 |
|
|
attempts to move loads that are only killed by stores into themselves. This
|
6335 |
|
|
allows a loop containing a load/store sequence to be changed to a load outside
|
6336 |
|
|
the loop, and a copy/store within the loop.
|
6337 |
|
|
.Sp
|
6338 |
|
|
Enabled by default when \fB\-fgcse\fR is enabled.
|
6339 |
|
|
.IP "\fB\-fgcse\-sm\fR" 4
|
6340 |
|
|
.IX Item "-fgcse-sm"
|
6341 |
|
|
When \fB\-fgcse\-sm\fR is enabled, a store motion pass is run after
|
6342 |
|
|
global common subexpression elimination. This pass attempts to move
|
6343 |
|
|
stores out of loops. When used in conjunction with \fB\-fgcse\-lm\fR,
|
6344 |
|
|
loops containing a load/store sequence can be changed to a load before
|
6345 |
|
|
the loop and a store after the loop.
|
6346 |
|
|
.Sp
|
6347 |
|
|
Not enabled at any optimization level.
|
6348 |
|
|
.IP "\fB\-fgcse\-las\fR" 4
|
6349 |
|
|
.IX Item "-fgcse-las"
|
6350 |
|
|
When \fB\-fgcse\-las\fR is enabled, the global common subexpression
|
6351 |
|
|
elimination pass eliminates redundant loads that come after stores to the
|
6352 |
|
|
same memory location (both partial and full redundancies).
|
6353 |
|
|
.Sp
|
6354 |
|
|
Not enabled at any optimization level.
|
6355 |
|
|
.IP "\fB\-fgcse\-after\-reload\fR" 4
|
6356 |
|
|
.IX Item "-fgcse-after-reload"
|
6357 |
|
|
When \fB\-fgcse\-after\-reload\fR is enabled, a redundant load elimination
|
6358 |
|
|
pass is performed after reload. The purpose of this pass is to clean up
|
6359 |
|
|
redundant spilling.
|
6360 |
|
|
.IP "\fB\-funsafe\-loop\-optimizations\fR" 4
|
6361 |
|
|
.IX Item "-funsafe-loop-optimizations"
|
6362 |
|
|
This option tells the loop optimizer to assume that loop indices do not
|
6363 |
|
|
overflow, and that loops with nontrivial exit condition are not
|
6364 |
|
|
infinite. This enables a wider range of loop optimizations even if
|
6365 |
|
|
the loop optimizer itself cannot prove that these assumptions are valid.
|
6366 |
|
|
If you use \fB\-Wunsafe\-loop\-optimizations\fR, the compiler warns you
|
6367 |
|
|
if it finds this kind of loop.
|
6368 |
|
|
.IP "\fB\-fcrossjumping\fR" 4
|
6369 |
|
|
.IX Item "-fcrossjumping"
|
6370 |
|
|
Perform cross-jumping transformation.
|
6371 |
|
|
This transformation unifies equivalent code and saves code size. The
|
6372 |
|
|
resulting code may or may not perform better than without cross-jumping.
|
6373 |
|
|
.Sp
|
6374 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
6375 |
|
|
.IP "\fB\-fauto\-inc\-dec\fR" 4
|
6376 |
|
|
.IX Item "-fauto-inc-dec"
|
6377 |
|
|
Combine increments or decrements of addresses with memory accesses.
|
6378 |
|
|
This pass is always skipped on architectures that do not have
|
6379 |
|
|
instructions to support this. Enabled by default at \fB\-O\fR and
|
6380 |
|
|
higher on architectures that support this.
|
6381 |
|
|
.IP "\fB\-fdce\fR" 4
|
6382 |
|
|
.IX Item "-fdce"
|
6383 |
|
|
Perform dead code elimination (\s-1DCE\s0) on \s-1RTL\s0.
|
6384 |
|
|
Enabled by default at \fB\-O\fR and higher.
|
6385 |
|
|
.IP "\fB\-fdse\fR" 4
|
6386 |
|
|
.IX Item "-fdse"
|
6387 |
|
|
Perform dead store elimination (\s-1DSE\s0) on \s-1RTL\s0.
|
6388 |
|
|
Enabled by default at \fB\-O\fR and higher.
|
6389 |
|
|
.IP "\fB\-fif\-conversion\fR" 4
|
6390 |
|
|
.IX Item "-fif-conversion"
|
6391 |
|
|
Attempt to transform conditional jumps into branch-less equivalents. This
|
6392 |
|
|
includes use of conditional moves, min, max, set flags and abs instructions, and
|
6393 |
|
|
some tricks doable by standard arithmetics. The use of conditional execution
|
6394 |
|
|
on chips where it is available is controlled by \f(CW\*(C`if\-conversion2\*(C'\fR.
|
6395 |
|
|
.Sp
|
6396 |
|
|
Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
6397 |
|
|
.IP "\fB\-fif\-conversion2\fR" 4
|
6398 |
|
|
.IX Item "-fif-conversion2"
|
6399 |
|
|
Use conditional execution (where available) to transform conditional jumps into
|
6400 |
|
|
branch-less equivalents.
|
6401 |
|
|
.Sp
|
6402 |
|
|
Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
6403 |
|
|
.IP "\fB\-fdelete\-null\-pointer\-checks\fR" 4
|
6404 |
|
|
.IX Item "-fdelete-null-pointer-checks"
|
6405 |
|
|
Assume that programs cannot safely dereference null pointers, and that
|
6406 |
|
|
no code or data element resides there. This enables simple constant
|
6407 |
|
|
folding optimizations at all optimization levels. In addition, other
|
6408 |
|
|
optimization passes in \s-1GCC\s0 use this flag to control global dataflow
|
6409 |
|
|
analyses that eliminate useless checks for null pointers; these assume
|
6410 |
|
|
that if a pointer is checked after it has already been dereferenced,
|
6411 |
|
|
it cannot be null.
|
6412 |
|
|
.Sp
|
6413 |
|
|
Note however that in some environments this assumption is not true.
|
6414 |
|
|
Use \fB\-fno\-delete\-null\-pointer\-checks\fR to disable this optimization
|
6415 |
|
|
for programs that depend on that behavior.
|
6416 |
|
|
.Sp
|
6417 |
|
|
Some targets, especially embedded ones, disable this option at all levels.
|
6418 |
|
|
Otherwise it is enabled at all levels: \fB\-O0\fR, \fB\-O1\fR,
|
6419 |
|
|
\&\fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR. Passes that use the information
|
6420 |
|
|
are enabled independently at different optimization levels.
|
6421 |
|
|
.IP "\fB\-fdevirtualize\fR" 4
|
6422 |
|
|
.IX Item "-fdevirtualize"
|
6423 |
|
|
Attempt to convert calls to virtual functions to direct calls. This
|
6424 |
|
|
is done both within a procedure and interprocedurally as part of
|
6425 |
|
|
indirect inlining (\f(CW\*(C`\-findirect\-inlining\*(C'\fR) and interprocedural constant
|
6426 |
|
|
propagation (\fB\-fipa\-cp\fR).
|
6427 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
6428 |
|
|
.IP "\fB\-fexpensive\-optimizations\fR" 4
|
6429 |
|
|
.IX Item "-fexpensive-optimizations"
|
6430 |
|
|
Perform a number of minor optimizations that are relatively expensive.
|
6431 |
|
|
.Sp
|
6432 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
6433 |
|
|
.IP "\fB\-free\fR" 4
|
6434 |
|
|
.IX Item "-free"
|
6435 |
|
|
Attempt to remove redundant extension instructions. This is especially
|
6436 |
|
|
helpful for the x86\-64 architecture, which implicitly zero-extends in 64\-bit
|
6437 |
|
|
registers after writing to their lower 32\-bit half.
|
6438 |
|
|
.Sp
|
6439 |
|
|
Enabled for x86 at levels \fB\-O2\fR, \fB\-O3\fR.
|
6440 |
|
|
.IP "\fB\-foptimize\-register\-move\fR" 4
|
6441 |
|
|
.IX Item "-foptimize-register-move"
|
6442 |
|
|
.PD 0
|
6443 |
|
|
.IP "\fB\-fregmove\fR" 4
|
6444 |
|
|
.IX Item "-fregmove"
|
6445 |
|
|
.PD
|
6446 |
|
|
Attempt to reassign register numbers in move instructions and as
|
6447 |
|
|
operands of other simple instructions in order to maximize the amount of
|
6448 |
|
|
register tying. This is especially helpful on machines with two-operand
|
6449 |
|
|
instructions.
|
6450 |
|
|
.Sp
|
6451 |
|
|
Note \fB\-fregmove\fR and \fB\-foptimize\-register\-move\fR are the same
|
6452 |
|
|
optimization.
|
6453 |
|
|
.Sp
|
6454 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
6455 |
|
|
.IP "\fB\-fira\-algorithm=\fR\fIalgorithm\fR" 4
|
6456 |
|
|
.IX Item "-fira-algorithm=algorithm"
|
6457 |
|
|
Use the specified coloring algorithm for the integrated register
|
6458 |
|
|
allocator. The \fIalgorithm\fR argument can be \fBpriority\fR, which
|
6459 |
|
|
specifies Chow's priority coloring, or \fB\s-1CB\s0\fR, which specifies
|
6460 |
|
|
Chaitin-Briggs coloring. Chaitin-Briggs coloring is not implemented
|
6461 |
|
|
for all architectures, but for those targets that do support it, it is
|
6462 |
|
|
the default because it generates better code.
|
6463 |
|
|
.IP "\fB\-fira\-region=\fR\fIregion\fR" 4
|
6464 |
|
|
.IX Item "-fira-region=region"
|
6465 |
|
|
Use specified regions for the integrated register allocator. The
|
6466 |
|
|
\&\fIregion\fR argument should be one of the following:
|
6467 |
|
|
.RS 4
|
6468 |
|
|
.IP "\fBall\fR" 4
|
6469 |
|
|
.IX Item "all"
|
6470 |
|
|
Use all loops as register allocation regions.
|
6471 |
|
|
This can give the best results for machines with a small and/or
|
6472 |
|
|
irregular register set.
|
6473 |
|
|
.IP "\fBmixed\fR" 4
|
6474 |
|
|
.IX Item "mixed"
|
6475 |
|
|
Use all loops except for loops with small register pressure
|
6476 |
|
|
as the regions. This value usually gives
|
6477 |
|
|
the best results in most cases and for most architectures,
|
6478 |
|
|
and is enabled by default when compiling with optimization for speed
|
6479 |
|
|
(\fB\-O\fR, \fB\-O2\fR, ...).
|
6480 |
|
|
.IP "\fBone\fR" 4
|
6481 |
|
|
.IX Item "one"
|
6482 |
|
|
Use all functions as a single region.
|
6483 |
|
|
This typically results in the smallest code size, and is enabled by default for
|
6484 |
|
|
\&\fB\-Os\fR or \fB\-O0\fR.
|
6485 |
|
|
.RE
|
6486 |
|
|
.RS 4
|
6487 |
|
|
.RE
|
6488 |
|
|
.IP "\fB\-fira\-hoist\-pressure\fR" 4
|
6489 |
|
|
.IX Item "-fira-hoist-pressure"
|
6490 |
|
|
Use \s-1IRA\s0 to evaluate register pressure in the code hoisting pass for
|
6491 |
|
|
decisions to hoist expressions. This option usually results in smaller
|
6492 |
|
|
code, but it can slow the compiler down.
|
6493 |
|
|
.Sp
|
6494 |
|
|
This option is enabled at level \fB\-Os\fR for all targets.
|
6495 |
|
|
.IP "\fB\-fira\-loop\-pressure\fR" 4
|
6496 |
|
|
.IX Item "-fira-loop-pressure"
|
6497 |
|
|
Use \s-1IRA\s0 to evaluate register pressure in loops for decisions to move
|
6498 |
|
|
loop invariants. This option usually results in generation
|
6499 |
|
|
of faster and smaller code on machines with large register files (>= 32
|
6500 |
|
|
registers), but it can slow the compiler down.
|
6501 |
|
|
.Sp
|
6502 |
|
|
This option is enabled at level \fB\-O3\fR for some targets.
|
6503 |
|
|
.IP "\fB\-fno\-ira\-share\-save\-slots\fR" 4
|
6504 |
|
|
.IX Item "-fno-ira-share-save-slots"
|
6505 |
|
|
Disable sharing of stack slots used for saving call-used hard
|
6506 |
|
|
registers living through a call. Each hard register gets a
|
6507 |
|
|
separate stack slot, and as a result function stack frames are
|
6508 |
|
|
larger.
|
6509 |
|
|
.IP "\fB\-fno\-ira\-share\-spill\-slots\fR" 4
|
6510 |
|
|
.IX Item "-fno-ira-share-spill-slots"
|
6511 |
|
|
Disable sharing of stack slots allocated for pseudo-registers. Each
|
6512 |
|
|
pseudo-register that does not get a hard register gets a separate
|
6513 |
|
|
stack slot, and as a result function stack frames are larger.
|
6514 |
|
|
.IP "\fB\-fira\-verbose=\fR\fIn\fR" 4
|
6515 |
|
|
.IX Item "-fira-verbose=n"
|
6516 |
|
|
Control the verbosity of the dump file for the integrated register allocator.
|
6517 |
|
|
The default value is 5. If the value \fIn\fR is greater or equal to 10,
|
6518 |
|
|
the dump output is sent to stderr using the same format as \fIn\fR minus 10.
|
6519 |
|
|
.IP "\fB\-fdelayed\-branch\fR" 4
|
6520 |
|
|
.IX Item "-fdelayed-branch"
|
6521 |
|
|
If supported for the target machine, attempt to reorder instructions
|
6522 |
|
|
to exploit instruction slots available after delayed branch
|
6523 |
|
|
instructions.
|
6524 |
|
|
.Sp
|
6525 |
|
|
Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
6526 |
|
|
.IP "\fB\-fschedule\-insns\fR" 4
|
6527 |
|
|
.IX Item "-fschedule-insns"
|
6528 |
|
|
If supported for the target machine, attempt to reorder instructions to
|
6529 |
|
|
eliminate execution stalls due to required data being unavailable. This
|
6530 |
|
|
helps machines that have slow floating point or memory load instructions
|
6531 |
|
|
by allowing other instructions to be issued until the result of the load
|
6532 |
|
|
or floating-point instruction is required.
|
6533 |
|
|
.Sp
|
6534 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
|
6535 |
|
|
.IP "\fB\-fschedule\-insns2\fR" 4
|
6536 |
|
|
.IX Item "-fschedule-insns2"
|
6537 |
|
|
Similar to \fB\-fschedule\-insns\fR, but requests an additional pass of
|
6538 |
|
|
instruction scheduling after register allocation has been done. This is
|
6539 |
|
|
especially useful on machines with a relatively small number of
|
6540 |
|
|
registers and where memory load instructions take more than one cycle.
|
6541 |
|
|
.Sp
|
6542 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
6543 |
|
|
.IP "\fB\-fno\-sched\-interblock\fR" 4
|
6544 |
|
|
.IX Item "-fno-sched-interblock"
|
6545 |
|
|
Don't schedule instructions across basic blocks. This is normally
|
6546 |
|
|
enabled by default when scheduling before register allocation, i.e.
|
6547 |
|
|
with \fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
|
6548 |
|
|
.IP "\fB\-fno\-sched\-spec\fR" 4
|
6549 |
|
|
.IX Item "-fno-sched-spec"
|
6550 |
|
|
Don't allow speculative motion of non-load instructions. This is normally
|
6551 |
|
|
enabled by default when scheduling before register allocation, i.e.
|
6552 |
|
|
with \fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
|
6553 |
|
|
.IP "\fB\-fsched\-pressure\fR" 4
|
6554 |
|
|
.IX Item "-fsched-pressure"
|
6555 |
|
|
Enable register pressure sensitive insn scheduling before register
|
6556 |
|
|
allocation. This only makes sense when scheduling before register
|
6557 |
|
|
allocation is enabled, i.e. with \fB\-fschedule\-insns\fR or at
|
6558 |
|
|
\&\fB\-O2\fR or higher. Usage of this option can improve the
|
6559 |
|
|
generated code and decrease its size by preventing register pressure
|
6560 |
|
|
increase above the number of available hard registers and subsequent
|
6561 |
|
|
spills in register allocation.
|
6562 |
|
|
.IP "\fB\-fsched\-spec\-load\fR" 4
|
6563 |
|
|
.IX Item "-fsched-spec-load"
|
6564 |
|
|
Allow speculative motion of some load instructions. This only makes
|
6565 |
|
|
sense when scheduling before register allocation, i.e. with
|
6566 |
|
|
\&\fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
|
6567 |
|
|
.IP "\fB\-fsched\-spec\-load\-dangerous\fR" 4
|
6568 |
|
|
.IX Item "-fsched-spec-load-dangerous"
|
6569 |
|
|
Allow speculative motion of more load instructions. This only makes
|
6570 |
|
|
sense when scheduling before register allocation, i.e. with
|
6571 |
|
|
\&\fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
|
6572 |
|
|
.IP "\fB\-fsched\-stalled\-insns\fR" 4
|
6573 |
|
|
.IX Item "-fsched-stalled-insns"
|
6574 |
|
|
.PD 0
|
6575 |
|
|
.IP "\fB\-fsched\-stalled\-insns=\fR\fIn\fR" 4
|
6576 |
|
|
.IX Item "-fsched-stalled-insns=n"
|
6577 |
|
|
.PD
|
6578 |
|
|
Define how many insns (if any) can be moved prematurely from the queue
|
6579 |
|
|
of stalled insns into the ready list during the second scheduling pass.
|
6580 |
|
|
\&\fB\-fno\-sched\-stalled\-insns\fR means that no insns are moved
|
6581 |
|
|
prematurely, \fB\-fsched\-stalled\-insns=0\fR means there is no limit
|
6582 |
|
|
on how many queued insns can be moved prematurely.
|
6583 |
|
|
\&\fB\-fsched\-stalled\-insns\fR without a value is equivalent to
|
6584 |
|
|
\&\fB\-fsched\-stalled\-insns=1\fR.
|
6585 |
|
|
.IP "\fB\-fsched\-stalled\-insns\-dep\fR" 4
|
6586 |
|
|
.IX Item "-fsched-stalled-insns-dep"
|
6587 |
|
|
.PD 0
|
6588 |
|
|
.IP "\fB\-fsched\-stalled\-insns\-dep=\fR\fIn\fR" 4
|
6589 |
|
|
.IX Item "-fsched-stalled-insns-dep=n"
|
6590 |
|
|
.PD
|
6591 |
|
|
Define how many insn groups (cycles) are examined for a dependency
|
6592 |
|
|
on a stalled insn that is a candidate for premature removal from the queue
|
6593 |
|
|
of stalled insns. This has an effect only during the second scheduling pass,
|
6594 |
|
|
and only if \fB\-fsched\-stalled\-insns\fR is used.
|
6595 |
|
|
\&\fB\-fno\-sched\-stalled\-insns\-dep\fR is equivalent to
|
6596 |
|
|
\&\fB\-fsched\-stalled\-insns\-dep=0\fR.
|
6597 |
|
|
\&\fB\-fsched\-stalled\-insns\-dep\fR without a value is equivalent to
|
6598 |
|
|
\&\fB\-fsched\-stalled\-insns\-dep=1\fR.
|
6599 |
|
|
.IP "\fB\-fsched2\-use\-superblocks\fR" 4
|
6600 |
|
|
.IX Item "-fsched2-use-superblocks"
|
6601 |
|
|
When scheduling after register allocation, use superblock scheduling.
|
6602 |
|
|
This allows motion across basic block boundaries,
|
6603 |
|
|
resulting in faster schedules. This option is experimental, as not all machine
|
6604 |
|
|
descriptions used by \s-1GCC\s0 model the \s-1CPU\s0 closely enough to avoid unreliable
|
6605 |
|
|
results from the algorithm.
|
6606 |
|
|
.Sp
|
6607 |
|
|
This only makes sense when scheduling after register allocation, i.e. with
|
6608 |
|
|
\&\fB\-fschedule\-insns2\fR or at \fB\-O2\fR or higher.
|
6609 |
|
|
.IP "\fB\-fsched\-group\-heuristic\fR" 4
|
6610 |
|
|
.IX Item "-fsched-group-heuristic"
|
6611 |
|
|
Enable the group heuristic in the scheduler. This heuristic favors
|
6612 |
|
|
the instruction that belongs to a schedule group. This is enabled
|
6613 |
|
|
by default when scheduling is enabled, i.e. with \fB\-fschedule\-insns\fR
|
6614 |
|
|
or \fB\-fschedule\-insns2\fR or at \fB\-O2\fR or higher.
|
6615 |
|
|
.IP "\fB\-fsched\-critical\-path\-heuristic\fR" 4
|
6616 |
|
|
.IX Item "-fsched-critical-path-heuristic"
|
6617 |
|
|
Enable the critical-path heuristic in the scheduler. This heuristic favors
|
6618 |
|
|
instructions on the critical path. This is enabled by default when
|
6619 |
|
|
scheduling is enabled, i.e. with \fB\-fschedule\-insns\fR
|
6620 |
|
|
or \fB\-fschedule\-insns2\fR or at \fB\-O2\fR or higher.
|
6621 |
|
|
.IP "\fB\-fsched\-spec\-insn\-heuristic\fR" 4
|
6622 |
|
|
.IX Item "-fsched-spec-insn-heuristic"
|
6623 |
|
|
Enable the speculative instruction heuristic in the scheduler. This
|
6624 |
|
|
heuristic favors speculative instructions with greater dependency weakness.
|
6625 |
|
|
This is enabled by default when scheduling is enabled, i.e.
|
6626 |
|
|
with \fB\-fschedule\-insns\fR or \fB\-fschedule\-insns2\fR
|
6627 |
|
|
or at \fB\-O2\fR or higher.
|
6628 |
|
|
.IP "\fB\-fsched\-rank\-heuristic\fR" 4
|
6629 |
|
|
.IX Item "-fsched-rank-heuristic"
|
6630 |
|
|
Enable the rank heuristic in the scheduler. This heuristic favors
|
6631 |
|
|
the instruction belonging to a basic block with greater size or frequency.
|
6632 |
|
|
This is enabled by default when scheduling is enabled, i.e.
|
6633 |
|
|
with \fB\-fschedule\-insns\fR or \fB\-fschedule\-insns2\fR or
|
6634 |
|
|
at \fB\-O2\fR or higher.
|
6635 |
|
|
.IP "\fB\-fsched\-last\-insn\-heuristic\fR" 4
|
6636 |
|
|
.IX Item "-fsched-last-insn-heuristic"
|
6637 |
|
|
Enable the last-instruction heuristic in the scheduler. This heuristic
|
6638 |
|
|
favors the instruction that is less dependent on the last instruction
|
6639 |
|
|
scheduled. This is enabled by default when scheduling is enabled,
|
6640 |
|
|
i.e. with \fB\-fschedule\-insns\fR or \fB\-fschedule\-insns2\fR or
|
6641 |
|
|
at \fB\-O2\fR or higher.
|
6642 |
|
|
.IP "\fB\-fsched\-dep\-count\-heuristic\fR" 4
|
6643 |
|
|
.IX Item "-fsched-dep-count-heuristic"
|
6644 |
|
|
Enable the dependent-count heuristic in the scheduler. This heuristic
|
6645 |
|
|
favors the instruction that has more instructions depending on it.
|
6646 |
|
|
This is enabled by default when scheduling is enabled, i.e.
|
6647 |
|
|
with \fB\-fschedule\-insns\fR or \fB\-fschedule\-insns2\fR or
|
6648 |
|
|
at \fB\-O2\fR or higher.
|
6649 |
|
|
.IP "\fB\-freschedule\-modulo\-scheduled\-loops\fR" 4
|
6650 |
|
|
.IX Item "-freschedule-modulo-scheduled-loops"
|
6651 |
|
|
Modulo scheduling is performed before traditional scheduling. If a loop
|
6652 |
|
|
is modulo scheduled, later scheduling passes may change its schedule.
|
6653 |
|
|
Use this option to control that behavior.
|
6654 |
|
|
.IP "\fB\-fselective\-scheduling\fR" 4
|
6655 |
|
|
.IX Item "-fselective-scheduling"
|
6656 |
|
|
Schedule instructions using selective scheduling algorithm. Selective
|
6657 |
|
|
scheduling runs instead of the first scheduler pass.
|
6658 |
|
|
.IP "\fB\-fselective\-scheduling2\fR" 4
|
6659 |
|
|
.IX Item "-fselective-scheduling2"
|
6660 |
|
|
Schedule instructions using selective scheduling algorithm. Selective
|
6661 |
|
|
scheduling runs instead of the second scheduler pass.
|
6662 |
|
|
.IP "\fB\-fsel\-sched\-pipelining\fR" 4
|
6663 |
|
|
.IX Item "-fsel-sched-pipelining"
|
6664 |
|
|
Enable software pipelining of innermost loops during selective scheduling.
|
6665 |
|
|
This option has no effect unless one of \fB\-fselective\-scheduling\fR or
|
6666 |
|
|
\&\fB\-fselective\-scheduling2\fR is turned on.
|
6667 |
|
|
.IP "\fB\-fsel\-sched\-pipelining\-outer\-loops\fR" 4
|
6668 |
|
|
.IX Item "-fsel-sched-pipelining-outer-loops"
|
6669 |
|
|
When pipelining loops during selective scheduling, also pipeline outer loops.
|
6670 |
|
|
This option has no effect unless \fB\-fsel\-sched\-pipelining\fR is turned on.
|
6671 |
|
|
.IP "\fB\-fshrink\-wrap\fR" 4
|
6672 |
|
|
.IX Item "-fshrink-wrap"
|
6673 |
|
|
Emit function prologues only before parts of the function that need it,
|
6674 |
|
|
rather than at the top of the function. This flag is enabled by default at
|
6675 |
|
|
\&\fB\-O\fR and higher.
|
6676 |
|
|
.IP "\fB\-fcaller\-saves\fR" 4
|
6677 |
|
|
.IX Item "-fcaller-saves"
|
6678 |
|
|
Enable allocation of values to registers that are clobbered by
|
6679 |
|
|
function calls, by emitting extra instructions to save and restore the
|
6680 |
|
|
registers around such calls. Such allocation is done only when it
|
6681 |
|
|
seems to result in better code.
|
6682 |
|
|
.Sp
|
6683 |
|
|
This option is always enabled by default on certain machines, usually
|
6684 |
|
|
those which have no call-preserved registers to use instead.
|
6685 |
|
|
.Sp
|
6686 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
6687 |
|
|
.IP "\fB\-fcombine\-stack\-adjustments\fR" 4
|
6688 |
|
|
.IX Item "-fcombine-stack-adjustments"
|
6689 |
|
|
Tracks stack adjustments (pushes and pops) and stack memory references
|
6690 |
|
|
and then tries to find ways to combine them.
|
6691 |
|
|
.Sp
|
6692 |
|
|
Enabled by default at \fB\-O1\fR and higher.
|
6693 |
|
|
.IP "\fB\-fconserve\-stack\fR" 4
|
6694 |
|
|
.IX Item "-fconserve-stack"
|
6695 |
|
|
Attempt to minimize stack usage. The compiler attempts to use less
|
6696 |
|
|
stack space, even if that makes the program slower. This option
|
6697 |
|
|
implies setting the \fBlarge-stack-frame\fR parameter to 100
|
6698 |
|
|
and the \fBlarge-stack-frame-growth\fR parameter to 400.
|
6699 |
|
|
.IP "\fB\-ftree\-reassoc\fR" 4
|
6700 |
|
|
.IX Item "-ftree-reassoc"
|
6701 |
|
|
Perform reassociation on trees. This flag is enabled by default
|
6702 |
|
|
at \fB\-O\fR and higher.
|
6703 |
|
|
.IP "\fB\-ftree\-pre\fR" 4
|
6704 |
|
|
.IX Item "-ftree-pre"
|
6705 |
|
|
Perform partial redundancy elimination (\s-1PRE\s0) on trees. This flag is
|
6706 |
|
|
enabled by default at \fB\-O2\fR and \fB\-O3\fR.
|
6707 |
|
|
.IP "\fB\-ftree\-partial\-pre\fR" 4
|
6708 |
|
|
.IX Item "-ftree-partial-pre"
|
6709 |
|
|
Make partial redundancy elimination (\s-1PRE\s0) more aggressive. This flag is
|
6710 |
|
|
enabled by default at \fB\-O3\fR.
|
6711 |
|
|
.IP "\fB\-ftree\-forwprop\fR" 4
|
6712 |
|
|
.IX Item "-ftree-forwprop"
|
6713 |
|
|
Perform forward propagation on trees. This flag is enabled by default
|
6714 |
|
|
at \fB\-O\fR and higher.
|
6715 |
|
|
.IP "\fB\-ftree\-fre\fR" 4
|
6716 |
|
|
.IX Item "-ftree-fre"
|
6717 |
|
|
Perform full redundancy elimination (\s-1FRE\s0) on trees. The difference
|
6718 |
|
|
between \s-1FRE\s0 and \s-1PRE\s0 is that \s-1FRE\s0 only considers expressions
|
6719 |
|
|
that are computed on all paths leading to the redundant computation.
|
6720 |
|
|
This analysis is faster than \s-1PRE\s0, though it exposes fewer redundancies.
|
6721 |
|
|
This flag is enabled by default at \fB\-O\fR and higher.
|
6722 |
|
|
.IP "\fB\-ftree\-phiprop\fR" 4
|
6723 |
|
|
.IX Item "-ftree-phiprop"
|
6724 |
|
|
Perform hoisting of loads from conditional pointers on trees. This
|
6725 |
|
|
pass is enabled by default at \fB\-O\fR and higher.
|
6726 |
|
|
.IP "\fB\-fhoist\-adjacent\-loads\fR" 4
|
6727 |
|
|
.IX Item "-fhoist-adjacent-loads"
|
6728 |
|
|
Speculatively hoist loads from both branches of an if-then-else if the
|
6729 |
|
|
loads are from adjacent locations in the same structure and the target
|
6730 |
|
|
architecture has a conditional move instruction. This flag is enabled
|
6731 |
|
|
by default at \fB\-O2\fR and higher.
|
6732 |
|
|
.IP "\fB\-ftree\-copy\-prop\fR" 4
|
6733 |
|
|
.IX Item "-ftree-copy-prop"
|
6734 |
|
|
Perform copy propagation on trees. This pass eliminates unnecessary
|
6735 |
|
|
copy operations. This flag is enabled by default at \fB\-O\fR and
|
6736 |
|
|
higher.
|
6737 |
|
|
.IP "\fB\-fipa\-pure\-const\fR" 4
|
6738 |
|
|
.IX Item "-fipa-pure-const"
|
6739 |
|
|
Discover which functions are pure or constant.
|
6740 |
|
|
Enabled by default at \fB\-O\fR and higher.
|
6741 |
|
|
.IP "\fB\-fipa\-reference\fR" 4
|
6742 |
|
|
.IX Item "-fipa-reference"
|
6743 |
|
|
Discover which static variables do not escape the
|
6744 |
|
|
compilation unit.
|
6745 |
|
|
Enabled by default at \fB\-O\fR and higher.
|
6746 |
|
|
.IP "\fB\-fipa\-pta\fR" 4
|
6747 |
|
|
.IX Item "-fipa-pta"
|
6748 |
|
|
Perform interprocedural pointer analysis and interprocedural modification
|
6749 |
|
|
and reference analysis. This option can cause excessive memory and
|
6750 |
|
|
compile-time usage on large compilation units. It is not enabled by
|
6751 |
|
|
default at any optimization level.
|
6752 |
|
|
.IP "\fB\-fipa\-profile\fR" 4
|
6753 |
|
|
.IX Item "-fipa-profile"
|
6754 |
|
|
Perform interprocedural profile propagation. The functions called only from
|
6755 |
|
|
cold functions are marked as cold. Also functions executed once (such as
|
6756 |
|
|
\&\f(CW\*(C`cold\*(C'\fR, \f(CW\*(C`noreturn\*(C'\fR, static constructors or destructors) are identified. Cold
|
6757 |
|
|
functions and loop less parts of functions executed once are then optimized for
|
6758 |
|
|
size.
|
6759 |
|
|
Enabled by default at \fB\-O\fR and higher.
|
6760 |
|
|
.IP "\fB\-fipa\-cp\fR" 4
|
6761 |
|
|
.IX Item "-fipa-cp"
|
6762 |
|
|
Perform interprocedural constant propagation.
|
6763 |
|
|
This optimization analyzes the program to determine when values passed
|
6764 |
|
|
to functions are constants and then optimizes accordingly.
|
6765 |
|
|
This optimization can substantially increase performance
|
6766 |
|
|
if the application has constants passed to functions.
|
6767 |
|
|
This flag is enabled by default at \fB\-O2\fR, \fB\-Os\fR and \fB\-O3\fR.
|
6768 |
|
|
.IP "\fB\-fipa\-cp\-clone\fR" 4
|
6769 |
|
|
.IX Item "-fipa-cp-clone"
|
6770 |
|
|
Perform function cloning to make interprocedural constant propagation stronger.
|
6771 |
|
|
When enabled, interprocedural constant propagation performs function cloning
|
6772 |
|
|
when externally visible function can be called with constant arguments.
|
6773 |
|
|
Because this optimization can create multiple copies of functions,
|
6774 |
|
|
it may significantly increase code size
|
6775 |
|
|
(see \fB\-\-param ipcp\-unit\-growth=\fR\fIvalue\fR).
|
6776 |
|
|
This flag is enabled by default at \fB\-O3\fR.
|
6777 |
|
|
.IP "\fB\-ftree\-sink\fR" 4
|
6778 |
|
|
.IX Item "-ftree-sink"
|
6779 |
|
|
Perform forward store motion on trees. This flag is
|
6780 |
|
|
enabled by default at \fB\-O\fR and higher.
|
6781 |
|
|
.IP "\fB\-ftree\-bit\-ccp\fR" 4
|
6782 |
|
|
.IX Item "-ftree-bit-ccp"
|
6783 |
|
|
Perform sparse conditional bit constant propagation on trees and propagate
|
6784 |
|
|
pointer alignment information.
|
6785 |
|
|
This pass only operates on local scalar variables and is enabled by default
|
6786 |
|
|
at \fB\-O\fR and higher. It requires that \fB\-ftree\-ccp\fR is enabled.
|
6787 |
|
|
.IP "\fB\-ftree\-ccp\fR" 4
|
6788 |
|
|
.IX Item "-ftree-ccp"
|
6789 |
|
|
Perform sparse conditional constant propagation (\s-1CCP\s0) on trees. This
|
6790 |
|
|
pass only operates on local scalar variables and is enabled by default
|
6791 |
|
|
at \fB\-O\fR and higher.
|
6792 |
|
|
.IP "\fB\-ftree\-switch\-conversion\fR" 4
|
6793 |
|
|
.IX Item "-ftree-switch-conversion"
|
6794 |
|
|
Perform conversion of simple initializations in a switch to
|
6795 |
|
|
initializations from a scalar array. This flag is enabled by default
|
6796 |
|
|
at \fB\-O2\fR and higher.
|
6797 |
|
|
.IP "\fB\-ftree\-tail\-merge\fR" 4
|
6798 |
|
|
.IX Item "-ftree-tail-merge"
|
6799 |
|
|
Look for identical code sequences. When found, replace one with a jump to the
|
6800 |
|
|
other. This optimization is known as tail merging or cross jumping. This flag
|
6801 |
|
|
is enabled by default at \fB\-O2\fR and higher. The compilation time
|
6802 |
|
|
in this pass can
|
6803 |
|
|
be limited using \fBmax-tail-merge-comparisons\fR parameter and
|
6804 |
|
|
\&\fBmax-tail-merge-iterations\fR parameter.
|
6805 |
|
|
.IP "\fB\-ftree\-dce\fR" 4
|
6806 |
|
|
.IX Item "-ftree-dce"
|
6807 |
|
|
Perform dead code elimination (\s-1DCE\s0) on trees. This flag is enabled by
|
6808 |
|
|
default at \fB\-O\fR and higher.
|
6809 |
|
|
.IP "\fB\-ftree\-builtin\-call\-dce\fR" 4
|
6810 |
|
|
.IX Item "-ftree-builtin-call-dce"
|
6811 |
|
|
Perform conditional dead code elimination (\s-1DCE\s0) for calls to built-in functions
|
6812 |
|
|
that may set \f(CW\*(C`errno\*(C'\fR but are otherwise side-effect free. This flag is
|
6813 |
|
|
enabled by default at \fB\-O2\fR and higher if \fB\-Os\fR is not also
|
6814 |
|
|
specified.
|
6815 |
|
|
.IP "\fB\-ftree\-dominator\-opts\fR" 4
|
6816 |
|
|
.IX Item "-ftree-dominator-opts"
|
6817 |
|
|
Perform a variety of simple scalar cleanups (constant/copy
|
6818 |
|
|
propagation, redundancy elimination, range propagation and expression
|
6819 |
|
|
simplification) based on a dominator tree traversal. This also
|
6820 |
|
|
performs jump threading (to reduce jumps to jumps). This flag is
|
6821 |
|
|
enabled by default at \fB\-O\fR and higher.
|
6822 |
|
|
.IP "\fB\-ftree\-dse\fR" 4
|
6823 |
|
|
.IX Item "-ftree-dse"
|
6824 |
|
|
Perform dead store elimination (\s-1DSE\s0) on trees. A dead store is a store into
|
6825 |
|
|
a memory location that is later overwritten by another store without
|
6826 |
|
|
any intervening loads. In this case the earlier store can be deleted. This
|
6827 |
|
|
flag is enabled by default at \fB\-O\fR and higher.
|
6828 |
|
|
.IP "\fB\-ftree\-ch\fR" 4
|
6829 |
|
|
.IX Item "-ftree-ch"
|
6830 |
|
|
Perform loop header copying on trees. This is beneficial since it increases
|
6831 |
|
|
effectiveness of code motion optimizations. It also saves one jump. This flag
|
6832 |
|
|
is enabled by default at \fB\-O\fR and higher. It is not enabled
|
6833 |
|
|
for \fB\-Os\fR, since it usually increases code size.
|
6834 |
|
|
.IP "\fB\-ftree\-loop\-optimize\fR" 4
|
6835 |
|
|
.IX Item "-ftree-loop-optimize"
|
6836 |
|
|
Perform loop optimizations on trees. This flag is enabled by default
|
6837 |
|
|
at \fB\-O\fR and higher.
|
6838 |
|
|
.IP "\fB\-ftree\-loop\-linear\fR" 4
|
6839 |
|
|
.IX Item "-ftree-loop-linear"
|
6840 |
|
|
Perform loop interchange transformations on tree. Same as
|
6841 |
|
|
\&\fB\-floop\-interchange\fR. To use this code transformation, \s-1GCC\s0 has
|
6842 |
|
|
to be configured with \fB\-\-with\-ppl\fR and \fB\-\-with\-cloog\fR to
|
6843 |
|
|
enable the Graphite loop transformation infrastructure.
|
6844 |
|
|
.IP "\fB\-floop\-interchange\fR" 4
|
6845 |
|
|
.IX Item "-floop-interchange"
|
6846 |
|
|
Perform loop interchange transformations on loops. Interchanging two
|
6847 |
|
|
nested loops switches the inner and outer loops. For example, given a
|
6848 |
|
|
loop like:
|
6849 |
|
|
.Sp
|
6850 |
|
|
.Vb 5
|
6851 |
|
|
\& DO J = 1, M
|
6852 |
|
|
\& DO I = 1, N
|
6853 |
|
|
\& A(J, I) = A(J, I) * C
|
6854 |
|
|
\& ENDDO
|
6855 |
|
|
\& ENDDO
|
6856 |
|
|
.Ve
|
6857 |
|
|
.Sp
|
6858 |
|
|
loop interchange transforms the loop as if it were written:
|
6859 |
|
|
.Sp
|
6860 |
|
|
.Vb 5
|
6861 |
|
|
\& DO I = 1, N
|
6862 |
|
|
\& DO J = 1, M
|
6863 |
|
|
\& A(J, I) = A(J, I) * C
|
6864 |
|
|
\& ENDDO
|
6865 |
|
|
\& ENDDO
|
6866 |
|
|
.Ve
|
6867 |
|
|
.Sp
|
6868 |
|
|
which can be beneficial when \f(CW\*(C`N\*(C'\fR is larger than the caches,
|
6869 |
|
|
because in Fortran, the elements of an array are stored in memory
|
6870 |
|
|
contiguously by column, and the original loop iterates over rows,
|
6871 |
|
|
potentially creating at each access a cache miss. This optimization
|
6872 |
|
|
applies to all the languages supported by \s-1GCC\s0 and is not limited to
|
6873 |
|
|
Fortran. To use this code transformation, \s-1GCC\s0 has to be configured
|
6874 |
|
|
with \fB\-\-with\-ppl\fR and \fB\-\-with\-cloog\fR to enable the
|
6875 |
|
|
Graphite loop transformation infrastructure.
|
6876 |
|
|
.IP "\fB\-floop\-strip\-mine\fR" 4
|
6877 |
|
|
.IX Item "-floop-strip-mine"
|
6878 |
|
|
Perform loop strip mining transformations on loops. Strip mining
|
6879 |
|
|
splits a loop into two nested loops. The outer loop has strides
|
6880 |
|
|
equal to the strip size and the inner loop has strides of the
|
6881 |
|
|
original loop within a strip. The strip length can be changed
|
6882 |
|
|
using the \fBloop-block-tile-size\fR parameter. For example,
|
6883 |
|
|
given a loop like:
|
6884 |
|
|
.Sp
|
6885 |
|
|
.Vb 3
|
6886 |
|
|
\& DO I = 1, N
|
6887 |
|
|
\& A(I) = A(I) + C
|
6888 |
|
|
\& ENDDO
|
6889 |
|
|
.Ve
|
6890 |
|
|
.Sp
|
6891 |
|
|
loop strip mining transforms the loop as if it were written:
|
6892 |
|
|
.Sp
|
6893 |
|
|
.Vb 5
|
6894 |
|
|
\& DO II = 1, N, 51
|
6895 |
|
|
\& DO I = II, min (II + 50, N)
|
6896 |
|
|
\& A(I) = A(I) + C
|
6897 |
|
|
\& ENDDO
|
6898 |
|
|
\& ENDDO
|
6899 |
|
|
.Ve
|
6900 |
|
|
.Sp
|
6901 |
|
|
This optimization applies to all the languages supported by \s-1GCC\s0 and is
|
6902 |
|
|
not limited to Fortran. To use this code transformation, \s-1GCC\s0 has to
|
6903 |
|
|
be configured with \fB\-\-with\-ppl\fR and \fB\-\-with\-cloog\fR to
|
6904 |
|
|
enable the Graphite loop transformation infrastructure.
|
6905 |
|
|
.IP "\fB\-floop\-block\fR" 4
|
6906 |
|
|
.IX Item "-floop-block"
|
6907 |
|
|
Perform loop blocking transformations on loops. Blocking strip mines
|
6908 |
|
|
each loop in the loop nest such that the memory accesses of the
|
6909 |
|
|
element loops fit inside caches. The strip length can be changed
|
6910 |
|
|
using the \fBloop-block-tile-size\fR parameter. For example, given
|
6911 |
|
|
a loop like:
|
6912 |
|
|
.Sp
|
6913 |
|
|
.Vb 5
|
6914 |
|
|
\& DO I = 1, N
|
6915 |
|
|
\& DO J = 1, M
|
6916 |
|
|
\& A(J, I) = B(I) + C(J)
|
6917 |
|
|
\& ENDDO
|
6918 |
|
|
\& ENDDO
|
6919 |
|
|
.Ve
|
6920 |
|
|
.Sp
|
6921 |
|
|
loop blocking transforms the loop as if it were written:
|
6922 |
|
|
.Sp
|
6923 |
|
|
.Vb 9
|
6924 |
|
|
\& DO II = 1, N, 51
|
6925 |
|
|
\& DO JJ = 1, M, 51
|
6926 |
|
|
\& DO I = II, min (II + 50, N)
|
6927 |
|
|
\& DO J = JJ, min (JJ + 50, M)
|
6928 |
|
|
\& A(J, I) = B(I) + C(J)
|
6929 |
|
|
\& ENDDO
|
6930 |
|
|
\& ENDDO
|
6931 |
|
|
\& ENDDO
|
6932 |
|
|
\& ENDDO
|
6933 |
|
|
.Ve
|
6934 |
|
|
.Sp
|
6935 |
|
|
which can be beneficial when \f(CW\*(C`M\*(C'\fR is larger than the caches,
|
6936 |
|
|
because the innermost loop iterates over a smaller amount of data
|
6937 |
|
|
which can be kept in the caches. This optimization applies to all the
|
6938 |
|
|
languages supported by \s-1GCC\s0 and is not limited to Fortran. To use this
|
6939 |
|
|
code transformation, \s-1GCC\s0 has to be configured with \fB\-\-with\-ppl\fR
|
6940 |
|
|
and \fB\-\-with\-cloog\fR to enable the Graphite loop transformation
|
6941 |
|
|
infrastructure.
|
6942 |
|
|
.IP "\fB\-fgraphite\-identity\fR" 4
|
6943 |
|
|
.IX Item "-fgraphite-identity"
|
6944 |
|
|
Enable the identity transformation for graphite. For every SCoP we generate
|
6945 |
|
|
the polyhedral representation and transform it back to gimple. Using
|
6946 |
|
|
\&\fB\-fgraphite\-identity\fR we can check the costs or benefits of the
|
6947 |
|
|
\&\s-1GIMPLE\s0 \-> \s-1GRAPHITE\s0 \-> \s-1GIMPLE\s0 transformation. Some minimal optimizations
|
6948 |
|
|
are also performed by the code generator CLooG, like index splitting and
|
6949 |
|
|
dead code elimination in loops.
|
6950 |
|
|
.IP "\fB\-floop\-nest\-optimize\fR" 4
|
6951 |
|
|
.IX Item "-floop-nest-optimize"
|
6952 |
|
|
Enable the \s-1ISL\s0 based loop nest optimizer. This is a generic loop nest
|
6953 |
|
|
optimizer based on the Pluto optimization algorithms. It calculates a loop
|
6954 |
|
|
structure optimized for data-locality and parallelism. This option
|
6955 |
|
|
is experimental.
|
6956 |
|
|
.IP "\fB\-floop\-parallelize\-all\fR" 4
|
6957 |
|
|
.IX Item "-floop-parallelize-all"
|
6958 |
|
|
Use the Graphite data dependence analysis to identify loops that can
|
6959 |
|
|
be parallelized. Parallelize all the loops that can be analyzed to
|
6960 |
|
|
not contain loop carried dependences without checking that it is
|
6961 |
|
|
profitable to parallelize the loops.
|
6962 |
|
|
.IP "\fB\-fcheck\-data\-deps\fR" 4
|
6963 |
|
|
.IX Item "-fcheck-data-deps"
|
6964 |
|
|
Compare the results of several data dependence analyzers. This option
|
6965 |
|
|
is used for debugging the data dependence analyzers.
|
6966 |
|
|
.IP "\fB\-ftree\-loop\-if\-convert\fR" 4
|
6967 |
|
|
.IX Item "-ftree-loop-if-convert"
|
6968 |
|
|
Attempt to transform conditional jumps in the innermost loops to
|
6969 |
|
|
branch-less equivalents. The intent is to remove control-flow from
|
6970 |
|
|
the innermost loops in order to improve the ability of the
|
6971 |
|
|
vectorization pass to handle these loops. This is enabled by default
|
6972 |
|
|
if vectorization is enabled.
|
6973 |
|
|
.IP "\fB\-ftree\-loop\-if\-convert\-stores\fR" 4
|
6974 |
|
|
.IX Item "-ftree-loop-if-convert-stores"
|
6975 |
|
|
Attempt to also if-convert conditional jumps containing memory writes.
|
6976 |
|
|
This transformation can be unsafe for multi-threaded programs as it
|
6977 |
|
|
transforms conditional memory writes into unconditional memory writes.
|
6978 |
|
|
For example,
|
6979 |
|
|
.Sp
|
6980 |
|
|
.Vb 3
|
6981 |
|
|
\& for (i = 0; i < N; i++)
|
6982 |
|
|
\& if (cond)
|
6983 |
|
|
\& A[i] = expr;
|
6984 |
|
|
.Ve
|
6985 |
|
|
.Sp
|
6986 |
|
|
is transformed to
|
6987 |
|
|
.Sp
|
6988 |
|
|
.Vb 2
|
6989 |
|
|
\& for (i = 0; i < N; i++)
|
6990 |
|
|
\& A[i] = cond ? expr : A[i];
|
6991 |
|
|
.Ve
|
6992 |
|
|
.Sp
|
6993 |
|
|
potentially producing data races.
|
6994 |
|
|
.IP "\fB\-ftree\-loop\-distribution\fR" 4
|
6995 |
|
|
.IX Item "-ftree-loop-distribution"
|
6996 |
|
|
Perform loop distribution. This flag can improve cache performance on
|
6997 |
|
|
big loop bodies and allow further loop optimizations, like
|
6998 |
|
|
parallelization or vectorization, to take place. For example, the loop
|
6999 |
|
|
.Sp
|
7000 |
|
|
.Vb 4
|
7001 |
|
|
\& DO I = 1, N
|
7002 |
|
|
\& A(I) = B(I) + C
|
7003 |
|
|
\& D(I) = E(I) * F
|
7004 |
|
|
\& ENDDO
|
7005 |
|
|
.Ve
|
7006 |
|
|
.Sp
|
7007 |
|
|
is transformed to
|
7008 |
|
|
.Sp
|
7009 |
|
|
.Vb 6
|
7010 |
|
|
\& DO I = 1, N
|
7011 |
|
|
\& A(I) = B(I) + C
|
7012 |
|
|
\& ENDDO
|
7013 |
|
|
\& DO I = 1, N
|
7014 |
|
|
\& D(I) = E(I) * F
|
7015 |
|
|
\& ENDDO
|
7016 |
|
|
.Ve
|
7017 |
|
|
.IP "\fB\-ftree\-loop\-distribute\-patterns\fR" 4
|
7018 |
|
|
.IX Item "-ftree-loop-distribute-patterns"
|
7019 |
|
|
Perform loop distribution of patterns that can be code generated with
|
7020 |
|
|
calls to a library. This flag is enabled by default at \fB\-O3\fR.
|
7021 |
|
|
.Sp
|
7022 |
|
|
This pass distributes the initialization loops and generates a call to
|
7023 |
|
|
memset zero. For example, the loop
|
7024 |
|
|
.Sp
|
7025 |
|
|
.Vb 4
|
7026 |
|
|
\& DO I = 1, N
|
7027 |
|
|
\& A(I) = 0
|
7028 |
|
|
\& B(I) = A(I) + I
|
7029 |
|
|
\& ENDDO
|
7030 |
|
|
.Ve
|
7031 |
|
|
.Sp
|
7032 |
|
|
is transformed to
|
7033 |
|
|
.Sp
|
7034 |
|
|
.Vb 6
|
7035 |
|
|
\& DO I = 1, N
|
7036 |
|
|
\& A(I) = 0
|
7037 |
|
|
\& ENDDO
|
7038 |
|
|
\& DO I = 1, N
|
7039 |
|
|
\& B(I) = A(I) + I
|
7040 |
|
|
\& ENDDO
|
7041 |
|
|
.Ve
|
7042 |
|
|
.Sp
|
7043 |
|
|
and the initialization loop is transformed into a call to memset zero.
|
7044 |
|
|
.IP "\fB\-ftree\-loop\-im\fR" 4
|
7045 |
|
|
.IX Item "-ftree-loop-im"
|
7046 |
|
|
Perform loop invariant motion on trees. This pass moves only invariants that
|
7047 |
|
|
are hard to handle at \s-1RTL\s0 level (function calls, operations that expand to
|
7048 |
|
|
nontrivial sequences of insns). With \fB\-funswitch\-loops\fR it also moves
|
7049 |
|
|
operands of conditions that are invariant out of the loop, so that we can use
|
7050 |
|
|
just trivial invariantness analysis in loop unswitching. The pass also includes
|
7051 |
|
|
store motion.
|
7052 |
|
|
.IP "\fB\-ftree\-loop\-ivcanon\fR" 4
|
7053 |
|
|
.IX Item "-ftree-loop-ivcanon"
|
7054 |
|
|
Create a canonical counter for number of iterations in loops for which
|
7055 |
|
|
determining number of iterations requires complicated analysis. Later
|
7056 |
|
|
optimizations then may determine the number easily. Useful especially
|
7057 |
|
|
in connection with unrolling.
|
7058 |
|
|
.IP "\fB\-fivopts\fR" 4
|
7059 |
|
|
.IX Item "-fivopts"
|
7060 |
|
|
Perform induction variable optimizations (strength reduction, induction
|
7061 |
|
|
variable merging and induction variable elimination) on trees.
|
7062 |
|
|
.IP "\fB\-ftree\-parallelize\-loops=n\fR" 4
|
7063 |
|
|
.IX Item "-ftree-parallelize-loops=n"
|
7064 |
|
|
Parallelize loops, i.e., split their iteration space to run in n threads.
|
7065 |
|
|
This is only possible for loops whose iterations are independent
|
7066 |
|
|
and can be arbitrarily reordered. The optimization is only
|
7067 |
|
|
profitable on multiprocessor machines, for loops that are CPU-intensive,
|
7068 |
|
|
rather than constrained e.g. by memory bandwidth. This option
|
7069 |
|
|
implies \fB\-pthread\fR, and thus is only supported on targets
|
7070 |
|
|
that have support for \fB\-pthread\fR.
|
7071 |
|
|
.IP "\fB\-ftree\-pta\fR" 4
|
7072 |
|
|
.IX Item "-ftree-pta"
|
7073 |
|
|
Perform function-local points-to analysis on trees. This flag is
|
7074 |
|
|
enabled by default at \fB\-O\fR and higher.
|
7075 |
|
|
.IP "\fB\-ftree\-sra\fR" 4
|
7076 |
|
|
.IX Item "-ftree-sra"
|
7077 |
|
|
Perform scalar replacement of aggregates. This pass replaces structure
|
7078 |
|
|
references with scalars to prevent committing structures to memory too
|
7079 |
|
|
early. This flag is enabled by default at \fB\-O\fR and higher.
|
7080 |
|
|
.IP "\fB\-ftree\-copyrename\fR" 4
|
7081 |
|
|
.IX Item "-ftree-copyrename"
|
7082 |
|
|
Perform copy renaming on trees. This pass attempts to rename compiler
|
7083 |
|
|
temporaries to other variables at copy locations, usually resulting in
|
7084 |
|
|
variable names which more closely resemble the original variables. This flag
|
7085 |
|
|
is enabled by default at \fB\-O\fR and higher.
|
7086 |
|
|
.IP "\fB\-ftree\-coalesce\-inlined\-vars\fR" 4
|
7087 |
|
|
.IX Item "-ftree-coalesce-inlined-vars"
|
7088 |
|
|
Tell the copyrename pass (see \fB\-ftree\-copyrename\fR) to attempt to
|
7089 |
|
|
combine small user-defined variables too, but only if they were inlined
|
7090 |
|
|
from other functions. It is a more limited form of
|
7091 |
|
|
\&\fB\-ftree\-coalesce\-vars\fR. This may harm debug information of such
|
7092 |
|
|
inlined variables, but it will keep variables of the inlined-into
|
7093 |
|
|
function apart from each other, such that they are more likely to
|
7094 |
|
|
contain the expected values in a debugging session. This was the
|
7095 |
|
|
default in \s-1GCC\s0 versions older than 4.7.
|
7096 |
|
|
.IP "\fB\-ftree\-coalesce\-vars\fR" 4
|
7097 |
|
|
.IX Item "-ftree-coalesce-vars"
|
7098 |
|
|
Tell the copyrename pass (see \fB\-ftree\-copyrename\fR) to attempt to
|
7099 |
|
|
combine small user-defined variables too, instead of just compiler
|
7100 |
|
|
temporaries. This may severely limit the ability to debug an optimized
|
7101 |
|
|
program compiled with \fB\-fno\-var\-tracking\-assignments\fR. In the
|
7102 |
|
|
negated form, this flag prevents \s-1SSA\s0 coalescing of user variables,
|
7103 |
|
|
including inlined ones. This option is enabled by default.
|
7104 |
|
|
.IP "\fB\-ftree\-ter\fR" 4
|
7105 |
|
|
.IX Item "-ftree-ter"
|
7106 |
|
|
Perform temporary expression replacement during the \s-1SSA\-\s0>normal phase. Single
|
7107 |
|
|
use/single def temporaries are replaced at their use location with their
|
7108 |
|
|
defining expression. This results in non-GIMPLE code, but gives the expanders
|
7109 |
|
|
much more complex trees to work on resulting in better \s-1RTL\s0 generation. This is
|
7110 |
|
|
enabled by default at \fB\-O\fR and higher.
|
7111 |
|
|
.IP "\fB\-ftree\-slsr\fR" 4
|
7112 |
|
|
.IX Item "-ftree-slsr"
|
7113 |
|
|
Perform straight-line strength reduction on trees. This recognizes related
|
7114 |
|
|
expressions involving multiplications and replaces them by less expensive
|
7115 |
|
|
calculations when possible. This is enabled by default at \fB\-O\fR and
|
7116 |
|
|
higher.
|
7117 |
|
|
.IP "\fB\-ftree\-vectorize\fR" 4
|
7118 |
|
|
.IX Item "-ftree-vectorize"
|
7119 |
|
|
Perform loop vectorization on trees. This flag is enabled by default at
|
7120 |
|
|
\&\fB\-O3\fR.
|
7121 |
|
|
.IP "\fB\-ftree\-slp\-vectorize\fR" 4
|
7122 |
|
|
.IX Item "-ftree-slp-vectorize"
|
7123 |
|
|
Perform basic block vectorization on trees. This flag is enabled by default at
|
7124 |
|
|
\&\fB\-O3\fR and when \fB\-ftree\-vectorize\fR is enabled.
|
7125 |
|
|
.IP "\fB\-ftree\-vect\-loop\-version\fR" 4
|
7126 |
|
|
.IX Item "-ftree-vect-loop-version"
|
7127 |
|
|
Perform loop versioning when doing loop vectorization on trees. When a loop
|
7128 |
|
|
appears to be vectorizable except that data alignment or data dependence cannot
|
7129 |
|
|
be determined at compile time, then vectorized and non-vectorized versions of
|
7130 |
|
|
the loop are generated along with run-time checks for alignment or dependence
|
7131 |
|
|
to control which version is executed. This option is enabled by default
|
7132 |
|
|
except at level \fB\-Os\fR where it is disabled.
|
7133 |
|
|
.IP "\fB\-fvect\-cost\-model\fR" 4
|
7134 |
|
|
.IX Item "-fvect-cost-model"
|
7135 |
|
|
Enable cost model for vectorization. This option is enabled by default at
|
7136 |
|
|
\&\fB\-O3\fR.
|
7137 |
|
|
.IP "\fB\-ftree\-vrp\fR" 4
|
7138 |
|
|
.IX Item "-ftree-vrp"
|
7139 |
|
|
Perform Value Range Propagation on trees. This is similar to the
|
7140 |
|
|
constant propagation pass, but instead of values, ranges of values are
|
7141 |
|
|
propagated. This allows the optimizers to remove unnecessary range
|
7142 |
|
|
checks like array bound checks and null pointer checks. This is
|
7143 |
|
|
enabled by default at \fB\-O2\fR and higher. Null pointer check
|
7144 |
|
|
elimination is only done if \fB\-fdelete\-null\-pointer\-checks\fR is
|
7145 |
|
|
enabled.
|
7146 |
|
|
.IP "\fB\-ftracer\fR" 4
|
7147 |
|
|
.IX Item "-ftracer"
|
7148 |
|
|
Perform tail duplication to enlarge superblock size. This transformation
|
7149 |
|
|
simplifies the control flow of the function allowing other optimizations to do
|
7150 |
|
|
a better job.
|
7151 |
|
|
.IP "\fB\-funroll\-loops\fR" 4
|
7152 |
|
|
.IX Item "-funroll-loops"
|
7153 |
|
|
Unroll loops whose number of iterations can be determined at compile
|
7154 |
|
|
time or upon entry to the loop. \fB\-funroll\-loops\fR implies
|
7155 |
|
|
\&\fB\-frerun\-cse\-after\-loop\fR. This option makes code larger,
|
7156 |
|
|
and may or may not make it run faster.
|
7157 |
|
|
.IP "\fB\-funroll\-all\-loops\fR" 4
|
7158 |
|
|
.IX Item "-funroll-all-loops"
|
7159 |
|
|
Unroll all loops, even if their number of iterations is uncertain when
|
7160 |
|
|
the loop is entered. This usually makes programs run more slowly.
|
7161 |
|
|
\&\fB\-funroll\-all\-loops\fR implies the same options as
|
7162 |
|
|
\&\fB\-funroll\-loops\fR,
|
7163 |
|
|
.IP "\fB\-fsplit\-ivs\-in\-unroller\fR" 4
|
7164 |
|
|
.IX Item "-fsplit-ivs-in-unroller"
|
7165 |
|
|
Enables expression of values of induction variables in later iterations
|
7166 |
|
|
of the unrolled loop using the value in the first iteration. This breaks
|
7167 |
|
|
long dependency chains, thus improving efficiency of the scheduling passes.
|
7168 |
|
|
.Sp
|
7169 |
|
|
A combination of \fB\-fweb\fR and \s-1CSE\s0 is often sufficient to obtain the
|
7170 |
|
|
same effect. However, that is not reliable in cases where the loop body
|
7171 |
|
|
is more complicated than a single basic block. It also does not work at all
|
7172 |
|
|
on some architectures due to restrictions in the \s-1CSE\s0 pass.
|
7173 |
|
|
.Sp
|
7174 |
|
|
This optimization is enabled by default.
|
7175 |
|
|
.IP "\fB\-fvariable\-expansion\-in\-unroller\fR" 4
|
7176 |
|
|
.IX Item "-fvariable-expansion-in-unroller"
|
7177 |
|
|
With this option, the compiler creates multiple copies of some
|
7178 |
|
|
local variables when unrolling a loop, which can result in superior code.
|
7179 |
|
|
.IP "\fB\-fpartial\-inlining\fR" 4
|
7180 |
|
|
.IX Item "-fpartial-inlining"
|
7181 |
|
|
Inline parts of functions. This option has any effect only
|
7182 |
|
|
when inlining itself is turned on by the \fB\-finline\-functions\fR
|
7183 |
|
|
or \fB\-finline\-small\-functions\fR options.
|
7184 |
|
|
.Sp
|
7185 |
|
|
Enabled at level \fB\-O2\fR.
|
7186 |
|
|
.IP "\fB\-fpredictive\-commoning\fR" 4
|
7187 |
|
|
.IX Item "-fpredictive-commoning"
|
7188 |
|
|
Perform predictive commoning optimization, i.e., reusing computations
|
7189 |
|
|
(especially memory loads and stores) performed in previous
|
7190 |
|
|
iterations of loops.
|
7191 |
|
|
.Sp
|
7192 |
|
|
This option is enabled at level \fB\-O3\fR.
|
7193 |
|
|
.IP "\fB\-fprefetch\-loop\-arrays\fR" 4
|
7194 |
|
|
.IX Item "-fprefetch-loop-arrays"
|
7195 |
|
|
If supported by the target machine, generate instructions to prefetch
|
7196 |
|
|
memory to improve the performance of loops that access large arrays.
|
7197 |
|
|
.Sp
|
7198 |
|
|
This option may generate better or worse code; results are highly
|
7199 |
|
|
dependent on the structure of loops within the source code.
|
7200 |
|
|
.Sp
|
7201 |
|
|
Disabled at level \fB\-Os\fR.
|
7202 |
|
|
.IP "\fB\-fno\-peephole\fR" 4
|
7203 |
|
|
.IX Item "-fno-peephole"
|
7204 |
|
|
.PD 0
|
7205 |
|
|
.IP "\fB\-fno\-peephole2\fR" 4
|
7206 |
|
|
.IX Item "-fno-peephole2"
|
7207 |
|
|
.PD
|
7208 |
|
|
Disable any machine-specific peephole optimizations. The difference
|
7209 |
|
|
between \fB\-fno\-peephole\fR and \fB\-fno\-peephole2\fR is in how they
|
7210 |
|
|
are implemented in the compiler; some targets use one, some use the
|
7211 |
|
|
other, a few use both.
|
7212 |
|
|
.Sp
|
7213 |
|
|
\&\fB\-fpeephole\fR is enabled by default.
|
7214 |
|
|
\&\fB\-fpeephole2\fR enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
7215 |
|
|
.IP "\fB\-fno\-guess\-branch\-probability\fR" 4
|
7216 |
|
|
.IX Item "-fno-guess-branch-probability"
|
7217 |
|
|
Do not guess branch probabilities using heuristics.
|
7218 |
|
|
.Sp
|
7219 |
|
|
\&\s-1GCC\s0 uses heuristics to guess branch probabilities if they are
|
7220 |
|
|
not provided by profiling feedback (\fB\-fprofile\-arcs\fR). These
|
7221 |
|
|
heuristics are based on the control flow graph. If some branch probabilities
|
7222 |
|
|
are specified by \fB_\|_builtin_expect\fR, then the heuristics are
|
7223 |
|
|
used to guess branch probabilities for the rest of the control flow graph,
|
7224 |
|
|
taking the \fB_\|_builtin_expect\fR info into account. The interactions
|
7225 |
|
|
between the heuristics and \fB_\|_builtin_expect\fR can be complex, and in
|
7226 |
|
|
some cases, it may be useful to disable the heuristics so that the effects
|
7227 |
|
|
of \fB_\|_builtin_expect\fR are easier to understand.
|
7228 |
|
|
.Sp
|
7229 |
|
|
The default is \fB\-fguess\-branch\-probability\fR at levels
|
7230 |
|
|
\&\fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
7231 |
|
|
.IP "\fB\-freorder\-blocks\fR" 4
|
7232 |
|
|
.IX Item "-freorder-blocks"
|
7233 |
|
|
Reorder basic blocks in the compiled function in order to reduce number of
|
7234 |
|
|
taken branches and improve code locality.
|
7235 |
|
|
.Sp
|
7236 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
|
7237 |
|
|
.IP "\fB\-freorder\-blocks\-and\-partition\fR" 4
|
7238 |
|
|
.IX Item "-freorder-blocks-and-partition"
|
7239 |
|
|
In addition to reordering basic blocks in the compiled function, in order
|
7240 |
|
|
to reduce number of taken branches, partitions hot and cold basic blocks
|
7241 |
|
|
into separate sections of the assembly and .o files, to improve
|
7242 |
|
|
paging and cache locality performance.
|
7243 |
|
|
.Sp
|
7244 |
|
|
This optimization is automatically turned off in the presence of
|
7245 |
|
|
exception handling, for linkonce sections, for functions with a user-defined
|
7246 |
|
|
section attribute and on any architecture that does not support named
|
7247 |
|
|
sections.
|
7248 |
|
|
.IP "\fB\-freorder\-functions\fR" 4
|
7249 |
|
|
.IX Item "-freorder-functions"
|
7250 |
|
|
Reorder functions in the object file in order to
|
7251 |
|
|
improve code locality. This is implemented by using special
|
7252 |
|
|
subsections \f(CW\*(C`.text.hot\*(C'\fR for most frequently executed functions and
|
7253 |
|
|
\&\f(CW\*(C`.text.unlikely\*(C'\fR for unlikely executed functions. Reordering is done by
|
7254 |
|
|
the linker so object file format must support named sections and linker must
|
7255 |
|
|
place them in a reasonable way.
|
7256 |
|
|
.Sp
|
7257 |
|
|
Also profile feedback must be available to make this option effective. See
|
7258 |
|
|
\&\fB\-fprofile\-arcs\fR for details.
|
7259 |
|
|
.Sp
|
7260 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
7261 |
|
|
.IP "\fB\-fstrict\-aliasing\fR" 4
|
7262 |
|
|
.IX Item "-fstrict-aliasing"
|
7263 |
|
|
Allow the compiler to assume the strictest aliasing rules applicable to
|
7264 |
|
|
the language being compiled. For C (and \*(C+), this activates
|
7265 |
|
|
optimizations based on the type of expressions. In particular, an
|
7266 |
|
|
object of one type is assumed never to reside at the same address as an
|
7267 |
|
|
object of a different type, unless the types are almost the same. For
|
7268 |
|
|
example, an \f(CW\*(C`unsigned int\*(C'\fR can alias an \f(CW\*(C`int\*(C'\fR, but not a
|
7269 |
|
|
\&\f(CW\*(C`void*\*(C'\fR or a \f(CW\*(C`double\*(C'\fR. A character type may alias any other
|
7270 |
|
|
type.
|
7271 |
|
|
.Sp
|
7272 |
|
|
Pay special attention to code like this:
|
7273 |
|
|
.Sp
|
7274 |
|
|
.Vb 4
|
7275 |
|
|
\& union a_union {
|
7276 |
|
|
\& int i;
|
7277 |
|
|
\& double d;
|
7278 |
|
|
\& };
|
7279 |
|
|
\&
|
7280 |
|
|
\& int f() {
|
7281 |
|
|
\& union a_union t;
|
7282 |
|
|
\& t.d = 3.0;
|
7283 |
|
|
\& return t.i;
|
7284 |
|
|
\& }
|
7285 |
|
|
.Ve
|
7286 |
|
|
.Sp
|
7287 |
|
|
The practice of reading from a different union member than the one most
|
7288 |
|
|
recently written to (called \*(L"type-punning\*(R") is common. Even with
|
7289 |
|
|
\&\fB\-fstrict\-aliasing\fR, type-punning is allowed, provided the memory
|
7290 |
|
|
is accessed through the union type. So, the code above works as
|
7291 |
|
|
expected. However, this code might not:
|
7292 |
|
|
.Sp
|
7293 |
|
|
.Vb 7
|
7294 |
|
|
\& int f() {
|
7295 |
|
|
\& union a_union t;
|
7296 |
|
|
\& int* ip;
|
7297 |
|
|
\& t.d = 3.0;
|
7298 |
|
|
\& ip = &t.i;
|
7299 |
|
|
\& return *ip;
|
7300 |
|
|
\& }
|
7301 |
|
|
.Ve
|
7302 |
|
|
.Sp
|
7303 |
|
|
Similarly, access by taking the address, casting the resulting pointer
|
7304 |
|
|
and dereferencing the result has undefined behavior, even if the cast
|
7305 |
|
|
uses a union type, e.g.:
|
7306 |
|
|
.Sp
|
7307 |
|
|
.Vb 4
|
7308 |
|
|
\& int f() {
|
7309 |
|
|
\& double d = 3.0;
|
7310 |
|
|
\& return ((union a_union *) &d)\->i;
|
7311 |
|
|
\& }
|
7312 |
|
|
.Ve
|
7313 |
|
|
.Sp
|
7314 |
|
|
The \fB\-fstrict\-aliasing\fR option is enabled at levels
|
7315 |
|
|
\&\fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
7316 |
|
|
.IP "\fB\-fstrict\-overflow\fR" 4
|
7317 |
|
|
.IX Item "-fstrict-overflow"
|
7318 |
|
|
Allow the compiler to assume strict signed overflow rules, depending
|
7319 |
|
|
on the language being compiled. For C (and \*(C+) this means that
|
7320 |
|
|
overflow when doing arithmetic with signed numbers is undefined, which
|
7321 |
|
|
means that the compiler may assume that it does not happen. This
|
7322 |
|
|
permits various optimizations. For example, the compiler assumes
|
7323 |
|
|
that an expression like \f(CW\*(C`i + 10 > i\*(C'\fR is always true for
|
7324 |
|
|
signed \f(CW\*(C`i\*(C'\fR. This assumption is only valid if signed overflow is
|
7325 |
|
|
undefined, as the expression is false if \f(CW\*(C`i + 10\*(C'\fR overflows when
|
7326 |
|
|
using twos complement arithmetic. When this option is in effect any
|
7327 |
|
|
attempt to determine whether an operation on signed numbers
|
7328 |
|
|
overflows must be written carefully to not actually involve overflow.
|
7329 |
|
|
.Sp
|
7330 |
|
|
This option also allows the compiler to assume strict pointer
|
7331 |
|
|
semantics: given a pointer to an object, if adding an offset to that
|
7332 |
|
|
pointer does not produce a pointer to the same object, the addition is
|
7333 |
|
|
undefined. This permits the compiler to conclude that \f(CW\*(C`p + u >
|
7334 |
|
|
p\*(C'\fR is always true for a pointer \f(CW\*(C`p\*(C'\fR and unsigned integer
|
7335 |
|
|
\&\f(CW\*(C`u\*(C'\fR. This assumption is only valid because pointer wraparound is
|
7336 |
|
|
undefined, as the expression is false if \f(CW\*(C`p + u\*(C'\fR overflows using
|
7337 |
|
|
twos complement arithmetic.
|
7338 |
|
|
.Sp
|
7339 |
|
|
See also the \fB\-fwrapv\fR option. Using \fB\-fwrapv\fR means
|
7340 |
|
|
that integer signed overflow is fully defined: it wraps. When
|
7341 |
|
|
\&\fB\-fwrapv\fR is used, there is no difference between
|
7342 |
|
|
\&\fB\-fstrict\-overflow\fR and \fB\-fno\-strict\-overflow\fR for
|
7343 |
|
|
integers. With \fB\-fwrapv\fR certain types of overflow are
|
7344 |
|
|
permitted. For example, if the compiler gets an overflow when doing
|
7345 |
|
|
arithmetic on constants, the overflowed value can still be used with
|
7346 |
|
|
\&\fB\-fwrapv\fR, but not otherwise.
|
7347 |
|
|
.Sp
|
7348 |
|
|
The \fB\-fstrict\-overflow\fR option is enabled at levels
|
7349 |
|
|
\&\fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
7350 |
|
|
.IP "\fB\-falign\-functions\fR" 4
|
7351 |
|
|
.IX Item "-falign-functions"
|
7352 |
|
|
.PD 0
|
7353 |
|
|
.IP "\fB\-falign\-functions=\fR\fIn\fR" 4
|
7354 |
|
|
.IX Item "-falign-functions=n"
|
7355 |
|
|
.PD
|
7356 |
|
|
Align the start of functions to the next power-of-two greater than
|
7357 |
|
|
\&\fIn\fR, skipping up to \fIn\fR bytes. For instance,
|
7358 |
|
|
\&\fB\-falign\-functions=32\fR aligns functions to the next 32\-byte
|
7359 |
|
|
boundary, but \fB\-falign\-functions=24\fR aligns to the next
|
7360 |
|
|
32\-byte boundary only if this can be done by skipping 23 bytes or less.
|
7361 |
|
|
.Sp
|
7362 |
|
|
\&\fB\-fno\-align\-functions\fR and \fB\-falign\-functions=1\fR are
|
7363 |
|
|
equivalent and mean that functions are not aligned.
|
7364 |
|
|
.Sp
|
7365 |
|
|
Some assemblers only support this flag when \fIn\fR is a power of two;
|
7366 |
|
|
in that case, it is rounded up.
|
7367 |
|
|
.Sp
|
7368 |
|
|
If \fIn\fR is not specified or is zero, use a machine-dependent default.
|
7369 |
|
|
.Sp
|
7370 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
|
7371 |
|
|
.IP "\fB\-falign\-labels\fR" 4
|
7372 |
|
|
.IX Item "-falign-labels"
|
7373 |
|
|
.PD 0
|
7374 |
|
|
.IP "\fB\-falign\-labels=\fR\fIn\fR" 4
|
7375 |
|
|
.IX Item "-falign-labels=n"
|
7376 |
|
|
.PD
|
7377 |
|
|
Align all branch targets to a power-of-two boundary, skipping up to
|
7378 |
|
|
\&\fIn\fR bytes like \fB\-falign\-functions\fR. This option can easily
|
7379 |
|
|
make code slower, because it must insert dummy operations for when the
|
7380 |
|
|
branch target is reached in the usual flow of the code.
|
7381 |
|
|
.Sp
|
7382 |
|
|
\&\fB\-fno\-align\-labels\fR and \fB\-falign\-labels=1\fR are
|
7383 |
|
|
equivalent and mean that labels are not aligned.
|
7384 |
|
|
.Sp
|
7385 |
|
|
If \fB\-falign\-loops\fR or \fB\-falign\-jumps\fR are applicable and
|
7386 |
|
|
are greater than this value, then their values are used instead.
|
7387 |
|
|
.Sp
|
7388 |
|
|
If \fIn\fR is not specified or is zero, use a machine-dependent default
|
7389 |
|
|
which is very likely to be \fB1\fR, meaning no alignment.
|
7390 |
|
|
.Sp
|
7391 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
|
7392 |
|
|
.IP "\fB\-falign\-loops\fR" 4
|
7393 |
|
|
.IX Item "-falign-loops"
|
7394 |
|
|
.PD 0
|
7395 |
|
|
.IP "\fB\-falign\-loops=\fR\fIn\fR" 4
|
7396 |
|
|
.IX Item "-falign-loops=n"
|
7397 |
|
|
.PD
|
7398 |
|
|
Align loops to a power-of-two boundary, skipping up to \fIn\fR bytes
|
7399 |
|
|
like \fB\-falign\-functions\fR. If the loops are
|
7400 |
|
|
executed many times, this makes up for any execution of the dummy
|
7401 |
|
|
operations.
|
7402 |
|
|
.Sp
|
7403 |
|
|
\&\fB\-fno\-align\-loops\fR and \fB\-falign\-loops=1\fR are
|
7404 |
|
|
equivalent and mean that loops are not aligned.
|
7405 |
|
|
.Sp
|
7406 |
|
|
If \fIn\fR is not specified or is zero, use a machine-dependent default.
|
7407 |
|
|
.Sp
|
7408 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
|
7409 |
|
|
.IP "\fB\-falign\-jumps\fR" 4
|
7410 |
|
|
.IX Item "-falign-jumps"
|
7411 |
|
|
.PD 0
|
7412 |
|
|
.IP "\fB\-falign\-jumps=\fR\fIn\fR" 4
|
7413 |
|
|
.IX Item "-falign-jumps=n"
|
7414 |
|
|
.PD
|
7415 |
|
|
Align branch targets to a power-of-two boundary, for branch targets
|
7416 |
|
|
where the targets can only be reached by jumping, skipping up to \fIn\fR
|
7417 |
|
|
bytes like \fB\-falign\-functions\fR. In this case, no dummy operations
|
7418 |
|
|
need be executed.
|
7419 |
|
|
.Sp
|
7420 |
|
|
\&\fB\-fno\-align\-jumps\fR and \fB\-falign\-jumps=1\fR are
|
7421 |
|
|
equivalent and mean that loops are not aligned.
|
7422 |
|
|
.Sp
|
7423 |
|
|
If \fIn\fR is not specified or is zero, use a machine-dependent default.
|
7424 |
|
|
.Sp
|
7425 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
|
7426 |
|
|
.IP "\fB\-funit\-at\-a\-time\fR" 4
|
7427 |
|
|
.IX Item "-funit-at-a-time"
|
7428 |
|
|
This option is left for compatibility reasons. \fB\-funit\-at\-a\-time\fR
|
7429 |
|
|
has no effect, while \fB\-fno\-unit\-at\-a\-time\fR implies
|
7430 |
|
|
\&\fB\-fno\-toplevel\-reorder\fR and \fB\-fno\-section\-anchors\fR.
|
7431 |
|
|
.Sp
|
7432 |
|
|
Enabled by default.
|
7433 |
|
|
.IP "\fB\-fno\-toplevel\-reorder\fR" 4
|
7434 |
|
|
.IX Item "-fno-toplevel-reorder"
|
7435 |
|
|
Do not reorder top-level functions, variables, and \f(CW\*(C`asm\*(C'\fR
|
7436 |
|
|
statements. Output them in the same order that they appear in the
|
7437 |
|
|
input file. When this option is used, unreferenced static variables
|
7438 |
|
|
are not removed. This option is intended to support existing code
|
7439 |
|
|
that relies on a particular ordering. For new code, it is better to
|
7440 |
|
|
use attributes.
|
7441 |
|
|
.Sp
|
7442 |
|
|
Enabled at level \fB\-O0\fR. When disabled explicitly, it also implies
|
7443 |
|
|
\&\fB\-fno\-section\-anchors\fR, which is otherwise enabled at \fB\-O0\fR on some
|
7444 |
|
|
targets.
|
7445 |
|
|
.IP "\fB\-fweb\fR" 4
|
7446 |
|
|
.IX Item "-fweb"
|
7447 |
|
|
Constructs webs as commonly used for register allocation purposes and assign
|
7448 |
|
|
each web individual pseudo register. This allows the register allocation pass
|
7449 |
|
|
to operate on pseudos directly, but also strengthens several other optimization
|
7450 |
|
|
passes, such as \s-1CSE\s0, loop optimizer and trivial dead code remover. It can,
|
7451 |
|
|
however, make debugging impossible, since variables no longer stay in a
|
7452 |
|
|
\&\*(L"home register\*(R".
|
7453 |
|
|
.Sp
|
7454 |
|
|
Enabled by default with \fB\-funroll\-loops\fR.
|
7455 |
|
|
.IP "\fB\-fwhole\-program\fR" 4
|
7456 |
|
|
.IX Item "-fwhole-program"
|
7457 |
|
|
Assume that the current compilation unit represents the whole program being
|
7458 |
|
|
compiled. All public functions and variables with the exception of \f(CW\*(C`main\*(C'\fR
|
7459 |
|
|
and those merged by attribute \f(CW\*(C`externally_visible\*(C'\fR become static functions
|
7460 |
|
|
and in effect are optimized more aggressively by interprocedural optimizers. If \fBgold\fR is used as the linker plugin, \f(CW\*(C`externally_visible\*(C'\fR attributes are automatically added to functions (not variable yet due to a current \fBgold\fR issue) that are accessed outside of \s-1LTO\s0 objects according to resolution file produced by \fBgold\fR. For other linkers that cannot generate resolution file, explicit \f(CW\*(C`externally_visible\*(C'\fR attributes are still necessary.
|
7461 |
|
|
While this option is equivalent to proper use of the \f(CW\*(C`static\*(C'\fR keyword for
|
7462 |
|
|
programs consisting of a single file, in combination with option
|
7463 |
|
|
\&\fB\-flto\fR this flag can be used to
|
7464 |
|
|
compile many smaller scale programs since the functions and variables become
|
7465 |
|
|
local for the whole combined compilation unit, not for the single source file
|
7466 |
|
|
itself.
|
7467 |
|
|
.Sp
|
7468 |
|
|
This option implies \fB\-fwhole\-file\fR for Fortran programs.
|
7469 |
|
|
.IP "\fB\-flto[=\fR\fIn\fR\fB]\fR" 4
|
7470 |
|
|
.IX Item "-flto[=n]"
|
7471 |
|
|
This option runs the standard link-time optimizer. When invoked
|
7472 |
|
|
with source code, it generates \s-1GIMPLE\s0 (one of \s-1GCC\s0's internal
|
7473 |
|
|
representations) and writes it to special \s-1ELF\s0 sections in the object
|
7474 |
|
|
file. When the object files are linked together, all the function
|
7475 |
|
|
bodies are read from these \s-1ELF\s0 sections and instantiated as if they
|
7476 |
|
|
had been part of the same translation unit.
|
7477 |
|
|
.Sp
|
7478 |
|
|
To use the link-time optimizer, \fB\-flto\fR needs to be specified at
|
7479 |
|
|
compile time and during the final link. For example:
|
7480 |
|
|
.Sp
|
7481 |
|
|
.Vb 3
|
7482 |
|
|
\& gcc \-c \-O2 \-flto foo.c
|
7483 |
|
|
\& gcc \-c \-O2 \-flto bar.c
|
7484 |
|
|
\& gcc \-o myprog \-flto \-O2 foo.o bar.o
|
7485 |
|
|
.Ve
|
7486 |
|
|
.Sp
|
7487 |
|
|
The first two invocations to \s-1GCC\s0 save a bytecode representation
|
7488 |
|
|
of \s-1GIMPLE\s0 into special \s-1ELF\s0 sections inside \fIfoo.o\fR and
|
7489 |
|
|
\&\fIbar.o\fR. The final invocation reads the \s-1GIMPLE\s0 bytecode from
|
7490 |
|
|
\&\fIfoo.o\fR and \fIbar.o\fR, merges the two files into a single
|
7491 |
|
|
internal image, and compiles the result as usual. Since both
|
7492 |
|
|
\&\fIfoo.o\fR and \fIbar.o\fR are merged into a single image, this
|
7493 |
|
|
causes all the interprocedural analyses and optimizations in \s-1GCC\s0 to
|
7494 |
|
|
work across the two files as if they were a single one. This means,
|
7495 |
|
|
for example, that the inliner is able to inline functions in
|
7496 |
|
|
\&\fIbar.o\fR into functions in \fIfoo.o\fR and vice-versa.
|
7497 |
|
|
.Sp
|
7498 |
|
|
Another (simpler) way to enable link-time optimization is:
|
7499 |
|
|
.Sp
|
7500 |
|
|
.Vb 1
|
7501 |
|
|
\& gcc \-o myprog \-flto \-O2 foo.c bar.c
|
7502 |
|
|
.Ve
|
7503 |
|
|
.Sp
|
7504 |
|
|
The above generates bytecode for \fIfoo.c\fR and \fIbar.c\fR,
|
7505 |
|
|
merges them together into a single \s-1GIMPLE\s0 representation and optimizes
|
7506 |
|
|
them as usual to produce \fImyprog\fR.
|
7507 |
|
|
.Sp
|
7508 |
|
|
The only important thing to keep in mind is that to enable link-time
|
7509 |
|
|
optimizations the \fB\-flto\fR flag needs to be passed to both the
|
7510 |
|
|
compile and the link commands.
|
7511 |
|
|
.Sp
|
7512 |
|
|
To make whole program optimization effective, it is necessary to make
|
7513 |
|
|
certain whole program assumptions. The compiler needs to know
|
7514 |
|
|
what functions and variables can be accessed by libraries and runtime
|
7515 |
|
|
outside of the link-time optimized unit. When supported by the linker,
|
7516 |
|
|
the linker plugin (see \fB\-fuse\-linker\-plugin\fR) passes information
|
7517 |
|
|
to the compiler about used and externally visible symbols. When
|
7518 |
|
|
the linker plugin is not available, \fB\-fwhole\-program\fR should be
|
7519 |
|
|
used to allow the compiler to make these assumptions, which leads
|
7520 |
|
|
to more aggressive optimization decisions.
|
7521 |
|
|
.Sp
|
7522 |
|
|
Note that when a file is compiled with \fB\-flto\fR, the generated
|
7523 |
|
|
object file is larger than a regular object file because it
|
7524 |
|
|
contains \s-1GIMPLE\s0 bytecodes and the usual final code. This means that
|
7525 |
|
|
object files with \s-1LTO\s0 information can be linked as normal object
|
7526 |
|
|
files; if \fB\-flto\fR is not passed to the linker, no
|
7527 |
|
|
interprocedural optimizations are applied.
|
7528 |
|
|
.Sp
|
7529 |
|
|
Additionally, the optimization flags used to compile individual files
|
7530 |
|
|
are not necessarily related to those used at link time. For instance,
|
7531 |
|
|
.Sp
|
7532 |
|
|
.Vb 3
|
7533 |
|
|
\& gcc \-c \-O0 \-flto foo.c
|
7534 |
|
|
\& gcc \-c \-O0 \-flto bar.c
|
7535 |
|
|
\& gcc \-o myprog \-flto \-O3 foo.o bar.o
|
7536 |
|
|
.Ve
|
7537 |
|
|
.Sp
|
7538 |
|
|
This produces individual object files with unoptimized assembler
|
7539 |
|
|
code, but the resulting binary \fImyprog\fR is optimized at
|
7540 |
|
|
\&\fB\-O3\fR. If, instead, the final binary is generated without
|
7541 |
|
|
\&\fB\-flto\fR, then \fImyprog\fR is not optimized.
|
7542 |
|
|
.Sp
|
7543 |
|
|
When producing the final binary with \fB\-flto\fR, \s-1GCC\s0 only
|
7544 |
|
|
applies link-time optimizations to those files that contain bytecode.
|
7545 |
|
|
Therefore, you can mix and match object files and libraries with
|
7546 |
|
|
\&\s-1GIMPLE\s0 bytecodes and final object code. \s-1GCC\s0 automatically selects
|
7547 |
|
|
which files to optimize in \s-1LTO\s0 mode and which files to link without
|
7548 |
|
|
further processing.
|
7549 |
|
|
.Sp
|
7550 |
|
|
There are some code generation flags preserved by \s-1GCC\s0 when
|
7551 |
|
|
generating bytecodes, as they need to be used during the final link
|
7552 |
|
|
stage. Currently, the following options are saved into the \s-1GIMPLE\s0
|
7553 |
|
|
bytecode files: \fB\-fPIC\fR, \fB\-fcommon\fR and all the
|
7554 |
|
|
\&\fB\-m\fR target flags.
|
7555 |
|
|
.Sp
|
7556 |
|
|
At link time, these options are read in and reapplied. Note that the
|
7557 |
|
|
current implementation makes no attempt to recognize conflicting
|
7558 |
|
|
values for these options. If different files have conflicting option
|
7559 |
|
|
values (e.g., one file is compiled with \fB\-fPIC\fR and another
|
7560 |
|
|
isn't), the compiler simply uses the last value read from the
|
7561 |
|
|
bytecode files. It is recommended, then, that you compile all the files
|
7562 |
|
|
participating in the same link with the same options.
|
7563 |
|
|
.Sp
|
7564 |
|
|
If \s-1LTO\s0 encounters objects with C linkage declared with incompatible
|
7565 |
|
|
types in separate translation units to be linked together (undefined
|
7566 |
|
|
behavior according to \s-1ISO\s0 C99 6.2.7), a non-fatal diagnostic may be
|
7567 |
|
|
issued. The behavior is still undefined at run time.
|
7568 |
|
|
.Sp
|
7569 |
|
|
Another feature of \s-1LTO\s0 is that it is possible to apply interprocedural
|
7570 |
|
|
optimizations on files written in different languages. This requires
|
7571 |
|
|
support in the language front end. Currently, the C, \*(C+ and
|
7572 |
|
|
Fortran front ends are capable of emitting \s-1GIMPLE\s0 bytecodes, so
|
7573 |
|
|
something like this should work:
|
7574 |
|
|
.Sp
|
7575 |
|
|
.Vb 4
|
7576 |
|
|
\& gcc \-c \-flto foo.c
|
7577 |
|
|
\& g++ \-c \-flto bar.cc
|
7578 |
|
|
\& gfortran \-c \-flto baz.f90
|
7579 |
|
|
\& g++ \-o myprog \-flto \-O3 foo.o bar.o baz.o \-lgfortran
|
7580 |
|
|
.Ve
|
7581 |
|
|
.Sp
|
7582 |
|
|
Notice that the final link is done with \fBg++\fR to get the \*(C+
|
7583 |
|
|
runtime libraries and \fB\-lgfortran\fR is added to get the Fortran
|
7584 |
|
|
runtime libraries. In general, when mixing languages in \s-1LTO\s0 mode, you
|
7585 |
|
|
should use the same link command options as when mixing languages in a
|
7586 |
|
|
regular (non-LTO) compilation; all you need to add is \fB\-flto\fR to
|
7587 |
|
|
all the compile and link commands.
|
7588 |
|
|
.Sp
|
7589 |
|
|
If object files containing \s-1GIMPLE\s0 bytecode are stored in a library archive, say
|
7590 |
|
|
\&\fIlibfoo.a\fR, it is possible to extract and use them in an \s-1LTO\s0 link if you
|
7591 |
|
|
are using a linker with plugin support. To enable this feature, use
|
7592 |
|
|
the flag \fB\-fuse\-linker\-plugin\fR at link time:
|
7593 |
|
|
.Sp
|
7594 |
|
|
.Vb 1
|
7595 |
|
|
\& gcc \-o myprog \-O2 \-flto \-fuse\-linker\-plugin a.o b.o \-lfoo
|
7596 |
|
|
.Ve
|
7597 |
|
|
.Sp
|
7598 |
|
|
With the linker plugin enabled, the linker extracts the needed
|
7599 |
|
|
\&\s-1GIMPLE\s0 files from \fIlibfoo.a\fR and passes them on to the running \s-1GCC\s0
|
7600 |
|
|
to make them part of the aggregated \s-1GIMPLE\s0 image to be optimized.
|
7601 |
|
|
.Sp
|
7602 |
|
|
If you are not using a linker with plugin support and/or do not
|
7603 |
|
|
enable the linker plugin, then the objects inside \fIlibfoo.a\fR
|
7604 |
|
|
are extracted and linked as usual, but they do not participate
|
7605 |
|
|
in the \s-1LTO\s0 optimization process.
|
7606 |
|
|
.Sp
|
7607 |
|
|
Link-time optimizations do not require the presence of the whole program to
|
7608 |
|
|
operate. If the program does not require any symbols to be exported, it is
|
7609 |
|
|
possible to combine \fB\-flto\fR and \fB\-fwhole\-program\fR to allow
|
7610 |
|
|
the interprocedural optimizers to use more aggressive assumptions which may
|
7611 |
|
|
lead to improved optimization opportunities.
|
7612 |
|
|
Use of \fB\-fwhole\-program\fR is not needed when linker plugin is
|
7613 |
|
|
active (see \fB\-fuse\-linker\-plugin\fR).
|
7614 |
|
|
.Sp
|
7615 |
|
|
The current implementation of \s-1LTO\s0 makes no
|
7616 |
|
|
attempt to generate bytecode that is portable between different
|
7617 |
|
|
types of hosts. The bytecode files are versioned and there is a
|
7618 |
|
|
strict version check, so bytecode files generated in one version of
|
7619 |
|
|
\&\s-1GCC\s0 will not work with an older/newer version of \s-1GCC\s0.
|
7620 |
|
|
.Sp
|
7621 |
|
|
Link-time optimization does not work well with generation of debugging
|
7622 |
|
|
information. Combining \fB\-flto\fR with
|
7623 |
|
|
\&\fB\-g\fR is currently experimental and expected to produce wrong
|
7624 |
|
|
results.
|
7625 |
|
|
.Sp
|
7626 |
|
|
If you specify the optional \fIn\fR, the optimization and code
|
7627 |
|
|
generation done at link time is executed in parallel using \fIn\fR
|
7628 |
|
|
parallel jobs by utilizing an installed \fBmake\fR program. The
|
7629 |
|
|
environment variable \fB\s-1MAKE\s0\fR may be used to override the program
|
7630 |
|
|
used. The default value for \fIn\fR is 1.
|
7631 |
|
|
.Sp
|
7632 |
|
|
You can also specify \fB\-flto=jobserver\fR to use \s-1GNU\s0 make's
|
7633 |
|
|
job server mode to determine the number of parallel jobs. This
|
7634 |
|
|
is useful when the Makefile calling \s-1GCC\s0 is already executing in parallel.
|
7635 |
|
|
You must prepend a \fB+\fR to the command recipe in the parent Makefile
|
7636 |
|
|
for this to work. This option likely only works if \fB\s-1MAKE\s0\fR is
|
7637 |
|
|
\&\s-1GNU\s0 make.
|
7638 |
|
|
.Sp
|
7639 |
|
|
This option is disabled by default.
|
7640 |
|
|
.IP "\fB\-flto\-partition=\fR\fIalg\fR" 4
|
7641 |
|
|
.IX Item "-flto-partition=alg"
|
7642 |
|
|
Specify the partitioning algorithm used by the link-time optimizer.
|
7643 |
|
|
The value is either \f(CW\*(C`1to1\*(C'\fR to specify a partitioning mirroring
|
7644 |
|
|
the original source files or \f(CW\*(C`balanced\*(C'\fR to specify partitioning
|
7645 |
|
|
into equally sized chunks (whenever possible) or \f(CW\*(C`max\*(C'\fR to create
|
7646 |
|
|
new partition for every symbol where possible. Specifying \f(CW\*(C`none\*(C'\fR
|
7647 |
|
|
as an algorithm disables partitioning and streaming completely.
|
7648 |
|
|
The default value is \f(CW\*(C`balanced\*(C'\fR. While \f(CW\*(C`1to1\*(C'\fR can be used
|
7649 |
|
|
as an workaround for various code ordering issues, the \f(CW\*(C`max\*(C'\fR
|
7650 |
|
|
partitioning is intended for internal testing only.
|
7651 |
|
|
.IP "\fB\-flto\-compression\-level=\fR\fIn\fR" 4
|
7652 |
|
|
.IX Item "-flto-compression-level=n"
|
7653 |
|
|
This option specifies the level of compression used for intermediate
|
7654 |
|
|
language written to \s-1LTO\s0 object files, and is only meaningful in
|
7655 |
|
|
conjunction with \s-1LTO\s0 mode (\fB\-flto\fR). Valid
|
7656 |
|
|
values are 0 (no compression) to 9 (maximum compression). Values
|
7657 |
|
|
outside this range are clamped to either 0 or 9. If the option is not
|
7658 |
|
|
given, a default balanced compression setting is used.
|
7659 |
|
|
.IP "\fB\-flto\-report\fR" 4
|
7660 |
|
|
.IX Item "-flto-report"
|
7661 |
|
|
Prints a report with internal details on the workings of the link-time
|
7662 |
|
|
optimizer. The contents of this report vary from version to version.
|
7663 |
|
|
It is meant to be useful to \s-1GCC\s0 developers when processing object
|
7664 |
|
|
files in \s-1LTO\s0 mode (via \fB\-flto\fR).
|
7665 |
|
|
.Sp
|
7666 |
|
|
Disabled by default.
|
7667 |
|
|
.IP "\fB\-fuse\-linker\-plugin\fR" 4
|
7668 |
|
|
.IX Item "-fuse-linker-plugin"
|
7669 |
|
|
Enables the use of a linker plugin during link-time optimization. This
|
7670 |
|
|
option relies on plugin support in the linker, which is available in gold
|
7671 |
|
|
or in \s-1GNU\s0 ld 2.21 or newer.
|
7672 |
|
|
.Sp
|
7673 |
|
|
This option enables the extraction of object files with \s-1GIMPLE\s0 bytecode out
|
7674 |
|
|
of library archives. This improves the quality of optimization by exposing
|
7675 |
|
|
more code to the link-time optimizer. This information specifies what
|
7676 |
|
|
symbols can be accessed externally (by non-LTO object or during dynamic
|
7677 |
|
|
linking). Resulting code quality improvements on binaries (and shared
|
7678 |
|
|
libraries that use hidden visibility) are similar to \f(CW\*(C`\-fwhole\-program\*(C'\fR.
|
7679 |
|
|
See \fB\-flto\fR for a description of the effect of this flag and how to
|
7680 |
|
|
use it.
|
7681 |
|
|
.Sp
|
7682 |
|
|
This option is enabled by default when \s-1LTO\s0 support in \s-1GCC\s0 is enabled
|
7683 |
|
|
and \s-1GCC\s0 was configured for use with
|
7684 |
|
|
a linker supporting plugins (\s-1GNU\s0 ld 2.21 or newer or gold).
|
7685 |
|
|
.IP "\fB\-ffat\-lto\-objects\fR" 4
|
7686 |
|
|
.IX Item "-ffat-lto-objects"
|
7687 |
|
|
Fat \s-1LTO\s0 objects are object files that contain both the intermediate language
|
7688 |
|
|
and the object code. This makes them usable for both \s-1LTO\s0 linking and normal
|
7689 |
|
|
linking. This option is effective only when compiling with \fB\-flto\fR
|
7690 |
|
|
and is ignored at link time.
|
7691 |
|
|
.Sp
|
7692 |
|
|
\&\fB\-fno\-fat\-lto\-objects\fR improves compilation time over plain \s-1LTO\s0, but
|
7693 |
|
|
requires the complete toolchain to be aware of \s-1LTO\s0. It requires a linker with
|
7694 |
|
|
linker plugin support for basic functionality. Additionally,
|
7695 |
|
|
\&\fBnm\fR, \fBar\fR and \fBranlib\fR
|
7696 |
|
|
need to support linker plugins to allow a full-featured build environment
|
7697 |
|
|
(capable of building static libraries etc). gcc provides the \fBgcc-ar\fR,
|
7698 |
|
|
\&\fBgcc-nm\fR, \fBgcc-ranlib\fR wrappers to pass the right options
|
7699 |
|
|
to these tools. With non fat \s-1LTO\s0 makefiles need to be modified to use them.
|
7700 |
|
|
.Sp
|
7701 |
|
|
The default is \fB\-ffat\-lto\-objects\fR but this default is intended to
|
7702 |
|
|
change in future releases when linker plugin enabled environments become more
|
7703 |
|
|
common.
|
7704 |
|
|
.IP "\fB\-fcompare\-elim\fR" 4
|
7705 |
|
|
.IX Item "-fcompare-elim"
|
7706 |
|
|
After register allocation and post-register allocation instruction splitting,
|
7707 |
|
|
identify arithmetic instructions that compute processor flags similar to a
|
7708 |
|
|
comparison operation based on that arithmetic. If possible, eliminate the
|
7709 |
|
|
explicit comparison operation.
|
7710 |
|
|
.Sp
|
7711 |
|
|
This pass only applies to certain targets that cannot explicitly represent
|
7712 |
|
|
the comparison operation before register allocation is complete.
|
7713 |
|
|
.Sp
|
7714 |
|
|
Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
7715 |
|
|
.IP "\fB\-fcprop\-registers\fR" 4
|
7716 |
|
|
.IX Item "-fcprop-registers"
|
7717 |
|
|
After register allocation and post-register allocation instruction splitting,
|
7718 |
|
|
perform a copy-propagation pass to try to reduce scheduling dependencies
|
7719 |
|
|
and occasionally eliminate the copy.
|
7720 |
|
|
.Sp
|
7721 |
|
|
Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
7722 |
|
|
.IP "\fB\-fprofile\-correction\fR" 4
|
7723 |
|
|
.IX Item "-fprofile-correction"
|
7724 |
|
|
Profiles collected using an instrumented binary for multi-threaded programs may
|
7725 |
|
|
be inconsistent due to missed counter updates. When this option is specified,
|
7726 |
|
|
\&\s-1GCC\s0 uses heuristics to correct or smooth out such inconsistencies. By
|
7727 |
|
|
default, \s-1GCC\s0 emits an error message when an inconsistent profile is detected.
|
7728 |
|
|
.IP "\fB\-fprofile\-dir=\fR\fIpath\fR" 4
|
7729 |
|
|
.IX Item "-fprofile-dir=path"
|
7730 |
|
|
Set the directory to search for the profile data files in to \fIpath\fR.
|
7731 |
|
|
This option affects only the profile data generated by
|
7732 |
|
|
\&\fB\-fprofile\-generate\fR, \fB\-ftest\-coverage\fR, \fB\-fprofile\-arcs\fR
|
7733 |
|
|
and used by \fB\-fprofile\-use\fR and \fB\-fbranch\-probabilities\fR
|
7734 |
|
|
and its related options. Both absolute and relative paths can be used.
|
7735 |
|
|
By default, \s-1GCC\s0 uses the current directory as \fIpath\fR, thus the
|
7736 |
|
|
profile data file appears in the same directory as the object file.
|
7737 |
|
|
.IP "\fB\-fprofile\-generate\fR" 4
|
7738 |
|
|
.IX Item "-fprofile-generate"
|
7739 |
|
|
.PD 0
|
7740 |
|
|
.IP "\fB\-fprofile\-generate=\fR\fIpath\fR" 4
|
7741 |
|
|
.IX Item "-fprofile-generate=path"
|
7742 |
|
|
.PD
|
7743 |
|
|
Enable options usually used for instrumenting application to produce
|
7744 |
|
|
profile useful for later recompilation with profile feedback based
|
7745 |
|
|
optimization. You must use \fB\-fprofile\-generate\fR both when
|
7746 |
|
|
compiling and when linking your program.
|
7747 |
|
|
.Sp
|
7748 |
|
|
The following options are enabled: \f(CW\*(C`\-fprofile\-arcs\*(C'\fR, \f(CW\*(C`\-fprofile\-values\*(C'\fR, \f(CW\*(C`\-fvpt\*(C'\fR.
|
7749 |
|
|
.Sp
|
7750 |
|
|
If \fIpath\fR is specified, \s-1GCC\s0 looks at the \fIpath\fR to find
|
7751 |
|
|
the profile feedback data files. See \fB\-fprofile\-dir\fR.
|
7752 |
|
|
.IP "\fB\-fprofile\-use\fR" 4
|
7753 |
|
|
.IX Item "-fprofile-use"
|
7754 |
|
|
.PD 0
|
7755 |
|
|
.IP "\fB\-fprofile\-use=\fR\fIpath\fR" 4
|
7756 |
|
|
.IX Item "-fprofile-use=path"
|
7757 |
|
|
.PD
|
7758 |
|
|
Enable profile feedback directed optimizations, and optimizations
|
7759 |
|
|
generally profitable only with profile feedback available.
|
7760 |
|
|
.Sp
|
7761 |
|
|
The following options are enabled: \f(CW\*(C`\-fbranch\-probabilities\*(C'\fR, \f(CW\*(C`\-fvpt\*(C'\fR,
|
7762 |
|
|
\&\f(CW\*(C`\-funroll\-loops\*(C'\fR, \f(CW\*(C`\-fpeel\-loops\*(C'\fR, \f(CW\*(C`\-ftracer\*(C'\fR, \f(CW\*(C`\-ftree\-vectorize\*(C'\fR,
|
7763 |
|
|
\&\f(CW\*(C`ftree\-loop\-distribute\-patterns\*(C'\fR
|
7764 |
|
|
.Sp
|
7765 |
|
|
By default, \s-1GCC\s0 emits an error message if the feedback profiles do not
|
7766 |
|
|
match the source code. This error can be turned into a warning by using
|
7767 |
|
|
\&\fB\-Wcoverage\-mismatch\fR. Note this may result in poorly optimized
|
7768 |
|
|
code.
|
7769 |
|
|
.Sp
|
7770 |
|
|
If \fIpath\fR is specified, \s-1GCC\s0 looks at the \fIpath\fR to find
|
7771 |
|
|
the profile feedback data files. See \fB\-fprofile\-dir\fR.
|
7772 |
|
|
.PP
|
7773 |
|
|
The following options control compiler behavior regarding floating-point
|
7774 |
|
|
arithmetic. These options trade off between speed and
|
7775 |
|
|
correctness. All must be specifically enabled.
|
7776 |
|
|
.IP "\fB\-ffloat\-store\fR" 4
|
7777 |
|
|
.IX Item "-ffloat-store"
|
7778 |
|
|
Do not store floating-point variables in registers, and inhibit other
|
7779 |
|
|
options that might change whether a floating-point value is taken from a
|
7780 |
|
|
register or memory.
|
7781 |
|
|
.Sp
|
7782 |
|
|
This option prevents undesirable excess precision on machines such as
|
7783 |
|
|
the 68000 where the floating registers (of the 68881) keep more
|
7784 |
|
|
precision than a \f(CW\*(C`double\*(C'\fR is supposed to have. Similarly for the
|
7785 |
|
|
x86 architecture. For most programs, the excess precision does only
|
7786 |
|
|
good, but a few programs rely on the precise definition of \s-1IEEE\s0 floating
|
7787 |
|
|
point. Use \fB\-ffloat\-store\fR for such programs, after modifying
|
7788 |
|
|
them to store all pertinent intermediate computations into variables.
|
7789 |
|
|
.IP "\fB\-fexcess\-precision=\fR\fIstyle\fR" 4
|
7790 |
|
|
.IX Item "-fexcess-precision=style"
|
7791 |
|
|
This option allows further control over excess precision on machines
|
7792 |
|
|
where floating-point registers have more precision than the \s-1IEEE\s0
|
7793 |
|
|
\&\f(CW\*(C`float\*(C'\fR and \f(CW\*(C`double\*(C'\fR types and the processor does not
|
7794 |
|
|
support operations rounding to those types. By default,
|
7795 |
|
|
\&\fB\-fexcess\-precision=fast\fR is in effect; this means that
|
7796 |
|
|
operations are carried out in the precision of the registers and that
|
7797 |
|
|
it is unpredictable when rounding to the types specified in the source
|
7798 |
|
|
code takes place. When compiling C, if
|
7799 |
|
|
\&\fB\-fexcess\-precision=standard\fR is specified then excess
|
7800 |
|
|
precision follows the rules specified in \s-1ISO\s0 C99; in particular,
|
7801 |
|
|
both casts and assignments cause values to be rounded to their
|
7802 |
|
|
semantic types (whereas \fB\-ffloat\-store\fR only affects
|
7803 |
|
|
assignments). This option is enabled by default for C if a strict
|
7804 |
|
|
conformance option such as \fB\-std=c99\fR is used.
|
7805 |
|
|
.Sp
|
7806 |
|
|
\&\fB\-fexcess\-precision=standard\fR is not implemented for languages
|
7807 |
|
|
other than C, and has no effect if
|
7808 |
|
|
\&\fB\-funsafe\-math\-optimizations\fR or \fB\-ffast\-math\fR is
|
7809 |
|
|
specified. On the x86, it also has no effect if \fB\-mfpmath=sse\fR
|
7810 |
|
|
or \fB\-mfpmath=sse+387\fR is specified; in the former case, \s-1IEEE\s0
|
7811 |
|
|
semantics apply without excess precision, and in the latter, rounding
|
7812 |
|
|
is unpredictable.
|
7813 |
|
|
.IP "\fB\-ffast\-math\fR" 4
|
7814 |
|
|
.IX Item "-ffast-math"
|
7815 |
|
|
Sets \fB\-fno\-math\-errno\fR, \fB\-funsafe\-math\-optimizations\fR,
|
7816 |
|
|
\&\fB\-ffinite\-math\-only\fR, \fB\-fno\-rounding\-math\fR,
|
7817 |
|
|
\&\fB\-fno\-signaling\-nans\fR and \fB\-fcx\-limited\-range\fR.
|
7818 |
|
|
.Sp
|
7819 |
|
|
This option causes the preprocessor macro \f(CW\*(C`_\|_FAST_MATH_\|_\*(C'\fR to be defined.
|
7820 |
|
|
.Sp
|
7821 |
|
|
This option is not turned on by any \fB\-O\fR option besides
|
7822 |
|
|
\&\fB\-Ofast\fR since it can result in incorrect output for programs
|
7823 |
|
|
that depend on an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications
|
7824 |
|
|
for math functions. It may, however, yield faster code for programs
|
7825 |
|
|
that do not require the guarantees of these specifications.
|
7826 |
|
|
.IP "\fB\-fno\-math\-errno\fR" 4
|
7827 |
|
|
.IX Item "-fno-math-errno"
|
7828 |
|
|
Do not set \f(CW\*(C`errno\*(C'\fR after calling math functions that are executed
|
7829 |
|
|
with a single instruction, e.g., \f(CW\*(C`sqrt\*(C'\fR. A program that relies on
|
7830 |
|
|
\&\s-1IEEE\s0 exceptions for math error handling may want to use this flag
|
7831 |
|
|
for speed while maintaining \s-1IEEE\s0 arithmetic compatibility.
|
7832 |
|
|
.Sp
|
7833 |
|
|
This option is not turned on by any \fB\-O\fR option since
|
7834 |
|
|
it can result in incorrect output for programs that depend on
|
7835 |
|
|
an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
|
7836 |
|
|
math functions. It may, however, yield faster code for programs
|
7837 |
|
|
that do not require the guarantees of these specifications.
|
7838 |
|
|
.Sp
|
7839 |
|
|
The default is \fB\-fmath\-errno\fR.
|
7840 |
|
|
.Sp
|
7841 |
|
|
On Darwin systems, the math library never sets \f(CW\*(C`errno\*(C'\fR. There is
|
7842 |
|
|
therefore no reason for the compiler to consider the possibility that
|
7843 |
|
|
it might, and \fB\-fno\-math\-errno\fR is the default.
|
7844 |
|
|
.IP "\fB\-funsafe\-math\-optimizations\fR" 4
|
7845 |
|
|
.IX Item "-funsafe-math-optimizations"
|
7846 |
|
|
Allow optimizations for floating-point arithmetic that (a) assume
|
7847 |
|
|
that arguments and results are valid and (b) may violate \s-1IEEE\s0 or
|
7848 |
|
|
\&\s-1ANSI\s0 standards. When used at link-time, it may include libraries
|
7849 |
|
|
or startup files that change the default \s-1FPU\s0 control word or other
|
7850 |
|
|
similar optimizations.
|
7851 |
|
|
.Sp
|
7852 |
|
|
This option is not turned on by any \fB\-O\fR option since
|
7853 |
|
|
it can result in incorrect output for programs that depend on
|
7854 |
|
|
an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
|
7855 |
|
|
math functions. It may, however, yield faster code for programs
|
7856 |
|
|
that do not require the guarantees of these specifications.
|
7857 |
|
|
Enables \fB\-fno\-signed\-zeros\fR, \fB\-fno\-trapping\-math\fR,
|
7858 |
|
|
\&\fB\-fassociative\-math\fR and \fB\-freciprocal\-math\fR.
|
7859 |
|
|
.Sp
|
7860 |
|
|
The default is \fB\-fno\-unsafe\-math\-optimizations\fR.
|
7861 |
|
|
.IP "\fB\-fassociative\-math\fR" 4
|
7862 |
|
|
.IX Item "-fassociative-math"
|
7863 |
|
|
Allow re-association of operands in series of floating-point operations.
|
7864 |
|
|
This violates the \s-1ISO\s0 C and \*(C+ language standard by possibly changing
|
7865 |
|
|
computation result. \s-1NOTE:\s0 re-ordering may change the sign of zero as
|
7866 |
|
|
well as ignore NaNs and inhibit or create underflow or overflow (and
|
7867 |
|
|
thus cannot be used on code that relies on rounding behavior like
|
7868 |
|
|
\&\f(CW\*(C`(x + 2**52) \- 2**52\*(C'\fR. May also reorder floating-point comparisons
|
7869 |
|
|
and thus may not be used when ordered comparisons are required.
|
7870 |
|
|
This option requires that both \fB\-fno\-signed\-zeros\fR and
|
7871 |
|
|
\&\fB\-fno\-trapping\-math\fR be in effect. Moreover, it doesn't make
|
7872 |
|
|
much sense with \fB\-frounding\-math\fR. For Fortran the option
|
7873 |
|
|
is automatically enabled when both \fB\-fno\-signed\-zeros\fR and
|
7874 |
|
|
\&\fB\-fno\-trapping\-math\fR are in effect.
|
7875 |
|
|
.Sp
|
7876 |
|
|
The default is \fB\-fno\-associative\-math\fR.
|
7877 |
|
|
.IP "\fB\-freciprocal\-math\fR" 4
|
7878 |
|
|
.IX Item "-freciprocal-math"
|
7879 |
|
|
Allow the reciprocal of a value to be used instead of dividing by
|
7880 |
|
|
the value if this enables optimizations. For example \f(CW\*(C`x / y\*(C'\fR
|
7881 |
|
|
can be replaced with \f(CW\*(C`x * (1/y)\*(C'\fR, which is useful if \f(CW\*(C`(1/y)\*(C'\fR
|
7882 |
|
|
is subject to common subexpression elimination. Note that this loses
|
7883 |
|
|
precision and increases the number of flops operating on the value.
|
7884 |
|
|
.Sp
|
7885 |
|
|
The default is \fB\-fno\-reciprocal\-math\fR.
|
7886 |
|
|
.IP "\fB\-ffinite\-math\-only\fR" 4
|
7887 |
|
|
.IX Item "-ffinite-math-only"
|
7888 |
|
|
Allow optimizations for floating-point arithmetic that assume
|
7889 |
|
|
that arguments and results are not NaNs or +\-Infs.
|
7890 |
|
|
.Sp
|
7891 |
|
|
This option is not turned on by any \fB\-O\fR option since
|
7892 |
|
|
it can result in incorrect output for programs that depend on
|
7893 |
|
|
an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
|
7894 |
|
|
math functions. It may, however, yield faster code for programs
|
7895 |
|
|
that do not require the guarantees of these specifications.
|
7896 |
|
|
.Sp
|
7897 |
|
|
The default is \fB\-fno\-finite\-math\-only\fR.
|
7898 |
|
|
.IP "\fB\-fno\-signed\-zeros\fR" 4
|
7899 |
|
|
.IX Item "-fno-signed-zeros"
|
7900 |
|
|
Allow optimizations for floating-point arithmetic that ignore the
|
7901 |
|
|
signedness of zero. \s-1IEEE\s0 arithmetic specifies the behavior of
|
7902 |
|
|
distinct +0.0 and \-0.0 values, which then prohibits simplification
|
7903 |
|
|
of expressions such as x+0.0 or 0.0*x (even with \fB\-ffinite\-math\-only\fR).
|
7904 |
|
|
This option implies that the sign of a zero result isn't significant.
|
7905 |
|
|
.Sp
|
7906 |
|
|
The default is \fB\-fsigned\-zeros\fR.
|
7907 |
|
|
.IP "\fB\-fno\-trapping\-math\fR" 4
|
7908 |
|
|
.IX Item "-fno-trapping-math"
|
7909 |
|
|
Compile code assuming that floating-point operations cannot generate
|
7910 |
|
|
user-visible traps. These traps include division by zero, overflow,
|
7911 |
|
|
underflow, inexact result and invalid operation. This option requires
|
7912 |
|
|
that \fB\-fno\-signaling\-nans\fR be in effect. Setting this option may
|
7913 |
|
|
allow faster code if one relies on \*(L"non-stop\*(R" \s-1IEEE\s0 arithmetic, for example.
|
7914 |
|
|
.Sp
|
7915 |
|
|
This option should never be turned on by any \fB\-O\fR option since
|
7916 |
|
|
it can result in incorrect output for programs that depend on
|
7917 |
|
|
an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
|
7918 |
|
|
math functions.
|
7919 |
|
|
.Sp
|
7920 |
|
|
The default is \fB\-ftrapping\-math\fR.
|
7921 |
|
|
.IP "\fB\-frounding\-math\fR" 4
|
7922 |
|
|
.IX Item "-frounding-math"
|
7923 |
|
|
Disable transformations and optimizations that assume default floating-point
|
7924 |
|
|
rounding behavior. This is round-to-zero for all floating point
|
7925 |
|
|
to integer conversions, and round-to-nearest for all other arithmetic
|
7926 |
|
|
truncations. This option should be specified for programs that change
|
7927 |
|
|
the \s-1FP\s0 rounding mode dynamically, or that may be executed with a
|
7928 |
|
|
non-default rounding mode. This option disables constant folding of
|
7929 |
|
|
floating-point expressions at compile time (which may be affected by
|
7930 |
|
|
rounding mode) and arithmetic transformations that are unsafe in the
|
7931 |
|
|
presence of sign-dependent rounding modes.
|
7932 |
|
|
.Sp
|
7933 |
|
|
The default is \fB\-fno\-rounding\-math\fR.
|
7934 |
|
|
.Sp
|
7935 |
|
|
This option is experimental and does not currently guarantee to
|
7936 |
|
|
disable all \s-1GCC\s0 optimizations that are affected by rounding mode.
|
7937 |
|
|
Future versions of \s-1GCC\s0 may provide finer control of this setting
|
7938 |
|
|
using C99's \f(CW\*(C`FENV_ACCESS\*(C'\fR pragma. This command-line option
|
7939 |
|
|
will be used to specify the default state for \f(CW\*(C`FENV_ACCESS\*(C'\fR.
|
7940 |
|
|
.IP "\fB\-fsignaling\-nans\fR" 4
|
7941 |
|
|
.IX Item "-fsignaling-nans"
|
7942 |
|
|
Compile code assuming that \s-1IEEE\s0 signaling NaNs may generate user-visible
|
7943 |
|
|
traps during floating-point operations. Setting this option disables
|
7944 |
|
|
optimizations that may change the number of exceptions visible with
|
7945 |
|
|
signaling NaNs. This option implies \fB\-ftrapping\-math\fR.
|
7946 |
|
|
.Sp
|
7947 |
|
|
This option causes the preprocessor macro \f(CW\*(C`_\|_SUPPORT_SNAN_\|_\*(C'\fR to
|
7948 |
|
|
be defined.
|
7949 |
|
|
.Sp
|
7950 |
|
|
The default is \fB\-fno\-signaling\-nans\fR.
|
7951 |
|
|
.Sp
|
7952 |
|
|
This option is experimental and does not currently guarantee to
|
7953 |
|
|
disable all \s-1GCC\s0 optimizations that affect signaling NaN behavior.
|
7954 |
|
|
.IP "\fB\-fsingle\-precision\-constant\fR" 4
|
7955 |
|
|
.IX Item "-fsingle-precision-constant"
|
7956 |
|
|
Treat floating-point constants as single precision instead of
|
7957 |
|
|
implicitly converting them to double-precision constants.
|
7958 |
|
|
.IP "\fB\-fcx\-limited\-range\fR" 4
|
7959 |
|
|
.IX Item "-fcx-limited-range"
|
7960 |
|
|
When enabled, this option states that a range reduction step is not
|
7961 |
|
|
needed when performing complex division. Also, there is no checking
|
7962 |
|
|
whether the result of a complex multiplication or division is \f(CW\*(C`NaN
|
7963 |
|
|
+ I*NaN\*(C'\fR, with an attempt to rescue the situation in that case. The
|
7964 |
|
|
default is \fB\-fno\-cx\-limited\-range\fR, but is enabled by
|
7965 |
|
|
\&\fB\-ffast\-math\fR.
|
7966 |
|
|
.Sp
|
7967 |
|
|
This option controls the default setting of the \s-1ISO\s0 C99
|
7968 |
|
|
\&\f(CW\*(C`CX_LIMITED_RANGE\*(C'\fR pragma. Nevertheless, the option applies to
|
7969 |
|
|
all languages.
|
7970 |
|
|
.IP "\fB\-fcx\-fortran\-rules\fR" 4
|
7971 |
|
|
.IX Item "-fcx-fortran-rules"
|
7972 |
|
|
Complex multiplication and division follow Fortran rules. Range
|
7973 |
|
|
reduction is done as part of complex division, but there is no checking
|
7974 |
|
|
whether the result of a complex multiplication or division is \f(CW\*(C`NaN
|
7975 |
|
|
+ I*NaN\*(C'\fR, with an attempt to rescue the situation in that case.
|
7976 |
|
|
.Sp
|
7977 |
|
|
The default is \fB\-fno\-cx\-fortran\-rules\fR.
|
7978 |
|
|
.PP
|
7979 |
|
|
The following options control optimizations that may improve
|
7980 |
|
|
performance, but are not enabled by any \fB\-O\fR options. This
|
7981 |
|
|
section includes experimental options that may produce broken code.
|
7982 |
|
|
.IP "\fB\-fbranch\-probabilities\fR" 4
|
7983 |
|
|
.IX Item "-fbranch-probabilities"
|
7984 |
|
|
After running a program compiled with \fB\-fprofile\-arcs\fR, you can compile it a second time using
|
7985 |
|
|
\&\fB\-fbranch\-probabilities\fR, to improve optimizations based on
|
7986 |
|
|
the number of times each branch was taken. When a program
|
7987 |
|
|
compiled with \fB\-fprofile\-arcs\fR exits, it saves arc execution
|
7988 |
|
|
counts to a file called \fI\fIsourcename\fI.gcda\fR for each source
|
7989 |
|
|
file. The information in this data file is very dependent on the
|
7990 |
|
|
structure of the generated code, so you must use the same source code
|
7991 |
|
|
and the same optimization options for both compilations.
|
7992 |
|
|
.Sp
|
7993 |
|
|
With \fB\-fbranch\-probabilities\fR, \s-1GCC\s0 puts a
|
7994 |
|
|
\&\fB\s-1REG_BR_PROB\s0\fR note on each \fB\s-1JUMP_INSN\s0\fR and \fB\s-1CALL_INSN\s0\fR.
|
7995 |
|
|
These can be used to improve optimization. Currently, they are only
|
7996 |
|
|
used in one place: in \fIreorg.c\fR, instead of guessing which path a
|
7997 |
|
|
branch is most likely to take, the \fB\s-1REG_BR_PROB\s0\fR values are used to
|
7998 |
|
|
exactly determine which path is taken more often.
|
7999 |
|
|
.IP "\fB\-fprofile\-values\fR" 4
|
8000 |
|
|
.IX Item "-fprofile-values"
|
8001 |
|
|
If combined with \fB\-fprofile\-arcs\fR, it adds code so that some
|
8002 |
|
|
data about values of expressions in the program is gathered.
|
8003 |
|
|
.Sp
|
8004 |
|
|
With \fB\-fbranch\-probabilities\fR, it reads back the data gathered
|
8005 |
|
|
from profiling values of expressions for usage in optimizations.
|
8006 |
|
|
.Sp
|
8007 |
|
|
Enabled with \fB\-fprofile\-generate\fR and \fB\-fprofile\-use\fR.
|
8008 |
|
|
.IP "\fB\-fvpt\fR" 4
|
8009 |
|
|
.IX Item "-fvpt"
|
8010 |
|
|
If combined with \fB\-fprofile\-arcs\fR, this option instructs the compiler
|
8011 |
|
|
to add code to gather information about values of expressions.
|
8012 |
|
|
.Sp
|
8013 |
|
|
With \fB\-fbranch\-probabilities\fR, it reads back the data gathered
|
8014 |
|
|
and actually performs the optimizations based on them.
|
8015 |
|
|
Currently the optimizations include specialization of division operations
|
8016 |
|
|
using the knowledge about the value of the denominator.
|
8017 |
|
|
.IP "\fB\-frename\-registers\fR" 4
|
8018 |
|
|
.IX Item "-frename-registers"
|
8019 |
|
|
Attempt to avoid false dependencies in scheduled code by making use
|
8020 |
|
|
of registers left over after register allocation. This optimization
|
8021 |
|
|
most benefits processors with lots of registers. Depending on the
|
8022 |
|
|
debug information format adopted by the target, however, it can
|
8023 |
|
|
make debugging impossible, since variables no longer stay in
|
8024 |
|
|
a \*(L"home register\*(R".
|
8025 |
|
|
.Sp
|
8026 |
|
|
Enabled by default with \fB\-funroll\-loops\fR and \fB\-fpeel\-loops\fR.
|
8027 |
|
|
.IP "\fB\-ftracer\fR" 4
|
8028 |
|
|
.IX Item "-ftracer"
|
8029 |
|
|
Perform tail duplication to enlarge superblock size. This transformation
|
8030 |
|
|
simplifies the control flow of the function allowing other optimizations to do
|
8031 |
|
|
a better job.
|
8032 |
|
|
.Sp
|
8033 |
|
|
Enabled with \fB\-fprofile\-use\fR.
|
8034 |
|
|
.IP "\fB\-funroll\-loops\fR" 4
|
8035 |
|
|
.IX Item "-funroll-loops"
|
8036 |
|
|
Unroll loops whose number of iterations can be determined at compile time or
|
8037 |
|
|
upon entry to the loop. \fB\-funroll\-loops\fR implies
|
8038 |
|
|
\&\fB\-frerun\-cse\-after\-loop\fR, \fB\-fweb\fR and \fB\-frename\-registers\fR.
|
8039 |
|
|
It also turns on complete loop peeling (i.e. complete removal of loops with
|
8040 |
|
|
a small constant number of iterations). This option makes code larger, and may
|
8041 |
|
|
or may not make it run faster.
|
8042 |
|
|
.Sp
|
8043 |
|
|
Enabled with \fB\-fprofile\-use\fR.
|
8044 |
|
|
.IP "\fB\-funroll\-all\-loops\fR" 4
|
8045 |
|
|
.IX Item "-funroll-all-loops"
|
8046 |
|
|
Unroll all loops, even if their number of iterations is uncertain when
|
8047 |
|
|
the loop is entered. This usually makes programs run more slowly.
|
8048 |
|
|
\&\fB\-funroll\-all\-loops\fR implies the same options as
|
8049 |
|
|
\&\fB\-funroll\-loops\fR.
|
8050 |
|
|
.IP "\fB\-fpeel\-loops\fR" 4
|
8051 |
|
|
.IX Item "-fpeel-loops"
|
8052 |
|
|
Peels loops for which there is enough information that they do not
|
8053 |
|
|
roll much (from profile feedback). It also turns on complete loop peeling
|
8054 |
|
|
(i.e. complete removal of loops with small constant number of iterations).
|
8055 |
|
|
.Sp
|
8056 |
|
|
Enabled with \fB\-fprofile\-use\fR.
|
8057 |
|
|
.IP "\fB\-fmove\-loop\-invariants\fR" 4
|
8058 |
|
|
.IX Item "-fmove-loop-invariants"
|
8059 |
|
|
Enables the loop invariant motion pass in the \s-1RTL\s0 loop optimizer. Enabled
|
8060 |
|
|
at level \fB\-O1\fR
|
8061 |
|
|
.IP "\fB\-funswitch\-loops\fR" 4
|
8062 |
|
|
.IX Item "-funswitch-loops"
|
8063 |
|
|
Move branches with loop invariant conditions out of the loop, with duplicates
|
8064 |
|
|
of the loop on both branches (modified according to result of the condition).
|
8065 |
|
|
.IP "\fB\-ffunction\-sections\fR" 4
|
8066 |
|
|
.IX Item "-ffunction-sections"
|
8067 |
|
|
.PD 0
|
8068 |
|
|
.IP "\fB\-fdata\-sections\fR" 4
|
8069 |
|
|
.IX Item "-fdata-sections"
|
8070 |
|
|
.PD
|
8071 |
|
|
Place each function or data item into its own section in the output
|
8072 |
|
|
file if the target supports arbitrary sections. The name of the
|
8073 |
|
|
function or the name of the data item determines the section's name
|
8074 |
|
|
in the output file.
|
8075 |
|
|
.Sp
|
8076 |
|
|
Use these options on systems where the linker can perform optimizations
|
8077 |
|
|
to improve locality of reference in the instruction space. Most systems
|
8078 |
|
|
using the \s-1ELF\s0 object format and \s-1SPARC\s0 processors running Solaris 2 have
|
8079 |
|
|
linkers with such optimizations. \s-1AIX\s0 may have these optimizations in
|
8080 |
|
|
the future.
|
8081 |
|
|
.Sp
|
8082 |
|
|
Only use these options when there are significant benefits from doing
|
8083 |
|
|
so. When you specify these options, the assembler and linker
|
8084 |
|
|
create larger object and executable files and are also slower.
|
8085 |
|
|
You cannot use \f(CW\*(C`gprof\*(C'\fR on all systems if you
|
8086 |
|
|
specify this option, and you may have problems with debugging if
|
8087 |
|
|
you specify both this option and \fB\-g\fR.
|
8088 |
|
|
.IP "\fB\-fbranch\-target\-load\-optimize\fR" 4
|
8089 |
|
|
.IX Item "-fbranch-target-load-optimize"
|
8090 |
|
|
Perform branch target register load optimization before prologue / epilogue
|
8091 |
|
|
threading.
|
8092 |
|
|
The use of target registers can typically be exposed only during reload,
|
8093 |
|
|
thus hoisting loads out of loops and doing inter-block scheduling needs
|
8094 |
|
|
a separate optimization pass.
|
8095 |
|
|
.IP "\fB\-fbranch\-target\-load\-optimize2\fR" 4
|
8096 |
|
|
.IX Item "-fbranch-target-load-optimize2"
|
8097 |
|
|
Perform branch target register load optimization after prologue / epilogue
|
8098 |
|
|
threading.
|
8099 |
|
|
.IP "\fB\-fbtr\-bb\-exclusive\fR" 4
|
8100 |
|
|
.IX Item "-fbtr-bb-exclusive"
|
8101 |
|
|
When performing branch target register load optimization, don't reuse
|
8102 |
|
|
branch target registers within any basic block.
|
8103 |
|
|
.IP "\fB\-fstack\-protector\fR" 4
|
8104 |
|
|
.IX Item "-fstack-protector"
|
8105 |
|
|
Emit extra code to check for buffer overflows, such as stack smashing
|
8106 |
|
|
attacks. This is done by adding a guard variable to functions with
|
8107 |
|
|
vulnerable objects. This includes functions that call \f(CW\*(C`alloca\*(C'\fR, and
|
8108 |
|
|
functions with buffers larger than 8 bytes. The guards are initialized
|
8109 |
|
|
when a function is entered and then checked when the function exits.
|
8110 |
|
|
If a guard check fails, an error message is printed and the program exits.
|
8111 |
|
|
.IP "\fB\-fstack\-protector\-all\fR" 4
|
8112 |
|
|
.IX Item "-fstack-protector-all"
|
8113 |
|
|
Like \fB\-fstack\-protector\fR except that all functions are protected.
|
8114 |
|
|
.IP "\fB\-fsection\-anchors\fR" 4
|
8115 |
|
|
.IX Item "-fsection-anchors"
|
8116 |
|
|
Try to reduce the number of symbolic address calculations by using
|
8117 |
|
|
shared \*(L"anchor\*(R" symbols to address nearby objects. This transformation
|
8118 |
|
|
can help to reduce the number of \s-1GOT\s0 entries and \s-1GOT\s0 accesses on some
|
8119 |
|
|
targets.
|
8120 |
|
|
.Sp
|
8121 |
|
|
For example, the implementation of the following function \f(CW\*(C`foo\*(C'\fR:
|
8122 |
|
|
.Sp
|
8123 |
|
|
.Vb 2
|
8124 |
|
|
\& static int a, b, c;
|
8125 |
|
|
\& int foo (void) { return a + b + c; }
|
8126 |
|
|
.Ve
|
8127 |
|
|
.Sp
|
8128 |
|
|
usually calculates the addresses of all three variables, but if you
|
8129 |
|
|
compile it with \fB\-fsection\-anchors\fR, it accesses the variables
|
8130 |
|
|
from a common anchor point instead. The effect is similar to the
|
8131 |
|
|
following pseudocode (which isn't valid C):
|
8132 |
|
|
.Sp
|
8133 |
|
|
.Vb 5
|
8134 |
|
|
\& int foo (void)
|
8135 |
|
|
\& {
|
8136 |
|
|
\& register int *xr = &x;
|
8137 |
|
|
\& return xr[&a \- &x] + xr[&b \- &x] + xr[&c \- &x];
|
8138 |
|
|
\& }
|
8139 |
|
|
.Ve
|
8140 |
|
|
.Sp
|
8141 |
|
|
Not all targets support this option.
|
8142 |
|
|
.IP "\fB\-\-param\fR \fIname\fR\fB=\fR\fIvalue\fR" 4
|
8143 |
|
|
.IX Item "--param name=value"
|
8144 |
|
|
In some places, \s-1GCC\s0 uses various constants to control the amount of
|
8145 |
|
|
optimization that is done. For example, \s-1GCC\s0 does not inline functions
|
8146 |
|
|
that contain more than a certain number of instructions. You can
|
8147 |
|
|
control some of these constants on the command line using the
|
8148 |
|
|
\&\fB\-\-param\fR option.
|
8149 |
|
|
.Sp
|
8150 |
|
|
The names of specific parameters, and the meaning of the values, are
|
8151 |
|
|
tied to the internals of the compiler, and are subject to change
|
8152 |
|
|
without notice in future releases.
|
8153 |
|
|
.Sp
|
8154 |
|
|
In each case, the \fIvalue\fR is an integer. The allowable choices for
|
8155 |
|
|
\&\fIname\fR are:
|
8156 |
|
|
.RS 4
|
8157 |
|
|
.IP "\fBpredictable-branch-outcome\fR" 4
|
8158 |
|
|
.IX Item "predictable-branch-outcome"
|
8159 |
|
|
When branch is predicted to be taken with probability lower than this threshold
|
8160 |
|
|
(in percent), then it is considered well predictable. The default is 10.
|
8161 |
|
|
.IP "\fBmax-crossjump-edges\fR" 4
|
8162 |
|
|
.IX Item "max-crossjump-edges"
|
8163 |
|
|
The maximum number of incoming edges to consider for cross-jumping.
|
8164 |
|
|
The algorithm used by \fB\-fcrossjumping\fR is O(N^2) in
|
8165 |
|
|
the number of edges incoming to each block. Increasing values mean
|
8166 |
|
|
more aggressive optimization, making the compilation time increase with
|
8167 |
|
|
probably small improvement in executable size.
|
8168 |
|
|
.IP "\fBmin-crossjump-insns\fR" 4
|
8169 |
|
|
.IX Item "min-crossjump-insns"
|
8170 |
|
|
The minimum number of instructions that must be matched at the end
|
8171 |
|
|
of two blocks before cross-jumping is performed on them. This
|
8172 |
|
|
value is ignored in the case where all instructions in the block being
|
8173 |
|
|
cross-jumped from are matched. The default value is 5.
|
8174 |
|
|
.IP "\fBmax-grow-copy-bb-insns\fR" 4
|
8175 |
|
|
.IX Item "max-grow-copy-bb-insns"
|
8176 |
|
|
The maximum code size expansion factor when copying basic blocks
|
8177 |
|
|
instead of jumping. The expansion is relative to a jump instruction.
|
8178 |
|
|
The default value is 8.
|
8179 |
|
|
.IP "\fBmax-goto-duplication-insns\fR" 4
|
8180 |
|
|
.IX Item "max-goto-duplication-insns"
|
8181 |
|
|
The maximum number of instructions to duplicate to a block that jumps
|
8182 |
|
|
to a computed goto. To avoid O(N^2) behavior in a number of
|
8183 |
|
|
passes, \s-1GCC\s0 factors computed gotos early in the compilation process,
|
8184 |
|
|
and unfactors them as late as possible. Only computed jumps at the
|
8185 |
|
|
end of a basic blocks with no more than max-goto-duplication-insns are
|
8186 |
|
|
unfactored. The default value is 8.
|
8187 |
|
|
.IP "\fBmax-delay-slot-insn-search\fR" 4
|
8188 |
|
|
.IX Item "max-delay-slot-insn-search"
|
8189 |
|
|
The maximum number of instructions to consider when looking for an
|
8190 |
|
|
instruction to fill a delay slot. If more than this arbitrary number of
|
8191 |
|
|
instructions are searched, the time savings from filling the delay slot
|
8192 |
|
|
are minimal, so stop searching. Increasing values mean more
|
8193 |
|
|
aggressive optimization, making the compilation time increase with probably
|
8194 |
|
|
small improvement in execution time.
|
8195 |
|
|
.IP "\fBmax-delay-slot-live-search\fR" 4
|
8196 |
|
|
.IX Item "max-delay-slot-live-search"
|
8197 |
|
|
When trying to fill delay slots, the maximum number of instructions to
|
8198 |
|
|
consider when searching for a block with valid live register
|
8199 |
|
|
information. Increasing this arbitrarily chosen value means more
|
8200 |
|
|
aggressive optimization, increasing the compilation time. This parameter
|
8201 |
|
|
should be removed when the delay slot code is rewritten to maintain the
|
8202 |
|
|
control-flow graph.
|
8203 |
|
|
.IP "\fBmax-gcse-memory\fR" 4
|
8204 |
|
|
.IX Item "max-gcse-memory"
|
8205 |
|
|
The approximate maximum amount of memory that can be allocated in
|
8206 |
|
|
order to perform the global common subexpression elimination
|
8207 |
|
|
optimization. If more memory than specified is required, the
|
8208 |
|
|
optimization is not done.
|
8209 |
|
|
.IP "\fBmax-gcse-insertion-ratio\fR" 4
|
8210 |
|
|
.IX Item "max-gcse-insertion-ratio"
|
8211 |
|
|
If the ratio of expression insertions to deletions is larger than this value
|
8212 |
|
|
for any expression, then \s-1RTL\s0 \s-1PRE\s0 inserts or removes the expression and thus
|
8213 |
|
|
leaves partially redundant computations in the instruction stream. The default value is 20.
|
8214 |
|
|
.IP "\fBmax-pending-list-length\fR" 4
|
8215 |
|
|
.IX Item "max-pending-list-length"
|
8216 |
|
|
The maximum number of pending dependencies scheduling allows
|
8217 |
|
|
before flushing the current state and starting over. Large functions
|
8218 |
|
|
with few branches or calls can create excessively large lists which
|
8219 |
|
|
needlessly consume memory and resources.
|
8220 |
|
|
.IP "\fBmax-modulo-backtrack-attempts\fR" 4
|
8221 |
|
|
.IX Item "max-modulo-backtrack-attempts"
|
8222 |
|
|
The maximum number of backtrack attempts the scheduler should make
|
8223 |
|
|
when modulo scheduling a loop. Larger values can exponentially increase
|
8224 |
|
|
compilation time.
|
8225 |
|
|
.IP "\fBmax-inline-insns-single\fR" 4
|
8226 |
|
|
.IX Item "max-inline-insns-single"
|
8227 |
|
|
Several parameters control the tree inliner used in \s-1GCC\s0.
|
8228 |
|
|
This number sets the maximum number of instructions (counted in \s-1GCC\s0's
|
8229 |
|
|
internal representation) in a single function that the tree inliner
|
8230 |
|
|
considers for inlining. This only affects functions declared
|
8231 |
|
|
inline and methods implemented in a class declaration (\*(C+).
|
8232 |
|
|
The default value is 400.
|
8233 |
|
|
.IP "\fBmax-inline-insns-auto\fR" 4
|
8234 |
|
|
.IX Item "max-inline-insns-auto"
|
8235 |
|
|
When you use \fB\-finline\-functions\fR (included in \fB\-O3\fR),
|
8236 |
|
|
a lot of functions that would otherwise not be considered for inlining
|
8237 |
|
|
by the compiler are investigated. To those functions, a different
|
8238 |
|
|
(more restrictive) limit compared to functions declared inline can
|
8239 |
|
|
be applied.
|
8240 |
|
|
The default value is 40.
|
8241 |
|
|
.IP "\fBinline-min-speedup\fR" 4
|
8242 |
|
|
.IX Item "inline-min-speedup"
|
8243 |
|
|
When estimated performance improvement of caller + callee runtime exceeds this
|
8244 |
|
|
threshold (in precent), the function can be inlined regardless the limit on
|
8245 |
|
|
\&\fB\-\-param max-inline-insns-single\fR and \fB\-\-param
|
8246 |
|
|
max-inline-insns-auto\fR.
|
8247 |
|
|
.IP "\fBlarge-function-insns\fR" 4
|
8248 |
|
|
.IX Item "large-function-insns"
|
8249 |
|
|
The limit specifying really large functions. For functions larger than this
|
8250 |
|
|
limit after inlining, inlining is constrained by
|
8251 |
|
|
\&\fB\-\-param large-function-growth\fR. This parameter is useful primarily
|
8252 |
|
|
to avoid extreme compilation time caused by non-linear algorithms used by the
|
8253 |
|
|
back end.
|
8254 |
|
|
The default value is 2700.
|
8255 |
|
|
.IP "\fBlarge-function-growth\fR" 4
|
8256 |
|
|
.IX Item "large-function-growth"
|
8257 |
|
|
Specifies maximal growth of large function caused by inlining in percents.
|
8258 |
|
|
The default value is 100 which limits large function growth to 2.0 times
|
8259 |
|
|
the original size.
|
8260 |
|
|
.IP "\fBlarge-unit-insns\fR" 4
|
8261 |
|
|
.IX Item "large-unit-insns"
|
8262 |
|
|
The limit specifying large translation unit. Growth caused by inlining of
|
8263 |
|
|
units larger than this limit is limited by \fB\-\-param inline-unit-growth\fR.
|
8264 |
|
|
For small units this might be too tight.
|
8265 |
|
|
For example, consider a unit consisting of function A
|
8266 |
|
|
that is inline and B that just calls A three times. If B is small relative to
|
8267 |
|
|
A, the growth of unit is 300\e% and yet such inlining is very sane. For very
|
8268 |
|
|
large units consisting of small inlineable functions, however, the overall unit
|
8269 |
|
|
growth limit is needed to avoid exponential explosion of code size. Thus for
|
8270 |
|
|
smaller units, the size is increased to \fB\-\-param large-unit-insns\fR
|
8271 |
|
|
before applying \fB\-\-param inline-unit-growth\fR. The default is 10000.
|
8272 |
|
|
.IP "\fBinline-unit-growth\fR" 4
|
8273 |
|
|
.IX Item "inline-unit-growth"
|
8274 |
|
|
Specifies maximal overall growth of the compilation unit caused by inlining.
|
8275 |
|
|
The default value is 30 which limits unit growth to 1.3 times the original
|
8276 |
|
|
size.
|
8277 |
|
|
.IP "\fBipcp-unit-growth\fR" 4
|
8278 |
|
|
.IX Item "ipcp-unit-growth"
|
8279 |
|
|
Specifies maximal overall growth of the compilation unit caused by
|
8280 |
|
|
interprocedural constant propagation. The default value is 10 which limits
|
8281 |
|
|
unit growth to 1.1 times the original size.
|
8282 |
|
|
.IP "\fBlarge-stack-frame\fR" 4
|
8283 |
|
|
.IX Item "large-stack-frame"
|
8284 |
|
|
The limit specifying large stack frames. While inlining the algorithm is trying
|
8285 |
|
|
to not grow past this limit too much. The default value is 256 bytes.
|
8286 |
|
|
.IP "\fBlarge-stack-frame-growth\fR" 4
|
8287 |
|
|
.IX Item "large-stack-frame-growth"
|
8288 |
|
|
Specifies maximal growth of large stack frames caused by inlining in percents.
|
8289 |
|
|
The default value is 1000 which limits large stack frame growth to 11 times
|
8290 |
|
|
the original size.
|
8291 |
|
|
.IP "\fBmax-inline-insns-recursive\fR" 4
|
8292 |
|
|
.IX Item "max-inline-insns-recursive"
|
8293 |
|
|
.PD 0
|
8294 |
|
|
.IP "\fBmax-inline-insns-recursive-auto\fR" 4
|
8295 |
|
|
.IX Item "max-inline-insns-recursive-auto"
|
8296 |
|
|
.PD
|
8297 |
|
|
Specifies the maximum number of instructions an out-of-line copy of a
|
8298 |
|
|
self-recursive inline
|
8299 |
|
|
function can grow into by performing recursive inlining.
|
8300 |
|
|
.Sp
|
8301 |
|
|
For functions declared inline, \fB\-\-param max-inline-insns-recursive\fR is
|
8302 |
|
|
taken into account. For functions not declared inline, recursive inlining
|
8303 |
|
|
happens only when \fB\-finline\-functions\fR (included in \fB\-O3\fR) is
|
8304 |
|
|
enabled and \fB\-\-param max-inline-insns-recursive-auto\fR is used. The
|
8305 |
|
|
default value is 450.
|
8306 |
|
|
.IP "\fBmax-inline-recursive-depth\fR" 4
|
8307 |
|
|
.IX Item "max-inline-recursive-depth"
|
8308 |
|
|
.PD 0
|
8309 |
|
|
.IP "\fBmax-inline-recursive-depth-auto\fR" 4
|
8310 |
|
|
.IX Item "max-inline-recursive-depth-auto"
|
8311 |
|
|
.PD
|
8312 |
|
|
Specifies the maximum recursion depth used for recursive inlining.
|
8313 |
|
|
.Sp
|
8314 |
|
|
For functions declared inline, \fB\-\-param max-inline-recursive-depth\fR is
|
8315 |
|
|
taken into account. For functions not declared inline, recursive inlining
|
8316 |
|
|
happens only when \fB\-finline\-functions\fR (included in \fB\-O3\fR) is
|
8317 |
|
|
enabled and \fB\-\-param max-inline-recursive-depth-auto\fR is used. The
|
8318 |
|
|
default value is 8.
|
8319 |
|
|
.IP "\fBmin-inline-recursive-probability\fR" 4
|
8320 |
|
|
.IX Item "min-inline-recursive-probability"
|
8321 |
|
|
Recursive inlining is profitable only for function having deep recursion
|
8322 |
|
|
in average and can hurt for function having little recursion depth by
|
8323 |
|
|
increasing the prologue size or complexity of function body to other
|
8324 |
|
|
optimizers.
|
8325 |
|
|
.Sp
|
8326 |
|
|
When profile feedback is available (see \fB\-fprofile\-generate\fR) the actual
|
8327 |
|
|
recursion depth can be guessed from probability that function recurses via a
|
8328 |
|
|
given call expression. This parameter limits inlining only to call expressions
|
8329 |
|
|
whose probability exceeds the given threshold (in percents).
|
8330 |
|
|
The default value is 10.
|
8331 |
|
|
.IP "\fBearly-inlining-insns\fR" 4
|
8332 |
|
|
.IX Item "early-inlining-insns"
|
8333 |
|
|
Specify growth that the early inliner can make. In effect it increases
|
8334 |
|
|
the amount of inlining for code having a large abstraction penalty.
|
8335 |
|
|
The default value is 10.
|
8336 |
|
|
.IP "\fBmax-early-inliner-iterations\fR" 4
|
8337 |
|
|
.IX Item "max-early-inliner-iterations"
|
8338 |
|
|
.PD 0
|
8339 |
|
|
.IP "\fBmax-early-inliner-iterations\fR" 4
|
8340 |
|
|
.IX Item "max-early-inliner-iterations"
|
8341 |
|
|
.PD
|
8342 |
|
|
Limit of iterations of the early inliner. This basically bounds
|
8343 |
|
|
the number of nested indirect calls the early inliner can resolve.
|
8344 |
|
|
Deeper chains are still handled by late inlining.
|
8345 |
|
|
.IP "\fBcomdat-sharing-probability\fR" 4
|
8346 |
|
|
.IX Item "comdat-sharing-probability"
|
8347 |
|
|
.PD 0
|
8348 |
|
|
.IP "\fBcomdat-sharing-probability\fR" 4
|
8349 |
|
|
.IX Item "comdat-sharing-probability"
|
8350 |
|
|
.PD
|
8351 |
|
|
Probability (in percent) that \*(C+ inline function with comdat visibility
|
8352 |
|
|
are shared across multiple compilation units. The default value is 20.
|
8353 |
|
|
.IP "\fBmin-vect-loop-bound\fR" 4
|
8354 |
|
|
.IX Item "min-vect-loop-bound"
|
8355 |
|
|
The minimum number of iterations under which loops are not vectorized
|
8356 |
|
|
when \fB\-ftree\-vectorize\fR is used. The number of iterations after
|
8357 |
|
|
vectorization needs to be greater than the value specified by this option
|
8358 |
|
|
to allow vectorization. The default value is 0.
|
8359 |
|
|
.IP "\fBgcse-cost-distance-ratio\fR" 4
|
8360 |
|
|
.IX Item "gcse-cost-distance-ratio"
|
8361 |
|
|
Scaling factor in calculation of maximum distance an expression
|
8362 |
|
|
can be moved by \s-1GCSE\s0 optimizations. This is currently supported only in the
|
8363 |
|
|
code hoisting pass. The bigger the ratio, the more aggressive code hoisting
|
8364 |
|
|
is with simple expressions, i.e., the expressions that have cost
|
8365 |
|
|
less than \fBgcse-unrestricted-cost\fR. Specifying 0 disables
|
8366 |
|
|
hoisting of simple expressions. The default value is 10.
|
8367 |
|
|
.IP "\fBgcse-unrestricted-cost\fR" 4
|
8368 |
|
|
.IX Item "gcse-unrestricted-cost"
|
8369 |
|
|
Cost, roughly measured as the cost of a single typical machine
|
8370 |
|
|
instruction, at which \s-1GCSE\s0 optimizations do not constrain
|
8371 |
|
|
the distance an expression can travel. This is currently
|
8372 |
|
|
supported only in the code hoisting pass. The lesser the cost,
|
8373 |
|
|
the more aggressive code hoisting is. Specifying 0
|
8374 |
|
|
allows all expressions to travel unrestricted distances.
|
8375 |
|
|
The default value is 3.
|
8376 |
|
|
.IP "\fBmax-hoist-depth\fR" 4
|
8377 |
|
|
.IX Item "max-hoist-depth"
|
8378 |
|
|
The depth of search in the dominator tree for expressions to hoist.
|
8379 |
|
|
This is used to avoid quadratic behavior in hoisting algorithm.
|
8380 |
|
|
The value of 0 does not limit on the search, but may slow down compilation
|
8381 |
|
|
of huge functions. The default value is 30.
|
8382 |
|
|
.IP "\fBmax-tail-merge-comparisons\fR" 4
|
8383 |
|
|
.IX Item "max-tail-merge-comparisons"
|
8384 |
|
|
The maximum amount of similar bbs to compare a bb with. This is used to
|
8385 |
|
|
avoid quadratic behavior in tree tail merging. The default value is 10.
|
8386 |
|
|
.IP "\fBmax-tail-merge-iterations\fR" 4
|
8387 |
|
|
.IX Item "max-tail-merge-iterations"
|
8388 |
|
|
The maximum amount of iterations of the pass over the function. This is used to
|
8389 |
|
|
limit compilation time in tree tail merging. The default value is 2.
|
8390 |
|
|
.IP "\fBmax-unrolled-insns\fR" 4
|
8391 |
|
|
.IX Item "max-unrolled-insns"
|
8392 |
|
|
The maximum number of instructions that a loop may have to be unrolled.
|
8393 |
|
|
If a loop is unrolled, this parameter also determines how many times
|
8394 |
|
|
the loop code is unrolled.
|
8395 |
|
|
.IP "\fBmax-average-unrolled-insns\fR" 4
|
8396 |
|
|
.IX Item "max-average-unrolled-insns"
|
8397 |
|
|
The maximum number of instructions biased by probabilities of their execution
|
8398 |
|
|
that a loop may have to be unrolled. If a loop is unrolled,
|
8399 |
|
|
this parameter also determines how many times the loop code is unrolled.
|
8400 |
|
|
.IP "\fBmax-unroll-times\fR" 4
|
8401 |
|
|
.IX Item "max-unroll-times"
|
8402 |
|
|
The maximum number of unrollings of a single loop.
|
8403 |
|
|
.IP "\fBmax-peeled-insns\fR" 4
|
8404 |
|
|
.IX Item "max-peeled-insns"
|
8405 |
|
|
The maximum number of instructions that a loop may have to be peeled.
|
8406 |
|
|
If a loop is peeled, this parameter also determines how many times
|
8407 |
|
|
the loop code is peeled.
|
8408 |
|
|
.IP "\fBmax-peel-times\fR" 4
|
8409 |
|
|
.IX Item "max-peel-times"
|
8410 |
|
|
The maximum number of peelings of a single loop.
|
8411 |
|
|
.IP "\fBmax-peel-branches\fR" 4
|
8412 |
|
|
.IX Item "max-peel-branches"
|
8413 |
|
|
The maximum number of branches on the hot path through the peeled sequence.
|
8414 |
|
|
.IP "\fBmax-completely-peeled-insns\fR" 4
|
8415 |
|
|
.IX Item "max-completely-peeled-insns"
|
8416 |
|
|
The maximum number of insns of a completely peeled loop.
|
8417 |
|
|
.IP "\fBmax-completely-peel-times\fR" 4
|
8418 |
|
|
.IX Item "max-completely-peel-times"
|
8419 |
|
|
The maximum number of iterations of a loop to be suitable for complete peeling.
|
8420 |
|
|
.IP "\fBmax-completely-peel-loop-nest-depth\fR" 4
|
8421 |
|
|
.IX Item "max-completely-peel-loop-nest-depth"
|
8422 |
|
|
The maximum depth of a loop nest suitable for complete peeling.
|
8423 |
|
|
.IP "\fBmax-unswitch-insns\fR" 4
|
8424 |
|
|
.IX Item "max-unswitch-insns"
|
8425 |
|
|
The maximum number of insns of an unswitched loop.
|
8426 |
|
|
.IP "\fBmax-unswitch-level\fR" 4
|
8427 |
|
|
.IX Item "max-unswitch-level"
|
8428 |
|
|
The maximum number of branches unswitched in a single loop.
|
8429 |
|
|
.IP "\fBlim-expensive\fR" 4
|
8430 |
|
|
.IX Item "lim-expensive"
|
8431 |
|
|
The minimum cost of an expensive expression in the loop invariant motion.
|
8432 |
|
|
.IP "\fBiv-consider-all-candidates-bound\fR" 4
|
8433 |
|
|
.IX Item "iv-consider-all-candidates-bound"
|
8434 |
|
|
Bound on number of candidates for induction variables, below which
|
8435 |
|
|
all candidates are considered for each use in induction variable
|
8436 |
|
|
optimizations. If there are more candidates than this,
|
8437 |
|
|
only the most relevant ones are considered to avoid quadratic time complexity.
|
8438 |
|
|
.IP "\fBiv-max-considered-uses\fR" 4
|
8439 |
|
|
.IX Item "iv-max-considered-uses"
|
8440 |
|
|
The induction variable optimizations give up on loops that contain more
|
8441 |
|
|
induction variable uses.
|
8442 |
|
|
.IP "\fBiv-always-prune-cand-set-bound\fR" 4
|
8443 |
|
|
.IX Item "iv-always-prune-cand-set-bound"
|
8444 |
|
|
If the number of candidates in the set is smaller than this value,
|
8445 |
|
|
always try to remove unnecessary ivs from the set
|
8446 |
|
|
when adding a new one.
|
8447 |
|
|
.IP "\fBscev-max-expr-size\fR" 4
|
8448 |
|
|
.IX Item "scev-max-expr-size"
|
8449 |
|
|
Bound on size of expressions used in the scalar evolutions analyzer.
|
8450 |
|
|
Large expressions slow the analyzer.
|
8451 |
|
|
.IP "\fBscev-max-expr-complexity\fR" 4
|
8452 |
|
|
.IX Item "scev-max-expr-complexity"
|
8453 |
|
|
Bound on the complexity of the expressions in the scalar evolutions analyzer.
|
8454 |
|
|
Complex expressions slow the analyzer.
|
8455 |
|
|
.IP "\fBomega-max-vars\fR" 4
|
8456 |
|
|
.IX Item "omega-max-vars"
|
8457 |
|
|
The maximum number of variables in an Omega constraint system.
|
8458 |
|
|
The default value is 128.
|
8459 |
|
|
.IP "\fBomega-max-geqs\fR" 4
|
8460 |
|
|
.IX Item "omega-max-geqs"
|
8461 |
|
|
The maximum number of inequalities in an Omega constraint system.
|
8462 |
|
|
The default value is 256.
|
8463 |
|
|
.IP "\fBomega-max-eqs\fR" 4
|
8464 |
|
|
.IX Item "omega-max-eqs"
|
8465 |
|
|
The maximum number of equalities in an Omega constraint system.
|
8466 |
|
|
The default value is 128.
|
8467 |
|
|
.IP "\fBomega-max-wild-cards\fR" 4
|
8468 |
|
|
.IX Item "omega-max-wild-cards"
|
8469 |
|
|
The maximum number of wildcard variables that the Omega solver is
|
8470 |
|
|
able to insert. The default value is 18.
|
8471 |
|
|
.IP "\fBomega-hash-table-size\fR" 4
|
8472 |
|
|
.IX Item "omega-hash-table-size"
|
8473 |
|
|
The size of the hash table in the Omega solver. The default value is
|
8474 |
|
|
550.
|
8475 |
|
|
.IP "\fBomega-max-keys\fR" 4
|
8476 |
|
|
.IX Item "omega-max-keys"
|
8477 |
|
|
The maximal number of keys used by the Omega solver. The default
|
8478 |
|
|
value is 500.
|
8479 |
|
|
.IP "\fBomega-eliminate-redundant-constraints\fR" 4
|
8480 |
|
|
.IX Item "omega-eliminate-redundant-constraints"
|
8481 |
|
|
When set to 1, use expensive methods to eliminate all redundant
|
8482 |
|
|
constraints. The default value is 0.
|
8483 |
|
|
.IP "\fBvect-max-version-for-alignment-checks\fR" 4
|
8484 |
|
|
.IX Item "vect-max-version-for-alignment-checks"
|
8485 |
|
|
The maximum number of run-time checks that can be performed when
|
8486 |
|
|
doing loop versioning for alignment in the vectorizer. See option
|
8487 |
|
|
\&\fB\-ftree\-vect\-loop\-version\fR for more information.
|
8488 |
|
|
.IP "\fBvect-max-version-for-alias-checks\fR" 4
|
8489 |
|
|
.IX Item "vect-max-version-for-alias-checks"
|
8490 |
|
|
The maximum number of run-time checks that can be performed when
|
8491 |
|
|
doing loop versioning for alias in the vectorizer. See option
|
8492 |
|
|
\&\fB\-ftree\-vect\-loop\-version\fR for more information.
|
8493 |
|
|
.IP "\fBmax-iterations-to-track\fR" 4
|
8494 |
|
|
.IX Item "max-iterations-to-track"
|
8495 |
|
|
The maximum number of iterations of a loop the brute-force algorithm
|
8496 |
|
|
for analysis of the number of iterations of the loop tries to evaluate.
|
8497 |
|
|
.IP "\fBhot-bb-count-ws-permille\fR" 4
|
8498 |
|
|
.IX Item "hot-bb-count-ws-permille"
|
8499 |
|
|
A basic block profile count is considered hot if it contributes to
|
8500 |
|
|
the given permillage (i.e. 0...1000) of the entire profiled execution.
|
8501 |
|
|
.IP "\fBhot-bb-frequency-fraction\fR" 4
|
8502 |
|
|
.IX Item "hot-bb-frequency-fraction"
|
8503 |
|
|
Select fraction of the entry block frequency of executions of basic block in
|
8504 |
|
|
function given basic block needs to have to be considered hot.
|
8505 |
|
|
.IP "\fBmax-predicted-iterations\fR" 4
|
8506 |
|
|
.IX Item "max-predicted-iterations"
|
8507 |
|
|
The maximum number of loop iterations we predict statically. This is useful
|
8508 |
|
|
in cases where a function contains a single loop with known bound and
|
8509 |
|
|
another loop with unknown bound.
|
8510 |
|
|
The known number of iterations is predicted correctly, while
|
8511 |
|
|
the unknown number of iterations average to roughly 10. This means that the
|
8512 |
|
|
loop without bounds appears artificially cold relative to the other one.
|
8513 |
|
|
.IP "\fBalign-threshold\fR" 4
|
8514 |
|
|
.IX Item "align-threshold"
|
8515 |
|
|
Select fraction of the maximal frequency of executions of a basic block in
|
8516 |
|
|
a function to align the basic block.
|
8517 |
|
|
.IP "\fBalign-loop-iterations\fR" 4
|
8518 |
|
|
.IX Item "align-loop-iterations"
|
8519 |
|
|
A loop expected to iterate at least the selected number of iterations is
|
8520 |
|
|
aligned.
|
8521 |
|
|
.IP "\fBtracer-dynamic-coverage\fR" 4
|
8522 |
|
|
.IX Item "tracer-dynamic-coverage"
|
8523 |
|
|
.PD 0
|
8524 |
|
|
.IP "\fBtracer-dynamic-coverage-feedback\fR" 4
|
8525 |
|
|
.IX Item "tracer-dynamic-coverage-feedback"
|
8526 |
|
|
.PD
|
8527 |
|
|
This value is used to limit superblock formation once the given percentage of
|
8528 |
|
|
executed instructions is covered. This limits unnecessary code size
|
8529 |
|
|
expansion.
|
8530 |
|
|
.Sp
|
8531 |
|
|
The \fBtracer-dynamic-coverage-feedback\fR is used only when profile
|
8532 |
|
|
feedback is available. The real profiles (as opposed to statically estimated
|
8533 |
|
|
ones) are much less balanced allowing the threshold to be larger value.
|
8534 |
|
|
.IP "\fBtracer-max-code-growth\fR" 4
|
8535 |
|
|
.IX Item "tracer-max-code-growth"
|
8536 |
|
|
Stop tail duplication once code growth has reached given percentage. This is
|
8537 |
|
|
a rather artificial limit, as most of the duplicates are eliminated later in
|
8538 |
|
|
cross jumping, so it may be set to much higher values than is the desired code
|
8539 |
|
|
growth.
|
8540 |
|
|
.IP "\fBtracer-min-branch-ratio\fR" 4
|
8541 |
|
|
.IX Item "tracer-min-branch-ratio"
|
8542 |
|
|
Stop reverse growth when the reverse probability of best edge is less than this
|
8543 |
|
|
threshold (in percent).
|
8544 |
|
|
.IP "\fBtracer-min-branch-ratio\fR" 4
|
8545 |
|
|
.IX Item "tracer-min-branch-ratio"
|
8546 |
|
|
.PD 0
|
8547 |
|
|
.IP "\fBtracer-min-branch-ratio-feedback\fR" 4
|
8548 |
|
|
.IX Item "tracer-min-branch-ratio-feedback"
|
8549 |
|
|
.PD
|
8550 |
|
|
Stop forward growth if the best edge has probability lower than this
|
8551 |
|
|
threshold.
|
8552 |
|
|
.Sp
|
8553 |
|
|
Similarly to \fBtracer-dynamic-coverage\fR two values are present, one for
|
8554 |
|
|
compilation for profile feedback and one for compilation without. The value
|
8555 |
|
|
for compilation with profile feedback needs to be more conservative (higher) in
|
8556 |
|
|
order to make tracer effective.
|
8557 |
|
|
.IP "\fBmax-cse-path-length\fR" 4
|
8558 |
|
|
.IX Item "max-cse-path-length"
|
8559 |
|
|
The maximum number of basic blocks on path that \s-1CSE\s0 considers.
|
8560 |
|
|
The default is 10.
|
8561 |
|
|
.IP "\fBmax-cse-insns\fR" 4
|
8562 |
|
|
.IX Item "max-cse-insns"
|
8563 |
|
|
The maximum number of instructions \s-1CSE\s0 processes before flushing.
|
8564 |
|
|
The default is 1000.
|
8565 |
|
|
.IP "\fBggc-min-expand\fR" 4
|
8566 |
|
|
.IX Item "ggc-min-expand"
|
8567 |
|
|
\&\s-1GCC\s0 uses a garbage collector to manage its own memory allocation. This
|
8568 |
|
|
parameter specifies the minimum percentage by which the garbage
|
8569 |
|
|
collector's heap should be allowed to expand between collections.
|
8570 |
|
|
Tuning this may improve compilation speed; it has no effect on code
|
8571 |
|
|
generation.
|
8572 |
|
|
.Sp
|
8573 |
|
|
The default is 30% + 70% * (\s-1RAM/1GB\s0) with an upper bound of 100% when
|
8574 |
|
|
\&\s-1RAM\s0 >= 1GB. If \f(CW\*(C`getrlimit\*(C'\fR is available, the notion of \*(L"\s-1RAM\s0\*(R" is
|
8575 |
|
|
the smallest of actual \s-1RAM\s0 and \f(CW\*(C`RLIMIT_DATA\*(C'\fR or \f(CW\*(C`RLIMIT_AS\*(C'\fR. If
|
8576 |
|
|
\&\s-1GCC\s0 is not able to calculate \s-1RAM\s0 on a particular platform, the lower
|
8577 |
|
|
bound of 30% is used. Setting this parameter and
|
8578 |
|
|
\&\fBggc-min-heapsize\fR to zero causes a full collection to occur at
|
8579 |
|
|
every opportunity. This is extremely slow, but can be useful for
|
8580 |
|
|
debugging.
|
8581 |
|
|
.IP "\fBggc-min-heapsize\fR" 4
|
8582 |
|
|
.IX Item "ggc-min-heapsize"
|
8583 |
|
|
Minimum size of the garbage collector's heap before it begins bothering
|
8584 |
|
|
to collect garbage. The first collection occurs after the heap expands
|
8585 |
|
|
by \fBggc-min-expand\fR% beyond \fBggc-min-heapsize\fR. Again,
|
8586 |
|
|
tuning this may improve compilation speed, and has no effect on code
|
8587 |
|
|
generation.
|
8588 |
|
|
.Sp
|
8589 |
|
|
The default is the smaller of \s-1RAM/8\s0, \s-1RLIMIT_RSS\s0, or a limit that
|
8590 |
|
|
tries to ensure that \s-1RLIMIT_DATA\s0 or \s-1RLIMIT_AS\s0 are not exceeded, but
|
8591 |
|
|
with a lower bound of 4096 (four megabytes) and an upper bound of
|
8592 |
|
|
131072 (128 megabytes). If \s-1GCC\s0 is not able to calculate \s-1RAM\s0 on a
|
8593 |
|
|
particular platform, the lower bound is used. Setting this parameter
|
8594 |
|
|
very large effectively disables garbage collection. Setting this
|
8595 |
|
|
parameter and \fBggc-min-expand\fR to zero causes a full collection
|
8596 |
|
|
to occur at every opportunity.
|
8597 |
|
|
.IP "\fBmax-reload-search-insns\fR" 4
|
8598 |
|
|
.IX Item "max-reload-search-insns"
|
8599 |
|
|
The maximum number of instruction reload should look backward for equivalent
|
8600 |
|
|
register. Increasing values mean more aggressive optimization, making the
|
8601 |
|
|
compilation time increase with probably slightly better performance.
|
8602 |
|
|
The default value is 100.
|
8603 |
|
|
.IP "\fBmax-cselib-memory-locations\fR" 4
|
8604 |
|
|
.IX Item "max-cselib-memory-locations"
|
8605 |
|
|
The maximum number of memory locations cselib should take into account.
|
8606 |
|
|
Increasing values mean more aggressive optimization, making the compilation time
|
8607 |
|
|
increase with probably slightly better performance. The default value is 500.
|
8608 |
|
|
.IP "\fBreorder-blocks-duplicate\fR" 4
|
8609 |
|
|
.IX Item "reorder-blocks-duplicate"
|
8610 |
|
|
.PD 0
|
8611 |
|
|
.IP "\fBreorder-blocks-duplicate-feedback\fR" 4
|
8612 |
|
|
.IX Item "reorder-blocks-duplicate-feedback"
|
8613 |
|
|
.PD
|
8614 |
|
|
Used by the basic block reordering pass to decide whether to use unconditional
|
8615 |
|
|
branch or duplicate the code on its destination. Code is duplicated when its
|
8616 |
|
|
estimated size is smaller than this value multiplied by the estimated size of
|
8617 |
|
|
unconditional jump in the hot spots of the program.
|
8618 |
|
|
.Sp
|
8619 |
|
|
The \fBreorder-block-duplicate-feedback\fR is used only when profile
|
8620 |
|
|
feedback is available. It may be set to higher values than
|
8621 |
|
|
\&\fBreorder-block-duplicate\fR since information about the hot spots is more
|
8622 |
|
|
accurate.
|
8623 |
|
|
.IP "\fBmax-sched-ready-insns\fR" 4
|
8624 |
|
|
.IX Item "max-sched-ready-insns"
|
8625 |
|
|
The maximum number of instructions ready to be issued the scheduler should
|
8626 |
|
|
consider at any given time during the first scheduling pass. Increasing
|
8627 |
|
|
values mean more thorough searches, making the compilation time increase
|
8628 |
|
|
with probably little benefit. The default value is 100.
|
8629 |
|
|
.IP "\fBmax-sched-region-blocks\fR" 4
|
8630 |
|
|
.IX Item "max-sched-region-blocks"
|
8631 |
|
|
The maximum number of blocks in a region to be considered for
|
8632 |
|
|
interblock scheduling. The default value is 10.
|
8633 |
|
|
.IP "\fBmax-pipeline-region-blocks\fR" 4
|
8634 |
|
|
.IX Item "max-pipeline-region-blocks"
|
8635 |
|
|
The maximum number of blocks in a region to be considered for
|
8636 |
|
|
pipelining in the selective scheduler. The default value is 15.
|
8637 |
|
|
.IP "\fBmax-sched-region-insns\fR" 4
|
8638 |
|
|
.IX Item "max-sched-region-insns"
|
8639 |
|
|
The maximum number of insns in a region to be considered for
|
8640 |
|
|
interblock scheduling. The default value is 100.
|
8641 |
|
|
.IP "\fBmax-pipeline-region-insns\fR" 4
|
8642 |
|
|
.IX Item "max-pipeline-region-insns"
|
8643 |
|
|
The maximum number of insns in a region to be considered for
|
8644 |
|
|
pipelining in the selective scheduler. The default value is 200.
|
8645 |
|
|
.IP "\fBmin-spec-prob\fR" 4
|
8646 |
|
|
.IX Item "min-spec-prob"
|
8647 |
|
|
The minimum probability (in percents) of reaching a source block
|
8648 |
|
|
for interblock speculative scheduling. The default value is 40.
|
8649 |
|
|
.IP "\fBmax-sched-extend-regions-iters\fR" 4
|
8650 |
|
|
.IX Item "max-sched-extend-regions-iters"
|
8651 |
|
|
The maximum number of iterations through \s-1CFG\s0 to extend regions.
|
8652 |
|
|
A value of 0 (the default) disables region extensions.
|
8653 |
|
|
.IP "\fBmax-sched-insn-conflict-delay\fR" 4
|
8654 |
|
|
.IX Item "max-sched-insn-conflict-delay"
|
8655 |
|
|
The maximum conflict delay for an insn to be considered for speculative motion.
|
8656 |
|
|
The default value is 3.
|
8657 |
|
|
.IP "\fBsched-spec-prob-cutoff\fR" 4
|
8658 |
|
|
.IX Item "sched-spec-prob-cutoff"
|
8659 |
|
|
The minimal probability of speculation success (in percents), so that
|
8660 |
|
|
speculative insns are scheduled.
|
8661 |
|
|
The default value is 40.
|
8662 |
|
|
.IP "\fBsched-spec-state-edge-prob-cutoff\fR" 4
|
8663 |
|
|
.IX Item "sched-spec-state-edge-prob-cutoff"
|
8664 |
|
|
The minimum probability an edge must have for the scheduler to save its
|
8665 |
|
|
state across it.
|
8666 |
|
|
The default value is 10.
|
8667 |
|
|
.IP "\fBsched-mem-true-dep-cost\fR" 4
|
8668 |
|
|
.IX Item "sched-mem-true-dep-cost"
|
8669 |
|
|
Minimal distance (in \s-1CPU\s0 cycles) between store and load targeting same
|
8670 |
|
|
memory locations. The default value is 1.
|
8671 |
|
|
.IP "\fBselsched-max-lookahead\fR" 4
|
8672 |
|
|
.IX Item "selsched-max-lookahead"
|
8673 |
|
|
The maximum size of the lookahead window of selective scheduling. It is a
|
8674 |
|
|
depth of search for available instructions.
|
8675 |
|
|
The default value is 50.
|
8676 |
|
|
.IP "\fBselsched-max-sched-times\fR" 4
|
8677 |
|
|
.IX Item "selsched-max-sched-times"
|
8678 |
|
|
The maximum number of times that an instruction is scheduled during
|
8679 |
|
|
selective scheduling. This is the limit on the number of iterations
|
8680 |
|
|
through which the instruction may be pipelined. The default value is 2.
|
8681 |
|
|
.IP "\fBselsched-max-insns-to-rename\fR" 4
|
8682 |
|
|
.IX Item "selsched-max-insns-to-rename"
|
8683 |
|
|
The maximum number of best instructions in the ready list that are considered
|
8684 |
|
|
for renaming in the selective scheduler. The default value is 2.
|
8685 |
|
|
.IP "\fBsms-min-sc\fR" 4
|
8686 |
|
|
.IX Item "sms-min-sc"
|
8687 |
|
|
The minimum value of stage count that swing modulo scheduler
|
8688 |
|
|
generates. The default value is 2.
|
8689 |
|
|
.IP "\fBmax-last-value-rtl\fR" 4
|
8690 |
|
|
.IX Item "max-last-value-rtl"
|
8691 |
|
|
The maximum size measured as number of RTLs that can be recorded in an expression
|
8692 |
|
|
in combiner for a pseudo register as last known value of that register. The default
|
8693 |
|
|
is 10000.
|
8694 |
|
|
.IP "\fBinteger-share-limit\fR" 4
|
8695 |
|
|
.IX Item "integer-share-limit"
|
8696 |
|
|
Small integer constants can use a shared data structure, reducing the
|
8697 |
|
|
compiler's memory usage and increasing its speed. This sets the maximum
|
8698 |
|
|
value of a shared integer constant. The default value is 256.
|
8699 |
|
|
.IP "\fBssp-buffer-size\fR" 4
|
8700 |
|
|
.IX Item "ssp-buffer-size"
|
8701 |
|
|
The minimum size of buffers (i.e. arrays) that receive stack smashing
|
8702 |
|
|
protection when \fB\-fstack\-protection\fR is used.
|
8703 |
|
|
.IP "\fBmax-jump-thread-duplication-stmts\fR" 4
|
8704 |
|
|
.IX Item "max-jump-thread-duplication-stmts"
|
8705 |
|
|
Maximum number of statements allowed in a block that needs to be
|
8706 |
|
|
duplicated when threading jumps.
|
8707 |
|
|
.IP "\fBmax-fields-for-field-sensitive\fR" 4
|
8708 |
|
|
.IX Item "max-fields-for-field-sensitive"
|
8709 |
|
|
Maximum number of fields in a structure treated in
|
8710 |
|
|
a field sensitive manner during pointer analysis. The default is zero
|
8711 |
|
|
for \fB\-O0\fR and \fB\-O1\fR,
|
8712 |
|
|
and 100 for \fB\-Os\fR, \fB\-O2\fR, and \fB\-O3\fR.
|
8713 |
|
|
.IP "\fBprefetch-latency\fR" 4
|
8714 |
|
|
.IX Item "prefetch-latency"
|
8715 |
|
|
Estimate on average number of instructions that are executed before
|
8716 |
|
|
prefetch finishes. The distance prefetched ahead is proportional
|
8717 |
|
|
to this constant. Increasing this number may also lead to less
|
8718 |
|
|
streams being prefetched (see \fBsimultaneous-prefetches\fR).
|
8719 |
|
|
.IP "\fBsimultaneous-prefetches\fR" 4
|
8720 |
|
|
.IX Item "simultaneous-prefetches"
|
8721 |
|
|
Maximum number of prefetches that can run at the same time.
|
8722 |
|
|
.IP "\fBl1\-cache\-line\-size\fR" 4
|
8723 |
|
|
.IX Item "l1-cache-line-size"
|
8724 |
|
|
The size of cache line in L1 cache, in bytes.
|
8725 |
|
|
.IP "\fBl1\-cache\-size\fR" 4
|
8726 |
|
|
.IX Item "l1-cache-size"
|
8727 |
|
|
The size of L1 cache, in kilobytes.
|
8728 |
|
|
.IP "\fBl2\-cache\-size\fR" 4
|
8729 |
|
|
.IX Item "l2-cache-size"
|
8730 |
|
|
The size of L2 cache, in kilobytes.
|
8731 |
|
|
.IP "\fBmin-insn-to-prefetch-ratio\fR" 4
|
8732 |
|
|
.IX Item "min-insn-to-prefetch-ratio"
|
8733 |
|
|
The minimum ratio between the number of instructions and the
|
8734 |
|
|
number of prefetches to enable prefetching in a loop.
|
8735 |
|
|
.IP "\fBprefetch-min-insn-to-mem-ratio\fR" 4
|
8736 |
|
|
.IX Item "prefetch-min-insn-to-mem-ratio"
|
8737 |
|
|
The minimum ratio between the number of instructions and the
|
8738 |
|
|
number of memory references to enable prefetching in a loop.
|
8739 |
|
|
.IP "\fBuse-canonical-types\fR" 4
|
8740 |
|
|
.IX Item "use-canonical-types"
|
8741 |
|
|
Whether the compiler should use the \*(L"canonical\*(R" type system. By
|
8742 |
|
|
default, this should always be 1, which uses a more efficient internal
|
8743 |
|
|
mechanism for comparing types in \*(C+ and Objective\-\*(C+. However, if
|
8744 |
|
|
bugs in the canonical type system are causing compilation failures,
|
8745 |
|
|
set this value to 0 to disable canonical types.
|
8746 |
|
|
.IP "\fBswitch-conversion-max-branch-ratio\fR" 4
|
8747 |
|
|
.IX Item "switch-conversion-max-branch-ratio"
|
8748 |
|
|
Switch initialization conversion refuses to create arrays that are
|
8749 |
|
|
bigger than \fBswitch-conversion-max-branch-ratio\fR times the number of
|
8750 |
|
|
branches in the switch.
|
8751 |
|
|
.IP "\fBmax-partial-antic-length\fR" 4
|
8752 |
|
|
.IX Item "max-partial-antic-length"
|
8753 |
|
|
Maximum length of the partial antic set computed during the tree
|
8754 |
|
|
partial redundancy elimination optimization (\fB\-ftree\-pre\fR) when
|
8755 |
|
|
optimizing at \fB\-O3\fR and above. For some sorts of source code
|
8756 |
|
|
the enhanced partial redundancy elimination optimization can run away,
|
8757 |
|
|
consuming all of the memory available on the host machine. This
|
8758 |
|
|
parameter sets a limit on the length of the sets that are computed,
|
8759 |
|
|
which prevents the runaway behavior. Setting a value of 0 for
|
8760 |
|
|
this parameter allows an unlimited set length.
|
8761 |
|
|
.IP "\fBsccvn-max-scc-size\fR" 4
|
8762 |
|
|
.IX Item "sccvn-max-scc-size"
|
8763 |
|
|
Maximum size of a strongly connected component (\s-1SCC\s0) during \s-1SCCVN\s0
|
8764 |
|
|
processing. If this limit is hit, \s-1SCCVN\s0 processing for the whole
|
8765 |
|
|
function is not done and optimizations depending on it are
|
8766 |
|
|
disabled. The default maximum \s-1SCC\s0 size is 10000.
|
8767 |
|
|
.IP "\fBsccvn-max-alias-queries-per-access\fR" 4
|
8768 |
|
|
.IX Item "sccvn-max-alias-queries-per-access"
|
8769 |
|
|
Maximum number of alias-oracle queries we perform when looking for
|
8770 |
|
|
redundancies for loads and stores. If this limit is hit the search
|
8771 |
|
|
is aborted and the load or store is not considered redundant. The
|
8772 |
|
|
number of queries is algorithmically limited to the number of
|
8773 |
|
|
stores on all paths from the load to the function entry.
|
8774 |
|
|
The default maxmimum number of queries is 1000.
|
8775 |
|
|
.IP "\fBira-max-loops-num\fR" 4
|
8776 |
|
|
.IX Item "ira-max-loops-num"
|
8777 |
|
|
\&\s-1IRA\s0 uses regional register allocation by default. If a function
|
8778 |
|
|
contains more loops than the number given by this parameter, only at most
|
8779 |
|
|
the given number of the most frequently-executed loops form regions
|
8780 |
|
|
for regional register allocation. The default value of the
|
8781 |
|
|
parameter is 100.
|
8782 |
|
|
.IP "\fBira-max-conflict-table-size\fR" 4
|
8783 |
|
|
.IX Item "ira-max-conflict-table-size"
|
8784 |
|
|
Although \s-1IRA\s0 uses a sophisticated algorithm to compress the conflict
|
8785 |
|
|
table, the table can still require excessive amounts of memory for
|
8786 |
|
|
huge functions. If the conflict table for a function could be more
|
8787 |
|
|
than the size in \s-1MB\s0 given by this parameter, the register allocator
|
8788 |
|
|
instead uses a faster, simpler, and lower-quality
|
8789 |
|
|
algorithm that does not require building a pseudo-register conflict table.
|
8790 |
|
|
The default value of the parameter is 2000.
|
8791 |
|
|
.IP "\fBira-loop-reserved-regs\fR" 4
|
8792 |
|
|
.IX Item "ira-loop-reserved-regs"
|
8793 |
|
|
\&\s-1IRA\s0 can be used to evaluate more accurate register pressure in loops
|
8794 |
|
|
for decisions to move loop invariants (see \fB\-O3\fR). The number
|
8795 |
|
|
of available registers reserved for some other purposes is given
|
8796 |
|
|
by this parameter. The default value of the parameter is 2, which is
|
8797 |
|
|
the minimal number of registers needed by typical instructions.
|
8798 |
|
|
This value is the best found from numerous experiments.
|
8799 |
|
|
.IP "\fBloop-invariant-max-bbs-in-loop\fR" 4
|
8800 |
|
|
.IX Item "loop-invariant-max-bbs-in-loop"
|
8801 |
|
|
Loop invariant motion can be very expensive, both in compilation time and
|
8802 |
|
|
in amount of needed compile-time memory, with very large loops. Loops
|
8803 |
|
|
with more basic blocks than this parameter won't have loop invariant
|
8804 |
|
|
motion optimization performed on them. The default value of the
|
8805 |
|
|
parameter is 1000 for \fB\-O1\fR and 10000 for \fB\-O2\fR and above.
|
8806 |
|
|
.IP "\fBloop-max-datarefs-for-datadeps\fR" 4
|
8807 |
|
|
.IX Item "loop-max-datarefs-for-datadeps"
|
8808 |
|
|
Building data dapendencies is expensive for very large loops. This
|
8809 |
|
|
parameter limits the number of data references in loops that are
|
8810 |
|
|
considered for data dependence analysis. These large loops are no
|
8811 |
|
|
handled by the optimizations using loop data dependencies.
|
8812 |
|
|
The default value is 1000.
|
8813 |
|
|
.IP "\fBmax-vartrack-size\fR" 4
|
8814 |
|
|
.IX Item "max-vartrack-size"
|
8815 |
|
|
Sets a maximum number of hash table slots to use during variable
|
8816 |
|
|
tracking dataflow analysis of any function. If this limit is exceeded
|
8817 |
|
|
with variable tracking at assignments enabled, analysis for that
|
8818 |
|
|
function is retried without it, after removing all debug insns from
|
8819 |
|
|
the function. If the limit is exceeded even without debug insns, var
|
8820 |
|
|
tracking analysis is completely disabled for the function. Setting
|
8821 |
|
|
the parameter to zero makes it unlimited.
|
8822 |
|
|
.IP "\fBmax-vartrack-expr-depth\fR" 4
|
8823 |
|
|
.IX Item "max-vartrack-expr-depth"
|
8824 |
|
|
Sets a maximum number of recursion levels when attempting to map
|
8825 |
|
|
variable names or debug temporaries to value expressions. This trades
|
8826 |
|
|
compilation time for more complete debug information. If this is set too
|
8827 |
|
|
low, value expressions that are available and could be represented in
|
8828 |
|
|
debug information may end up not being used; setting this higher may
|
8829 |
|
|
enable the compiler to find more complex debug expressions, but compile
|
8830 |
|
|
time and memory use may grow. The default is 12.
|
8831 |
|
|
.IP "\fBmin-nondebug-insn-uid\fR" 4
|
8832 |
|
|
.IX Item "min-nondebug-insn-uid"
|
8833 |
|
|
Use uids starting at this parameter for nondebug insns. The range below
|
8834 |
|
|
the parameter is reserved exclusively for debug insns created by
|
8835 |
|
|
\&\fB\-fvar\-tracking\-assignments\fR, but debug insns may get
|
8836 |
|
|
(non-overlapping) uids above it if the reserved range is exhausted.
|
8837 |
|
|
.IP "\fBipa-sra-ptr-growth-factor\fR" 4
|
8838 |
|
|
.IX Item "ipa-sra-ptr-growth-factor"
|
8839 |
|
|
IPA-SRA replaces a pointer to an aggregate with one or more new
|
8840 |
|
|
parameters only when their cumulative size is less or equal to
|
8841 |
|
|
\&\fBipa-sra-ptr-growth-factor\fR times the size of the original
|
8842 |
|
|
pointer parameter.
|
8843 |
|
|
.IP "\fBtm-max-aggregate-size\fR" 4
|
8844 |
|
|
.IX Item "tm-max-aggregate-size"
|
8845 |
|
|
When making copies of thread-local variables in a transaction, this
|
8846 |
|
|
parameter specifies the size in bytes after which variables are
|
8847 |
|
|
saved with the logging functions as opposed to save/restore code
|
8848 |
|
|
sequence pairs. This option only applies when using
|
8849 |
|
|
\&\fB\-fgnu\-tm\fR.
|
8850 |
|
|
.IP "\fBgraphite-max-nb-scop-params\fR" 4
|
8851 |
|
|
.IX Item "graphite-max-nb-scop-params"
|
8852 |
|
|
To avoid exponential effects in the Graphite loop transforms, the
|
8853 |
|
|
number of parameters in a Static Control Part (SCoP) is bounded. The
|
8854 |
|
|
default value is 10 parameters. A variable whose value is unknown at
|
8855 |
|
|
compilation time and defined outside a SCoP is a parameter of the SCoP.
|
8856 |
|
|
.IP "\fBgraphite-max-bbs-per-function\fR" 4
|
8857 |
|
|
.IX Item "graphite-max-bbs-per-function"
|
8858 |
|
|
To avoid exponential effects in the detection of SCoPs, the size of
|
8859 |
|
|
the functions analyzed by Graphite is bounded. The default value is
|
8860 |
|
|
100 basic blocks.
|
8861 |
|
|
.IP "\fBloop-block-tile-size\fR" 4
|
8862 |
|
|
.IX Item "loop-block-tile-size"
|
8863 |
|
|
Loop blocking or strip mining transforms, enabled with
|
8864 |
|
|
\&\fB\-floop\-block\fR or \fB\-floop\-strip\-mine\fR, strip mine each
|
8865 |
|
|
loop in the loop nest by a given number of iterations. The strip
|
8866 |
|
|
length can be changed using the \fBloop-block-tile-size\fR
|
8867 |
|
|
parameter. The default value is 51 iterations.
|
8868 |
|
|
.IP "\fBipa-cp-value-list-size\fR" 4
|
8869 |
|
|
.IX Item "ipa-cp-value-list-size"
|
8870 |
|
|
IPA-CP attempts to track all possible values and types passed to a function's
|
8871 |
|
|
parameter in order to propagate them and perform devirtualization.
|
8872 |
|
|
\&\fBipa-cp-value-list-size\fR is the maximum number of values and types it
|
8873 |
|
|
stores per one formal parameter of a function.
|
8874 |
|
|
.IP "\fBlto-partitions\fR" 4
|
8875 |
|
|
.IX Item "lto-partitions"
|
8876 |
|
|
Specify desired number of partitions produced during \s-1WHOPR\s0 compilation.
|
8877 |
|
|
The number of partitions should exceed the number of CPUs used for compilation.
|
8878 |
|
|
The default value is 32.
|
8879 |
|
|
.IP "\fBlto-minpartition\fR" 4
|
8880 |
|
|
.IX Item "lto-minpartition"
|
8881 |
|
|
Size of minimal partition for \s-1WHOPR\s0 (in estimated instructions).
|
8882 |
|
|
This prevents expenses of splitting very small programs into too many
|
8883 |
|
|
partitions.
|
8884 |
|
|
.IP "\fBcxx-max-namespaces-for-diagnostic-help\fR" 4
|
8885 |
|
|
.IX Item "cxx-max-namespaces-for-diagnostic-help"
|
8886 |
|
|
The maximum number of namespaces to consult for suggestions when \*(C+
|
8887 |
|
|
name lookup fails for an identifier. The default is 1000.
|
8888 |
|
|
.IP "\fBsink-frequency-threshold\fR" 4
|
8889 |
|
|
.IX Item "sink-frequency-threshold"
|
8890 |
|
|
The maximum relative execution frequency (in percents) of the target block
|
8891 |
|
|
relative to a statement's original block to allow statement sinking of a
|
8892 |
|
|
statement. Larger numbers result in more aggressive statement sinking.
|
8893 |
|
|
The default value is 75. A small positive adjustment is applied for
|
8894 |
|
|
statements with memory operands as those are even more profitable so sink.
|
8895 |
|
|
.IP "\fBmax-stores-to-sink\fR" 4
|
8896 |
|
|
.IX Item "max-stores-to-sink"
|
8897 |
|
|
The maximum number of conditional stores paires that can be sunk. Set to 0
|
8898 |
|
|
if either vectorization (\fB\-ftree\-vectorize\fR) or if-conversion
|
8899 |
|
|
(\fB\-ftree\-loop\-if\-convert\fR) is disabled. The default is 2.
|
8900 |
|
|
.IP "\fBallow-load-data-races\fR" 4
|
8901 |
|
|
.IX Item "allow-load-data-races"
|
8902 |
|
|
Allow optimizers to introduce new data races on loads.
|
8903 |
|
|
Set to 1 to allow, otherwise to 0. This option is enabled by default
|
8904 |
|
|
unless implicitly set by the \fB\-fmemory\-model=\fR option.
|
8905 |
|
|
.IP "\fBallow-store-data-races\fR" 4
|
8906 |
|
|
.IX Item "allow-store-data-races"
|
8907 |
|
|
Allow optimizers to introduce new data races on stores.
|
8908 |
|
|
Set to 1 to allow, otherwise to 0. This option is enabled by default
|
8909 |
|
|
unless implicitly set by the \fB\-fmemory\-model=\fR option.
|
8910 |
|
|
.IP "\fBallow-packed-load-data-races\fR" 4
|
8911 |
|
|
.IX Item "allow-packed-load-data-races"
|
8912 |
|
|
Allow optimizers to introduce new data races on packed data loads.
|
8913 |
|
|
Set to 1 to allow, otherwise to 0. This option is enabled by default
|
8914 |
|
|
unless implicitly set by the \fB\-fmemory\-model=\fR option.
|
8915 |
|
|
.IP "\fBallow-packed-store-data-races\fR" 4
|
8916 |
|
|
.IX Item "allow-packed-store-data-races"
|
8917 |
|
|
Allow optimizers to introduce new data races on packed data stores.
|
8918 |
|
|
Set to 1 to allow, otherwise to 0. This option is enabled by default
|
8919 |
|
|
unless implicitly set by the \fB\-fmemory\-model=\fR option.
|
8920 |
|
|
.IP "\fBcase-values-threshold\fR" 4
|
8921 |
|
|
.IX Item "case-values-threshold"
|
8922 |
|
|
The smallest number of different values for which it is best to use a
|
8923 |
|
|
jump-table instead of a tree of conditional branches. If the value is
|
8924 |
|
|
0, use the default for the machine. The default is 0.
|
8925 |
|
|
.IP "\fBtree-reassoc-width\fR" 4
|
8926 |
|
|
.IX Item "tree-reassoc-width"
|
8927 |
|
|
Set the maximum number of instructions executed in parallel in
|
8928 |
|
|
reassociated tree. This parameter overrides target dependent
|
8929 |
|
|
heuristics used by default if has non zero value.
|
8930 |
|
|
.IP "\fBsched-pressure-algorithm\fR" 4
|
8931 |
|
|
.IX Item "sched-pressure-algorithm"
|
8932 |
|
|
Choose between the two available implementations of
|
8933 |
|
|
\&\fB\-fsched\-pressure\fR. Algorithm 1 is the original implementation
|
8934 |
|
|
and is the more likely to prevent instructions from being reordered.
|
8935 |
|
|
Algorithm 2 was designed to be a compromise between the relatively
|
8936 |
|
|
conservative approach taken by algorithm 1 and the rather aggressive
|
8937 |
|
|
approach taken by the default scheduler. It relies more heavily on
|
8938 |
|
|
having a regular register file and accurate register pressure classes.
|
8939 |
|
|
See \fIhaifa\-sched.c\fR in the \s-1GCC\s0 sources for more details.
|
8940 |
|
|
.Sp
|
8941 |
|
|
The default choice depends on the target.
|
8942 |
|
|
.IP "\fBmax-slsr-cand-scan\fR" 4
|
8943 |
|
|
.IX Item "max-slsr-cand-scan"
|
8944 |
|
|
Set the maximum number of existing candidates that will be considered when
|
8945 |
|
|
seeking a basis for a new straight-line strength reduction candidate.
|
8946 |
|
|
.RE
|
8947 |
|
|
.RS 4
|
8948 |
|
|
.RE
|
8949 |
|
|
.SS "Options Controlling the Preprocessor"
|
8950 |
|
|
.IX Subsection "Options Controlling the Preprocessor"
|
8951 |
|
|
These options control the C preprocessor, which is run on each C source
|
8952 |
|
|
file before actual compilation.
|
8953 |
|
|
.PP
|
8954 |
|
|
If you use the \fB\-E\fR option, nothing is done except preprocessing.
|
8955 |
|
|
Some of these options make sense only together with \fB\-E\fR because
|
8956 |
|
|
they cause the preprocessor output to be unsuitable for actual
|
8957 |
|
|
compilation.
|
8958 |
|
|
.IP "\fB\-Wp,\fR\fIoption\fR" 4
|
8959 |
|
|
.IX Item "-Wp,option"
|
8960 |
|
|
You can use \fB\-Wp,\fR\fIoption\fR to bypass the compiler driver
|
8961 |
|
|
and pass \fIoption\fR directly through to the preprocessor. If
|
8962 |
|
|
\&\fIoption\fR contains commas, it is split into multiple options at the
|
8963 |
|
|
commas. However, many options are modified, translated or interpreted
|
8964 |
|
|
by the compiler driver before being passed to the preprocessor, and
|
8965 |
|
|
\&\fB\-Wp\fR forcibly bypasses this phase. The preprocessor's direct
|
8966 |
|
|
interface is undocumented and subject to change, so whenever possible
|
8967 |
|
|
you should avoid using \fB\-Wp\fR and let the driver handle the
|
8968 |
|
|
options instead.
|
8969 |
|
|
.IP "\fB\-Xpreprocessor\fR \fIoption\fR" 4
|
8970 |
|
|
.IX Item "-Xpreprocessor option"
|
8971 |
|
|
Pass \fIoption\fR as an option to the preprocessor. You can use this to
|
8972 |
|
|
supply system-specific preprocessor options that \s-1GCC\s0 does not
|
8973 |
|
|
recognize.
|
8974 |
|
|
.Sp
|
8975 |
|
|
If you want to pass an option that takes an argument, you must use
|
8976 |
|
|
\&\fB\-Xpreprocessor\fR twice, once for the option and once for the argument.
|
8977 |
|
|
.IP "\fB\-no\-integrated\-cpp\fR" 4
|
8978 |
|
|
.IX Item "-no-integrated-cpp"
|
8979 |
|
|
Perform preprocessing as a separate pass before compilation.
|
8980 |
|
|
By default, \s-1GCC\s0 performs preprocessing as an integrated part of
|
8981 |
|
|
input tokenization and parsing.
|
8982 |
|
|
If this option is provided, the appropriate language front end
|
8983 |
|
|
(\fBcc1\fR, \fBcc1plus\fR, or \fBcc1obj\fR for C, \*(C+,
|
8984 |
|
|
and Objective-C, respectively) is instead invoked twice,
|
8985 |
|
|
once for preprocessing only and once for actual compilation
|
8986 |
|
|
of the preprocessed input.
|
8987 |
|
|
This option may be useful in conjunction with the \fB\-B\fR or
|
8988 |
|
|
\&\fB\-wrapper\fR options to specify an alternate preprocessor or
|
8989 |
|
|
perform additional processing of the program source between
|
8990 |
|
|
normal preprocessing and compilation.
|
8991 |
|
|
.IP "\fB\-D\fR \fIname\fR" 4
|
8992 |
|
|
.IX Item "-D name"
|
8993 |
|
|
Predefine \fIname\fR as a macro, with definition \f(CW1\fR.
|
8994 |
|
|
.IP "\fB\-D\fR \fIname\fR\fB=\fR\fIdefinition\fR" 4
|
8995 |
|
|
.IX Item "-D name=definition"
|
8996 |
|
|
The contents of \fIdefinition\fR are tokenized and processed as if
|
8997 |
|
|
they appeared during translation phase three in a \fB#define\fR
|
8998 |
|
|
directive. In particular, the definition will be truncated by
|
8999 |
|
|
embedded newline characters.
|
9000 |
|
|
.Sp
|
9001 |
|
|
If you are invoking the preprocessor from a shell or shell-like
|
9002 |
|
|
program you may need to use the shell's quoting syntax to protect
|
9003 |
|
|
characters such as spaces that have a meaning in the shell syntax.
|
9004 |
|
|
.Sp
|
9005 |
|
|
If you wish to define a function-like macro on the command line, write
|
9006 |
|
|
its argument list with surrounding parentheses before the equals sign
|
9007 |
|
|
(if any). Parentheses are meaningful to most shells, so you will need
|
9008 |
|
|
to quote the option. With \fBsh\fR and \fBcsh\fR,
|
9009 |
|
|
\&\fB\-D'\fR\fIname\fR\fB(\fR\fIargs...\fR\fB)=\fR\fIdefinition\fR\fB'\fR works.
|
9010 |
|
|
.Sp
|
9011 |
|
|
\&\fB\-D\fR and \fB\-U\fR options are processed in the order they
|
9012 |
|
|
are given on the command line. All \fB\-imacros\fR \fIfile\fR and
|
9013 |
|
|
\&\fB\-include\fR \fIfile\fR options are processed after all
|
9014 |
|
|
\&\fB\-D\fR and \fB\-U\fR options.
|
9015 |
|
|
.IP "\fB\-U\fR \fIname\fR" 4
|
9016 |
|
|
.IX Item "-U name"
|
9017 |
|
|
Cancel any previous definition of \fIname\fR, either built in or
|
9018 |
|
|
provided with a \fB\-D\fR option.
|
9019 |
|
|
.IP "\fB\-undef\fR" 4
|
9020 |
|
|
.IX Item "-undef"
|
9021 |
|
|
Do not predefine any system-specific or GCC-specific macros. The
|
9022 |
|
|
standard predefined macros remain defined.
|
9023 |
|
|
.IP "\fB\-I\fR \fIdir\fR" 4
|
9024 |
|
|
.IX Item "-I dir"
|
9025 |
|
|
Add the directory \fIdir\fR to the list of directories to be searched
|
9026 |
|
|
for header files.
|
9027 |
|
|
Directories named by \fB\-I\fR are searched before the standard
|
9028 |
|
|
system include directories. If the directory \fIdir\fR is a standard
|
9029 |
|
|
system include directory, the option is ignored to ensure that the
|
9030 |
|
|
default search order for system directories and the special treatment
|
9031 |
|
|
of system headers are not defeated
|
9032 |
|
|
\&.
|
9033 |
|
|
If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
|
9034 |
|
|
by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
|
9035 |
|
|
.IP "\fB\-o\fR \fIfile\fR" 4
|
9036 |
|
|
.IX Item "-o file"
|
9037 |
|
|
Write output to \fIfile\fR. This is the same as specifying \fIfile\fR
|
9038 |
|
|
as the second non-option argument to \fBcpp\fR. \fBgcc\fR has a
|
9039 |
|
|
different interpretation of a second non-option argument, so you must
|
9040 |
|
|
use \fB\-o\fR to specify the output file.
|
9041 |
|
|
.IP "\fB\-Wall\fR" 4
|
9042 |
|
|
.IX Item "-Wall"
|
9043 |
|
|
Turns on all optional warnings which are desirable for normal code.
|
9044 |
|
|
At present this is \fB\-Wcomment\fR, \fB\-Wtrigraphs\fR,
|
9045 |
|
|
\&\fB\-Wmultichar\fR and a warning about integer promotion causing a
|
9046 |
|
|
change of sign in \f(CW\*(C`#if\*(C'\fR expressions. Note that many of the
|
9047 |
|
|
preprocessor's warnings are on by default and have no options to
|
9048 |
|
|
control them.
|
9049 |
|
|
.IP "\fB\-Wcomment\fR" 4
|
9050 |
|
|
.IX Item "-Wcomment"
|
9051 |
|
|
.PD 0
|
9052 |
|
|
.IP "\fB\-Wcomments\fR" 4
|
9053 |
|
|
.IX Item "-Wcomments"
|
9054 |
|
|
.PD
|
9055 |
|
|
Warn whenever a comment-start sequence \fB/*\fR appears in a \fB/*\fR
|
9056 |
|
|
comment, or whenever a backslash-newline appears in a \fB//\fR comment.
|
9057 |
|
|
(Both forms have the same effect.)
|
9058 |
|
|
.IP "\fB\-Wtrigraphs\fR" 4
|
9059 |
|
|
.IX Item "-Wtrigraphs"
|
9060 |
|
|
Most trigraphs in comments cannot affect the meaning of the program.
|
9061 |
|
|
However, a trigraph that would form an escaped newline (\fB??/\fR at
|
9062 |
|
|
the end of a line) can, by changing where the comment begins or ends.
|
9063 |
|
|
Therefore, only trigraphs that would form escaped newlines produce
|
9064 |
|
|
warnings inside a comment.
|
9065 |
|
|
.Sp
|
9066 |
|
|
This option is implied by \fB\-Wall\fR. If \fB\-Wall\fR is not
|
9067 |
|
|
given, this option is still enabled unless trigraphs are enabled. To
|
9068 |
|
|
get trigraph conversion without warnings, but get the other
|
9069 |
|
|
\&\fB\-Wall\fR warnings, use \fB\-trigraphs \-Wall \-Wno\-trigraphs\fR.
|
9070 |
|
|
.IP "\fB\-Wtraditional\fR" 4
|
9071 |
|
|
.IX Item "-Wtraditional"
|
9072 |
|
|
Warn about certain constructs that behave differently in traditional and
|
9073 |
|
|
\&\s-1ISO\s0 C. Also warn about \s-1ISO\s0 C constructs that have no traditional C
|
9074 |
|
|
equivalent, and problematic constructs which should be avoided.
|
9075 |
|
|
.IP "\fB\-Wundef\fR" 4
|
9076 |
|
|
.IX Item "-Wundef"
|
9077 |
|
|
Warn whenever an identifier which is not a macro is encountered in an
|
9078 |
|
|
\&\fB#if\fR directive, outside of \fBdefined\fR. Such identifiers are
|
9079 |
|
|
replaced with zero.
|
9080 |
|
|
.IP "\fB\-Wunused\-macros\fR" 4
|
9081 |
|
|
.IX Item "-Wunused-macros"
|
9082 |
|
|
Warn about macros defined in the main file that are unused. A macro
|
9083 |
|
|
is \fIused\fR if it is expanded or tested for existence at least once.
|
9084 |
|
|
The preprocessor will also warn if the macro has not been used at the
|
9085 |
|
|
time it is redefined or undefined.
|
9086 |
|
|
.Sp
|
9087 |
|
|
Built-in macros, macros defined on the command line, and macros
|
9088 |
|
|
defined in include files are not warned about.
|
9089 |
|
|
.Sp
|
9090 |
|
|
\&\fINote:\fR If a macro is actually used, but only used in skipped
|
9091 |
|
|
conditional blocks, then \s-1CPP\s0 will report it as unused. To avoid the
|
9092 |
|
|
warning in such a case, you might improve the scope of the macro's
|
9093 |
|
|
definition by, for example, moving it into the first skipped block.
|
9094 |
|
|
Alternatively, you could provide a dummy use with something like:
|
9095 |
|
|
.Sp
|
9096 |
|
|
.Vb 2
|
9097 |
|
|
\& #if defined the_macro_causing_the_warning
|
9098 |
|
|
\& #endif
|
9099 |
|
|
.Ve
|
9100 |
|
|
.IP "\fB\-Wendif\-labels\fR" 4
|
9101 |
|
|
.IX Item "-Wendif-labels"
|
9102 |
|
|
Warn whenever an \fB#else\fR or an \fB#endif\fR are followed by text.
|
9103 |
|
|
This usually happens in code of the form
|
9104 |
|
|
.Sp
|
9105 |
|
|
.Vb 5
|
9106 |
|
|
\& #if FOO
|
9107 |
|
|
\& ...
|
9108 |
|
|
\& #else FOO
|
9109 |
|
|
\& ...
|
9110 |
|
|
\& #endif FOO
|
9111 |
|
|
.Ve
|
9112 |
|
|
.Sp
|
9113 |
|
|
The second and third \f(CW\*(C`FOO\*(C'\fR should be in comments, but often are not
|
9114 |
|
|
in older programs. This warning is on by default.
|
9115 |
|
|
.IP "\fB\-Werror\fR" 4
|
9116 |
|
|
.IX Item "-Werror"
|
9117 |
|
|
Make all warnings into hard errors. Source code which triggers warnings
|
9118 |
|
|
will be rejected.
|
9119 |
|
|
.IP "\fB\-Wsystem\-headers\fR" 4
|
9120 |
|
|
.IX Item "-Wsystem-headers"
|
9121 |
|
|
Issue warnings for code in system headers. These are normally unhelpful
|
9122 |
|
|
in finding bugs in your own code, therefore suppressed. If you are
|
9123 |
|
|
responsible for the system library, you may want to see them.
|
9124 |
|
|
.IP "\fB\-w\fR" 4
|
9125 |
|
|
.IX Item "-w"
|
9126 |
|
|
Suppress all warnings, including those which \s-1GNU\s0 \s-1CPP\s0 issues by default.
|
9127 |
|
|
.IP "\fB\-pedantic\fR" 4
|
9128 |
|
|
.IX Item "-pedantic"
|
9129 |
|
|
Issue all the mandatory diagnostics listed in the C standard. Some of
|
9130 |
|
|
them are left out by default, since they trigger frequently on harmless
|
9131 |
|
|
code.
|
9132 |
|
|
.IP "\fB\-pedantic\-errors\fR" 4
|
9133 |
|
|
.IX Item "-pedantic-errors"
|
9134 |
|
|
Issue all the mandatory diagnostics, and make all mandatory diagnostics
|
9135 |
|
|
into errors. This includes mandatory diagnostics that \s-1GCC\s0 issues
|
9136 |
|
|
without \fB\-pedantic\fR but treats as warnings.
|
9137 |
|
|
.IP "\fB\-M\fR" 4
|
9138 |
|
|
.IX Item "-M"
|
9139 |
|
|
Instead of outputting the result of preprocessing, output a rule
|
9140 |
|
|
suitable for \fBmake\fR describing the dependencies of the main
|
9141 |
|
|
source file. The preprocessor outputs one \fBmake\fR rule containing
|
9142 |
|
|
the object file name for that source file, a colon, and the names of all
|
9143 |
|
|
the included files, including those coming from \fB\-include\fR or
|
9144 |
|
|
\&\fB\-imacros\fR command line options.
|
9145 |
|
|
.Sp
|
9146 |
|
|
Unless specified explicitly (with \fB\-MT\fR or \fB\-MQ\fR), the
|
9147 |
|
|
object file name consists of the name of the source file with any
|
9148 |
|
|
suffix replaced with object file suffix and with any leading directory
|
9149 |
|
|
parts removed. If there are many included files then the rule is
|
9150 |
|
|
split into several lines using \fB\e\fR\-newline. The rule has no
|
9151 |
|
|
commands.
|
9152 |
|
|
.Sp
|
9153 |
|
|
This option does not suppress the preprocessor's debug output, such as
|
9154 |
|
|
\&\fB\-dM\fR. To avoid mixing such debug output with the dependency
|
9155 |
|
|
rules you should explicitly specify the dependency output file with
|
9156 |
|
|
\&\fB\-MF\fR, or use an environment variable like
|
9157 |
|
|
\&\fB\s-1DEPENDENCIES_OUTPUT\s0\fR. Debug output
|
9158 |
|
|
will still be sent to the regular output stream as normal.
|
9159 |
|
|
.Sp
|
9160 |
|
|
Passing \fB\-M\fR to the driver implies \fB\-E\fR, and suppresses
|
9161 |
|
|
warnings with an implicit \fB\-w\fR.
|
9162 |
|
|
.IP "\fB\-MM\fR" 4
|
9163 |
|
|
.IX Item "-MM"
|
9164 |
|
|
Like \fB\-M\fR but do not mention header files that are found in
|
9165 |
|
|
system header directories, nor header files that are included,
|
9166 |
|
|
directly or indirectly, from such a header.
|
9167 |
|
|
.Sp
|
9168 |
|
|
This implies that the choice of angle brackets or double quotes in an
|
9169 |
|
|
\&\fB#include\fR directive does not in itself determine whether that
|
9170 |
|
|
header will appear in \fB\-MM\fR dependency output. This is a
|
9171 |
|
|
slight change in semantics from \s-1GCC\s0 versions 3.0 and earlier.
|
9172 |
|
|
.IP "\fB\-MF\fR \fIfile\fR" 4
|
9173 |
|
|
.IX Item "-MF file"
|
9174 |
|
|
When used with \fB\-M\fR or \fB\-MM\fR, specifies a
|
9175 |
|
|
file to write the dependencies to. If no \fB\-MF\fR switch is given
|
9176 |
|
|
the preprocessor sends the rules to the same place it would have sent
|
9177 |
|
|
preprocessed output.
|
9178 |
|
|
.Sp
|
9179 |
|
|
When used with the driver options \fB\-MD\fR or \fB\-MMD\fR,
|
9180 |
|
|
\&\fB\-MF\fR overrides the default dependency output file.
|
9181 |
|
|
.IP "\fB\-MG\fR" 4
|
9182 |
|
|
.IX Item "-MG"
|
9183 |
|
|
In conjunction with an option such as \fB\-M\fR requesting
|
9184 |
|
|
dependency generation, \fB\-MG\fR assumes missing header files are
|
9185 |
|
|
generated files and adds them to the dependency list without raising
|
9186 |
|
|
an error. The dependency filename is taken directly from the
|
9187 |
|
|
\&\f(CW\*(C`#include\*(C'\fR directive without prepending any path. \fB\-MG\fR
|
9188 |
|
|
also suppresses preprocessed output, as a missing header file renders
|
9189 |
|
|
this useless.
|
9190 |
|
|
.Sp
|
9191 |
|
|
This feature is used in automatic updating of makefiles.
|
9192 |
|
|
.IP "\fB\-MP\fR" 4
|
9193 |
|
|
.IX Item "-MP"
|
9194 |
|
|
This option instructs \s-1CPP\s0 to add a phony target for each dependency
|
9195 |
|
|
other than the main file, causing each to depend on nothing. These
|
9196 |
|
|
dummy rules work around errors \fBmake\fR gives if you remove header
|
9197 |
|
|
files without updating the \fIMakefile\fR to match.
|
9198 |
|
|
.Sp
|
9199 |
|
|
This is typical output:
|
9200 |
|
|
.Sp
|
9201 |
|
|
.Vb 1
|
9202 |
|
|
\& test.o: test.c test.h
|
9203 |
|
|
\&
|
9204 |
|
|
\& test.h:
|
9205 |
|
|
.Ve
|
9206 |
|
|
.IP "\fB\-MT\fR \fItarget\fR" 4
|
9207 |
|
|
.IX Item "-MT target"
|
9208 |
|
|
Change the target of the rule emitted by dependency generation. By
|
9209 |
|
|
default \s-1CPP\s0 takes the name of the main input file, deletes any
|
9210 |
|
|
directory components and any file suffix such as \fB.c\fR, and
|
9211 |
|
|
appends the platform's usual object suffix. The result is the target.
|
9212 |
|
|
.Sp
|
9213 |
|
|
An \fB\-MT\fR option will set the target to be exactly the string you
|
9214 |
|
|
specify. If you want multiple targets, you can specify them as a single
|
9215 |
|
|
argument to \fB\-MT\fR, or use multiple \fB\-MT\fR options.
|
9216 |
|
|
.Sp
|
9217 |
|
|
For example, \fB\-MT\ '$(objpfx)foo.o'\fR might give
|
9218 |
|
|
.Sp
|
9219 |
|
|
.Vb 1
|
9220 |
|
|
\& $(objpfx)foo.o: foo.c
|
9221 |
|
|
.Ve
|
9222 |
|
|
.IP "\fB\-MQ\fR \fItarget\fR" 4
|
9223 |
|
|
.IX Item "-MQ target"
|
9224 |
|
|
Same as \fB\-MT\fR, but it quotes any characters which are special to
|
9225 |
|
|
Make. \fB\-MQ\ '$(objpfx)foo.o'\fR gives
|
9226 |
|
|
.Sp
|
9227 |
|
|
.Vb 1
|
9228 |
|
|
\& $$(objpfx)foo.o: foo.c
|
9229 |
|
|
.Ve
|
9230 |
|
|
.Sp
|
9231 |
|
|
The default target is automatically quoted, as if it were given with
|
9232 |
|
|
\&\fB\-MQ\fR.
|
9233 |
|
|
.IP "\fB\-MD\fR" 4
|
9234 |
|
|
.IX Item "-MD"
|
9235 |
|
|
\&\fB\-MD\fR is equivalent to \fB\-M \-MF\fR \fIfile\fR, except that
|
9236 |
|
|
\&\fB\-E\fR is not implied. The driver determines \fIfile\fR based on
|
9237 |
|
|
whether an \fB\-o\fR option is given. If it is, the driver uses its
|
9238 |
|
|
argument but with a suffix of \fI.d\fR, otherwise it takes the name
|
9239 |
|
|
of the input file, removes any directory components and suffix, and
|
9240 |
|
|
applies a \fI.d\fR suffix.
|
9241 |
|
|
.Sp
|
9242 |
|
|
If \fB\-MD\fR is used in conjunction with \fB\-E\fR, any
|
9243 |
|
|
\&\fB\-o\fR switch is understood to specify the dependency output file, but if used without \fB\-E\fR, each \fB\-o\fR
|
9244 |
|
|
is understood to specify a target object file.
|
9245 |
|
|
.Sp
|
9246 |
|
|
Since \fB\-E\fR is not implied, \fB\-MD\fR can be used to generate
|
9247 |
|
|
a dependency output file as a side-effect of the compilation process.
|
9248 |
|
|
.IP "\fB\-MMD\fR" 4
|
9249 |
|
|
.IX Item "-MMD"
|
9250 |
|
|
Like \fB\-MD\fR except mention only user header files, not system
|
9251 |
|
|
header files.
|
9252 |
|
|
.IP "\fB\-fpch\-deps\fR" 4
|
9253 |
|
|
.IX Item "-fpch-deps"
|
9254 |
|
|
When using precompiled headers, this flag
|
9255 |
|
|
will cause the dependency-output flags to also list the files from the
|
9256 |
|
|
precompiled header's dependencies. If not specified only the
|
9257 |
|
|
precompiled header would be listed and not the files that were used to
|
9258 |
|
|
create it because those files are not consulted when a precompiled
|
9259 |
|
|
header is used.
|
9260 |
|
|
.IP "\fB\-fpch\-preprocess\fR" 4
|
9261 |
|
|
.IX Item "-fpch-preprocess"
|
9262 |
|
|
This option allows use of a precompiled header together with \fB\-E\fR. It inserts a special \f(CW\*(C`#pragma\*(C'\fR,
|
9263 |
|
|
\&\f(CW\*(C`#pragma GCC pch_preprocess "\f(CIfilename\f(CW"\*(C'\fR in the output to mark
|
9264 |
|
|
the place where the precompiled header was found, and its \fIfilename\fR.
|
9265 |
|
|
When \fB\-fpreprocessed\fR is in use, \s-1GCC\s0 recognizes this \f(CW\*(C`#pragma\*(C'\fR
|
9266 |
|
|
and loads the \s-1PCH\s0.
|
9267 |
|
|
.Sp
|
9268 |
|
|
This option is off by default, because the resulting preprocessed output
|
9269 |
|
|
is only really suitable as input to \s-1GCC\s0. It is switched on by
|
9270 |
|
|
\&\fB\-save\-temps\fR.
|
9271 |
|
|
.Sp
|
9272 |
|
|
You should not write this \f(CW\*(C`#pragma\*(C'\fR in your own code, but it is
|
9273 |
|
|
safe to edit the filename if the \s-1PCH\s0 file is available in a different
|
9274 |
|
|
location. The filename may be absolute or it may be relative to \s-1GCC\s0's
|
9275 |
|
|
current directory.
|
9276 |
|
|
.IP "\fB\-x c\fR" 4
|
9277 |
|
|
.IX Item "-x c"
|
9278 |
|
|
.PD 0
|
9279 |
|
|
.IP "\fB\-x c++\fR" 4
|
9280 |
|
|
.IX Item "-x c++"
|
9281 |
|
|
.IP "\fB\-x objective-c\fR" 4
|
9282 |
|
|
.IX Item "-x objective-c"
|
9283 |
|
|
.IP "\fB\-x assembler-with-cpp\fR" 4
|
9284 |
|
|
.IX Item "-x assembler-with-cpp"
|
9285 |
|
|
.PD
|
9286 |
|
|
Specify the source language: C, \*(C+, Objective-C, or assembly. This has
|
9287 |
|
|
nothing to do with standards conformance or extensions; it merely
|
9288 |
|
|
selects which base syntax to expect. If you give none of these options,
|
9289 |
|
|
cpp will deduce the language from the extension of the source file:
|
9290 |
|
|
\&\fB.c\fR, \fB.cc\fR, \fB.m\fR, or \fB.S\fR. Some other common
|
9291 |
|
|
extensions for \*(C+ and assembly are also recognized. If cpp does not
|
9292 |
|
|
recognize the extension, it will treat the file as C; this is the most
|
9293 |
|
|
generic mode.
|
9294 |
|
|
.Sp
|
9295 |
|
|
\&\fINote:\fR Previous versions of cpp accepted a \fB\-lang\fR option
|
9296 |
|
|
which selected both the language and the standards conformance level.
|
9297 |
|
|
This option has been removed, because it conflicts with the \fB\-l\fR
|
9298 |
|
|
option.
|
9299 |
|
|
.IP "\fB\-std=\fR\fIstandard\fR" 4
|
9300 |
|
|
.IX Item "-std=standard"
|
9301 |
|
|
.PD 0
|
9302 |
|
|
.IP "\fB\-ansi\fR" 4
|
9303 |
|
|
.IX Item "-ansi"
|
9304 |
|
|
.PD
|
9305 |
|
|
Specify the standard to which the code should conform. Currently \s-1CPP\s0
|
9306 |
|
|
knows about C and \*(C+ standards; others may be added in the future.
|
9307 |
|
|
.Sp
|
9308 |
|
|
\&\fIstandard\fR
|
9309 |
|
|
may be one of:
|
9310 |
|
|
.RS 4
|
9311 |
|
|
.ie n .IP """c90""" 4
|
9312 |
|
|
.el .IP "\f(CWc90\fR" 4
|
9313 |
|
|
.IX Item "c90"
|
9314 |
|
|
.PD 0
|
9315 |
|
|
.ie n .IP """c89""" 4
|
9316 |
|
|
.el .IP "\f(CWc89\fR" 4
|
9317 |
|
|
.IX Item "c89"
|
9318 |
|
|
.ie n .IP """iso9899:1990""" 4
|
9319 |
|
|
.el .IP "\f(CWiso9899:1990\fR" 4
|
9320 |
|
|
.IX Item "iso9899:1990"
|
9321 |
|
|
.PD
|
9322 |
|
|
The \s-1ISO\s0 C standard from 1990. \fBc90\fR is the customary shorthand for
|
9323 |
|
|
this version of the standard.
|
9324 |
|
|
.Sp
|
9325 |
|
|
The \fB\-ansi\fR option is equivalent to \fB\-std=c90\fR.
|
9326 |
|
|
.ie n .IP """iso9899:199409""" 4
|
9327 |
|
|
.el .IP "\f(CWiso9899:199409\fR" 4
|
9328 |
|
|
.IX Item "iso9899:199409"
|
9329 |
|
|
The 1990 C standard, as amended in 1994.
|
9330 |
|
|
.ie n .IP """iso9899:1999""" 4
|
9331 |
|
|
.el .IP "\f(CWiso9899:1999\fR" 4
|
9332 |
|
|
.IX Item "iso9899:1999"
|
9333 |
|
|
.PD 0
|
9334 |
|
|
.ie n .IP """c99""" 4
|
9335 |
|
|
.el .IP "\f(CWc99\fR" 4
|
9336 |
|
|
.IX Item "c99"
|
9337 |
|
|
.ie n .IP """iso9899:199x""" 4
|
9338 |
|
|
.el .IP "\f(CWiso9899:199x\fR" 4
|
9339 |
|
|
.IX Item "iso9899:199x"
|
9340 |
|
|
.ie n .IP """c9x""" 4
|
9341 |
|
|
.el .IP "\f(CWc9x\fR" 4
|
9342 |
|
|
.IX Item "c9x"
|
9343 |
|
|
.PD
|
9344 |
|
|
The revised \s-1ISO\s0 C standard, published in December 1999. Before
|
9345 |
|
|
publication, this was known as C9X.
|
9346 |
|
|
.ie n .IP """iso9899:2011""" 4
|
9347 |
|
|
.el .IP "\f(CWiso9899:2011\fR" 4
|
9348 |
|
|
.IX Item "iso9899:2011"
|
9349 |
|
|
.PD 0
|
9350 |
|
|
.ie n .IP """c11""" 4
|
9351 |
|
|
.el .IP "\f(CWc11\fR" 4
|
9352 |
|
|
.IX Item "c11"
|
9353 |
|
|
.ie n .IP """c1x""" 4
|
9354 |
|
|
.el .IP "\f(CWc1x\fR" 4
|
9355 |
|
|
.IX Item "c1x"
|
9356 |
|
|
.PD
|
9357 |
|
|
The revised \s-1ISO\s0 C standard, published in December 2011. Before
|
9358 |
|
|
publication, this was known as C1X.
|
9359 |
|
|
.ie n .IP """gnu90""" 4
|
9360 |
|
|
.el .IP "\f(CWgnu90\fR" 4
|
9361 |
|
|
.IX Item "gnu90"
|
9362 |
|
|
.PD 0
|
9363 |
|
|
.ie n .IP """gnu89""" 4
|
9364 |
|
|
.el .IP "\f(CWgnu89\fR" 4
|
9365 |
|
|
.IX Item "gnu89"
|
9366 |
|
|
.PD
|
9367 |
|
|
The 1990 C standard plus \s-1GNU\s0 extensions. This is the default.
|
9368 |
|
|
.ie n .IP """gnu99""" 4
|
9369 |
|
|
.el .IP "\f(CWgnu99\fR" 4
|
9370 |
|
|
.IX Item "gnu99"
|
9371 |
|
|
.PD 0
|
9372 |
|
|
.ie n .IP """gnu9x""" 4
|
9373 |
|
|
.el .IP "\f(CWgnu9x\fR" 4
|
9374 |
|
|
.IX Item "gnu9x"
|
9375 |
|
|
.PD
|
9376 |
|
|
The 1999 C standard plus \s-1GNU\s0 extensions.
|
9377 |
|
|
.ie n .IP """gnu11""" 4
|
9378 |
|
|
.el .IP "\f(CWgnu11\fR" 4
|
9379 |
|
|
.IX Item "gnu11"
|
9380 |
|
|
.PD 0
|
9381 |
|
|
.ie n .IP """gnu1x""" 4
|
9382 |
|
|
.el .IP "\f(CWgnu1x\fR" 4
|
9383 |
|
|
.IX Item "gnu1x"
|
9384 |
|
|
.PD
|
9385 |
|
|
The 2011 C standard plus \s-1GNU\s0 extensions.
|
9386 |
|
|
.ie n .IP """c++98""" 4
|
9387 |
|
|
.el .IP "\f(CWc++98\fR" 4
|
9388 |
|
|
.IX Item "c++98"
|
9389 |
|
|
The 1998 \s-1ISO\s0 \*(C+ standard plus amendments.
|
9390 |
|
|
.ie n .IP """gnu++98""" 4
|
9391 |
|
|
.el .IP "\f(CWgnu++98\fR" 4
|
9392 |
|
|
.IX Item "gnu++98"
|
9393 |
|
|
The same as \fB\-std=c++98\fR plus \s-1GNU\s0 extensions. This is the
|
9394 |
|
|
default for \*(C+ code.
|
9395 |
|
|
.RE
|
9396 |
|
|
.RS 4
|
9397 |
|
|
.RE
|
9398 |
|
|
.IP "\fB\-I\-\fR" 4
|
9399 |
|
|
.IX Item "-I-"
|
9400 |
|
|
Split the include path. Any directories specified with \fB\-I\fR
|
9401 |
|
|
options before \fB\-I\-\fR are searched only for headers requested with
|
9402 |
|
|
\&\f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR; they are not searched for
|
9403 |
|
|
\&\f(CW\*(C`#include\ <\f(CIfile\f(CW>\*(C'\fR. If additional directories are
|
9404 |
|
|
specified with \fB\-I\fR options after the \fB\-I\-\fR, those
|
9405 |
|
|
directories are searched for all \fB#include\fR directives.
|
9406 |
|
|
.Sp
|
9407 |
|
|
In addition, \fB\-I\-\fR inhibits the use of the directory of the current
|
9408 |
|
|
file directory as the first search directory for \f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR.
|
9409 |
|
|
This option has been deprecated.
|
9410 |
|
|
.IP "\fB\-nostdinc\fR" 4
|
9411 |
|
|
.IX Item "-nostdinc"
|
9412 |
|
|
Do not search the standard system directories for header files.
|
9413 |
|
|
Only the directories you have specified with \fB\-I\fR options
|
9414 |
|
|
(and the directory of the current file, if appropriate) are searched.
|
9415 |
|
|
.IP "\fB\-nostdinc++\fR" 4
|
9416 |
|
|
.IX Item "-nostdinc++"
|
9417 |
|
|
Do not search for header files in the \*(C+\-specific standard directories,
|
9418 |
|
|
but do still search the other standard directories. (This option is
|
9419 |
|
|
used when building the \*(C+ library.)
|
9420 |
|
|
.IP "\fB\-include\fR \fIfile\fR" 4
|
9421 |
|
|
.IX Item "-include file"
|
9422 |
|
|
Process \fIfile\fR as if \f(CW\*(C`#include "file"\*(C'\fR appeared as the first
|
9423 |
|
|
line of the primary source file. However, the first directory searched
|
9424 |
|
|
for \fIfile\fR is the preprocessor's working directory \fIinstead of\fR
|
9425 |
|
|
the directory containing the main source file. If not found there, it
|
9426 |
|
|
is searched for in the remainder of the \f(CW\*(C`#include "..."\*(C'\fR search
|
9427 |
|
|
chain as normal.
|
9428 |
|
|
.Sp
|
9429 |
|
|
If multiple \fB\-include\fR options are given, the files are included
|
9430 |
|
|
in the order they appear on the command line.
|
9431 |
|
|
.IP "\fB\-imacros\fR \fIfile\fR" 4
|
9432 |
|
|
.IX Item "-imacros file"
|
9433 |
|
|
Exactly like \fB\-include\fR, except that any output produced by
|
9434 |
|
|
scanning \fIfile\fR is thrown away. Macros it defines remain defined.
|
9435 |
|
|
This allows you to acquire all the macros from a header without also
|
9436 |
|
|
processing its declarations.
|
9437 |
|
|
.Sp
|
9438 |
|
|
All files specified by \fB\-imacros\fR are processed before all files
|
9439 |
|
|
specified by \fB\-include\fR.
|
9440 |
|
|
.IP "\fB\-idirafter\fR \fIdir\fR" 4
|
9441 |
|
|
.IX Item "-idirafter dir"
|
9442 |
|
|
Search \fIdir\fR for header files, but do it \fIafter\fR all
|
9443 |
|
|
directories specified with \fB\-I\fR and the standard system directories
|
9444 |
|
|
have been exhausted. \fIdir\fR is treated as a system include directory.
|
9445 |
|
|
If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
|
9446 |
|
|
by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
|
9447 |
|
|
.IP "\fB\-iprefix\fR \fIprefix\fR" 4
|
9448 |
|
|
.IX Item "-iprefix prefix"
|
9449 |
|
|
Specify \fIprefix\fR as the prefix for subsequent \fB\-iwithprefix\fR
|
9450 |
|
|
options. If the prefix represents a directory, you should include the
|
9451 |
|
|
final \fB/\fR.
|
9452 |
|
|
.IP "\fB\-iwithprefix\fR \fIdir\fR" 4
|
9453 |
|
|
.IX Item "-iwithprefix dir"
|
9454 |
|
|
.PD 0
|
9455 |
|
|
.IP "\fB\-iwithprefixbefore\fR \fIdir\fR" 4
|
9456 |
|
|
.IX Item "-iwithprefixbefore dir"
|
9457 |
|
|
.PD
|
9458 |
|
|
Append \fIdir\fR to the prefix specified previously with
|
9459 |
|
|
\&\fB\-iprefix\fR, and add the resulting directory to the include search
|
9460 |
|
|
path. \fB\-iwithprefixbefore\fR puts it in the same place \fB\-I\fR
|
9461 |
|
|
would; \fB\-iwithprefix\fR puts it where \fB\-idirafter\fR would.
|
9462 |
|
|
.IP "\fB\-isysroot\fR \fIdir\fR" 4
|
9463 |
|
|
.IX Item "-isysroot dir"
|
9464 |
|
|
This option is like the \fB\-\-sysroot\fR option, but applies only to
|
9465 |
|
|
header files (except for Darwin targets, where it applies to both header
|
9466 |
|
|
files and libraries). See the \fB\-\-sysroot\fR option for more
|
9467 |
|
|
information.
|
9468 |
|
|
.IP "\fB\-imultilib\fR \fIdir\fR" 4
|
9469 |
|
|
.IX Item "-imultilib dir"
|
9470 |
|
|
Use \fIdir\fR as a subdirectory of the directory containing
|
9471 |
|
|
target-specific \*(C+ headers.
|
9472 |
|
|
.IP "\fB\-isystem\fR \fIdir\fR" 4
|
9473 |
|
|
.IX Item "-isystem dir"
|
9474 |
|
|
Search \fIdir\fR for header files, after all directories specified by
|
9475 |
|
|
\&\fB\-I\fR but before the standard system directories. Mark it
|
9476 |
|
|
as a system directory, so that it gets the same special treatment as
|
9477 |
|
|
is applied to the standard system directories.
|
9478 |
|
|
If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
|
9479 |
|
|
by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
|
9480 |
|
|
.IP "\fB\-iquote\fR \fIdir\fR" 4
|
9481 |
|
|
.IX Item "-iquote dir"
|
9482 |
|
|
Search \fIdir\fR only for header files requested with
|
9483 |
|
|
\&\f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR; they are not searched for
|
9484 |
|
|
\&\f(CW\*(C`#include\ <\f(CIfile\f(CW>\*(C'\fR, before all directories specified by
|
9485 |
|
|
\&\fB\-I\fR and before the standard system directories.
|
9486 |
|
|
If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
|
9487 |
|
|
by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
|
9488 |
|
|
.IP "\fB\-fdirectives\-only\fR" 4
|
9489 |
|
|
.IX Item "-fdirectives-only"
|
9490 |
|
|
When preprocessing, handle directives, but do not expand macros.
|
9491 |
|
|
.Sp
|
9492 |
|
|
The option's behavior depends on the \fB\-E\fR and \fB\-fpreprocessed\fR
|
9493 |
|
|
options.
|
9494 |
|
|
.Sp
|
9495 |
|
|
With \fB\-E\fR, preprocessing is limited to the handling of directives
|
9496 |
|
|
such as \f(CW\*(C`#define\*(C'\fR, \f(CW\*(C`#ifdef\*(C'\fR, and \f(CW\*(C`#error\*(C'\fR. Other
|
9497 |
|
|
preprocessor operations, such as macro expansion and trigraph
|
9498 |
|
|
conversion are not performed. In addition, the \fB\-dD\fR option is
|
9499 |
|
|
implicitly enabled.
|
9500 |
|
|
.Sp
|
9501 |
|
|
With \fB\-fpreprocessed\fR, predefinition of command line and most
|
9502 |
|
|
builtin macros is disabled. Macros such as \f(CW\*(C`_\|_LINE_\|_\*(C'\fR, which are
|
9503 |
|
|
contextually dependent, are handled normally. This enables compilation of
|
9504 |
|
|
files previously preprocessed with \f(CW\*(C`\-E \-fdirectives\-only\*(C'\fR.
|
9505 |
|
|
.Sp
|
9506 |
|
|
With both \fB\-E\fR and \fB\-fpreprocessed\fR, the rules for
|
9507 |
|
|
\&\fB\-fpreprocessed\fR take precedence. This enables full preprocessing of
|
9508 |
|
|
files previously preprocessed with \f(CW\*(C`\-E \-fdirectives\-only\*(C'\fR.
|
9509 |
|
|
.IP "\fB\-fdollars\-in\-identifiers\fR" 4
|
9510 |
|
|
.IX Item "-fdollars-in-identifiers"
|
9511 |
|
|
Accept \fB$\fR in identifiers.
|
9512 |
|
|
.IP "\fB\-fextended\-identifiers\fR" 4
|
9513 |
|
|
.IX Item "-fextended-identifiers"
|
9514 |
|
|
Accept universal character names in identifiers. This option is
|
9515 |
|
|
experimental; in a future version of \s-1GCC\s0, it will be enabled by
|
9516 |
|
|
default for C99 and \*(C+.
|
9517 |
|
|
.IP "\fB\-fno\-canonical\-system\-headers\fR" 4
|
9518 |
|
|
.IX Item "-fno-canonical-system-headers"
|
9519 |
|
|
When preprocessing, do not shorten system header paths with canonicalization.
|
9520 |
|
|
.IP "\fB\-fpreprocessed\fR" 4
|
9521 |
|
|
.IX Item "-fpreprocessed"
|
9522 |
|
|
Indicate to the preprocessor that the input file has already been
|
9523 |
|
|
preprocessed. This suppresses things like macro expansion, trigraph
|
9524 |
|
|
conversion, escaped newline splicing, and processing of most directives.
|
9525 |
|
|
The preprocessor still recognizes and removes comments, so that you can
|
9526 |
|
|
pass a file preprocessed with \fB\-C\fR to the compiler without
|
9527 |
|
|
problems. In this mode the integrated preprocessor is little more than
|
9528 |
|
|
a tokenizer for the front ends.
|
9529 |
|
|
.Sp
|
9530 |
|
|
\&\fB\-fpreprocessed\fR is implicit if the input file has one of the
|
9531 |
|
|
extensions \fB.i\fR, \fB.ii\fR or \fB.mi\fR. These are the
|
9532 |
|
|
extensions that \s-1GCC\s0 uses for preprocessed files created by
|
9533 |
|
|
\&\fB\-save\-temps\fR.
|
9534 |
|
|
.IP "\fB\-ftabstop=\fR\fIwidth\fR" 4
|
9535 |
|
|
.IX Item "-ftabstop=width"
|
9536 |
|
|
Set the distance between tab stops. This helps the preprocessor report
|
9537 |
|
|
correct column numbers in warnings or errors, even if tabs appear on the
|
9538 |
|
|
line. If the value is less than 1 or greater than 100, the option is
|
9539 |
|
|
ignored. The default is 8.
|
9540 |
|
|
.IP "\fB\-fdebug\-cpp\fR" 4
|
9541 |
|
|
.IX Item "-fdebug-cpp"
|
9542 |
|
|
This option is only useful for debugging \s-1GCC\s0. When used with
|
9543 |
|
|
\&\fB\-E\fR, dumps debugging information about location maps. Every
|
9544 |
|
|
token in the output is preceded by the dump of the map its location
|
9545 |
|
|
belongs to. The dump of the map holding the location of a token would
|
9546 |
|
|
be:
|
9547 |
|
|
.Sp
|
9548 |
|
|
.Vb 1
|
9549 |
|
|
\& {"P":F;"F":F;"L":;"C":;"S":;"M":;"E":,"loc":}
|
9550 |
|
|
.Ve
|
9551 |
|
|
.Sp
|
9552 |
|
|
When used without \fB\-E\fR, this option has no effect.
|
9553 |
|
|
.IP "\fB\-ftrack\-macro\-expansion\fR[\fB=\fR\fIlevel\fR]" 4
|
9554 |
|
|
.IX Item "-ftrack-macro-expansion[=level]"
|
9555 |
|
|
Track locations of tokens across macro expansions. This allows the
|
9556 |
|
|
compiler to emit diagnostic about the current macro expansion stack
|
9557 |
|
|
when a compilation error occurs in a macro expansion. Using this
|
9558 |
|
|
option makes the preprocessor and the compiler consume more
|
9559 |
|
|
memory. The \fIlevel\fR parameter can be used to choose the level of
|
9560 |
|
|
precision of token location tracking thus decreasing the memory
|
9561 |
|
|
consumption if necessary. Value \fB0\fR of \fIlevel\fR de-activates
|
9562 |
|
|
this option just as if no \fB\-ftrack\-macro\-expansion\fR was present
|
9563 |
|
|
on the command line. Value \fB1\fR tracks tokens locations in a
|
9564 |
|
|
degraded mode for the sake of minimal memory overhead. In this mode
|
9565 |
|
|
all tokens resulting from the expansion of an argument of a
|
9566 |
|
|
function-like macro have the same location. Value \fB2\fR tracks
|
9567 |
|
|
tokens locations completely. This value is the most memory hungry.
|
9568 |
|
|
When this option is given no argument, the default parameter value is
|
9569 |
|
|
\&\fB2\fR.
|
9570 |
|
|
.Sp
|
9571 |
|
|
Note that \-ftrack\-macro\-expansion=2 is activated by default.
|
9572 |
|
|
.IP "\fB\-fexec\-charset=\fR\fIcharset\fR" 4
|
9573 |
|
|
.IX Item "-fexec-charset=charset"
|
9574 |
|
|
Set the execution character set, used for string and character
|
9575 |
|
|
constants. The default is \s-1UTF\-8\s0. \fIcharset\fR can be any encoding
|
9576 |
|
|
supported by the system's \f(CW\*(C`iconv\*(C'\fR library routine.
|
9577 |
|
|
.IP "\fB\-fwide\-exec\-charset=\fR\fIcharset\fR" 4
|
9578 |
|
|
.IX Item "-fwide-exec-charset=charset"
|
9579 |
|
|
Set the wide execution character set, used for wide string and
|
9580 |
|
|
character constants. The default is \s-1UTF\-32\s0 or \s-1UTF\-16\s0, whichever
|
9581 |
|
|
corresponds to the width of \f(CW\*(C`wchar_t\*(C'\fR. As with
|
9582 |
|
|
\&\fB\-fexec\-charset\fR, \fIcharset\fR can be any encoding supported
|
9583 |
|
|
by the system's \f(CW\*(C`iconv\*(C'\fR library routine; however, you will have
|
9584 |
|
|
problems with encodings that do not fit exactly in \f(CW\*(C`wchar_t\*(C'\fR.
|
9585 |
|
|
.IP "\fB\-finput\-charset=\fR\fIcharset\fR" 4
|
9586 |
|
|
.IX Item "-finput-charset=charset"
|
9587 |
|
|
Set the input character set, used for translation from the character
|
9588 |
|
|
set of the input file to the source character set used by \s-1GCC\s0. If the
|
9589 |
|
|
locale does not specify, or \s-1GCC\s0 cannot get this information from the
|
9590 |
|
|
locale, the default is \s-1UTF\-8\s0. This can be overridden by either the locale
|
9591 |
|
|
or this command line option. Currently the command line option takes
|
9592 |
|
|
precedence if there's a conflict. \fIcharset\fR can be any encoding
|
9593 |
|
|
supported by the system's \f(CW\*(C`iconv\*(C'\fR library routine.
|
9594 |
|
|
.IP "\fB\-fworking\-directory\fR" 4
|
9595 |
|
|
.IX Item "-fworking-directory"
|
9596 |
|
|
Enable generation of linemarkers in the preprocessor output that will
|
9597 |
|
|
let the compiler know the current working directory at the time of
|
9598 |
|
|
preprocessing. When this option is enabled, the preprocessor will
|
9599 |
|
|
emit, after the initial linemarker, a second linemarker with the
|
9600 |
|
|
current working directory followed by two slashes. \s-1GCC\s0 will use this
|
9601 |
|
|
directory, when it's present in the preprocessed input, as the
|
9602 |
|
|
directory emitted as the current working directory in some debugging
|
9603 |
|
|
information formats. This option is implicitly enabled if debugging
|
9604 |
|
|
information is enabled, but this can be inhibited with the negated
|
9605 |
|
|
form \fB\-fno\-working\-directory\fR. If the \fB\-P\fR flag is
|
9606 |
|
|
present in the command line, this option has no effect, since no
|
9607 |
|
|
\&\f(CW\*(C`#line\*(C'\fR directives are emitted whatsoever.
|
9608 |
|
|
.IP "\fB\-fno\-show\-column\fR" 4
|
9609 |
|
|
.IX Item "-fno-show-column"
|
9610 |
|
|
Do not print column numbers in diagnostics. This may be necessary if
|
9611 |
|
|
diagnostics are being scanned by a program that does not understand the
|
9612 |
|
|
column numbers, such as \fBdejagnu\fR.
|
9613 |
|
|
.IP "\fB\-A\fR \fIpredicate\fR\fB=\fR\fIanswer\fR" 4
|
9614 |
|
|
.IX Item "-A predicate=answer"
|
9615 |
|
|
Make an assertion with the predicate \fIpredicate\fR and answer
|
9616 |
|
|
\&\fIanswer\fR. This form is preferred to the older form \fB\-A\fR
|
9617 |
|
|
\&\fIpredicate\fR\fB(\fR\fIanswer\fR\fB)\fR, which is still supported, because
|
9618 |
|
|
it does not use shell special characters.
|
9619 |
|
|
.IP "\fB\-A \-\fR\fIpredicate\fR\fB=\fR\fIanswer\fR" 4
|
9620 |
|
|
.IX Item "-A -predicate=answer"
|
9621 |
|
|
Cancel an assertion with the predicate \fIpredicate\fR and answer
|
9622 |
|
|
\&\fIanswer\fR.
|
9623 |
|
|
.IP "\fB\-dCHARS\fR" 4
|
9624 |
|
|
.IX Item "-dCHARS"
|
9625 |
|
|
\&\fI\s-1CHARS\s0\fR is a sequence of one or more of the following characters,
|
9626 |
|
|
and must not be preceded by a space. Other characters are interpreted
|
9627 |
|
|
by the compiler proper, or reserved for future versions of \s-1GCC\s0, and so
|
9628 |
|
|
are silently ignored. If you specify characters whose behavior
|
9629 |
|
|
conflicts, the result is undefined.
|
9630 |
|
|
.RS 4
|
9631 |
|
|
.IP "\fBM\fR" 4
|
9632 |
|
|
.IX Item "M"
|
9633 |
|
|
Instead of the normal output, generate a list of \fB#define\fR
|
9634 |
|
|
directives for all the macros defined during the execution of the
|
9635 |
|
|
preprocessor, including predefined macros. This gives you a way of
|
9636 |
|
|
finding out what is predefined in your version of the preprocessor.
|
9637 |
|
|
Assuming you have no file \fIfoo.h\fR, the command
|
9638 |
|
|
.Sp
|
9639 |
|
|
.Vb 1
|
9640 |
|
|
\& touch foo.h; cpp \-dM foo.h
|
9641 |
|
|
.Ve
|
9642 |
|
|
.Sp
|
9643 |
|
|
will show all the predefined macros.
|
9644 |
|
|
.Sp
|
9645 |
|
|
If you use \fB\-dM\fR without the \fB\-E\fR option, \fB\-dM\fR is
|
9646 |
|
|
interpreted as a synonym for \fB\-fdump\-rtl\-mach\fR.
|
9647 |
|
|
.IP "\fBD\fR" 4
|
9648 |
|
|
.IX Item "D"
|
9649 |
|
|
Like \fBM\fR except in two respects: it does \fInot\fR include the
|
9650 |
|
|
predefined macros, and it outputs \fIboth\fR the \fB#define\fR
|
9651 |
|
|
directives and the result of preprocessing. Both kinds of output go to
|
9652 |
|
|
the standard output file.
|
9653 |
|
|
.IP "\fBN\fR" 4
|
9654 |
|
|
.IX Item "N"
|
9655 |
|
|
Like \fBD\fR, but emit only the macro names, not their expansions.
|
9656 |
|
|
.IP "\fBI\fR" 4
|
9657 |
|
|
.IX Item "I"
|
9658 |
|
|
Output \fB#include\fR directives in addition to the result of
|
9659 |
|
|
preprocessing.
|
9660 |
|
|
.IP "\fBU\fR" 4
|
9661 |
|
|
.IX Item "U"
|
9662 |
|
|
Like \fBD\fR except that only macros that are expanded, or whose
|
9663 |
|
|
definedness is tested in preprocessor directives, are output; the
|
9664 |
|
|
output is delayed until the use or test of the macro; and
|
9665 |
|
|
\&\fB#undef\fR directives are also output for macros tested but
|
9666 |
|
|
undefined at the time.
|
9667 |
|
|
.RE
|
9668 |
|
|
.RS 4
|
9669 |
|
|
.RE
|
9670 |
|
|
.IP "\fB\-P\fR" 4
|
9671 |
|
|
.IX Item "-P"
|
9672 |
|
|
Inhibit generation of linemarkers in the output from the preprocessor.
|
9673 |
|
|
This might be useful when running the preprocessor on something that is
|
9674 |
|
|
not C code, and will be sent to a program which might be confused by the
|
9675 |
|
|
linemarkers.
|
9676 |
|
|
.IP "\fB\-C\fR" 4
|
9677 |
|
|
.IX Item "-C"
|
9678 |
|
|
Do not discard comments. All comments are passed through to the output
|
9679 |
|
|
file, except for comments in processed directives, which are deleted
|
9680 |
|
|
along with the directive.
|
9681 |
|
|
.Sp
|
9682 |
|
|
You should be prepared for side effects when using \fB\-C\fR; it
|
9683 |
|
|
causes the preprocessor to treat comments as tokens in their own right.
|
9684 |
|
|
For example, comments appearing at the start of what would be a
|
9685 |
|
|
directive line have the effect of turning that line into an ordinary
|
9686 |
|
|
source line, since the first token on the line is no longer a \fB#\fR.
|
9687 |
|
|
.IP "\fB\-CC\fR" 4
|
9688 |
|
|
.IX Item "-CC"
|
9689 |
|
|
Do not discard comments, including during macro expansion. This is
|
9690 |
|
|
like \fB\-C\fR, except that comments contained within macros are
|
9691 |
|
|
also passed through to the output file where the macro is expanded.
|
9692 |
|
|
.Sp
|
9693 |
|
|
In addition to the side-effects of the \fB\-C\fR option, the
|
9694 |
|
|
\&\fB\-CC\fR option causes all \*(C+\-style comments inside a macro
|
9695 |
|
|
to be converted to C\-style comments. This is to prevent later use
|
9696 |
|
|
of that macro from inadvertently commenting out the remainder of
|
9697 |
|
|
the source line.
|
9698 |
|
|
.Sp
|
9699 |
|
|
The \fB\-CC\fR option is generally used to support lint comments.
|
9700 |
|
|
.IP "\fB\-traditional\-cpp\fR" 4
|
9701 |
|
|
.IX Item "-traditional-cpp"
|
9702 |
|
|
Try to imitate the behavior of old-fashioned C preprocessors, as
|
9703 |
|
|
opposed to \s-1ISO\s0 C preprocessors.
|
9704 |
|
|
.IP "\fB\-trigraphs\fR" 4
|
9705 |
|
|
.IX Item "-trigraphs"
|
9706 |
|
|
Process trigraph sequences.
|
9707 |
|
|
These are three-character sequences, all starting with \fB??\fR, that
|
9708 |
|
|
are defined by \s-1ISO\s0 C to stand for single characters. For example,
|
9709 |
|
|
\&\fB??/\fR stands for \fB\e\fR, so \fB'??/n'\fR is a character
|
9710 |
|
|
constant for a newline. By default, \s-1GCC\s0 ignores trigraphs, but in
|
9711 |
|
|
standard-conforming modes it converts them. See the \fB\-std\fR and
|
9712 |
|
|
\&\fB\-ansi\fR options.
|
9713 |
|
|
.Sp
|
9714 |
|
|
The nine trigraphs and their replacements are
|
9715 |
|
|
.Sp
|
9716 |
|
|
.Vb 2
|
9717 |
|
|
\& Trigraph: ??( ??) ??< ??> ??= ??/ ??\*(Aq ??! ??\-
|
9718 |
|
|
\& Replacement: [ ] { } # \e ^ | ~
|
9719 |
|
|
.Ve
|
9720 |
|
|
.IP "\fB\-remap\fR" 4
|
9721 |
|
|
.IX Item "-remap"
|
9722 |
|
|
Enable special code to work around file systems which only permit very
|
9723 |
|
|
short file names, such as MS-DOS.
|
9724 |
|
|
.IP "\fB\-\-help\fR" 4
|
9725 |
|
|
.IX Item "--help"
|
9726 |
|
|
.PD 0
|
9727 |
|
|
.IP "\fB\-\-target\-help\fR" 4
|
9728 |
|
|
.IX Item "--target-help"
|
9729 |
|
|
.PD
|
9730 |
|
|
Print text describing all the command line options instead of
|
9731 |
|
|
preprocessing anything.
|
9732 |
|
|
.IP "\fB\-v\fR" 4
|
9733 |
|
|
.IX Item "-v"
|
9734 |
|
|
Verbose mode. Print out \s-1GNU\s0 \s-1CPP\s0's version number at the beginning of
|
9735 |
|
|
execution, and report the final form of the include path.
|
9736 |
|
|
.IP "\fB\-H\fR" 4
|
9737 |
|
|
.IX Item "-H"
|
9738 |
|
|
Print the name of each header file used, in addition to other normal
|
9739 |
|
|
activities. Each name is indented to show how deep in the
|
9740 |
|
|
\&\fB#include\fR stack it is. Precompiled header files are also
|
9741 |
|
|
printed, even if they are found to be invalid; an invalid precompiled
|
9742 |
|
|
header file is printed with \fB...x\fR and a valid one with \fB...!\fR .
|
9743 |
|
|
.IP "\fB\-version\fR" 4
|
9744 |
|
|
.IX Item "-version"
|
9745 |
|
|
.PD 0
|
9746 |
|
|
.IP "\fB\-\-version\fR" 4
|
9747 |
|
|
.IX Item "--version"
|
9748 |
|
|
.PD
|
9749 |
|
|
Print out \s-1GNU\s0 \s-1CPP\s0's version number. With one dash, proceed to
|
9750 |
|
|
preprocess as normal. With two dashes, exit immediately.
|
9751 |
|
|
.SS "Passing Options to the Assembler"
|
9752 |
|
|
.IX Subsection "Passing Options to the Assembler"
|
9753 |
|
|
You can pass options to the assembler.
|
9754 |
|
|
.IP "\fB\-Wa,\fR\fIoption\fR" 4
|
9755 |
|
|
.IX Item "-Wa,option"
|
9756 |
|
|
Pass \fIoption\fR as an option to the assembler. If \fIoption\fR
|
9757 |
|
|
contains commas, it is split into multiple options at the commas.
|
9758 |
|
|
.IP "\fB\-Xassembler\fR \fIoption\fR" 4
|
9759 |
|
|
.IX Item "-Xassembler option"
|
9760 |
|
|
Pass \fIoption\fR as an option to the assembler. You can use this to
|
9761 |
|
|
supply system-specific assembler options that \s-1GCC\s0 does not
|
9762 |
|
|
recognize.
|
9763 |
|
|
.Sp
|
9764 |
|
|
If you want to pass an option that takes an argument, you must use
|
9765 |
|
|
\&\fB\-Xassembler\fR twice, once for the option and once for the argument.
|
9766 |
|
|
.SS "Options for Linking"
|
9767 |
|
|
.IX Subsection "Options for Linking"
|
9768 |
|
|
These options come into play when the compiler links object files into
|
9769 |
|
|
an executable output file. They are meaningless if the compiler is
|
9770 |
|
|
not doing a link step.
|
9771 |
|
|
.IP "\fIobject-file-name\fR" 4
|
9772 |
|
|
.IX Item "object-file-name"
|
9773 |
|
|
A file name that does not end in a special recognized suffix is
|
9774 |
|
|
considered to name an object file or library. (Object files are
|
9775 |
|
|
distinguished from libraries by the linker according to the file
|
9776 |
|
|
contents.) If linking is done, these object files are used as input
|
9777 |
|
|
to the linker.
|
9778 |
|
|
.IP "\fB\-c\fR" 4
|
9779 |
|
|
.IX Item "-c"
|
9780 |
|
|
.PD 0
|
9781 |
|
|
.IP "\fB\-S\fR" 4
|
9782 |
|
|
.IX Item "-S"
|
9783 |
|
|
.IP "\fB\-E\fR" 4
|
9784 |
|
|
.IX Item "-E"
|
9785 |
|
|
.PD
|
9786 |
|
|
If any of these options is used, then the linker is not run, and
|
9787 |
|
|
object file names should not be used as arguments.
|
9788 |
|
|
.IP "\fB\-l\fR\fIlibrary\fR" 4
|
9789 |
|
|
.IX Item "-llibrary"
|
9790 |
|
|
.PD 0
|
9791 |
|
|
.IP "\fB\-l\fR \fIlibrary\fR" 4
|
9792 |
|
|
.IX Item "-l library"
|
9793 |
|
|
.PD
|
9794 |
|
|
Search the library named \fIlibrary\fR when linking. (The second
|
9795 |
|
|
alternative with the library as a separate argument is only for
|
9796 |
|
|
\&\s-1POSIX\s0 compliance and is not recommended.)
|
9797 |
|
|
.Sp
|
9798 |
|
|
It makes a difference where in the command you write this option; the
|
9799 |
|
|
linker searches and processes libraries and object files in the order they
|
9800 |
|
|
are specified. Thus, \fBfoo.o \-lz bar.o\fR searches library \fBz\fR
|
9801 |
|
|
after file \fIfoo.o\fR but before \fIbar.o\fR. If \fIbar.o\fR refers
|
9802 |
|
|
to functions in \fBz\fR, those functions may not be loaded.
|
9803 |
|
|
.Sp
|
9804 |
|
|
The linker searches a standard list of directories for the library,
|
9805 |
|
|
which is actually a file named \fIlib\fIlibrary\fI.a\fR. The linker
|
9806 |
|
|
then uses this file as if it had been specified precisely by name.
|
9807 |
|
|
.Sp
|
9808 |
|
|
The directories searched include several standard system directories
|
9809 |
|
|
plus any that you specify with \fB\-L\fR.
|
9810 |
|
|
.Sp
|
9811 |
|
|
Normally the files found this way are library files\-\-\-archive files
|
9812 |
|
|
whose members are object files. The linker handles an archive file by
|
9813 |
|
|
scanning through it for members which define symbols that have so far
|
9814 |
|
|
been referenced but not defined. But if the file that is found is an
|
9815 |
|
|
ordinary object file, it is linked in the usual fashion. The only
|
9816 |
|
|
difference between using an \fB\-l\fR option and specifying a file name
|
9817 |
|
|
is that \fB\-l\fR surrounds \fIlibrary\fR with \fBlib\fR and \fB.a\fR
|
9818 |
|
|
and searches several directories.
|
9819 |
|
|
.IP "\fB\-lobjc\fR" 4
|
9820 |
|
|
.IX Item "-lobjc"
|
9821 |
|
|
You need this special case of the \fB\-l\fR option in order to
|
9822 |
|
|
link an Objective-C or Objective\-\*(C+ program.
|
9823 |
|
|
.IP "\fB\-nostartfiles\fR" 4
|
9824 |
|
|
.IX Item "-nostartfiles"
|
9825 |
|
|
Do not use the standard system startup files when linking.
|
9826 |
|
|
The standard system libraries are used normally, unless \fB\-nostdlib\fR
|
9827 |
|
|
or \fB\-nodefaultlibs\fR is used.
|
9828 |
|
|
.IP "\fB\-nodefaultlibs\fR" 4
|
9829 |
|
|
.IX Item "-nodefaultlibs"
|
9830 |
|
|
Do not use the standard system libraries when linking.
|
9831 |
|
|
Only the libraries you specify are passed to the linker, and options
|
9832 |
|
|
specifying linkage of the system libraries, such as \f(CW\*(C`\-static\-libgcc\*(C'\fR
|
9833 |
|
|
or \f(CW\*(C`\-shared\-libgcc\*(C'\fR, are ignored.
|
9834 |
|
|
The standard startup files are used normally, unless \fB\-nostartfiles\fR
|
9835 |
|
|
is used.
|
9836 |
|
|
.Sp
|
9837 |
|
|
The compiler may generate calls to \f(CW\*(C`memcmp\*(C'\fR,
|
9838 |
|
|
\&\f(CW\*(C`memset\*(C'\fR, \f(CW\*(C`memcpy\*(C'\fR and \f(CW\*(C`memmove\*(C'\fR.
|
9839 |
|
|
These entries are usually resolved by entries in
|
9840 |
|
|
libc. These entry points should be supplied through some other
|
9841 |
|
|
mechanism when this option is specified.
|
9842 |
|
|
.IP "\fB\-nostdlib\fR" 4
|
9843 |
|
|
.IX Item "-nostdlib"
|
9844 |
|
|
Do not use the standard system startup files or libraries when linking.
|
9845 |
|
|
No startup files and only the libraries you specify are passed to
|
9846 |
|
|
the linker, and options specifying linkage of the system libraries, such as
|
9847 |
|
|
\&\f(CW\*(C`\-static\-libgcc\*(C'\fR or \f(CW\*(C`\-shared\-libgcc\*(C'\fR, are ignored.
|
9848 |
|
|
.Sp
|
9849 |
|
|
The compiler may generate calls to \f(CW\*(C`memcmp\*(C'\fR, \f(CW\*(C`memset\*(C'\fR,
|
9850 |
|
|
\&\f(CW\*(C`memcpy\*(C'\fR and \f(CW\*(C`memmove\*(C'\fR.
|
9851 |
|
|
These entries are usually resolved by entries in
|
9852 |
|
|
libc. These entry points should be supplied through some other
|
9853 |
|
|
mechanism when this option is specified.
|
9854 |
|
|
.Sp
|
9855 |
|
|
One of the standard libraries bypassed by \fB\-nostdlib\fR and
|
9856 |
|
|
\&\fB\-nodefaultlibs\fR is \fIlibgcc.a\fR, a library of internal subroutines
|
9857 |
|
|
which \s-1GCC\s0 uses to overcome shortcomings of particular machines, or special
|
9858 |
|
|
needs for some languages.
|
9859 |
|
|
.Sp
|
9860 |
|
|
In most cases, you need \fIlibgcc.a\fR even when you want to avoid
|
9861 |
|
|
other standard libraries. In other words, when you specify \fB\-nostdlib\fR
|
9862 |
|
|
or \fB\-nodefaultlibs\fR you should usually specify \fB\-lgcc\fR as well.
|
9863 |
|
|
This ensures that you have no unresolved references to internal \s-1GCC\s0
|
9864 |
|
|
library subroutines.
|
9865 |
|
|
(An example of such an internal subroutine is \fB_\|_main\fR, used to ensure \*(C+
|
9866 |
|
|
constructors are called.)
|
9867 |
|
|
.IP "\fB\-pie\fR" 4
|
9868 |
|
|
.IX Item "-pie"
|
9869 |
|
|
Produce a position independent executable on targets that support it.
|
9870 |
|
|
For predictable results, you must also specify the same set of options
|
9871 |
|
|
used for compilation (\fB\-fpie\fR, \fB\-fPIE\fR,
|
9872 |
|
|
or model suboptions) when you specify this linker option.
|
9873 |
|
|
.IP "\fB\-rdynamic\fR" 4
|
9874 |
|
|
.IX Item "-rdynamic"
|
9875 |
|
|
Pass the flag \fB\-export\-dynamic\fR to the \s-1ELF\s0 linker, on targets
|
9876 |
|
|
that support it. This instructs the linker to add all symbols, not
|
9877 |
|
|
only used ones, to the dynamic symbol table. This option is needed
|
9878 |
|
|
for some uses of \f(CW\*(C`dlopen\*(C'\fR or to allow obtaining backtraces
|
9879 |
|
|
from within a program.
|
9880 |
|
|
.IP "\fB\-s\fR" 4
|
9881 |
|
|
.IX Item "-s"
|
9882 |
|
|
Remove all symbol table and relocation information from the executable.
|
9883 |
|
|
.IP "\fB\-static\fR" 4
|
9884 |
|
|
.IX Item "-static"
|
9885 |
|
|
On systems that support dynamic linking, this prevents linking with the shared
|
9886 |
|
|
libraries. On other systems, this option has no effect.
|
9887 |
|
|
.IP "\fB\-shared\fR" 4
|
9888 |
|
|
.IX Item "-shared"
|
9889 |
|
|
Produce a shared object which can then be linked with other objects to
|
9890 |
|
|
form an executable. Not all systems support this option. For predictable
|
9891 |
|
|
results, you must also specify the same set of options used for compilation
|
9892 |
|
|
(\fB\-fpic\fR, \fB\-fPIC\fR, or model suboptions) when
|
9893 |
|
|
you specify this linker option.[1]
|
9894 |
|
|
.IP "\fB\-shared\-libgcc\fR" 4
|
9895 |
|
|
.IX Item "-shared-libgcc"
|
9896 |
|
|
.PD 0
|
9897 |
|
|
.IP "\fB\-static\-libgcc\fR" 4
|
9898 |
|
|
.IX Item "-static-libgcc"
|
9899 |
|
|
.PD
|
9900 |
|
|
On systems that provide \fIlibgcc\fR as a shared library, these options
|
9901 |
|
|
force the use of either the shared or static version, respectively.
|
9902 |
|
|
If no shared version of \fIlibgcc\fR was built when the compiler was
|
9903 |
|
|
configured, these options have no effect.
|
9904 |
|
|
.Sp
|
9905 |
|
|
There are several situations in which an application should use the
|
9906 |
|
|
shared \fIlibgcc\fR instead of the static version. The most common
|
9907 |
|
|
of these is when the application wishes to throw and catch exceptions
|
9908 |
|
|
across different shared libraries. In that case, each of the libraries
|
9909 |
|
|
as well as the application itself should use the shared \fIlibgcc\fR.
|
9910 |
|
|
.Sp
|
9911 |
|
|
Therefore, the G++ and \s-1GCJ\s0 drivers automatically add
|
9912 |
|
|
\&\fB\-shared\-libgcc\fR whenever you build a shared library or a main
|
9913 |
|
|
executable, because \*(C+ and Java programs typically use exceptions, so
|
9914 |
|
|
this is the right thing to do.
|
9915 |
|
|
.Sp
|
9916 |
|
|
If, instead, you use the \s-1GCC\s0 driver to create shared libraries, you may
|
9917 |
|
|
find that they are not always linked with the shared \fIlibgcc\fR.
|
9918 |
|
|
If \s-1GCC\s0 finds, at its configuration time, that you have a non-GNU linker
|
9919 |
|
|
or a \s-1GNU\s0 linker that does not support option \fB\-\-eh\-frame\-hdr\fR,
|
9920 |
|
|
it links the shared version of \fIlibgcc\fR into shared libraries
|
9921 |
|
|
by default. Otherwise, it takes advantage of the linker and optimizes
|
9922 |
|
|
away the linking with the shared version of \fIlibgcc\fR, linking with
|
9923 |
|
|
the static version of libgcc by default. This allows exceptions to
|
9924 |
|
|
propagate through such shared libraries, without incurring relocation
|
9925 |
|
|
costs at library load time.
|
9926 |
|
|
.Sp
|
9927 |
|
|
However, if a library or main executable is supposed to throw or catch
|
9928 |
|
|
exceptions, you must link it using the G++ or \s-1GCJ\s0 driver, as appropriate
|
9929 |
|
|
for the languages used in the program, or using the option
|
9930 |
|
|
\&\fB\-shared\-libgcc\fR, such that it is linked with the shared
|
9931 |
|
|
\&\fIlibgcc\fR.
|
9932 |
|
|
.IP "\fB\-static\-libasan\fR" 4
|
9933 |
|
|
.IX Item "-static-libasan"
|
9934 |
|
|
When the \fB\-fsanitize=address\fR option is used to link a program,
|
9935 |
|
|
the \s-1GCC\s0 driver automatically links against \fBlibasan\fR. If
|
9936 |
|
|
\&\fIlibasan\fR is available as a shared library, and the \fB\-static\fR
|
9937 |
|
|
option is not used, then this links against the shared version of
|
9938 |
|
|
\&\fIlibasan\fR. The \fB\-static\-libasan\fR option directs the \s-1GCC\s0
|
9939 |
|
|
driver to link \fIlibasan\fR statically, without necessarily linking
|
9940 |
|
|
other libraries statically.
|
9941 |
|
|
.IP "\fB\-static\-libtsan\fR" 4
|
9942 |
|
|
.IX Item "-static-libtsan"
|
9943 |
|
|
When the \fB\-fsanitize=thread\fR option is used to link a program,
|
9944 |
|
|
the \s-1GCC\s0 driver automatically links against \fBlibtsan\fR. If
|
9945 |
|
|
\&\fIlibtsan\fR is available as a shared library, and the \fB\-static\fR
|
9946 |
|
|
option is not used, then this links against the shared version of
|
9947 |
|
|
\&\fIlibtsan\fR. The \fB\-static\-libtsan\fR option directs the \s-1GCC\s0
|
9948 |
|
|
driver to link \fIlibtsan\fR statically, without necessarily linking
|
9949 |
|
|
other libraries statically.
|
9950 |
|
|
.IP "\fB\-static\-libstdc++\fR" 4
|
9951 |
|
|
.IX Item "-static-libstdc++"
|
9952 |
|
|
When the \fBg++\fR program is used to link a \*(C+ program, it
|
9953 |
|
|
normally automatically links against \fBlibstdc++\fR. If
|
9954 |
|
|
\&\fIlibstdc++\fR is available as a shared library, and the
|
9955 |
|
|
\&\fB\-static\fR option is not used, then this links against the
|
9956 |
|
|
shared version of \fIlibstdc++\fR. That is normally fine. However, it
|
9957 |
|
|
is sometimes useful to freeze the version of \fIlibstdc++\fR used by
|
9958 |
|
|
the program without going all the way to a fully static link. The
|
9959 |
|
|
\&\fB\-static\-libstdc++\fR option directs the \fBg++\fR driver to
|
9960 |
|
|
link \fIlibstdc++\fR statically, without necessarily linking other
|
9961 |
|
|
libraries statically.
|
9962 |
|
|
.IP "\fB\-symbolic\fR" 4
|
9963 |
|
|
.IX Item "-symbolic"
|
9964 |
|
|
Bind references to global symbols when building a shared object. Warn
|
9965 |
|
|
about any unresolved references (unless overridden by the link editor
|
9966 |
|
|
option \fB\-Xlinker \-z \-Xlinker defs\fR). Only a few systems support
|
9967 |
|
|
this option.
|
9968 |
|
|
.IP "\fB\-T\fR \fIscript\fR" 4
|
9969 |
|
|
.IX Item "-T script"
|
9970 |
|
|
Use \fIscript\fR as the linker script. This option is supported by most
|
9971 |
|
|
systems using the \s-1GNU\s0 linker. On some targets, such as bare-board
|
9972 |
|
|
targets without an operating system, the \fB\-T\fR option may be required
|
9973 |
|
|
when linking to avoid references to undefined symbols.
|
9974 |
|
|
.IP "\fB\-Xlinker\fR \fIoption\fR" 4
|
9975 |
|
|
.IX Item "-Xlinker option"
|
9976 |
|
|
Pass \fIoption\fR as an option to the linker. You can use this to
|
9977 |
|
|
supply system-specific linker options that \s-1GCC\s0 does not recognize.
|
9978 |
|
|
.Sp
|
9979 |
|
|
If you want to pass an option that takes a separate argument, you must use
|
9980 |
|
|
\&\fB\-Xlinker\fR twice, once for the option and once for the argument.
|
9981 |
|
|
For example, to pass \fB\-assert definitions\fR, you must write
|
9982 |
|
|
\&\fB\-Xlinker \-assert \-Xlinker definitions\fR. It does not work to write
|
9983 |
|
|
\&\fB\-Xlinker \*(L"\-assert definitions\*(R"\fR, because this passes the entire
|
9984 |
|
|
string as a single argument, which is not what the linker expects.
|
9985 |
|
|
.Sp
|
9986 |
|
|
When using the \s-1GNU\s0 linker, it is usually more convenient to pass
|
9987 |
|
|
arguments to linker options using the \fIoption\fR\fB=\fR\fIvalue\fR
|
9988 |
|
|
syntax than as separate arguments. For example, you can specify
|
9989 |
|
|
\&\fB\-Xlinker \-Map=output.map\fR rather than
|
9990 |
|
|
\&\fB\-Xlinker \-Map \-Xlinker output.map\fR. Other linkers may not support
|
9991 |
|
|
this syntax for command-line options.
|
9992 |
|
|
.IP "\fB\-Wl,\fR\fIoption\fR" 4
|
9993 |
|
|
.IX Item "-Wl,option"
|
9994 |
|
|
Pass \fIoption\fR as an option to the linker. If \fIoption\fR contains
|
9995 |
|
|
commas, it is split into multiple options at the commas. You can use this
|
9996 |
|
|
syntax to pass an argument to the option.
|
9997 |
|
|
For example, \fB\-Wl,\-Map,output.map\fR passes \fB\-Map output.map\fR to the
|
9998 |
|
|
linker. When using the \s-1GNU\s0 linker, you can also get the same effect with
|
9999 |
|
|
\&\fB\-Wl,\-Map=output.map\fR.
|
10000 |
|
|
.IP "\fB\-u\fR \fIsymbol\fR" 4
|
10001 |
|
|
.IX Item "-u symbol"
|
10002 |
|
|
Pretend the symbol \fIsymbol\fR is undefined, to force linking of
|
10003 |
|
|
library modules to define it. You can use \fB\-u\fR multiple times with
|
10004 |
|
|
different symbols to force loading of additional library modules.
|
10005 |
|
|
.SS "Options for Directory Search"
|
10006 |
|
|
.IX Subsection "Options for Directory Search"
|
10007 |
|
|
These options specify directories to search for header files, for
|
10008 |
|
|
libraries and for parts of the compiler:
|
10009 |
|
|
.IP "\fB\-I\fR\fIdir\fR" 4
|
10010 |
|
|
.IX Item "-Idir"
|
10011 |
|
|
Add the directory \fIdir\fR to the head of the list of directories to be
|
10012 |
|
|
searched for header files. This can be used to override a system header
|
10013 |
|
|
file, substituting your own version, since these directories are
|
10014 |
|
|
searched before the system header file directories. However, you should
|
10015 |
|
|
not use this option to add directories that contain vendor-supplied
|
10016 |
|
|
system header files (use \fB\-isystem\fR for that). If you use more than
|
10017 |
|
|
one \fB\-I\fR option, the directories are scanned in left-to-right
|
10018 |
|
|
order; the standard system directories come after.
|
10019 |
|
|
.Sp
|
10020 |
|
|
If a standard system include directory, or a directory specified with
|
10021 |
|
|
\&\fB\-isystem\fR, is also specified with \fB\-I\fR, the \fB\-I\fR
|
10022 |
|
|
option is ignored. The directory is still searched but as a
|
10023 |
|
|
system directory at its normal position in the system include chain.
|
10024 |
|
|
This is to ensure that \s-1GCC\s0's procedure to fix buggy system headers and
|
10025 |
|
|
the ordering for the \f(CW\*(C`include_next\*(C'\fR directive are not inadvertently changed.
|
10026 |
|
|
If you really need to change the search order for system directories,
|
10027 |
|
|
use the \fB\-nostdinc\fR and/or \fB\-isystem\fR options.
|
10028 |
|
|
.IP "\fB\-iplugindir=\fR\fIdir\fR" 4
|
10029 |
|
|
.IX Item "-iplugindir=dir"
|
10030 |
|
|
Set the directory to search for plugins that are passed
|
10031 |
|
|
by \fB\-fplugin=\fR\fIname\fR instead of
|
10032 |
|
|
\&\fB\-fplugin=\fR\fIpath\fR\fB/\fR\fIname\fR\fB.so\fR. This option is not meant
|
10033 |
|
|
to be used by the user, but only passed by the driver.
|
10034 |
|
|
.IP "\fB\-iquote\fR\fIdir\fR" 4
|
10035 |
|
|
.IX Item "-iquotedir"
|
10036 |
|
|
Add the directory \fIdir\fR to the head of the list of directories to
|
10037 |
|
|
be searched for header files only for the case of \fB#include
|
10038 |
|
|
"\fR\fIfile\fR\fB"\fR; they are not searched for \fB#include <\fR\fIfile\fR\fB>\fR,
|
10039 |
|
|
otherwise just like \fB\-I\fR.
|
10040 |
|
|
.IP "\fB\-L\fR\fIdir\fR" 4
|
10041 |
|
|
.IX Item "-Ldir"
|
10042 |
|
|
Add directory \fIdir\fR to the list of directories to be searched
|
10043 |
|
|
for \fB\-l\fR.
|
10044 |
|
|
.IP "\fB\-B\fR\fIprefix\fR" 4
|
10045 |
|
|
.IX Item "-Bprefix"
|
10046 |
|
|
This option specifies where to find the executables, libraries,
|
10047 |
|
|
include files, and data files of the compiler itself.
|
10048 |
|
|
.Sp
|
10049 |
|
|
The compiler driver program runs one or more of the subprograms
|
10050 |
|
|
\&\fBcpp\fR, \fBcc1\fR, \fBas\fR and \fBld\fR. It tries
|
10051 |
|
|
\&\fIprefix\fR as a prefix for each program it tries to run, both with and
|
10052 |
|
|
without \fImachine\fR\fB/\fR\fIversion\fR\fB/\fR.
|
10053 |
|
|
.Sp
|
10054 |
|
|
For each subprogram to be run, the compiler driver first tries the
|
10055 |
|
|
\&\fB\-B\fR prefix, if any. If that name is not found, or if \fB\-B\fR
|
10056 |
|
|
is not specified, the driver tries two standard prefixes,
|
10057 |
|
|
\&\fI/usr/lib/gcc/\fR and \fI/usr/local/lib/gcc/\fR. If neither of
|
10058 |
|
|
those results in a file name that is found, the unmodified program
|
10059 |
|
|
name is searched for using the directories specified in your
|
10060 |
|
|
\&\fB\s-1PATH\s0\fR environment variable.
|
10061 |
|
|
.Sp
|
10062 |
|
|
The compiler checks to see if the path provided by the \fB\-B\fR
|
10063 |
|
|
refers to a directory, and if necessary it adds a directory
|
10064 |
|
|
separator character at the end of the path.
|
10065 |
|
|
.Sp
|
10066 |
|
|
\&\fB\-B\fR prefixes that effectively specify directory names also apply
|
10067 |
|
|
to libraries in the linker, because the compiler translates these
|
10068 |
|
|
options into \fB\-L\fR options for the linker. They also apply to
|
10069 |
|
|
includes files in the preprocessor, because the compiler translates these
|
10070 |
|
|
options into \fB\-isystem\fR options for the preprocessor. In this case,
|
10071 |
|
|
the compiler appends \fBinclude\fR to the prefix.
|
10072 |
|
|
.Sp
|
10073 |
|
|
The runtime support file \fIlibgcc.a\fR can also be searched for using
|
10074 |
|
|
the \fB\-B\fR prefix, if needed. If it is not found there, the two
|
10075 |
|
|
standard prefixes above are tried, and that is all. The file is left
|
10076 |
|
|
out of the link if it is not found by those means.
|
10077 |
|
|
.Sp
|
10078 |
|
|
Another way to specify a prefix much like the \fB\-B\fR prefix is to use
|
10079 |
|
|
the environment variable \fB\s-1GCC_EXEC_PREFIX\s0\fR.
|
10080 |
|
|
.Sp
|
10081 |
|
|
As a special kludge, if the path provided by \fB\-B\fR is
|
10082 |
|
|
\&\fI[dir/]stage\fIN\fI/\fR, where \fIN\fR is a number in the range 0 to
|
10083 |
|
|
9, then it is replaced by \fI[dir/]include\fR. This is to help
|
10084 |
|
|
with boot-strapping the compiler.
|
10085 |
|
|
.IP "\fB\-specs=\fR\fIfile\fR" 4
|
10086 |
|
|
.IX Item "-specs=file"
|
10087 |
|
|
Process \fIfile\fR after the compiler reads in the standard \fIspecs\fR
|
10088 |
|
|
file, in order to override the defaults which the \fBgcc\fR driver
|
10089 |
|
|
program uses when determining what switches to pass to \fBcc1\fR,
|
10090 |
|
|
\&\fBcc1plus\fR, \fBas\fR, \fBld\fR, etc. More than one
|
10091 |
|
|
\&\fB\-specs=\fR\fIfile\fR can be specified on the command line, and they
|
10092 |
|
|
are processed in order, from left to right.
|
10093 |
|
|
.IP "\fB\-\-sysroot=\fR\fIdir\fR" 4
|
10094 |
|
|
.IX Item "--sysroot=dir"
|
10095 |
|
|
Use \fIdir\fR as the logical root directory for headers and libraries.
|
10096 |
|
|
For example, if the compiler normally searches for headers in
|
10097 |
|
|
\&\fI/usr/include\fR and libraries in \fI/usr/lib\fR, it instead
|
10098 |
|
|
searches \fI\fIdir\fI/usr/include\fR and \fI\fIdir\fI/usr/lib\fR.
|
10099 |
|
|
.Sp
|
10100 |
|
|
If you use both this option and the \fB\-isysroot\fR option, then
|
10101 |
|
|
the \fB\-\-sysroot\fR option applies to libraries, but the
|
10102 |
|
|
\&\fB\-isysroot\fR option applies to header files.
|
10103 |
|
|
.Sp
|
10104 |
|
|
The \s-1GNU\s0 linker (beginning with version 2.16) has the necessary support
|
10105 |
|
|
for this option. If your linker does not support this option, the
|
10106 |
|
|
header file aspect of \fB\-\-sysroot\fR still works, but the
|
10107 |
|
|
library aspect does not.
|
10108 |
|
|
.IP "\fB\-\-no\-sysroot\-suffix\fR" 4
|
10109 |
|
|
.IX Item "--no-sysroot-suffix"
|
10110 |
|
|
For some targets, a suffix is added to the root directory specified
|
10111 |
|
|
with \fB\-\-sysroot\fR, depending on the other options used, so that
|
10112 |
|
|
headers may for example be found in
|
10113 |
|
|
\&\fI\fIdir\fI/\fIsuffix\fI/usr/include\fR instead of
|
10114 |
|
|
\&\fI\fIdir\fI/usr/include\fR. This option disables the addition of
|
10115 |
|
|
such a suffix.
|
10116 |
|
|
.IP "\fB\-I\-\fR" 4
|
10117 |
|
|
.IX Item "-I-"
|
10118 |
|
|
This option has been deprecated. Please use \fB\-iquote\fR instead for
|
10119 |
|
|
\&\fB\-I\fR directories before the \fB\-I\-\fR and remove the \fB\-I\-\fR.
|
10120 |
|
|
Any directories you specify with \fB\-I\fR options before the \fB\-I\-\fR
|
10121 |
|
|
option are searched only for the case of \fB#include "\fR\fIfile\fR\fB"\fR;
|
10122 |
|
|
they are not searched for \fB#include <\fR\fIfile\fR\fB>\fR.
|
10123 |
|
|
.Sp
|
10124 |
|
|
If additional directories are specified with \fB\-I\fR options after
|
10125 |
|
|
the \fB\-I\-\fR, these directories are searched for all \fB#include\fR
|
10126 |
|
|
directives. (Ordinarily \fIall\fR \fB\-I\fR directories are used
|
10127 |
|
|
this way.)
|
10128 |
|
|
.Sp
|
10129 |
|
|
In addition, the \fB\-I\-\fR option inhibits the use of the current
|
10130 |
|
|
directory (where the current input file came from) as the first search
|
10131 |
|
|
directory for \fB#include "\fR\fIfile\fR\fB"\fR. There is no way to
|
10132 |
|
|
override this effect of \fB\-I\-\fR. With \fB\-I.\fR you can specify
|
10133 |
|
|
searching the directory that is current when the compiler is
|
10134 |
|
|
invoked. That is not exactly the same as what the preprocessor does
|
10135 |
|
|
by default, but it is often satisfactory.
|
10136 |
|
|
.Sp
|
10137 |
|
|
\&\fB\-I\-\fR does not inhibit the use of the standard system directories
|
10138 |
|
|
for header files. Thus, \fB\-I\-\fR and \fB\-nostdinc\fR are
|
10139 |
|
|
independent.
|
10140 |
|
|
.SS "Specifying Target Machine and Compiler Version"
|
10141 |
|
|
.IX Subsection "Specifying Target Machine and Compiler Version"
|
10142 |
|
|
The usual way to run \s-1GCC\s0 is to run the executable called \fBgcc\fR, or
|
10143 |
|
|
\&\fImachine\fR\fB\-gcc\fR when cross-compiling, or
|
10144 |
|
|
\&\fImachine\fR\fB\-gcc\-\fR\fIversion\fR to run a version other than the
|
10145 |
|
|
one that was installed last.
|
10146 |
|
|
.SS "Hardware Models and Configurations"
|
10147 |
|
|
.IX Subsection "Hardware Models and Configurations"
|
10148 |
|
|
Each target machine types can have its own
|
10149 |
|
|
special options, starting with \fB\-m\fR, to choose among various
|
10150 |
|
|
hardware models or configurations\-\-\-for example, 68010 vs 68020,
|
10151 |
|
|
floating coprocessor or none. A single installed version of the
|
10152 |
|
|
compiler can compile for any model or configuration, according to the
|
10153 |
|
|
options specified.
|
10154 |
|
|
.PP
|
10155 |
|
|
Some configurations of the compiler also support additional special
|
10156 |
|
|
options, usually for compatibility with other compilers on the same
|
10157 |
|
|
platform.
|
10158 |
|
|
.PP
|
10159 |
|
|
\fIAdapteva Epiphany Options\fR
|
10160 |
|
|
.IX Subsection "Adapteva Epiphany Options"
|
10161 |
|
|
.PP
|
10162 |
|
|
These \fB\-m\fR options are defined for Adapteva Epiphany:
|
10163 |
|
|
.IP "\fB\-mhalf\-reg\-file\fR" 4
|
10164 |
|
|
.IX Item "-mhalf-reg-file"
|
10165 |
|
|
Don't allocate any register in the range \f(CW\*(C`r32\*(C'\fR...\f(CW\*(C`r63\*(C'\fR.
|
10166 |
|
|
That allows code to run on hardware variants that lack these registers.
|
10167 |
|
|
.IP "\fB\-mprefer\-short\-insn\-regs\fR" 4
|
10168 |
|
|
.IX Item "-mprefer-short-insn-regs"
|
10169 |
|
|
Preferrentially allocate registers that allow short instruction generation.
|
10170 |
|
|
This can result in increased instruction count, so this may either reduce or
|
10171 |
|
|
increase overall code size.
|
10172 |
|
|
.IP "\fB\-mbranch\-cost=\fR\fInum\fR" 4
|
10173 |
|
|
.IX Item "-mbranch-cost=num"
|
10174 |
|
|
Set the cost of branches to roughly \fInum\fR \*(L"simple\*(R" instructions.
|
10175 |
|
|
This cost is only a heuristic and is not guaranteed to produce
|
10176 |
|
|
consistent results across releases.
|
10177 |
|
|
.IP "\fB\-mcmove\fR" 4
|
10178 |
|
|
.IX Item "-mcmove"
|
10179 |
|
|
Enable the generation of conditional moves.
|
10180 |
|
|
.IP "\fB\-mnops=\fR\fInum\fR" 4
|
10181 |
|
|
.IX Item "-mnops=num"
|
10182 |
|
|
Emit \fInum\fR NOPs before every other generated instruction.
|
10183 |
|
|
.IP "\fB\-mno\-soft\-cmpsf\fR" 4
|
10184 |
|
|
.IX Item "-mno-soft-cmpsf"
|
10185 |
|
|
For single-precision floating-point comparisons, emit an \f(CW\*(C`fsub\*(C'\fR instruction
|
10186 |
|
|
and test the flags. This is faster than a software comparison, but can
|
10187 |
|
|
get incorrect results in the presence of NaNs, or when two different small
|
10188 |
|
|
numbers are compared such that their difference is calculated as zero.
|
10189 |
|
|
The default is \fB\-msoft\-cmpsf\fR, which uses slower, but IEEE-compliant,
|
10190 |
|
|
software comparisons.
|
10191 |
|
|
.IP "\fB\-mstack\-offset=\fR\fInum\fR" 4
|
10192 |
|
|
.IX Item "-mstack-offset=num"
|
10193 |
|
|
Set the offset between the top of the stack and the stack pointer.
|
10194 |
|
|
E.g., a value of 8 means that the eight bytes in the range \f(CW\*(C`sp+0...sp+7\*(C'\fR
|
10195 |
|
|
can be used by leaf functions without stack allocation.
|
10196 |
|
|
Values other than \fB8\fR or \fB16\fR are untested and unlikely to work.
|
10197 |
|
|
Note also that this option changes the \s-1ABI\s0; compiling a program with a
|
10198 |
|
|
different stack offset than the libraries have been compiled with
|
10199 |
|
|
generally does not work.
|
10200 |
|
|
This option can be useful if you want to evaluate if a different stack
|
10201 |
|
|
offset would give you better code, but to actually use a different stack
|
10202 |
|
|
offset to build working programs, it is recommended to configure the
|
10203 |
|
|
toolchain with the appropriate \fB\-\-with\-stack\-offset=\fR\fInum\fR option.
|
10204 |
|
|
.IP "\fB\-mno\-round\-nearest\fR" 4
|
10205 |
|
|
.IX Item "-mno-round-nearest"
|
10206 |
|
|
Make the scheduler assume that the rounding mode has been set to
|
10207 |
|
|
truncating. The default is \fB\-mround\-nearest\fR.
|
10208 |
|
|
.IP "\fB\-mlong\-calls\fR" 4
|
10209 |
|
|
.IX Item "-mlong-calls"
|
10210 |
|
|
If not otherwise specified by an attribute, assume all calls might be beyond
|
10211 |
|
|
the offset range of the \f(CW\*(C`b\*(C'\fR / \f(CW\*(C`bl\*(C'\fR instructions, and therefore load the
|
10212 |
|
|
function address into a register before performing a (otherwise direct) call.
|
10213 |
|
|
This is the default.
|
10214 |
|
|
.IP "\fB\-mshort\-calls\fR" 4
|
10215 |
|
|
.IX Item "-mshort-calls"
|
10216 |
|
|
If not otherwise specified by an attribute, assume all direct calls are
|
10217 |
|
|
in the range of the \f(CW\*(C`b\*(C'\fR / \f(CW\*(C`bl\*(C'\fR instructions, so use these instructions
|
10218 |
|
|
for direct calls. The default is \fB\-mlong\-calls\fR.
|
10219 |
|
|
.IP "\fB\-msmall16\fR" 4
|
10220 |
|
|
.IX Item "-msmall16"
|
10221 |
|
|
Assume addresses can be loaded as 16\-bit unsigned values. This does not
|
10222 |
|
|
apply to function addresses for which \fB\-mlong\-calls\fR semantics
|
10223 |
|
|
are in effect.
|
10224 |
|
|
.IP "\fB\-mfp\-mode=\fR\fImode\fR" 4
|
10225 |
|
|
.IX Item "-mfp-mode=mode"
|
10226 |
|
|
Set the prevailing mode of the floating-point unit.
|
10227 |
|
|
This determines the floating-point mode that is provided and expected
|
10228 |
|
|
at function call and return time. Making this mode match the mode you
|
10229 |
|
|
predominantly need at function start can make your programs smaller and
|
10230 |
|
|
faster by avoiding unnecessary mode switches.
|
10231 |
|
|
.Sp
|
10232 |
|
|
\&\fImode\fR can be set to one the following values:
|
10233 |
|
|
.RS 4
|
10234 |
|
|
.IP "\fBcaller\fR" 4
|
10235 |
|
|
.IX Item "caller"
|
10236 |
|
|
Any mode at function entry is valid, and retained or restored when
|
10237 |
|
|
the function returns, and when it calls other functions.
|
10238 |
|
|
This mode is useful for compiling libraries or other compilation units
|
10239 |
|
|
you might want to incorporate into different programs with different
|
10240 |
|
|
prevailing \s-1FPU\s0 modes, and the convenience of being able to use a single
|
10241 |
|
|
object file outweighs the size and speed overhead for any extra
|
10242 |
|
|
mode switching that might be needed, compared with what would be needed
|
10243 |
|
|
with a more specific choice of prevailing \s-1FPU\s0 mode.
|
10244 |
|
|
.IP "\fBtruncate\fR" 4
|
10245 |
|
|
.IX Item "truncate"
|
10246 |
|
|
This is the mode used for floating-point calculations with
|
10247 |
|
|
truncating (i.e. round towards zero) rounding mode. That includes
|
10248 |
|
|
conversion from floating point to integer.
|
10249 |
|
|
.IP "\fBround-nearest\fR" 4
|
10250 |
|
|
.IX Item "round-nearest"
|
10251 |
|
|
This is the mode used for floating-point calculations with
|
10252 |
|
|
round-to-nearest-or-even rounding mode.
|
10253 |
|
|
.IP "\fBint\fR" 4
|
10254 |
|
|
.IX Item "int"
|
10255 |
|
|
This is the mode used to perform integer calculations in the \s-1FPU\s0, e.g.
|
10256 |
|
|
integer multiply, or integer multiply-and-accumulate.
|
10257 |
|
|
.RE
|
10258 |
|
|
.RS 4
|
10259 |
|
|
.Sp
|
10260 |
|
|
The default is \fB\-mfp\-mode=caller\fR
|
10261 |
|
|
.RE
|
10262 |
|
|
.IP "\fB\-mnosplit\-lohi\fR" 4
|
10263 |
|
|
.IX Item "-mnosplit-lohi"
|
10264 |
|
|
.PD 0
|
10265 |
|
|
.IP "\fB\-mno\-postinc\fR" 4
|
10266 |
|
|
.IX Item "-mno-postinc"
|
10267 |
|
|
.IP "\fB\-mno\-postmodify\fR" 4
|
10268 |
|
|
.IX Item "-mno-postmodify"
|
10269 |
|
|
.PD
|
10270 |
|
|
Code generation tweaks that disable, respectively, splitting of 32\-bit
|
10271 |
|
|
loads, generation of post-increment addresses, and generation of
|
10272 |
|
|
post-modify addresses. The defaults are \fBmsplit-lohi\fR,
|
10273 |
|
|
\&\fB\-mpost\-inc\fR, and \fB\-mpost\-modify\fR.
|
10274 |
|
|
.IP "\fB\-mnovect\-double\fR" 4
|
10275 |
|
|
.IX Item "-mnovect-double"
|
10276 |
|
|
Change the preferred \s-1SIMD\s0 mode to SImode. The default is
|
10277 |
|
|
\&\fB\-mvect\-double\fR, which uses DImode as preferred \s-1SIMD\s0 mode.
|
10278 |
|
|
.IP "\fB\-max\-vect\-align=\fR\fInum\fR" 4
|
10279 |
|
|
.IX Item "-max-vect-align=num"
|
10280 |
|
|
The maximum alignment for \s-1SIMD\s0 vector mode types.
|
10281 |
|
|
\&\fInum\fR may be 4 or 8. The default is 8.
|
10282 |
|
|
Note that this is an \s-1ABI\s0 change, even though many library function
|
10283 |
|
|
interfaces are unaffected if they don't use \s-1SIMD\s0 vector modes
|
10284 |
|
|
in places that affect size and/or alignment of relevant types.
|
10285 |
|
|
.IP "\fB\-msplit\-vecmove\-early\fR" 4
|
10286 |
|
|
.IX Item "-msplit-vecmove-early"
|
10287 |
|
|
Split vector moves into single word moves before reload. In theory this
|
10288 |
|
|
can give better register allocation, but so far the reverse seems to be
|
10289 |
|
|
generally the case.
|
10290 |
|
|
.IP "\fB\-m1reg\-\fR\fIreg\fR" 4
|
10291 |
|
|
.IX Item "-m1reg-reg"
|
10292 |
|
|
Specify a register to hold the constant \-1, which makes loading small negative
|
10293 |
|
|
constants and certain bitmasks faster.
|
10294 |
|
|
Allowable values for \fIreg\fR are \fBr43\fR and \fBr63\fR,
|
10295 |
|
|
which specify use of that register as a fixed register,
|
10296 |
|
|
and \fBnone\fR, which means that no register is used for this
|
10297 |
|
|
purpose. The default is \fB\-m1reg\-none\fR.
|
10298 |
|
|
.PP
|
10299 |
|
|
\fIAArch64 Options\fR
|
10300 |
|
|
.IX Subsection "AArch64 Options"
|
10301 |
|
|
.PP
|
10302 |
|
|
These options are defined for AArch64 implementations:
|
10303 |
|
|
.IP "\fB\-mbig\-endian\fR" 4
|
10304 |
|
|
.IX Item "-mbig-endian"
|
10305 |
|
|
Generate big-endian code. This is the default when \s-1GCC\s0 is configured for an
|
10306 |
|
|
\&\fBaarch64_be\-*\-*\fR target.
|
10307 |
|
|
.IP "\fB\-mgeneral\-regs\-only\fR" 4
|
10308 |
|
|
.IX Item "-mgeneral-regs-only"
|
10309 |
|
|
Generate code which uses only the general registers.
|
10310 |
|
|
.IP "\fB\-mlittle\-endian\fR" 4
|
10311 |
|
|
.IX Item "-mlittle-endian"
|
10312 |
|
|
Generate little-endian code. This is the default when \s-1GCC\s0 is configured for an
|
10313 |
|
|
\&\fBaarch64\-*\-*\fR but not an \fBaarch64_be\-*\-*\fR target.
|
10314 |
|
|
.IP "\fB\-mcmodel=tiny\fR" 4
|
10315 |
|
|
.IX Item "-mcmodel=tiny"
|
10316 |
|
|
Generate code for the tiny code model. The program and its statically defined
|
10317 |
|
|
symbols must be within 1GB of each other. Pointers are 64 bits. Programs can
|
10318 |
|
|
be statically or dynamically linked. This model is not fully implemented and
|
10319 |
|
|
mostly treated as \fBsmall\fR.
|
10320 |
|
|
.IP "\fB\-mcmodel=small\fR" 4
|
10321 |
|
|
.IX Item "-mcmodel=small"
|
10322 |
|
|
Generate code for the small code model. The program and its statically defined
|
10323 |
|
|
symbols must be within 4GB of each other. Pointers are 64 bits. Programs can
|
10324 |
|
|
be statically or dynamically linked. This is the default code model.
|
10325 |
|
|
.IP "\fB\-mcmodel=large\fR" 4
|
10326 |
|
|
.IX Item "-mcmodel=large"
|
10327 |
|
|
Generate code for the large code model. This makes no assumptions about
|
10328 |
|
|
addresses and sizes of sections. Pointers are 64 bits. Programs can be
|
10329 |
|
|
statically linked only.
|
10330 |
|
|
.IP "\fB\-mstrict\-align\fR" 4
|
10331 |
|
|
.IX Item "-mstrict-align"
|
10332 |
|
|
Do not assume that unaligned memory references will be handled by the system.
|
10333 |
|
|
.IP "\fB\-momit\-leaf\-frame\-pointer\fR" 4
|
10334 |
|
|
.IX Item "-momit-leaf-frame-pointer"
|
10335 |
|
|
.PD 0
|
10336 |
|
|
.IP "\fB\-mno\-omit\-leaf\-frame\-pointer\fR" 4
|
10337 |
|
|
.IX Item "-mno-omit-leaf-frame-pointer"
|
10338 |
|
|
.PD
|
10339 |
|
|
Omit or keep the frame pointer in leaf functions. The former behaviour is the
|
10340 |
|
|
default.
|
10341 |
|
|
.IP "\fB\-mtls\-dialect=desc\fR" 4
|
10342 |
|
|
.IX Item "-mtls-dialect=desc"
|
10343 |
|
|
Use \s-1TLS\s0 descriptors as the thread-local storage mechanism for dynamic accesses
|
10344 |
|
|
of \s-1TLS\s0 variables. This is the default.
|
10345 |
|
|
.IP "\fB\-mtls\-dialect=traditional\fR" 4
|
10346 |
|
|
.IX Item "-mtls-dialect=traditional"
|
10347 |
|
|
Use traditional \s-1TLS\s0 as the thread-local storage mechanism for dynamic accesses
|
10348 |
|
|
of \s-1TLS\s0 variables.
|
10349 |
|
|
.IP "\fB\-march=\fR\fIname\fR" 4
|
10350 |
|
|
.IX Item "-march=name"
|
10351 |
|
|
Specify the name of the target architecture, optionally suffixed by one or
|
10352 |
|
|
more feature modifiers. This option has the form
|
10353 |
|
|
\&\fB\-march=\fR\fIarch\fR{\fB+\fR[\fBno\fR]\fIfeature\fR}*, where the
|
10354 |
|
|
only value for \fIarch\fR is \fBarmv8\-a\fR. The possible values for
|
10355 |
|
|
\&\fIfeature\fR are documented in the sub-section below.
|
10356 |
|
|
.Sp
|
10357 |
|
|
Where conflicting feature modifiers are specified, the right-most feature is
|
10358 |
|
|
used.
|
10359 |
|
|
.Sp
|
10360 |
|
|
\&\s-1GCC\s0 uses this name to determine what kind of instructions it can emit when
|
10361 |
|
|
generating assembly code. This option can be used in conjunction with or
|
10362 |
|
|
instead of the \fB\-mcpu=\fR option.
|
10363 |
|
|
.IP "\fB\-mcpu=\fR\fIname\fR" 4
|
10364 |
|
|
.IX Item "-mcpu=name"
|
10365 |
|
|
Specify the name of the target processor, optionally suffixed by one or more
|
10366 |
|
|
feature modifiers. This option has the form
|
10367 |
|
|
\&\fB\-mcpu=\fR\fIcpu\fR{\fB+\fR[\fBno\fR]\fIfeature\fR}*, where the
|
10368 |
|
|
possible values for \fIcpu\fR are \fBgeneric\fR, \fBlarge\fR. The
|
10369 |
|
|
possible values for \fIfeature\fR are documented in the sub-section
|
10370 |
|
|
below.
|
10371 |
|
|
.Sp
|
10372 |
|
|
Where conflicting feature modifiers are specified, the right-most feature is
|
10373 |
|
|
used.
|
10374 |
|
|
.Sp
|
10375 |
|
|
\&\s-1GCC\s0 uses this name to determine what kind of instructions it can emit when
|
10376 |
|
|
generating assembly code.
|
10377 |
|
|
.IP "\fB\-mtune=\fR\fIname\fR" 4
|
10378 |
|
|
.IX Item "-mtune=name"
|
10379 |
|
|
Specify the name of the processor to tune the performance for. The code will
|
10380 |
|
|
be tuned as if the target processor were of the type specified in this option,
|
10381 |
|
|
but still using instructions compatible with the target processor specified
|
10382 |
|
|
by a \fB\-mcpu=\fR option. This option cannot be suffixed by feature
|
10383 |
|
|
modifiers.
|
10384 |
|
|
.PP
|
10385 |
|
|
\fB\-march\fR and \fB\-mcpu\fR feature modifiers
|
10386 |
|
|
.IX Subsection "-march and -mcpu feature modifiers"
|
10387 |
|
|
.PP
|
10388 |
|
|
Feature modifiers used with \fB\-march\fR and \fB\-mcpu\fR can be one
|
10389 |
|
|
the following:
|
10390 |
|
|
.IP "\fBcrypto\fR" 4
|
10391 |
|
|
.IX Item "crypto"
|
10392 |
|
|
Enable Crypto extension. This implies Advanced \s-1SIMD\s0 is enabled.
|
10393 |
|
|
.IP "\fBfp\fR" 4
|
10394 |
|
|
.IX Item "fp"
|
10395 |
|
|
Enable floating-point instructions.
|
10396 |
|
|
.IP "\fBsimd\fR" 4
|
10397 |
|
|
.IX Item "simd"
|
10398 |
|
|
Enable Advanced \s-1SIMD\s0 instructions. This implies floating-point instructions
|
10399 |
|
|
are enabled. This is the default for all current possible values for options
|
10400 |
|
|
\&\fB\-march\fR and \fB\-mcpu=\fR.
|
10401 |
|
|
.PP
|
10402 |
|
|
\fI\s-1ARM\s0 Options\fR
|
10403 |
|
|
.IX Subsection "ARM Options"
|
10404 |
|
|
.PP
|
10405 |
|
|
These \fB\-m\fR options are defined for Advanced \s-1RISC\s0 Machines (\s-1ARM\s0)
|
10406 |
|
|
architectures:
|
10407 |
|
|
.IP "\fB\-mabi=\fR\fIname\fR" 4
|
10408 |
|
|
.IX Item "-mabi=name"
|
10409 |
|
|
Generate code for the specified \s-1ABI\s0. Permissible values are: \fBapcs-gnu\fR,
|
10410 |
|
|
\&\fBatpcs\fR, \fBaapcs\fR, \fBaapcs-linux\fR and \fBiwmmxt\fR.
|
10411 |
|
|
.IP "\fB\-mapcs\-frame\fR" 4
|
10412 |
|
|
.IX Item "-mapcs-frame"
|
10413 |
|
|
Generate a stack frame that is compliant with the \s-1ARM\s0 Procedure Call
|
10414 |
|
|
Standard for all functions, even if this is not strictly necessary for
|
10415 |
|
|
correct execution of the code. Specifying \fB\-fomit\-frame\-pointer\fR
|
10416 |
|
|
with this option causes the stack frames not to be generated for
|
10417 |
|
|
leaf functions. The default is \fB\-mno\-apcs\-frame\fR.
|
10418 |
|
|
.IP "\fB\-mapcs\fR" 4
|
10419 |
|
|
.IX Item "-mapcs"
|
10420 |
|
|
This is a synonym for \fB\-mapcs\-frame\fR.
|
10421 |
|
|
.IP "\fB\-mthumb\-interwork\fR" 4
|
10422 |
|
|
.IX Item "-mthumb-interwork"
|
10423 |
|
|
Generate code that supports calling between the \s-1ARM\s0 and Thumb
|
10424 |
|
|
instruction sets. Without this option, on pre\-v5 architectures, the
|
10425 |
|
|
two instruction sets cannot be reliably used inside one program. The
|
10426 |
|
|
default is \fB\-mno\-thumb\-interwork\fR, since slightly larger code
|
10427 |
|
|
is generated when \fB\-mthumb\-interwork\fR is specified. In \s-1AAPCS\s0
|
10428 |
|
|
configurations this option is meaningless.
|
10429 |
|
|
.IP "\fB\-mno\-sched\-prolog\fR" 4
|
10430 |
|
|
.IX Item "-mno-sched-prolog"
|
10431 |
|
|
Prevent the reordering of instructions in the function prologue, or the
|
10432 |
|
|
merging of those instruction with the instructions in the function's
|
10433 |
|
|
body. This means that all functions start with a recognizable set
|
10434 |
|
|
of instructions (or in fact one of a choice from a small set of
|
10435 |
|
|
different function prologues), and this information can be used to
|
10436 |
|
|
locate the start of functions inside an executable piece of code. The
|
10437 |
|
|
default is \fB\-msched\-prolog\fR.
|
10438 |
|
|
.IP "\fB\-mfloat\-abi=\fR\fIname\fR" 4
|
10439 |
|
|
.IX Item "-mfloat-abi=name"
|
10440 |
|
|
Specifies which floating-point \s-1ABI\s0 to use. Permissible values
|
10441 |
|
|
are: \fBsoft\fR, \fBsoftfp\fR and \fBhard\fR.
|
10442 |
|
|
.Sp
|
10443 |
|
|
Specifying \fBsoft\fR causes \s-1GCC\s0 to generate output containing
|
10444 |
|
|
library calls for floating-point operations.
|
10445 |
|
|
\&\fBsoftfp\fR allows the generation of code using hardware floating-point
|
10446 |
|
|
instructions, but still uses the soft-float calling conventions.
|
10447 |
|
|
\&\fBhard\fR allows generation of floating-point instructions
|
10448 |
|
|
and uses FPU-specific calling conventions.
|
10449 |
|
|
.Sp
|
10450 |
|
|
The default depends on the specific target configuration. Note that
|
10451 |
|
|
the hard-float and soft-float ABIs are not link-compatible; you must
|
10452 |
|
|
compile your entire program with the same \s-1ABI\s0, and link with a
|
10453 |
|
|
compatible set of libraries.
|
10454 |
|
|
.IP "\fB\-mlittle\-endian\fR" 4
|
10455 |
|
|
.IX Item "-mlittle-endian"
|
10456 |
|
|
Generate code for a processor running in little-endian mode. This is
|
10457 |
|
|
the default for all standard configurations.
|
10458 |
|
|
.IP "\fB\-mbig\-endian\fR" 4
|
10459 |
|
|
.IX Item "-mbig-endian"
|
10460 |
|
|
Generate code for a processor running in big-endian mode; the default is
|
10461 |
|
|
to compile code for a little-endian processor.
|
10462 |
|
|
.IP "\fB\-mwords\-little\-endian\fR" 4
|
10463 |
|
|
.IX Item "-mwords-little-endian"
|
10464 |
|
|
This option only applies when generating code for big-endian processors.
|
10465 |
|
|
Generate code for a little-endian word order but a big-endian byte
|
10466 |
|
|
order. That is, a byte order of the form \fB32107654\fR. Note: this
|
10467 |
|
|
option should only be used if you require compatibility with code for
|
10468 |
|
|
big-endian \s-1ARM\s0 processors generated by versions of the compiler prior to
|
10469 |
|
|
2.8. This option is now deprecated.
|
10470 |
|
|
.IP "\fB\-mcpu=\fR\fIname\fR" 4
|
10471 |
|
|
.IX Item "-mcpu=name"
|
10472 |
|
|
This specifies the name of the target \s-1ARM\s0 processor. \s-1GCC\s0 uses this name
|
10473 |
|
|
to determine what kind of instructions it can emit when generating
|
10474 |
|
|
assembly code. Permissible names are: \fBarm2\fR, \fBarm250\fR,
|
10475 |
|
|
\&\fBarm3\fR, \fBarm6\fR, \fBarm60\fR, \fBarm600\fR, \fBarm610\fR,
|
10476 |
|
|
\&\fBarm620\fR, \fBarm7\fR, \fBarm7m\fR, \fBarm7d\fR, \fBarm7dm\fR,
|
10477 |
|
|
\&\fBarm7di\fR, \fBarm7dmi\fR, \fBarm70\fR, \fBarm700\fR,
|
10478 |
|
|
\&\fBarm700i\fR, \fBarm710\fR, \fBarm710c\fR, \fBarm7100\fR,
|
10479 |
|
|
\&\fBarm720\fR,
|
10480 |
|
|
\&\fBarm7500\fR, \fBarm7500fe\fR, \fBarm7tdmi\fR, \fBarm7tdmi\-s\fR,
|
10481 |
|
|
\&\fBarm710t\fR, \fBarm720t\fR, \fBarm740t\fR,
|
10482 |
|
|
\&\fBstrongarm\fR, \fBstrongarm110\fR, \fBstrongarm1100\fR,
|
10483 |
|
|
\&\fBstrongarm1110\fR,
|
10484 |
|
|
\&\fBarm8\fR, \fBarm810\fR, \fBarm9\fR, \fBarm9e\fR, \fBarm920\fR,
|
10485 |
|
|
\&\fBarm920t\fR, \fBarm922t\fR, \fBarm946e\-s\fR, \fBarm966e\-s\fR,
|
10486 |
|
|
\&\fBarm968e\-s\fR, \fBarm926ej\-s\fR, \fBarm940t\fR, \fBarm9tdmi\fR,
|
10487 |
|
|
\&\fBarm10tdmi\fR, \fBarm1020t\fR, \fBarm1026ej\-s\fR,
|
10488 |
|
|
\&\fBarm10e\fR, \fBarm1020e\fR, \fBarm1022e\fR,
|
10489 |
|
|
\&\fBarm1136j\-s\fR, \fBarm1136jf\-s\fR, \fBmpcore\fR, \fBmpcorenovfp\fR,
|
10490 |
|
|
\&\fBarm1156t2\-s\fR, \fBarm1156t2f\-s\fR, \fBarm1176jz\-s\fR, \fBarm1176jzf\-s\fR,
|
10491 |
|
|
\&\fBcortex\-a5\fR, \fBcortex\-a7\fR, \fBcortex\-a8\fR, \fBcortex\-a9\fR,
|
10492 |
|
|
\&\fBcortex\-a15\fR, \fBcortex\-r4\fR, \fBcortex\-r4f\fR, \fBcortex\-r5\fR,
|
10493 |
|
|
\&\fBcortex\-m4\fR, \fBcortex\-m3\fR,
|
10494 |
|
|
\&\fBcortex\-m1\fR,
|
10495 |
|
|
\&\fBcortex\-m0\fR,
|
10496 |
|
|
\&\fBcortex\-m0plus\fR,
|
10497 |
|
|
\&\fBxscale\fR, \fBiwmmxt\fR, \fBiwmmxt2\fR, \fBep9312\fR,
|
10498 |
|
|
\&\fBfa526\fR, \fBfa626\fR,
|
10499 |
|
|
\&\fBfa606te\fR, \fBfa626te\fR, \fBfmp626\fR, \fBfa726te\fR.
|
10500 |
|
|
.Sp
|
10501 |
|
|
\&\fB\-mcpu=generic\-\fR\fIarch\fR is also permissible, and is
|
10502 |
|
|
equivalent to \fB\-march=\fR\fIarch\fR \fB\-mtune=generic\-\fR\fIarch\fR.
|
10503 |
|
|
See \fB\-mtune\fR for more information.
|
10504 |
|
|
.Sp
|
10505 |
|
|
\&\fB\-mcpu=native\fR causes the compiler to auto-detect the \s-1CPU\s0
|
10506 |
|
|
of the build computer. At present, this feature is only supported on
|
10507 |
|
|
Linux, and not all architectures are recognized. If the auto-detect is
|
10508 |
|
|
unsuccessful the option has no effect.
|
10509 |
|
|
.IP "\fB\-mtune=\fR\fIname\fR" 4
|
10510 |
|
|
.IX Item "-mtune=name"
|
10511 |
|
|
This option is very similar to the \fB\-mcpu=\fR option, except that
|
10512 |
|
|
instead of specifying the actual target processor type, and hence
|
10513 |
|
|
restricting which instructions can be used, it specifies that \s-1GCC\s0 should
|
10514 |
|
|
tune the performance of the code as if the target were of the type
|
10515 |
|
|
specified in this option, but still choosing the instructions it
|
10516 |
|
|
generates based on the \s-1CPU\s0 specified by a \fB\-mcpu=\fR option.
|
10517 |
|
|
For some \s-1ARM\s0 implementations better performance can be obtained by using
|
10518 |
|
|
this option.
|
10519 |
|
|
.Sp
|
10520 |
|
|
\&\fB\-mtune=generic\-\fR\fIarch\fR specifies that \s-1GCC\s0 should tune the
|
10521 |
|
|
performance for a blend of processors within architecture \fIarch\fR.
|
10522 |
|
|
The aim is to generate code that run well on the current most popular
|
10523 |
|
|
processors, balancing between optimizations that benefit some CPUs in the
|
10524 |
|
|
range, and avoiding performance pitfalls of other CPUs. The effects of
|
10525 |
|
|
this option may change in future \s-1GCC\s0 versions as \s-1CPU\s0 models come and go.
|
10526 |
|
|
.Sp
|
10527 |
|
|
\&\fB\-mtune=native\fR causes the compiler to auto-detect the \s-1CPU\s0
|
10528 |
|
|
of the build computer. At present, this feature is only supported on
|
10529 |
|
|
Linux, and not all architectures are recognized. If the auto-detect is
|
10530 |
|
|
unsuccessful the option has no effect.
|
10531 |
|
|
.IP "\fB\-march=\fR\fIname\fR" 4
|
10532 |
|
|
.IX Item "-march=name"
|
10533 |
|
|
This specifies the name of the target \s-1ARM\s0 architecture. \s-1GCC\s0 uses this
|
10534 |
|
|
name to determine what kind of instructions it can emit when generating
|
10535 |
|
|
assembly code. This option can be used in conjunction with or instead
|
10536 |
|
|
of the \fB\-mcpu=\fR option. Permissible names are: \fBarmv2\fR,
|
10537 |
|
|
\&\fBarmv2a\fR, \fBarmv3\fR, \fBarmv3m\fR, \fBarmv4\fR, \fBarmv4t\fR,
|
10538 |
|
|
\&\fBarmv5\fR, \fBarmv5t\fR, \fBarmv5e\fR, \fBarmv5te\fR,
|
10539 |
|
|
\&\fBarmv6\fR, \fBarmv6j\fR,
|
10540 |
|
|
\&\fBarmv6t2\fR, \fBarmv6z\fR, \fBarmv6zk\fR, \fBarmv6\-m\fR,
|
10541 |
|
|
\&\fBarmv7\fR, \fBarmv7\-a\fR, \fBarmv7\-r\fR, \fBarmv7\-m\fR,
|
10542 |
|
|
\&\fBarmv8\-a\fR,
|
10543 |
|
|
\&\fBiwmmxt\fR, \fBiwmmxt2\fR, \fBep9312\fR.
|
10544 |
|
|
.Sp
|
10545 |
|
|
\&\fB\-march=native\fR causes the compiler to auto-detect the architecture
|
10546 |
|
|
of the build computer. At present, this feature is only supported on
|
10547 |
|
|
Linux, and not all architectures are recognized. If the auto-detect is
|
10548 |
|
|
unsuccessful the option has no effect.
|
10549 |
|
|
.IP "\fB\-mfpu=\fR\fIname\fR" 4
|
10550 |
|
|
.IX Item "-mfpu=name"
|
10551 |
|
|
This specifies what floating-point hardware (or hardware emulation) is
|
10552 |
|
|
available on the target. Permissible names are: \fBvfp\fR, \fBvfpv3\fR,
|
10553 |
|
|
\&\fBvfpv3\-fp16\fR, \fBvfpv3\-d16\fR, \fBvfpv3\-d16\-fp16\fR, \fBvfpv3xd\fR,
|
10554 |
|
|
\&\fBvfpv3xd\-fp16\fR, \fBneon\fR, \fBneon\-fp16\fR, \fBvfpv4\fR,
|
10555 |
|
|
\&\fBvfpv4\-d16\fR, \fBfpv4\-sp\-d16\fR, \fBneon\-vfpv4\fR,
|
10556 |
|
|
\&\fBfp\-armv8\fR, \fBneon\-fp\-armv8\fR, and \fBcrypto\-neon\-fp\-armv8\fR.
|
10557 |
|
|
.Sp
|
10558 |
|
|
If \fB\-msoft\-float\fR is specified this specifies the format of
|
10559 |
|
|
floating-point values.
|
10560 |
|
|
.Sp
|
10561 |
|
|
If the selected floating-point hardware includes the \s-1NEON\s0 extension
|
10562 |
|
|
(e.g. \fB\-mfpu\fR=\fBneon\fR), note that floating-point
|
10563 |
|
|
operations are not generated by \s-1GCC\s0's auto-vectorization pass unless
|
10564 |
|
|
\&\fB\-funsafe\-math\-optimizations\fR is also specified. This is
|
10565 |
|
|
because \s-1NEON\s0 hardware does not fully implement the \s-1IEEE\s0 754 standard for
|
10566 |
|
|
floating-point arithmetic (in particular denormal values are treated as
|
10567 |
|
|
zero), so the use of \s-1NEON\s0 instructions may lead to a loss of precision.
|
10568 |
|
|
.IP "\fB\-mfp16\-format=\fR\fIname\fR" 4
|
10569 |
|
|
.IX Item "-mfp16-format=name"
|
10570 |
|
|
Specify the format of the \f(CW\*(C`_\|_fp16\*(C'\fR half-precision floating-point type.
|
10571 |
|
|
Permissible names are \fBnone\fR, \fBieee\fR, and \fBalternative\fR;
|
10572 |
|
|
the default is \fBnone\fR, in which case the \f(CW\*(C`_\|_fp16\*(C'\fR type is not
|
10573 |
|
|
defined.
|
10574 |
|
|
.IP "\fB\-mstructure\-size\-boundary=\fR\fIn\fR" 4
|
10575 |
|
|
.IX Item "-mstructure-size-boundary=n"
|
10576 |
|
|
The sizes of all structures and unions are rounded up to a multiple
|
10577 |
|
|
of the number of bits set by this option. Permissible values are 8, 32
|
10578 |
|
|
and 64. The default value varies for different toolchains. For the \s-1COFF\s0
|
10579 |
|
|
targeted toolchain the default value is 8. A value of 64 is only allowed
|
10580 |
|
|
if the underlying \s-1ABI\s0 supports it.
|
10581 |
|
|
.Sp
|
10582 |
|
|
Specifying a larger number can produce faster, more efficient code, but
|
10583 |
|
|
can also increase the size of the program. Different values are potentially
|
10584 |
|
|
incompatible. Code compiled with one value cannot necessarily expect to
|
10585 |
|
|
work with code or libraries compiled with another value, if they exchange
|
10586 |
|
|
information using structures or unions.
|
10587 |
|
|
.IP "\fB\-mabort\-on\-noreturn\fR" 4
|
10588 |
|
|
.IX Item "-mabort-on-noreturn"
|
10589 |
|
|
Generate a call to the function \f(CW\*(C`abort\*(C'\fR at the end of a
|
10590 |
|
|
\&\f(CW\*(C`noreturn\*(C'\fR function. It is executed if the function tries to
|
10591 |
|
|
return.
|
10592 |
|
|
.IP "\fB\-mlong\-calls\fR" 4
|
10593 |
|
|
.IX Item "-mlong-calls"
|
10594 |
|
|
.PD 0
|
10595 |
|
|
.IP "\fB\-mno\-long\-calls\fR" 4
|
10596 |
|
|
.IX Item "-mno-long-calls"
|
10597 |
|
|
.PD
|
10598 |
|
|
Tells the compiler to perform function calls by first loading the
|
10599 |
|
|
address of the function into a register and then performing a subroutine
|
10600 |
|
|
call on this register. This switch is needed if the target function
|
10601 |
|
|
lies outside of the 64\-megabyte addressing range of the offset-based
|
10602 |
|
|
version of subroutine call instruction.
|
10603 |
|
|
.Sp
|
10604 |
|
|
Even if this switch is enabled, not all function calls are turned
|
10605 |
|
|
into long calls. The heuristic is that static functions, functions
|
10606 |
|
|
that have the \fBshort-call\fR attribute, functions that are inside
|
10607 |
|
|
the scope of a \fB#pragma no_long_calls\fR directive, and functions whose
|
10608 |
|
|
definitions have already been compiled within the current compilation
|
10609 |
|
|
unit are not turned into long calls. The exceptions to this rule are
|
10610 |
|
|
that weak function definitions, functions with the \fBlong-call\fR
|
10611 |
|
|
attribute or the \fBsection\fR attribute, and functions that are within
|
10612 |
|
|
the scope of a \fB#pragma long_calls\fR directive are always
|
10613 |
|
|
turned into long calls.
|
10614 |
|
|
.Sp
|
10615 |
|
|
This feature is not enabled by default. Specifying
|
10616 |
|
|
\&\fB\-mno\-long\-calls\fR restores the default behavior, as does
|
10617 |
|
|
placing the function calls within the scope of a \fB#pragma
|
10618 |
|
|
long_calls_off\fR directive. Note these switches have no effect on how
|
10619 |
|
|
the compiler generates code to handle function calls via function
|
10620 |
|
|
pointers.
|
10621 |
|
|
.IP "\fB\-msingle\-pic\-base\fR" 4
|
10622 |
|
|
.IX Item "-msingle-pic-base"
|
10623 |
|
|
Treat the register used for \s-1PIC\s0 addressing as read-only, rather than
|
10624 |
|
|
loading it in the prologue for each function. The runtime system is
|
10625 |
|
|
responsible for initializing this register with an appropriate value
|
10626 |
|
|
before execution begins.
|
10627 |
|
|
.IP "\fB\-mpic\-register=\fR\fIreg\fR" 4
|
10628 |
|
|
.IX Item "-mpic-register=reg"
|
10629 |
|
|
Specify the register to be used for \s-1PIC\s0 addressing. The default is R10
|
10630 |
|
|
unless stack-checking is enabled, when R9 is used.
|
10631 |
|
|
.IP "\fB\-mcirrus\-fix\-invalid\-insns\fR" 4
|
10632 |
|
|
.IX Item "-mcirrus-fix-invalid-insns"
|
10633 |
|
|
Insert NOPs into the instruction stream to in order to work around
|
10634 |
|
|
problems with invalid Maverick instruction combinations. This option
|
10635 |
|
|
is only valid if the \fB\-mcpu=ep9312\fR option has been used to
|
10636 |
|
|
enable generation of instructions for the Cirrus Maverick floating-point
|
10637 |
|
|
co-processor. This option is not enabled by default, since the
|
10638 |
|
|
problem is only present in older Maverick implementations. The default
|
10639 |
|
|
can be re-enabled by use of the \fB\-mno\-cirrus\-fix\-invalid\-insns\fR
|
10640 |
|
|
switch.
|
10641 |
|
|
.IP "\fB\-mpoke\-function\-name\fR" 4
|
10642 |
|
|
.IX Item "-mpoke-function-name"
|
10643 |
|
|
Write the name of each function into the text section, directly
|
10644 |
|
|
preceding the function prologue. The generated code is similar to this:
|
10645 |
|
|
.Sp
|
10646 |
|
|
.Vb 9
|
10647 |
|
|
\& t0
|
10648 |
|
|
\& .ascii "arm_poke_function_name", 0
|
10649 |
|
|
\& .align
|
10650 |
|
|
\& t1
|
10651 |
|
|
\& .word 0xff000000 + (t1 \- t0)
|
10652 |
|
|
\& arm_poke_function_name
|
10653 |
|
|
\& mov ip, sp
|
10654 |
|
|
\& stmfd sp!, {fp, ip, lr, pc}
|
10655 |
|
|
\& sub fp, ip, #4
|
10656 |
|
|
.Ve
|
10657 |
|
|
.Sp
|
10658 |
|
|
When performing a stack backtrace, code can inspect the value of
|
10659 |
|
|
\&\f(CW\*(C`pc\*(C'\fR stored at \f(CW\*(C`fp + 0\*(C'\fR. If the trace function then looks at
|
10660 |
|
|
location \f(CW\*(C`pc \- 12\*(C'\fR and the top 8 bits are set, then we know that
|
10661 |
|
|
there is a function name embedded immediately preceding this location
|
10662 |
|
|
and has length \f(CW\*(C`((pc[\-3]) & 0xff000000)\*(C'\fR.
|
10663 |
|
|
.IP "\fB\-mthumb\fR" 4
|
10664 |
|
|
.IX Item "-mthumb"
|
10665 |
|
|
.PD 0
|
10666 |
|
|
.IP "\fB\-marm\fR" 4
|
10667 |
|
|
.IX Item "-marm"
|
10668 |
|
|
.PD
|
10669 |
|
|
Select between generating code that executes in \s-1ARM\s0 and Thumb
|
10670 |
|
|
states. The default for most configurations is to generate code
|
10671 |
|
|
that executes in \s-1ARM\s0 state, but the default can be changed by
|
10672 |
|
|
configuring \s-1GCC\s0 with the \fB\-\-with\-mode=\fR\fIstate\fR
|
10673 |
|
|
configure option.
|
10674 |
|
|
.IP "\fB\-mtpcs\-frame\fR" 4
|
10675 |
|
|
.IX Item "-mtpcs-frame"
|
10676 |
|
|
Generate a stack frame that is compliant with the Thumb Procedure Call
|
10677 |
|
|
Standard for all non-leaf functions. (A leaf function is one that does
|
10678 |
|
|
not call any other functions.) The default is \fB\-mno\-tpcs\-frame\fR.
|
10679 |
|
|
.IP "\fB\-mtpcs\-leaf\-frame\fR" 4
|
10680 |
|
|
.IX Item "-mtpcs-leaf-frame"
|
10681 |
|
|
Generate a stack frame that is compliant with the Thumb Procedure Call
|
10682 |
|
|
Standard for all leaf functions. (A leaf function is one that does
|
10683 |
|
|
not call any other functions.) The default is \fB\-mno\-apcs\-leaf\-frame\fR.
|
10684 |
|
|
.IP "\fB\-mcallee\-super\-interworking\fR" 4
|
10685 |
|
|
.IX Item "-mcallee-super-interworking"
|
10686 |
|
|
Gives all externally visible functions in the file being compiled an \s-1ARM\s0
|
10687 |
|
|
instruction set header which switches to Thumb mode before executing the
|
10688 |
|
|
rest of the function. This allows these functions to be called from
|
10689 |
|
|
non-interworking code. This option is not valid in \s-1AAPCS\s0 configurations
|
10690 |
|
|
because interworking is enabled by default.
|
10691 |
|
|
.IP "\fB\-mcaller\-super\-interworking\fR" 4
|
10692 |
|
|
.IX Item "-mcaller-super-interworking"
|
10693 |
|
|
Allows calls via function pointers (including virtual functions) to
|
10694 |
|
|
execute correctly regardless of whether the target code has been
|
10695 |
|
|
compiled for interworking or not. There is a small overhead in the cost
|
10696 |
|
|
of executing a function pointer if this option is enabled. This option
|
10697 |
|
|
is not valid in \s-1AAPCS\s0 configurations because interworking is enabled
|
10698 |
|
|
by default.
|
10699 |
|
|
.IP "\fB\-mtp=\fR\fIname\fR" 4
|
10700 |
|
|
.IX Item "-mtp=name"
|
10701 |
|
|
Specify the access model for the thread local storage pointer. The valid
|
10702 |
|
|
models are \fBsoft\fR, which generates calls to \f(CW\*(C`_\|_aeabi_read_tp\*(C'\fR,
|
10703 |
|
|
\&\fBcp15\fR, which fetches the thread pointer from \f(CW\*(C`cp15\*(C'\fR directly
|
10704 |
|
|
(supported in the arm6k architecture), and \fBauto\fR, which uses the
|
10705 |
|
|
best available method for the selected processor. The default setting is
|
10706 |
|
|
\&\fBauto\fR.
|
10707 |
|
|
.IP "\fB\-mtls\-dialect=\fR\fIdialect\fR" 4
|
10708 |
|
|
.IX Item "-mtls-dialect=dialect"
|
10709 |
|
|
Specify the dialect to use for accessing thread local storage. Two
|
10710 |
|
|
\&\fIdialect\fRs are supported\-\-\-\fBgnu\fR and \fBgnu2\fR. The
|
10711 |
|
|
\&\fBgnu\fR dialect selects the original \s-1GNU\s0 scheme for supporting
|
10712 |
|
|
local and global dynamic \s-1TLS\s0 models. The \fBgnu2\fR dialect
|
10713 |
|
|
selects the \s-1GNU\s0 descriptor scheme, which provides better performance
|
10714 |
|
|
for shared libraries. The \s-1GNU\s0 descriptor scheme is compatible with
|
10715 |
|
|
the original scheme, but does require new assembler, linker and
|
10716 |
|
|
library support. Initial and local exec \s-1TLS\s0 models are unaffected by
|
10717 |
|
|
this option and always use the original scheme.
|
10718 |
|
|
.IP "\fB\-mword\-relocations\fR" 4
|
10719 |
|
|
.IX Item "-mword-relocations"
|
10720 |
|
|
Only generate absolute relocations on word-sized values (i.e. R_ARM_ABS32).
|
10721 |
|
|
This is enabled by default on targets (uClinux, SymbianOS) where the runtime
|
10722 |
|
|
loader imposes this restriction, and when \fB\-fpic\fR or \fB\-fPIC\fR
|
10723 |
|
|
is specified.
|
10724 |
|
|
.IP "\fB\-mfix\-cortex\-m3\-ldrd\fR" 4
|
10725 |
|
|
.IX Item "-mfix-cortex-m3-ldrd"
|
10726 |
|
|
Some Cortex\-M3 cores can cause data corruption when \f(CW\*(C`ldrd\*(C'\fR instructions
|
10727 |
|
|
with overlapping destination and base registers are used. This option avoids
|
10728 |
|
|
generating these instructions. This option is enabled by default when
|
10729 |
|
|
\&\fB\-mcpu=cortex\-m3\fR is specified.
|
10730 |
|
|
.IP "\fB\-munaligned\-access\fR" 4
|
10731 |
|
|
.IX Item "-munaligned-access"
|
10732 |
|
|
.PD 0
|
10733 |
|
|
.IP "\fB\-mno\-unaligned\-access\fR" 4
|
10734 |
|
|
.IX Item "-mno-unaligned-access"
|
10735 |
|
|
.PD
|
10736 |
|
|
Enables (or disables) reading and writing of 16\- and 32\- bit values
|
10737 |
|
|
from addresses that are not 16\- or 32\- bit aligned. By default
|
10738 |
|
|
unaligned access is disabled for all pre\-ARMv6 and all ARMv6\-M
|
10739 |
|
|
architectures, and enabled for all other architectures. If unaligned
|
10740 |
|
|
access is not enabled then words in packed data structures will be
|
10741 |
|
|
accessed a byte at a time.
|
10742 |
|
|
.Sp
|
10743 |
|
|
The \s-1ARM\s0 attribute \f(CW\*(C`Tag_CPU_unaligned_access\*(C'\fR will be set in the
|
10744 |
|
|
generated object file to either true or false, depending upon the
|
10745 |
|
|
setting of this option. If unaligned access is enabled then the
|
10746 |
|
|
preprocessor symbol \f(CW\*(C`_\|_ARM_FEATURE_UNALIGNED\*(C'\fR will also be
|
10747 |
|
|
defined.
|
10748 |
|
|
.PP
|
10749 |
|
|
\fI\s-1AVR\s0 Options\fR
|
10750 |
|
|
.IX Subsection "AVR Options"
|
10751 |
|
|
.PP
|
10752 |
|
|
These options are defined for \s-1AVR\s0 implementations:
|
10753 |
|
|
.IP "\fB\-mmcu=\fR\fImcu\fR" 4
|
10754 |
|
|
.IX Item "-mmcu=mcu"
|
10755 |
|
|
Specify Atmel \s-1AVR\s0 instruction set architectures (\s-1ISA\s0) or \s-1MCU\s0 type.
|
10756 |
|
|
.Sp
|
10757 |
|
|
The default for this option is@tie{}\f(CW\*(C`avr2\*(C'\fR.
|
10758 |
|
|
.Sp
|
10759 |
|
|
\&\s-1GCC\s0 supports the following \s-1AVR\s0 devices and ISAs:
|
10760 |
|
|
.RS 4
|
10761 |
|
|
.ie n .IP """avr2""" 4
|
10762 |
|
|
.el .IP "\f(CWavr2\fR" 4
|
10763 |
|
|
.IX Item "avr2"
|
10764 |
|
|
\&\*(L"Classic\*(R" devices with up to 8@tie{}KiB of program memory.
|
10765 |
|
|
\&\fImcu\fR\f(CW@tie\fR{}= \f(CW\*(C`attiny22\*(C'\fR, \f(CW\*(C`attiny26\*(C'\fR, \f(CW\*(C`at90c8534\*(C'\fR, \f(CW\*(C`at90s2313\*(C'\fR, \f(CW\*(C`at90s2323\*(C'\fR, \f(CW\*(C`at90s2333\*(C'\fR, \f(CW\*(C`at90s2343\*(C'\fR, \f(CW\*(C`at90s4414\*(C'\fR, \f(CW\*(C`at90s4433\*(C'\fR, \f(CW\*(C`at90s4434\*(C'\fR, \f(CW\*(C`at90s8515\*(C'\fR, \f(CW\*(C`at90s8535\*(C'\fR.
|
10766 |
|
|
.ie n .IP """avr25""" 4
|
10767 |
|
|
.el .IP "\f(CWavr25\fR" 4
|
10768 |
|
|
.IX Item "avr25"
|
10769 |
|
|
\&\*(L"Classic\*(R" devices with up to 8@tie{}KiB of program memory and with the \f(CW\*(C`MOVW\*(C'\fR instruction.
|
10770 |
|
|
\&\fImcu\fR\f(CW@tie\fR{}= \f(CW\*(C`ata6289\*(C'\fR, \f(CW\*(C`attiny13\*(C'\fR, \f(CW\*(C`attiny13a\*(C'\fR, \f(CW\*(C`attiny2313\*(C'\fR, \f(CW\*(C`attiny2313a\*(C'\fR, \f(CW\*(C`attiny24\*(C'\fR, \f(CW\*(C`attiny24a\*(C'\fR, \f(CW\*(C`attiny25\*(C'\fR, \f(CW\*(C`attiny261\*(C'\fR, \f(CW\*(C`attiny261a\*(C'\fR, \f(CW\*(C`attiny43u\*(C'\fR, \f(CW\*(C`attiny4313\*(C'\fR, \f(CW\*(C`attiny44\*(C'\fR, \f(CW\*(C`attiny44a\*(C'\fR, \f(CW\*(C`attiny45\*(C'\fR, \f(CW\*(C`attiny461\*(C'\fR, \f(CW\*(C`attiny461a\*(C'\fR, \f(CW\*(C`attiny48\*(C'\fR, \f(CW\*(C`attiny84\*(C'\fR, \f(CW\*(C`attiny84a\*(C'\fR, \f(CW\*(C`attiny85\*(C'\fR, \f(CW\*(C`attiny861\*(C'\fR, \f(CW\*(C`attiny861a\*(C'\fR, \f(CW\*(C`attiny87\*(C'\fR, \f(CW\*(C`attiny88\*(C'\fR, \f(CW\*(C`at86rf401\*(C'\fR.
|
10771 |
|
|
.ie n .IP """avr3""" 4
|
10772 |
|
|
.el .IP "\f(CWavr3\fR" 4
|
10773 |
|
|
.IX Item "avr3"
|
10774 |
|
|
\&\*(L"Classic\*(R" devices with 16@tie{}KiB up to 64@tie{}KiB of program memory.
|
10775 |
|
|
\&\fImcu\fR\f(CW@tie\fR{}= \f(CW\*(C`at43usb355\*(C'\fR, \f(CW\*(C`at76c711\*(C'\fR.
|
10776 |
|
|
.ie n .IP """avr31""" 4
|
10777 |
|
|
.el .IP "\f(CWavr31\fR" 4
|
10778 |
|
|
.IX Item "avr31"
|
10779 |
|
|
\&\*(L"Classic\*(R" devices with 128@tie{}KiB of program memory.
|
10780 |
|
|
\&\fImcu\fR\f(CW@tie\fR{}= \f(CW\*(C`atmega103\*(C'\fR, \f(CW\*(C`at43usb320\*(C'\fR.
|
10781 |
|
|
.ie n .IP """avr35""" 4
|
10782 |
|
|
.el .IP "\f(CWavr35\fR" 4
|
10783 |
|
|
.IX Item "avr35"
|
10784 |
|
|
\&\*(L"Classic\*(R" devices with 16@tie{}KiB up to 64@tie{}KiB of program memory and with the \f(CW\*(C`MOVW\*(C'\fR instruction.
|
10785 |
|
|
\&\fImcu\fR\f(CW@tie\fR{}= \f(CW\*(C`atmega16u2\*(C'\fR, \f(CW\*(C`atmega32u2\*(C'\fR, \f(CW\*(C`atmega8u2\*(C'\fR, \f(CW\*(C`attiny167\*(C'\fR, \f(CW\*(C`at90usb162\*(C'\fR, \f(CW\*(C`at90usb82\*(C'\fR.
|
10786 |
|
|
.ie n .IP """avr4""" 4
|
10787 |
|
|
.el .IP "\f(CWavr4\fR" 4
|
10788 |
|
|
.IX Item "avr4"
|
10789 |
|
|
\&\*(L"Enhanced\*(R" devices with up to 8@tie{}KiB of program memory.
|
10790 |
|
|
\&\fImcu\fR\f(CW@tie\fR{}= \f(CW\*(C`atmega48\*(C'\fR, \f(CW\*(C`atmega48a\*(C'\fR, \f(CW\*(C`atmega48p\*(C'\fR, \f(CW\*(C`atmega8\*(C'\fR, \f(CW\*(C`atmega8hva\*(C'\fR, \f(CW\*(C`atmega8515\*(C'\fR, \f(CW\*(C`atmega8535\*(C'\fR, \f(CW\*(C`atmega88\*(C'\fR, \f(CW\*(C`atmega88a\*(C'\fR, \f(CW\*(C`atmega88p\*(C'\fR, \f(CW\*(C`atmega88pa\*(C'\fR, \f(CW\*(C`at90pwm1\*(C'\fR, \f(CW\*(C`at90pwm2\*(C'\fR, \f(CW\*(C`at90pwm2b\*(C'\fR, \f(CW\*(C`at90pwm3\*(C'\fR, \f(CW\*(C`at90pwm3b\*(C'\fR, \f(CW\*(C`at90pwm81\*(C'\fR.
|
10791 |
|
|
.ie n .IP """avr5""" 4
|
10792 |
|
|
.el .IP "\f(CWavr5\fR" 4
|
10793 |
|
|
.IX Item "avr5"
|
10794 |
|
|
\&\*(L"Enhanced\*(R" devices with 16@tie{}KiB up to 64@tie{}KiB of program memory.
|
10795 |
|
|
\&\fImcu\fR\f(CW@tie\fR{}= \f(CW\*(C`atmega16\*(C'\fR, \f(CW\*(C`atmega16a\*(C'\fR, \f(CW\*(C`atmega16hva\*(C'\fR, \f(CW\*(C`atmega16hva2\*(C'\fR, \f(CW\*(C`atmega16hvb\*(C'\fR, \f(CW\*(C`atmega16m1\*(C'\fR, \f(CW\*(C`atmega16u4\*(C'\fR, \f(CW\*(C`atmega161\*(C'\fR, \f(CW\*(C`atmega162\*(C'\fR, \f(CW\*(C`atmega163\*(C'\fR, \f(CW\*(C`atmega164a\*(C'\fR, \f(CW\*(C`atmega164p\*(C'\fR, \f(CW\*(C`atmega165\*(C'\fR, \f(CW\*(C`atmega165a\*(C'\fR, \f(CW\*(C`atmega165p\*(C'\fR, \f(CW\*(C`atmega168\*(C'\fR, \f(CW\*(C`atmega168a\*(C'\fR, \f(CW\*(C`atmega168p\*(C'\fR, \f(CW\*(C`atmega169\*(C'\fR, \f(CW\*(C`atmega169a\*(C'\fR, \f(CW\*(C`atmega169p\*(C'\fR, \f(CW\*(C`atmega169pa\*(C'\fR, \f(CW\*(C`atmega32\*(C'\fR, \f(CW\*(C`atmega32c1\*(C'\fR, \f(CW\*(C`atmega32hvb\*(C'\fR, \f(CW\*(C`atmega32m1\*(C'\fR, \f(CW\*(C`atmega32u4\*(C'\fR, \f(CW\*(C`atmega32u6\*(C'\fR, \f(CW\*(C`atmega323\*(C'\fR, \f(CW\*(C`atmega324a\*(C'\fR, \f(CW\*(C`atmega324p\*(C'\fR, \f(CW\*(C`atmega324pa\*(C'\fR, \f(CW\*(C`atmega325\*(C'\fR, \f(CW\*(C`atmega325a\*(C'\fR, \f(CW\*(C`atmega325p\*(C'\fR, \f(CW\*(C`atmega3250\*(C'\fR, \f(CW\*(C`atmega3250a\*(C'\fR, \f(CW\*(C`atmega3250p\*(C'\fR, \f(CW\*(C`atmega328\*(C'\fR, \f(CW\*(C`atmega328p\*(C'\fR, \f(CW\*(C`atmega329\*(C'\fR, \f(CW\*(C`atmega329a\*(C'\fR, \f(CW\*(C`atmega329p\*(C'\fR, \f(CW\*(C`atmega329pa\*(C'\fR, \f(CW\*(C`atmega3290\*(C'\fR, \f(CW\*(C`atmega3290a\*(C'\fR, \f(CW\*(C`atmega3290p\*(C'\fR, \f(CW\*(C`atmega406\*(C'\fR, \f(CW\*(C`atmega64\*(C'\fR, \f(CW\*(C`atmega64c1\*(C'\fR, \f(CW\*(C`atmega64hve\*(C'\fR, \f(CW\*(C`atmega64m1\*(C'\fR, \f(CW\*(C`atmega640\*(C'\fR, \f(CW\*(C`atmega644\*(C'\fR, \f(CW\*(C`atmega644a\*(C'\fR, \f(CW\*(C`atmega644p\*(C'\fR, \f(CW\*(C`atmega644pa\*(C'\fR, \f(CW\*(C`atmega645\*(C'\fR, \f(CW\*(C`atmega645a\*(C'\fR, \f(CW\*(C`atmega645p\*(C'\fR, \f(CW\*(C`atmega6450\*(C'\fR, \f(CW\*(C`atmega6450a\*(C'\fR, \f(CW\*(C`atmega6450p\*(C'\fR, \f(CW\*(C`atmega649\*(C'\fR, \f(CW\*(C`atmega649a\*(C'\fR, \f(CW\*(C`atmega649p\*(C'\fR, \f(CW\*(C`atmega6490\*(C'\fR, \f(CW\*(C`at90can32\*(C'\fR, \f(CW\*(C`at90can64\*(C'\fR, \f(CW\*(C`at90pwm216\*(C'\fR, \f(CW\*(C`at90pwm316\*(C'\fR, \f(CW\*(C`at90scr100\*(C'\fR, \f(CW\*(C`at90usb646\*(C'\fR, \f(CW\*(C`at90usb647\*(C'\fR, \f(CW\*(C`at94k\*(C'\fR, \f(CW\*(C`m3000\*(C'\fR.
|
10796 |
|
|
.ie n .IP """avr51""" 4
|
10797 |
|
|
.el .IP "\f(CWavr51\fR" 4
|
10798 |
|
|
.IX Item "avr51"
|
10799 |
|
|
\&\*(L"Enhanced\*(R" devices with 128@tie{}KiB of program memory.
|
10800 |
|
|
\&\fImcu\fR\f(CW@tie\fR{}= \f(CW\*(C`atmega128\*(C'\fR, \f(CW\*(C`atmega128rfa1\*(C'\fR, \f(CW\*(C`atmega1280\*(C'\fR, \f(CW\*(C`atmega1281\*(C'\fR, \f(CW\*(C`atmega1284p\*(C'\fR, \f(CW\*(C`at90can128\*(C'\fR, \f(CW\*(C`at90usb1286\*(C'\fR, \f(CW\*(C`at90usb1287\*(C'\fR.
|
10801 |
|
|
.ie n .IP """avr6""" 4
|
10802 |
|
|
.el .IP "\f(CWavr6\fR" 4
|
10803 |
|
|
.IX Item "avr6"
|
10804 |
|
|
\&\*(L"Enhanced\*(R" devices with 3\-byte \s-1PC\s0, i.e. with more than 128@tie{}KiB of program memory.
|
10805 |
|
|
\&\fImcu\fR\f(CW@tie\fR{}= \f(CW\*(C`atmega2560\*(C'\fR, \f(CW\*(C`atmega2561\*(C'\fR.
|
10806 |
|
|
.ie n .IP """avrxmega2""" 4
|
10807 |
|
|
.el .IP "\f(CWavrxmega2\fR" 4
|
10808 |
|
|
.IX Item "avrxmega2"
|
10809 |
|
|
\&\*(L"\s-1XMEGA\s0\*(R" devices with more than 8@tie{}KiB and up to 64@tie{}KiB of program memory.
|
10810 |
|
|
\&\fImcu\fR\f(CW@tie\fR{}= \f(CW\*(C`atxmega16a4\*(C'\fR, \f(CW\*(C`atxmega16d4\*(C'\fR, \f(CW\*(C`atxmega16x1\*(C'\fR, \f(CW\*(C`atxmega32a4\*(C'\fR, \f(CW\*(C`atxmega32d4\*(C'\fR, \f(CW\*(C`atxmega32x1\*(C'\fR.
|
10811 |
|
|
.ie n .IP """avrxmega4""" 4
|
10812 |
|
|
.el .IP "\f(CWavrxmega4\fR" 4
|
10813 |
|
|
.IX Item "avrxmega4"
|
10814 |
|
|
\&\*(L"\s-1XMEGA\s0\*(R" devices with more than 64@tie{}KiB and up to 128@tie{}KiB of program memory.
|
10815 |
|
|
\&\fImcu\fR\f(CW@tie\fR{}= \f(CW\*(C`atxmega64a3\*(C'\fR, \f(CW\*(C`atxmega64d3\*(C'\fR.
|
10816 |
|
|
.ie n .IP """avrxmega5""" 4
|
10817 |
|
|
.el .IP "\f(CWavrxmega5\fR" 4
|
10818 |
|
|
.IX Item "avrxmega5"
|
10819 |
|
|
\&\*(L"\s-1XMEGA\s0\*(R" devices with more than 64@tie{}KiB and up to 128@tie{}KiB of program memory and more than 64@tie{}KiB of \s-1RAM\s0.
|
10820 |
|
|
\&\fImcu\fR\f(CW@tie\fR{}= \f(CW\*(C`atxmega64a1\*(C'\fR, \f(CW\*(C`atxmega64a1u\*(C'\fR.
|
10821 |
|
|
.ie n .IP """avrxmega6""" 4
|
10822 |
|
|
.el .IP "\f(CWavrxmega6\fR" 4
|
10823 |
|
|
.IX Item "avrxmega6"
|
10824 |
|
|
\&\*(L"\s-1XMEGA\s0\*(R" devices with more than 128@tie{}KiB of program memory.
|
10825 |
|
|
\&\fImcu\fR\f(CW@tie\fR{}= \f(CW\*(C`atxmega128a3\*(C'\fR, \f(CW\*(C`atxmega128d3\*(C'\fR, \f(CW\*(C`atxmega192a3\*(C'\fR, \f(CW\*(C`atxmega192d3\*(C'\fR, \f(CW\*(C`atxmega256a3\*(C'\fR, \f(CW\*(C`atxmega256a3b\*(C'\fR, \f(CW\*(C`atxmega256a3bu\*(C'\fR, \f(CW\*(C`atxmega256d3\*(C'\fR.
|
10826 |
|
|
.ie n .IP """avrxmega7""" 4
|
10827 |
|
|
.el .IP "\f(CWavrxmega7\fR" 4
|
10828 |
|
|
.IX Item "avrxmega7"
|
10829 |
|
|
\&\*(L"\s-1XMEGA\s0\*(R" devices with more than 128@tie{}KiB of program memory and more than 64@tie{}KiB of \s-1RAM\s0.
|
10830 |
|
|
\&\fImcu\fR\f(CW@tie\fR{}= \f(CW\*(C`atxmega128a1\*(C'\fR, \f(CW\*(C`atxmega128a1u\*(C'\fR.
|
10831 |
|
|
.ie n .IP """avr1""" 4
|
10832 |
|
|
.el .IP "\f(CWavr1\fR" 4
|
10833 |
|
|
.IX Item "avr1"
|
10834 |
|
|
This \s-1ISA\s0 is implemented by the minimal \s-1AVR\s0 core and supported for assembler only.
|
10835 |
|
|
\&\fImcu\fR\f(CW@tie\fR{}= \f(CW\*(C`attiny11\*(C'\fR, \f(CW\*(C`attiny12\*(C'\fR, \f(CW\*(C`attiny15\*(C'\fR, \f(CW\*(C`attiny28\*(C'\fR, \f(CW\*(C`at90s1200\*(C'\fR.
|
10836 |
|
|
.RE
|
10837 |
|
|
.RS 4
|
10838 |
|
|
.RE
|
10839 |
|
|
.IP "\fB\-maccumulate\-args\fR" 4
|
10840 |
|
|
.IX Item "-maccumulate-args"
|
10841 |
|
|
Accumulate outgoing function arguments and acquire/release the needed
|
10842 |
|
|
stack space for outgoing function arguments once in function
|
10843 |
|
|
prologue/epilogue. Without this option, outgoing arguments are pushed
|
10844 |
|
|
before calling a function and popped afterwards.
|
10845 |
|
|
.Sp
|
10846 |
|
|
Popping the arguments after the function call can be expensive on
|
10847 |
|
|
\&\s-1AVR\s0 so that accumulating the stack space might lead to smaller
|
10848 |
|
|
executables because arguments need not to be removed from the
|
10849 |
|
|
stack after such a function call.
|
10850 |
|
|
.Sp
|
10851 |
|
|
This option can lead to reduced code size for functions that perform
|
10852 |
|
|
several calls to functions that get their arguments on the stack like
|
10853 |
|
|
calls to printf-like functions.
|
10854 |
|
|
.IP "\fB\-mbranch\-cost=\fR\fIcost\fR" 4
|
10855 |
|
|
.IX Item "-mbranch-cost=cost"
|
10856 |
|
|
Set the branch costs for conditional branch instructions to
|
10857 |
|
|
\&\fIcost\fR. Reasonable values for \fIcost\fR are small, non-negative
|
10858 |
|
|
integers. The default branch cost is 0.
|
10859 |
|
|
.IP "\fB\-mcall\-prologues\fR" 4
|
10860 |
|
|
.IX Item "-mcall-prologues"
|
10861 |
|
|
Functions prologues/epilogues are expanded as calls to appropriate
|
10862 |
|
|
subroutines. Code size is smaller.
|
10863 |
|
|
.IP "\fB\-mint8\fR" 4
|
10864 |
|
|
.IX Item "-mint8"
|
10865 |
|
|
Assume \f(CW\*(C`int\*(C'\fR to be 8\-bit integer. This affects the sizes of all types: a
|
10866 |
|
|
\&\f(CW\*(C`char\*(C'\fR is 1 byte, an \f(CW\*(C`int\*(C'\fR is 1 byte, a \f(CW\*(C`long\*(C'\fR is 2 bytes,
|
10867 |
|
|
and \f(CW\*(C`long long\*(C'\fR is 4 bytes. Please note that this option does not
|
10868 |
|
|
conform to the C standards, but it results in smaller code
|
10869 |
|
|
size.
|
10870 |
|
|
.IP "\fB\-mno\-interrupts\fR" 4
|
10871 |
|
|
.IX Item "-mno-interrupts"
|
10872 |
|
|
Generated code is not compatible with hardware interrupts.
|
10873 |
|
|
Code size is smaller.
|
10874 |
|
|
.IP "\fB\-mrelax\fR" 4
|
10875 |
|
|
.IX Item "-mrelax"
|
10876 |
|
|
Try to replace \f(CW\*(C`CALL\*(C'\fR resp. \f(CW\*(C`JMP\*(C'\fR instruction by the shorter
|
10877 |
|
|
\&\f(CW\*(C`RCALL\*(C'\fR resp. \f(CW\*(C`RJMP\*(C'\fR instruction if applicable.
|
10878 |
|
|
Setting \f(CW\*(C`\-mrelax\*(C'\fR just adds the \f(CW\*(C`\-\-relax\*(C'\fR option to the
|
10879 |
|
|
linker command line when the linker is called.
|
10880 |
|
|
.Sp
|
10881 |
|
|
Jump relaxing is performed by the linker because jump offsets are not
|
10882 |
|
|
known before code is located. Therefore, the assembler code generated by the
|
10883 |
|
|
compiler is the same, but the instructions in the executable may
|
10884 |
|
|
differ from instructions in the assembler code.
|
10885 |
|
|
.Sp
|
10886 |
|
|
Relaxing must be turned on if linker stubs are needed, see the
|
10887 |
|
|
section on \f(CW\*(C`EIND\*(C'\fR and linker stubs below.
|
10888 |
|
|
.IP "\fB\-msp8\fR" 4
|
10889 |
|
|
.IX Item "-msp8"
|
10890 |
|
|
Treat the stack pointer register as an 8\-bit register,
|
10891 |
|
|
i.e. assume the high byte of the stack pointer is zero.
|
10892 |
|
|
In general, you don't need to set this option by hand.
|
10893 |
|
|
.Sp
|
10894 |
|
|
This option is used internally by the compiler to select and
|
10895 |
|
|
build multilibs for architectures \f(CW\*(C`avr2\*(C'\fR and \f(CW\*(C`avr25\*(C'\fR.
|
10896 |
|
|
These architectures mix devices with and without \f(CW\*(C`SPH\*(C'\fR.
|
10897 |
|
|
For any setting other than \f(CW\*(C`\-mmcu=avr2\*(C'\fR or \f(CW\*(C`\-mmcu=avr25\*(C'\fR
|
10898 |
|
|
the compiler driver will add or remove this option from the compiler
|
10899 |
|
|
proper's command line, because the compiler then knows if the device
|
10900 |
|
|
or architecture has an 8\-bit stack pointer and thus no \f(CW\*(C`SPH\*(C'\fR
|
10901 |
|
|
register or not.
|
10902 |
|
|
.IP "\fB\-mstrict\-X\fR" 4
|
10903 |
|
|
.IX Item "-mstrict-X"
|
10904 |
|
|
Use address register \f(CW\*(C`X\*(C'\fR in a way proposed by the hardware. This means
|
10905 |
|
|
that \f(CW\*(C`X\*(C'\fR is only used in indirect, post-increment or
|
10906 |
|
|
pre-decrement addressing.
|
10907 |
|
|
.Sp
|
10908 |
|
|
Without this option, the \f(CW\*(C`X\*(C'\fR register may be used in the same way
|
10909 |
|
|
as \f(CW\*(C`Y\*(C'\fR or \f(CW\*(C`Z\*(C'\fR which then is emulated by additional
|
10910 |
|
|
instructions.
|
10911 |
|
|
For example, loading a value with \f(CW\*(C`X+const\*(C'\fR addressing with a
|
10912 |
|
|
small non-negative \f(CW\*(C`const < 64\*(C'\fR to a register \fIRn\fR is
|
10913 |
|
|
performed as
|
10914 |
|
|
.Sp
|
10915 |
|
|
.Vb 3
|
10916 |
|
|
\& adiw r26, const ; X += const
|
10917 |
|
|
\& ld , X ; = *X
|
10918 |
|
|
\& sbiw r26, const ; X \-= const
|
10919 |
|
|
.Ve
|
10920 |
|
|
.IP "\fB\-mtiny\-stack\fR" 4
|
10921 |
|
|
.IX Item "-mtiny-stack"
|
10922 |
|
|
Only change the lower 8@tie{}bits of the stack pointer.
|
10923 |
|
|
.PP
|
10924 |
|
|
\f(CW\*(C`EIND\*(C'\fR and Devices with more than 128 Ki Bytes of Flash
|
10925 |
|
|
.IX Subsection "EIND and Devices with more than 128 Ki Bytes of Flash"
|
10926 |
|
|
.PP
|
10927 |
|
|
Pointers in the implementation are 16@tie{}bits wide.
|
10928 |
|
|
The address of a function or label is represented as word address so
|
10929 |
|
|
that indirect jumps and calls can target any code address in the
|
10930 |
|
|
range of 64@tie{}Ki words.
|
10931 |
|
|
.PP
|
10932 |
|
|
In order to facilitate indirect jump on devices with more than 128@tie{}Ki
|
10933 |
|
|
bytes of program memory space, there is a special function register called
|
10934 |
|
|
\&\f(CW\*(C`EIND\*(C'\fR that serves as most significant part of the target address
|
10935 |
|
|
when \f(CW\*(C`EICALL\*(C'\fR or \f(CW\*(C`EIJMP\*(C'\fR instructions are used.
|
10936 |
|
|
.PP
|
10937 |
|
|
Indirect jumps and calls on these devices are handled as follows by
|
10938 |
|
|
the compiler and are subject to some limitations:
|
10939 |
|
|
.IP "\(bu" 4
|
10940 |
|
|
The compiler never sets \f(CW\*(C`EIND\*(C'\fR.
|
10941 |
|
|
.IP "\(bu" 4
|
10942 |
|
|
The compiler uses \f(CW\*(C`EIND\*(C'\fR implicitely in \f(CW\*(C`EICALL\*(C'\fR/\f(CW\*(C`EIJMP\*(C'\fR
|
10943 |
|
|
instructions or might read \f(CW\*(C`EIND\*(C'\fR directly in order to emulate an
|
10944 |
|
|
indirect call/jump by means of a \f(CW\*(C`RET\*(C'\fR instruction.
|
10945 |
|
|
.IP "\(bu" 4
|
10946 |
|
|
The compiler assumes that \f(CW\*(C`EIND\*(C'\fR never changes during the startup
|
10947 |
|
|
code or during the application. In particular, \f(CW\*(C`EIND\*(C'\fR is not
|
10948 |
|
|
saved/restored in function or interrupt service routine
|
10949 |
|
|
prologue/epilogue.
|
10950 |
|
|
.IP "\(bu" 4
|
10951 |
|
|
For indirect calls to functions and computed goto, the linker
|
10952 |
|
|
generates \fIstubs\fR. Stubs are jump pads sometimes also called
|
10953 |
|
|
\&\fItrampolines\fR. Thus, the indirect call/jump jumps to such a stub.
|
10954 |
|
|
The stub contains a direct jump to the desired address.
|
10955 |
|
|
.IP "\(bu" 4
|
10956 |
|
|
Linker relaxation must be turned on so that the linker will generate
|
10957 |
|
|
the stubs correctly an all situaltion. See the compiler option
|
10958 |
|
|
\&\f(CW\*(C`\-mrelax\*(C'\fR and the linler option \f(CW\*(C`\-\-relax\*(C'\fR.
|
10959 |
|
|
There are corner cases where the linker is supposed to generate stubs
|
10960 |
|
|
but aborts without relaxation and without a helpful error message.
|
10961 |
|
|
.IP "\(bu" 4
|
10962 |
|
|
The default linker script is arranged for code with \f(CW\*(C`EIND = 0\*(C'\fR.
|
10963 |
|
|
If code is supposed to work for a setup with \f(CW\*(C`EIND != 0\*(C'\fR, a custom
|
10964 |
|
|
linker script has to be used in order to place the sections whose
|
10965 |
|
|
name start with \f(CW\*(C`.trampolines\*(C'\fR into the segment where \f(CW\*(C`EIND\*(C'\fR
|
10966 |
|
|
points to.
|
10967 |
|
|
.IP "\(bu" 4
|
10968 |
|
|
The startup code from libgcc never sets \f(CW\*(C`EIND\*(C'\fR.
|
10969 |
|
|
Notice that startup code is a blend of code from libgcc and AVR-LibC.
|
10970 |
|
|
For the impact of AVR-LibC on \f(CW\*(C`EIND\*(C'\fR, see the
|
10971 |
|
|
AVR-LibC\ user\ manual (\f(CW\*(C`http://nongnu.org/avr\-libc/user\-manual\*(C'\fR).
|
10972 |
|
|
.IP "\(bu" 4
|
10973 |
|
|
It is legitimate for user-specific startup code to set up \f(CW\*(C`EIND\*(C'\fR
|
10974 |
|
|
early, for example by means of initialization code located in
|
10975 |
|
|
section \f(CW\*(C`.init3\*(C'\fR. Such code runs prior to general startup code
|
10976 |
|
|
that initializes \s-1RAM\s0 and calls constructors, but after the bit
|
10977 |
|
|
of startup code from AVR-LibC that sets \f(CW\*(C`EIND\*(C'\fR to the segment
|
10978 |
|
|
where the vector table is located.
|
10979 |
|
|
.Sp
|
10980 |
|
|
.Vb 1
|
10981 |
|
|
\& #include
|
10982 |
|
|
\&
|
10983 |
|
|
\& static void
|
10984 |
|
|
\& _\|_attribute_\|_((section(".init3"),naked,used,no_instrument_function))
|
10985 |
|
|
\& init3_set_eind (void)
|
10986 |
|
|
\& {
|
10987 |
|
|
\& _\|_asm volatile ("ldi r24,pm_hh8(_\|_trampolines_start)\en\et"
|
10988 |
|
|
\& "out %i0,r24" :: "n" (&EIND) : "r24","memory");
|
10989 |
|
|
\& }
|
10990 |
|
|
.Ve
|
10991 |
|
|
.Sp
|
10992 |
|
|
The \f(CW\*(C`_\|_trampolines_start\*(C'\fR symbol is defined in the linker script.
|
10993 |
|
|
.IP "\(bu" 4
|
10994 |
|
|
Stubs are generated automatically by the linker if
|
10995 |
|
|
the following two conditions are met:
|
10996 |
|
|
.RS 4
|
10997 |
|
|
.ie n .IP "\-" 4
|
10998 |
|
|
.el .IP "\-" 4
|
10999 |
|
|
.IX Item "-"
|
11000 |
|
|
(short for \fIgenerate stubs\fR) like so:
|
11001 |
|
|
.Sp
|
11002 |
|
|
.Vb 2
|
11003 |
|
|
\& LDI r24, lo8(gs())
|
11004 |
|
|
\& LDI r25, hi8(gs())
|
11005 |
|
|
.Ve
|
11006 |
|
|
.IP "\-" 4
|
11007 |
|
|
.IX Item "-"
|
11008 |
|
|
\&\fIoutside\fR the segment where the stubs are located.
|
11009 |
|
|
.RE
|
11010 |
|
|
.RS 4
|
11011 |
|
|
.RE
|
11012 |
|
|
.IP "\(bu" 4
|
11013 |
|
|
The compiler emits such \f(CW\*(C`gs\*(C'\fR modifiers for code labels in the
|
11014 |
|
|
following situations:
|
11015 |
|
|
.RS 4
|
11016 |
|
|
.IP "\-" 4
|
11017 |
|
|
.IX Item "-"
|
11018 |
|
|
.PD 0
|
11019 |
|
|
.IP "\-" 4
|
11020 |
|
|
.IX Item "-"
|
11021 |
|
|
.IP "\-" 4
|
11022 |
|
|
.IX Item "-"
|
11023 |
|
|
.PD
|
11024 |
|
|
command-line option.
|
11025 |
|
|
.IP "\-" 4
|
11026 |
|
|
.IX Item "-"
|
11027 |
|
|
tables you can specify the \fB\-fno\-jump\-tables\fR command-line option.
|
11028 |
|
|
.IP "\-" 4
|
11029 |
|
|
.IX Item "-"
|
11030 |
|
|
.PD 0
|
11031 |
|
|
.ie n .IP "\-" 4
|
11032 |
|
|
.el .IP "\-" 4
|
11033 |
|
|
.IX Item "-"
|
11034 |
|
|
.RE
|
11035 |
|
|
.RS 4
|
11036 |
|
|
.RE
|
11037 |
|
|
.IP "\(bu" 4
|
11038 |
|
|
.PD
|
11039 |
|
|
Jumping to non-symbolic addresses like so is \fInot\fR supported:
|
11040 |
|
|
.Sp
|
11041 |
|
|
.Vb 5
|
11042 |
|
|
\& int main (void)
|
11043 |
|
|
\& {
|
11044 |
|
|
\& /* Call function at word address 0x2 */
|
11045 |
|
|
\& return ((int(*)(void)) 0x2)();
|
11046 |
|
|
\& }
|
11047 |
|
|
.Ve
|
11048 |
|
|
.Sp
|
11049 |
|
|
Instead, a stub has to be set up, i.e. the function has to be called
|
11050 |
|
|
through a symbol (\f(CW\*(C`func_4\*(C'\fR in the example):
|
11051 |
|
|
.Sp
|
11052 |
|
|
.Vb 3
|
11053 |
|
|
\& int main (void)
|
11054 |
|
|
\& {
|
11055 |
|
|
\& extern int func_4 (void);
|
11056 |
|
|
\&
|
11057 |
|
|
\& /* Call function at byte address 0x4 */
|
11058 |
|
|
\& return func_4();
|
11059 |
|
|
\& }
|
11060 |
|
|
.Ve
|
11061 |
|
|
.Sp
|
11062 |
|
|
and the application be linked with \f(CW\*(C`\-Wl,\-\-defsym,func_4=0x4\*(C'\fR.
|
11063 |
|
|
Alternatively, \f(CW\*(C`func_4\*(C'\fR can be defined in the linker script.
|
11064 |
|
|
.PP
|
11065 |
|
|
Handling of the \f(CW\*(C`RAMPD\*(C'\fR, \f(CW\*(C`RAMPX\*(C'\fR, \f(CW\*(C`RAMPY\*(C'\fR and \f(CW\*(C`RAMPZ\*(C'\fR Special Function Registers
|
11066 |
|
|
.IX Subsection "Handling of the RAMPD, RAMPX, RAMPY and RAMPZ Special Function Registers"
|
11067 |
|
|
.PP
|
11068 |
|
|
Some \s-1AVR\s0 devices support memories larger than the 64@tie{}KiB range
|
11069 |
|
|
that can be accessed with 16\-bit pointers. To access memory locations
|
11070 |
|
|
outside this 64@tie{}KiB range, the contentent of a \f(CW\*(C`RAMP\*(C'\fR
|
11071 |
|
|
register is used as high part of the address:
|
11072 |
|
|
The \f(CW\*(C`X\*(C'\fR, \f(CW\*(C`Y\*(C'\fR, \f(CW\*(C`Z\*(C'\fR address register is concatenated
|
11073 |
|
|
with the \f(CW\*(C`RAMPX\*(C'\fR, \f(CW\*(C`RAMPY\*(C'\fR, \f(CW\*(C`RAMPZ\*(C'\fR special function
|
11074 |
|
|
register, respectively, to get a wide address. Similarly,
|
11075 |
|
|
\&\f(CW\*(C`RAMPD\*(C'\fR is used together with direct addressing.
|
11076 |
|
|
.IP "\(bu" 4
|
11077 |
|
|
The startup code initializes the \f(CW\*(C`RAMP\*(C'\fR special function
|
11078 |
|
|
registers with zero.
|
11079 |
|
|
.IP "\(bu" 4
|
11080 |
|
|
If a \fB\s-1AVR\s0 Named Address Spaces,named address space\fR other than
|
11081 |
|
|
generic or \f(CW\*(C`_\|_flash\*(C'\fR is used, then \f(CW\*(C`RAMPZ\*(C'\fR is set
|
11082 |
|
|
as needed before the operation.
|
11083 |
|
|
.IP "\(bu" 4
|
11084 |
|
|
If the device supports \s-1RAM\s0 larger than 64@tie{KiB} and the compiler
|
11085 |
|
|
needs to change \f(CW\*(C`RAMPZ\*(C'\fR to accomplish an operation, \f(CW\*(C`RAMPZ\*(C'\fR
|
11086 |
|
|
is reset to zero after the operation.
|
11087 |
|
|
.IP "\(bu" 4
|
11088 |
|
|
If the device comes with a specific \f(CW\*(C`RAMP\*(C'\fR register, the \s-1ISR\s0
|
11089 |
|
|
prologue/epilogue saves/restores that \s-1SFR\s0 and initializes it with
|
11090 |
|
|
zero in case the \s-1ISR\s0 code might (implicitly) use it.
|
11091 |
|
|
.IP "\(bu" 4
|
11092 |
|
|
\&\s-1RAM\s0 larger than 64@tie{KiB} is not supported by \s-1GCC\s0 for \s-1AVR\s0 targets.
|
11093 |
|
|
If you use inline assembler to read from locations outside the
|
11094 |
|
|
16\-bit address range and change one of the \f(CW\*(C`RAMP\*(C'\fR registers,
|
11095 |
|
|
you must reset it to zero after the access.
|
11096 |
|
|
.PP
|
11097 |
|
|
\s-1AVR\s0 Built-in Macros
|
11098 |
|
|
.IX Subsection "AVR Built-in Macros"
|
11099 |
|
|
.PP
|
11100 |
|
|
\&\s-1GCC\s0 defines several built-in macros so that the user code can test
|
11101 |
|
|
for the presence or absence of features. Almost any of the following
|
11102 |
|
|
built-in macros are deduced from device capabilities and thus
|
11103 |
|
|
triggered by the \f(CW\*(C`\-mmcu=\*(C'\fR command-line option.
|
11104 |
|
|
.PP
|
11105 |
|
|
For even more AVR-specific built-in macros see
|
11106 |
|
|
\&\fB\s-1AVR\s0 Named Address Spaces\fR and \fB\s-1AVR\s0 Built-in Functions\fR.
|
11107 |
|
|
.ie n .IP """_\|_AVR_ARCH_\|_""" 4
|
11108 |
|
|
.el .IP "\f(CW_\|_AVR_ARCH_\|_\fR" 4
|
11109 |
|
|
.IX Item "__AVR_ARCH__"
|
11110 |
|
|
Build-in macro that resolves to a decimal number that identifies the
|
11111 |
|
|
architecture and depends on the \f(CW\*(C`\-mmcu=\f(CImcu\f(CW\*(C'\fR option.
|
11112 |
|
|
Possible values are:
|
11113 |
|
|
.Sp
|
11114 |
|
|
\&\f(CW2\fR, \f(CW25\fR, \f(CW3\fR, \f(CW31\fR, \f(CW35\fR,
|
11115 |
|
|
\&\f(CW4\fR, \f(CW5\fR, \f(CW51\fR, \f(CW6\fR, \f(CW102\fR, \f(CW104\fR,
|
11116 |
|
|
\&\f(CW105\fR, \f(CW106\fR, \f(CW107\fR
|
11117 |
|
|
.Sp
|
11118 |
|
|
for \fImcu\fR=\f(CW\*(C`avr2\*(C'\fR, \f(CW\*(C`avr25\*(C'\fR, \f(CW\*(C`avr3\*(C'\fR,
|
11119 |
|
|
\&\f(CW\*(C`avr31\*(C'\fR, \f(CW\*(C`avr35\*(C'\fR, \f(CW\*(C`avr4\*(C'\fR, \f(CW\*(C`avr5\*(C'\fR, \f(CW\*(C`avr51\*(C'\fR,
|
11120 |
|
|
\&\f(CW\*(C`avr6\*(C'\fR, \f(CW\*(C`avrxmega2\*(C'\fR, \f(CW\*(C`avrxmega4\*(C'\fR, \f(CW\*(C`avrxmega5\*(C'\fR,
|
11121 |
|
|
\&\f(CW\*(C`avrxmega6\*(C'\fR, \f(CW\*(C`avrxmega7\*(C'\fR, respectively.
|
11122 |
|
|
If \fImcu\fR specifies a device, this built-in macro is set
|
11123 |
|
|
accordingly. For example, with \f(CW\*(C`\-mmcu=atmega8\*(C'\fR the macro will be
|
11124 |
|
|
defined to \f(CW4\fR.
|
11125 |
|
|
.ie n .IP """_\|_AVR_\f(CIDevice\f(CW_\|_""" 4
|
11126 |
|
|
.el .IP "\f(CW_\|_AVR_\f(CIDevice\f(CW_\|_\fR" 4
|
11127 |
|
|
.IX Item "__AVR_Device__"
|
11128 |
|
|
Setting \f(CW\*(C`\-mmcu=\f(CIdevice\f(CW\*(C'\fR defines this built-in macro which reflects
|
11129 |
|
|
the device's name. For example, \f(CW\*(C`\-mmcu=atmega8\*(C'\fR defines the
|
11130 |
|
|
built-in macro \f(CW\*(C`_\|_AVR_ATmega8_\|_\*(C'\fR, \f(CW\*(C`\-mmcu=attiny261a\*(C'\fR defines
|
11131 |
|
|
\&\f(CW\*(C`_\|_AVR_ATtiny261A_\|_\*(C'\fR, etc.
|
11132 |
|
|
.Sp
|
11133 |
|
|
The built-in macros' names follow
|
11134 |
|
|
the scheme \f(CW\*(C`_\|_AVR_\f(CIDevice\f(CW_\|_\*(C'\fR where \fIDevice\fR is
|
11135 |
|
|
the device name as from the \s-1AVR\s0 user manual. The difference between
|
11136 |
|
|
\&\fIDevice\fR in the built-in macro and \fIdevice\fR in
|
11137 |
|
|
\&\f(CW\*(C`\-mmcu=\f(CIdevice\f(CW\*(C'\fR is that the latter is always lowercase.
|
11138 |
|
|
.Sp
|
11139 |
|
|
If \fIdevice\fR is not a device but only a core architecture like
|
11140 |
|
|
\&\f(CW\*(C`avr51\*(C'\fR, this macro will not be defined.
|
11141 |
|
|
.ie n .IP """_\|_AVR_HAVE_ELPM_\|_""" 4
|
11142 |
|
|
.el .IP "\f(CW_\|_AVR_HAVE_ELPM_\|_\fR" 4
|
11143 |
|
|
.IX Item "__AVR_HAVE_ELPM__"
|
11144 |
|
|
The device has the the \f(CW\*(C`ELPM\*(C'\fR instruction.
|
11145 |
|
|
.ie n .IP """_\|_AVR_HAVE_ELPMX_\|_""" 4
|
11146 |
|
|
.el .IP "\f(CW_\|_AVR_HAVE_ELPMX_\|_\fR" 4
|
11147 |
|
|
.IX Item "__AVR_HAVE_ELPMX__"
|
11148 |
|
|
The device has the \f(CW\*(C`ELPM R\f(CIn\f(CW,Z\*(C'\fR and \f(CW\*(C`ELPM
|
11149 |
|
|
R\f(CIn\f(CW,Z+\*(C'\fR instructions.
|
11150 |
|
|
.ie n .IP """_\|_AVR_HAVE_MOVW_\|_""" 4
|
11151 |
|
|
.el .IP "\f(CW_\|_AVR_HAVE_MOVW_\|_\fR" 4
|
11152 |
|
|
.IX Item "__AVR_HAVE_MOVW__"
|
11153 |
|
|
The device has the \f(CW\*(C`MOVW\*(C'\fR instruction to perform 16\-bit
|
11154 |
|
|
register-register moves.
|
11155 |
|
|
.ie n .IP """_\|_AVR_HAVE_LPMX_\|_""" 4
|
11156 |
|
|
.el .IP "\f(CW_\|_AVR_HAVE_LPMX_\|_\fR" 4
|
11157 |
|
|
.IX Item "__AVR_HAVE_LPMX__"
|
11158 |
|
|
The device has the \f(CW\*(C`LPM R\f(CIn\f(CW,Z\*(C'\fR and
|
11159 |
|
|
\&\f(CW\*(C`LPM R\f(CIn\f(CW,Z+\*(C'\fR instructions.
|
11160 |
|
|
.ie n .IP """_\|_AVR_HAVE_MUL_\|_""" 4
|
11161 |
|
|
.el .IP "\f(CW_\|_AVR_HAVE_MUL_\|_\fR" 4
|
11162 |
|
|
.IX Item "__AVR_HAVE_MUL__"
|
11163 |
|
|
The device has a hardware multiplier.
|
11164 |
|
|
.ie n .IP """_\|_AVR_HAVE_JMP_CALL_\|_""" 4
|
11165 |
|
|
.el .IP "\f(CW_\|_AVR_HAVE_JMP_CALL_\|_\fR" 4
|
11166 |
|
|
.IX Item "__AVR_HAVE_JMP_CALL__"
|
11167 |
|
|
The device has the \f(CW\*(C`JMP\*(C'\fR and \f(CW\*(C`CALL\*(C'\fR instructions.
|
11168 |
|
|
This is the case for devices with at least 16@tie{}KiB of program
|
11169 |
|
|
memory.
|
11170 |
|
|
.ie n .IP """_\|_AVR_HAVE_EIJMP_EICALL_\|_""" 4
|
11171 |
|
|
.el .IP "\f(CW_\|_AVR_HAVE_EIJMP_EICALL_\|_\fR" 4
|
11172 |
|
|
.IX Item "__AVR_HAVE_EIJMP_EICALL__"
|
11173 |
|
|
.PD 0
|
11174 |
|
|
.ie n .IP """_\|_AVR_3_BYTE_PC_\|_""" 4
|
11175 |
|
|
.el .IP "\f(CW_\|_AVR_3_BYTE_PC_\|_\fR" 4
|
11176 |
|
|
.IX Item "__AVR_3_BYTE_PC__"
|
11177 |
|
|
.PD
|
11178 |
|
|
The device has the \f(CW\*(C`EIJMP\*(C'\fR and \f(CW\*(C`EICALL\*(C'\fR instructions.
|
11179 |
|
|
This is the case for devices with more than 128@tie{}KiB of program memory.
|
11180 |
|
|
This also means that the program counter
|
11181 |
|
|
(\s-1PC\s0) is 3@tie{}bytes wide.
|
11182 |
|
|
.ie n .IP """_\|_AVR_2_BYTE_PC_\|_""" 4
|
11183 |
|
|
.el .IP "\f(CW_\|_AVR_2_BYTE_PC_\|_\fR" 4
|
11184 |
|
|
.IX Item "__AVR_2_BYTE_PC__"
|
11185 |
|
|
The program counter (\s-1PC\s0) is 2@tie{}bytes wide. This is the case for devices
|
11186 |
|
|
with up to 128@tie{}KiB of program memory.
|
11187 |
|
|
.ie n .IP """_\|_AVR_HAVE_8BIT_SP_\|_""" 4
|
11188 |
|
|
.el .IP "\f(CW_\|_AVR_HAVE_8BIT_SP_\|_\fR" 4
|
11189 |
|
|
.IX Item "__AVR_HAVE_8BIT_SP__"
|
11190 |
|
|
.PD 0
|
11191 |
|
|
.ie n .IP """_\|_AVR_HAVE_16BIT_SP_\|_""" 4
|
11192 |
|
|
.el .IP "\f(CW_\|_AVR_HAVE_16BIT_SP_\|_\fR" 4
|
11193 |
|
|
.IX Item "__AVR_HAVE_16BIT_SP__"
|
11194 |
|
|
.PD
|
11195 |
|
|
The stack pointer (\s-1SP\s0) register is treated as 8\-bit respectively
|
11196 |
|
|
16\-bit register by the compiler.
|
11197 |
|
|
The definition of these macros is affected by \f(CW\*(C`\-mtiny\-stack\*(C'\fR.
|
11198 |
|
|
.ie n .IP """_\|_AVR_HAVE_SPH_\|_""" 4
|
11199 |
|
|
.el .IP "\f(CW_\|_AVR_HAVE_SPH_\|_\fR" 4
|
11200 |
|
|
.IX Item "__AVR_HAVE_SPH__"
|
11201 |
|
|
.PD 0
|
11202 |
|
|
.ie n .IP """_\|_AVR_SP8_\|_""" 4
|
11203 |
|
|
.el .IP "\f(CW_\|_AVR_SP8_\|_\fR" 4
|
11204 |
|
|
.IX Item "__AVR_SP8__"
|
11205 |
|
|
.PD
|
11206 |
|
|
The device has the \s-1SPH\s0 (high part of stack pointer) special function
|
11207 |
|
|
register or has an 8\-bit stack pointer, respectively.
|
11208 |
|
|
The definition of these macros is affected by \f(CW\*(C`\-mmcu=\*(C'\fR and
|
11209 |
|
|
in the cases of \f(CW\*(C`\-mmcu=avr2\*(C'\fR and \f(CW\*(C`\-mmcu=avr25\*(C'\fR also
|
11210 |
|
|
by \f(CW\*(C`\-msp8\*(C'\fR.
|
11211 |
|
|
.ie n .IP """_\|_AVR_HAVE_RAMPD_\|_""" 4
|
11212 |
|
|
.el .IP "\f(CW_\|_AVR_HAVE_RAMPD_\|_\fR" 4
|
11213 |
|
|
.IX Item "__AVR_HAVE_RAMPD__"
|
11214 |
|
|
.PD 0
|
11215 |
|
|
.ie n .IP """_\|_AVR_HAVE_RAMPX_\|_""" 4
|
11216 |
|
|
.el .IP "\f(CW_\|_AVR_HAVE_RAMPX_\|_\fR" 4
|
11217 |
|
|
.IX Item "__AVR_HAVE_RAMPX__"
|
11218 |
|
|
.ie n .IP """_\|_AVR_HAVE_RAMPY_\|_""" 4
|
11219 |
|
|
.el .IP "\f(CW_\|_AVR_HAVE_RAMPY_\|_\fR" 4
|
11220 |
|
|
.IX Item "__AVR_HAVE_RAMPY__"
|
11221 |
|
|
.ie n .IP """_\|_AVR_HAVE_RAMPZ_\|_""" 4
|
11222 |
|
|
.el .IP "\f(CW_\|_AVR_HAVE_RAMPZ_\|_\fR" 4
|
11223 |
|
|
.IX Item "__AVR_HAVE_RAMPZ__"
|
11224 |
|
|
.PD
|
11225 |
|
|
The device has the \f(CW\*(C`RAMPD\*(C'\fR, \f(CW\*(C`RAMPX\*(C'\fR, \f(CW\*(C`RAMPY\*(C'\fR,
|
11226 |
|
|
\&\f(CW\*(C`RAMPZ\*(C'\fR special function register, respectively.
|
11227 |
|
|
.ie n .IP """_\|_NO_INTERRUPTS_\|_""" 4
|
11228 |
|
|
.el .IP "\f(CW_\|_NO_INTERRUPTS_\|_\fR" 4
|
11229 |
|
|
.IX Item "__NO_INTERRUPTS__"
|
11230 |
|
|
This macro reflects the \f(CW\*(C`\-mno\-interrupts\*(C'\fR command line option.
|
11231 |
|
|
.ie n .IP """_\|_AVR_ERRATA_SKIP_\|_""" 4
|
11232 |
|
|
.el .IP "\f(CW_\|_AVR_ERRATA_SKIP_\|_\fR" 4
|
11233 |
|
|
.IX Item "__AVR_ERRATA_SKIP__"
|
11234 |
|
|
.PD 0
|
11235 |
|
|
.ie n .IP """_\|_AVR_ERRATA_SKIP_JMP_CALL_\|_""" 4
|
11236 |
|
|
.el .IP "\f(CW_\|_AVR_ERRATA_SKIP_JMP_CALL_\|_\fR" 4
|
11237 |
|
|
.IX Item "__AVR_ERRATA_SKIP_JMP_CALL__"
|
11238 |
|
|
.PD
|
11239 |
|
|
Some \s-1AVR\s0 devices (\s-1AT90S8515\s0, ATmega103) must not skip 32\-bit
|
11240 |
|
|
instructions because of a hardware erratum. Skip instructions are
|
11241 |
|
|
\&\f(CW\*(C`SBRS\*(C'\fR, \f(CW\*(C`SBRC\*(C'\fR, \f(CW\*(C`SBIS\*(C'\fR, \f(CW\*(C`SBIC\*(C'\fR and \f(CW\*(C`CPSE\*(C'\fR.
|
11242 |
|
|
The second macro is only defined if \f(CW\*(C`_\|_AVR_HAVE_JMP_CALL_\|_\*(C'\fR is also
|
11243 |
|
|
set.
|
11244 |
|
|
.ie n .IP """_\|_AVR_SFR_OFFSET_\|_=\f(CIoffset\f(CW""" 4
|
11245 |
|
|
.el .IP "\f(CW_\|_AVR_SFR_OFFSET_\|_=\f(CIoffset\f(CW\fR" 4
|
11246 |
|
|
.IX Item "__AVR_SFR_OFFSET__=offset"
|
11247 |
|
|
Instructions that can address I/O special function registers directly
|
11248 |
|
|
like \f(CW\*(C`IN\*(C'\fR, \f(CW\*(C`OUT\*(C'\fR, \f(CW\*(C`SBI\*(C'\fR, etc. may use a different
|
11249 |
|
|
address as if addressed by an instruction to access \s-1RAM\s0 like \f(CW\*(C`LD\*(C'\fR
|
11250 |
|
|
or \f(CW\*(C`STS\*(C'\fR. This offset depends on the device architecture and has
|
11251 |
|
|
to be subtracted from the \s-1RAM\s0 address in order to get the
|
11252 |
|
|
respective I/O@tie{}address.
|
11253 |
|
|
.ie n .IP """_\|_WITH_AVRLIBC_\|_""" 4
|
11254 |
|
|
.el .IP "\f(CW_\|_WITH_AVRLIBC_\|_\fR" 4
|
11255 |
|
|
.IX Item "__WITH_AVRLIBC__"
|
11256 |
|
|
The compiler is configured to be used together with AVR-Libc.
|
11257 |
|
|
See the \f(CW\*(C`\-\-with\-avrlibc\*(C'\fR configure option.
|
11258 |
|
|
.PP
|
11259 |
|
|
\fIBlackfin Options\fR
|
11260 |
|
|
.IX Subsection "Blackfin Options"
|
11261 |
|
|
.IP "\fB\-mcpu=\fR\fIcpu\fR[\fB\-\fR\fIsirevision\fR]" 4
|
11262 |
|
|
.IX Item "-mcpu=cpu[-sirevision]"
|
11263 |
|
|
Specifies the name of the target Blackfin processor. Currently, \fIcpu\fR
|
11264 |
|
|
can be one of \fBbf512\fR, \fBbf514\fR, \fBbf516\fR, \fBbf518\fR,
|
11265 |
|
|
\&\fBbf522\fR, \fBbf523\fR, \fBbf524\fR, \fBbf525\fR, \fBbf526\fR,
|
11266 |
|
|
\&\fBbf527\fR, \fBbf531\fR, \fBbf532\fR, \fBbf533\fR,
|
11267 |
|
|
\&\fBbf534\fR, \fBbf536\fR, \fBbf537\fR, \fBbf538\fR, \fBbf539\fR,
|
11268 |
|
|
\&\fBbf542\fR, \fBbf544\fR, \fBbf547\fR, \fBbf548\fR, \fBbf549\fR,
|
11269 |
|
|
\&\fBbf542m\fR, \fBbf544m\fR, \fBbf547m\fR, \fBbf548m\fR, \fBbf549m\fR,
|
11270 |
|
|
\&\fBbf561\fR, \fBbf592\fR.
|
11271 |
|
|
.Sp
|
11272 |
|
|
The optional \fIsirevision\fR specifies the silicon revision of the target
|
11273 |
|
|
Blackfin processor. Any workarounds available for the targeted silicon revision
|
11274 |
|
|
are enabled. If \fIsirevision\fR is \fBnone\fR, no workarounds are enabled.
|
11275 |
|
|
If \fIsirevision\fR is \fBany\fR, all workarounds for the targeted processor
|
11276 |
|
|
are enabled. The \f(CW\*(C`_\|_SILICON_REVISION_\|_\*(C'\fR macro is defined to two
|
11277 |
|
|
hexadecimal digits representing the major and minor numbers in the silicon
|
11278 |
|
|
revision. If \fIsirevision\fR is \fBnone\fR, the \f(CW\*(C`_\|_SILICON_REVISION_\|_\*(C'\fR
|
11279 |
|
|
is not defined. If \fIsirevision\fR is \fBany\fR, the
|
11280 |
|
|
\&\f(CW\*(C`_\|_SILICON_REVISION_\|_\*(C'\fR is defined to be \f(CW0xffff\fR.
|
11281 |
|
|
If this optional \fIsirevision\fR is not used, \s-1GCC\s0 assumes the latest known
|
11282 |
|
|
silicon revision of the targeted Blackfin processor.
|
11283 |
|
|
.Sp
|
11284 |
|
|
\&\s-1GCC\s0 defines a preprocessor macro for the specified \fIcpu\fR.
|
11285 |
|
|
For the \fBbfin-elf\fR toolchain, this option causes the hardware \s-1BSP\s0
|
11286 |
|
|
provided by libgloss to be linked in if \fB\-msim\fR is not given.
|
11287 |
|
|
.Sp
|
11288 |
|
|
Without this option, \fBbf532\fR is used as the processor by default.
|
11289 |
|
|
.Sp
|
11290 |
|
|
Note that support for \fBbf561\fR is incomplete. For \fBbf561\fR,
|
11291 |
|
|
only the preprocessor macro is defined.
|
11292 |
|
|
.IP "\fB\-msim\fR" 4
|
11293 |
|
|
.IX Item "-msim"
|
11294 |
|
|
Specifies that the program will be run on the simulator. This causes
|
11295 |
|
|
the simulator \s-1BSP\s0 provided by libgloss to be linked in. This option
|
11296 |
|
|
has effect only for \fBbfin-elf\fR toolchain.
|
11297 |
|
|
Certain other options, such as \fB\-mid\-shared\-library\fR and
|
11298 |
|
|
\&\fB\-mfdpic\fR, imply \fB\-msim\fR.
|
11299 |
|
|
.IP "\fB\-momit\-leaf\-frame\-pointer\fR" 4
|
11300 |
|
|
.IX Item "-momit-leaf-frame-pointer"
|
11301 |
|
|
Don't keep the frame pointer in a register for leaf functions. This
|
11302 |
|
|
avoids the instructions to save, set up and restore frame pointers and
|
11303 |
|
|
makes an extra register available in leaf functions. The option
|
11304 |
|
|
\&\fB\-fomit\-frame\-pointer\fR removes the frame pointer for all functions,
|
11305 |
|
|
which might make debugging harder.
|
11306 |
|
|
.IP "\fB\-mspecld\-anomaly\fR" 4
|
11307 |
|
|
.IX Item "-mspecld-anomaly"
|
11308 |
|
|
When enabled, the compiler ensures that the generated code does not
|
11309 |
|
|
contain speculative loads after jump instructions. If this option is used,
|
11310 |
|
|
\&\f(CW\*(C`_\|_WORKAROUND_SPECULATIVE_LOADS\*(C'\fR is defined.
|
11311 |
|
|
.IP "\fB\-mno\-specld\-anomaly\fR" 4
|
11312 |
|
|
.IX Item "-mno-specld-anomaly"
|
11313 |
|
|
Don't generate extra code to prevent speculative loads from occurring.
|
11314 |
|
|
.IP "\fB\-mcsync\-anomaly\fR" 4
|
11315 |
|
|
.IX Item "-mcsync-anomaly"
|
11316 |
|
|
When enabled, the compiler ensures that the generated code does not
|
11317 |
|
|
contain \s-1CSYNC\s0 or \s-1SSYNC\s0 instructions too soon after conditional branches.
|
11318 |
|
|
If this option is used, \f(CW\*(C`_\|_WORKAROUND_SPECULATIVE_SYNCS\*(C'\fR is defined.
|
11319 |
|
|
.IP "\fB\-mno\-csync\-anomaly\fR" 4
|
11320 |
|
|
.IX Item "-mno-csync-anomaly"
|
11321 |
|
|
Don't generate extra code to prevent \s-1CSYNC\s0 or \s-1SSYNC\s0 instructions from
|
11322 |
|
|
occurring too soon after a conditional branch.
|
11323 |
|
|
.IP "\fB\-mlow\-64k\fR" 4
|
11324 |
|
|
.IX Item "-mlow-64k"
|
11325 |
|
|
When enabled, the compiler is free to take advantage of the knowledge that
|
11326 |
|
|
the entire program fits into the low 64k of memory.
|
11327 |
|
|
.IP "\fB\-mno\-low\-64k\fR" 4
|
11328 |
|
|
.IX Item "-mno-low-64k"
|
11329 |
|
|
Assume that the program is arbitrarily large. This is the default.
|
11330 |
|
|
.IP "\fB\-mstack\-check\-l1\fR" 4
|
11331 |
|
|
.IX Item "-mstack-check-l1"
|
11332 |
|
|
Do stack checking using information placed into L1 scratchpad memory by the
|
11333 |
|
|
uClinux kernel.
|
11334 |
|
|
.IP "\fB\-mid\-shared\-library\fR" 4
|
11335 |
|
|
.IX Item "-mid-shared-library"
|
11336 |
|
|
Generate code that supports shared libraries via the library \s-1ID\s0 method.
|
11337 |
|
|
This allows for execute in place and shared libraries in an environment
|
11338 |
|
|
without virtual memory management. This option implies \fB\-fPIC\fR.
|
11339 |
|
|
With a \fBbfin-elf\fR target, this option implies \fB\-msim\fR.
|
11340 |
|
|
.IP "\fB\-mno\-id\-shared\-library\fR" 4
|
11341 |
|
|
.IX Item "-mno-id-shared-library"
|
11342 |
|
|
Generate code that doesn't assume ID-based shared libraries are being used.
|
11343 |
|
|
This is the default.
|
11344 |
|
|
.IP "\fB\-mleaf\-id\-shared\-library\fR" 4
|
11345 |
|
|
.IX Item "-mleaf-id-shared-library"
|
11346 |
|
|
Generate code that supports shared libraries via the library \s-1ID\s0 method,
|
11347 |
|
|
but assumes that this library or executable won't link against any other
|
11348 |
|
|
\&\s-1ID\s0 shared libraries. That allows the compiler to use faster code for jumps
|
11349 |
|
|
and calls.
|
11350 |
|
|
.IP "\fB\-mno\-leaf\-id\-shared\-library\fR" 4
|
11351 |
|
|
.IX Item "-mno-leaf-id-shared-library"
|
11352 |
|
|
Do not assume that the code being compiled won't link against any \s-1ID\s0 shared
|
11353 |
|
|
libraries. Slower code is generated for jump and call insns.
|
11354 |
|
|
.IP "\fB\-mshared\-library\-id=n\fR" 4
|
11355 |
|
|
.IX Item "-mshared-library-id=n"
|
11356 |
|
|
Specifies the identification number of the ID-based shared library being
|
11357 |
|
|
compiled. Specifying a value of 0 generates more compact code; specifying
|
11358 |
|
|
other values forces the allocation of that number to the current
|
11359 |
|
|
library but is no more space\- or time-efficient than omitting this option.
|
11360 |
|
|
.IP "\fB\-msep\-data\fR" 4
|
11361 |
|
|
.IX Item "-msep-data"
|
11362 |
|
|
Generate code that allows the data segment to be located in a different
|
11363 |
|
|
area of memory from the text segment. This allows for execute in place in
|
11364 |
|
|
an environment without virtual memory management by eliminating relocations
|
11365 |
|
|
against the text section.
|
11366 |
|
|
.IP "\fB\-mno\-sep\-data\fR" 4
|
11367 |
|
|
.IX Item "-mno-sep-data"
|
11368 |
|
|
Generate code that assumes that the data segment follows the text segment.
|
11369 |
|
|
This is the default.
|
11370 |
|
|
.IP "\fB\-mlong\-calls\fR" 4
|
11371 |
|
|
.IX Item "-mlong-calls"
|
11372 |
|
|
.PD 0
|
11373 |
|
|
.IP "\fB\-mno\-long\-calls\fR" 4
|
11374 |
|
|
.IX Item "-mno-long-calls"
|
11375 |
|
|
.PD
|
11376 |
|
|
Tells the compiler to perform function calls by first loading the
|
11377 |
|
|
address of the function into a register and then performing a subroutine
|
11378 |
|
|
call on this register. This switch is needed if the target function
|
11379 |
|
|
lies outside of the 24\-bit addressing range of the offset-based
|
11380 |
|
|
version of subroutine call instruction.
|
11381 |
|
|
.Sp
|
11382 |
|
|
This feature is not enabled by default. Specifying
|
11383 |
|
|
\&\fB\-mno\-long\-calls\fR restores the default behavior. Note these
|
11384 |
|
|
switches have no effect on how the compiler generates code to handle
|
11385 |
|
|
function calls via function pointers.
|
11386 |
|
|
.IP "\fB\-mfast\-fp\fR" 4
|
11387 |
|
|
.IX Item "-mfast-fp"
|
11388 |
|
|
Link with the fast floating-point library. This library relaxes some of
|
11389 |
|
|
the \s-1IEEE\s0 floating-point standard's rules for checking inputs against
|
11390 |
|
|
Not-a-Number (\s-1NAN\s0), in the interest of performance.
|
11391 |
|
|
.IP "\fB\-minline\-plt\fR" 4
|
11392 |
|
|
.IX Item "-minline-plt"
|
11393 |
|
|
Enable inlining of \s-1PLT\s0 entries in function calls to functions that are
|
11394 |
|
|
not known to bind locally. It has no effect without \fB\-mfdpic\fR.
|
11395 |
|
|
.IP "\fB\-mmulticore\fR" 4
|
11396 |
|
|
.IX Item "-mmulticore"
|
11397 |
|
|
Build a standalone application for multicore Blackfin processors.
|
11398 |
|
|
This option causes proper start files and link scripts supporting
|
11399 |
|
|
multicore to be used, and defines the macro \f(CW\*(C`_\|_BFIN_MULTICORE\*(C'\fR.
|
11400 |
|
|
It can only be used with \fB\-mcpu=bf561\fR[\fB\-\fR\fIsirevision\fR].
|
11401 |
|
|
.Sp
|
11402 |
|
|
This option can be used with \fB\-mcorea\fR or \fB\-mcoreb\fR, which
|
11403 |
|
|
selects the one-application-per-core programming model. Without
|
11404 |
|
|
\&\fB\-mcorea\fR or \fB\-mcoreb\fR, the single\-application/dual\-core
|
11405 |
|
|
programming model is used. In this model, the main function of Core B
|
11406 |
|
|
should be named as \f(CW\*(C`coreb_main\*(C'\fR.
|
11407 |
|
|
.Sp
|
11408 |
|
|
If this option is not used, the single-core application programming
|
11409 |
|
|
model is used.
|
11410 |
|
|
.IP "\fB\-mcorea\fR" 4
|
11411 |
|
|
.IX Item "-mcorea"
|
11412 |
|
|
Build a standalone application for Core A of \s-1BF561\s0 when using
|
11413 |
|
|
the one-application-per-core programming model. Proper start files
|
11414 |
|
|
and link scripts are used to support Core A, and the macro
|
11415 |
|
|
\&\f(CW\*(C`_\|_BFIN_COREA\*(C'\fR is defined.
|
11416 |
|
|
This option can only be used in conjunction with \fB\-mmulticore\fR.
|
11417 |
|
|
.IP "\fB\-mcoreb\fR" 4
|
11418 |
|
|
.IX Item "-mcoreb"
|
11419 |
|
|
Build a standalone application for Core B of \s-1BF561\s0 when using
|
11420 |
|
|
the one-application-per-core programming model. Proper start files
|
11421 |
|
|
and link scripts are used to support Core B, and the macro
|
11422 |
|
|
\&\f(CW\*(C`_\|_BFIN_COREB\*(C'\fR is defined. When this option is used, \f(CW\*(C`coreb_main\*(C'\fR
|
11423 |
|
|
should be used instead of \f(CW\*(C`main\*(C'\fR.
|
11424 |
|
|
This option can only be used in conjunction with \fB\-mmulticore\fR.
|
11425 |
|
|
.IP "\fB\-msdram\fR" 4
|
11426 |
|
|
.IX Item "-msdram"
|
11427 |
|
|
Build a standalone application for \s-1SDRAM\s0. Proper start files and
|
11428 |
|
|
link scripts are used to put the application into \s-1SDRAM\s0, and the macro
|
11429 |
|
|
\&\f(CW\*(C`_\|_BFIN_SDRAM\*(C'\fR is defined.
|
11430 |
|
|
The loader should initialize \s-1SDRAM\s0 before loading the application.
|
11431 |
|
|
.IP "\fB\-micplb\fR" 4
|
11432 |
|
|
.IX Item "-micplb"
|
11433 |
|
|
Assume that ICPLBs are enabled at run time. This has an effect on certain
|
11434 |
|
|
anomaly workarounds. For Linux targets, the default is to assume ICPLBs
|
11435 |
|
|
are enabled; for standalone applications the default is off.
|
11436 |
|
|
.PP
|
11437 |
|
|
\fIC6X Options\fR
|
11438 |
|
|
.IX Subsection "C6X Options"
|
11439 |
|
|
.IP "\fB\-march=\fR\fIname\fR" 4
|
11440 |
|
|
.IX Item "-march=name"
|
11441 |
|
|
This specifies the name of the target architecture. \s-1GCC\s0 uses this
|
11442 |
|
|
name to determine what kind of instructions it can emit when generating
|
11443 |
|
|
assembly code. Permissible names are: \fBc62x\fR,
|
11444 |
|
|
\&\fBc64x\fR, \fBc64x+\fR, \fBc67x\fR, \fBc67x+\fR, \fBc674x\fR.
|
11445 |
|
|
.IP "\fB\-mbig\-endian\fR" 4
|
11446 |
|
|
.IX Item "-mbig-endian"
|
11447 |
|
|
Generate code for a big-endian target.
|
11448 |
|
|
.IP "\fB\-mlittle\-endian\fR" 4
|
11449 |
|
|
.IX Item "-mlittle-endian"
|
11450 |
|
|
Generate code for a little-endian target. This is the default.
|
11451 |
|
|
.IP "\fB\-msim\fR" 4
|
11452 |
|
|
.IX Item "-msim"
|
11453 |
|
|
Choose startup files and linker script suitable for the simulator.
|
11454 |
|
|
.IP "\fB\-msdata=default\fR" 4
|
11455 |
|
|
.IX Item "-msdata=default"
|
11456 |
|
|
Put small global and static data in the \fB.neardata\fR section,
|
11457 |
|
|
which is pointed to by register \f(CW\*(C`B14\*(C'\fR. Put small uninitialized
|
11458 |
|
|
global and static data in the \fB.bss\fR section, which is adjacent
|
11459 |
|
|
to the \fB.neardata\fR section. Put small read-only data into the
|
11460 |
|
|
\&\fB.rodata\fR section. The corresponding sections used for large
|
11461 |
|
|
pieces of data are \fB.fardata\fR, \fB.far\fR and \fB.const\fR.
|
11462 |
|
|
.IP "\fB\-msdata=all\fR" 4
|
11463 |
|
|
.IX Item "-msdata=all"
|
11464 |
|
|
Put all data, not just small objects, into the sections reserved for
|
11465 |
|
|
small data, and use addressing relative to the \f(CW\*(C`B14\*(C'\fR register to
|
11466 |
|
|
access them.
|
11467 |
|
|
.IP "\fB\-msdata=none\fR" 4
|
11468 |
|
|
.IX Item "-msdata=none"
|
11469 |
|
|
Make no use of the sections reserved for small data, and use absolute
|
11470 |
|
|
addresses to access all data. Put all initialized global and static
|
11471 |
|
|
data in the \fB.fardata\fR section, and all uninitialized data in the
|
11472 |
|
|
\&\fB.far\fR section. Put all constant data into the \fB.const\fR
|
11473 |
|
|
section.
|
11474 |
|
|
.PP
|
11475 |
|
|
\fI\s-1CRIS\s0 Options\fR
|
11476 |
|
|
.IX Subsection "CRIS Options"
|
11477 |
|
|
.PP
|
11478 |
|
|
These options are defined specifically for the \s-1CRIS\s0 ports.
|
11479 |
|
|
.IP "\fB\-march=\fR\fIarchitecture-type\fR" 4
|
11480 |
|
|
.IX Item "-march=architecture-type"
|
11481 |
|
|
.PD 0
|
11482 |
|
|
.IP "\fB\-mcpu=\fR\fIarchitecture-type\fR" 4
|
11483 |
|
|
.IX Item "-mcpu=architecture-type"
|
11484 |
|
|
.PD
|
11485 |
|
|
Generate code for the specified architecture. The choices for
|
11486 |
|
|
\&\fIarchitecture-type\fR are \fBv3\fR, \fBv8\fR and \fBv10\fR for
|
11487 |
|
|
respectively \s-1ETRAX\s0\ 4, \s-1ETRAX\s0\ 100, and \s-1ETRAX\s0\ 100\ \s-1LX\s0.
|
11488 |
|
|
Default is \fBv0\fR except for cris-axis-linux-gnu, where the default is
|
11489 |
|
|
\&\fBv10\fR.
|
11490 |
|
|
.IP "\fB\-mtune=\fR\fIarchitecture-type\fR" 4
|
11491 |
|
|
.IX Item "-mtune=architecture-type"
|
11492 |
|
|
Tune to \fIarchitecture-type\fR everything applicable about the generated
|
11493 |
|
|
code, except for the \s-1ABI\s0 and the set of available instructions. The
|
11494 |
|
|
choices for \fIarchitecture-type\fR are the same as for
|
11495 |
|
|
\&\fB\-march=\fR\fIarchitecture-type\fR.
|
11496 |
|
|
.IP "\fB\-mmax\-stack\-frame=\fR\fIn\fR" 4
|
11497 |
|
|
.IX Item "-mmax-stack-frame=n"
|
11498 |
|
|
Warn when the stack frame of a function exceeds \fIn\fR bytes.
|
11499 |
|
|
.IP "\fB\-metrax4\fR" 4
|
11500 |
|
|
.IX Item "-metrax4"
|
11501 |
|
|
.PD 0
|
11502 |
|
|
.IP "\fB\-metrax100\fR" 4
|
11503 |
|
|
.IX Item "-metrax100"
|
11504 |
|
|
.PD
|
11505 |
|
|
The options \fB\-metrax4\fR and \fB\-metrax100\fR are synonyms for
|
11506 |
|
|
\&\fB\-march=v3\fR and \fB\-march=v8\fR respectively.
|
11507 |
|
|
.IP "\fB\-mmul\-bug\-workaround\fR" 4
|
11508 |
|
|
.IX Item "-mmul-bug-workaround"
|
11509 |
|
|
.PD 0
|
11510 |
|
|
.IP "\fB\-mno\-mul\-bug\-workaround\fR" 4
|
11511 |
|
|
.IX Item "-mno-mul-bug-workaround"
|
11512 |
|
|
.PD
|
11513 |
|
|
Work around a bug in the \f(CW\*(C`muls\*(C'\fR and \f(CW\*(C`mulu\*(C'\fR instructions for \s-1CPU\s0
|
11514 |
|
|
models where it applies. This option is active by default.
|
11515 |
|
|
.IP "\fB\-mpdebug\fR" 4
|
11516 |
|
|
.IX Item "-mpdebug"
|
11517 |
|
|
Enable CRIS-specific verbose debug-related information in the assembly
|
11518 |
|
|
code. This option also has the effect of turning off the \fB#NO_APP\fR
|
11519 |
|
|
formatted-code indicator to the assembler at the beginning of the
|
11520 |
|
|
assembly file.
|
11521 |
|
|
.IP "\fB\-mcc\-init\fR" 4
|
11522 |
|
|
.IX Item "-mcc-init"
|
11523 |
|
|
Do not use condition-code results from previous instruction; always emit
|
11524 |
|
|
compare and test instructions before use of condition codes.
|
11525 |
|
|
.IP "\fB\-mno\-side\-effects\fR" 4
|
11526 |
|
|
.IX Item "-mno-side-effects"
|
11527 |
|
|
Do not emit instructions with side effects in addressing modes other than
|
11528 |
|
|
post-increment.
|
11529 |
|
|
.IP "\fB\-mstack\-align\fR" 4
|
11530 |
|
|
.IX Item "-mstack-align"
|
11531 |
|
|
.PD 0
|
11532 |
|
|
.IP "\fB\-mno\-stack\-align\fR" 4
|
11533 |
|
|
.IX Item "-mno-stack-align"
|
11534 |
|
|
.IP "\fB\-mdata\-align\fR" 4
|
11535 |
|
|
.IX Item "-mdata-align"
|
11536 |
|
|
.IP "\fB\-mno\-data\-align\fR" 4
|
11537 |
|
|
.IX Item "-mno-data-align"
|
11538 |
|
|
.IP "\fB\-mconst\-align\fR" 4
|
11539 |
|
|
.IX Item "-mconst-align"
|
11540 |
|
|
.IP "\fB\-mno\-const\-align\fR" 4
|
11541 |
|
|
.IX Item "-mno-const-align"
|
11542 |
|
|
.PD
|
11543 |
|
|
These options (\fBno\-\fR options) arrange (eliminate arrangements) for the
|
11544 |
|
|
stack frame, individual data and constants to be aligned for the maximum
|
11545 |
|
|
single data access size for the chosen \s-1CPU\s0 model. The default is to
|
11546 |
|
|
arrange for 32\-bit alignment. \s-1ABI\s0 details such as structure layout are
|
11547 |
|
|
not affected by these options.
|
11548 |
|
|
.IP "\fB\-m32\-bit\fR" 4
|
11549 |
|
|
.IX Item "-m32-bit"
|
11550 |
|
|
.PD 0
|
11551 |
|
|
.IP "\fB\-m16\-bit\fR" 4
|
11552 |
|
|
.IX Item "-m16-bit"
|
11553 |
|
|
.IP "\fB\-m8\-bit\fR" 4
|
11554 |
|
|
.IX Item "-m8-bit"
|
11555 |
|
|
.PD
|
11556 |
|
|
Similar to the stack\- data\- and const-align options above, these options
|
11557 |
|
|
arrange for stack frame, writable data and constants to all be 32\-bit,
|
11558 |
|
|
16\-bit or 8\-bit aligned. The default is 32\-bit alignment.
|
11559 |
|
|
.IP "\fB\-mno\-prologue\-epilogue\fR" 4
|
11560 |
|
|
.IX Item "-mno-prologue-epilogue"
|
11561 |
|
|
.PD 0
|
11562 |
|
|
.IP "\fB\-mprologue\-epilogue\fR" 4
|
11563 |
|
|
.IX Item "-mprologue-epilogue"
|
11564 |
|
|
.PD
|
11565 |
|
|
With \fB\-mno\-prologue\-epilogue\fR, the normal function prologue and
|
11566 |
|
|
epilogue which set up the stack frame are omitted and no return
|
11567 |
|
|
instructions or return sequences are generated in the code. Use this
|
11568 |
|
|
option only together with visual inspection of the compiled code: no
|
11569 |
|
|
warnings or errors are generated when call-saved registers must be saved,
|
11570 |
|
|
or storage for local variables needs to be allocated.
|
11571 |
|
|
.IP "\fB\-mno\-gotplt\fR" 4
|
11572 |
|
|
.IX Item "-mno-gotplt"
|
11573 |
|
|
.PD 0
|
11574 |
|
|
.IP "\fB\-mgotplt\fR" 4
|
11575 |
|
|
.IX Item "-mgotplt"
|
11576 |
|
|
.PD
|
11577 |
|
|
With \fB\-fpic\fR and \fB\-fPIC\fR, don't generate (do generate)
|
11578 |
|
|
instruction sequences that load addresses for functions from the \s-1PLT\s0 part
|
11579 |
|
|
of the \s-1GOT\s0 rather than (traditional on other architectures) calls to the
|
11580 |
|
|
\&\s-1PLT\s0. The default is \fB\-mgotplt\fR.
|
11581 |
|
|
.IP "\fB\-melf\fR" 4
|
11582 |
|
|
.IX Item "-melf"
|
11583 |
|
|
Legacy no-op option only recognized with the cris-axis-elf and
|
11584 |
|
|
cris-axis-linux-gnu targets.
|
11585 |
|
|
.IP "\fB\-mlinux\fR" 4
|
11586 |
|
|
.IX Item "-mlinux"
|
11587 |
|
|
Legacy no-op option only recognized with the cris-axis-linux-gnu target.
|
11588 |
|
|
.IP "\fB\-sim\fR" 4
|
11589 |
|
|
.IX Item "-sim"
|
11590 |
|
|
This option, recognized for the cris-axis-elf, arranges
|
11591 |
|
|
to link with input-output functions from a simulator library. Code,
|
11592 |
|
|
initialized data and zero-initialized data are allocated consecutively.
|
11593 |
|
|
.IP "\fB\-sim2\fR" 4
|
11594 |
|
|
.IX Item "-sim2"
|
11595 |
|
|
Like \fB\-sim\fR, but pass linker options to locate initialized data at
|
11596 |
|
|
0x40000000 and zero-initialized data at 0x80000000.
|
11597 |
|
|
.PP
|
11598 |
|
|
\fI\s-1CR16\s0 Options\fR
|
11599 |
|
|
.IX Subsection "CR16 Options"
|
11600 |
|
|
.PP
|
11601 |
|
|
These options are defined specifically for the \s-1CR16\s0 ports.
|
11602 |
|
|
.IP "\fB\-mmac\fR" 4
|
11603 |
|
|
.IX Item "-mmac"
|
11604 |
|
|
Enable the use of multiply-accumulate instructions. Disabled by default.
|
11605 |
|
|
.IP "\fB\-mcr16cplus\fR" 4
|
11606 |
|
|
.IX Item "-mcr16cplus"
|
11607 |
|
|
.PD 0
|
11608 |
|
|
.IP "\fB\-mcr16c\fR" 4
|
11609 |
|
|
.IX Item "-mcr16c"
|
11610 |
|
|
.PD
|
11611 |
|
|
Generate code for \s-1CR16C\s0 or \s-1CR16C+\s0 architecture. \s-1CR16C+\s0 architecture
|
11612 |
|
|
is default.
|
11613 |
|
|
.IP "\fB\-msim\fR" 4
|
11614 |
|
|
.IX Item "-msim"
|
11615 |
|
|
Links the library libsim.a which is in compatible with simulator. Applicable
|
11616 |
|
|
to \s-1ELF\s0 compiler only.
|
11617 |
|
|
.IP "\fB\-mint32\fR" 4
|
11618 |
|
|
.IX Item "-mint32"
|
11619 |
|
|
Choose integer type as 32\-bit wide.
|
11620 |
|
|
.IP "\fB\-mbit\-ops\fR" 4
|
11621 |
|
|
.IX Item "-mbit-ops"
|
11622 |
|
|
Generates \f(CW\*(C`sbit\*(C'\fR/\f(CW\*(C`cbit\*(C'\fR instructions for bit manipulations.
|
11623 |
|
|
.IP "\fB\-mdata\-model=\fR\fImodel\fR" 4
|
11624 |
|
|
.IX Item "-mdata-model=model"
|
11625 |
|
|
Choose a data model. The choices for \fImodel\fR are \fBnear\fR,
|
11626 |
|
|
\&\fBfar\fR or \fBmedium\fR. \fBmedium\fR is default.
|
11627 |
|
|
However, \fBfar\fR is not valid with \fB\-mcr16c\fR, as the
|
11628 |
|
|
\&\s-1CR16C\s0 architecture does not support the far data model.
|
11629 |
|
|
.PP
|
11630 |
|
|
\fIDarwin Options\fR
|
11631 |
|
|
.IX Subsection "Darwin Options"
|
11632 |
|
|
.PP
|
11633 |
|
|
These options are defined for all architectures running the Darwin operating
|
11634 |
|
|
system.
|
11635 |
|
|
.PP
|
11636 |
|
|
\&\s-1FSF\s0 \s-1GCC\s0 on Darwin does not create \*(L"fat\*(R" object files; it creates
|
11637 |
|
|
an object file for the single architecture that \s-1GCC\s0 was built to
|
11638 |
|
|
target. Apple's \s-1GCC\s0 on Darwin does create \*(L"fat\*(R" files if multiple
|
11639 |
|
|
\&\fB\-arch\fR options are used; it does so by running the compiler or
|
11640 |
|
|
linker multiple times and joining the results together with
|
11641 |
|
|
\&\fIlipo\fR.
|
11642 |
|
|
.PP
|
11643 |
|
|
The subtype of the file created (like \fBppc7400\fR or \fBppc970\fR or
|
11644 |
|
|
\&\fBi686\fR) is determined by the flags that specify the \s-1ISA\s0
|
11645 |
|
|
that \s-1GCC\s0 is targetting, like \fB\-mcpu\fR or \fB\-march\fR. The
|
11646 |
|
|
\&\fB\-force_cpusubtype_ALL\fR option can be used to override this.
|
11647 |
|
|
.PP
|
11648 |
|
|
The Darwin tools vary in their behavior when presented with an \s-1ISA\s0
|
11649 |
|
|
mismatch. The assembler, \fIas\fR, only permits instructions to
|
11650 |
|
|
be used that are valid for the subtype of the file it is generating,
|
11651 |
|
|
so you cannot put 64\-bit instructions in a \fBppc750\fR object file.
|
11652 |
|
|
The linker for shared libraries, \fI/usr/bin/libtool\fR, fails
|
11653 |
|
|
and prints an error if asked to create a shared library with a less
|
11654 |
|
|
restrictive subtype than its input files (for instance, trying to put
|
11655 |
|
|
a \fBppc970\fR object file in a \fBppc7400\fR library). The linker
|
11656 |
|
|
for executables, \fBld\fR, quietly gives the executable the most
|
11657 |
|
|
restrictive subtype of any of its input files.
|
11658 |
|
|
.IP "\fB\-F\fR\fIdir\fR" 4
|
11659 |
|
|
.IX Item "-Fdir"
|
11660 |
|
|
Add the framework directory \fIdir\fR to the head of the list of
|
11661 |
|
|
directories to be searched for header files. These directories are
|
11662 |
|
|
interleaved with those specified by \fB\-I\fR options and are
|
11663 |
|
|
scanned in a left-to-right order.
|
11664 |
|
|
.Sp
|
11665 |
|
|
A framework directory is a directory with frameworks in it. A
|
11666 |
|
|
framework is a directory with a \fIHeaders\fR and/or
|
11667 |
|
|
\&\fIPrivateHeaders\fR directory contained directly in it that ends
|
11668 |
|
|
in \fI.framework\fR. The name of a framework is the name of this
|
11669 |
|
|
directory excluding the \fI.framework\fR. Headers associated with
|
11670 |
|
|
the framework are found in one of those two directories, with
|
11671 |
|
|
\&\fIHeaders\fR being searched first. A subframework is a framework
|
11672 |
|
|
directory that is in a framework's \fIFrameworks\fR directory.
|
11673 |
|
|
Includes of subframework headers can only appear in a header of a
|
11674 |
|
|
framework that contains the subframework, or in a sibling subframework
|
11675 |
|
|
header. Two subframeworks are siblings if they occur in the same
|
11676 |
|
|
framework. A subframework should not have the same name as a
|
11677 |
|
|
framework; a warning is issued if this is violated. Currently a
|
11678 |
|
|
subframework cannot have subframeworks; in the future, the mechanism
|
11679 |
|
|
may be extended to support this. The standard frameworks can be found
|
11680 |
|
|
in \fI/System/Library/Frameworks\fR and
|
11681 |
|
|
\&\fI/Library/Frameworks\fR. An example include looks like
|
11682 |
|
|
\&\f(CW\*(C`#include \*(C'\fR, where \fIFramework\fR denotes
|
11683 |
|
|
the name of the framework and \fIheader.h\fR is found in the
|
11684 |
|
|
\&\fIPrivateHeaders\fR or \fIHeaders\fR directory.
|
11685 |
|
|
.IP "\fB\-iframework\fR\fIdir\fR" 4
|
11686 |
|
|
.IX Item "-iframeworkdir"
|
11687 |
|
|
Like \fB\-F\fR except the directory is a treated as a system
|
11688 |
|
|
directory. The main difference between this \fB\-iframework\fR and
|
11689 |
|
|
\&\fB\-F\fR is that with \fB\-iframework\fR the compiler does not
|
11690 |
|
|
warn about constructs contained within header files found via
|
11691 |
|
|
\&\fIdir\fR. This option is valid only for the C family of languages.
|
11692 |
|
|
.IP "\fB\-gused\fR" 4
|
11693 |
|
|
.IX Item "-gused"
|
11694 |
|
|
Emit debugging information for symbols that are used. For stabs
|
11695 |
|
|
debugging format, this enables \fB\-feliminate\-unused\-debug\-symbols\fR.
|
11696 |
|
|
This is by default \s-1ON\s0.
|
11697 |
|
|
.IP "\fB\-gfull\fR" 4
|
11698 |
|
|
.IX Item "-gfull"
|
11699 |
|
|
Emit debugging information for all symbols and types.
|
11700 |
|
|
.IP "\fB\-mmacosx\-version\-min=\fR\fIversion\fR" 4
|
11701 |
|
|
.IX Item "-mmacosx-version-min=version"
|
11702 |
|
|
The earliest version of MacOS X that this executable will run on
|
11703 |
|
|
is \fIversion\fR. Typical values of \fIversion\fR include \f(CW10.1\fR,
|
11704 |
|
|
\&\f(CW10.2\fR, and \f(CW10.3.9\fR.
|
11705 |
|
|
.Sp
|
11706 |
|
|
If the compiler was built to use the system's headers by default,
|
11707 |
|
|
then the default for this option is the system version on which the
|
11708 |
|
|
compiler is running, otherwise the default is to make choices that
|
11709 |
|
|
are compatible with as many systems and code bases as possible.
|
11710 |
|
|
.IP "\fB\-mkernel\fR" 4
|
11711 |
|
|
.IX Item "-mkernel"
|
11712 |
|
|
Enable kernel development mode. The \fB\-mkernel\fR option sets
|
11713 |
|
|
\&\fB\-static\fR, \fB\-fno\-common\fR, \fB\-fno\-cxa\-atexit\fR,
|
11714 |
|
|
\&\fB\-fno\-exceptions\fR, \fB\-fno\-non\-call\-exceptions\fR,
|
11715 |
|
|
\&\fB\-fapple\-kext\fR, \fB\-fno\-weak\fR and \fB\-fno\-rtti\fR where
|
11716 |
|
|
applicable. This mode also sets \fB\-mno\-altivec\fR,
|
11717 |
|
|
\&\fB\-msoft\-float\fR, \fB\-fno\-builtin\fR and
|
11718 |
|
|
\&\fB\-mlong\-branch\fR for PowerPC targets.
|
11719 |
|
|
.IP "\fB\-mone\-byte\-bool\fR" 4
|
11720 |
|
|
.IX Item "-mone-byte-bool"
|
11721 |
|
|
Override the defaults for \fBbool\fR so that \fBsizeof(bool)==1\fR.
|
11722 |
|
|
By default \fBsizeof(bool)\fR is \fB4\fR when compiling for
|
11723 |
|
|
Darwin/PowerPC and \fB1\fR when compiling for Darwin/x86, so this
|
11724 |
|
|
option has no effect on x86.
|
11725 |
|
|
.Sp
|
11726 |
|
|
\&\fBWarning:\fR The \fB\-mone\-byte\-bool\fR switch causes \s-1GCC\s0
|
11727 |
|
|
to generate code that is not binary compatible with code generated
|
11728 |
|
|
without that switch. Using this switch may require recompiling all
|
11729 |
|
|
other modules in a program, including system libraries. Use this
|
11730 |
|
|
switch to conform to a non-default data model.
|
11731 |
|
|
.IP "\fB\-mfix\-and\-continue\fR" 4
|
11732 |
|
|
.IX Item "-mfix-and-continue"
|
11733 |
|
|
.PD 0
|
11734 |
|
|
.IP "\fB\-ffix\-and\-continue\fR" 4
|
11735 |
|
|
.IX Item "-ffix-and-continue"
|
11736 |
|
|
.IP "\fB\-findirect\-data\fR" 4
|
11737 |
|
|
.IX Item "-findirect-data"
|
11738 |
|
|
.PD
|
11739 |
|
|
Generate code suitable for fast turnaround development, such as to
|
11740 |
|
|
allow \s-1GDB\s0 to dynamically load \f(CW\*(C`.o\*(C'\fR files into already-running
|
11741 |
|
|
programs. \fB\-findirect\-data\fR and \fB\-ffix\-and\-continue\fR
|
11742 |
|
|
are provided for backwards compatibility.
|
11743 |
|
|
.IP "\fB\-all_load\fR" 4
|
11744 |
|
|
.IX Item "-all_load"
|
11745 |
|
|
Loads all members of static archive libraries.
|
11746 |
|
|
See man \fIld\fR\|(1) for more information.
|
11747 |
|
|
.IP "\fB\-arch_errors_fatal\fR" 4
|
11748 |
|
|
.IX Item "-arch_errors_fatal"
|
11749 |
|
|
Cause the errors having to do with files that have the wrong architecture
|
11750 |
|
|
to be fatal.
|
11751 |
|
|
.IP "\fB\-bind_at_load\fR" 4
|
11752 |
|
|
.IX Item "-bind_at_load"
|
11753 |
|
|
Causes the output file to be marked such that the dynamic linker will
|
11754 |
|
|
bind all undefined references when the file is loaded or launched.
|
11755 |
|
|
.IP "\fB\-bundle\fR" 4
|
11756 |
|
|
.IX Item "-bundle"
|
11757 |
|
|
Produce a Mach-o bundle format file.
|
11758 |
|
|
See man \fIld\fR\|(1) for more information.
|
11759 |
|
|
.IP "\fB\-bundle_loader\fR \fIexecutable\fR" 4
|
11760 |
|
|
.IX Item "-bundle_loader executable"
|
11761 |
|
|
This option specifies the \fIexecutable\fR that will load the build
|
11762 |
|
|
output file being linked. See man \fIld\fR\|(1) for more information.
|
11763 |
|
|
.IP "\fB\-dynamiclib\fR" 4
|
11764 |
|
|
.IX Item "-dynamiclib"
|
11765 |
|
|
When passed this option, \s-1GCC\s0 produces a dynamic library instead of
|
11766 |
|
|
an executable when linking, using the Darwin \fIlibtool\fR command.
|
11767 |
|
|
.IP "\fB\-force_cpusubtype_ALL\fR" 4
|
11768 |
|
|
.IX Item "-force_cpusubtype_ALL"
|
11769 |
|
|
This causes \s-1GCC\s0's output file to have the \fI\s-1ALL\s0\fR subtype, instead of
|
11770 |
|
|
one controlled by the \fB\-mcpu\fR or \fB\-march\fR option.
|
11771 |
|
|
.IP "\fB\-allowable_client\fR \fIclient_name\fR" 4
|
11772 |
|
|
.IX Item "-allowable_client client_name"
|
11773 |
|
|
.PD 0
|
11774 |
|
|
.IP "\fB\-client_name\fR" 4
|
11775 |
|
|
.IX Item "-client_name"
|
11776 |
|
|
.IP "\fB\-compatibility_version\fR" 4
|
11777 |
|
|
.IX Item "-compatibility_version"
|
11778 |
|
|
.IP "\fB\-current_version\fR" 4
|
11779 |
|
|
.IX Item "-current_version"
|
11780 |
|
|
.IP "\fB\-dead_strip\fR" 4
|
11781 |
|
|
.IX Item "-dead_strip"
|
11782 |
|
|
.IP "\fB\-dependency\-file\fR" 4
|
11783 |
|
|
.IX Item "-dependency-file"
|
11784 |
|
|
.IP "\fB\-dylib_file\fR" 4
|
11785 |
|
|
.IX Item "-dylib_file"
|
11786 |
|
|
.IP "\fB\-dylinker_install_name\fR" 4
|
11787 |
|
|
.IX Item "-dylinker_install_name"
|
11788 |
|
|
.IP "\fB\-dynamic\fR" 4
|
11789 |
|
|
.IX Item "-dynamic"
|
11790 |
|
|
.IP "\fB\-exported_symbols_list\fR" 4
|
11791 |
|
|
.IX Item "-exported_symbols_list"
|
11792 |
|
|
.IP "\fB\-filelist\fR" 4
|
11793 |
|
|
.IX Item "-filelist"
|
11794 |
|
|
.IP "\fB\-flat_namespace\fR" 4
|
11795 |
|
|
.IX Item "-flat_namespace"
|
11796 |
|
|
.IP "\fB\-force_flat_namespace\fR" 4
|
11797 |
|
|
.IX Item "-force_flat_namespace"
|
11798 |
|
|
.IP "\fB\-headerpad_max_install_names\fR" 4
|
11799 |
|
|
.IX Item "-headerpad_max_install_names"
|
11800 |
|
|
.IP "\fB\-image_base\fR" 4
|
11801 |
|
|
.IX Item "-image_base"
|
11802 |
|
|
.IP "\fB\-init\fR" 4
|
11803 |
|
|
.IX Item "-init"
|
11804 |
|
|
.IP "\fB\-install_name\fR" 4
|
11805 |
|
|
.IX Item "-install_name"
|
11806 |
|
|
.IP "\fB\-keep_private_externs\fR" 4
|
11807 |
|
|
.IX Item "-keep_private_externs"
|
11808 |
|
|
.IP "\fB\-multi_module\fR" 4
|
11809 |
|
|
.IX Item "-multi_module"
|
11810 |
|
|
.IP "\fB\-multiply_defined\fR" 4
|
11811 |
|
|
.IX Item "-multiply_defined"
|
11812 |
|
|
.IP "\fB\-multiply_defined_unused\fR" 4
|
11813 |
|
|
.IX Item "-multiply_defined_unused"
|
11814 |
|
|
.IP "\fB\-noall_load\fR" 4
|
11815 |
|
|
.IX Item "-noall_load"
|
11816 |
|
|
.IP "\fB\-no_dead_strip_inits_and_terms\fR" 4
|
11817 |
|
|
.IX Item "-no_dead_strip_inits_and_terms"
|
11818 |
|
|
.IP "\fB\-nofixprebinding\fR" 4
|
11819 |
|
|
.IX Item "-nofixprebinding"
|
11820 |
|
|
.IP "\fB\-nomultidefs\fR" 4
|
11821 |
|
|
.IX Item "-nomultidefs"
|
11822 |
|
|
.IP "\fB\-noprebind\fR" 4
|
11823 |
|
|
.IX Item "-noprebind"
|
11824 |
|
|
.IP "\fB\-noseglinkedit\fR" 4
|
11825 |
|
|
.IX Item "-noseglinkedit"
|
11826 |
|
|
.IP "\fB\-pagezero_size\fR" 4
|
11827 |
|
|
.IX Item "-pagezero_size"
|
11828 |
|
|
.IP "\fB\-prebind\fR" 4
|
11829 |
|
|
.IX Item "-prebind"
|
11830 |
|
|
.IP "\fB\-prebind_all_twolevel_modules\fR" 4
|
11831 |
|
|
.IX Item "-prebind_all_twolevel_modules"
|
11832 |
|
|
.IP "\fB\-private_bundle\fR" 4
|
11833 |
|
|
.IX Item "-private_bundle"
|
11834 |
|
|
.IP "\fB\-read_only_relocs\fR" 4
|
11835 |
|
|
.IX Item "-read_only_relocs"
|
11836 |
|
|
.IP "\fB\-sectalign\fR" 4
|
11837 |
|
|
.IX Item "-sectalign"
|
11838 |
|
|
.IP "\fB\-sectobjectsymbols\fR" 4
|
11839 |
|
|
.IX Item "-sectobjectsymbols"
|
11840 |
|
|
.IP "\fB\-whyload\fR" 4
|
11841 |
|
|
.IX Item "-whyload"
|
11842 |
|
|
.IP "\fB\-seg1addr\fR" 4
|
11843 |
|
|
.IX Item "-seg1addr"
|
11844 |
|
|
.IP "\fB\-sectcreate\fR" 4
|
11845 |
|
|
.IX Item "-sectcreate"
|
11846 |
|
|
.IP "\fB\-sectobjectsymbols\fR" 4
|
11847 |
|
|
.IX Item "-sectobjectsymbols"
|
11848 |
|
|
.IP "\fB\-sectorder\fR" 4
|
11849 |
|
|
.IX Item "-sectorder"
|
11850 |
|
|
.IP "\fB\-segaddr\fR" 4
|
11851 |
|
|
.IX Item "-segaddr"
|
11852 |
|
|
.IP "\fB\-segs_read_only_addr\fR" 4
|
11853 |
|
|
.IX Item "-segs_read_only_addr"
|
11854 |
|
|
.IP "\fB\-segs_read_write_addr\fR" 4
|
11855 |
|
|
.IX Item "-segs_read_write_addr"
|
11856 |
|
|
.IP "\fB\-seg_addr_table\fR" 4
|
11857 |
|
|
.IX Item "-seg_addr_table"
|
11858 |
|
|
.IP "\fB\-seg_addr_table_filename\fR" 4
|
11859 |
|
|
.IX Item "-seg_addr_table_filename"
|
11860 |
|
|
.IP "\fB\-seglinkedit\fR" 4
|
11861 |
|
|
.IX Item "-seglinkedit"
|
11862 |
|
|
.IP "\fB\-segprot\fR" 4
|
11863 |
|
|
.IX Item "-segprot"
|
11864 |
|
|
.IP "\fB\-segs_read_only_addr\fR" 4
|
11865 |
|
|
.IX Item "-segs_read_only_addr"
|
11866 |
|
|
.IP "\fB\-segs_read_write_addr\fR" 4
|
11867 |
|
|
.IX Item "-segs_read_write_addr"
|
11868 |
|
|
.IP "\fB\-single_module\fR" 4
|
11869 |
|
|
.IX Item "-single_module"
|
11870 |
|
|
.IP "\fB\-static\fR" 4
|
11871 |
|
|
.IX Item "-static"
|
11872 |
|
|
.IP "\fB\-sub_library\fR" 4
|
11873 |
|
|
.IX Item "-sub_library"
|
11874 |
|
|
.IP "\fB\-sub_umbrella\fR" 4
|
11875 |
|
|
.IX Item "-sub_umbrella"
|
11876 |
|
|
.IP "\fB\-twolevel_namespace\fR" 4
|
11877 |
|
|
.IX Item "-twolevel_namespace"
|
11878 |
|
|
.IP "\fB\-umbrella\fR" 4
|
11879 |
|
|
.IX Item "-umbrella"
|
11880 |
|
|
.IP "\fB\-undefined\fR" 4
|
11881 |
|
|
.IX Item "-undefined"
|
11882 |
|
|
.IP "\fB\-unexported_symbols_list\fR" 4
|
11883 |
|
|
.IX Item "-unexported_symbols_list"
|
11884 |
|
|
.IP "\fB\-weak_reference_mismatches\fR" 4
|
11885 |
|
|
.IX Item "-weak_reference_mismatches"
|
11886 |
|
|
.IP "\fB\-whatsloaded\fR" 4
|
11887 |
|
|
.IX Item "-whatsloaded"
|
11888 |
|
|
.PD
|
11889 |
|
|
These options are passed to the Darwin linker. The Darwin linker man page
|
11890 |
|
|
describes them in detail.
|
11891 |
|
|
.PP
|
11892 |
|
|
\fI\s-1DEC\s0 Alpha Options\fR
|
11893 |
|
|
.IX Subsection "DEC Alpha Options"
|
11894 |
|
|
.PP
|
11895 |
|
|
These \fB\-m\fR options are defined for the \s-1DEC\s0 Alpha implementations:
|
11896 |
|
|
.IP "\fB\-mno\-soft\-float\fR" 4
|
11897 |
|
|
.IX Item "-mno-soft-float"
|
11898 |
|
|
.PD 0
|
11899 |
|
|
.IP "\fB\-msoft\-float\fR" 4
|
11900 |
|
|
.IX Item "-msoft-float"
|
11901 |
|
|
.PD
|
11902 |
|
|
Use (do not use) the hardware floating-point instructions for
|
11903 |
|
|
floating-point operations. When \fB\-msoft\-float\fR is specified,
|
11904 |
|
|
functions in \fIlibgcc.a\fR are used to perform floating-point
|
11905 |
|
|
operations. Unless they are replaced by routines that emulate the
|
11906 |
|
|
floating-point operations, or compiled in such a way as to call such
|
11907 |
|
|
emulations routines, these routines issue floating-point
|
11908 |
|
|
operations. If you are compiling for an Alpha without floating-point
|
11909 |
|
|
operations, you must ensure that the library is built so as not to call
|
11910 |
|
|
them.
|
11911 |
|
|
.Sp
|
11912 |
|
|
Note that Alpha implementations without floating-point operations are
|
11913 |
|
|
required to have floating-point registers.
|
11914 |
|
|
.IP "\fB\-mfp\-reg\fR" 4
|
11915 |
|
|
.IX Item "-mfp-reg"
|
11916 |
|
|
.PD 0
|
11917 |
|
|
.IP "\fB\-mno\-fp\-regs\fR" 4
|
11918 |
|
|
.IX Item "-mno-fp-regs"
|
11919 |
|
|
.PD
|
11920 |
|
|
Generate code that uses (does not use) the floating-point register set.
|
11921 |
|
|
\&\fB\-mno\-fp\-regs\fR implies \fB\-msoft\-float\fR. If the floating-point
|
11922 |
|
|
register set is not used, floating-point operands are passed in integer
|
11923 |
|
|
registers as if they were integers and floating-point results are passed
|
11924 |
|
|
in \f(CW$0\fR instead of \f(CW$f0\fR. This is a non-standard calling sequence,
|
11925 |
|
|
so any function with a floating-point argument or return value called by code
|
11926 |
|
|
compiled with \fB\-mno\-fp\-regs\fR must also be compiled with that
|
11927 |
|
|
option.
|
11928 |
|
|
.Sp
|
11929 |
|
|
A typical use of this option is building a kernel that does not use,
|
11930 |
|
|
and hence need not save and restore, any floating-point registers.
|
11931 |
|
|
.IP "\fB\-mieee\fR" 4
|
11932 |
|
|
.IX Item "-mieee"
|
11933 |
|
|
The Alpha architecture implements floating-point hardware optimized for
|
11934 |
|
|
maximum performance. It is mostly compliant with the \s-1IEEE\s0 floating-point
|
11935 |
|
|
standard. However, for full compliance, software assistance is
|
11936 |
|
|
required. This option generates code fully IEEE-compliant code
|
11937 |
|
|
\&\fIexcept\fR that the \fIinexact-flag\fR is not maintained (see below).
|
11938 |
|
|
If this option is turned on, the preprocessor macro \f(CW\*(C`_IEEE_FP\*(C'\fR is
|
11939 |
|
|
defined during compilation. The resulting code is less efficient but is
|
11940 |
|
|
able to correctly support denormalized numbers and exceptional \s-1IEEE\s0
|
11941 |
|
|
values such as not-a-number and plus/minus infinity. Other Alpha
|
11942 |
|
|
compilers call this option \fB\-ieee_with_no_inexact\fR.
|
11943 |
|
|
.IP "\fB\-mieee\-with\-inexact\fR" 4
|
11944 |
|
|
.IX Item "-mieee-with-inexact"
|
11945 |
|
|
This is like \fB\-mieee\fR except the generated code also maintains
|
11946 |
|
|
the \s-1IEEE\s0 \fIinexact-flag\fR. Turning on this option causes the
|
11947 |
|
|
generated code to implement fully-compliant \s-1IEEE\s0 math. In addition to
|
11948 |
|
|
\&\f(CW\*(C`_IEEE_FP\*(C'\fR, \f(CW\*(C`_IEEE_FP_EXACT\*(C'\fR is defined as a preprocessor
|
11949 |
|
|
macro. On some Alpha implementations the resulting code may execute
|
11950 |
|
|
significantly slower than the code generated by default. Since there is
|
11951 |
|
|
very little code that depends on the \fIinexact-flag\fR, you should
|
11952 |
|
|
normally not specify this option. Other Alpha compilers call this
|
11953 |
|
|
option \fB\-ieee_with_inexact\fR.
|
11954 |
|
|
.IP "\fB\-mfp\-trap\-mode=\fR\fItrap-mode\fR" 4
|
11955 |
|
|
.IX Item "-mfp-trap-mode=trap-mode"
|
11956 |
|
|
This option controls what floating-point related traps are enabled.
|
11957 |
|
|
Other Alpha compilers call this option \fB\-fptm\fR \fItrap-mode\fR.
|
11958 |
|
|
The trap mode can be set to one of four values:
|
11959 |
|
|
.RS 4
|
11960 |
|
|
.IP "\fBn\fR" 4
|
11961 |
|
|
.IX Item "n"
|
11962 |
|
|
This is the default (normal) setting. The only traps that are enabled
|
11963 |
|
|
are the ones that cannot be disabled in software (e.g., division by zero
|
11964 |
|
|
trap).
|
11965 |
|
|
.IP "\fBu\fR" 4
|
11966 |
|
|
.IX Item "u"
|
11967 |
|
|
In addition to the traps enabled by \fBn\fR, underflow traps are enabled
|
11968 |
|
|
as well.
|
11969 |
|
|
.IP "\fBsu\fR" 4
|
11970 |
|
|
.IX Item "su"
|
11971 |
|
|
Like \fBu\fR, but the instructions are marked to be safe for software
|
11972 |
|
|
completion (see Alpha architecture manual for details).
|
11973 |
|
|
.IP "\fBsui\fR" 4
|
11974 |
|
|
.IX Item "sui"
|
11975 |
|
|
Like \fBsu\fR, but inexact traps are enabled as well.
|
11976 |
|
|
.RE
|
11977 |
|
|
.RS 4
|
11978 |
|
|
.RE
|
11979 |
|
|
.IP "\fB\-mfp\-rounding\-mode=\fR\fIrounding-mode\fR" 4
|
11980 |
|
|
.IX Item "-mfp-rounding-mode=rounding-mode"
|
11981 |
|
|
Selects the \s-1IEEE\s0 rounding mode. Other Alpha compilers call this option
|
11982 |
|
|
\&\fB\-fprm\fR \fIrounding-mode\fR. The \fIrounding-mode\fR can be one
|
11983 |
|
|
of:
|
11984 |
|
|
.RS 4
|
11985 |
|
|
.IP "\fBn\fR" 4
|
11986 |
|
|
.IX Item "n"
|
11987 |
|
|
Normal \s-1IEEE\s0 rounding mode. Floating-point numbers are rounded towards
|
11988 |
|
|
the nearest machine number or towards the even machine number in case
|
11989 |
|
|
of a tie.
|
11990 |
|
|
.IP "\fBm\fR" 4
|
11991 |
|
|
.IX Item "m"
|
11992 |
|
|
Round towards minus infinity.
|
11993 |
|
|
.IP "\fBc\fR" 4
|
11994 |
|
|
.IX Item "c"
|
11995 |
|
|
Chopped rounding mode. Floating-point numbers are rounded towards zero.
|
11996 |
|
|
.IP "\fBd\fR" 4
|
11997 |
|
|
.IX Item "d"
|
11998 |
|
|
Dynamic rounding mode. A field in the floating-point control register
|
11999 |
|
|
(\fIfpcr\fR, see Alpha architecture reference manual) controls the
|
12000 |
|
|
rounding mode in effect. The C library initializes this register for
|
12001 |
|
|
rounding towards plus infinity. Thus, unless your program modifies the
|
12002 |
|
|
\&\fIfpcr\fR, \fBd\fR corresponds to round towards plus infinity.
|
12003 |
|
|
.RE
|
12004 |
|
|
.RS 4
|
12005 |
|
|
.RE
|
12006 |
|
|
.IP "\fB\-mtrap\-precision=\fR\fItrap-precision\fR" 4
|
12007 |
|
|
.IX Item "-mtrap-precision=trap-precision"
|
12008 |
|
|
In the Alpha architecture, floating-point traps are imprecise. This
|
12009 |
|
|
means without software assistance it is impossible to recover from a
|
12010 |
|
|
floating trap and program execution normally needs to be terminated.
|
12011 |
|
|
\&\s-1GCC\s0 can generate code that can assist operating system trap handlers
|
12012 |
|
|
in determining the exact location that caused a floating-point trap.
|
12013 |
|
|
Depending on the requirements of an application, different levels of
|
12014 |
|
|
precisions can be selected:
|
12015 |
|
|
.RS 4
|
12016 |
|
|
.IP "\fBp\fR" 4
|
12017 |
|
|
.IX Item "p"
|
12018 |
|
|
Program precision. This option is the default and means a trap handler
|
12019 |
|
|
can only identify which program caused a floating-point exception.
|
12020 |
|
|
.IP "\fBf\fR" 4
|
12021 |
|
|
.IX Item "f"
|
12022 |
|
|
Function precision. The trap handler can determine the function that
|
12023 |
|
|
caused a floating-point exception.
|
12024 |
|
|
.IP "\fBi\fR" 4
|
12025 |
|
|
.IX Item "i"
|
12026 |
|
|
Instruction precision. The trap handler can determine the exact
|
12027 |
|
|
instruction that caused a floating-point exception.
|
12028 |
|
|
.RE
|
12029 |
|
|
.RS 4
|
12030 |
|
|
.Sp
|
12031 |
|
|
Other Alpha compilers provide the equivalent options called
|
12032 |
|
|
\&\fB\-scope_safe\fR and \fB\-resumption_safe\fR.
|
12033 |
|
|
.RE
|
12034 |
|
|
.IP "\fB\-mieee\-conformant\fR" 4
|
12035 |
|
|
.IX Item "-mieee-conformant"
|
12036 |
|
|
This option marks the generated code as \s-1IEEE\s0 conformant. You must not
|
12037 |
|
|
use this option unless you also specify \fB\-mtrap\-precision=i\fR and either
|
12038 |
|
|
\&\fB\-mfp\-trap\-mode=su\fR or \fB\-mfp\-trap\-mode=sui\fR. Its only effect
|
12039 |
|
|
is to emit the line \fB.eflag 48\fR in the function prologue of the
|
12040 |
|
|
generated assembly file.
|
12041 |
|
|
.IP "\fB\-mbuild\-constants\fR" 4
|
12042 |
|
|
.IX Item "-mbuild-constants"
|
12043 |
|
|
Normally \s-1GCC\s0 examines a 32\- or 64\-bit integer constant to
|
12044 |
|
|
see if it can construct it from smaller constants in two or three
|
12045 |
|
|
instructions. If it cannot, it outputs the constant as a literal and
|
12046 |
|
|
generates code to load it from the data segment at run time.
|
12047 |
|
|
.Sp
|
12048 |
|
|
Use this option to require \s-1GCC\s0 to construct \fIall\fR integer constants
|
12049 |
|
|
using code, even if it takes more instructions (the maximum is six).
|
12050 |
|
|
.Sp
|
12051 |
|
|
You typically use this option to build a shared library dynamic
|
12052 |
|
|
loader. Itself a shared library, it must relocate itself in memory
|
12053 |
|
|
before it can find the variables and constants in its own data segment.
|
12054 |
|
|
.IP "\fB\-mbwx\fR" 4
|
12055 |
|
|
.IX Item "-mbwx"
|
12056 |
|
|
.PD 0
|
12057 |
|
|
.IP "\fB\-mno\-bwx\fR" 4
|
12058 |
|
|
.IX Item "-mno-bwx"
|
12059 |
|
|
.IP "\fB\-mcix\fR" 4
|
12060 |
|
|
.IX Item "-mcix"
|
12061 |
|
|
.IP "\fB\-mno\-cix\fR" 4
|
12062 |
|
|
.IX Item "-mno-cix"
|
12063 |
|
|
.IP "\fB\-mfix\fR" 4
|
12064 |
|
|
.IX Item "-mfix"
|
12065 |
|
|
.IP "\fB\-mno\-fix\fR" 4
|
12066 |
|
|
.IX Item "-mno-fix"
|
12067 |
|
|
.IP "\fB\-mmax\fR" 4
|
12068 |
|
|
.IX Item "-mmax"
|
12069 |
|
|
.IP "\fB\-mno\-max\fR" 4
|
12070 |
|
|
.IX Item "-mno-max"
|
12071 |
|
|
.PD
|
12072 |
|
|
Indicate whether \s-1GCC\s0 should generate code to use the optional \s-1BWX\s0,
|
12073 |
|
|
\&\s-1CIX\s0, \s-1FIX\s0 and \s-1MAX\s0 instruction sets. The default is to use the instruction
|
12074 |
|
|
sets supported by the \s-1CPU\s0 type specified via \fB\-mcpu=\fR option or that
|
12075 |
|
|
of the \s-1CPU\s0 on which \s-1GCC\s0 was built if none is specified.
|
12076 |
|
|
.IP "\fB\-mfloat\-vax\fR" 4
|
12077 |
|
|
.IX Item "-mfloat-vax"
|
12078 |
|
|
.PD 0
|
12079 |
|
|
.IP "\fB\-mfloat\-ieee\fR" 4
|
12080 |
|
|
.IX Item "-mfloat-ieee"
|
12081 |
|
|
.PD
|
12082 |
|
|
Generate code that uses (does not use) \s-1VAX\s0 F and G floating-point
|
12083 |
|
|
arithmetic instead of \s-1IEEE\s0 single and double precision.
|
12084 |
|
|
.IP "\fB\-mexplicit\-relocs\fR" 4
|
12085 |
|
|
.IX Item "-mexplicit-relocs"
|
12086 |
|
|
.PD 0
|
12087 |
|
|
.IP "\fB\-mno\-explicit\-relocs\fR" 4
|
12088 |
|
|
.IX Item "-mno-explicit-relocs"
|
12089 |
|
|
.PD
|
12090 |
|
|
Older Alpha assemblers provided no way to generate symbol relocations
|
12091 |
|
|
except via assembler macros. Use of these macros does not allow
|
12092 |
|
|
optimal instruction scheduling. \s-1GNU\s0 binutils as of version 2.12
|
12093 |
|
|
supports a new syntax that allows the compiler to explicitly mark
|
12094 |
|
|
which relocations should apply to which instructions. This option
|
12095 |
|
|
is mostly useful for debugging, as \s-1GCC\s0 detects the capabilities of
|
12096 |
|
|
the assembler when it is built and sets the default accordingly.
|
12097 |
|
|
.IP "\fB\-msmall\-data\fR" 4
|
12098 |
|
|
.IX Item "-msmall-data"
|
12099 |
|
|
.PD 0
|
12100 |
|
|
.IP "\fB\-mlarge\-data\fR" 4
|
12101 |
|
|
.IX Item "-mlarge-data"
|
12102 |
|
|
.PD
|
12103 |
|
|
When \fB\-mexplicit\-relocs\fR is in effect, static data is
|
12104 |
|
|
accessed via \fIgp-relative\fR relocations. When \fB\-msmall\-data\fR
|
12105 |
|
|
is used, objects 8 bytes long or smaller are placed in a \fIsmall data area\fR
|
12106 |
|
|
(the \f(CW\*(C`.sdata\*(C'\fR and \f(CW\*(C`.sbss\*(C'\fR sections) and are accessed via
|
12107 |
|
|
16\-bit relocations off of the \f(CW$gp\fR register. This limits the
|
12108 |
|
|
size of the small data area to 64KB, but allows the variables to be
|
12109 |
|
|
directly accessed via a single instruction.
|
12110 |
|
|
.Sp
|
12111 |
|
|
The default is \fB\-mlarge\-data\fR. With this option the data area
|
12112 |
|
|
is limited to just below 2GB. Programs that require more than 2GB of
|
12113 |
|
|
data must use \f(CW\*(C`malloc\*(C'\fR or \f(CW\*(C`mmap\*(C'\fR to allocate the data in the
|
12114 |
|
|
heap instead of in the program's data segment.
|
12115 |
|
|
.Sp
|
12116 |
|
|
When generating code for shared libraries, \fB\-fpic\fR implies
|
12117 |
|
|
\&\fB\-msmall\-data\fR and \fB\-fPIC\fR implies \fB\-mlarge\-data\fR.
|
12118 |
|
|
.IP "\fB\-msmall\-text\fR" 4
|
12119 |
|
|
.IX Item "-msmall-text"
|
12120 |
|
|
.PD 0
|
12121 |
|
|
.IP "\fB\-mlarge\-text\fR" 4
|
12122 |
|
|
.IX Item "-mlarge-text"
|
12123 |
|
|
.PD
|
12124 |
|
|
When \fB\-msmall\-text\fR is used, the compiler assumes that the
|
12125 |
|
|
code of the entire program (or shared library) fits in 4MB, and is
|
12126 |
|
|
thus reachable with a branch instruction. When \fB\-msmall\-data\fR
|
12127 |
|
|
is used, the compiler can assume that all local symbols share the
|
12128 |
|
|
same \f(CW$gp\fR value, and thus reduce the number of instructions
|
12129 |
|
|
required for a function call from 4 to 1.
|
12130 |
|
|
.Sp
|
12131 |
|
|
The default is \fB\-mlarge\-text\fR.
|
12132 |
|
|
.IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4
|
12133 |
|
|
.IX Item "-mcpu=cpu_type"
|
12134 |
|
|
Set the instruction set and instruction scheduling parameters for
|
12135 |
|
|
machine type \fIcpu_type\fR. You can specify either the \fB\s-1EV\s0\fR
|
12136 |
|
|
style name or the corresponding chip number. \s-1GCC\s0 supports scheduling
|
12137 |
|
|
parameters for the \s-1EV4\s0, \s-1EV5\s0 and \s-1EV6\s0 family of processors and
|
12138 |
|
|
chooses the default values for the instruction set from the processor
|
12139 |
|
|
you specify. If you do not specify a processor type, \s-1GCC\s0 defaults
|
12140 |
|
|
to the processor on which the compiler was built.
|
12141 |
|
|
.Sp
|
12142 |
|
|
Supported values for \fIcpu_type\fR are
|
12143 |
|
|
.RS 4
|
12144 |
|
|
.IP "\fBev4\fR" 4
|
12145 |
|
|
.IX Item "ev4"
|
12146 |
|
|
.PD 0
|
12147 |
|
|
.IP "\fBev45\fR" 4
|
12148 |
|
|
.IX Item "ev45"
|
12149 |
|
|
.IP "\fB21064\fR" 4
|
12150 |
|
|
.IX Item "21064"
|
12151 |
|
|
.PD
|
12152 |
|
|
Schedules as an \s-1EV4\s0 and has no instruction set extensions.
|
12153 |
|
|
.IP "\fBev5\fR" 4
|
12154 |
|
|
.IX Item "ev5"
|
12155 |
|
|
.PD 0
|
12156 |
|
|
.IP "\fB21164\fR" 4
|
12157 |
|
|
.IX Item "21164"
|
12158 |
|
|
.PD
|
12159 |
|
|
Schedules as an \s-1EV5\s0 and has no instruction set extensions.
|
12160 |
|
|
.IP "\fBev56\fR" 4
|
12161 |
|
|
.IX Item "ev56"
|
12162 |
|
|
.PD 0
|
12163 |
|
|
.IP "\fB21164a\fR" 4
|
12164 |
|
|
.IX Item "21164a"
|
12165 |
|
|
.PD
|
12166 |
|
|
Schedules as an \s-1EV5\s0 and supports the \s-1BWX\s0 extension.
|
12167 |
|
|
.IP "\fBpca56\fR" 4
|
12168 |
|
|
.IX Item "pca56"
|
12169 |
|
|
.PD 0
|
12170 |
|
|
.IP "\fB21164pc\fR" 4
|
12171 |
|
|
.IX Item "21164pc"
|
12172 |
|
|
.IP "\fB21164PC\fR" 4
|
12173 |
|
|
.IX Item "21164PC"
|
12174 |
|
|
.PD
|
12175 |
|
|
Schedules as an \s-1EV5\s0 and supports the \s-1BWX\s0 and \s-1MAX\s0 extensions.
|
12176 |
|
|
.IP "\fBev6\fR" 4
|
12177 |
|
|
.IX Item "ev6"
|
12178 |
|
|
.PD 0
|
12179 |
|
|
.IP "\fB21264\fR" 4
|
12180 |
|
|
.IX Item "21264"
|
12181 |
|
|
.PD
|
12182 |
|
|
Schedules as an \s-1EV6\s0 and supports the \s-1BWX\s0, \s-1FIX\s0, and \s-1MAX\s0 extensions.
|
12183 |
|
|
.IP "\fBev67\fR" 4
|
12184 |
|
|
.IX Item "ev67"
|
12185 |
|
|
.PD 0
|
12186 |
|
|
.IP "\fB21264a\fR" 4
|
12187 |
|
|
.IX Item "21264a"
|
12188 |
|
|
.PD
|
12189 |
|
|
Schedules as an \s-1EV6\s0 and supports the \s-1BWX\s0, \s-1CIX\s0, \s-1FIX\s0, and \s-1MAX\s0 extensions.
|
12190 |
|
|
.RE
|
12191 |
|
|
.RS 4
|
12192 |
|
|
.Sp
|
12193 |
|
|
Native toolchains also support the value \fBnative\fR,
|
12194 |
|
|
which selects the best architecture option for the host processor.
|
12195 |
|
|
\&\fB\-mcpu=native\fR has no effect if \s-1GCC\s0 does not recognize
|
12196 |
|
|
the processor.
|
12197 |
|
|
.RE
|
12198 |
|
|
.IP "\fB\-mtune=\fR\fIcpu_type\fR" 4
|
12199 |
|
|
.IX Item "-mtune=cpu_type"
|
12200 |
|
|
Set only the instruction scheduling parameters for machine type
|
12201 |
|
|
\&\fIcpu_type\fR. The instruction set is not changed.
|
12202 |
|
|
.Sp
|
12203 |
|
|
Native toolchains also support the value \fBnative\fR,
|
12204 |
|
|
which selects the best architecture option for the host processor.
|
12205 |
|
|
\&\fB\-mtune=native\fR has no effect if \s-1GCC\s0 does not recognize
|
12206 |
|
|
the processor.
|
12207 |
|
|
.IP "\fB\-mmemory\-latency=\fR\fItime\fR" 4
|
12208 |
|
|
.IX Item "-mmemory-latency=time"
|
12209 |
|
|
Sets the latency the scheduler should assume for typical memory
|
12210 |
|
|
references as seen by the application. This number is highly
|
12211 |
|
|
dependent on the memory access patterns used by the application
|
12212 |
|
|
and the size of the external cache on the machine.
|
12213 |
|
|
.Sp
|
12214 |
|
|
Valid options for \fItime\fR are
|
12215 |
|
|
.RS 4
|
12216 |
|
|
.IP "\fInumber\fR" 4
|
12217 |
|
|
.IX Item "number"
|
12218 |
|
|
A decimal number representing clock cycles.
|
12219 |
|
|
.IP "\fBL1\fR" 4
|
12220 |
|
|
.IX Item "L1"
|
12221 |
|
|
.PD 0
|
12222 |
|
|
.IP "\fBL2\fR" 4
|
12223 |
|
|
.IX Item "L2"
|
12224 |
|
|
.IP "\fBL3\fR" 4
|
12225 |
|
|
.IX Item "L3"
|
12226 |
|
|
.IP "\fBmain\fR" 4
|
12227 |
|
|
.IX Item "main"
|
12228 |
|
|
.PD
|
12229 |
|
|
The compiler contains estimates of the number of clock cycles for
|
12230 |
|
|
\&\*(L"typical\*(R" \s-1EV4\s0 & \s-1EV5\s0 hardware for the Level 1, 2 & 3 caches
|
12231 |
|
|
(also called Dcache, Scache, and Bcache), as well as to main memory.
|
12232 |
|
|
Note that L3 is only valid for \s-1EV5\s0.
|
12233 |
|
|
.RE
|
12234 |
|
|
.RS 4
|
12235 |
|
|
.RE
|
12236 |
|
|
.PP
|
12237 |
|
|
\fI\s-1FR30\s0 Options\fR
|
12238 |
|
|
.IX Subsection "FR30 Options"
|
12239 |
|
|
.PP
|
12240 |
|
|
These options are defined specifically for the \s-1FR30\s0 port.
|
12241 |
|
|
.IP "\fB\-msmall\-model\fR" 4
|
12242 |
|
|
.IX Item "-msmall-model"
|
12243 |
|
|
Use the small address space model. This can produce smaller code, but
|
12244 |
|
|
it does assume that all symbolic values and addresses fit into a
|
12245 |
|
|
20\-bit range.
|
12246 |
|
|
.IP "\fB\-mno\-lsim\fR" 4
|
12247 |
|
|
.IX Item "-mno-lsim"
|
12248 |
|
|
Assume that runtime support has been provided and so there is no need
|
12249 |
|
|
to include the simulator library (\fIlibsim.a\fR) on the linker
|
12250 |
|
|
command line.
|
12251 |
|
|
.PP
|
12252 |
|
|
\fI\s-1FRV\s0 Options\fR
|
12253 |
|
|
.IX Subsection "FRV Options"
|
12254 |
|
|
.IP "\fB\-mgpr\-32\fR" 4
|
12255 |
|
|
.IX Item "-mgpr-32"
|
12256 |
|
|
Only use the first 32 general-purpose registers.
|
12257 |
|
|
.IP "\fB\-mgpr\-64\fR" 4
|
12258 |
|
|
.IX Item "-mgpr-64"
|
12259 |
|
|
Use all 64 general-purpose registers.
|
12260 |
|
|
.IP "\fB\-mfpr\-32\fR" 4
|
12261 |
|
|
.IX Item "-mfpr-32"
|
12262 |
|
|
Use only the first 32 floating-point registers.
|
12263 |
|
|
.IP "\fB\-mfpr\-64\fR" 4
|
12264 |
|
|
.IX Item "-mfpr-64"
|
12265 |
|
|
Use all 64 floating-point registers.
|
12266 |
|
|
.IP "\fB\-mhard\-float\fR" 4
|
12267 |
|
|
.IX Item "-mhard-float"
|
12268 |
|
|
Use hardware instructions for floating-point operations.
|
12269 |
|
|
.IP "\fB\-msoft\-float\fR" 4
|
12270 |
|
|
.IX Item "-msoft-float"
|
12271 |
|
|
Use library routines for floating-point operations.
|
12272 |
|
|
.IP "\fB\-malloc\-cc\fR" 4
|
12273 |
|
|
.IX Item "-malloc-cc"
|
12274 |
|
|
Dynamically allocate condition code registers.
|
12275 |
|
|
.IP "\fB\-mfixed\-cc\fR" 4
|
12276 |
|
|
.IX Item "-mfixed-cc"
|
12277 |
|
|
Do not try to dynamically allocate condition code registers, only
|
12278 |
|
|
use \f(CW\*(C`icc0\*(C'\fR and \f(CW\*(C`fcc0\*(C'\fR.
|
12279 |
|
|
.IP "\fB\-mdword\fR" 4
|
12280 |
|
|
.IX Item "-mdword"
|
12281 |
|
|
Change \s-1ABI\s0 to use double word insns.
|
12282 |
|
|
.IP "\fB\-mno\-dword\fR" 4
|
12283 |
|
|
.IX Item "-mno-dword"
|
12284 |
|
|
Do not use double word instructions.
|
12285 |
|
|
.IP "\fB\-mdouble\fR" 4
|
12286 |
|
|
.IX Item "-mdouble"
|
12287 |
|
|
Use floating-point double instructions.
|
12288 |
|
|
.IP "\fB\-mno\-double\fR" 4
|
12289 |
|
|
.IX Item "-mno-double"
|
12290 |
|
|
Do not use floating-point double instructions.
|
12291 |
|
|
.IP "\fB\-mmedia\fR" 4
|
12292 |
|
|
.IX Item "-mmedia"
|
12293 |
|
|
Use media instructions.
|
12294 |
|
|
.IP "\fB\-mno\-media\fR" 4
|
12295 |
|
|
.IX Item "-mno-media"
|
12296 |
|
|
Do not use media instructions.
|
12297 |
|
|
.IP "\fB\-mmuladd\fR" 4
|
12298 |
|
|
.IX Item "-mmuladd"
|
12299 |
|
|
Use multiply and add/subtract instructions.
|
12300 |
|
|
.IP "\fB\-mno\-muladd\fR" 4
|
12301 |
|
|
.IX Item "-mno-muladd"
|
12302 |
|
|
Do not use multiply and add/subtract instructions.
|
12303 |
|
|
.IP "\fB\-mfdpic\fR" 4
|
12304 |
|
|
.IX Item "-mfdpic"
|
12305 |
|
|
Select the \s-1FDPIC\s0 \s-1ABI\s0, which uses function descriptors to represent
|
12306 |
|
|
pointers to functions. Without any PIC/PIE\-related options, it
|
12307 |
|
|
implies \fB\-fPIE\fR. With \fB\-fpic\fR or \fB\-fpie\fR, it
|
12308 |
|
|
assumes \s-1GOT\s0 entries and small data are within a 12\-bit range from the
|
12309 |
|
|
\&\s-1GOT\s0 base address; with \fB\-fPIC\fR or \fB\-fPIE\fR, \s-1GOT\s0 offsets
|
12310 |
|
|
are computed with 32 bits.
|
12311 |
|
|
With a \fBbfin-elf\fR target, this option implies \fB\-msim\fR.
|
12312 |
|
|
.IP "\fB\-minline\-plt\fR" 4
|
12313 |
|
|
.IX Item "-minline-plt"
|
12314 |
|
|
Enable inlining of \s-1PLT\s0 entries in function calls to functions that are
|
12315 |
|
|
not known to bind locally. It has no effect without \fB\-mfdpic\fR.
|
12316 |
|
|
It's enabled by default if optimizing for speed and compiling for
|
12317 |
|
|
shared libraries (i.e., \fB\-fPIC\fR or \fB\-fpic\fR), or when an
|
12318 |
|
|
optimization option such as \fB\-O3\fR or above is present in the
|
12319 |
|
|
command line.
|
12320 |
|
|
.IP "\fB\-mTLS\fR" 4
|
12321 |
|
|
.IX Item "-mTLS"
|
12322 |
|
|
Assume a large \s-1TLS\s0 segment when generating thread-local code.
|
12323 |
|
|
.IP "\fB\-mtls\fR" 4
|
12324 |
|
|
.IX Item "-mtls"
|
12325 |
|
|
Do not assume a large \s-1TLS\s0 segment when generating thread-local code.
|
12326 |
|
|
.IP "\fB\-mgprel\-ro\fR" 4
|
12327 |
|
|
.IX Item "-mgprel-ro"
|
12328 |
|
|
Enable the use of \f(CW\*(C`GPREL\*(C'\fR relocations in the \s-1FDPIC\s0 \s-1ABI\s0 for data
|
12329 |
|
|
that is known to be in read-only sections. It's enabled by default,
|
12330 |
|
|
except for \fB\-fpic\fR or \fB\-fpie\fR: even though it may help
|
12331 |
|
|
make the global offset table smaller, it trades 1 instruction for 4.
|
12332 |
|
|
With \fB\-fPIC\fR or \fB\-fPIE\fR, it trades 3 instructions for 4,
|
12333 |
|
|
one of which may be shared by multiple symbols, and it avoids the need
|
12334 |
|
|
for a \s-1GOT\s0 entry for the referenced symbol, so it's more likely to be a
|
12335 |
|
|
win. If it is not, \fB\-mno\-gprel\-ro\fR can be used to disable it.
|
12336 |
|
|
.IP "\fB\-multilib\-library\-pic\fR" 4
|
12337 |
|
|
.IX Item "-multilib-library-pic"
|
12338 |
|
|
Link with the (library, not \s-1FD\s0) pic libraries. It's implied by
|
12339 |
|
|
\&\fB\-mlibrary\-pic\fR, as well as by \fB\-fPIC\fR and
|
12340 |
|
|
\&\fB\-fpic\fR without \fB\-mfdpic\fR. You should never have to use
|
12341 |
|
|
it explicitly.
|
12342 |
|
|
.IP "\fB\-mlinked\-fp\fR" 4
|
12343 |
|
|
.IX Item "-mlinked-fp"
|
12344 |
|
|
Follow the \s-1EABI\s0 requirement of always creating a frame pointer whenever
|
12345 |
|
|
a stack frame is allocated. This option is enabled by default and can
|
12346 |
|
|
be disabled with \fB\-mno\-linked\-fp\fR.
|
12347 |
|
|
.IP "\fB\-mlong\-calls\fR" 4
|
12348 |
|
|
.IX Item "-mlong-calls"
|
12349 |
|
|
Use indirect addressing to call functions outside the current
|
12350 |
|
|
compilation unit. This allows the functions to be placed anywhere
|
12351 |
|
|
within the 32\-bit address space.
|
12352 |
|
|
.IP "\fB\-malign\-labels\fR" 4
|
12353 |
|
|
.IX Item "-malign-labels"
|
12354 |
|
|
Try to align labels to an 8\-byte boundary by inserting NOPs into the
|
12355 |
|
|
previous packet. This option only has an effect when \s-1VLIW\s0 packing
|
12356 |
|
|
is enabled. It doesn't create new packets; it merely adds NOPs to
|
12357 |
|
|
existing ones.
|
12358 |
|
|
.IP "\fB\-mlibrary\-pic\fR" 4
|
12359 |
|
|
.IX Item "-mlibrary-pic"
|
12360 |
|
|
Generate position-independent \s-1EABI\s0 code.
|
12361 |
|
|
.IP "\fB\-macc\-4\fR" 4
|
12362 |
|
|
.IX Item "-macc-4"
|
12363 |
|
|
Use only the first four media accumulator registers.
|
12364 |
|
|
.IP "\fB\-macc\-8\fR" 4
|
12365 |
|
|
.IX Item "-macc-8"
|
12366 |
|
|
Use all eight media accumulator registers.
|
12367 |
|
|
.IP "\fB\-mpack\fR" 4
|
12368 |
|
|
.IX Item "-mpack"
|
12369 |
|
|
Pack \s-1VLIW\s0 instructions.
|
12370 |
|
|
.IP "\fB\-mno\-pack\fR" 4
|
12371 |
|
|
.IX Item "-mno-pack"
|
12372 |
|
|
Do not pack \s-1VLIW\s0 instructions.
|
12373 |
|
|
.IP "\fB\-mno\-eflags\fR" 4
|
12374 |
|
|
.IX Item "-mno-eflags"
|
12375 |
|
|
Do not mark \s-1ABI\s0 switches in e_flags.
|
12376 |
|
|
.IP "\fB\-mcond\-move\fR" 4
|
12377 |
|
|
.IX Item "-mcond-move"
|
12378 |
|
|
Enable the use of conditional-move instructions (default).
|
12379 |
|
|
.Sp
|
12380 |
|
|
This switch is mainly for debugging the compiler and will likely be removed
|
12381 |
|
|
in a future version.
|
12382 |
|
|
.IP "\fB\-mno\-cond\-move\fR" 4
|
12383 |
|
|
.IX Item "-mno-cond-move"
|
12384 |
|
|
Disable the use of conditional-move instructions.
|
12385 |
|
|
.Sp
|
12386 |
|
|
This switch is mainly for debugging the compiler and will likely be removed
|
12387 |
|
|
in a future version.
|
12388 |
|
|
.IP "\fB\-mscc\fR" 4
|
12389 |
|
|
.IX Item "-mscc"
|
12390 |
|
|
Enable the use of conditional set instructions (default).
|
12391 |
|
|
.Sp
|
12392 |
|
|
This switch is mainly for debugging the compiler and will likely be removed
|
12393 |
|
|
in a future version.
|
12394 |
|
|
.IP "\fB\-mno\-scc\fR" 4
|
12395 |
|
|
.IX Item "-mno-scc"
|
12396 |
|
|
Disable the use of conditional set instructions.
|
12397 |
|
|
.Sp
|
12398 |
|
|
This switch is mainly for debugging the compiler and will likely be removed
|
12399 |
|
|
in a future version.
|
12400 |
|
|
.IP "\fB\-mcond\-exec\fR" 4
|
12401 |
|
|
.IX Item "-mcond-exec"
|
12402 |
|
|
Enable the use of conditional execution (default).
|
12403 |
|
|
.Sp
|
12404 |
|
|
This switch is mainly for debugging the compiler and will likely be removed
|
12405 |
|
|
in a future version.
|
12406 |
|
|
.IP "\fB\-mno\-cond\-exec\fR" 4
|
12407 |
|
|
.IX Item "-mno-cond-exec"
|
12408 |
|
|
Disable the use of conditional execution.
|
12409 |
|
|
.Sp
|
12410 |
|
|
This switch is mainly for debugging the compiler and will likely be removed
|
12411 |
|
|
in a future version.
|
12412 |
|
|
.IP "\fB\-mvliw\-branch\fR" 4
|
12413 |
|
|
.IX Item "-mvliw-branch"
|
12414 |
|
|
Run a pass to pack branches into \s-1VLIW\s0 instructions (default).
|
12415 |
|
|
.Sp
|
12416 |
|
|
This switch is mainly for debugging the compiler and will likely be removed
|
12417 |
|
|
in a future version.
|
12418 |
|
|
.IP "\fB\-mno\-vliw\-branch\fR" 4
|
12419 |
|
|
.IX Item "-mno-vliw-branch"
|
12420 |
|
|
Do not run a pass to pack branches into \s-1VLIW\s0 instructions.
|
12421 |
|
|
.Sp
|
12422 |
|
|
This switch is mainly for debugging the compiler and will likely be removed
|
12423 |
|
|
in a future version.
|
12424 |
|
|
.IP "\fB\-mmulti\-cond\-exec\fR" 4
|
12425 |
|
|
.IX Item "-mmulti-cond-exec"
|
12426 |
|
|
Enable optimization of \f(CW\*(C`&&\*(C'\fR and \f(CW\*(C`||\*(C'\fR in conditional execution
|
12427 |
|
|
(default).
|
12428 |
|
|
.Sp
|
12429 |
|
|
This switch is mainly for debugging the compiler and will likely be removed
|
12430 |
|
|
in a future version.
|
12431 |
|
|
.IP "\fB\-mno\-multi\-cond\-exec\fR" 4
|
12432 |
|
|
.IX Item "-mno-multi-cond-exec"
|
12433 |
|
|
Disable optimization of \f(CW\*(C`&&\*(C'\fR and \f(CW\*(C`||\*(C'\fR in conditional execution.
|
12434 |
|
|
.Sp
|
12435 |
|
|
This switch is mainly for debugging the compiler and will likely be removed
|
12436 |
|
|
in a future version.
|
12437 |
|
|
.IP "\fB\-mnested\-cond\-exec\fR" 4
|
12438 |
|
|
.IX Item "-mnested-cond-exec"
|
12439 |
|
|
Enable nested conditional execution optimizations (default).
|
12440 |
|
|
.Sp
|
12441 |
|
|
This switch is mainly for debugging the compiler and will likely be removed
|
12442 |
|
|
in a future version.
|
12443 |
|
|
.IP "\fB\-mno\-nested\-cond\-exec\fR" 4
|
12444 |
|
|
.IX Item "-mno-nested-cond-exec"
|
12445 |
|
|
Disable nested conditional execution optimizations.
|
12446 |
|
|
.Sp
|
12447 |
|
|
This switch is mainly for debugging the compiler and will likely be removed
|
12448 |
|
|
in a future version.
|
12449 |
|
|
.IP "\fB\-moptimize\-membar\fR" 4
|
12450 |
|
|
.IX Item "-moptimize-membar"
|
12451 |
|
|
This switch removes redundant \f(CW\*(C`membar\*(C'\fR instructions from the
|
12452 |
|
|
compiler-generated code. It is enabled by default.
|
12453 |
|
|
.IP "\fB\-mno\-optimize\-membar\fR" 4
|
12454 |
|
|
.IX Item "-mno-optimize-membar"
|
12455 |
|
|
This switch disables the automatic removal of redundant \f(CW\*(C`membar\*(C'\fR
|
12456 |
|
|
instructions from the generated code.
|
12457 |
|
|
.IP "\fB\-mtomcat\-stats\fR" 4
|
12458 |
|
|
.IX Item "-mtomcat-stats"
|
12459 |
|
|
Cause gas to print out tomcat statistics.
|
12460 |
|
|
.IP "\fB\-mcpu=\fR\fIcpu\fR" 4
|
12461 |
|
|
.IX Item "-mcpu=cpu"
|
12462 |
|
|
Select the processor type for which to generate code. Possible values are
|
12463 |
|
|
\&\fBfrv\fR, \fBfr550\fR, \fBtomcat\fR, \fBfr500\fR, \fBfr450\fR,
|
12464 |
|
|
\&\fBfr405\fR, \fBfr400\fR, \fBfr300\fR and \fBsimple\fR.
|
12465 |
|
|
.PP
|
12466 |
|
|
\fIGNU/Linux Options\fR
|
12467 |
|
|
.IX Subsection "GNU/Linux Options"
|
12468 |
|
|
.PP
|
12469 |
|
|
These \fB\-m\fR options are defined for GNU/Linux targets:
|
12470 |
|
|
.IP "\fB\-mglibc\fR" 4
|
12471 |
|
|
.IX Item "-mglibc"
|
12472 |
|
|
Use the \s-1GNU\s0 C library. This is the default except
|
12473 |
|
|
on \fB*\-*\-linux\-*uclibc*\fR and \fB*\-*\-linux\-*android*\fR targets.
|
12474 |
|
|
.IP "\fB\-muclibc\fR" 4
|
12475 |
|
|
.IX Item "-muclibc"
|
12476 |
|
|
Use uClibc C library. This is the default on
|
12477 |
|
|
\&\fB*\-*\-linux\-*uclibc*\fR targets.
|
12478 |
|
|
.IP "\fB\-mbionic\fR" 4
|
12479 |
|
|
.IX Item "-mbionic"
|
12480 |
|
|
Use Bionic C library. This is the default on
|
12481 |
|
|
\&\fB*\-*\-linux\-*android*\fR targets.
|
12482 |
|
|
.IP "\fB\-mandroid\fR" 4
|
12483 |
|
|
.IX Item "-mandroid"
|
12484 |
|
|
Compile code compatible with Android platform. This is the default on
|
12485 |
|
|
\&\fB*\-*\-linux\-*android*\fR targets.
|
12486 |
|
|
.Sp
|
12487 |
|
|
When compiling, this option enables \fB\-mbionic\fR, \fB\-fPIC\fR,
|
12488 |
|
|
\&\fB\-fno\-exceptions\fR and \fB\-fno\-rtti\fR by default. When linking,
|
12489 |
|
|
this option makes the \s-1GCC\s0 driver pass Android-specific options to the linker.
|
12490 |
|
|
Finally, this option causes the preprocessor macro \f(CW\*(C`_\|_ANDROID_\|_\*(C'\fR
|
12491 |
|
|
to be defined.
|
12492 |
|
|
.IP "\fB\-tno\-android\-cc\fR" 4
|
12493 |
|
|
.IX Item "-tno-android-cc"
|
12494 |
|
|
Disable compilation effects of \fB\-mandroid\fR, i.e., do not enable
|
12495 |
|
|
\&\fB\-mbionic\fR, \fB\-fPIC\fR, \fB\-fno\-exceptions\fR and
|
12496 |
|
|
\&\fB\-fno\-rtti\fR by default.
|
12497 |
|
|
.IP "\fB\-tno\-android\-ld\fR" 4
|
12498 |
|
|
.IX Item "-tno-android-ld"
|
12499 |
|
|
Disable linking effects of \fB\-mandroid\fR, i.e., pass standard Linux
|
12500 |
|
|
linking options to the linker.
|
12501 |
|
|
.PP
|
12502 |
|
|
\fIH8/300 Options\fR
|
12503 |
|
|
.IX Subsection "H8/300 Options"
|
12504 |
|
|
.PP
|
12505 |
|
|
These \fB\-m\fR options are defined for the H8/300 implementations:
|
12506 |
|
|
.IP "\fB\-mrelax\fR" 4
|
12507 |
|
|
.IX Item "-mrelax"
|
12508 |
|
|
Shorten some address references at link time, when possible; uses the
|
12509 |
|
|
linker option \fB\-relax\fR.
|
12510 |
|
|
.IP "\fB\-mh\fR" 4
|
12511 |
|
|
.IX Item "-mh"
|
12512 |
|
|
Generate code for the H8/300H.
|
12513 |
|
|
.IP "\fB\-ms\fR" 4
|
12514 |
|
|
.IX Item "-ms"
|
12515 |
|
|
Generate code for the H8S.
|
12516 |
|
|
.IP "\fB\-mn\fR" 4
|
12517 |
|
|
.IX Item "-mn"
|
12518 |
|
|
Generate code for the H8S and H8/300H in the normal mode. This switch
|
12519 |
|
|
must be used either with \fB\-mh\fR or \fB\-ms\fR.
|
12520 |
|
|
.IP "\fB\-ms2600\fR" 4
|
12521 |
|
|
.IX Item "-ms2600"
|
12522 |
|
|
Generate code for the H8S/2600. This switch must be used with \fB\-ms\fR.
|
12523 |
|
|
.IP "\fB\-mexr\fR" 4
|
12524 |
|
|
.IX Item "-mexr"
|
12525 |
|
|
Extended registers are stored on stack before execution of function
|
12526 |
|
|
with monitor attribute. Default option is \fB\-mexr\fR.
|
12527 |
|
|
This option is valid only for H8S targets.
|
12528 |
|
|
.IP "\fB\-mno\-exr\fR" 4
|
12529 |
|
|
.IX Item "-mno-exr"
|
12530 |
|
|
Extended registers are not stored on stack before execution of function
|
12531 |
|
|
with monitor attribute. Default option is \fB\-mno\-exr\fR.
|
12532 |
|
|
This option is valid only for H8S targets.
|
12533 |
|
|
.IP "\fB\-mint32\fR" 4
|
12534 |
|
|
.IX Item "-mint32"
|
12535 |
|
|
Make \f(CW\*(C`int\*(C'\fR data 32 bits by default.
|
12536 |
|
|
.IP "\fB\-malign\-300\fR" 4
|
12537 |
|
|
.IX Item "-malign-300"
|
12538 |
|
|
On the H8/300H and H8S, use the same alignment rules as for the H8/300.
|
12539 |
|
|
The default for the H8/300H and H8S is to align longs and floats on
|
12540 |
|
|
4\-byte boundaries.
|
12541 |
|
|
\&\fB\-malign\-300\fR causes them to be aligned on 2\-byte boundaries.
|
12542 |
|
|
This option has no effect on the H8/300.
|
12543 |
|
|
.PP
|
12544 |
|
|
\fI\s-1HPPA\s0 Options\fR
|
12545 |
|
|
.IX Subsection "HPPA Options"
|
12546 |
|
|
.PP
|
12547 |
|
|
These \fB\-m\fR options are defined for the \s-1HPPA\s0 family of computers:
|
12548 |
|
|
.IP "\fB\-march=\fR\fIarchitecture-type\fR" 4
|
12549 |
|
|
.IX Item "-march=architecture-type"
|
12550 |
|
|
Generate code for the specified architecture. The choices for
|
12551 |
|
|
\&\fIarchitecture-type\fR are \fB1.0\fR for \s-1PA\s0 1.0, \fB1.1\fR for \s-1PA\s0
|
12552 |
|
|
1.1, and \fB2.0\fR for \s-1PA\s0 2.0 processors. Refer to
|
12553 |
|
|
\&\fI/usr/lib/sched.models\fR on an HP-UX system to determine the proper
|
12554 |
|
|
architecture option for your machine. Code compiled for lower numbered
|
12555 |
|
|
architectures runs on higher numbered architectures, but not the
|
12556 |
|
|
other way around.
|
12557 |
|
|
.IP "\fB\-mpa\-risc\-1\-0\fR" 4
|
12558 |
|
|
.IX Item "-mpa-risc-1-0"
|
12559 |
|
|
.PD 0
|
12560 |
|
|
.IP "\fB\-mpa\-risc\-1\-1\fR" 4
|
12561 |
|
|
.IX Item "-mpa-risc-1-1"
|
12562 |
|
|
.IP "\fB\-mpa\-risc\-2\-0\fR" 4
|
12563 |
|
|
.IX Item "-mpa-risc-2-0"
|
12564 |
|
|
.PD
|
12565 |
|
|
Synonyms for \fB\-march=1.0\fR, \fB\-march=1.1\fR, and \fB\-march=2.0\fR respectively.
|
12566 |
|
|
.IP "\fB\-mbig\-switch\fR" 4
|
12567 |
|
|
.IX Item "-mbig-switch"
|
12568 |
|
|
Generate code suitable for big switch tables. Use this option only if
|
12569 |
|
|
the assembler/linker complain about out-of-range branches within a switch
|
12570 |
|
|
table.
|
12571 |
|
|
.IP "\fB\-mjump\-in\-delay\fR" 4
|
12572 |
|
|
.IX Item "-mjump-in-delay"
|
12573 |
|
|
Fill delay slots of function calls with unconditional jump instructions
|
12574 |
|
|
by modifying the return pointer for the function call to be the target
|
12575 |
|
|
of the conditional jump.
|
12576 |
|
|
.IP "\fB\-mdisable\-fpregs\fR" 4
|
12577 |
|
|
.IX Item "-mdisable-fpregs"
|
12578 |
|
|
Prevent floating-point registers from being used in any manner. This is
|
12579 |
|
|
necessary for compiling kernels that perform lazy context switching of
|
12580 |
|
|
floating-point registers. If you use this option and attempt to perform
|
12581 |
|
|
floating-point operations, the compiler aborts.
|
12582 |
|
|
.IP "\fB\-mdisable\-indexing\fR" 4
|
12583 |
|
|
.IX Item "-mdisable-indexing"
|
12584 |
|
|
Prevent the compiler from using indexing address modes. This avoids some
|
12585 |
|
|
rather obscure problems when compiling \s-1MIG\s0 generated code under \s-1MACH\s0.
|
12586 |
|
|
.IP "\fB\-mno\-space\-regs\fR" 4
|
12587 |
|
|
.IX Item "-mno-space-regs"
|
12588 |
|
|
Generate code that assumes the target has no space registers. This allows
|
12589 |
|
|
\&\s-1GCC\s0 to generate faster indirect calls and use unscaled index address modes.
|
12590 |
|
|
.Sp
|
12591 |
|
|
Such code is suitable for level 0 \s-1PA\s0 systems and kernels.
|
12592 |
|
|
.IP "\fB\-mfast\-indirect\-calls\fR" 4
|
12593 |
|
|
.IX Item "-mfast-indirect-calls"
|
12594 |
|
|
Generate code that assumes calls never cross space boundaries. This
|
12595 |
|
|
allows \s-1GCC\s0 to emit code that performs faster indirect calls.
|
12596 |
|
|
.Sp
|
12597 |
|
|
This option does not work in the presence of shared libraries or nested
|
12598 |
|
|
functions.
|
12599 |
|
|
.IP "\fB\-mfixed\-range=\fR\fIregister-range\fR" 4
|
12600 |
|
|
.IX Item "-mfixed-range=register-range"
|
12601 |
|
|
Generate code treating the given register range as fixed registers.
|
12602 |
|
|
A fixed register is one that the register allocator cannot use. This is
|
12603 |
|
|
useful when compiling kernel code. A register range is specified as
|
12604 |
|
|
two registers separated by a dash. Multiple register ranges can be
|
12605 |
|
|
specified separated by a comma.
|
12606 |
|
|
.IP "\fB\-mlong\-load\-store\fR" 4
|
12607 |
|
|
.IX Item "-mlong-load-store"
|
12608 |
|
|
Generate 3\-instruction load and store sequences as sometimes required by
|
12609 |
|
|
the HP-UX 10 linker. This is equivalent to the \fB+k\fR option to
|
12610 |
|
|
the \s-1HP\s0 compilers.
|
12611 |
|
|
.IP "\fB\-mportable\-runtime\fR" 4
|
12612 |
|
|
.IX Item "-mportable-runtime"
|
12613 |
|
|
Use the portable calling conventions proposed by \s-1HP\s0 for \s-1ELF\s0 systems.
|
12614 |
|
|
.IP "\fB\-mgas\fR" 4
|
12615 |
|
|
.IX Item "-mgas"
|
12616 |
|
|
Enable the use of assembler directives only \s-1GAS\s0 understands.
|
12617 |
|
|
.IP "\fB\-mschedule=\fR\fIcpu-type\fR" 4
|
12618 |
|
|
.IX Item "-mschedule=cpu-type"
|
12619 |
|
|
Schedule code according to the constraints for the machine type
|
12620 |
|
|
\&\fIcpu-type\fR. The choices for \fIcpu-type\fR are \fB700\fR
|
12621 |
|
|
\&\fB7100\fR, \fB7100LC\fR, \fB7200\fR, \fB7300\fR and \fB8000\fR. Refer
|
12622 |
|
|
to \fI/usr/lib/sched.models\fR on an HP-UX system to determine the
|
12623 |
|
|
proper scheduling option for your machine. The default scheduling is
|
12624 |
|
|
\&\fB8000\fR.
|
12625 |
|
|
.IP "\fB\-mlinker\-opt\fR" 4
|
12626 |
|
|
.IX Item "-mlinker-opt"
|
12627 |
|
|
Enable the optimization pass in the HP-UX linker. Note this makes symbolic
|
12628 |
|
|
debugging impossible. It also triggers a bug in the HP-UX 8 and HP-UX 9
|
12629 |
|
|
linkers in which they give bogus error messages when linking some programs.
|
12630 |
|
|
.IP "\fB\-msoft\-float\fR" 4
|
12631 |
|
|
.IX Item "-msoft-float"
|
12632 |
|
|
Generate output containing library calls for floating point.
|
12633 |
|
|
\&\fBWarning:\fR the requisite libraries are not available for all \s-1HPPA\s0
|
12634 |
|
|
targets. Normally the facilities of the machine's usual C compiler are
|
12635 |
|
|
used, but this cannot be done directly in cross-compilation. You must make
|
12636 |
|
|
your own arrangements to provide suitable library functions for
|
12637 |
|
|
cross-compilation.
|
12638 |
|
|
.Sp
|
12639 |
|
|
\&\fB\-msoft\-float\fR changes the calling convention in the output file;
|
12640 |
|
|
therefore, it is only useful if you compile \fIall\fR of a program with
|
12641 |
|
|
this option. In particular, you need to compile \fIlibgcc.a\fR, the
|
12642 |
|
|
library that comes with \s-1GCC\s0, with \fB\-msoft\-float\fR in order for
|
12643 |
|
|
this to work.
|
12644 |
|
|
.IP "\fB\-msio\fR" 4
|
12645 |
|
|
.IX Item "-msio"
|
12646 |
|
|
Generate the predefine, \f(CW\*(C`_SIO\*(C'\fR, for server \s-1IO\s0. The default is
|
12647 |
|
|
\&\fB\-mwsio\fR. This generates the predefines, \f(CW\*(C`_\|_hp9000s700\*(C'\fR,
|
12648 |
|
|
\&\f(CW\*(C`_\|_hp9000s700_\|_\*(C'\fR and \f(CW\*(C`_WSIO\*(C'\fR, for workstation \s-1IO\s0. These
|
12649 |
|
|
options are available under HP-UX and HI-UX.
|
12650 |
|
|
.IP "\fB\-mgnu\-ld\fR" 4
|
12651 |
|
|
.IX Item "-mgnu-ld"
|
12652 |
|
|
Use options specific to \s-1GNU\s0 \fBld\fR.
|
12653 |
|
|
This passes \fB\-shared\fR to \fBld\fR when
|
12654 |
|
|
building a shared library. It is the default when \s-1GCC\s0 is configured,
|
12655 |
|
|
explicitly or implicitly, with the \s-1GNU\s0 linker. This option does not
|
12656 |
|
|
affect which \fBld\fR is called; it only changes what parameters
|
12657 |
|
|
are passed to that \fBld\fR.
|
12658 |
|
|
The \fBld\fR that is called is determined by the
|
12659 |
|
|
\&\fB\-\-with\-ld\fR configure option, \s-1GCC\s0's program search path, and
|
12660 |
|
|
finally by the user's \fB\s-1PATH\s0\fR. The linker used by \s-1GCC\s0 can be printed
|
12661 |
|
|
using \fBwhich `gcc \-print\-prog\-name=ld`\fR. This option is only available
|
12662 |
|
|
on the 64\-bit HP-UX \s-1GCC\s0, i.e. configured with \fBhppa*64*\-*\-hpux*\fR.
|
12663 |
|
|
.IP "\fB\-mhp\-ld\fR" 4
|
12664 |
|
|
.IX Item "-mhp-ld"
|
12665 |
|
|
Use options specific to \s-1HP\s0 \fBld\fR.
|
12666 |
|
|
This passes \fB\-b\fR to \fBld\fR when building
|
12667 |
|
|
a shared library and passes \fB+Accept TypeMismatch\fR to \fBld\fR on all
|
12668 |
|
|
links. It is the default when \s-1GCC\s0 is configured, explicitly or
|
12669 |
|
|
implicitly, with the \s-1HP\s0 linker. This option does not affect
|
12670 |
|
|
which \fBld\fR is called; it only changes what parameters are passed to that
|
12671 |
|
|
\&\fBld\fR.
|
12672 |
|
|
The \fBld\fR that is called is determined by the \fB\-\-with\-ld\fR
|
12673 |
|
|
configure option, \s-1GCC\s0's program search path, and finally by the user's
|
12674 |
|
|
\&\fB\s-1PATH\s0\fR. The linker used by \s-1GCC\s0 can be printed using \fBwhich
|
12675 |
|
|
`gcc \-print\-prog\-name=ld`\fR. This option is only available on the 64\-bit
|
12676 |
|
|
HP-UX \s-1GCC\s0, i.e. configured with \fBhppa*64*\-*\-hpux*\fR.
|
12677 |
|
|
.IP "\fB\-mlong\-calls\fR" 4
|
12678 |
|
|
.IX Item "-mlong-calls"
|
12679 |
|
|
Generate code that uses long call sequences. This ensures that a call
|
12680 |
|
|
is always able to reach linker generated stubs. The default is to generate
|
12681 |
|
|
long calls only when the distance from the call site to the beginning
|
12682 |
|
|
of the function or translation unit, as the case may be, exceeds a
|
12683 |
|
|
predefined limit set by the branch type being used. The limits for
|
12684 |
|
|
normal calls are 7,600,000 and 240,000 bytes, respectively for the
|
12685 |
|
|
\&\s-1PA\s0 2.0 and \s-1PA\s0 1.X architectures. Sibcalls are always limited at
|
12686 |
|
|
240,000 bytes.
|
12687 |
|
|
.Sp
|
12688 |
|
|
Distances are measured from the beginning of functions when using the
|
12689 |
|
|
\&\fB\-ffunction\-sections\fR option, or when using the \fB\-mgas\fR
|
12690 |
|
|
and \fB\-mno\-portable\-runtime\fR options together under HP-UX with
|
12691 |
|
|
the \s-1SOM\s0 linker.
|
12692 |
|
|
.Sp
|
12693 |
|
|
It is normally not desirable to use this option as it degrades
|
12694 |
|
|
performance. However, it may be useful in large applications,
|
12695 |
|
|
particularly when partial linking is used to build the application.
|
12696 |
|
|
.Sp
|
12697 |
|
|
The types of long calls used depends on the capabilities of the
|
12698 |
|
|
assembler and linker, and the type of code being generated. The
|
12699 |
|
|
impact on systems that support long absolute calls, and long pic
|
12700 |
|
|
symbol-difference or pc-relative calls should be relatively small.
|
12701 |
|
|
However, an indirect call is used on 32\-bit \s-1ELF\s0 systems in pic code
|
12702 |
|
|
and it is quite long.
|
12703 |
|
|
.IP "\fB\-munix=\fR\fIunix-std\fR" 4
|
12704 |
|
|
.IX Item "-munix=unix-std"
|
12705 |
|
|
Generate compiler predefines and select a startfile for the specified
|
12706 |
|
|
\&\s-1UNIX\s0 standard. The choices for \fIunix-std\fR are \fB93\fR, \fB95\fR
|
12707 |
|
|
and \fB98\fR. \fB93\fR is supported on all HP-UX versions. \fB95\fR
|
12708 |
|
|
is available on HP-UX 10.10 and later. \fB98\fR is available on HP-UX
|
12709 |
|
|
11.11 and later. The default values are \fB93\fR for HP-UX 10.00,
|
12710 |
|
|
\&\fB95\fR for HP-UX 10.10 though to 11.00, and \fB98\fR for HP-UX 11.11
|
12711 |
|
|
and later.
|
12712 |
|
|
.Sp
|
12713 |
|
|
\&\fB\-munix=93\fR provides the same predefines as \s-1GCC\s0 3.3 and 3.4.
|
12714 |
|
|
\&\fB\-munix=95\fR provides additional predefines for \f(CW\*(C`XOPEN_UNIX\*(C'\fR
|
12715 |
|
|
and \f(CW\*(C`_XOPEN_SOURCE_EXTENDED\*(C'\fR, and the startfile \fIunix95.o\fR.
|
12716 |
|
|
\&\fB\-munix=98\fR provides additional predefines for \f(CW\*(C`_XOPEN_UNIX\*(C'\fR,
|
12717 |
|
|
\&\f(CW\*(C`_XOPEN_SOURCE_EXTENDED\*(C'\fR, \f(CW\*(C`_INCLUDE_\|_STDC_A1_SOURCE\*(C'\fR and
|
12718 |
|
|
\&\f(CW\*(C`_INCLUDE_XOPEN_SOURCE_500\*(C'\fR, and the startfile \fIunix98.o\fR.
|
12719 |
|
|
.Sp
|
12720 |
|
|
It is \fIimportant\fR to note that this option changes the interfaces
|
12721 |
|
|
for various library routines. It also affects the operational behavior
|
12722 |
|
|
of the C library. Thus, \fIextreme\fR care is needed in using this
|
12723 |
|
|
option.
|
12724 |
|
|
.Sp
|
12725 |
|
|
Library code that is intended to operate with more than one \s-1UNIX\s0
|
12726 |
|
|
standard must test, set and restore the variable \fI_\|_xpg4_extended_mask\fR
|
12727 |
|
|
as appropriate. Most \s-1GNU\s0 software doesn't provide this capability.
|
12728 |
|
|
.IP "\fB\-nolibdld\fR" 4
|
12729 |
|
|
.IX Item "-nolibdld"
|
12730 |
|
|
Suppress the generation of link options to search libdld.sl when the
|
12731 |
|
|
\&\fB\-static\fR option is specified on HP-UX 10 and later.
|
12732 |
|
|
.IP "\fB\-static\fR" 4
|
12733 |
|
|
.IX Item "-static"
|
12734 |
|
|
The HP-UX implementation of setlocale in libc has a dependency on
|
12735 |
|
|
libdld.sl. There isn't an archive version of libdld.sl. Thus,
|
12736 |
|
|
when the \fB\-static\fR option is specified, special link options
|
12737 |
|
|
are needed to resolve this dependency.
|
12738 |
|
|
.Sp
|
12739 |
|
|
On HP-UX 10 and later, the \s-1GCC\s0 driver adds the necessary options to
|
12740 |
|
|
link with libdld.sl when the \fB\-static\fR option is specified.
|
12741 |
|
|
This causes the resulting binary to be dynamic. On the 64\-bit port,
|
12742 |
|
|
the linkers generate dynamic binaries by default in any case. The
|
12743 |
|
|
\&\fB\-nolibdld\fR option can be used to prevent the \s-1GCC\s0 driver from
|
12744 |
|
|
adding these link options.
|
12745 |
|
|
.IP "\fB\-threads\fR" 4
|
12746 |
|
|
.IX Item "-threads"
|
12747 |
|
|
Add support for multithreading with the \fIdce thread\fR library
|
12748 |
|
|
under HP-UX. This option sets flags for both the preprocessor and
|
12749 |
|
|
linker.
|
12750 |
|
|
.PP
|
12751 |
|
|
\fIIntel 386 and \s-1AMD\s0 x86\-64 Options\fR
|
12752 |
|
|
.IX Subsection "Intel 386 and AMD x86-64 Options"
|
12753 |
|
|
.PP
|
12754 |
|
|
These \fB\-m\fR options are defined for the i386 and x86\-64 family of
|
12755 |
|
|
computers:
|
12756 |
|
|
.IP "\fB\-march=\fR\fIcpu-type\fR" 4
|
12757 |
|
|
.IX Item "-march=cpu-type"
|
12758 |
|
|
Generate instructions for the machine type \fIcpu-type\fR. In contrast to
|
12759 |
|
|
\&\fB\-mtune=\fR\fIcpu-type\fR, which merely tunes the generated code
|
12760 |
|
|
for the specified \fIcpu-type\fR, \fB\-march=\fR\fIcpu-type\fR allows \s-1GCC\s0
|
12761 |
|
|
to generate code that may not run at all on processors other than the one
|
12762 |
|
|
indicated. Specifying \fB\-march=\fR\fIcpu-type\fR implies
|
12763 |
|
|
\&\fB\-mtune=\fR\fIcpu-type\fR.
|
12764 |
|
|
.Sp
|
12765 |
|
|
The choices for \fIcpu-type\fR are:
|
12766 |
|
|
.RS 4
|
12767 |
|
|
.IP "\fBnative\fR" 4
|
12768 |
|
|
.IX Item "native"
|
12769 |
|
|
This selects the \s-1CPU\s0 to generate code for at compilation time by determining
|
12770 |
|
|
the processor type of the compiling machine. Using \fB\-march=native\fR
|
12771 |
|
|
enables all instruction subsets supported by the local machine (hence
|
12772 |
|
|
the result might not run on different machines). Using \fB\-mtune=native\fR
|
12773 |
|
|
produces code optimized for the local machine under the constraints
|
12774 |
|
|
of the selected instruction set.
|
12775 |
|
|
.IP "\fBi386\fR" 4
|
12776 |
|
|
.IX Item "i386"
|
12777 |
|
|
Original Intel i386 \s-1CPU\s0.
|
12778 |
|
|
.IP "\fBi486\fR" 4
|
12779 |
|
|
.IX Item "i486"
|
12780 |
|
|
Intel i486 \s-1CPU\s0. (No scheduling is implemented for this chip.)
|
12781 |
|
|
.IP "\fBi586\fR" 4
|
12782 |
|
|
.IX Item "i586"
|
12783 |
|
|
.PD 0
|
12784 |
|
|
.IP "\fBpentium\fR" 4
|
12785 |
|
|
.IX Item "pentium"
|
12786 |
|
|
.PD
|
12787 |
|
|
Intel Pentium \s-1CPU\s0 with no \s-1MMX\s0 support.
|
12788 |
|
|
.IP "\fBpentium-mmx\fR" 4
|
12789 |
|
|
.IX Item "pentium-mmx"
|
12790 |
|
|
Intel Pentium \s-1MMX\s0 \s-1CPU\s0, based on Pentium core with \s-1MMX\s0 instruction set support.
|
12791 |
|
|
.IP "\fBpentiumpro\fR" 4
|
12792 |
|
|
.IX Item "pentiumpro"
|
12793 |
|
|
Intel Pentium Pro \s-1CPU\s0.
|
12794 |
|
|
.IP "\fBi686\fR" 4
|
12795 |
|
|
.IX Item "i686"
|
12796 |
|
|
When used with \fB\-march\fR, the Pentium Pro
|
12797 |
|
|
instruction set is used, so the code runs on all i686 family chips.
|
12798 |
|
|
When used with \fB\-mtune\fR, it has the same meaning as \fBgeneric\fR.
|
12799 |
|
|
.IP "\fBpentium2\fR" 4
|
12800 |
|
|
.IX Item "pentium2"
|
12801 |
|
|
Intel Pentium \s-1II\s0 \s-1CPU\s0, based on Pentium Pro core with \s-1MMX\s0 instruction set
|
12802 |
|
|
support.
|
12803 |
|
|
.IP "\fBpentium3\fR" 4
|
12804 |
|
|
.IX Item "pentium3"
|
12805 |
|
|
.PD 0
|
12806 |
|
|
.IP "\fBpentium3m\fR" 4
|
12807 |
|
|
.IX Item "pentium3m"
|
12808 |
|
|
.PD
|
12809 |
|
|
Intel Pentium \s-1III\s0 \s-1CPU\s0, based on Pentium Pro core with \s-1MMX\s0 and \s-1SSE\s0 instruction
|
12810 |
|
|
set support.
|
12811 |
|
|
.IP "\fBpentium-m\fR" 4
|
12812 |
|
|
.IX Item "pentium-m"
|
12813 |
|
|
Intel Pentium M; low-power version of Intel Pentium \s-1III\s0 \s-1CPU\s0
|
12814 |
|
|
with \s-1MMX\s0, \s-1SSE\s0 and \s-1SSE2\s0 instruction set support. Used by Centrino notebooks.
|
12815 |
|
|
.IP "\fBpentium4\fR" 4
|
12816 |
|
|
.IX Item "pentium4"
|
12817 |
|
|
.PD 0
|
12818 |
|
|
.IP "\fBpentium4m\fR" 4
|
12819 |
|
|
.IX Item "pentium4m"
|
12820 |
|
|
.PD
|
12821 |
|
|
Intel Pentium 4 \s-1CPU\s0 with \s-1MMX\s0, \s-1SSE\s0 and \s-1SSE2\s0 instruction set support.
|
12822 |
|
|
.IP "\fBprescott\fR" 4
|
12823 |
|
|
.IX Item "prescott"
|
12824 |
|
|
Improved version of Intel Pentium 4 \s-1CPU\s0 with \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0 and \s-1SSE3\s0 instruction
|
12825 |
|
|
set support.
|
12826 |
|
|
.IP "\fBnocona\fR" 4
|
12827 |
|
|
.IX Item "nocona"
|
12828 |
|
|
Improved version of Intel Pentium 4 \s-1CPU\s0 with 64\-bit extensions, \s-1MMX\s0, \s-1SSE\s0,
|
12829 |
|
|
\&\s-1SSE2\s0 and \s-1SSE3\s0 instruction set support.
|
12830 |
|
|
.IP "\fBcore2\fR" 4
|
12831 |
|
|
.IX Item "core2"
|
12832 |
|
|
Intel Core 2 \s-1CPU\s0 with 64\-bit extensions, \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0 and \s-1SSSE3\s0
|
12833 |
|
|
instruction set support.
|
12834 |
|
|
.IP "\fBcorei7\fR" 4
|
12835 |
|
|
.IX Item "corei7"
|
12836 |
|
|
Intel Core i7 \s-1CPU\s0 with 64\-bit extensions, \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0, \s-1SSSE3\s0, \s-1SSE4\s0.1
|
12837 |
|
|
and \s-1SSE4\s0.2 instruction set support.
|
12838 |
|
|
.IP "\fBcorei7\-avx\fR" 4
|
12839 |
|
|
.IX Item "corei7-avx"
|
12840 |
|
|
Intel Core i7 \s-1CPU\s0 with 64\-bit extensions, \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0, \s-1SSSE3\s0,
|
12841 |
|
|
\&\s-1SSE4\s0.1, \s-1SSE4\s0.2, \s-1AVX\s0, \s-1AES\s0 and \s-1PCLMUL\s0 instruction set support.
|
12842 |
|
|
.IP "\fBcore-avx-i\fR" 4
|
12843 |
|
|
.IX Item "core-avx-i"
|
12844 |
|
|
Intel Core \s-1CPU\s0 with 64\-bit extensions, \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0, \s-1SSSE3\s0,
|
12845 |
|
|
\&\s-1SSE4\s0.1, \s-1SSE4\s0.2, \s-1AVX\s0, \s-1AES\s0, \s-1PCLMUL\s0, \s-1FSGSBASE\s0, \s-1RDRND\s0 and F16C instruction
|
12846 |
|
|
set support.
|
12847 |
|
|
.IP "\fBatom\fR" 4
|
12848 |
|
|
.IX Item "atom"
|
12849 |
|
|
Intel Atom \s-1CPU\s0 with 64\-bit extensions, \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0 and \s-1SSSE3\s0
|
12850 |
|
|
instruction set support.
|
12851 |
|
|
.IP "\fBk6\fR" 4
|
12852 |
|
|
.IX Item "k6"
|
12853 |
|
|
\&\s-1AMD\s0 K6 \s-1CPU\s0 with \s-1MMX\s0 instruction set support.
|
12854 |
|
|
.IP "\fBk6\-2\fR" 4
|
12855 |
|
|
.IX Item "k6-2"
|
12856 |
|
|
.PD 0
|
12857 |
|
|
.IP "\fBk6\-3\fR" 4
|
12858 |
|
|
.IX Item "k6-3"
|
12859 |
|
|
.PD
|
12860 |
|
|
Improved versions of \s-1AMD\s0 K6 \s-1CPU\s0 with \s-1MMX\s0 and 3DNow! instruction set support.
|
12861 |
|
|
.IP "\fBathlon\fR" 4
|
12862 |
|
|
.IX Item "athlon"
|
12863 |
|
|
.PD 0
|
12864 |
|
|
.IP "\fBathlon-tbird\fR" 4
|
12865 |
|
|
.IX Item "athlon-tbird"
|
12866 |
|
|
.PD
|
12867 |
|
|
\&\s-1AMD\s0 Athlon \s-1CPU\s0 with \s-1MMX\s0, 3dNOW!, enhanced 3DNow! and \s-1SSE\s0 prefetch instructions
|
12868 |
|
|
support.
|
12869 |
|
|
.IP "\fBathlon\-4\fR" 4
|
12870 |
|
|
.IX Item "athlon-4"
|
12871 |
|
|
.PD 0
|
12872 |
|
|
.IP "\fBathlon-xp\fR" 4
|
12873 |
|
|
.IX Item "athlon-xp"
|
12874 |
|
|
.IP "\fBathlon-mp\fR" 4
|
12875 |
|
|
.IX Item "athlon-mp"
|
12876 |
|
|
.PD
|
12877 |
|
|
Improved \s-1AMD\s0 Athlon \s-1CPU\s0 with \s-1MMX\s0, 3DNow!, enhanced 3DNow! and full \s-1SSE\s0
|
12878 |
|
|
instruction set support.
|
12879 |
|
|
.IP "\fBk8\fR" 4
|
12880 |
|
|
.IX Item "k8"
|
12881 |
|
|
.PD 0
|
12882 |
|
|
.IP "\fBopteron\fR" 4
|
12883 |
|
|
.IX Item "opteron"
|
12884 |
|
|
.IP "\fBathlon64\fR" 4
|
12885 |
|
|
.IX Item "athlon64"
|
12886 |
|
|
.IP "\fBathlon-fx\fR" 4
|
12887 |
|
|
.IX Item "athlon-fx"
|
12888 |
|
|
.PD
|
12889 |
|
|
Processors based on the \s-1AMD\s0 K8 core with x86\-64 instruction set support,
|
12890 |
|
|
including the \s-1AMD\s0 Opteron, Athlon 64, and Athlon 64 \s-1FX\s0 processors.
|
12891 |
|
|
(This supersets \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, 3DNow!, enhanced 3DNow! and 64\-bit
|
12892 |
|
|
instruction set extensions.)
|
12893 |
|
|
.IP "\fBk8\-sse3\fR" 4
|
12894 |
|
|
.IX Item "k8-sse3"
|
12895 |
|
|
.PD 0
|
12896 |
|
|
.IP "\fBopteron\-sse3\fR" 4
|
12897 |
|
|
.IX Item "opteron-sse3"
|
12898 |
|
|
.IP "\fBathlon64\-sse3\fR" 4
|
12899 |
|
|
.IX Item "athlon64-sse3"
|
12900 |
|
|
.PD
|
12901 |
|
|
Improved versions of \s-1AMD\s0 K8 cores with \s-1SSE3\s0 instruction set support.
|
12902 |
|
|
.IP "\fBamdfam10\fR" 4
|
12903 |
|
|
.IX Item "amdfam10"
|
12904 |
|
|
.PD 0
|
12905 |
|
|
.IP "\fBbarcelona\fR" 4
|
12906 |
|
|
.IX Item "barcelona"
|
12907 |
|
|
.PD
|
12908 |
|
|
CPUs based on \s-1AMD\s0 Family 10h cores with x86\-64 instruction set support. (This
|
12909 |
|
|
supersets \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0, \s-1SSE4A\s0, 3DNow!, enhanced 3DNow!, \s-1ABM\s0 and 64\-bit
|
12910 |
|
|
instruction set extensions.)
|
12911 |
|
|
.IP "\fBbdver1\fR" 4
|
12912 |
|
|
.IX Item "bdver1"
|
12913 |
|
|
CPUs based on \s-1AMD\s0 Family 15h cores with x86\-64 instruction set support. (This
|
12914 |
|
|
supersets \s-1FMA4\s0, \s-1AVX\s0, \s-1XOP\s0, \s-1LWP\s0, \s-1AES\s0, \s-1PCL_MUL\s0, \s-1CX16\s0, \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0, \s-1SSE4A\s0,
|
12915 |
|
|
\&\s-1SSSE3\s0, \s-1SSE4\s0.1, \s-1SSE4\s0.2, \s-1ABM\s0 and 64\-bit instruction set extensions.)
|
12916 |
|
|
.IP "\fBbdver2\fR" 4
|
12917 |
|
|
.IX Item "bdver2"
|
12918 |
|
|
\&\s-1AMD\s0 Family 15h core based CPUs with x86\-64 instruction set support. (This
|
12919 |
|
|
supersets \s-1BMI\s0, \s-1TBM\s0, F16C, \s-1FMA\s0, \s-1AVX\s0, \s-1XOP\s0, \s-1LWP\s0, \s-1AES\s0, \s-1PCL_MUL\s0, \s-1CX16\s0, \s-1MMX\s0, \s-1SSE\s0,
|
12920 |
|
|
\&\s-1SSE2\s0, \s-1SSE3\s0, \s-1SSE4A\s0, \s-1SSSE3\s0, \s-1SSE4\s0.1, \s-1SSE4\s0.2, \s-1ABM\s0 and 64\-bit instruction set
|
12921 |
|
|
extensions.)
|
12922 |
|
|
.IP "\fBbdver3\fR" 4
|
12923 |
|
|
.IX Item "bdver3"
|
12924 |
|
|
\&\s-1AMD\s0 Family 15h core based CPUs with x86\-64 instruction set support. (This
|
12925 |
|
|
supersets \s-1BMI\s0, \s-1TBM\s0, F16C, \s-1FMA\s0, \s-1AVX\s0, \s-1XOP\s0, \s-1LWP\s0, \s-1AES\s0, \s-1PCL_MUL\s0, \s-1CX16\s0, \s-1MMX\s0, \s-1SSE\s0,
|
12926 |
|
|
\&\s-1SSE2\s0, \s-1SSE3\s0, \s-1SSE4A\s0, \s-1SSSE3\s0, \s-1SSE4\s0.1, \s-1SSE4\s0.2, \s-1ABM\s0 and 64\-bit instruction set
|
12927 |
|
|
extensions.
|
12928 |
|
|
.IP "\fBbtver1\fR" 4
|
12929 |
|
|
.IX Item "btver1"
|
12930 |
|
|
CPUs based on \s-1AMD\s0 Family 14h cores with x86\-64 instruction set support. (This
|
12931 |
|
|
supersets \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0, \s-1SSSE3\s0, \s-1SSE4A\s0, \s-1CX16\s0, \s-1ABM\s0 and 64\-bit
|
12932 |
|
|
instruction set extensions.)
|
12933 |
|
|
.IP "\fBbtver2\fR" 4
|
12934 |
|
|
.IX Item "btver2"
|
12935 |
|
|
CPUs based on \s-1AMD\s0 Family 16h cores with x86\-64 instruction set support. This
|
12936 |
|
|
includes \s-1MOVBE\s0, F16C, \s-1BMI\s0, \s-1AVX\s0, \s-1PCL_MUL\s0, \s-1AES\s0, \s-1SSE4\s0.2, \s-1SSE4\s0.1, \s-1CX16\s0, \s-1ABM\s0,
|
12937 |
|
|
\&\s-1SSE4A\s0, \s-1SSSE3\s0, \s-1SSE3\s0, \s-1SSE2\s0, \s-1SSE\s0, \s-1MMX\s0 and 64\-bit instruction set extensions.
|
12938 |
|
|
.IP "\fBwinchip\-c6\fR" 4
|
12939 |
|
|
.IX Item "winchip-c6"
|
12940 |
|
|
\&\s-1IDT\s0 WinChip C6 \s-1CPU\s0, dealt in same way as i486 with additional \s-1MMX\s0 instruction
|
12941 |
|
|
set support.
|
12942 |
|
|
.IP "\fBwinchip2\fR" 4
|
12943 |
|
|
.IX Item "winchip2"
|
12944 |
|
|
\&\s-1IDT\s0 WinChip 2 \s-1CPU\s0, dealt in same way as i486 with additional \s-1MMX\s0 and 3DNow!
|
12945 |
|
|
instruction set support.
|
12946 |
|
|
.IP "\fBc3\fR" 4
|
12947 |
|
|
.IX Item "c3"
|
12948 |
|
|
\&\s-1VIA\s0 C3 \s-1CPU\s0 with \s-1MMX\s0 and 3DNow! instruction set support. (No scheduling is
|
12949 |
|
|
implemented for this chip.)
|
12950 |
|
|
.IP "\fBc3\-2\fR" 4
|
12951 |
|
|
.IX Item "c3-2"
|
12952 |
|
|
\&\s-1VIA\s0 C3\-2 (Nehemiah/C5XL) \s-1CPU\s0 with \s-1MMX\s0 and \s-1SSE\s0 instruction set support.
|
12953 |
|
|
(No scheduling is
|
12954 |
|
|
implemented for this chip.)
|
12955 |
|
|
.IP "\fBgeode\fR" 4
|
12956 |
|
|
.IX Item "geode"
|
12957 |
|
|
\&\s-1AMD\s0 Geode embedded processor with \s-1MMX\s0 and 3DNow! instruction set support.
|
12958 |
|
|
.RE
|
12959 |
|
|
.RS 4
|
12960 |
|
|
.RE
|
12961 |
|
|
.IP "\fB\-mtune=\fR\fIcpu-type\fR" 4
|
12962 |
|
|
.IX Item "-mtune=cpu-type"
|
12963 |
|
|
Tune to \fIcpu-type\fR everything applicable about the generated code, except
|
12964 |
|
|
for the \s-1ABI\s0 and the set of available instructions.
|
12965 |
|
|
While picking a specific \fIcpu-type\fR schedules things appropriately
|
12966 |
|
|
for that particular chip, the compiler does not generate any code that
|
12967 |
|
|
cannot run on the default machine type unless you use a
|
12968 |
|
|
\&\fB\-march=\fR\fIcpu-type\fR option.
|
12969 |
|
|
For example, if \s-1GCC\s0 is configured for i686\-pc\-linux\-gnu
|
12970 |
|
|
then \fB\-mtune=pentium4\fR generates code that is tuned for Pentium 4
|
12971 |
|
|
but still runs on i686 machines.
|
12972 |
|
|
.Sp
|
12973 |
|
|
The choices for \fIcpu-type\fR are the same as for \fB\-march\fR.
|
12974 |
|
|
In addition, \fB\-mtune\fR supports an extra choice for \fIcpu-type\fR:
|
12975 |
|
|
.RS 4
|
12976 |
|
|
.IP "\fBgeneric\fR" 4
|
12977 |
|
|
.IX Item "generic"
|
12978 |
|
|
Produce code optimized for the most common \s-1IA32/AMD64/EM64T\s0 processors.
|
12979 |
|
|
If you know the \s-1CPU\s0 on which your code will run, then you should use
|
12980 |
|
|
the corresponding \fB\-mtune\fR or \fB\-march\fR option instead of
|
12981 |
|
|
\&\fB\-mtune=generic\fR. But, if you do not know exactly what \s-1CPU\s0 users
|
12982 |
|
|
of your application will have, then you should use this option.
|
12983 |
|
|
.Sp
|
12984 |
|
|
As new processors are deployed in the marketplace, the behavior of this
|
12985 |
|
|
option will change. Therefore, if you upgrade to a newer version of
|
12986 |
|
|
\&\s-1GCC\s0, code generation controlled by this option will change to reflect
|
12987 |
|
|
the processors
|
12988 |
|
|
that are most common at the time that version of \s-1GCC\s0 is released.
|
12989 |
|
|
.Sp
|
12990 |
|
|
There is no \fB\-march=generic\fR option because \fB\-march\fR
|
12991 |
|
|
indicates the instruction set the compiler can use, and there is no
|
12992 |
|
|
generic instruction set applicable to all processors. In contrast,
|
12993 |
|
|
\&\fB\-mtune\fR indicates the processor (or, in this case, collection of
|
12994 |
|
|
processors) for which the code is optimized.
|
12995 |
|
|
.RE
|
12996 |
|
|
.RS 4
|
12997 |
|
|
.RE
|
12998 |
|
|
.IP "\fB\-mcpu=\fR\fIcpu-type\fR" 4
|
12999 |
|
|
.IX Item "-mcpu=cpu-type"
|
13000 |
|
|
A deprecated synonym for \fB\-mtune\fR.
|
13001 |
|
|
.IP "\fB\-mfpmath=\fR\fIunit\fR" 4
|
13002 |
|
|
.IX Item "-mfpmath=unit"
|
13003 |
|
|
Generate floating-point arithmetic for selected unit \fIunit\fR. The choices
|
13004 |
|
|
for \fIunit\fR are:
|
13005 |
|
|
.RS 4
|
13006 |
|
|
.IP "\fB387\fR" 4
|
13007 |
|
|
.IX Item "387"
|
13008 |
|
|
Use the standard 387 floating-point coprocessor present on the majority of chips and
|
13009 |
|
|
emulated otherwise. Code compiled with this option runs almost everywhere.
|
13010 |
|
|
The temporary results are computed in 80\-bit precision instead of the precision
|
13011 |
|
|
specified by the type, resulting in slightly different results compared to most
|
13012 |
|
|
of other chips. See \fB\-ffloat\-store\fR for more detailed description.
|
13013 |
|
|
.Sp
|
13014 |
|
|
This is the default choice for i386 compiler.
|
13015 |
|
|
.IP "\fBsse\fR" 4
|
13016 |
|
|
.IX Item "sse"
|
13017 |
|
|
Use scalar floating-point instructions present in the \s-1SSE\s0 instruction set.
|
13018 |
|
|
This instruction set is supported by Pentium \s-1III\s0 and newer chips,
|
13019 |
|
|
and in the \s-1AMD\s0 line
|
13020 |
|
|
by Athlon\-4, Athlon \s-1XP\s0 and Athlon \s-1MP\s0 chips. The earlier version of the \s-1SSE\s0
|
13021 |
|
|
instruction set supports only single-precision arithmetic, thus the double and
|
13022 |
|
|
extended-precision arithmetic are still done using 387. A later version, present
|
13023 |
|
|
only in Pentium 4 and \s-1AMD\s0 x86\-64 chips, supports double-precision
|
13024 |
|
|
arithmetic too.
|
13025 |
|
|
.Sp
|
13026 |
|
|
For the i386 compiler, you must use \fB\-march=\fR\fIcpu-type\fR, \fB\-msse\fR
|
13027 |
|
|
or \fB\-msse2\fR switches to enable \s-1SSE\s0 extensions and make this option
|
13028 |
|
|
effective. For the x86\-64 compiler, these extensions are enabled by default.
|
13029 |
|
|
.Sp
|
13030 |
|
|
The resulting code should be considerably faster in the majority of cases and avoid
|
13031 |
|
|
the numerical instability problems of 387 code, but may break some existing
|
13032 |
|
|
code that expects temporaries to be 80 bits.
|
13033 |
|
|
.Sp
|
13034 |
|
|
This is the default choice for the x86\-64 compiler.
|
13035 |
|
|
.IP "\fBsse,387\fR" 4
|
13036 |
|
|
.IX Item "sse,387"
|
13037 |
|
|
.PD 0
|
13038 |
|
|
.IP "\fBsse+387\fR" 4
|
13039 |
|
|
.IX Item "sse+387"
|
13040 |
|
|
.IP "\fBboth\fR" 4
|
13041 |
|
|
.IX Item "both"
|
13042 |
|
|
.PD
|
13043 |
|
|
Attempt to utilize both instruction sets at once. This effectively doubles the
|
13044 |
|
|
amount of available registers, and on chips with separate execution units for
|
13045 |
|
|
387 and \s-1SSE\s0 the execution resources too. Use this option with care, as it is
|
13046 |
|
|
still experimental, because the \s-1GCC\s0 register allocator does not model separate
|
13047 |
|
|
functional units well, resulting in unstable performance.
|
13048 |
|
|
.RE
|
13049 |
|
|
.RS 4
|
13050 |
|
|
.RE
|
13051 |
|
|
.IP "\fB\-masm=\fR\fIdialect\fR" 4
|
13052 |
|
|
.IX Item "-masm=dialect"
|
13053 |
|
|
Output assembly instructions using selected \fIdialect\fR. Supported
|
13054 |
|
|
choices are \fBintel\fR or \fBatt\fR (the default). Darwin does
|
13055 |
|
|
not support \fBintel\fR.
|
13056 |
|
|
.IP "\fB\-mieee\-fp\fR" 4
|
13057 |
|
|
.IX Item "-mieee-fp"
|
13058 |
|
|
.PD 0
|
13059 |
|
|
.IP "\fB\-mno\-ieee\-fp\fR" 4
|
13060 |
|
|
.IX Item "-mno-ieee-fp"
|
13061 |
|
|
.PD
|
13062 |
|
|
Control whether or not the compiler uses \s-1IEEE\s0 floating-point
|
13063 |
|
|
comparisons. These correctly handle the case where the result of a
|
13064 |
|
|
comparison is unordered.
|
13065 |
|
|
.IP "\fB\-msoft\-float\fR" 4
|
13066 |
|
|
.IX Item "-msoft-float"
|
13067 |
|
|
Generate output containing library calls for floating point.
|
13068 |
|
|
.Sp
|
13069 |
|
|
\&\fBWarning:\fR the requisite libraries are not part of \s-1GCC\s0.
|
13070 |
|
|
Normally the facilities of the machine's usual C compiler are used, but
|
13071 |
|
|
this can't be done directly in cross-compilation. You must make your
|
13072 |
|
|
own arrangements to provide suitable library functions for
|
13073 |
|
|
cross-compilation.
|
13074 |
|
|
.Sp
|
13075 |
|
|
On machines where a function returns floating-point results in the 80387
|
13076 |
|
|
register stack, some floating-point opcodes may be emitted even if
|
13077 |
|
|
\&\fB\-msoft\-float\fR is used.
|
13078 |
|
|
.IP "\fB\-mno\-fp\-ret\-in\-387\fR" 4
|
13079 |
|
|
.IX Item "-mno-fp-ret-in-387"
|
13080 |
|
|
Do not use the \s-1FPU\s0 registers for return values of functions.
|
13081 |
|
|
.Sp
|
13082 |
|
|
The usual calling convention has functions return values of types
|
13083 |
|
|
\&\f(CW\*(C`float\*(C'\fR and \f(CW\*(C`double\*(C'\fR in an \s-1FPU\s0 register, even if there
|
13084 |
|
|
is no \s-1FPU\s0. The idea is that the operating system should emulate
|
13085 |
|
|
an \s-1FPU\s0.
|
13086 |
|
|
.Sp
|
13087 |
|
|
The option \fB\-mno\-fp\-ret\-in\-387\fR causes such values to be returned
|
13088 |
|
|
in ordinary \s-1CPU\s0 registers instead.
|
13089 |
|
|
.IP "\fB\-mno\-fancy\-math\-387\fR" 4
|
13090 |
|
|
.IX Item "-mno-fancy-math-387"
|
13091 |
|
|
Some 387 emulators do not support the \f(CW\*(C`sin\*(C'\fR, \f(CW\*(C`cos\*(C'\fR and
|
13092 |
|
|
\&\f(CW\*(C`sqrt\*(C'\fR instructions for the 387. Specify this option to avoid
|
13093 |
|
|
generating those instructions. This option is the default on FreeBSD,
|
13094 |
|
|
OpenBSD and NetBSD. This option is overridden when \fB\-march\fR
|
13095 |
|
|
indicates that the target \s-1CPU\s0 always has an \s-1FPU\s0 and so the
|
13096 |
|
|
instruction does not need emulation. These
|
13097 |
|
|
instructions are not generated unless you also use the
|
13098 |
|
|
\&\fB\-funsafe\-math\-optimizations\fR switch.
|
13099 |
|
|
.IP "\fB\-malign\-double\fR" 4
|
13100 |
|
|
.IX Item "-malign-double"
|
13101 |
|
|
.PD 0
|
13102 |
|
|
.IP "\fB\-mno\-align\-double\fR" 4
|
13103 |
|
|
.IX Item "-mno-align-double"
|
13104 |
|
|
.PD
|
13105 |
|
|
Control whether \s-1GCC\s0 aligns \f(CW\*(C`double\*(C'\fR, \f(CW\*(C`long double\*(C'\fR, and
|
13106 |
|
|
\&\f(CW\*(C`long long\*(C'\fR variables on a two-word boundary or a one-word
|
13107 |
|
|
boundary. Aligning \f(CW\*(C`double\*(C'\fR variables on a two-word boundary
|
13108 |
|
|
produces code that runs somewhat faster on a Pentium at the
|
13109 |
|
|
expense of more memory.
|
13110 |
|
|
.Sp
|
13111 |
|
|
On x86\-64, \fB\-malign\-double\fR is enabled by default.
|
13112 |
|
|
.Sp
|
13113 |
|
|
\&\fBWarning:\fR if you use the \fB\-malign\-double\fR switch,
|
13114 |
|
|
structures containing the above types are aligned differently than
|
13115 |
|
|
the published application binary interface specifications for the 386
|
13116 |
|
|
and are not binary compatible with structures in code compiled
|
13117 |
|
|
without that switch.
|
13118 |
|
|
.IP "\fB\-m96bit\-long\-double\fR" 4
|
13119 |
|
|
.IX Item "-m96bit-long-double"
|
13120 |
|
|
.PD 0
|
13121 |
|
|
.IP "\fB\-m128bit\-long\-double\fR" 4
|
13122 |
|
|
.IX Item "-m128bit-long-double"
|
13123 |
|
|
.PD
|
13124 |
|
|
These switches control the size of \f(CW\*(C`long double\*(C'\fR type. The i386
|
13125 |
|
|
application binary interface specifies the size to be 96 bits,
|
13126 |
|
|
so \fB\-m96bit\-long\-double\fR is the default in 32\-bit mode.
|
13127 |
|
|
.Sp
|
13128 |
|
|
Modern architectures (Pentium and newer) prefer \f(CW\*(C`long double\*(C'\fR
|
13129 |
|
|
to be aligned to an 8\- or 16\-byte boundary. In arrays or structures
|
13130 |
|
|
conforming to the \s-1ABI\s0, this is not possible. So specifying
|
13131 |
|
|
\&\fB\-m128bit\-long\-double\fR aligns \f(CW\*(C`long double\*(C'\fR
|
13132 |
|
|
to a 16\-byte boundary by padding the \f(CW\*(C`long double\*(C'\fR with an additional
|
13133 |
|
|
32\-bit zero.
|
13134 |
|
|
.Sp
|
13135 |
|
|
In the x86\-64 compiler, \fB\-m128bit\-long\-double\fR is the default choice as
|
13136 |
|
|
its \s-1ABI\s0 specifies that \f(CW\*(C`long double\*(C'\fR is aligned on 16\-byte boundary.
|
13137 |
|
|
.Sp
|
13138 |
|
|
Notice that neither of these options enable any extra precision over the x87
|
13139 |
|
|
standard of 80 bits for a \f(CW\*(C`long double\*(C'\fR.
|
13140 |
|
|
.Sp
|
13141 |
|
|
\&\fBWarning:\fR if you override the default value for your target \s-1ABI\s0, this
|
13142 |
|
|
changes the size of
|
13143 |
|
|
structures and arrays containing \f(CW\*(C`long double\*(C'\fR variables,
|
13144 |
|
|
as well as modifying the function calling convention for functions taking
|
13145 |
|
|
\&\f(CW\*(C`long double\*(C'\fR. Hence they are not binary-compatible
|
13146 |
|
|
with code compiled without that switch.
|
13147 |
|
|
.IP "\fB\-mlong\-double\-64\fR" 4
|
13148 |
|
|
.IX Item "-mlong-double-64"
|
13149 |
|
|
.PD 0
|
13150 |
|
|
.IP "\fB\-mlong\-double\-80\fR" 4
|
13151 |
|
|
.IX Item "-mlong-double-80"
|
13152 |
|
|
.PD
|
13153 |
|
|
These switches control the size of \f(CW\*(C`long double\*(C'\fR type. A size
|
13154 |
|
|
of 64 bits makes the \f(CW\*(C`long double\*(C'\fR type equivalent to the \f(CW\*(C`double\*(C'\fR
|
13155 |
|
|
type. This is the default for Bionic C library.
|
13156 |
|
|
.Sp
|
13157 |
|
|
\&\fBWarning:\fR if you override the default value for your target \s-1ABI\s0, this
|
13158 |
|
|
changes the size of
|
13159 |
|
|
structures and arrays containing \f(CW\*(C`long double\*(C'\fR variables,
|
13160 |
|
|
as well as modifying the function calling convention for functions taking
|
13161 |
|
|
\&\f(CW\*(C`long double\*(C'\fR. Hence they are not binary-compatible
|
13162 |
|
|
with code compiled without that switch.
|
13163 |
|
|
.IP "\fB\-mlarge\-data\-threshold=\fR\fIthreshold\fR" 4
|
13164 |
|
|
.IX Item "-mlarge-data-threshold=threshold"
|
13165 |
|
|
When \fB\-mcmodel=medium\fR is specified, data objects larger than
|
13166 |
|
|
\&\fIthreshold\fR are placed in the large data section. This value must be the
|
13167 |
|
|
same across all objects linked into the binary, and defaults to 65535.
|
13168 |
|
|
.IP "\fB\-mrtd\fR" 4
|
13169 |
|
|
.IX Item "-mrtd"
|
13170 |
|
|
Use a different function-calling convention, in which functions that
|
13171 |
|
|
take a fixed number of arguments return with the \f(CW\*(C`ret \f(CInum\f(CW\*(C'\fR
|
13172 |
|
|
instruction, which pops their arguments while returning. This saves one
|
13173 |
|
|
instruction in the caller since there is no need to pop the arguments
|
13174 |
|
|
there.
|
13175 |
|
|
.Sp
|
13176 |
|
|
You can specify that an individual function is called with this calling
|
13177 |
|
|
sequence with the function attribute \fBstdcall\fR. You can also
|
13178 |
|
|
override the \fB\-mrtd\fR option by using the function attribute
|
13179 |
|
|
\&\fBcdecl\fR.
|
13180 |
|
|
.Sp
|
13181 |
|
|
\&\fBWarning:\fR this calling convention is incompatible with the one
|
13182 |
|
|
normally used on Unix, so you cannot use it if you need to call
|
13183 |
|
|
libraries compiled with the Unix compiler.
|
13184 |
|
|
.Sp
|
13185 |
|
|
Also, you must provide function prototypes for all functions that
|
13186 |
|
|
take variable numbers of arguments (including \f(CW\*(C`printf\*(C'\fR);
|
13187 |
|
|
otherwise incorrect code is generated for calls to those
|
13188 |
|
|
functions.
|
13189 |
|
|
.Sp
|
13190 |
|
|
In addition, seriously incorrect code results if you call a
|
13191 |
|
|
function with too many arguments. (Normally, extra arguments are
|
13192 |
|
|
harmlessly ignored.)
|
13193 |
|
|
.IP "\fB\-mregparm=\fR\fInum\fR" 4
|
13194 |
|
|
.IX Item "-mregparm=num"
|
13195 |
|
|
Control how many registers are used to pass integer arguments. By
|
13196 |
|
|
default, no registers are used to pass arguments, and at most 3
|
13197 |
|
|
registers can be used. You can control this behavior for a specific
|
13198 |
|
|
function by using the function attribute \fBregparm\fR.
|
13199 |
|
|
.Sp
|
13200 |
|
|
\&\fBWarning:\fR if you use this switch, and
|
13201 |
|
|
\&\fInum\fR is nonzero, then you must build all modules with the same
|
13202 |
|
|
value, including any libraries. This includes the system libraries and
|
13203 |
|
|
startup modules.
|
13204 |
|
|
.IP "\fB\-msseregparm\fR" 4
|
13205 |
|
|
.IX Item "-msseregparm"
|
13206 |
|
|
Use \s-1SSE\s0 register passing conventions for float and double arguments
|
13207 |
|
|
and return values. You can control this behavior for a specific
|
13208 |
|
|
function by using the function attribute \fBsseregparm\fR.
|
13209 |
|
|
.Sp
|
13210 |
|
|
\&\fBWarning:\fR if you use this switch then you must build all
|
13211 |
|
|
modules with the same value, including any libraries. This includes
|
13212 |
|
|
the system libraries and startup modules.
|
13213 |
|
|
.IP "\fB\-mvect8\-ret\-in\-mem\fR" 4
|
13214 |
|
|
.IX Item "-mvect8-ret-in-mem"
|
13215 |
|
|
Return 8\-byte vectors in memory instead of \s-1MMX\s0 registers. This is the
|
13216 |
|
|
default on Solaris@tie{}8 and 9 and VxWorks to match the \s-1ABI\s0 of the Sun
|
13217 |
|
|
Studio compilers until version 12. Later compiler versions (starting
|
13218 |
|
|
with Studio 12 Update@tie{}1) follow the \s-1ABI\s0 used by other x86 targets, which
|
13219 |
|
|
is the default on Solaris@tie{}10 and later. \fIOnly\fR use this option if
|
13220 |
|
|
you need to remain compatible with existing code produced by those
|
13221 |
|
|
previous compiler versions or older versions of \s-1GCC\s0.
|
13222 |
|
|
.IP "\fB\-mpc32\fR" 4
|
13223 |
|
|
.IX Item "-mpc32"
|
13224 |
|
|
.PD 0
|
13225 |
|
|
.IP "\fB\-mpc64\fR" 4
|
13226 |
|
|
.IX Item "-mpc64"
|
13227 |
|
|
.IP "\fB\-mpc80\fR" 4
|
13228 |
|
|
.IX Item "-mpc80"
|
13229 |
|
|
.PD
|
13230 |
|
|
Set 80387 floating-point precision to 32, 64 or 80 bits. When \fB\-mpc32\fR
|
13231 |
|
|
is specified, the significands of results of floating-point operations are
|
13232 |
|
|
rounded to 24 bits (single precision); \fB\-mpc64\fR rounds the
|
13233 |
|
|
significands of results of floating-point operations to 53 bits (double
|
13234 |
|
|
precision) and \fB\-mpc80\fR rounds the significands of results of
|
13235 |
|
|
floating-point operations to 64 bits (extended double precision), which is
|
13236 |
|
|
the default. When this option is used, floating-point operations in higher
|
13237 |
|
|
precisions are not available to the programmer without setting the \s-1FPU\s0
|
13238 |
|
|
control word explicitly.
|
13239 |
|
|
.Sp
|
13240 |
|
|
Setting the rounding of floating-point operations to less than the default
|
13241 |
|
|
80 bits can speed some programs by 2% or more. Note that some mathematical
|
13242 |
|
|
libraries assume that extended-precision (80\-bit) floating-point operations
|
13243 |
|
|
are enabled by default; routines in such libraries could suffer significant
|
13244 |
|
|
loss of accuracy, typically through so-called \*(L"catastrophic cancellation\*(R",
|
13245 |
|
|
when this option is used to set the precision to less than extended precision.
|
13246 |
|
|
.IP "\fB\-mstackrealign\fR" 4
|
13247 |
|
|
.IX Item "-mstackrealign"
|
13248 |
|
|
Realign the stack at entry. On the Intel x86, the \fB\-mstackrealign\fR
|
13249 |
|
|
option generates an alternate prologue and epilogue that realigns the
|
13250 |
|
|
run-time stack if necessary. This supports mixing legacy codes that keep
|
13251 |
|
|
4\-byte stack alignment with modern codes that keep 16\-byte stack alignment for
|
13252 |
|
|
\&\s-1SSE\s0 compatibility. See also the attribute \f(CW\*(C`force_align_arg_pointer\*(C'\fR,
|
13253 |
|
|
applicable to individual functions.
|
13254 |
|
|
.IP "\fB\-mpreferred\-stack\-boundary=\fR\fInum\fR" 4
|
13255 |
|
|
.IX Item "-mpreferred-stack-boundary=num"
|
13256 |
|
|
Attempt to keep the stack boundary aligned to a 2 raised to \fInum\fR
|
13257 |
|
|
byte boundary. If \fB\-mpreferred\-stack\-boundary\fR is not specified,
|
13258 |
|
|
the default is 4 (16 bytes or 128 bits).
|
13259 |
|
|
.Sp
|
13260 |
|
|
\&\fBWarning:\fR When generating code for the x86\-64 architecture with
|
13261 |
|
|
\&\s-1SSE\s0 extensions disabled, \fB\-mpreferred\-stack\-boundary=3\fR can be
|
13262 |
|
|
used to keep the stack boundary aligned to 8 byte boundary. Since
|
13263 |
|
|
x86\-64 \s-1ABI\s0 require 16 byte stack alignment, this is \s-1ABI\s0 incompatible and
|
13264 |
|
|
intended to be used in controlled environment where stack space is
|
13265 |
|
|
important limitation. This option will lead to wrong code when functions
|
13266 |
|
|
compiled with 16 byte stack alignment (such as functions from a standard
|
13267 |
|
|
library) are called with misaligned stack. In this case, \s-1SSE\s0
|
13268 |
|
|
instructions may lead to misaligned memory access traps. In addition,
|
13269 |
|
|
variable arguments will be handled incorrectly for 16 byte aligned
|
13270 |
|
|
objects (including x87 long double and _\|_int128), leading to wrong
|
13271 |
|
|
results. You must build all modules with
|
13272 |
|
|
\&\fB\-mpreferred\-stack\-boundary=3\fR, including any libraries. This
|
13273 |
|
|
includes the system libraries and startup modules.
|
13274 |
|
|
.IP "\fB\-mincoming\-stack\-boundary=\fR\fInum\fR" 4
|
13275 |
|
|
.IX Item "-mincoming-stack-boundary=num"
|
13276 |
|
|
Assume the incoming stack is aligned to a 2 raised to \fInum\fR byte
|
13277 |
|
|
boundary. If \fB\-mincoming\-stack\-boundary\fR is not specified,
|
13278 |
|
|
the one specified by \fB\-mpreferred\-stack\-boundary\fR is used.
|
13279 |
|
|
.Sp
|
13280 |
|
|
On Pentium and Pentium Pro, \f(CW\*(C`double\*(C'\fR and \f(CW\*(C`long double\*(C'\fR values
|
13281 |
|
|
should be aligned to an 8\-byte boundary (see \fB\-malign\-double\fR) or
|
13282 |
|
|
suffer significant run time performance penalties. On Pentium \s-1III\s0, the
|
13283 |
|
|
Streaming \s-1SIMD\s0 Extension (\s-1SSE\s0) data type \f(CW\*(C`_\|_m128\*(C'\fR may not work
|
13284 |
|
|
properly if it is not 16\-byte aligned.
|
13285 |
|
|
.Sp
|
13286 |
|
|
To ensure proper alignment of this values on the stack, the stack boundary
|
13287 |
|
|
must be as aligned as that required by any value stored on the stack.
|
13288 |
|
|
Further, every function must be generated such that it keeps the stack
|
13289 |
|
|
aligned. Thus calling a function compiled with a higher preferred
|
13290 |
|
|
stack boundary from a function compiled with a lower preferred stack
|
13291 |
|
|
boundary most likely misaligns the stack. It is recommended that
|
13292 |
|
|
libraries that use callbacks always use the default setting.
|
13293 |
|
|
.Sp
|
13294 |
|
|
This extra alignment does consume extra stack space, and generally
|
13295 |
|
|
increases code size. Code that is sensitive to stack space usage, such
|
13296 |
|
|
as embedded systems and operating system kernels, may want to reduce the
|
13297 |
|
|
preferred alignment to \fB\-mpreferred\-stack\-boundary=2\fR.
|
13298 |
|
|
.IP "\fB\-mmmx\fR" 4
|
13299 |
|
|
.IX Item "-mmmx"
|
13300 |
|
|
.PD 0
|
13301 |
|
|
.IP "\fB\-mno\-mmx\fR" 4
|
13302 |
|
|
.IX Item "-mno-mmx"
|
13303 |
|
|
.IP "\fB\-msse\fR" 4
|
13304 |
|
|
.IX Item "-msse"
|
13305 |
|
|
.IP "\fB\-mno\-sse\fR" 4
|
13306 |
|
|
.IX Item "-mno-sse"
|
13307 |
|
|
.IP "\fB\-msse2\fR" 4
|
13308 |
|
|
.IX Item "-msse2"
|
13309 |
|
|
.IP "\fB\-mno\-sse2\fR" 4
|
13310 |
|
|
.IX Item "-mno-sse2"
|
13311 |
|
|
.IP "\fB\-msse3\fR" 4
|
13312 |
|
|
.IX Item "-msse3"
|
13313 |
|
|
.IP "\fB\-mno\-sse3\fR" 4
|
13314 |
|
|
.IX Item "-mno-sse3"
|
13315 |
|
|
.IP "\fB\-mssse3\fR" 4
|
13316 |
|
|
.IX Item "-mssse3"
|
13317 |
|
|
.IP "\fB\-mno\-ssse3\fR" 4
|
13318 |
|
|
.IX Item "-mno-ssse3"
|
13319 |
|
|
.IP "\fB\-msse4.1\fR" 4
|
13320 |
|
|
.IX Item "-msse4.1"
|
13321 |
|
|
.IP "\fB\-mno\-sse4.1\fR" 4
|
13322 |
|
|
.IX Item "-mno-sse4.1"
|
13323 |
|
|
.IP "\fB\-msse4.2\fR" 4
|
13324 |
|
|
.IX Item "-msse4.2"
|
13325 |
|
|
.IP "\fB\-mno\-sse4.2\fR" 4
|
13326 |
|
|
.IX Item "-mno-sse4.2"
|
13327 |
|
|
.IP "\fB\-msse4\fR" 4
|
13328 |
|
|
.IX Item "-msse4"
|
13329 |
|
|
.IP "\fB\-mno\-sse4\fR" 4
|
13330 |
|
|
.IX Item "-mno-sse4"
|
13331 |
|
|
.IP "\fB\-mavx\fR" 4
|
13332 |
|
|
.IX Item "-mavx"
|
13333 |
|
|
.IP "\fB\-mno\-avx\fR" 4
|
13334 |
|
|
.IX Item "-mno-avx"
|
13335 |
|
|
.IP "\fB\-mavx2\fR" 4
|
13336 |
|
|
.IX Item "-mavx2"
|
13337 |
|
|
.IP "\fB\-mno\-avx2\fR" 4
|
13338 |
|
|
.IX Item "-mno-avx2"
|
13339 |
|
|
.IP "\fB\-maes\fR" 4
|
13340 |
|
|
.IX Item "-maes"
|
13341 |
|
|
.IP "\fB\-mno\-aes\fR" 4
|
13342 |
|
|
.IX Item "-mno-aes"
|
13343 |
|
|
.IP "\fB\-mpclmul\fR" 4
|
13344 |
|
|
.IX Item "-mpclmul"
|
13345 |
|
|
.IP "\fB\-mno\-pclmul\fR" 4
|
13346 |
|
|
.IX Item "-mno-pclmul"
|
13347 |
|
|
.IP "\fB\-mfsgsbase\fR" 4
|
13348 |
|
|
.IX Item "-mfsgsbase"
|
13349 |
|
|
.IP "\fB\-mno\-fsgsbase\fR" 4
|
13350 |
|
|
.IX Item "-mno-fsgsbase"
|
13351 |
|
|
.IP "\fB\-mrdrnd\fR" 4
|
13352 |
|
|
.IX Item "-mrdrnd"
|
13353 |
|
|
.IP "\fB\-mno\-rdrnd\fR" 4
|
13354 |
|
|
.IX Item "-mno-rdrnd"
|
13355 |
|
|
.IP "\fB\-mf16c\fR" 4
|
13356 |
|
|
.IX Item "-mf16c"
|
13357 |
|
|
.IP "\fB\-mno\-f16c\fR" 4
|
13358 |
|
|
.IX Item "-mno-f16c"
|
13359 |
|
|
.IP "\fB\-mfma\fR" 4
|
13360 |
|
|
.IX Item "-mfma"
|
13361 |
|
|
.IP "\fB\-mno\-fma\fR" 4
|
13362 |
|
|
.IX Item "-mno-fma"
|
13363 |
|
|
.IP "\fB\-msse4a\fR" 4
|
13364 |
|
|
.IX Item "-msse4a"
|
13365 |
|
|
.IP "\fB\-mno\-sse4a\fR" 4
|
13366 |
|
|
.IX Item "-mno-sse4a"
|
13367 |
|
|
.IP "\fB\-mfma4\fR" 4
|
13368 |
|
|
.IX Item "-mfma4"
|
13369 |
|
|
.IP "\fB\-mno\-fma4\fR" 4
|
13370 |
|
|
.IX Item "-mno-fma4"
|
13371 |
|
|
.IP "\fB\-mxop\fR" 4
|
13372 |
|
|
.IX Item "-mxop"
|
13373 |
|
|
.IP "\fB\-mno\-xop\fR" 4
|
13374 |
|
|
.IX Item "-mno-xop"
|
13375 |
|
|
.IP "\fB\-mlwp\fR" 4
|
13376 |
|
|
.IX Item "-mlwp"
|
13377 |
|
|
.IP "\fB\-mno\-lwp\fR" 4
|
13378 |
|
|
.IX Item "-mno-lwp"
|
13379 |
|
|
.IP "\fB\-m3dnow\fR" 4
|
13380 |
|
|
.IX Item "-m3dnow"
|
13381 |
|
|
.IP "\fB\-mno\-3dnow\fR" 4
|
13382 |
|
|
.IX Item "-mno-3dnow"
|
13383 |
|
|
.IP "\fB\-mpopcnt\fR" 4
|
13384 |
|
|
.IX Item "-mpopcnt"
|
13385 |
|
|
.IP "\fB\-mno\-popcnt\fR" 4
|
13386 |
|
|
.IX Item "-mno-popcnt"
|
13387 |
|
|
.IP "\fB\-mabm\fR" 4
|
13388 |
|
|
.IX Item "-mabm"
|
13389 |
|
|
.IP "\fB\-mno\-abm\fR" 4
|
13390 |
|
|
.IX Item "-mno-abm"
|
13391 |
|
|
.IP "\fB\-mbmi\fR" 4
|
13392 |
|
|
.IX Item "-mbmi"
|
13393 |
|
|
.IP "\fB\-mbmi2\fR" 4
|
13394 |
|
|
.IX Item "-mbmi2"
|
13395 |
|
|
.IP "\fB\-mno\-bmi\fR" 4
|
13396 |
|
|
.IX Item "-mno-bmi"
|
13397 |
|
|
.IP "\fB\-mno\-bmi2\fR" 4
|
13398 |
|
|
.IX Item "-mno-bmi2"
|
13399 |
|
|
.IP "\fB\-mlzcnt\fR" 4
|
13400 |
|
|
.IX Item "-mlzcnt"
|
13401 |
|
|
.IP "\fB\-mno\-lzcnt\fR" 4
|
13402 |
|
|
.IX Item "-mno-lzcnt"
|
13403 |
|
|
.IP "\fB\-mrtm\fR" 4
|
13404 |
|
|
.IX Item "-mrtm"
|
13405 |
|
|
.IP "\fB\-mtbm\fR" 4
|
13406 |
|
|
.IX Item "-mtbm"
|
13407 |
|
|
.IP "\fB\-mno\-tbm\fR" 4
|
13408 |
|
|
.IX Item "-mno-tbm"
|
13409 |
|
|
.PD
|
13410 |
|
|
These switches enable or disable the use of instructions in the \s-1MMX\s0, \s-1SSE\s0,
|
13411 |
|
|
\&\s-1SSE2\s0, \s-1SSE3\s0, \s-1SSSE3\s0, \s-1SSE4\s0.1, \s-1AVX\s0, \s-1AVX2\s0, \s-1AES\s0, \s-1PCLMUL\s0, \s-1FSGSBASE\s0, \s-1RDRND\s0, F16C,
|
13412 |
|
|
\&\s-1FMA\s0, \s-1SSE4A\s0, \s-1FMA4\s0, \s-1XOP\s0, \s-1LWP\s0, \s-1ABM\s0, \s-1BMI\s0, \s-1BMI2\s0, \s-1LZCNT\s0, \s-1RTM\s0 or 3DNow!
|
13413 |
|
|
extended instruction sets.
|
13414 |
|
|
These extensions are also available as built-in functions: see
|
13415 |
|
|
\&\fBX86 Built-in Functions\fR, for details of the functions enabled and
|
13416 |
|
|
disabled by these switches.
|
13417 |
|
|
.Sp
|
13418 |
|
|
To generate \s-1SSE/SSE2\s0 instructions automatically from floating-point
|
13419 |
|
|
code (as opposed to 387 instructions), see \fB\-mfpmath=sse\fR.
|
13420 |
|
|
.Sp
|
13421 |
|
|
\&\s-1GCC\s0 depresses SSEx instructions when \fB\-mavx\fR is used. Instead, it
|
13422 |
|
|
generates new \s-1AVX\s0 instructions or \s-1AVX\s0 equivalence for all SSEx instructions
|
13423 |
|
|
when needed.
|
13424 |
|
|
.Sp
|
13425 |
|
|
These options enable \s-1GCC\s0 to use these extended instructions in
|
13426 |
|
|
generated code, even without \fB\-mfpmath=sse\fR. Applications that
|
13427 |
|
|
perform run-time \s-1CPU\s0 detection must compile separate files for each
|
13428 |
|
|
supported architecture, using the appropriate flags. In particular,
|
13429 |
|
|
the file containing the \s-1CPU\s0 detection code should be compiled without
|
13430 |
|
|
these options.
|
13431 |
|
|
.IP "\fB\-mcld\fR" 4
|
13432 |
|
|
.IX Item "-mcld"
|
13433 |
|
|
This option instructs \s-1GCC\s0 to emit a \f(CW\*(C`cld\*(C'\fR instruction in the prologue
|
13434 |
|
|
of functions that use string instructions. String instructions depend on
|
13435 |
|
|
the \s-1DF\s0 flag to select between autoincrement or autodecrement mode. While the
|
13436 |
|
|
\&\s-1ABI\s0 specifies the \s-1DF\s0 flag to be cleared on function entry, some operating
|
13437 |
|
|
systems violate this specification by not clearing the \s-1DF\s0 flag in their
|
13438 |
|
|
exception dispatchers. The exception handler can be invoked with the \s-1DF\s0 flag
|
13439 |
|
|
set, which leads to wrong direction mode when string instructions are used.
|
13440 |
|
|
This option can be enabled by default on 32\-bit x86 targets by configuring
|
13441 |
|
|
\&\s-1GCC\s0 with the \fB\-\-enable\-cld\fR configure option. Generation of \f(CW\*(C`cld\*(C'\fR
|
13442 |
|
|
instructions can be suppressed with the \fB\-mno\-cld\fR compiler option
|
13443 |
|
|
in this case.
|
13444 |
|
|
.IP "\fB\-mvzeroupper\fR" 4
|
13445 |
|
|
.IX Item "-mvzeroupper"
|
13446 |
|
|
This option instructs \s-1GCC\s0 to emit a \f(CW\*(C`vzeroupper\*(C'\fR instruction
|
13447 |
|
|
before a transfer of control flow out of the function to minimize
|
13448 |
|
|
the \s-1AVX\s0 to \s-1SSE\s0 transition penalty as well as remove unnecessary \f(CW\*(C`zeroupper\*(C'\fR
|
13449 |
|
|
intrinsics.
|
13450 |
|
|
.IP "\fB\-mprefer\-avx128\fR" 4
|
13451 |
|
|
.IX Item "-mprefer-avx128"
|
13452 |
|
|
This option instructs \s-1GCC\s0 to use 128\-bit \s-1AVX\s0 instructions instead of
|
13453 |
|
|
256\-bit \s-1AVX\s0 instructions in the auto-vectorizer.
|
13454 |
|
|
.IP "\fB\-mcx16\fR" 4
|
13455 |
|
|
.IX Item "-mcx16"
|
13456 |
|
|
This option enables \s-1GCC\s0 to generate \f(CW\*(C`CMPXCHG16B\*(C'\fR instructions.
|
13457 |
|
|
\&\f(CW\*(C`CMPXCHG16B\*(C'\fR allows for atomic operations on 128\-bit double quadword
|
13458 |
|
|
(or oword) data types.
|
13459 |
|
|
This is useful for high-resolution counters that can be updated
|
13460 |
|
|
by multiple processors (or cores). This instruction is generated as part of
|
13461 |
|
|
atomic built-in functions: see \fB_\|_sync Builtins\fR or
|
13462 |
|
|
\&\fB_\|_atomic Builtins\fR for details.
|
13463 |
|
|
.IP "\fB\-msahf\fR" 4
|
13464 |
|
|
.IX Item "-msahf"
|
13465 |
|
|
This option enables generation of \f(CW\*(C`SAHF\*(C'\fR instructions in 64\-bit code.
|
13466 |
|
|
Early Intel Pentium 4 CPUs with Intel 64 support,
|
13467 |
|
|
prior to the introduction of Pentium 4 G1 step in December 2005,
|
13468 |
|
|
lacked the \f(CW\*(C`LAHF\*(C'\fR and \f(CW\*(C`SAHF\*(C'\fR instructions
|
13469 |
|
|
which were supported by \s-1AMD64\s0.
|
13470 |
|
|
These are load and store instructions, respectively, for certain status flags.
|
13471 |
|
|
In 64\-bit mode, the \f(CW\*(C`SAHF\*(C'\fR instruction is used to optimize \f(CW\*(C`fmod\*(C'\fR,
|
13472 |
|
|
\&\f(CW\*(C`drem\*(C'\fR, and \f(CW\*(C`remainder\*(C'\fR built-in functions;
|
13473 |
|
|
see \fBOther Builtins\fR for details.
|
13474 |
|
|
.IP "\fB\-mmovbe\fR" 4
|
13475 |
|
|
.IX Item "-mmovbe"
|
13476 |
|
|
This option enables use of the \f(CW\*(C`movbe\*(C'\fR instruction to implement
|
13477 |
|
|
\&\f(CW\*(C`_\|_builtin_bswap32\*(C'\fR and \f(CW\*(C`_\|_builtin_bswap64\*(C'\fR.
|
13478 |
|
|
.IP "\fB\-mcrc32\fR" 4
|
13479 |
|
|
.IX Item "-mcrc32"
|
13480 |
|
|
This option enables built-in functions \f(CW\*(C`_\|_builtin_ia32_crc32qi\*(C'\fR,
|
13481 |
|
|
\&\f(CW\*(C`_\|_builtin_ia32_crc32hi\*(C'\fR, \f(CW\*(C`_\|_builtin_ia32_crc32si\*(C'\fR and
|
13482 |
|
|
\&\f(CW\*(C`_\|_builtin_ia32_crc32di\*(C'\fR to generate the \f(CW\*(C`crc32\*(C'\fR machine instruction.
|
13483 |
|
|
.IP "\fB\-mrecip\fR" 4
|
13484 |
|
|
.IX Item "-mrecip"
|
13485 |
|
|
This option enables use of \f(CW\*(C`RCPSS\*(C'\fR and \f(CW\*(C`RSQRTSS\*(C'\fR instructions
|
13486 |
|
|
(and their vectorized variants \f(CW\*(C`RCPPS\*(C'\fR and \f(CW\*(C`RSQRTPS\*(C'\fR)
|
13487 |
|
|
with an additional Newton-Raphson step
|
13488 |
|
|
to increase precision instead of \f(CW\*(C`DIVSS\*(C'\fR and \f(CW\*(C`SQRTSS\*(C'\fR
|
13489 |
|
|
(and their vectorized
|
13490 |
|
|
variants) for single-precision floating-point arguments. These instructions
|
13491 |
|
|
are generated only when \fB\-funsafe\-math\-optimizations\fR is enabled
|
13492 |
|
|
together with \fB\-finite\-math\-only\fR and \fB\-fno\-trapping\-math\fR.
|
13493 |
|
|
Note that while the throughput of the sequence is higher than the throughput
|
13494 |
|
|
of the non-reciprocal instruction, the precision of the sequence can be
|
13495 |
|
|
decreased by up to 2 ulp (i.e. the inverse of 1.0 equals 0.99999994).
|
13496 |
|
|
.Sp
|
13497 |
|
|
Note that \s-1GCC\s0 implements \f(CW\*(C`1.0f/sqrtf(\f(CIx\f(CW)\*(C'\fR in terms of \f(CW\*(C`RSQRTSS\*(C'\fR
|
13498 |
|
|
(or \f(CW\*(C`RSQRTPS\*(C'\fR) already with \fB\-ffast\-math\fR (or the above option
|
13499 |
|
|
combination), and doesn't need \fB\-mrecip\fR.
|
13500 |
|
|
.Sp
|
13501 |
|
|
Also note that \s-1GCC\s0 emits the above sequence with additional Newton-Raphson step
|
13502 |
|
|
for vectorized single-float division and vectorized \f(CW\*(C`sqrtf(\f(CIx\f(CW)\*(C'\fR
|
13503 |
|
|
already with \fB\-ffast\-math\fR (or the above option combination), and
|
13504 |
|
|
doesn't need \fB\-mrecip\fR.
|
13505 |
|
|
.IP "\fB\-mrecip=\fR\fIopt\fR" 4
|
13506 |
|
|
.IX Item "-mrecip=opt"
|
13507 |
|
|
This option controls which reciprocal estimate instructions
|
13508 |
|
|
may be used. \fIopt\fR is a comma-separated list of options, which may
|
13509 |
|
|
be preceded by a \fB!\fR to invert the option:
|
13510 |
|
|
.RS 4
|
13511 |
|
|
.IP "\fBall\fR" 4
|
13512 |
|
|
.IX Item "all"
|
13513 |
|
|
Enable all estimate instructions.
|
13514 |
|
|
.IP "\fBdefault\fR" 4
|
13515 |
|
|
.IX Item "default"
|
13516 |
|
|
Enable the default instructions, equivalent to \fB\-mrecip\fR.
|
13517 |
|
|
.IP "\fBnone\fR" 4
|
13518 |
|
|
.IX Item "none"
|
13519 |
|
|
Disable all estimate instructions, equivalent to \fB\-mno\-recip\fR.
|
13520 |
|
|
.IP "\fBdiv\fR" 4
|
13521 |
|
|
.IX Item "div"
|
13522 |
|
|
Enable the approximation for scalar division.
|
13523 |
|
|
.IP "\fBvec-div\fR" 4
|
13524 |
|
|
.IX Item "vec-div"
|
13525 |
|
|
Enable the approximation for vectorized division.
|
13526 |
|
|
.IP "\fBsqrt\fR" 4
|
13527 |
|
|
.IX Item "sqrt"
|
13528 |
|
|
Enable the approximation for scalar square root.
|
13529 |
|
|
.IP "\fBvec-sqrt\fR" 4
|
13530 |
|
|
.IX Item "vec-sqrt"
|
13531 |
|
|
Enable the approximation for vectorized square root.
|
13532 |
|
|
.RE
|
13533 |
|
|
.RS 4
|
13534 |
|
|
.Sp
|
13535 |
|
|
So, for example, \fB\-mrecip=all,!sqrt\fR enables
|
13536 |
|
|
all of the reciprocal approximations, except for square root.
|
13537 |
|
|
.RE
|
13538 |
|
|
.IP "\fB\-mveclibabi=\fR\fItype\fR" 4
|
13539 |
|
|
.IX Item "-mveclibabi=type"
|
13540 |
|
|
Specifies the \s-1ABI\s0 type to use for vectorizing intrinsics using an
|
13541 |
|
|
external library. Supported values for \fItype\fR are \fBsvml\fR
|
13542 |
|
|
for the Intel short
|
13543 |
|
|
vector math library and \fBacml\fR for the \s-1AMD\s0 math core library.
|
13544 |
|
|
To use this option, both \fB\-ftree\-vectorize\fR and
|
13545 |
|
|
\&\fB\-funsafe\-math\-optimizations\fR have to be enabled, and an \s-1SVML\s0 or \s-1ACML\s0
|
13546 |
|
|
ABI-compatible library must be specified at link time.
|
13547 |
|
|
.Sp
|
13548 |
|
|
\&\s-1GCC\s0 currently emits calls to \f(CW\*(C`vmldExp2\*(C'\fR,
|
13549 |
|
|
\&\f(CW\*(C`vmldLn2\*(C'\fR, \f(CW\*(C`vmldLog102\*(C'\fR, \f(CW\*(C`vmldLog102\*(C'\fR, \f(CW\*(C`vmldPow2\*(C'\fR,
|
13550 |
|
|
\&\f(CW\*(C`vmldTanh2\*(C'\fR, \f(CW\*(C`vmldTan2\*(C'\fR, \f(CW\*(C`vmldAtan2\*(C'\fR, \f(CW\*(C`vmldAtanh2\*(C'\fR,
|
13551 |
|
|
\&\f(CW\*(C`vmldCbrt2\*(C'\fR, \f(CW\*(C`vmldSinh2\*(C'\fR, \f(CW\*(C`vmldSin2\*(C'\fR, \f(CW\*(C`vmldAsinh2\*(C'\fR,
|
13552 |
|
|
\&\f(CW\*(C`vmldAsin2\*(C'\fR, \f(CW\*(C`vmldCosh2\*(C'\fR, \f(CW\*(C`vmldCos2\*(C'\fR, \f(CW\*(C`vmldAcosh2\*(C'\fR,
|
13553 |
|
|
\&\f(CW\*(C`vmldAcos2\*(C'\fR, \f(CW\*(C`vmlsExp4\*(C'\fR, \f(CW\*(C`vmlsLn4\*(C'\fR, \f(CW\*(C`vmlsLog104\*(C'\fR,
|
13554 |
|
|
\&\f(CW\*(C`vmlsLog104\*(C'\fR, \f(CW\*(C`vmlsPow4\*(C'\fR, \f(CW\*(C`vmlsTanh4\*(C'\fR, \f(CW\*(C`vmlsTan4\*(C'\fR,
|
13555 |
|
|
\&\f(CW\*(C`vmlsAtan4\*(C'\fR, \f(CW\*(C`vmlsAtanh4\*(C'\fR, \f(CW\*(C`vmlsCbrt4\*(C'\fR, \f(CW\*(C`vmlsSinh4\*(C'\fR,
|
13556 |
|
|
\&\f(CW\*(C`vmlsSin4\*(C'\fR, \f(CW\*(C`vmlsAsinh4\*(C'\fR, \f(CW\*(C`vmlsAsin4\*(C'\fR, \f(CW\*(C`vmlsCosh4\*(C'\fR,
|
13557 |
|
|
\&\f(CW\*(C`vmlsCos4\*(C'\fR, \f(CW\*(C`vmlsAcosh4\*(C'\fR and \f(CW\*(C`vmlsAcos4\*(C'\fR for corresponding
|
13558 |
|
|
function type when \fB\-mveclibabi=svml\fR is used, and \f(CW\*(C`_\|_vrd2_sin\*(C'\fR,
|
13559 |
|
|
\&\f(CW\*(C`_\|_vrd2_cos\*(C'\fR, \f(CW\*(C`_\|_vrd2_exp\*(C'\fR, \f(CW\*(C`_\|_vrd2_log\*(C'\fR, \f(CW\*(C`_\|_vrd2_log2\*(C'\fR,
|
13560 |
|
|
\&\f(CW\*(C`_\|_vrd2_log10\*(C'\fR, \f(CW\*(C`_\|_vrs4_sinf\*(C'\fR, \f(CW\*(C`_\|_vrs4_cosf\*(C'\fR,
|
13561 |
|
|
\&\f(CW\*(C`_\|_vrs4_expf\*(C'\fR, \f(CW\*(C`_\|_vrs4_logf\*(C'\fR, \f(CW\*(C`_\|_vrs4_log2f\*(C'\fR,
|
13562 |
|
|
\&\f(CW\*(C`_\|_vrs4_log10f\*(C'\fR and \f(CW\*(C`_\|_vrs4_powf\*(C'\fR for the corresponding function type
|
13563 |
|
|
when \fB\-mveclibabi=acml\fR is used.
|
13564 |
|
|
.IP "\fB\-mabi=\fR\fIname\fR" 4
|
13565 |
|
|
.IX Item "-mabi=name"
|
13566 |
|
|
Generate code for the specified calling convention. Permissible values
|
13567 |
|
|
are \fBsysv\fR for the \s-1ABI\s0 used on GNU/Linux and other systems, and
|
13568 |
|
|
\&\fBms\fR for the Microsoft \s-1ABI\s0. The default is to use the Microsoft
|
13569 |
|
|
\&\s-1ABI\s0 when targeting Microsoft Windows and the SysV \s-1ABI\s0 on all other systems.
|
13570 |
|
|
You can control this behavior for a specific function by
|
13571 |
|
|
using the function attribute \fBms_abi\fR/\fBsysv_abi\fR.
|
13572 |
|
|
.IP "\fB\-mtls\-dialect=\fR\fItype\fR" 4
|
13573 |
|
|
.IX Item "-mtls-dialect=type"
|
13574 |
|
|
Generate code to access thread-local storage using the \fBgnu\fR or
|
13575 |
|
|
\&\fBgnu2\fR conventions. \fBgnu\fR is the conservative default;
|
13576 |
|
|
\&\fBgnu2\fR is more efficient, but it may add compile\- and run-time
|
13577 |
|
|
requirements that cannot be satisfied on all systems.
|
13578 |
|
|
.IP "\fB\-mpush\-args\fR" 4
|
13579 |
|
|
.IX Item "-mpush-args"
|
13580 |
|
|
.PD 0
|
13581 |
|
|
.IP "\fB\-mno\-push\-args\fR" 4
|
13582 |
|
|
.IX Item "-mno-push-args"
|
13583 |
|
|
.PD
|
13584 |
|
|
Use \s-1PUSH\s0 operations to store outgoing parameters. This method is shorter
|
13585 |
|
|
and usually equally fast as method using \s-1SUB/MOV\s0 operations and is enabled
|
13586 |
|
|
by default. In some cases disabling it may improve performance because of
|
13587 |
|
|
improved scheduling and reduced dependencies.
|
13588 |
|
|
.IP "\fB\-maccumulate\-outgoing\-args\fR" 4
|
13589 |
|
|
.IX Item "-maccumulate-outgoing-args"
|
13590 |
|
|
If enabled, the maximum amount of space required for outgoing arguments is
|
13591 |
|
|
computed in the function prologue. This is faster on most modern CPUs
|
13592 |
|
|
because of reduced dependencies, improved scheduling and reduced stack usage
|
13593 |
|
|
when the preferred stack boundary is not equal to 2. The drawback is a notable
|
13594 |
|
|
increase in code size. This switch implies \fB\-mno\-push\-args\fR.
|
13595 |
|
|
.IP "\fB\-mthreads\fR" 4
|
13596 |
|
|
.IX Item "-mthreads"
|
13597 |
|
|
Support thread-safe exception handling on MinGW. Programs that rely
|
13598 |
|
|
on thread-safe exception handling must compile and link all code with the
|
13599 |
|
|
\&\fB\-mthreads\fR option. When compiling, \fB\-mthreads\fR defines
|
13600 |
|
|
\&\f(CW\*(C`\-D_MT\*(C'\fR; when linking, it links in a special thread helper library
|
13601 |
|
|
\&\fB\-lmingwthrd\fR which cleans up per-thread exception-handling data.
|
13602 |
|
|
.IP "\fB\-mno\-align\-stringops\fR" 4
|
13603 |
|
|
.IX Item "-mno-align-stringops"
|
13604 |
|
|
Do not align the destination of inlined string operations. This switch reduces
|
13605 |
|
|
code size and improves performance in case the destination is already aligned,
|
13606 |
|
|
but \s-1GCC\s0 doesn't know about it.
|
13607 |
|
|
.IP "\fB\-minline\-all\-stringops\fR" 4
|
13608 |
|
|
.IX Item "-minline-all-stringops"
|
13609 |
|
|
By default \s-1GCC\s0 inlines string operations only when the destination is
|
13610 |
|
|
known to be aligned to least a 4\-byte boundary.
|
13611 |
|
|
This enables more inlining and increases code
|
13612 |
|
|
size, but may improve performance of code that depends on fast
|
13613 |
|
|
\&\f(CW\*(C`memcpy\*(C'\fR, \f(CW\*(C`strlen\*(C'\fR,
|
13614 |
|
|
and \f(CW\*(C`memset\*(C'\fR for short lengths.
|
13615 |
|
|
.IP "\fB\-minline\-stringops\-dynamically\fR" 4
|
13616 |
|
|
.IX Item "-minline-stringops-dynamically"
|
13617 |
|
|
For string operations of unknown size, use run-time checks with
|
13618 |
|
|
inline code for small blocks and a library call for large blocks.
|
13619 |
|
|
.IP "\fB\-mstringop\-strategy=\fR\fIalg\fR" 4
|
13620 |
|
|
.IX Item "-mstringop-strategy=alg"
|
13621 |
|
|
Override the internal decision heuristic for the particular algorithm to use
|
13622 |
|
|
for inlining string operations. The allowed values for \fIalg\fR are:
|
13623 |
|
|
.RS 4
|
13624 |
|
|
.IP "\fBrep_byte\fR" 4
|
13625 |
|
|
.IX Item "rep_byte"
|
13626 |
|
|
.PD 0
|
13627 |
|
|
.IP "\fBrep_4byte\fR" 4
|
13628 |
|
|
.IX Item "rep_4byte"
|
13629 |
|
|
.IP "\fBrep_8byte\fR" 4
|
13630 |
|
|
.IX Item "rep_8byte"
|
13631 |
|
|
.PD
|
13632 |
|
|
Expand using i386 \f(CW\*(C`rep\*(C'\fR prefix of the specified size.
|
13633 |
|
|
.IP "\fBbyte_loop\fR" 4
|
13634 |
|
|
.IX Item "byte_loop"
|
13635 |
|
|
.PD 0
|
13636 |
|
|
.IP "\fBloop\fR" 4
|
13637 |
|
|
.IX Item "loop"
|
13638 |
|
|
.IP "\fBunrolled_loop\fR" 4
|
13639 |
|
|
.IX Item "unrolled_loop"
|
13640 |
|
|
.PD
|
13641 |
|
|
Expand into an inline loop.
|
13642 |
|
|
.IP "\fBlibcall\fR" 4
|
13643 |
|
|
.IX Item "libcall"
|
13644 |
|
|
Always use a library call.
|
13645 |
|
|
.RE
|
13646 |
|
|
.RS 4
|
13647 |
|
|
.RE
|
13648 |
|
|
.IP "\fB\-momit\-leaf\-frame\-pointer\fR" 4
|
13649 |
|
|
.IX Item "-momit-leaf-frame-pointer"
|
13650 |
|
|
Don't keep the frame pointer in a register for leaf functions. This
|
13651 |
|
|
avoids the instructions to save, set up, and restore frame pointers and
|
13652 |
|
|
makes an extra register available in leaf functions. The option
|
13653 |
|
|
\&\fB\-fomit\-leaf\-frame\-pointer\fR removes the frame pointer for leaf functions,
|
13654 |
|
|
which might make debugging harder.
|
13655 |
|
|
.IP "\fB\-mtls\-direct\-seg\-refs\fR" 4
|
13656 |
|
|
.IX Item "-mtls-direct-seg-refs"
|
13657 |
|
|
.PD 0
|
13658 |
|
|
.IP "\fB\-mno\-tls\-direct\-seg\-refs\fR" 4
|
13659 |
|
|
.IX Item "-mno-tls-direct-seg-refs"
|
13660 |
|
|
.PD
|
13661 |
|
|
Controls whether \s-1TLS\s0 variables may be accessed with offsets from the
|
13662 |
|
|
\&\s-1TLS\s0 segment register (\f(CW%gs\fR for 32\-bit, \f(CW%fs\fR for 64\-bit),
|
13663 |
|
|
or whether the thread base pointer must be added. Whether or not this
|
13664 |
|
|
is valid depends on the operating system, and whether it maps the
|
13665 |
|
|
segment to cover the entire \s-1TLS\s0 area.
|
13666 |
|
|
.Sp
|
13667 |
|
|
For systems that use the \s-1GNU\s0 C Library, the default is on.
|
13668 |
|
|
.IP "\fB\-msse2avx\fR" 4
|
13669 |
|
|
.IX Item "-msse2avx"
|
13670 |
|
|
.PD 0
|
13671 |
|
|
.IP "\fB\-mno\-sse2avx\fR" 4
|
13672 |
|
|
.IX Item "-mno-sse2avx"
|
13673 |
|
|
.PD
|
13674 |
|
|
Specify that the assembler should encode \s-1SSE\s0 instructions with \s-1VEX\s0
|
13675 |
|
|
prefix. The option \fB\-mavx\fR turns this on by default.
|
13676 |
|
|
.IP "\fB\-mfentry\fR" 4
|
13677 |
|
|
.IX Item "-mfentry"
|
13678 |
|
|
.PD 0
|
13679 |
|
|
.IP "\fB\-mno\-fentry\fR" 4
|
13680 |
|
|
.IX Item "-mno-fentry"
|
13681 |
|
|
.PD
|
13682 |
|
|
If profiling is active (\fB\-pg\fR), put the profiling
|
13683 |
|
|
counter call before the prologue.
|
13684 |
|
|
Note: On x86 architectures the attribute \f(CW\*(C`ms_hook_prologue\*(C'\fR
|
13685 |
|
|
isn't possible at the moment for \fB\-mfentry\fR and \fB\-pg\fR.
|
13686 |
|
|
.IP "\fB\-m8bit\-idiv\fR" 4
|
13687 |
|
|
.IX Item "-m8bit-idiv"
|
13688 |
|
|
.PD 0
|
13689 |
|
|
.IP "\fB\-mno\-8bit\-idiv\fR" 4
|
13690 |
|
|
.IX Item "-mno-8bit-idiv"
|
13691 |
|
|
.PD
|
13692 |
|
|
On some processors, like Intel Atom, 8\-bit unsigned integer divide is
|
13693 |
|
|
much faster than 32\-bit/64\-bit integer divide. This option generates a
|
13694 |
|
|
run-time check. If both dividend and divisor are within range of 0
|
13695 |
|
|
to 255, 8\-bit unsigned integer divide is used instead of
|
13696 |
|
|
32\-bit/64\-bit integer divide.
|
13697 |
|
|
.IP "\fB\-mavx256\-split\-unaligned\-load\fR" 4
|
13698 |
|
|
.IX Item "-mavx256-split-unaligned-load"
|
13699 |
|
|
.PD 0
|
13700 |
|
|
.IP "\fB\-mavx256\-split\-unaligned\-store\fR" 4
|
13701 |
|
|
.IX Item "-mavx256-split-unaligned-store"
|
13702 |
|
|
.PD
|
13703 |
|
|
Split 32\-byte \s-1AVX\s0 unaligned load and store.
|
13704 |
|
|
.PP
|
13705 |
|
|
These \fB\-m\fR switches are supported in addition to the above
|
13706 |
|
|
on x86\-64 processors in 64\-bit environments.
|
13707 |
|
|
.IP "\fB\-m32\fR" 4
|
13708 |
|
|
.IX Item "-m32"
|
13709 |
|
|
.PD 0
|
13710 |
|
|
.IP "\fB\-m64\fR" 4
|
13711 |
|
|
.IX Item "-m64"
|
13712 |
|
|
.IP "\fB\-mx32\fR" 4
|
13713 |
|
|
.IX Item "-mx32"
|
13714 |
|
|
.PD
|
13715 |
|
|
Generate code for a 32\-bit or 64\-bit environment.
|
13716 |
|
|
The \fB\-m32\fR option sets \f(CW\*(C`int\*(C'\fR, \f(CW\*(C`long\*(C'\fR, and pointer types
|
13717 |
|
|
to 32 bits, and
|
13718 |
|
|
generates code that runs on any i386 system.
|
13719 |
|
|
.Sp
|
13720 |
|
|
The \fB\-m64\fR option sets \f(CW\*(C`int\*(C'\fR to 32 bits and \f(CW\*(C`long\*(C'\fR and pointer
|
13721 |
|
|
types to 64 bits, and generates code for the x86\-64 architecture.
|
13722 |
|
|
For Darwin only the \fB\-m64\fR option also turns off the \fB\-fno\-pic\fR
|
13723 |
|
|
and \fB\-mdynamic\-no\-pic\fR options.
|
13724 |
|
|
.Sp
|
13725 |
|
|
The \fB\-mx32\fR option sets \f(CW\*(C`int\*(C'\fR, \f(CW\*(C`long\*(C'\fR, and pointer types
|
13726 |
|
|
to 32 bits, and
|
13727 |
|
|
generates code for the x86\-64 architecture.
|
13728 |
|
|
.IP "\fB\-mno\-red\-zone\fR" 4
|
13729 |
|
|
.IX Item "-mno-red-zone"
|
13730 |
|
|
Do not use a so-called \*(L"red zone\*(R" for x86\-64 code. The red zone is mandated
|
13731 |
|
|
by the x86\-64 \s-1ABI\s0; it is a 128\-byte area beyond the location of the
|
13732 |
|
|
stack pointer that is not modified by signal or interrupt handlers
|
13733 |
|
|
and therefore can be used for temporary data without adjusting the stack
|
13734 |
|
|
pointer. The flag \fB\-mno\-red\-zone\fR disables this red zone.
|
13735 |
|
|
.IP "\fB\-mcmodel=small\fR" 4
|
13736 |
|
|
.IX Item "-mcmodel=small"
|
13737 |
|
|
Generate code for the small code model: the program and its symbols must
|
13738 |
|
|
be linked in the lower 2 \s-1GB\s0 of the address space. Pointers are 64 bits.
|
13739 |
|
|
Programs can be statically or dynamically linked. This is the default
|
13740 |
|
|
code model.
|
13741 |
|
|
.IP "\fB\-mcmodel=kernel\fR" 4
|
13742 |
|
|
.IX Item "-mcmodel=kernel"
|
13743 |
|
|
Generate code for the kernel code model. The kernel runs in the
|
13744 |
|
|
negative 2 \s-1GB\s0 of the address space.
|
13745 |
|
|
This model has to be used for Linux kernel code.
|
13746 |
|
|
.IP "\fB\-mcmodel=medium\fR" 4
|
13747 |
|
|
.IX Item "-mcmodel=medium"
|
13748 |
|
|
Generate code for the medium model: the program is linked in the lower 2
|
13749 |
|
|
\&\s-1GB\s0 of the address space. Small symbols are also placed there. Symbols
|
13750 |
|
|
with sizes larger than \fB\-mlarge\-data\-threshold\fR are put into
|
13751 |
|
|
large data or \s-1BSS\s0 sections and can be located above 2GB. Programs can
|
13752 |
|
|
be statically or dynamically linked.
|
13753 |
|
|
.IP "\fB\-mcmodel=large\fR" 4
|
13754 |
|
|
.IX Item "-mcmodel=large"
|
13755 |
|
|
Generate code for the large model. This model makes no assumptions
|
13756 |
|
|
about addresses and sizes of sections.
|
13757 |
|
|
.IP "\fB\-maddress\-mode=long\fR" 4
|
13758 |
|
|
.IX Item "-maddress-mode=long"
|
13759 |
|
|
Generate code for long address mode. This is only supported for 64\-bit
|
13760 |
|
|
and x32 environments. It is the default address mode for 64\-bit
|
13761 |
|
|
environments.
|
13762 |
|
|
.IP "\fB\-maddress\-mode=short\fR" 4
|
13763 |
|
|
.IX Item "-maddress-mode=short"
|
13764 |
|
|
Generate code for short address mode. This is only supported for 32\-bit
|
13765 |
|
|
and x32 environments. It is the default address mode for 32\-bit and
|
13766 |
|
|
x32 environments.
|
13767 |
|
|
.PP
|
13768 |
|
|
\fIi386 and x86\-64 Windows Options\fR
|
13769 |
|
|
.IX Subsection "i386 and x86-64 Windows Options"
|
13770 |
|
|
.PP
|
13771 |
|
|
These additional options are available for Microsoft Windows targets:
|
13772 |
|
|
.IP "\fB\-mconsole\fR" 4
|
13773 |
|
|
.IX Item "-mconsole"
|
13774 |
|
|
This option
|
13775 |
|
|
specifies that a console application is to be generated, by
|
13776 |
|
|
instructing the linker to set the \s-1PE\s0 header subsystem type
|
13777 |
|
|
required for console applications.
|
13778 |
|
|
This option is available for Cygwin and MinGW targets and is
|
13779 |
|
|
enabled by default on those targets.
|
13780 |
|
|
.IP "\fB\-mdll\fR" 4
|
13781 |
|
|
.IX Item "-mdll"
|
13782 |
|
|
This option is available for Cygwin and MinGW targets. It
|
13783 |
|
|
specifies that a DLL\-\-\-a dynamic link library\-\-\-is to be
|
13784 |
|
|
generated, enabling the selection of the required runtime
|
13785 |
|
|
startup object and entry point.
|
13786 |
|
|
.IP "\fB\-mnop\-fun\-dllimport\fR" 4
|
13787 |
|
|
.IX Item "-mnop-fun-dllimport"
|
13788 |
|
|
This option is available for Cygwin and MinGW targets. It
|
13789 |
|
|
specifies that the \f(CW\*(C`dllimport\*(C'\fR attribute should be ignored.
|
13790 |
|
|
.IP "\fB\-mthread\fR" 4
|
13791 |
|
|
.IX Item "-mthread"
|
13792 |
|
|
This option is available for MinGW targets. It specifies
|
13793 |
|
|
that MinGW-specific thread support is to be used.
|
13794 |
|
|
.IP "\fB\-municode\fR" 4
|
13795 |
|
|
.IX Item "-municode"
|
13796 |
|
|
This option is available for MinGW\-w64 targets. It causes
|
13797 |
|
|
the \f(CW\*(C`UNICODE\*(C'\fR preprocessor macro to be predefined, and
|
13798 |
|
|
chooses Unicode-capable runtime startup code.
|
13799 |
|
|
.IP "\fB\-mwin32\fR" 4
|
13800 |
|
|
.IX Item "-mwin32"
|
13801 |
|
|
This option is available for Cygwin and MinGW targets. It
|
13802 |
|
|
specifies that the typical Microsoft Windows predefined macros are to
|
13803 |
|
|
be set in the pre-processor, but does not influence the choice
|
13804 |
|
|
of runtime library/startup code.
|
13805 |
|
|
.IP "\fB\-mwindows\fR" 4
|
13806 |
|
|
.IX Item "-mwindows"
|
13807 |
|
|
This option is available for Cygwin and MinGW targets. It
|
13808 |
|
|
specifies that a \s-1GUI\s0 application is to be generated by
|
13809 |
|
|
instructing the linker to set the \s-1PE\s0 header subsystem type
|
13810 |
|
|
appropriately.
|
13811 |
|
|
.IP "\fB\-fno\-set\-stack\-executable\fR" 4
|
13812 |
|
|
.IX Item "-fno-set-stack-executable"
|
13813 |
|
|
This option is available for MinGW targets. It specifies that
|
13814 |
|
|
the executable flag for the stack used by nested functions isn't
|
13815 |
|
|
set. This is necessary for binaries running in kernel mode of
|
13816 |
|
|
Microsoft Windows, as there the User32 \s-1API\s0, which is used to set executable
|
13817 |
|
|
privileges, isn't available.
|
13818 |
|
|
.IP "\fB\-fwritable\-relocated\-rdata\fR" 4
|
13819 |
|
|
.IX Item "-fwritable-relocated-rdata"
|
13820 |
|
|
This option is available for MinGW and Cygwin targets. It specifies
|
13821 |
|
|
that relocated-data in read-only section is put into .data
|
13822 |
|
|
section. This is a necessary for older runtimes not supporting
|
13823 |
|
|
modification of .rdata sections for pseudo-relocation.
|
13824 |
|
|
.IP "\fB\-mpe\-aligned\-commons\fR" 4
|
13825 |
|
|
.IX Item "-mpe-aligned-commons"
|
13826 |
|
|
This option is available for Cygwin and MinGW targets. It
|
13827 |
|
|
specifies that the \s-1GNU\s0 extension to the \s-1PE\s0 file format that
|
13828 |
|
|
permits the correct alignment of \s-1COMMON\s0 variables should be
|
13829 |
|
|
used when generating code. It is enabled by default if
|
13830 |
|
|
\&\s-1GCC\s0 detects that the target assembler found during configuration
|
13831 |
|
|
supports the feature.
|
13832 |
|
|
.PP
|
13833 |
|
|
See also under \fBi386 and x86\-64 Options\fR for standard options.
|
13834 |
|
|
.PP
|
13835 |
|
|
\fI\s-1IA\-64\s0 Options\fR
|
13836 |
|
|
.IX Subsection "IA-64 Options"
|
13837 |
|
|
.PP
|
13838 |
|
|
These are the \fB\-m\fR options defined for the Intel \s-1IA\-64\s0 architecture.
|
13839 |
|
|
.IP "\fB\-mbig\-endian\fR" 4
|
13840 |
|
|
.IX Item "-mbig-endian"
|
13841 |
|
|
Generate code for a big-endian target. This is the default for HP-UX.
|
13842 |
|
|
.IP "\fB\-mlittle\-endian\fR" 4
|
13843 |
|
|
.IX Item "-mlittle-endian"
|
13844 |
|
|
Generate code for a little-endian target. This is the default for \s-1AIX5\s0
|
13845 |
|
|
and GNU/Linux.
|
13846 |
|
|
.IP "\fB\-mgnu\-as\fR" 4
|
13847 |
|
|
.IX Item "-mgnu-as"
|
13848 |
|
|
.PD 0
|
13849 |
|
|
.IP "\fB\-mno\-gnu\-as\fR" 4
|
13850 |
|
|
.IX Item "-mno-gnu-as"
|
13851 |
|
|
.PD
|
13852 |
|
|
Generate (or don't) code for the \s-1GNU\s0 assembler. This is the default.
|
13853 |
|
|
.IP "\fB\-mgnu\-ld\fR" 4
|
13854 |
|
|
.IX Item "-mgnu-ld"
|
13855 |
|
|
.PD 0
|
13856 |
|
|
.IP "\fB\-mno\-gnu\-ld\fR" 4
|
13857 |
|
|
.IX Item "-mno-gnu-ld"
|
13858 |
|
|
.PD
|
13859 |
|
|
Generate (or don't) code for the \s-1GNU\s0 linker. This is the default.
|
13860 |
|
|
.IP "\fB\-mno\-pic\fR" 4
|
13861 |
|
|
.IX Item "-mno-pic"
|
13862 |
|
|
Generate code that does not use a global pointer register. The result
|
13863 |
|
|
is not position independent code, and violates the \s-1IA\-64\s0 \s-1ABI\s0.
|
13864 |
|
|
.IP "\fB\-mvolatile\-asm\-stop\fR" 4
|
13865 |
|
|
.IX Item "-mvolatile-asm-stop"
|
13866 |
|
|
.PD 0
|
13867 |
|
|
.IP "\fB\-mno\-volatile\-asm\-stop\fR" 4
|
13868 |
|
|
.IX Item "-mno-volatile-asm-stop"
|
13869 |
|
|
.PD
|
13870 |
|
|
Generate (or don't) a stop bit immediately before and after volatile asm
|
13871 |
|
|
statements.
|
13872 |
|
|
.IP "\fB\-mregister\-names\fR" 4
|
13873 |
|
|
.IX Item "-mregister-names"
|
13874 |
|
|
.PD 0
|
13875 |
|
|
.IP "\fB\-mno\-register\-names\fR" 4
|
13876 |
|
|
.IX Item "-mno-register-names"
|
13877 |
|
|
.PD
|
13878 |
|
|
Generate (or don't) \fBin\fR, \fBloc\fR, and \fBout\fR register names for
|
13879 |
|
|
the stacked registers. This may make assembler output more readable.
|
13880 |
|
|
.IP "\fB\-mno\-sdata\fR" 4
|
13881 |
|
|
.IX Item "-mno-sdata"
|
13882 |
|
|
.PD 0
|
13883 |
|
|
.IP "\fB\-msdata\fR" 4
|
13884 |
|
|
.IX Item "-msdata"
|
13885 |
|
|
.PD
|
13886 |
|
|
Disable (or enable) optimizations that use the small data section. This may
|
13887 |
|
|
be useful for working around optimizer bugs.
|
13888 |
|
|
.IP "\fB\-mconstant\-gp\fR" 4
|
13889 |
|
|
.IX Item "-mconstant-gp"
|
13890 |
|
|
Generate code that uses a single constant global pointer value. This is
|
13891 |
|
|
useful when compiling kernel code.
|
13892 |
|
|
.IP "\fB\-mauto\-pic\fR" 4
|
13893 |
|
|
.IX Item "-mauto-pic"
|
13894 |
|
|
Generate code that is self-relocatable. This implies \fB\-mconstant\-gp\fR.
|
13895 |
|
|
This is useful when compiling firmware code.
|
13896 |
|
|
.IP "\fB\-minline\-float\-divide\-min\-latency\fR" 4
|
13897 |
|
|
.IX Item "-minline-float-divide-min-latency"
|
13898 |
|
|
Generate code for inline divides of floating-point values
|
13899 |
|
|
using the minimum latency algorithm.
|
13900 |
|
|
.IP "\fB\-minline\-float\-divide\-max\-throughput\fR" 4
|
13901 |
|
|
.IX Item "-minline-float-divide-max-throughput"
|
13902 |
|
|
Generate code for inline divides of floating-point values
|
13903 |
|
|
using the maximum throughput algorithm.
|
13904 |
|
|
.IP "\fB\-mno\-inline\-float\-divide\fR" 4
|
13905 |
|
|
.IX Item "-mno-inline-float-divide"
|
13906 |
|
|
Do not generate inline code for divides of floating-point values.
|
13907 |
|
|
.IP "\fB\-minline\-int\-divide\-min\-latency\fR" 4
|
13908 |
|
|
.IX Item "-minline-int-divide-min-latency"
|
13909 |
|
|
Generate code for inline divides of integer values
|
13910 |
|
|
using the minimum latency algorithm.
|
13911 |
|
|
.IP "\fB\-minline\-int\-divide\-max\-throughput\fR" 4
|
13912 |
|
|
.IX Item "-minline-int-divide-max-throughput"
|
13913 |
|
|
Generate code for inline divides of integer values
|
13914 |
|
|
using the maximum throughput algorithm.
|
13915 |
|
|
.IP "\fB\-mno\-inline\-int\-divide\fR" 4
|
13916 |
|
|
.IX Item "-mno-inline-int-divide"
|
13917 |
|
|
Do not generate inline code for divides of integer values.
|
13918 |
|
|
.IP "\fB\-minline\-sqrt\-min\-latency\fR" 4
|
13919 |
|
|
.IX Item "-minline-sqrt-min-latency"
|
13920 |
|
|
Generate code for inline square roots
|
13921 |
|
|
using the minimum latency algorithm.
|
13922 |
|
|
.IP "\fB\-minline\-sqrt\-max\-throughput\fR" 4
|
13923 |
|
|
.IX Item "-minline-sqrt-max-throughput"
|
13924 |
|
|
Generate code for inline square roots
|
13925 |
|
|
using the maximum throughput algorithm.
|
13926 |
|
|
.IP "\fB\-mno\-inline\-sqrt\fR" 4
|
13927 |
|
|
.IX Item "-mno-inline-sqrt"
|
13928 |
|
|
Do not generate inline code for \f(CW\*(C`sqrt\*(C'\fR.
|
13929 |
|
|
.IP "\fB\-mfused\-madd\fR" 4
|
13930 |
|
|
.IX Item "-mfused-madd"
|
13931 |
|
|
.PD 0
|
13932 |
|
|
.IP "\fB\-mno\-fused\-madd\fR" 4
|
13933 |
|
|
.IX Item "-mno-fused-madd"
|
13934 |
|
|
.PD
|
13935 |
|
|
Do (don't) generate code that uses the fused multiply/add or multiply/subtract
|
13936 |
|
|
instructions. The default is to use these instructions.
|
13937 |
|
|
.IP "\fB\-mno\-dwarf2\-asm\fR" 4
|
13938 |
|
|
.IX Item "-mno-dwarf2-asm"
|
13939 |
|
|
.PD 0
|
13940 |
|
|
.IP "\fB\-mdwarf2\-asm\fR" 4
|
13941 |
|
|
.IX Item "-mdwarf2-asm"
|
13942 |
|
|
.PD
|
13943 |
|
|
Don't (or do) generate assembler code for the \s-1DWARF\s0 2 line number debugging
|
13944 |
|
|
info. This may be useful when not using the \s-1GNU\s0 assembler.
|
13945 |
|
|
.IP "\fB\-mearly\-stop\-bits\fR" 4
|
13946 |
|
|
.IX Item "-mearly-stop-bits"
|
13947 |
|
|
.PD 0
|
13948 |
|
|
.IP "\fB\-mno\-early\-stop\-bits\fR" 4
|
13949 |
|
|
.IX Item "-mno-early-stop-bits"
|
13950 |
|
|
.PD
|
13951 |
|
|
Allow stop bits to be placed earlier than immediately preceding the
|
13952 |
|
|
instruction that triggered the stop bit. This can improve instruction
|
13953 |
|
|
scheduling, but does not always do so.
|
13954 |
|
|
.IP "\fB\-mfixed\-range=\fR\fIregister-range\fR" 4
|
13955 |
|
|
.IX Item "-mfixed-range=register-range"
|
13956 |
|
|
Generate code treating the given register range as fixed registers.
|
13957 |
|
|
A fixed register is one that the register allocator cannot use. This is
|
13958 |
|
|
useful when compiling kernel code. A register range is specified as
|
13959 |
|
|
two registers separated by a dash. Multiple register ranges can be
|
13960 |
|
|
specified separated by a comma.
|
13961 |
|
|
.IP "\fB\-mtls\-size=\fR\fItls-size\fR" 4
|
13962 |
|
|
.IX Item "-mtls-size=tls-size"
|
13963 |
|
|
Specify bit size of immediate \s-1TLS\s0 offsets. Valid values are 14, 22, and
|
13964 |
|
|
64.
|
13965 |
|
|
.IP "\fB\-mtune=\fR\fIcpu-type\fR" 4
|
13966 |
|
|
.IX Item "-mtune=cpu-type"
|
13967 |
|
|
Tune the instruction scheduling for a particular \s-1CPU\s0, Valid values are
|
13968 |
|
|
\&\fBitanium\fR, \fBitanium1\fR, \fBmerced\fR, \fBitanium2\fR,
|
13969 |
|
|
and \fBmckinley\fR.
|
13970 |
|
|
.IP "\fB\-milp32\fR" 4
|
13971 |
|
|
.IX Item "-milp32"
|
13972 |
|
|
.PD 0
|
13973 |
|
|
.IP "\fB\-mlp64\fR" 4
|
13974 |
|
|
.IX Item "-mlp64"
|
13975 |
|
|
.PD
|
13976 |
|
|
Generate code for a 32\-bit or 64\-bit environment.
|
13977 |
|
|
The 32\-bit environment sets int, long and pointer to 32 bits.
|
13978 |
|
|
The 64\-bit environment sets int to 32 bits and long and pointer
|
13979 |
|
|
to 64 bits. These are HP-UX specific flags.
|
13980 |
|
|
.IP "\fB\-mno\-sched\-br\-data\-spec\fR" 4
|
13981 |
|
|
.IX Item "-mno-sched-br-data-spec"
|
13982 |
|
|
.PD 0
|
13983 |
|
|
.IP "\fB\-msched\-br\-data\-spec\fR" 4
|
13984 |
|
|
.IX Item "-msched-br-data-spec"
|
13985 |
|
|
.PD
|
13986 |
|
|
(Dis/En)able data speculative scheduling before reload.
|
13987 |
|
|
This results in generation of \f(CW\*(C`ld.a\*(C'\fR instructions and
|
13988 |
|
|
the corresponding check instructions (\f(CW\*(C`ld.c\*(C'\fR / \f(CW\*(C`chk.a\*(C'\fR).
|
13989 |
|
|
The default is 'disable'.
|
13990 |
|
|
.IP "\fB\-msched\-ar\-data\-spec\fR" 4
|
13991 |
|
|
.IX Item "-msched-ar-data-spec"
|
13992 |
|
|
.PD 0
|
13993 |
|
|
.IP "\fB\-mno\-sched\-ar\-data\-spec\fR" 4
|
13994 |
|
|
.IX Item "-mno-sched-ar-data-spec"
|
13995 |
|
|
.PD
|
13996 |
|
|
(En/Dis)able data speculative scheduling after reload.
|
13997 |
|
|
This results in generation of \f(CW\*(C`ld.a\*(C'\fR instructions and
|
13998 |
|
|
the corresponding check instructions (\f(CW\*(C`ld.c\*(C'\fR / \f(CW\*(C`chk.a\*(C'\fR).
|
13999 |
|
|
The default is 'enable'.
|
14000 |
|
|
.IP "\fB\-mno\-sched\-control\-spec\fR" 4
|
14001 |
|
|
.IX Item "-mno-sched-control-spec"
|
14002 |
|
|
.PD 0
|
14003 |
|
|
.IP "\fB\-msched\-control\-spec\fR" 4
|
14004 |
|
|
.IX Item "-msched-control-spec"
|
14005 |
|
|
.PD
|
14006 |
|
|
(Dis/En)able control speculative scheduling. This feature is
|
14007 |
|
|
available only during region scheduling (i.e. before reload).
|
14008 |
|
|
This results in generation of the \f(CW\*(C`ld.s\*(C'\fR instructions and
|
14009 |
|
|
the corresponding check instructions \f(CW\*(C`chk.s\*(C'\fR.
|
14010 |
|
|
The default is 'disable'.
|
14011 |
|
|
.IP "\fB\-msched\-br\-in\-data\-spec\fR" 4
|
14012 |
|
|
.IX Item "-msched-br-in-data-spec"
|
14013 |
|
|
.PD 0
|
14014 |
|
|
.IP "\fB\-mno\-sched\-br\-in\-data\-spec\fR" 4
|
14015 |
|
|
.IX Item "-mno-sched-br-in-data-spec"
|
14016 |
|
|
.PD
|
14017 |
|
|
(En/Dis)able speculative scheduling of the instructions that
|
14018 |
|
|
are dependent on the data speculative loads before reload.
|
14019 |
|
|
This is effective only with \fB\-msched\-br\-data\-spec\fR enabled.
|
14020 |
|
|
The default is 'enable'.
|
14021 |
|
|
.IP "\fB\-msched\-ar\-in\-data\-spec\fR" 4
|
14022 |
|
|
.IX Item "-msched-ar-in-data-spec"
|
14023 |
|
|
.PD 0
|
14024 |
|
|
.IP "\fB\-mno\-sched\-ar\-in\-data\-spec\fR" 4
|
14025 |
|
|
.IX Item "-mno-sched-ar-in-data-spec"
|
14026 |
|
|
.PD
|
14027 |
|
|
(En/Dis)able speculative scheduling of the instructions that
|
14028 |
|
|
are dependent on the data speculative loads after reload.
|
14029 |
|
|
This is effective only with \fB\-msched\-ar\-data\-spec\fR enabled.
|
14030 |
|
|
The default is 'enable'.
|
14031 |
|
|
.IP "\fB\-msched\-in\-control\-spec\fR" 4
|
14032 |
|
|
.IX Item "-msched-in-control-spec"
|
14033 |
|
|
.PD 0
|
14034 |
|
|
.IP "\fB\-mno\-sched\-in\-control\-spec\fR" 4
|
14035 |
|
|
.IX Item "-mno-sched-in-control-spec"
|
14036 |
|
|
.PD
|
14037 |
|
|
(En/Dis)able speculative scheduling of the instructions that
|
14038 |
|
|
are dependent on the control speculative loads.
|
14039 |
|
|
This is effective only with \fB\-msched\-control\-spec\fR enabled.
|
14040 |
|
|
The default is 'enable'.
|
14041 |
|
|
.IP "\fB\-mno\-sched\-prefer\-non\-data\-spec\-insns\fR" 4
|
14042 |
|
|
.IX Item "-mno-sched-prefer-non-data-spec-insns"
|
14043 |
|
|
.PD 0
|
14044 |
|
|
.IP "\fB\-msched\-prefer\-non\-data\-spec\-insns\fR" 4
|
14045 |
|
|
.IX Item "-msched-prefer-non-data-spec-insns"
|
14046 |
|
|
.PD
|
14047 |
|
|
If enabled, data-speculative instructions are chosen for schedule
|
14048 |
|
|
only if there are no other choices at the moment. This makes
|
14049 |
|
|
the use of the data speculation much more conservative.
|
14050 |
|
|
The default is 'disable'.
|
14051 |
|
|
.IP "\fB\-mno\-sched\-prefer\-non\-control\-spec\-insns\fR" 4
|
14052 |
|
|
.IX Item "-mno-sched-prefer-non-control-spec-insns"
|
14053 |
|
|
.PD 0
|
14054 |
|
|
.IP "\fB\-msched\-prefer\-non\-control\-spec\-insns\fR" 4
|
14055 |
|
|
.IX Item "-msched-prefer-non-control-spec-insns"
|
14056 |
|
|
.PD
|
14057 |
|
|
If enabled, control-speculative instructions are chosen for schedule
|
14058 |
|
|
only if there are no other choices at the moment. This makes
|
14059 |
|
|
the use of the control speculation much more conservative.
|
14060 |
|
|
The default is 'disable'.
|
14061 |
|
|
.IP "\fB\-mno\-sched\-count\-spec\-in\-critical\-path\fR" 4
|
14062 |
|
|
.IX Item "-mno-sched-count-spec-in-critical-path"
|
14063 |
|
|
.PD 0
|
14064 |
|
|
.IP "\fB\-msched\-count\-spec\-in\-critical\-path\fR" 4
|
14065 |
|
|
.IX Item "-msched-count-spec-in-critical-path"
|
14066 |
|
|
.PD
|
14067 |
|
|
If enabled, speculative dependencies are considered during
|
14068 |
|
|
computation of the instructions priorities. This makes the use of the
|
14069 |
|
|
speculation a bit more conservative.
|
14070 |
|
|
The default is 'disable'.
|
14071 |
|
|
.IP "\fB\-msched\-spec\-ldc\fR" 4
|
14072 |
|
|
.IX Item "-msched-spec-ldc"
|
14073 |
|
|
Use a simple data speculation check. This option is on by default.
|
14074 |
|
|
.IP "\fB\-msched\-control\-spec\-ldc\fR" 4
|
14075 |
|
|
.IX Item "-msched-control-spec-ldc"
|
14076 |
|
|
Use a simple check for control speculation. This option is on by default.
|
14077 |
|
|
.IP "\fB\-msched\-stop\-bits\-after\-every\-cycle\fR" 4
|
14078 |
|
|
.IX Item "-msched-stop-bits-after-every-cycle"
|
14079 |
|
|
Place a stop bit after every cycle when scheduling. This option is on
|
14080 |
|
|
by default.
|
14081 |
|
|
.IP "\fB\-msched\-fp\-mem\-deps\-zero\-cost\fR" 4
|
14082 |
|
|
.IX Item "-msched-fp-mem-deps-zero-cost"
|
14083 |
|
|
Assume that floating-point stores and loads are not likely to cause a conflict
|
14084 |
|
|
when placed into the same instruction group. This option is disabled by
|
14085 |
|
|
default.
|
14086 |
|
|
.IP "\fB\-msel\-sched\-dont\-check\-control\-spec\fR" 4
|
14087 |
|
|
.IX Item "-msel-sched-dont-check-control-spec"
|
14088 |
|
|
Generate checks for control speculation in selective scheduling.
|
14089 |
|
|
This flag is disabled by default.
|
14090 |
|
|
.IP "\fB\-msched\-max\-memory\-insns=\fR\fImax-insns\fR" 4
|
14091 |
|
|
.IX Item "-msched-max-memory-insns=max-insns"
|
14092 |
|
|
Limit on the number of memory insns per instruction group, giving lower
|
14093 |
|
|
priority to subsequent memory insns attempting to schedule in the same
|
14094 |
|
|
instruction group. Frequently useful to prevent cache bank conflicts.
|
14095 |
|
|
The default value is 1.
|
14096 |
|
|
.IP "\fB\-msched\-max\-memory\-insns\-hard\-limit\fR" 4
|
14097 |
|
|
.IX Item "-msched-max-memory-insns-hard-limit"
|
14098 |
|
|
Makes the limit specified by \fBmsched-max-memory-insns\fR a hard limit,
|
14099 |
|
|
disallowing more than that number in an instruction group.
|
14100 |
|
|
Otherwise, the limit is \*(L"soft\*(R", meaning that non-memory operations
|
14101 |
|
|
are preferred when the limit is reached, but memory operations may still
|
14102 |
|
|
be scheduled.
|
14103 |
|
|
.PP
|
14104 |
|
|
\fI\s-1LM32\s0 Options\fR
|
14105 |
|
|
.IX Subsection "LM32 Options"
|
14106 |
|
|
.PP
|
14107 |
|
|
These \fB\-m\fR options are defined for the LatticeMico32 architecture:
|
14108 |
|
|
.IP "\fB\-mbarrel\-shift\-enabled\fR" 4
|
14109 |
|
|
.IX Item "-mbarrel-shift-enabled"
|
14110 |
|
|
Enable barrel-shift instructions.
|
14111 |
|
|
.IP "\fB\-mdivide\-enabled\fR" 4
|
14112 |
|
|
.IX Item "-mdivide-enabled"
|
14113 |
|
|
Enable divide and modulus instructions.
|
14114 |
|
|
.IP "\fB\-mmultiply\-enabled\fR" 4
|
14115 |
|
|
.IX Item "-mmultiply-enabled"
|
14116 |
|
|
Enable multiply instructions.
|
14117 |
|
|
.IP "\fB\-msign\-extend\-enabled\fR" 4
|
14118 |
|
|
.IX Item "-msign-extend-enabled"
|
14119 |
|
|
Enable sign extend instructions.
|
14120 |
|
|
.IP "\fB\-muser\-enabled\fR" 4
|
14121 |
|
|
.IX Item "-muser-enabled"
|
14122 |
|
|
Enable user-defined instructions.
|
14123 |
|
|
.PP
|
14124 |
|
|
\fIM32C Options\fR
|
14125 |
|
|
.IX Subsection "M32C Options"
|
14126 |
|
|
.IP "\fB\-mcpu=\fR\fIname\fR" 4
|
14127 |
|
|
.IX Item "-mcpu=name"
|
14128 |
|
|
Select the \s-1CPU\s0 for which code is generated. \fIname\fR may be one of
|
14129 |
|
|
\&\fBr8c\fR for the R8C/Tiny series, \fBm16c\fR for the M16C (up to
|
14130 |
|
|
/60) series, \fBm32cm\fR for the M16C/80 series, or \fBm32c\fR for
|
14131 |
|
|
the M32C/80 series.
|
14132 |
|
|
.IP "\fB\-msim\fR" 4
|
14133 |
|
|
.IX Item "-msim"
|
14134 |
|
|
Specifies that the program will be run on the simulator. This causes
|
14135 |
|
|
an alternate runtime library to be linked in which supports, for
|
14136 |
|
|
example, file I/O. You must not use this option when generating
|
14137 |
|
|
programs that will run on real hardware; you must provide your own
|
14138 |
|
|
runtime library for whatever I/O functions are needed.
|
14139 |
|
|
.IP "\fB\-memregs=\fR\fInumber\fR" 4
|
14140 |
|
|
.IX Item "-memregs=number"
|
14141 |
|
|
Specifies the number of memory-based pseudo-registers \s-1GCC\s0 uses
|
14142 |
|
|
during code generation. These pseudo-registers are used like real
|
14143 |
|
|
registers, so there is a tradeoff between \s-1GCC\s0's ability to fit the
|
14144 |
|
|
code into available registers, and the performance penalty of using
|
14145 |
|
|
memory instead of registers. Note that all modules in a program must
|
14146 |
|
|
be compiled with the same value for this option. Because of that, you
|
14147 |
|
|
must not use this option with \s-1GCC\s0's default runtime libraries.
|
14148 |
|
|
.PP
|
14149 |
|
|
\fIM32R/D Options\fR
|
14150 |
|
|
.IX Subsection "M32R/D Options"
|
14151 |
|
|
.PP
|
14152 |
|
|
These \fB\-m\fR options are defined for Renesas M32R/D architectures:
|
14153 |
|
|
.IP "\fB\-m32r2\fR" 4
|
14154 |
|
|
.IX Item "-m32r2"
|
14155 |
|
|
Generate code for the M32R/2.
|
14156 |
|
|
.IP "\fB\-m32rx\fR" 4
|
14157 |
|
|
.IX Item "-m32rx"
|
14158 |
|
|
Generate code for the M32R/X.
|
14159 |
|
|
.IP "\fB\-m32r\fR" 4
|
14160 |
|
|
.IX Item "-m32r"
|
14161 |
|
|
Generate code for the M32R. This is the default.
|
14162 |
|
|
.IP "\fB\-mmodel=small\fR" 4
|
14163 |
|
|
.IX Item "-mmodel=small"
|
14164 |
|
|
Assume all objects live in the lower 16MB of memory (so that their addresses
|
14165 |
|
|
can be loaded with the \f(CW\*(C`ld24\*(C'\fR instruction), and assume all subroutines
|
14166 |
|
|
are reachable with the \f(CW\*(C`bl\*(C'\fR instruction.
|
14167 |
|
|
This is the default.
|
14168 |
|
|
.Sp
|
14169 |
|
|
The addressability of a particular object can be set with the
|
14170 |
|
|
\&\f(CW\*(C`model\*(C'\fR attribute.
|
14171 |
|
|
.IP "\fB\-mmodel=medium\fR" 4
|
14172 |
|
|
.IX Item "-mmodel=medium"
|
14173 |
|
|
Assume objects may be anywhere in the 32\-bit address space (the compiler
|
14174 |
|
|
generates \f(CW\*(C`seth/add3\*(C'\fR instructions to load their addresses), and
|
14175 |
|
|
assume all subroutines are reachable with the \f(CW\*(C`bl\*(C'\fR instruction.
|
14176 |
|
|
.IP "\fB\-mmodel=large\fR" 4
|
14177 |
|
|
.IX Item "-mmodel=large"
|
14178 |
|
|
Assume objects may be anywhere in the 32\-bit address space (the compiler
|
14179 |
|
|
generates \f(CW\*(C`seth/add3\*(C'\fR instructions to load their addresses), and
|
14180 |
|
|
assume subroutines may not be reachable with the \f(CW\*(C`bl\*(C'\fR instruction
|
14181 |
|
|
(the compiler generates the much slower \f(CW\*(C`seth/add3/jl\*(C'\fR
|
14182 |
|
|
instruction sequence).
|
14183 |
|
|
.IP "\fB\-msdata=none\fR" 4
|
14184 |
|
|
.IX Item "-msdata=none"
|
14185 |
|
|
Disable use of the small data area. Variables are put into
|
14186 |
|
|
one of \fB.data\fR, \fB.bss\fR, or \fB.rodata\fR (unless the
|
14187 |
|
|
\&\f(CW\*(C`section\*(C'\fR attribute has been specified).
|
14188 |
|
|
This is the default.
|
14189 |
|
|
.Sp
|
14190 |
|
|
The small data area consists of sections \fB.sdata\fR and \fB.sbss\fR.
|
14191 |
|
|
Objects may be explicitly put in the small data area with the
|
14192 |
|
|
\&\f(CW\*(C`section\*(C'\fR attribute using one of these sections.
|
14193 |
|
|
.IP "\fB\-msdata=sdata\fR" 4
|
14194 |
|
|
.IX Item "-msdata=sdata"
|
14195 |
|
|
Put small global and static data in the small data area, but do not
|
14196 |
|
|
generate special code to reference them.
|
14197 |
|
|
.IP "\fB\-msdata=use\fR" 4
|
14198 |
|
|
.IX Item "-msdata=use"
|
14199 |
|
|
Put small global and static data in the small data area, and generate
|
14200 |
|
|
special instructions to reference them.
|
14201 |
|
|
.IP "\fB\-G\fR \fInum\fR" 4
|
14202 |
|
|
.IX Item "-G num"
|
14203 |
|
|
Put global and static objects less than or equal to \fInum\fR bytes
|
14204 |
|
|
into the small data or \s-1BSS\s0 sections instead of the normal data or \s-1BSS\s0
|
14205 |
|
|
sections. The default value of \fInum\fR is 8.
|
14206 |
|
|
The \fB\-msdata\fR option must be set to one of \fBsdata\fR or \fBuse\fR
|
14207 |
|
|
for this option to have any effect.
|
14208 |
|
|
.Sp
|
14209 |
|
|
All modules should be compiled with the same \fB\-G\fR \fInum\fR value.
|
14210 |
|
|
Compiling with different values of \fInum\fR may or may not work; if it
|
14211 |
|
|
doesn't the linker gives an error message\-\-\-incorrect code is not
|
14212 |
|
|
generated.
|
14213 |
|
|
.IP "\fB\-mdebug\fR" 4
|
14214 |
|
|
.IX Item "-mdebug"
|
14215 |
|
|
Makes the M32R\-specific code in the compiler display some statistics
|
14216 |
|
|
that might help in debugging programs.
|
14217 |
|
|
.IP "\fB\-malign\-loops\fR" 4
|
14218 |
|
|
.IX Item "-malign-loops"
|
14219 |
|
|
Align all loops to a 32\-byte boundary.
|
14220 |
|
|
.IP "\fB\-mno\-align\-loops\fR" 4
|
14221 |
|
|
.IX Item "-mno-align-loops"
|
14222 |
|
|
Do not enforce a 32\-byte alignment for loops. This is the default.
|
14223 |
|
|
.IP "\fB\-missue\-rate=\fR\fInumber\fR" 4
|
14224 |
|
|
.IX Item "-missue-rate=number"
|
14225 |
|
|
Issue \fInumber\fR instructions per cycle. \fInumber\fR can only be 1
|
14226 |
|
|
or 2.
|
14227 |
|
|
.IP "\fB\-mbranch\-cost=\fR\fInumber\fR" 4
|
14228 |
|
|
.IX Item "-mbranch-cost=number"
|
14229 |
|
|
\&\fInumber\fR can only be 1 or 2. If it is 1 then branches are
|
14230 |
|
|
preferred over conditional code, if it is 2, then the opposite applies.
|
14231 |
|
|
.IP "\fB\-mflush\-trap=\fR\fInumber\fR" 4
|
14232 |
|
|
.IX Item "-mflush-trap=number"
|
14233 |
|
|
Specifies the trap number to use to flush the cache. The default is
|
14234 |
|
|
12. Valid numbers are between 0 and 15 inclusive.
|
14235 |
|
|
.IP "\fB\-mno\-flush\-trap\fR" 4
|
14236 |
|
|
.IX Item "-mno-flush-trap"
|
14237 |
|
|
Specifies that the cache cannot be flushed by using a trap.
|
14238 |
|
|
.IP "\fB\-mflush\-func=\fR\fIname\fR" 4
|
14239 |
|
|
.IX Item "-mflush-func=name"
|
14240 |
|
|
Specifies the name of the operating system function to call to flush
|
14241 |
|
|
the cache. The default is \fI_flush_cache\fR, but a function call
|
14242 |
|
|
is only used if a trap is not available.
|
14243 |
|
|
.IP "\fB\-mno\-flush\-func\fR" 4
|
14244 |
|
|
.IX Item "-mno-flush-func"
|
14245 |
|
|
Indicates that there is no \s-1OS\s0 function for flushing the cache.
|
14246 |
|
|
.PP
|
14247 |
|
|
\fIM680x0 Options\fR
|
14248 |
|
|
.IX Subsection "M680x0 Options"
|
14249 |
|
|
.PP
|
14250 |
|
|
These are the \fB\-m\fR options defined for M680x0 and ColdFire processors.
|
14251 |
|
|
The default settings depend on which architecture was selected when
|
14252 |
|
|
the compiler was configured; the defaults for the most common choices
|
14253 |
|
|
are given below.
|
14254 |
|
|
.IP "\fB\-march=\fR\fIarch\fR" 4
|
14255 |
|
|
.IX Item "-march=arch"
|
14256 |
|
|
Generate code for a specific M680x0 or ColdFire instruction set
|
14257 |
|
|
architecture. Permissible values of \fIarch\fR for M680x0
|
14258 |
|
|
architectures are: \fB68000\fR, \fB68010\fR, \fB68020\fR,
|
14259 |
|
|
\&\fB68030\fR, \fB68040\fR, \fB68060\fR and \fBcpu32\fR. ColdFire
|
14260 |
|
|
architectures are selected according to Freescale's \s-1ISA\s0 classification
|
14261 |
|
|
and the permissible values are: \fBisaa\fR, \fBisaaplus\fR,
|
14262 |
|
|
\&\fBisab\fR and \fBisac\fR.
|
14263 |
|
|
.Sp
|
14264 |
|
|
\&\s-1GCC\s0 defines a macro \fB_\|_mcf\fR\fIarch\fR\fB_\|_\fR whenever it is generating
|
14265 |
|
|
code for a ColdFire target. The \fIarch\fR in this macro is one of the
|
14266 |
|
|
\&\fB\-march\fR arguments given above.
|
14267 |
|
|
.Sp
|
14268 |
|
|
When used together, \fB\-march\fR and \fB\-mtune\fR select code
|
14269 |
|
|
that runs on a family of similar processors but that is optimized
|
14270 |
|
|
for a particular microarchitecture.
|
14271 |
|
|
.IP "\fB\-mcpu=\fR\fIcpu\fR" 4
|
14272 |
|
|
.IX Item "-mcpu=cpu"
|
14273 |
|
|
Generate code for a specific M680x0 or ColdFire processor.
|
14274 |
|
|
The M680x0 \fIcpu\fRs are: \fB68000\fR, \fB68010\fR, \fB68020\fR,
|
14275 |
|
|
\&\fB68030\fR, \fB68040\fR, \fB68060\fR, \fB68302\fR, \fB68332\fR
|
14276 |
|
|
and \fBcpu32\fR. The ColdFire \fIcpu\fRs are given by the table
|
14277 |
|
|
below, which also classifies the CPUs into families:
|
14278 |
|
|
.RS 4
|
14279 |
|
|
.IP "Family : \fB\-mcpu\fR arguments" 4
|
14280 |
|
|
.IX Item "Family : -mcpu arguments"
|
14281 |
|
|
.PD 0
|
14282 |
|
|
.IP "\fB51\fR : \fB51\fR \fB51ac\fR \fB51ag\fR \fB51cn\fR \fB51em\fR \fB51je\fR \fB51jf\fR \fB51jg\fR \fB51jm\fR \fB51mm\fR \fB51qe\fR \fB51qm\fR" 4
|
14283 |
|
|
.IX Item "51 : 51 51ac 51ag 51cn 51em 51je 51jf 51jg 51jm 51mm 51qe 51qm"
|
14284 |
|
|
.IP "\fB5206\fR : \fB5202\fR \fB5204\fR \fB5206\fR" 4
|
14285 |
|
|
.IX Item "5206 : 5202 5204 5206"
|
14286 |
|
|
.IP "\fB5206e\fR : \fB5206e\fR" 4
|
14287 |
|
|
.IX Item "5206e : 5206e"
|
14288 |
|
|
.IP "\fB5208\fR : \fB5207\fR \fB5208\fR" 4
|
14289 |
|
|
.IX Item "5208 : 5207 5208"
|
14290 |
|
|
.IP "\fB5211a\fR : \fB5210a\fR \fB5211a\fR" 4
|
14291 |
|
|
.IX Item "5211a : 5210a 5211a"
|
14292 |
|
|
.IP "\fB5213\fR : \fB5211\fR \fB5212\fR \fB5213\fR" 4
|
14293 |
|
|
.IX Item "5213 : 5211 5212 5213"
|
14294 |
|
|
.IP "\fB5216\fR : \fB5214\fR \fB5216\fR" 4
|
14295 |
|
|
.IX Item "5216 : 5214 5216"
|
14296 |
|
|
.IP "\fB52235\fR : \fB52230\fR \fB52231\fR \fB52232\fR \fB52233\fR \fB52234\fR \fB52235\fR" 4
|
14297 |
|
|
.IX Item "52235 : 52230 52231 52232 52233 52234 52235"
|
14298 |
|
|
.IP "\fB5225\fR : \fB5224\fR \fB5225\fR" 4
|
14299 |
|
|
.IX Item "5225 : 5224 5225"
|
14300 |
|
|
.IP "\fB52259\fR : \fB52252\fR \fB52254\fR \fB52255\fR \fB52256\fR \fB52258\fR \fB52259\fR" 4
|
14301 |
|
|
.IX Item "52259 : 52252 52254 52255 52256 52258 52259"
|
14302 |
|
|
.IP "\fB5235\fR : \fB5232\fR \fB5233\fR \fB5234\fR \fB5235\fR \fB523x\fR" 4
|
14303 |
|
|
.IX Item "5235 : 5232 5233 5234 5235 523x"
|
14304 |
|
|
.IP "\fB5249\fR : \fB5249\fR" 4
|
14305 |
|
|
.IX Item "5249 : 5249"
|
14306 |
|
|
.IP "\fB5250\fR : \fB5250\fR" 4
|
14307 |
|
|
.IX Item "5250 : 5250"
|
14308 |
|
|
.IP "\fB5271\fR : \fB5270\fR \fB5271\fR" 4
|
14309 |
|
|
.IX Item "5271 : 5270 5271"
|
14310 |
|
|
.IP "\fB5272\fR : \fB5272\fR" 4
|
14311 |
|
|
.IX Item "5272 : 5272"
|
14312 |
|
|
.IP "\fB5275\fR : \fB5274\fR \fB5275\fR" 4
|
14313 |
|
|
.IX Item "5275 : 5274 5275"
|
14314 |
|
|
.IP "\fB5282\fR : \fB5280\fR \fB5281\fR \fB5282\fR \fB528x\fR" 4
|
14315 |
|
|
.IX Item "5282 : 5280 5281 5282 528x"
|
14316 |
|
|
.IP "\fB53017\fR : \fB53011\fR \fB53012\fR \fB53013\fR \fB53014\fR \fB53015\fR \fB53016\fR \fB53017\fR" 4
|
14317 |
|
|
.IX Item "53017 : 53011 53012 53013 53014 53015 53016 53017"
|
14318 |
|
|
.IP "\fB5307\fR : \fB5307\fR" 4
|
14319 |
|
|
.IX Item "5307 : 5307"
|
14320 |
|
|
.IP "\fB5329\fR : \fB5327\fR \fB5328\fR \fB5329\fR \fB532x\fR" 4
|
14321 |
|
|
.IX Item "5329 : 5327 5328 5329 532x"
|
14322 |
|
|
.IP "\fB5373\fR : \fB5372\fR \fB5373\fR \fB537x\fR" 4
|
14323 |
|
|
.IX Item "5373 : 5372 5373 537x"
|
14324 |
|
|
.IP "\fB5407\fR : \fB5407\fR" 4
|
14325 |
|
|
.IX Item "5407 : 5407"
|
14326 |
|
|
.IP "\fB5475\fR : \fB5470\fR \fB5471\fR \fB5472\fR \fB5473\fR \fB5474\fR \fB5475\fR \fB547x\fR \fB5480\fR \fB5481\fR \fB5482\fR \fB5483\fR \fB5484\fR \fB5485\fR" 4
|
14327 |
|
|
.IX Item "5475 : 5470 5471 5472 5473 5474 5475 547x 5480 5481 5482 5483 5484 5485"
|
14328 |
|
|
.RE
|
14329 |
|
|
.RS 4
|
14330 |
|
|
.PD
|
14331 |
|
|
.Sp
|
14332 |
|
|
\&\fB\-mcpu=\fR\fIcpu\fR overrides \fB\-march=\fR\fIarch\fR if
|
14333 |
|
|
\&\fIarch\fR is compatible with \fIcpu\fR. Other combinations of
|
14334 |
|
|
\&\fB\-mcpu\fR and \fB\-march\fR are rejected.
|
14335 |
|
|
.Sp
|
14336 |
|
|
\&\s-1GCC\s0 defines the macro \fB_\|_mcf_cpu_\fR\fIcpu\fR when ColdFire target
|
14337 |
|
|
\&\fIcpu\fR is selected. It also defines \fB_\|_mcf_family_\fR\fIfamily\fR,
|
14338 |
|
|
where the value of \fIfamily\fR is given by the table above.
|
14339 |
|
|
.RE
|
14340 |
|
|
.IP "\fB\-mtune=\fR\fItune\fR" 4
|
14341 |
|
|
.IX Item "-mtune=tune"
|
14342 |
|
|
Tune the code for a particular microarchitecture within the
|
14343 |
|
|
constraints set by \fB\-march\fR and \fB\-mcpu\fR.
|
14344 |
|
|
The M680x0 microarchitectures are: \fB68000\fR, \fB68010\fR,
|
14345 |
|
|
\&\fB68020\fR, \fB68030\fR, \fB68040\fR, \fB68060\fR
|
14346 |
|
|
and \fBcpu32\fR. The ColdFire microarchitectures
|
14347 |
|
|
are: \fBcfv1\fR, \fBcfv2\fR, \fBcfv3\fR, \fBcfv4\fR and \fBcfv4e\fR.
|
14348 |
|
|
.Sp
|
14349 |
|
|
You can also use \fB\-mtune=68020\-40\fR for code that needs
|
14350 |
|
|
to run relatively well on 68020, 68030 and 68040 targets.
|
14351 |
|
|
\&\fB\-mtune=68020\-60\fR is similar but includes 68060 targets
|
14352 |
|
|
as well. These two options select the same tuning decisions as
|
14353 |
|
|
\&\fB\-m68020\-40\fR and \fB\-m68020\-60\fR respectively.
|
14354 |
|
|
.Sp
|
14355 |
|
|
\&\s-1GCC\s0 defines the macros \fB_\|_mc\fR\fIarch\fR and \fB_\|_mc\fR\fIarch\fR\fB_\|_\fR
|
14356 |
|
|
when tuning for 680x0 architecture \fIarch\fR. It also defines
|
14357 |
|
|
\&\fBmc\fR\fIarch\fR unless either \fB\-ansi\fR or a non-GNU \fB\-std\fR
|
14358 |
|
|
option is used. If \s-1GCC\s0 is tuning for a range of architectures,
|
14359 |
|
|
as selected by \fB\-mtune=68020\-40\fR or \fB\-mtune=68020\-60\fR,
|
14360 |
|
|
it defines the macros for every architecture in the range.
|
14361 |
|
|
.Sp
|
14362 |
|
|
\&\s-1GCC\s0 also defines the macro \fB_\|_m\fR\fIuarch\fR\fB_\|_\fR when tuning for
|
14363 |
|
|
ColdFire microarchitecture \fIuarch\fR, where \fIuarch\fR is one
|
14364 |
|
|
of the arguments given above.
|
14365 |
|
|
.IP "\fB\-m68000\fR" 4
|
14366 |
|
|
.IX Item "-m68000"
|
14367 |
|
|
.PD 0
|
14368 |
|
|
.IP "\fB\-mc68000\fR" 4
|
14369 |
|
|
.IX Item "-mc68000"
|
14370 |
|
|
.PD
|
14371 |
|
|
Generate output for a 68000. This is the default
|
14372 |
|
|
when the compiler is configured for 68000\-based systems.
|
14373 |
|
|
It is equivalent to \fB\-march=68000\fR.
|
14374 |
|
|
.Sp
|
14375 |
|
|
Use this option for microcontrollers with a 68000 or \s-1EC000\s0 core,
|
14376 |
|
|
including the 68008, 68302, 68306, 68307, 68322, 68328 and 68356.
|
14377 |
|
|
.IP "\fB\-m68010\fR" 4
|
14378 |
|
|
.IX Item "-m68010"
|
14379 |
|
|
Generate output for a 68010. This is the default
|
14380 |
|
|
when the compiler is configured for 68010\-based systems.
|
14381 |
|
|
It is equivalent to \fB\-march=68010\fR.
|
14382 |
|
|
.IP "\fB\-m68020\fR" 4
|
14383 |
|
|
.IX Item "-m68020"
|
14384 |
|
|
.PD 0
|
14385 |
|
|
.IP "\fB\-mc68020\fR" 4
|
14386 |
|
|
.IX Item "-mc68020"
|
14387 |
|
|
.PD
|
14388 |
|
|
Generate output for a 68020. This is the default
|
14389 |
|
|
when the compiler is configured for 68020\-based systems.
|
14390 |
|
|
It is equivalent to \fB\-march=68020\fR.
|
14391 |
|
|
.IP "\fB\-m68030\fR" 4
|
14392 |
|
|
.IX Item "-m68030"
|
14393 |
|
|
Generate output for a 68030. This is the default when the compiler is
|
14394 |
|
|
configured for 68030\-based systems. It is equivalent to
|
14395 |
|
|
\&\fB\-march=68030\fR.
|
14396 |
|
|
.IP "\fB\-m68040\fR" 4
|
14397 |
|
|
.IX Item "-m68040"
|
14398 |
|
|
Generate output for a 68040. This is the default when the compiler is
|
14399 |
|
|
configured for 68040\-based systems. It is equivalent to
|
14400 |
|
|
\&\fB\-march=68040\fR.
|
14401 |
|
|
.Sp
|
14402 |
|
|
This option inhibits the use of 68881/68882 instructions that have to be
|
14403 |
|
|
emulated by software on the 68040. Use this option if your 68040 does not
|
14404 |
|
|
have code to emulate those instructions.
|
14405 |
|
|
.IP "\fB\-m68060\fR" 4
|
14406 |
|
|
.IX Item "-m68060"
|
14407 |
|
|
Generate output for a 68060. This is the default when the compiler is
|
14408 |
|
|
configured for 68060\-based systems. It is equivalent to
|
14409 |
|
|
\&\fB\-march=68060\fR.
|
14410 |
|
|
.Sp
|
14411 |
|
|
This option inhibits the use of 68020 and 68881/68882 instructions that
|
14412 |
|
|
have to be emulated by software on the 68060. Use this option if your 68060
|
14413 |
|
|
does not have code to emulate those instructions.
|
14414 |
|
|
.IP "\fB\-mcpu32\fR" 4
|
14415 |
|
|
.IX Item "-mcpu32"
|
14416 |
|
|
Generate output for a \s-1CPU32\s0. This is the default
|
14417 |
|
|
when the compiler is configured for CPU32\-based systems.
|
14418 |
|
|
It is equivalent to \fB\-march=cpu32\fR.
|
14419 |
|
|
.Sp
|
14420 |
|
|
Use this option for microcontrollers with a
|
14421 |
|
|
\&\s-1CPU32\s0 or \s-1CPU32+\s0 core, including the 68330, 68331, 68332, 68333, 68334,
|
14422 |
|
|
68336, 68340, 68341, 68349 and 68360.
|
14423 |
|
|
.IP "\fB\-m5200\fR" 4
|
14424 |
|
|
.IX Item "-m5200"
|
14425 |
|
|
Generate output for a 520X ColdFire \s-1CPU\s0. This is the default
|
14426 |
|
|
when the compiler is configured for 520X\-based systems.
|
14427 |
|
|
It is equivalent to \fB\-mcpu=5206\fR, and is now deprecated
|
14428 |
|
|
in favor of that option.
|
14429 |
|
|
.Sp
|
14430 |
|
|
Use this option for microcontroller with a 5200 core, including
|
14431 |
|
|
the \s-1MCF5202\s0, \s-1MCF5203\s0, \s-1MCF5204\s0 and \s-1MCF5206\s0.
|
14432 |
|
|
.IP "\fB\-m5206e\fR" 4
|
14433 |
|
|
.IX Item "-m5206e"
|
14434 |
|
|
Generate output for a 5206e ColdFire \s-1CPU\s0. The option is now
|
14435 |
|
|
deprecated in favor of the equivalent \fB\-mcpu=5206e\fR.
|
14436 |
|
|
.IP "\fB\-m528x\fR" 4
|
14437 |
|
|
.IX Item "-m528x"
|
14438 |
|
|
Generate output for a member of the ColdFire 528X family.
|
14439 |
|
|
The option is now deprecated in favor of the equivalent
|
14440 |
|
|
\&\fB\-mcpu=528x\fR.
|
14441 |
|
|
.IP "\fB\-m5307\fR" 4
|
14442 |
|
|
.IX Item "-m5307"
|
14443 |
|
|
Generate output for a ColdFire 5307 \s-1CPU\s0. The option is now deprecated
|
14444 |
|
|
in favor of the equivalent \fB\-mcpu=5307\fR.
|
14445 |
|
|
.IP "\fB\-m5407\fR" 4
|
14446 |
|
|
.IX Item "-m5407"
|
14447 |
|
|
Generate output for a ColdFire 5407 \s-1CPU\s0. The option is now deprecated
|
14448 |
|
|
in favor of the equivalent \fB\-mcpu=5407\fR.
|
14449 |
|
|
.IP "\fB\-mcfv4e\fR" 4
|
14450 |
|
|
.IX Item "-mcfv4e"
|
14451 |
|
|
Generate output for a ColdFire V4e family \s-1CPU\s0 (e.g. 547x/548x).
|
14452 |
|
|
This includes use of hardware floating-point instructions.
|
14453 |
|
|
The option is equivalent to \fB\-mcpu=547x\fR, and is now
|
14454 |
|
|
deprecated in favor of that option.
|
14455 |
|
|
.IP "\fB\-m68020\-40\fR" 4
|
14456 |
|
|
.IX Item "-m68020-40"
|
14457 |
|
|
Generate output for a 68040, without using any of the new instructions.
|
14458 |
|
|
This results in code that can run relatively efficiently on either a
|
14459 |
|
|
68020/68881 or a 68030 or a 68040. The generated code does use the
|
14460 |
|
|
68881 instructions that are emulated on the 68040.
|
14461 |
|
|
.Sp
|
14462 |
|
|
The option is equivalent to \fB\-march=68020\fR \fB\-mtune=68020\-40\fR.
|
14463 |
|
|
.IP "\fB\-m68020\-60\fR" 4
|
14464 |
|
|
.IX Item "-m68020-60"
|
14465 |
|
|
Generate output for a 68060, without using any of the new instructions.
|
14466 |
|
|
This results in code that can run relatively efficiently on either a
|
14467 |
|
|
68020/68881 or a 68030 or a 68040. The generated code does use the
|
14468 |
|
|
68881 instructions that are emulated on the 68060.
|
14469 |
|
|
.Sp
|
14470 |
|
|
The option is equivalent to \fB\-march=68020\fR \fB\-mtune=68020\-60\fR.
|
14471 |
|
|
.IP "\fB\-mhard\-float\fR" 4
|
14472 |
|
|
.IX Item "-mhard-float"
|
14473 |
|
|
.PD 0
|
14474 |
|
|
.IP "\fB\-m68881\fR" 4
|
14475 |
|
|
.IX Item "-m68881"
|
14476 |
|
|
.PD
|
14477 |
|
|
Generate floating-point instructions. This is the default for 68020
|
14478 |
|
|
and above, and for ColdFire devices that have an \s-1FPU\s0. It defines the
|
14479 |
|
|
macro \fB_\|_HAVE_68881_\|_\fR on M680x0 targets and \fB_\|_mcffpu_\|_\fR
|
14480 |
|
|
on ColdFire targets.
|
14481 |
|
|
.IP "\fB\-msoft\-float\fR" 4
|
14482 |
|
|
.IX Item "-msoft-float"
|
14483 |
|
|
Do not generate floating-point instructions; use library calls instead.
|
14484 |
|
|
This is the default for 68000, 68010, and 68832 targets. It is also
|
14485 |
|
|
the default for ColdFire devices that have no \s-1FPU\s0.
|
14486 |
|
|
.IP "\fB\-mdiv\fR" 4
|
14487 |
|
|
.IX Item "-mdiv"
|
14488 |
|
|
.PD 0
|
14489 |
|
|
.IP "\fB\-mno\-div\fR" 4
|
14490 |
|
|
.IX Item "-mno-div"
|
14491 |
|
|
.PD
|
14492 |
|
|
Generate (do not generate) ColdFire hardware divide and remainder
|
14493 |
|
|
instructions. If \fB\-march\fR is used without \fB\-mcpu\fR,
|
14494 |
|
|
the default is \*(L"on\*(R" for ColdFire architectures and \*(L"off\*(R" for M680x0
|
14495 |
|
|
architectures. Otherwise, the default is taken from the target \s-1CPU\s0
|
14496 |
|
|
(either the default \s-1CPU\s0, or the one specified by \fB\-mcpu\fR). For
|
14497 |
|
|
example, the default is \*(L"off\*(R" for \fB\-mcpu=5206\fR and \*(L"on\*(R" for
|
14498 |
|
|
\&\fB\-mcpu=5206e\fR.
|
14499 |
|
|
.Sp
|
14500 |
|
|
\&\s-1GCC\s0 defines the macro \fB_\|_mcfhwdiv_\|_\fR when this option is enabled.
|
14501 |
|
|
.IP "\fB\-mshort\fR" 4
|
14502 |
|
|
.IX Item "-mshort"
|
14503 |
|
|
Consider type \f(CW\*(C`int\*(C'\fR to be 16 bits wide, like \f(CW\*(C`short int\*(C'\fR.
|
14504 |
|
|
Additionally, parameters passed on the stack are also aligned to a
|
14505 |
|
|
16\-bit boundary even on targets whose \s-1API\s0 mandates promotion to 32\-bit.
|
14506 |
|
|
.IP "\fB\-mno\-short\fR" 4
|
14507 |
|
|
.IX Item "-mno-short"
|
14508 |
|
|
Do not consider type \f(CW\*(C`int\*(C'\fR to be 16 bits wide. This is the default.
|
14509 |
|
|
.IP "\fB\-mnobitfield\fR" 4
|
14510 |
|
|
.IX Item "-mnobitfield"
|
14511 |
|
|
.PD 0
|
14512 |
|
|
.IP "\fB\-mno\-bitfield\fR" 4
|
14513 |
|
|
.IX Item "-mno-bitfield"
|
14514 |
|
|
.PD
|
14515 |
|
|
Do not use the bit-field instructions. The \fB\-m68000\fR, \fB\-mcpu32\fR
|
14516 |
|
|
and \fB\-m5200\fR options imply \fB\-mnobitfield\fR.
|
14517 |
|
|
.IP "\fB\-mbitfield\fR" 4
|
14518 |
|
|
.IX Item "-mbitfield"
|
14519 |
|
|
Do use the bit-field instructions. The \fB\-m68020\fR option implies
|
14520 |
|
|
\&\fB\-mbitfield\fR. This is the default if you use a configuration
|
14521 |
|
|
designed for a 68020.
|
14522 |
|
|
.IP "\fB\-mrtd\fR" 4
|
14523 |
|
|
.IX Item "-mrtd"
|
14524 |
|
|
Use a different function-calling convention, in which functions
|
14525 |
|
|
that take a fixed number of arguments return with the \f(CW\*(C`rtd\*(C'\fR
|
14526 |
|
|
instruction, which pops their arguments while returning. This
|
14527 |
|
|
saves one instruction in the caller since there is no need to pop
|
14528 |
|
|
the arguments there.
|
14529 |
|
|
.Sp
|
14530 |
|
|
This calling convention is incompatible with the one normally
|
14531 |
|
|
used on Unix, so you cannot use it if you need to call libraries
|
14532 |
|
|
compiled with the Unix compiler.
|
14533 |
|
|
.Sp
|
14534 |
|
|
Also, you must provide function prototypes for all functions that
|
14535 |
|
|
take variable numbers of arguments (including \f(CW\*(C`printf\*(C'\fR);
|
14536 |
|
|
otherwise incorrect code is generated for calls to those
|
14537 |
|
|
functions.
|
14538 |
|
|
.Sp
|
14539 |
|
|
In addition, seriously incorrect code results if you call a
|
14540 |
|
|
function with too many arguments. (Normally, extra arguments are
|
14541 |
|
|
harmlessly ignored.)
|
14542 |
|
|
.Sp
|
14543 |
|
|
The \f(CW\*(C`rtd\*(C'\fR instruction is supported by the 68010, 68020, 68030,
|
14544 |
|
|
68040, 68060 and \s-1CPU32\s0 processors, but not by the 68000 or 5200.
|
14545 |
|
|
.IP "\fB\-mno\-rtd\fR" 4
|
14546 |
|
|
.IX Item "-mno-rtd"
|
14547 |
|
|
Do not use the calling conventions selected by \fB\-mrtd\fR.
|
14548 |
|
|
This is the default.
|
14549 |
|
|
.IP "\fB\-malign\-int\fR" 4
|
14550 |
|
|
.IX Item "-malign-int"
|
14551 |
|
|
.PD 0
|
14552 |
|
|
.IP "\fB\-mno\-align\-int\fR" 4
|
14553 |
|
|
.IX Item "-mno-align-int"
|
14554 |
|
|
.PD
|
14555 |
|
|
Control whether \s-1GCC\s0 aligns \f(CW\*(C`int\*(C'\fR, \f(CW\*(C`long\*(C'\fR, \f(CW\*(C`long long\*(C'\fR,
|
14556 |
|
|
\&\f(CW\*(C`float\*(C'\fR, \f(CW\*(C`double\*(C'\fR, and \f(CW\*(C`long double\*(C'\fR variables on a 32\-bit
|
14557 |
|
|
boundary (\fB\-malign\-int\fR) or a 16\-bit boundary (\fB\-mno\-align\-int\fR).
|
14558 |
|
|
Aligning variables on 32\-bit boundaries produces code that runs somewhat
|
14559 |
|
|
faster on processors with 32\-bit busses at the expense of more memory.
|
14560 |
|
|
.Sp
|
14561 |
|
|
\&\fBWarning:\fR if you use the \fB\-malign\-int\fR switch, \s-1GCC\s0
|
14562 |
|
|
aligns structures containing the above types differently than
|
14563 |
|
|
most published application binary interface specifications for the m68k.
|
14564 |
|
|
.IP "\fB\-mpcrel\fR" 4
|
14565 |
|
|
.IX Item "-mpcrel"
|
14566 |
|
|
Use the pc-relative addressing mode of the 68000 directly, instead of
|
14567 |
|
|
using a global offset table. At present, this option implies \fB\-fpic\fR,
|
14568 |
|
|
allowing at most a 16\-bit offset for pc-relative addressing. \fB\-fPIC\fR is
|
14569 |
|
|
not presently supported with \fB\-mpcrel\fR, though this could be supported for
|
14570 |
|
|
68020 and higher processors.
|
14571 |
|
|
.IP "\fB\-mno\-strict\-align\fR" 4
|
14572 |
|
|
.IX Item "-mno-strict-align"
|
14573 |
|
|
.PD 0
|
14574 |
|
|
.IP "\fB\-mstrict\-align\fR" 4
|
14575 |
|
|
.IX Item "-mstrict-align"
|
14576 |
|
|
.PD
|
14577 |
|
|
Do not (do) assume that unaligned memory references are handled by
|
14578 |
|
|
the system.
|
14579 |
|
|
.IP "\fB\-msep\-data\fR" 4
|
14580 |
|
|
.IX Item "-msep-data"
|
14581 |
|
|
Generate code that allows the data segment to be located in a different
|
14582 |
|
|
area of memory from the text segment. This allows for execute-in-place in
|
14583 |
|
|
an environment without virtual memory management. This option implies
|
14584 |
|
|
\&\fB\-fPIC\fR.
|
14585 |
|
|
.IP "\fB\-mno\-sep\-data\fR" 4
|
14586 |
|
|
.IX Item "-mno-sep-data"
|
14587 |
|
|
Generate code that assumes that the data segment follows the text segment.
|
14588 |
|
|
This is the default.
|
14589 |
|
|
.IP "\fB\-mid\-shared\-library\fR" 4
|
14590 |
|
|
.IX Item "-mid-shared-library"
|
14591 |
|
|
Generate code that supports shared libraries via the library \s-1ID\s0 method.
|
14592 |
|
|
This allows for execute-in-place and shared libraries in an environment
|
14593 |
|
|
without virtual memory management. This option implies \fB\-fPIC\fR.
|
14594 |
|
|
.IP "\fB\-mno\-id\-shared\-library\fR" 4
|
14595 |
|
|
.IX Item "-mno-id-shared-library"
|
14596 |
|
|
Generate code that doesn't assume ID-based shared libraries are being used.
|
14597 |
|
|
This is the default.
|
14598 |
|
|
.IP "\fB\-mshared\-library\-id=n\fR" 4
|
14599 |
|
|
.IX Item "-mshared-library-id=n"
|
14600 |
|
|
Specifies the identification number of the ID-based shared library being
|
14601 |
|
|
compiled. Specifying a value of 0 generates more compact code; specifying
|
14602 |
|
|
other values forces the allocation of that number to the current
|
14603 |
|
|
library, but is no more space\- or time-efficient than omitting this option.
|
14604 |
|
|
.IP "\fB\-mxgot\fR" 4
|
14605 |
|
|
.IX Item "-mxgot"
|
14606 |
|
|
.PD 0
|
14607 |
|
|
.IP "\fB\-mno\-xgot\fR" 4
|
14608 |
|
|
.IX Item "-mno-xgot"
|
14609 |
|
|
.PD
|
14610 |
|
|
When generating position-independent code for ColdFire, generate code
|
14611 |
|
|
that works if the \s-1GOT\s0 has more than 8192 entries. This code is
|
14612 |
|
|
larger and slower than code generated without this option. On M680x0
|
14613 |
|
|
processors, this option is not needed; \fB\-fPIC\fR suffices.
|
14614 |
|
|
.Sp
|
14615 |
|
|
\&\s-1GCC\s0 normally uses a single instruction to load values from the \s-1GOT\s0.
|
14616 |
|
|
While this is relatively efficient, it only works if the \s-1GOT\s0
|
14617 |
|
|
is smaller than about 64k. Anything larger causes the linker
|
14618 |
|
|
to report an error such as:
|
14619 |
|
|
.Sp
|
14620 |
|
|
.Vb 1
|
14621 |
|
|
\& relocation truncated to fit: R_68K_GOT16O foobar
|
14622 |
|
|
.Ve
|
14623 |
|
|
.Sp
|
14624 |
|
|
If this happens, you should recompile your code with \fB\-mxgot\fR.
|
14625 |
|
|
It should then work with very large GOTs. However, code generated with
|
14626 |
|
|
\&\fB\-mxgot\fR is less efficient, since it takes 4 instructions to fetch
|
14627 |
|
|
the value of a global symbol.
|
14628 |
|
|
.Sp
|
14629 |
|
|
Note that some linkers, including newer versions of the \s-1GNU\s0 linker,
|
14630 |
|
|
can create multiple GOTs and sort \s-1GOT\s0 entries. If you have such a linker,
|
14631 |
|
|
you should only need to use \fB\-mxgot\fR when compiling a single
|
14632 |
|
|
object file that accesses more than 8192 \s-1GOT\s0 entries. Very few do.
|
14633 |
|
|
.Sp
|
14634 |
|
|
These options have no effect unless \s-1GCC\s0 is generating
|
14635 |
|
|
position-independent code.
|
14636 |
|
|
.PP
|
14637 |
|
|
\fIMCore Options\fR
|
14638 |
|
|
.IX Subsection "MCore Options"
|
14639 |
|
|
.PP
|
14640 |
|
|
These are the \fB\-m\fR options defined for the Motorola M*Core
|
14641 |
|
|
processors.
|
14642 |
|
|
.IP "\fB\-mhardlit\fR" 4
|
14643 |
|
|
.IX Item "-mhardlit"
|
14644 |
|
|
.PD 0
|
14645 |
|
|
.IP "\fB\-mno\-hardlit\fR" 4
|
14646 |
|
|
.IX Item "-mno-hardlit"
|
14647 |
|
|
.PD
|
14648 |
|
|
Inline constants into the code stream if it can be done in two
|
14649 |
|
|
instructions or less.
|
14650 |
|
|
.IP "\fB\-mdiv\fR" 4
|
14651 |
|
|
.IX Item "-mdiv"
|
14652 |
|
|
.PD 0
|
14653 |
|
|
.IP "\fB\-mno\-div\fR" 4
|
14654 |
|
|
.IX Item "-mno-div"
|
14655 |
|
|
.PD
|
14656 |
|
|
Use the divide instruction. (Enabled by default).
|
14657 |
|
|
.IP "\fB\-mrelax\-immediate\fR" 4
|
14658 |
|
|
.IX Item "-mrelax-immediate"
|
14659 |
|
|
.PD 0
|
14660 |
|
|
.IP "\fB\-mno\-relax\-immediate\fR" 4
|
14661 |
|
|
.IX Item "-mno-relax-immediate"
|
14662 |
|
|
.PD
|
14663 |
|
|
Allow arbitrary-sized immediates in bit operations.
|
14664 |
|
|
.IP "\fB\-mwide\-bitfields\fR" 4
|
14665 |
|
|
.IX Item "-mwide-bitfields"
|
14666 |
|
|
.PD 0
|
14667 |
|
|
.IP "\fB\-mno\-wide\-bitfields\fR" 4
|
14668 |
|
|
.IX Item "-mno-wide-bitfields"
|
14669 |
|
|
.PD
|
14670 |
|
|
Always treat bit-fields as \f(CW\*(C`int\*(C'\fR\-sized.
|
14671 |
|
|
.IP "\fB\-m4byte\-functions\fR" 4
|
14672 |
|
|
.IX Item "-m4byte-functions"
|
14673 |
|
|
.PD 0
|
14674 |
|
|
.IP "\fB\-mno\-4byte\-functions\fR" 4
|
14675 |
|
|
.IX Item "-mno-4byte-functions"
|
14676 |
|
|
.PD
|
14677 |
|
|
Force all functions to be aligned to a 4\-byte boundary.
|
14678 |
|
|
.IP "\fB\-mcallgraph\-data\fR" 4
|
14679 |
|
|
.IX Item "-mcallgraph-data"
|
14680 |
|
|
.PD 0
|
14681 |
|
|
.IP "\fB\-mno\-callgraph\-data\fR" 4
|
14682 |
|
|
.IX Item "-mno-callgraph-data"
|
14683 |
|
|
.PD
|
14684 |
|
|
Emit callgraph information.
|
14685 |
|
|
.IP "\fB\-mslow\-bytes\fR" 4
|
14686 |
|
|
.IX Item "-mslow-bytes"
|
14687 |
|
|
.PD 0
|
14688 |
|
|
.IP "\fB\-mno\-slow\-bytes\fR" 4
|
14689 |
|
|
.IX Item "-mno-slow-bytes"
|
14690 |
|
|
.PD
|
14691 |
|
|
Prefer word access when reading byte quantities.
|
14692 |
|
|
.IP "\fB\-mlittle\-endian\fR" 4
|
14693 |
|
|
.IX Item "-mlittle-endian"
|
14694 |
|
|
.PD 0
|
14695 |
|
|
.IP "\fB\-mbig\-endian\fR" 4
|
14696 |
|
|
.IX Item "-mbig-endian"
|
14697 |
|
|
.PD
|
14698 |
|
|
Generate code for a little-endian target.
|
14699 |
|
|
.IP "\fB\-m210\fR" 4
|
14700 |
|
|
.IX Item "-m210"
|
14701 |
|
|
.PD 0
|
14702 |
|
|
.IP "\fB\-m340\fR" 4
|
14703 |
|
|
.IX Item "-m340"
|
14704 |
|
|
.PD
|
14705 |
|
|
Generate code for the 210 processor.
|
14706 |
|
|
.IP "\fB\-mno\-lsim\fR" 4
|
14707 |
|
|
.IX Item "-mno-lsim"
|
14708 |
|
|
Assume that runtime support has been provided and so omit the
|
14709 |
|
|
simulator library (\fIlibsim.a)\fR from the linker command line.
|
14710 |
|
|
.IP "\fB\-mstack\-increment=\fR\fIsize\fR" 4
|
14711 |
|
|
.IX Item "-mstack-increment=size"
|
14712 |
|
|
Set the maximum amount for a single stack increment operation. Large
|
14713 |
|
|
values can increase the speed of programs that contain functions
|
14714 |
|
|
that need a large amount of stack space, but they can also trigger a
|
14715 |
|
|
segmentation fault if the stack is extended too much. The default
|
14716 |
|
|
value is 0x1000.
|
14717 |
|
|
.PP
|
14718 |
|
|
\fIMeP Options\fR
|
14719 |
|
|
.IX Subsection "MeP Options"
|
14720 |
|
|
.IP "\fB\-mabsdiff\fR" 4
|
14721 |
|
|
.IX Item "-mabsdiff"
|
14722 |
|
|
Enables the \f(CW\*(C`abs\*(C'\fR instruction, which is the absolute difference
|
14723 |
|
|
between two registers.
|
14724 |
|
|
.IP "\fB\-mall\-opts\fR" 4
|
14725 |
|
|
.IX Item "-mall-opts"
|
14726 |
|
|
Enables all the optional instructions\-\-\-average, multiply, divide, bit
|
14727 |
|
|
operations, leading zero, absolute difference, min/max, clip, and
|
14728 |
|
|
saturation.
|
14729 |
|
|
.IP "\fB\-maverage\fR" 4
|
14730 |
|
|
.IX Item "-maverage"
|
14731 |
|
|
Enables the \f(CW\*(C`ave\*(C'\fR instruction, which computes the average of two
|
14732 |
|
|
registers.
|
14733 |
|
|
.IP "\fB\-mbased=\fR\fIn\fR" 4
|
14734 |
|
|
.IX Item "-mbased=n"
|
14735 |
|
|
Variables of size \fIn\fR bytes or smaller are placed in the
|
14736 |
|
|
\&\f(CW\*(C`.based\*(C'\fR section by default. Based variables use the \f(CW$tp\fR
|
14737 |
|
|
register as a base register, and there is a 128\-byte limit to the
|
14738 |
|
|
\&\f(CW\*(C`.based\*(C'\fR section.
|
14739 |
|
|
.IP "\fB\-mbitops\fR" 4
|
14740 |
|
|
.IX Item "-mbitops"
|
14741 |
|
|
Enables the bit operation instructions\-\-\-bit test (\f(CW\*(C`btstm\*(C'\fR), set
|
14742 |
|
|
(\f(CW\*(C`bsetm\*(C'\fR), clear (\f(CW\*(C`bclrm\*(C'\fR), invert (\f(CW\*(C`bnotm\*(C'\fR), and
|
14743 |
|
|
test-and-set (\f(CW\*(C`tas\*(C'\fR).
|
14744 |
|
|
.IP "\fB\-mc=\fR\fIname\fR" 4
|
14745 |
|
|
.IX Item "-mc=name"
|
14746 |
|
|
Selects which section constant data is placed in. \fIname\fR may
|
14747 |
|
|
be \f(CW\*(C`tiny\*(C'\fR, \f(CW\*(C`near\*(C'\fR, or \f(CW\*(C`far\*(C'\fR.
|
14748 |
|
|
.IP "\fB\-mclip\fR" 4
|
14749 |
|
|
.IX Item "-mclip"
|
14750 |
|
|
Enables the \f(CW\*(C`clip\*(C'\fR instruction. Note that \f(CW\*(C`\-mclip\*(C'\fR is not
|
14751 |
|
|
useful unless you also provide \f(CW\*(C`\-mminmax\*(C'\fR.
|
14752 |
|
|
.IP "\fB\-mconfig=\fR\fIname\fR" 4
|
14753 |
|
|
.IX Item "-mconfig=name"
|
14754 |
|
|
Selects one of the built-in core configurations. Each MeP chip has
|
14755 |
|
|
one or more modules in it; each module has a core \s-1CPU\s0 and a variety of
|
14756 |
|
|
coprocessors, optional instructions, and peripherals. The
|
14757 |
|
|
\&\f(CW\*(C`MeP\-Integrator\*(C'\fR tool, not part of \s-1GCC\s0, provides these
|
14758 |
|
|
configurations through this option; using this option is the same as
|
14759 |
|
|
using all the corresponding command-line options. The default
|
14760 |
|
|
configuration is \f(CW\*(C`default\*(C'\fR.
|
14761 |
|
|
.IP "\fB\-mcop\fR" 4
|
14762 |
|
|
.IX Item "-mcop"
|
14763 |
|
|
Enables the coprocessor instructions. By default, this is a 32\-bit
|
14764 |
|
|
coprocessor. Note that the coprocessor is normally enabled via the
|
14765 |
|
|
\&\f(CW\*(C`\-mconfig=\*(C'\fR option.
|
14766 |
|
|
.IP "\fB\-mcop32\fR" 4
|
14767 |
|
|
.IX Item "-mcop32"
|
14768 |
|
|
Enables the 32\-bit coprocessor's instructions.
|
14769 |
|
|
.IP "\fB\-mcop64\fR" 4
|
14770 |
|
|
.IX Item "-mcop64"
|
14771 |
|
|
Enables the 64\-bit coprocessor's instructions.
|
14772 |
|
|
.IP "\fB\-mivc2\fR" 4
|
14773 |
|
|
.IX Item "-mivc2"
|
14774 |
|
|
Enables \s-1IVC2\s0 scheduling. \s-1IVC2\s0 is a 64\-bit \s-1VLIW\s0 coprocessor.
|
14775 |
|
|
.IP "\fB\-mdc\fR" 4
|
14776 |
|
|
.IX Item "-mdc"
|
14777 |
|
|
Causes constant variables to be placed in the \f(CW\*(C`.near\*(C'\fR section.
|
14778 |
|
|
.IP "\fB\-mdiv\fR" 4
|
14779 |
|
|
.IX Item "-mdiv"
|
14780 |
|
|
Enables the \f(CW\*(C`div\*(C'\fR and \f(CW\*(C`divu\*(C'\fR instructions.
|
14781 |
|
|
.IP "\fB\-meb\fR" 4
|
14782 |
|
|
.IX Item "-meb"
|
14783 |
|
|
Generate big-endian code.
|
14784 |
|
|
.IP "\fB\-mel\fR" 4
|
14785 |
|
|
.IX Item "-mel"
|
14786 |
|
|
Generate little-endian code.
|
14787 |
|
|
.IP "\fB\-mio\-volatile\fR" 4
|
14788 |
|
|
.IX Item "-mio-volatile"
|
14789 |
|
|
Tells the compiler that any variable marked with the \f(CW\*(C`io\*(C'\fR
|
14790 |
|
|
attribute is to be considered volatile.
|
14791 |
|
|
.IP "\fB\-ml\fR" 4
|
14792 |
|
|
.IX Item "-ml"
|
14793 |
|
|
Causes variables to be assigned to the \f(CW\*(C`.far\*(C'\fR section by default.
|
14794 |
|
|
.IP "\fB\-mleadz\fR" 4
|
14795 |
|
|
.IX Item "-mleadz"
|
14796 |
|
|
Enables the \f(CW\*(C`leadz\*(C'\fR (leading zero) instruction.
|
14797 |
|
|
.IP "\fB\-mm\fR" 4
|
14798 |
|
|
.IX Item "-mm"
|
14799 |
|
|
Causes variables to be assigned to the \f(CW\*(C`.near\*(C'\fR section by default.
|
14800 |
|
|
.IP "\fB\-mminmax\fR" 4
|
14801 |
|
|
.IX Item "-mminmax"
|
14802 |
|
|
Enables the \f(CW\*(C`min\*(C'\fR and \f(CW\*(C`max\*(C'\fR instructions.
|
14803 |
|
|
.IP "\fB\-mmult\fR" 4
|
14804 |
|
|
.IX Item "-mmult"
|
14805 |
|
|
Enables the multiplication and multiply-accumulate instructions.
|
14806 |
|
|
.IP "\fB\-mno\-opts\fR" 4
|
14807 |
|
|
.IX Item "-mno-opts"
|
14808 |
|
|
Disables all the optional instructions enabled by \f(CW\*(C`\-mall\-opts\*(C'\fR.
|
14809 |
|
|
.IP "\fB\-mrepeat\fR" 4
|
14810 |
|
|
.IX Item "-mrepeat"
|
14811 |
|
|
Enables the \f(CW\*(C`repeat\*(C'\fR and \f(CW\*(C`erepeat\*(C'\fR instructions, used for
|
14812 |
|
|
low-overhead looping.
|
14813 |
|
|
.IP "\fB\-ms\fR" 4
|
14814 |
|
|
.IX Item "-ms"
|
14815 |
|
|
Causes all variables to default to the \f(CW\*(C`.tiny\*(C'\fR section. Note
|
14816 |
|
|
that there is a 65536\-byte limit to this section. Accesses to these
|
14817 |
|
|
variables use the \f(CW%gp\fR base register.
|
14818 |
|
|
.IP "\fB\-msatur\fR" 4
|
14819 |
|
|
.IX Item "-msatur"
|
14820 |
|
|
Enables the saturation instructions. Note that the compiler does not
|
14821 |
|
|
currently generate these itself, but this option is included for
|
14822 |
|
|
compatibility with other tools, like \f(CW\*(C`as\*(C'\fR.
|
14823 |
|
|
.IP "\fB\-msdram\fR" 4
|
14824 |
|
|
.IX Item "-msdram"
|
14825 |
|
|
Link the SDRAM-based runtime instead of the default ROM-based runtime.
|
14826 |
|
|
.IP "\fB\-msim\fR" 4
|
14827 |
|
|
.IX Item "-msim"
|
14828 |
|
|
Link the simulator runtime libraries.
|
14829 |
|
|
.IP "\fB\-msimnovec\fR" 4
|
14830 |
|
|
.IX Item "-msimnovec"
|
14831 |
|
|
Link the simulator runtime libraries, excluding built-in support
|
14832 |
|
|
for reset and exception vectors and tables.
|
14833 |
|
|
.IP "\fB\-mtf\fR" 4
|
14834 |
|
|
.IX Item "-mtf"
|
14835 |
|
|
Causes all functions to default to the \f(CW\*(C`.far\*(C'\fR section. Without
|
14836 |
|
|
this option, functions default to the \f(CW\*(C`.near\*(C'\fR section.
|
14837 |
|
|
.IP "\fB\-mtiny=\fR\fIn\fR" 4
|
14838 |
|
|
.IX Item "-mtiny=n"
|
14839 |
|
|
Variables that are \fIn\fR bytes or smaller are allocated to the
|
14840 |
|
|
\&\f(CW\*(C`.tiny\*(C'\fR section. These variables use the \f(CW$gp\fR base
|
14841 |
|
|
register. The default for this option is 4, but note that there's a
|
14842 |
|
|
65536\-byte limit to the \f(CW\*(C`.tiny\*(C'\fR section.
|
14843 |
|
|
.PP
|
14844 |
|
|
\fIMicroBlaze Options\fR
|
14845 |
|
|
.IX Subsection "MicroBlaze Options"
|
14846 |
|
|
.IP "\fB\-msoft\-float\fR" 4
|
14847 |
|
|
.IX Item "-msoft-float"
|
14848 |
|
|
Use software emulation for floating point (default).
|
14849 |
|
|
.IP "\fB\-mhard\-float\fR" 4
|
14850 |
|
|
.IX Item "-mhard-float"
|
14851 |
|
|
Use hardware floating-point instructions.
|
14852 |
|
|
.IP "\fB\-mmemcpy\fR" 4
|
14853 |
|
|
.IX Item "-mmemcpy"
|
14854 |
|
|
Do not optimize block moves, use \f(CW\*(C`memcpy\*(C'\fR.
|
14855 |
|
|
.IP "\fB\-mno\-clearbss\fR" 4
|
14856 |
|
|
.IX Item "-mno-clearbss"
|
14857 |
|
|
This option is deprecated. Use \fB\-fno\-zero\-initialized\-in\-bss\fR instead.
|
14858 |
|
|
.IP "\fB\-mcpu=\fR\fIcpu-type\fR" 4
|
14859 |
|
|
.IX Item "-mcpu=cpu-type"
|
14860 |
|
|
Use features of, and schedule code for, the given \s-1CPU\s0.
|
14861 |
|
|
Supported values are in the format \fBv\fR\fIX\fR\fB.\fR\fI\s-1YY\s0\fR\fB.\fR\fIZ\fR,
|
14862 |
|
|
where \fIX\fR is a major version, \fI\s-1YY\s0\fR is the minor version, and
|
14863 |
|
|
\&\fIZ\fR is compatibility code. Example values are \fBv3.00.a\fR,
|
14864 |
|
|
\&\fBv4.00.b\fR, \fBv5.00.a\fR, \fBv5.00.b\fR, \fBv5.00.b\fR, \fBv6.00.a\fR.
|
14865 |
|
|
.IP "\fB\-mxl\-soft\-mul\fR" 4
|
14866 |
|
|
.IX Item "-mxl-soft-mul"
|
14867 |
|
|
Use software multiply emulation (default).
|
14868 |
|
|
.IP "\fB\-mxl\-soft\-div\fR" 4
|
14869 |
|
|
.IX Item "-mxl-soft-div"
|
14870 |
|
|
Use software emulation for divides (default).
|
14871 |
|
|
.IP "\fB\-mxl\-barrel\-shift\fR" 4
|
14872 |
|
|
.IX Item "-mxl-barrel-shift"
|
14873 |
|
|
Use the hardware barrel shifter.
|
14874 |
|
|
.IP "\fB\-mxl\-pattern\-compare\fR" 4
|
14875 |
|
|
.IX Item "-mxl-pattern-compare"
|
14876 |
|
|
Use pattern compare instructions.
|
14877 |
|
|
.IP "\fB\-msmall\-divides\fR" 4
|
14878 |
|
|
.IX Item "-msmall-divides"
|
14879 |
|
|
Use table lookup optimization for small signed integer divisions.
|
14880 |
|
|
.IP "\fB\-mxl\-stack\-check\fR" 4
|
14881 |
|
|
.IX Item "-mxl-stack-check"
|
14882 |
|
|
This option is deprecated. Use \fB\-fstack\-check\fR instead.
|
14883 |
|
|
.IP "\fB\-mxl\-gp\-opt\fR" 4
|
14884 |
|
|
.IX Item "-mxl-gp-opt"
|
14885 |
|
|
Use GP-relative \f(CW\*(C`.sdata\*(C'\fR/\f(CW\*(C`.sbss\*(C'\fR sections.
|
14886 |
|
|
.IP "\fB\-mxl\-multiply\-high\fR" 4
|
14887 |
|
|
.IX Item "-mxl-multiply-high"
|
14888 |
|
|
Use multiply high instructions for high part of 32x32 multiply.
|
14889 |
|
|
.IP "\fB\-mxl\-float\-convert\fR" 4
|
14890 |
|
|
.IX Item "-mxl-float-convert"
|
14891 |
|
|
Use hardware floating-point conversion instructions.
|
14892 |
|
|
.IP "\fB\-mxl\-float\-sqrt\fR" 4
|
14893 |
|
|
.IX Item "-mxl-float-sqrt"
|
14894 |
|
|
Use hardware floating-point square root instruction.
|
14895 |
|
|
.IP "\fB\-mxl\-mode\-\fR\fIapp-model\fR" 4
|
14896 |
|
|
.IX Item "-mxl-mode-app-model"
|
14897 |
|
|
Select application model \fIapp-model\fR. Valid models are
|
14898 |
|
|
.RS 4
|
14899 |
|
|
.IP "\fBexecutable\fR" 4
|
14900 |
|
|
.IX Item "executable"
|
14901 |
|
|
normal executable (default), uses startup code \fIcrt0.o\fR.
|
14902 |
|
|
.IP "\fBxmdstub\fR" 4
|
14903 |
|
|
.IX Item "xmdstub"
|
14904 |
|
|
for use with Xilinx Microprocessor Debugger (\s-1XMD\s0) based
|
14905 |
|
|
software intrusive debug agent called xmdstub. This uses startup file
|
14906 |
|
|
\&\fIcrt1.o\fR and sets the start address of the program to 0x800.
|
14907 |
|
|
.IP "\fBbootstrap\fR" 4
|
14908 |
|
|
.IX Item "bootstrap"
|
14909 |
|
|
for applications that are loaded using a bootloader.
|
14910 |
|
|
This model uses startup file \fIcrt2.o\fR which does not contain a processor
|
14911 |
|
|
reset vector handler. This is suitable for transferring control on a
|
14912 |
|
|
processor reset to the bootloader rather than the application.
|
14913 |
|
|
.IP "\fBnovectors\fR" 4
|
14914 |
|
|
.IX Item "novectors"
|
14915 |
|
|
for applications that do not require any of the
|
14916 |
|
|
MicroBlaze vectors. This option may be useful for applications running
|
14917 |
|
|
within a monitoring application. This model uses \fIcrt3.o\fR as a startup file.
|
14918 |
|
|
.RE
|
14919 |
|
|
.RS 4
|
14920 |
|
|
.Sp
|
14921 |
|
|
Option \fB\-xl\-mode\-\fR\fIapp-model\fR is a deprecated alias for
|
14922 |
|
|
\&\fB\-mxl\-mode\-\fR\fIapp-model\fR.
|
14923 |
|
|
.RE
|
14924 |
|
|
.PP
|
14925 |
|
|
\fI\s-1MIPS\s0 Options\fR
|
14926 |
|
|
.IX Subsection "MIPS Options"
|
14927 |
|
|
.IP "\fB\-EB\fR" 4
|
14928 |
|
|
.IX Item "-EB"
|
14929 |
|
|
Generate big-endian code.
|
14930 |
|
|
.IP "\fB\-EL\fR" 4
|
14931 |
|
|
.IX Item "-EL"
|
14932 |
|
|
Generate little-endian code. This is the default for \fBmips*el\-*\-*\fR
|
14933 |
|
|
configurations.
|
14934 |
|
|
.IP "\fB\-march=\fR\fIarch\fR" 4
|
14935 |
|
|
.IX Item "-march=arch"
|
14936 |
|
|
Generate code that runs on \fIarch\fR, which can be the name of a
|
14937 |
|
|
generic \s-1MIPS\s0 \s-1ISA\s0, or the name of a particular processor.
|
14938 |
|
|
The \s-1ISA\s0 names are:
|
14939 |
|
|
\&\fBmips1\fR, \fBmips2\fR, \fBmips3\fR, \fBmips4\fR,
|
14940 |
|
|
\&\fBmips32\fR, \fBmips32r2\fR, \fBmips64\fR and \fBmips64r2\fR.
|
14941 |
|
|
The processor names are:
|
14942 |
|
|
\&\fB4kc\fR, \fB4km\fR, \fB4kp\fR, \fB4ksc\fR,
|
14943 |
|
|
\&\fB4kec\fR, \fB4kem\fR, \fB4kep\fR, \fB4ksd\fR,
|
14944 |
|
|
\&\fB5kc\fR, \fB5kf\fR,
|
14945 |
|
|
\&\fB20kc\fR,
|
14946 |
|
|
\&\fB24kc\fR, \fB24kf2_1\fR, \fB24kf1_1\fR,
|
14947 |
|
|
\&\fB24kec\fR, \fB24kef2_1\fR, \fB24kef1_1\fR,
|
14948 |
|
|
\&\fB34kc\fR, \fB34kf2_1\fR, \fB34kf1_1\fR, \fB34kn\fR,
|
14949 |
|
|
\&\fB74kc\fR, \fB74kf2_1\fR, \fB74kf1_1\fR, \fB74kf3_2\fR,
|
14950 |
|
|
\&\fB1004kc\fR, \fB1004kf2_1\fR, \fB1004kf1_1\fR,
|
14951 |
|
|
\&\fBloongson2e\fR, \fBloongson2f\fR, \fBloongson3a\fR,
|
14952 |
|
|
\&\fBm4k\fR,
|
14953 |
|
|
\&\fBocteon\fR, \fBocteon+\fR, \fBocteon2\fR,
|
14954 |
|
|
\&\fBorion\fR,
|
14955 |
|
|
\&\fBr2000\fR, \fBr3000\fR, \fBr3900\fR, \fBr4000\fR, \fBr4400\fR,
|
14956 |
|
|
\&\fBr4600\fR, \fBr4650\fR, \fBr6000\fR, \fBr8000\fR,
|
14957 |
|
|
\&\fBrm7000\fR, \fBrm9000\fR,
|
14958 |
|
|
\&\fBr10000\fR, \fBr12000\fR, \fBr14000\fR, \fBr16000\fR,
|
14959 |
|
|
\&\fBsb1\fR,
|
14960 |
|
|
\&\fBsr71000\fR,
|
14961 |
|
|
\&\fBvr4100\fR, \fBvr4111\fR, \fBvr4120\fR, \fBvr4130\fR, \fBvr4300\fR,
|
14962 |
|
|
\&\fBvr5000\fR, \fBvr5400\fR, \fBvr5500\fR,
|
14963 |
|
|
\&\fBxlr\fR and \fBxlp\fR.
|
14964 |
|
|
The special value \fBfrom-abi\fR selects the
|
14965 |
|
|
most compatible architecture for the selected \s-1ABI\s0 (that is,
|
14966 |
|
|
\&\fBmips1\fR for 32\-bit ABIs and \fBmips3\fR for 64\-bit ABIs).
|
14967 |
|
|
.Sp
|
14968 |
|
|
The native Linux/GNU toolchain also supports the value \fBnative\fR,
|
14969 |
|
|
which selects the best architecture option for the host processor.
|
14970 |
|
|
\&\fB\-march=native\fR has no effect if \s-1GCC\s0 does not recognize
|
14971 |
|
|
the processor.
|
14972 |
|
|
.Sp
|
14973 |
|
|
In processor names, a final \fB000\fR can be abbreviated as \fBk\fR
|
14974 |
|
|
(for example, \fB\-march=r2k\fR). Prefixes are optional, and
|
14975 |
|
|
\&\fBvr\fR may be written \fBr\fR.
|
14976 |
|
|
.Sp
|
14977 |
|
|
Names of the form \fIn\fR\fBf2_1\fR refer to processors with
|
14978 |
|
|
FPUs clocked at half the rate of the core, names of the form
|
14979 |
|
|
\&\fIn\fR\fBf1_1\fR refer to processors with FPUs clocked at the same
|
14980 |
|
|
rate as the core, and names of the form \fIn\fR\fBf3_2\fR refer to
|
14981 |
|
|
processors with FPUs clocked a ratio of 3:2 with respect to the core.
|
14982 |
|
|
For compatibility reasons, \fIn\fR\fBf\fR is accepted as a synonym
|
14983 |
|
|
for \fIn\fR\fBf2_1\fR while \fIn\fR\fBx\fR and \fIb\fR\fBfx\fR are
|
14984 |
|
|
accepted as synonyms for \fIn\fR\fBf1_1\fR.
|
14985 |
|
|
.Sp
|
14986 |
|
|
\&\s-1GCC\s0 defines two macros based on the value of this option. The first
|
14987 |
|
|
is \fB_MIPS_ARCH\fR, which gives the name of target architecture, as
|
14988 |
|
|
a string. The second has the form \fB_MIPS_ARCH_\fR\fIfoo\fR,
|
14989 |
|
|
where \fIfoo\fR is the capitalized value of \fB_MIPS_ARCH\fR.
|
14990 |
|
|
For example, \fB\-march=r2000\fR sets \fB_MIPS_ARCH\fR
|
14991 |
|
|
to \fB\*(L"r2000\*(R"\fR and defines the macro \fB_MIPS_ARCH_R2000\fR.
|
14992 |
|
|
.Sp
|
14993 |
|
|
Note that the \fB_MIPS_ARCH\fR macro uses the processor names given
|
14994 |
|
|
above. In other words, it has the full prefix and does not
|
14995 |
|
|
abbreviate \fB000\fR as \fBk\fR. In the case of \fBfrom-abi\fR,
|
14996 |
|
|
the macro names the resolved architecture (either \fB\*(L"mips1\*(R"\fR or
|
14997 |
|
|
\&\fB\*(L"mips3\*(R"\fR). It names the default architecture when no
|
14998 |
|
|
\&\fB\-march\fR option is given.
|
14999 |
|
|
.IP "\fB\-mtune=\fR\fIarch\fR" 4
|
15000 |
|
|
.IX Item "-mtune=arch"
|
15001 |
|
|
Optimize for \fIarch\fR. Among other things, this option controls
|
15002 |
|
|
the way instructions are scheduled, and the perceived cost of arithmetic
|
15003 |
|
|
operations. The list of \fIarch\fR values is the same as for
|
15004 |
|
|
\&\fB\-march\fR.
|
15005 |
|
|
.Sp
|
15006 |
|
|
When this option is not used, \s-1GCC\s0 optimizes for the processor
|
15007 |
|
|
specified by \fB\-march\fR. By using \fB\-march\fR and
|
15008 |
|
|
\&\fB\-mtune\fR together, it is possible to generate code that
|
15009 |
|
|
runs on a family of processors, but optimize the code for one
|
15010 |
|
|
particular member of that family.
|
15011 |
|
|
.Sp
|
15012 |
|
|
\&\fB\-mtune\fR defines the macros \fB_MIPS_TUNE\fR and
|
15013 |
|
|
\&\fB_MIPS_TUNE_\fR\fIfoo\fR, which work in the same way as the
|
15014 |
|
|
\&\fB\-march\fR ones described above.
|
15015 |
|
|
.IP "\fB\-mips1\fR" 4
|
15016 |
|
|
.IX Item "-mips1"
|
15017 |
|
|
Equivalent to \fB\-march=mips1\fR.
|
15018 |
|
|
.IP "\fB\-mips2\fR" 4
|
15019 |
|
|
.IX Item "-mips2"
|
15020 |
|
|
Equivalent to \fB\-march=mips2\fR.
|
15021 |
|
|
.IP "\fB\-mips3\fR" 4
|
15022 |
|
|
.IX Item "-mips3"
|
15023 |
|
|
Equivalent to \fB\-march=mips3\fR.
|
15024 |
|
|
.IP "\fB\-mips4\fR" 4
|
15025 |
|
|
.IX Item "-mips4"
|
15026 |
|
|
Equivalent to \fB\-march=mips4\fR.
|
15027 |
|
|
.IP "\fB\-mips32\fR" 4
|
15028 |
|
|
.IX Item "-mips32"
|
15029 |
|
|
Equivalent to \fB\-march=mips32\fR.
|
15030 |
|
|
.IP "\fB\-mips32r2\fR" 4
|
15031 |
|
|
.IX Item "-mips32r2"
|
15032 |
|
|
Equivalent to \fB\-march=mips32r2\fR.
|
15033 |
|
|
.IP "\fB\-mips64\fR" 4
|
15034 |
|
|
.IX Item "-mips64"
|
15035 |
|
|
Equivalent to \fB\-march=mips64\fR.
|
15036 |
|
|
.IP "\fB\-mips64r2\fR" 4
|
15037 |
|
|
.IX Item "-mips64r2"
|
15038 |
|
|
Equivalent to \fB\-march=mips64r2\fR.
|
15039 |
|
|
.IP "\fB\-mips16\fR" 4
|
15040 |
|
|
.IX Item "-mips16"
|
15041 |
|
|
.PD 0
|
15042 |
|
|
.IP "\fB\-mno\-mips16\fR" 4
|
15043 |
|
|
.IX Item "-mno-mips16"
|
15044 |
|
|
.PD
|
15045 |
|
|
Generate (do not generate) \s-1MIPS16\s0 code. If \s-1GCC\s0 is targeting a
|
15046 |
|
|
\&\s-1MIPS32\s0 or \s-1MIPS64\s0 architecture, it makes use of the MIPS16e \s-1ASE\s0.
|
15047 |
|
|
.Sp
|
15048 |
|
|
\&\s-1MIPS16\s0 code generation can also be controlled on a per-function basis
|
15049 |
|
|
by means of \f(CW\*(C`mips16\*(C'\fR and \f(CW\*(C`nomips16\*(C'\fR attributes.
|
15050 |
|
|
.IP "\fB\-mflip\-mips16\fR" 4
|
15051 |
|
|
.IX Item "-mflip-mips16"
|
15052 |
|
|
Generate \s-1MIPS16\s0 code on alternating functions. This option is provided
|
15053 |
|
|
for regression testing of mixed MIPS16/non\-MIPS16 code generation, and is
|
15054 |
|
|
not intended for ordinary use in compiling user code.
|
15055 |
|
|
.IP "\fB\-minterlink\-mips16\fR" 4
|
15056 |
|
|
.IX Item "-minterlink-mips16"
|
15057 |
|
|
.PD 0
|
15058 |
|
|
.IP "\fB\-mno\-interlink\-mips16\fR" 4
|
15059 |
|
|
.IX Item "-mno-interlink-mips16"
|
15060 |
|
|
.PD
|
15061 |
|
|
Require (do not require) that non\-MIPS16 code be link-compatible with
|
15062 |
|
|
\&\s-1MIPS16\s0 code.
|
15063 |
|
|
.Sp
|
15064 |
|
|
For example, non\-MIPS16 code cannot jump directly to \s-1MIPS16\s0 code;
|
15065 |
|
|
it must either use a call or an indirect jump. \fB\-minterlink\-mips16\fR
|
15066 |
|
|
therefore disables direct jumps unless \s-1GCC\s0 knows that the target of the
|
15067 |
|
|
jump is not \s-1MIPS16\s0.
|
15068 |
|
|
.IP "\fB\-mabi=32\fR" 4
|
15069 |
|
|
.IX Item "-mabi=32"
|
15070 |
|
|
.PD 0
|
15071 |
|
|
.IP "\fB\-mabi=o64\fR" 4
|
15072 |
|
|
.IX Item "-mabi=o64"
|
15073 |
|
|
.IP "\fB\-mabi=n32\fR" 4
|
15074 |
|
|
.IX Item "-mabi=n32"
|
15075 |
|
|
.IP "\fB\-mabi=64\fR" 4
|
15076 |
|
|
.IX Item "-mabi=64"
|
15077 |
|
|
.IP "\fB\-mabi=eabi\fR" 4
|
15078 |
|
|
.IX Item "-mabi=eabi"
|
15079 |
|
|
.PD
|
15080 |
|
|
Generate code for the given \s-1ABI\s0.
|
15081 |
|
|
.Sp
|
15082 |
|
|
Note that the \s-1EABI\s0 has a 32\-bit and a 64\-bit variant. \s-1GCC\s0 normally
|
15083 |
|
|
generates 64\-bit code when you select a 64\-bit architecture, but you
|
15084 |
|
|
can use \fB\-mgp32\fR to get 32\-bit code instead.
|
15085 |
|
|
.Sp
|
15086 |
|
|
For information about the O64 \s-1ABI\s0, see
|
15087 |
|
|
<\fBhttp://gcc.gnu.org/projects/mipso64\-abi.html\fR>.
|
15088 |
|
|
.Sp
|
15089 |
|
|
\&\s-1GCC\s0 supports a variant of the o32 \s-1ABI\s0 in which floating-point registers
|
15090 |
|
|
are 64 rather than 32 bits wide. You can select this combination with
|
15091 |
|
|
\&\fB\-mabi=32\fR \fB\-mfp64\fR. This \s-1ABI\s0 relies on the \f(CW\*(C`mthc1\*(C'\fR
|
15092 |
|
|
and \f(CW\*(C`mfhc1\*(C'\fR instructions and is therefore only supported for
|
15093 |
|
|
\&\s-1MIPS32R2\s0 processors.
|
15094 |
|
|
.Sp
|
15095 |
|
|
The register assignments for arguments and return values remain the
|
15096 |
|
|
same, but each scalar value is passed in a single 64\-bit register
|
15097 |
|
|
rather than a pair of 32\-bit registers. For example, scalar
|
15098 |
|
|
floating-point values are returned in \fB\f(CB$f0\fB\fR only, not a
|
15099 |
|
|
\&\fB\f(CB$f0\fB\fR/\fB\f(CB$f1\fB\fR pair. The set of call-saved registers also
|
15100 |
|
|
remains the same, but all 64 bits are saved.
|
15101 |
|
|
.IP "\fB\-mabicalls\fR" 4
|
15102 |
|
|
.IX Item "-mabicalls"
|
15103 |
|
|
.PD 0
|
15104 |
|
|
.IP "\fB\-mno\-abicalls\fR" 4
|
15105 |
|
|
.IX Item "-mno-abicalls"
|
15106 |
|
|
.PD
|
15107 |
|
|
Generate (do not generate) code that is suitable for SVR4\-style
|
15108 |
|
|
dynamic objects. \fB\-mabicalls\fR is the default for SVR4\-based
|
15109 |
|
|
systems.
|
15110 |
|
|
.IP "\fB\-mshared\fR" 4
|
15111 |
|
|
.IX Item "-mshared"
|
15112 |
|
|
.PD 0
|
15113 |
|
|
.IP "\fB\-mno\-shared\fR" 4
|
15114 |
|
|
.IX Item "-mno-shared"
|
15115 |
|
|
.PD
|
15116 |
|
|
Generate (do not generate) code that is fully position-independent,
|
15117 |
|
|
and that can therefore be linked into shared libraries. This option
|
15118 |
|
|
only affects \fB\-mabicalls\fR.
|
15119 |
|
|
.Sp
|
15120 |
|
|
All \fB\-mabicalls\fR code has traditionally been position-independent,
|
15121 |
|
|
regardless of options like \fB\-fPIC\fR and \fB\-fpic\fR. However,
|
15122 |
|
|
as an extension, the \s-1GNU\s0 toolchain allows executables to use absolute
|
15123 |
|
|
accesses for locally-binding symbols. It can also use shorter \s-1GP\s0
|
15124 |
|
|
initialization sequences and generate direct calls to locally-defined
|
15125 |
|
|
functions. This mode is selected by \fB\-mno\-shared\fR.
|
15126 |
|
|
.Sp
|
15127 |
|
|
\&\fB\-mno\-shared\fR depends on binutils 2.16 or higher and generates
|
15128 |
|
|
objects that can only be linked by the \s-1GNU\s0 linker. However, the option
|
15129 |
|
|
does not affect the \s-1ABI\s0 of the final executable; it only affects the \s-1ABI\s0
|
15130 |
|
|
of relocatable objects. Using \fB\-mno\-shared\fR generally makes
|
15131 |
|
|
executables both smaller and quicker.
|
15132 |
|
|
.Sp
|
15133 |
|
|
\&\fB\-mshared\fR is the default.
|
15134 |
|
|
.IP "\fB\-mplt\fR" 4
|
15135 |
|
|
.IX Item "-mplt"
|
15136 |
|
|
.PD 0
|
15137 |
|
|
.IP "\fB\-mno\-plt\fR" 4
|
15138 |
|
|
.IX Item "-mno-plt"
|
15139 |
|
|
.PD
|
15140 |
|
|
Assume (do not assume) that the static and dynamic linkers
|
15141 |
|
|
support PLTs and copy relocations. This option only affects
|
15142 |
|
|
\&\fB\-mno\-shared \-mabicalls\fR. For the n64 \s-1ABI\s0, this option
|
15143 |
|
|
has no effect without \fB\-msym32\fR.
|
15144 |
|
|
.Sp
|
15145 |
|
|
You can make \fB\-mplt\fR the default by configuring
|
15146 |
|
|
\&\s-1GCC\s0 with \fB\-\-with\-mips\-plt\fR. The default is
|
15147 |
|
|
\&\fB\-mno\-plt\fR otherwise.
|
15148 |
|
|
.IP "\fB\-mxgot\fR" 4
|
15149 |
|
|
.IX Item "-mxgot"
|
15150 |
|
|
.PD 0
|
15151 |
|
|
.IP "\fB\-mno\-xgot\fR" 4
|
15152 |
|
|
.IX Item "-mno-xgot"
|
15153 |
|
|
.PD
|
15154 |
|
|
Lift (do not lift) the usual restrictions on the size of the global
|
15155 |
|
|
offset table.
|
15156 |
|
|
.Sp
|
15157 |
|
|
\&\s-1GCC\s0 normally uses a single instruction to load values from the \s-1GOT\s0.
|
15158 |
|
|
While this is relatively efficient, it only works if the \s-1GOT\s0
|
15159 |
|
|
is smaller than about 64k. Anything larger causes the linker
|
15160 |
|
|
to report an error such as:
|
15161 |
|
|
.Sp
|
15162 |
|
|
.Vb 1
|
15163 |
|
|
\& relocation truncated to fit: R_MIPS_GOT16 foobar
|
15164 |
|
|
.Ve
|
15165 |
|
|
.Sp
|
15166 |
|
|
If this happens, you should recompile your code with \fB\-mxgot\fR.
|
15167 |
|
|
This works with very large GOTs, although the code is also
|
15168 |
|
|
less efficient, since it takes three instructions to fetch the
|
15169 |
|
|
value of a global symbol.
|
15170 |
|
|
.Sp
|
15171 |
|
|
Note that some linkers can create multiple GOTs. If you have such a
|
15172 |
|
|
linker, you should only need to use \fB\-mxgot\fR when a single object
|
15173 |
|
|
file accesses more than 64k's worth of \s-1GOT\s0 entries. Very few do.
|
15174 |
|
|
.Sp
|
15175 |
|
|
These options have no effect unless \s-1GCC\s0 is generating position
|
15176 |
|
|
independent code.
|
15177 |
|
|
.IP "\fB\-mgp32\fR" 4
|
15178 |
|
|
.IX Item "-mgp32"
|
15179 |
|
|
Assume that general-purpose registers are 32 bits wide.
|
15180 |
|
|
.IP "\fB\-mgp64\fR" 4
|
15181 |
|
|
.IX Item "-mgp64"
|
15182 |
|
|
Assume that general-purpose registers are 64 bits wide.
|
15183 |
|
|
.IP "\fB\-mfp32\fR" 4
|
15184 |
|
|
.IX Item "-mfp32"
|
15185 |
|
|
Assume that floating-point registers are 32 bits wide.
|
15186 |
|
|
.IP "\fB\-mfp64\fR" 4
|
15187 |
|
|
.IX Item "-mfp64"
|
15188 |
|
|
Assume that floating-point registers are 64 bits wide.
|
15189 |
|
|
.IP "\fB\-mhard\-float\fR" 4
|
15190 |
|
|
.IX Item "-mhard-float"
|
15191 |
|
|
Use floating-point coprocessor instructions.
|
15192 |
|
|
.IP "\fB\-msoft\-float\fR" 4
|
15193 |
|
|
.IX Item "-msoft-float"
|
15194 |
|
|
Do not use floating-point coprocessor instructions. Implement
|
15195 |
|
|
floating-point calculations using library calls instead.
|
15196 |
|
|
.IP "\fB\-mno\-float\fR" 4
|
15197 |
|
|
.IX Item "-mno-float"
|
15198 |
|
|
Equivalent to \fB\-msoft\-float\fR, but additionally asserts that the
|
15199 |
|
|
program being compiled does not perform any floating-point operations.
|
15200 |
|
|
This option is presently supported only by some bare-metal \s-1MIPS\s0
|
15201 |
|
|
configurations, where it may select a special set of libraries
|
15202 |
|
|
that lack all floating-point support (including, for example, the
|
15203 |
|
|
floating-point \f(CW\*(C`printf\*(C'\fR formats).
|
15204 |
|
|
If code compiled with \f(CW\*(C`\-mno\-float\*(C'\fR accidentally contains
|
15205 |
|
|
floating-point operations, it is likely to suffer a link-time
|
15206 |
|
|
or run-time failure.
|
15207 |
|
|
.IP "\fB\-msingle\-float\fR" 4
|
15208 |
|
|
.IX Item "-msingle-float"
|
15209 |
|
|
Assume that the floating-point coprocessor only supports single-precision
|
15210 |
|
|
operations.
|
15211 |
|
|
.IP "\fB\-mdouble\-float\fR" 4
|
15212 |
|
|
.IX Item "-mdouble-float"
|
15213 |
|
|
Assume that the floating-point coprocessor supports double-precision
|
15214 |
|
|
operations. This is the default.
|
15215 |
|
|
.IP "\fB\-mllsc\fR" 4
|
15216 |
|
|
.IX Item "-mllsc"
|
15217 |
|
|
.PD 0
|
15218 |
|
|
.IP "\fB\-mno\-llsc\fR" 4
|
15219 |
|
|
.IX Item "-mno-llsc"
|
15220 |
|
|
.PD
|
15221 |
|
|
Use (do not use) \fBll\fR, \fBsc\fR, and \fBsync\fR instructions to
|
15222 |
|
|
implement atomic memory built-in functions. When neither option is
|
15223 |
|
|
specified, \s-1GCC\s0 uses the instructions if the target architecture
|
15224 |
|
|
supports them.
|
15225 |
|
|
.Sp
|
15226 |
|
|
\&\fB\-mllsc\fR is useful if the runtime environment can emulate the
|
15227 |
|
|
instructions and \fB\-mno\-llsc\fR can be useful when compiling for
|
15228 |
|
|
nonstandard ISAs. You can make either option the default by
|
15229 |
|
|
configuring \s-1GCC\s0 with \fB\-\-with\-llsc\fR and \fB\-\-without\-llsc\fR
|
15230 |
|
|
respectively. \fB\-\-with\-llsc\fR is the default for some
|
15231 |
|
|
configurations; see the installation documentation for details.
|
15232 |
|
|
.IP "\fB\-mdsp\fR" 4
|
15233 |
|
|
.IX Item "-mdsp"
|
15234 |
|
|
.PD 0
|
15235 |
|
|
.IP "\fB\-mno\-dsp\fR" 4
|
15236 |
|
|
.IX Item "-mno-dsp"
|
15237 |
|
|
.PD
|
15238 |
|
|
Use (do not use) revision 1 of the \s-1MIPS\s0 \s-1DSP\s0 \s-1ASE\s0.
|
15239 |
|
|
This option defines the
|
15240 |
|
|
preprocessor macro \fB_\|_mips_dsp\fR. It also defines
|
15241 |
|
|
\&\fB_\|_mips_dsp_rev\fR to 1.
|
15242 |
|
|
.IP "\fB\-mdspr2\fR" 4
|
15243 |
|
|
.IX Item "-mdspr2"
|
15244 |
|
|
.PD 0
|
15245 |
|
|
.IP "\fB\-mno\-dspr2\fR" 4
|
15246 |
|
|
.IX Item "-mno-dspr2"
|
15247 |
|
|
.PD
|
15248 |
|
|
Use (do not use) revision 2 of the \s-1MIPS\s0 \s-1DSP\s0 \s-1ASE\s0.
|
15249 |
|
|
This option defines the
|
15250 |
|
|
preprocessor macros \fB_\|_mips_dsp\fR and \fB_\|_mips_dspr2\fR.
|
15251 |
|
|
It also defines \fB_\|_mips_dsp_rev\fR to 2.
|
15252 |
|
|
.IP "\fB\-msmartmips\fR" 4
|
15253 |
|
|
.IX Item "-msmartmips"
|
15254 |
|
|
.PD 0
|
15255 |
|
|
.IP "\fB\-mno\-smartmips\fR" 4
|
15256 |
|
|
.IX Item "-mno-smartmips"
|
15257 |
|
|
.PD
|
15258 |
|
|
Use (do not use) the \s-1MIPS\s0 SmartMIPS \s-1ASE\s0.
|
15259 |
|
|
.IP "\fB\-mpaired\-single\fR" 4
|
15260 |
|
|
.IX Item "-mpaired-single"
|
15261 |
|
|
.PD 0
|
15262 |
|
|
.IP "\fB\-mno\-paired\-single\fR" 4
|
15263 |
|
|
.IX Item "-mno-paired-single"
|
15264 |
|
|
.PD
|
15265 |
|
|
Use (do not use) paired-single floating-point instructions.
|
15266 |
|
|
This option requires
|
15267 |
|
|
hardware floating-point support to be enabled.
|
15268 |
|
|
.IP "\fB\-mdmx\fR" 4
|
15269 |
|
|
.IX Item "-mdmx"
|
15270 |
|
|
.PD 0
|
15271 |
|
|
.IP "\fB\-mno\-mdmx\fR" 4
|
15272 |
|
|
.IX Item "-mno-mdmx"
|
15273 |
|
|
.PD
|
15274 |
|
|
Use (do not use) \s-1MIPS\s0 Digital Media Extension instructions.
|
15275 |
|
|
This option can only be used when generating 64\-bit code and requires
|
15276 |
|
|
hardware floating-point support to be enabled.
|
15277 |
|
|
.IP "\fB\-mips3d\fR" 4
|
15278 |
|
|
.IX Item "-mips3d"
|
15279 |
|
|
.PD 0
|
15280 |
|
|
.IP "\fB\-mno\-mips3d\fR" 4
|
15281 |
|
|
.IX Item "-mno-mips3d"
|
15282 |
|
|
.PD
|
15283 |
|
|
Use (do not use) the \s-1MIPS\-3D\s0 \s-1ASE\s0.
|
15284 |
|
|
The option \fB\-mips3d\fR implies \fB\-mpaired\-single\fR.
|
15285 |
|
|
.IP "\fB\-mmt\fR" 4
|
15286 |
|
|
.IX Item "-mmt"
|
15287 |
|
|
.PD 0
|
15288 |
|
|
.IP "\fB\-mno\-mt\fR" 4
|
15289 |
|
|
.IX Item "-mno-mt"
|
15290 |
|
|
.PD
|
15291 |
|
|
Use (do not use) \s-1MT\s0 Multithreading instructions.
|
15292 |
|
|
.IP "\fB\-mmcu\fR" 4
|
15293 |
|
|
.IX Item "-mmcu"
|
15294 |
|
|
.PD 0
|
15295 |
|
|
.IP "\fB\-mno\-mcu\fR" 4
|
15296 |
|
|
.IX Item "-mno-mcu"
|
15297 |
|
|
.PD
|
15298 |
|
|
Use (do not use) the \s-1MIPS\s0 \s-1MCU\s0 \s-1ASE\s0 instructions.
|
15299 |
|
|
.IP "\fB\-mlong64\fR" 4
|
15300 |
|
|
.IX Item "-mlong64"
|
15301 |
|
|
Force \f(CW\*(C`long\*(C'\fR types to be 64 bits wide. See \fB\-mlong32\fR for
|
15302 |
|
|
an explanation of the default and the way that the pointer size is
|
15303 |
|
|
determined.
|
15304 |
|
|
.IP "\fB\-mlong32\fR" 4
|
15305 |
|
|
.IX Item "-mlong32"
|
15306 |
|
|
Force \f(CW\*(C`long\*(C'\fR, \f(CW\*(C`int\*(C'\fR, and pointer types to be 32 bits wide.
|
15307 |
|
|
.Sp
|
15308 |
|
|
The default size of \f(CW\*(C`int\*(C'\fRs, \f(CW\*(C`long\*(C'\fRs and pointers depends on
|
15309 |
|
|
the \s-1ABI\s0. All the supported ABIs use 32\-bit \f(CW\*(C`int\*(C'\fRs. The n64 \s-1ABI\s0
|
15310 |
|
|
uses 64\-bit \f(CW\*(C`long\*(C'\fRs, as does the 64\-bit \s-1EABI\s0; the others use
|
15311 |
|
|
32\-bit \f(CW\*(C`long\*(C'\fRs. Pointers are the same size as \f(CW\*(C`long\*(C'\fRs,
|
15312 |
|
|
or the same size as integer registers, whichever is smaller.
|
15313 |
|
|
.IP "\fB\-msym32\fR" 4
|
15314 |
|
|
.IX Item "-msym32"
|
15315 |
|
|
.PD 0
|
15316 |
|
|
.IP "\fB\-mno\-sym32\fR" 4
|
15317 |
|
|
.IX Item "-mno-sym32"
|
15318 |
|
|
.PD
|
15319 |
|
|
Assume (do not assume) that all symbols have 32\-bit values, regardless
|
15320 |
|
|
of the selected \s-1ABI\s0. This option is useful in combination with
|
15321 |
|
|
\&\fB\-mabi=64\fR and \fB\-mno\-abicalls\fR because it allows \s-1GCC\s0
|
15322 |
|
|
to generate shorter and faster references to symbolic addresses.
|
15323 |
|
|
.IP "\fB\-G\fR \fInum\fR" 4
|
15324 |
|
|
.IX Item "-G num"
|
15325 |
|
|
Put definitions of externally-visible data in a small data section
|
15326 |
|
|
if that data is no bigger than \fInum\fR bytes. \s-1GCC\s0 can then generate
|
15327 |
|
|
more efficient accesses to the data; see \fB\-mgpopt\fR for details.
|
15328 |
|
|
.Sp
|
15329 |
|
|
The default \fB\-G\fR option depends on the configuration.
|
15330 |
|
|
.IP "\fB\-mlocal\-sdata\fR" 4
|
15331 |
|
|
.IX Item "-mlocal-sdata"
|
15332 |
|
|
.PD 0
|
15333 |
|
|
.IP "\fB\-mno\-local\-sdata\fR" 4
|
15334 |
|
|
.IX Item "-mno-local-sdata"
|
15335 |
|
|
.PD
|
15336 |
|
|
Extend (do not extend) the \fB\-G\fR behavior to local data too,
|
15337 |
|
|
such as to static variables in C. \fB\-mlocal\-sdata\fR is the
|
15338 |
|
|
default for all configurations.
|
15339 |
|
|
.Sp
|
15340 |
|
|
If the linker complains that an application is using too much small data,
|
15341 |
|
|
you might want to try rebuilding the less performance-critical parts with
|
15342 |
|
|
\&\fB\-mno\-local\-sdata\fR. You might also want to build large
|
15343 |
|
|
libraries with \fB\-mno\-local\-sdata\fR, so that the libraries leave
|
15344 |
|
|
more room for the main program.
|
15345 |
|
|
.IP "\fB\-mextern\-sdata\fR" 4
|
15346 |
|
|
.IX Item "-mextern-sdata"
|
15347 |
|
|
.PD 0
|
15348 |
|
|
.IP "\fB\-mno\-extern\-sdata\fR" 4
|
15349 |
|
|
.IX Item "-mno-extern-sdata"
|
15350 |
|
|
.PD
|
15351 |
|
|
Assume (do not assume) that externally-defined data is in
|
15352 |
|
|
a small data section if the size of that data is within the \fB\-G\fR limit.
|
15353 |
|
|
\&\fB\-mextern\-sdata\fR is the default for all configurations.
|
15354 |
|
|
.Sp
|
15355 |
|
|
If you compile a module \fIMod\fR with \fB\-mextern\-sdata\fR \fB\-G\fR
|
15356 |
|
|
\&\fInum\fR \fB\-mgpopt\fR, and \fIMod\fR references a variable \fIVar\fR
|
15357 |
|
|
that is no bigger than \fInum\fR bytes, you must make sure that \fIVar\fR
|
15358 |
|
|
is placed in a small data section. If \fIVar\fR is defined by another
|
15359 |
|
|
module, you must either compile that module with a high-enough
|
15360 |
|
|
\&\fB\-G\fR setting or attach a \f(CW\*(C`section\*(C'\fR attribute to \fIVar\fR's
|
15361 |
|
|
definition. If \fIVar\fR is common, you must link the application
|
15362 |
|
|
with a high-enough \fB\-G\fR setting.
|
15363 |
|
|
.Sp
|
15364 |
|
|
The easiest way of satisfying these restrictions is to compile
|
15365 |
|
|
and link every module with the same \fB\-G\fR option. However,
|
15366 |
|
|
you may wish to build a library that supports several different
|
15367 |
|
|
small data limits. You can do this by compiling the library with
|
15368 |
|
|
the highest supported \fB\-G\fR setting and additionally using
|
15369 |
|
|
\&\fB\-mno\-extern\-sdata\fR to stop the library from making assumptions
|
15370 |
|
|
about externally-defined data.
|
15371 |
|
|
.IP "\fB\-mgpopt\fR" 4
|
15372 |
|
|
.IX Item "-mgpopt"
|
15373 |
|
|
.PD 0
|
15374 |
|
|
.IP "\fB\-mno\-gpopt\fR" 4
|
15375 |
|
|
.IX Item "-mno-gpopt"
|
15376 |
|
|
.PD
|
15377 |
|
|
Use (do not use) GP-relative accesses for symbols that are known to be
|
15378 |
|
|
in a small data section; see \fB\-G\fR, \fB\-mlocal\-sdata\fR and
|
15379 |
|
|
\&\fB\-mextern\-sdata\fR. \fB\-mgpopt\fR is the default for all
|
15380 |
|
|
configurations.
|
15381 |
|
|
.Sp
|
15382 |
|
|
\&\fB\-mno\-gpopt\fR is useful for cases where the \f(CW$gp\fR register
|
15383 |
|
|
might not hold the value of \f(CW\*(C`_gp\*(C'\fR. For example, if the code is
|
15384 |
|
|
part of a library that might be used in a boot monitor, programs that
|
15385 |
|
|
call boot monitor routines pass an unknown value in \f(CW$gp\fR.
|
15386 |
|
|
(In such situations, the boot monitor itself is usually compiled
|
15387 |
|
|
with \fB\-G0\fR.)
|
15388 |
|
|
.Sp
|
15389 |
|
|
\&\fB\-mno\-gpopt\fR implies \fB\-mno\-local\-sdata\fR and
|
15390 |
|
|
\&\fB\-mno\-extern\-sdata\fR.
|
15391 |
|
|
.IP "\fB\-membedded\-data\fR" 4
|
15392 |
|
|
.IX Item "-membedded-data"
|
15393 |
|
|
.PD 0
|
15394 |
|
|
.IP "\fB\-mno\-embedded\-data\fR" 4
|
15395 |
|
|
.IX Item "-mno-embedded-data"
|
15396 |
|
|
.PD
|
15397 |
|
|
Allocate variables to the read-only data section first if possible, then
|
15398 |
|
|
next in the small data section if possible, otherwise in data. This gives
|
15399 |
|
|
slightly slower code than the default, but reduces the amount of \s-1RAM\s0 required
|
15400 |
|
|
when executing, and thus may be preferred for some embedded systems.
|
15401 |
|
|
.IP "\fB\-muninit\-const\-in\-rodata\fR" 4
|
15402 |
|
|
.IX Item "-muninit-const-in-rodata"
|
15403 |
|
|
.PD 0
|
15404 |
|
|
.IP "\fB\-mno\-uninit\-const\-in\-rodata\fR" 4
|
15405 |
|
|
.IX Item "-mno-uninit-const-in-rodata"
|
15406 |
|
|
.PD
|
15407 |
|
|
Put uninitialized \f(CW\*(C`const\*(C'\fR variables in the read-only data section.
|
15408 |
|
|
This option is only meaningful in conjunction with \fB\-membedded\-data\fR.
|
15409 |
|
|
.IP "\fB\-mcode\-readable=\fR\fIsetting\fR" 4
|
15410 |
|
|
.IX Item "-mcode-readable=setting"
|
15411 |
|
|
Specify whether \s-1GCC\s0 may generate code that reads from executable sections.
|
15412 |
|
|
There are three possible settings:
|
15413 |
|
|
.RS 4
|
15414 |
|
|
.IP "\fB\-mcode\-readable=yes\fR" 4
|
15415 |
|
|
.IX Item "-mcode-readable=yes"
|
15416 |
|
|
Instructions may freely access executable sections. This is the
|
15417 |
|
|
default setting.
|
15418 |
|
|
.IP "\fB\-mcode\-readable=pcrel\fR" 4
|
15419 |
|
|
.IX Item "-mcode-readable=pcrel"
|
15420 |
|
|
\&\s-1MIPS16\s0 PC-relative load instructions can access executable sections,
|
15421 |
|
|
but other instructions must not do so. This option is useful on 4KSc
|
15422 |
|
|
and 4KSd processors when the code TLBs have the Read Inhibit bit set.
|
15423 |
|
|
It is also useful on processors that can be configured to have a dual
|
15424 |
|
|
instruction/data \s-1SRAM\s0 interface and that, like the M4K, automatically
|
15425 |
|
|
redirect PC-relative loads to the instruction \s-1RAM\s0.
|
15426 |
|
|
.IP "\fB\-mcode\-readable=no\fR" 4
|
15427 |
|
|
.IX Item "-mcode-readable=no"
|
15428 |
|
|
Instructions must not access executable sections. This option can be
|
15429 |
|
|
useful on targets that are configured to have a dual instruction/data
|
15430 |
|
|
\&\s-1SRAM\s0 interface but that (unlike the M4K) do not automatically redirect
|
15431 |
|
|
PC-relative loads to the instruction \s-1RAM\s0.
|
15432 |
|
|
.RE
|
15433 |
|
|
.RS 4
|
15434 |
|
|
.RE
|
15435 |
|
|
.IP "\fB\-msplit\-addresses\fR" 4
|
15436 |
|
|
.IX Item "-msplit-addresses"
|
15437 |
|
|
.PD 0
|
15438 |
|
|
.IP "\fB\-mno\-split\-addresses\fR" 4
|
15439 |
|
|
.IX Item "-mno-split-addresses"
|
15440 |
|
|
.PD
|
15441 |
|
|
Enable (disable) use of the \f(CW\*(C`%hi()\*(C'\fR and \f(CW\*(C`%lo()\*(C'\fR assembler
|
15442 |
|
|
relocation operators. This option has been superseded by
|
15443 |
|
|
\&\fB\-mexplicit\-relocs\fR but is retained for backwards compatibility.
|
15444 |
|
|
.IP "\fB\-mexplicit\-relocs\fR" 4
|
15445 |
|
|
.IX Item "-mexplicit-relocs"
|
15446 |
|
|
.PD 0
|
15447 |
|
|
.IP "\fB\-mno\-explicit\-relocs\fR" 4
|
15448 |
|
|
.IX Item "-mno-explicit-relocs"
|
15449 |
|
|
.PD
|
15450 |
|
|
Use (do not use) assembler relocation operators when dealing with symbolic
|
15451 |
|
|
addresses. The alternative, selected by \fB\-mno\-explicit\-relocs\fR,
|
15452 |
|
|
is to use assembler macros instead.
|
15453 |
|
|
.Sp
|
15454 |
|
|
\&\fB\-mexplicit\-relocs\fR is the default if \s-1GCC\s0 was configured
|
15455 |
|
|
to use an assembler that supports relocation operators.
|
15456 |
|
|
.IP "\fB\-mcheck\-zero\-division\fR" 4
|
15457 |
|
|
.IX Item "-mcheck-zero-division"
|
15458 |
|
|
.PD 0
|
15459 |
|
|
.IP "\fB\-mno\-check\-zero\-division\fR" 4
|
15460 |
|
|
.IX Item "-mno-check-zero-division"
|
15461 |
|
|
.PD
|
15462 |
|
|
Trap (do not trap) on integer division by zero.
|
15463 |
|
|
.Sp
|
15464 |
|
|
The default is \fB\-mcheck\-zero\-division\fR.
|
15465 |
|
|
.IP "\fB\-mdivide\-traps\fR" 4
|
15466 |
|
|
.IX Item "-mdivide-traps"
|
15467 |
|
|
.PD 0
|
15468 |
|
|
.IP "\fB\-mdivide\-breaks\fR" 4
|
15469 |
|
|
.IX Item "-mdivide-breaks"
|
15470 |
|
|
.PD
|
15471 |
|
|
\&\s-1MIPS\s0 systems check for division by zero by generating either a
|
15472 |
|
|
conditional trap or a break instruction. Using traps results in
|
15473 |
|
|
smaller code, but is only supported on \s-1MIPS\s0 \s-1II\s0 and later. Also, some
|
15474 |
|
|
versions of the Linux kernel have a bug that prevents trap from
|
15475 |
|
|
generating the proper signal (\f(CW\*(C`SIGFPE\*(C'\fR). Use \fB\-mdivide\-traps\fR to
|
15476 |
|
|
allow conditional traps on architectures that support them and
|
15477 |
|
|
\&\fB\-mdivide\-breaks\fR to force the use of breaks.
|
15478 |
|
|
.Sp
|
15479 |
|
|
The default is usually \fB\-mdivide\-traps\fR, but this can be
|
15480 |
|
|
overridden at configure time using \fB\-\-with\-divide=breaks\fR.
|
15481 |
|
|
Divide-by-zero checks can be completely disabled using
|
15482 |
|
|
\&\fB\-mno\-check\-zero\-division\fR.
|
15483 |
|
|
.IP "\fB\-mmemcpy\fR" 4
|
15484 |
|
|
.IX Item "-mmemcpy"
|
15485 |
|
|
.PD 0
|
15486 |
|
|
.IP "\fB\-mno\-memcpy\fR" 4
|
15487 |
|
|
.IX Item "-mno-memcpy"
|
15488 |
|
|
.PD
|
15489 |
|
|
Force (do not force) the use of \f(CW\*(C`memcpy()\*(C'\fR for non-trivial block
|
15490 |
|
|
moves. The default is \fB\-mno\-memcpy\fR, which allows \s-1GCC\s0 to inline
|
15491 |
|
|
most constant-sized copies.
|
15492 |
|
|
.IP "\fB\-mlong\-calls\fR" 4
|
15493 |
|
|
.IX Item "-mlong-calls"
|
15494 |
|
|
.PD 0
|
15495 |
|
|
.IP "\fB\-mno\-long\-calls\fR" 4
|
15496 |
|
|
.IX Item "-mno-long-calls"
|
15497 |
|
|
.PD
|
15498 |
|
|
Disable (do not disable) use of the \f(CW\*(C`jal\*(C'\fR instruction. Calling
|
15499 |
|
|
functions using \f(CW\*(C`jal\*(C'\fR is more efficient but requires the caller
|
15500 |
|
|
and callee to be in the same 256 megabyte segment.
|
15501 |
|
|
.Sp
|
15502 |
|
|
This option has no effect on abicalls code. The default is
|
15503 |
|
|
\&\fB\-mno\-long\-calls\fR.
|
15504 |
|
|
.IP "\fB\-mmad\fR" 4
|
15505 |
|
|
.IX Item "-mmad"
|
15506 |
|
|
.PD 0
|
15507 |
|
|
.IP "\fB\-mno\-mad\fR" 4
|
15508 |
|
|
.IX Item "-mno-mad"
|
15509 |
|
|
.PD
|
15510 |
|
|
Enable (disable) use of the \f(CW\*(C`mad\*(C'\fR, \f(CW\*(C`madu\*(C'\fR and \f(CW\*(C`mul\*(C'\fR
|
15511 |
|
|
instructions, as provided by the R4650 \s-1ISA\s0.
|
15512 |
|
|
.IP "\fB\-mfused\-madd\fR" 4
|
15513 |
|
|
.IX Item "-mfused-madd"
|
15514 |
|
|
.PD 0
|
15515 |
|
|
.IP "\fB\-mno\-fused\-madd\fR" 4
|
15516 |
|
|
.IX Item "-mno-fused-madd"
|
15517 |
|
|
.PD
|
15518 |
|
|
Enable (disable) use of the floating-point multiply-accumulate
|
15519 |
|
|
instructions, when they are available. The default is
|
15520 |
|
|
\&\fB\-mfused\-madd\fR.
|
15521 |
|
|
.Sp
|
15522 |
|
|
When multiply-accumulate instructions are used, the intermediate
|
15523 |
|
|
product is calculated to infinite precision and is not subject to
|
15524 |
|
|
the \s-1FCSR\s0 Flush to Zero bit. This may be undesirable in some
|
15525 |
|
|
circumstances.
|
15526 |
|
|
.IP "\fB\-nocpp\fR" 4
|
15527 |
|
|
.IX Item "-nocpp"
|
15528 |
|
|
Tell the \s-1MIPS\s0 assembler to not run its preprocessor over user
|
15529 |
|
|
assembler files (with a \fB.s\fR suffix) when assembling them.
|
15530 |
|
|
.IP "\fB\-mfix\-24k\fR" 4
|
15531 |
|
|
.IX Item "-mfix-24k"
|
15532 |
|
|
.PD 0
|
15533 |
|
|
.IP "\fB\-mno\-fix\-24k\fR" 4
|
15534 |
|
|
.IX Item "-mno-fix-24k"
|
15535 |
|
|
.PD
|
15536 |
|
|
Work around the 24K E48 (lost data on stores during refill) errata.
|
15537 |
|
|
The workarounds are implemented by the assembler rather than by \s-1GCC\s0.
|
15538 |
|
|
.IP "\fB\-mfix\-r4000\fR" 4
|
15539 |
|
|
.IX Item "-mfix-r4000"
|
15540 |
|
|
.PD 0
|
15541 |
|
|
.IP "\fB\-mno\-fix\-r4000\fR" 4
|
15542 |
|
|
.IX Item "-mno-fix-r4000"
|
15543 |
|
|
.PD
|
15544 |
|
|
Work around certain R4000 \s-1CPU\s0 errata:
|
15545 |
|
|
.RS 4
|
15546 |
|
|
.IP "\-" 4
|
15547 |
|
|
A double-word or a variable shift may give an incorrect result if executed
|
15548 |
|
|
immediately after starting an integer division.
|
15549 |
|
|
.IP "\-" 4
|
15550 |
|
|
A double-word or a variable shift may give an incorrect result if executed
|
15551 |
|
|
while an integer multiplication is in progress.
|
15552 |
|
|
.IP "\-" 4
|
15553 |
|
|
An integer division may give an incorrect result if started in a delay slot
|
15554 |
|
|
of a taken branch or a jump.
|
15555 |
|
|
.RE
|
15556 |
|
|
.RS 4
|
15557 |
|
|
.RE
|
15558 |
|
|
.IP "\fB\-mfix\-r4400\fR" 4
|
15559 |
|
|
.IX Item "-mfix-r4400"
|
15560 |
|
|
.PD 0
|
15561 |
|
|
.IP "\fB\-mno\-fix\-r4400\fR" 4
|
15562 |
|
|
.IX Item "-mno-fix-r4400"
|
15563 |
|
|
.PD
|
15564 |
|
|
Work around certain R4400 \s-1CPU\s0 errata:
|
15565 |
|
|
.RS 4
|
15566 |
|
|
.IP "\-" 4
|
15567 |
|
|
A double-word or a variable shift may give an incorrect result if executed
|
15568 |
|
|
immediately after starting an integer division.
|
15569 |
|
|
.RE
|
15570 |
|
|
.RS 4
|
15571 |
|
|
.RE
|
15572 |
|
|
.IP "\fB\-mfix\-r10000\fR" 4
|
15573 |
|
|
.IX Item "-mfix-r10000"
|
15574 |
|
|
.PD 0
|
15575 |
|
|
.IP "\fB\-mno\-fix\-r10000\fR" 4
|
15576 |
|
|
.IX Item "-mno-fix-r10000"
|
15577 |
|
|
.PD
|
15578 |
|
|
Work around certain R10000 errata:
|
15579 |
|
|
.RS 4
|
15580 |
|
|
.IP "\-" 4
|
15581 |
|
|
\&\f(CW\*(C`ll\*(C'\fR/\f(CW\*(C`sc\*(C'\fR sequences may not behave atomically on revisions
|
15582 |
|
|
prior to 3.0. They may deadlock on revisions 2.6 and earlier.
|
15583 |
|
|
.RE
|
15584 |
|
|
.RS 4
|
15585 |
|
|
.Sp
|
15586 |
|
|
This option can only be used if the target architecture supports
|
15587 |
|
|
branch-likely instructions. \fB\-mfix\-r10000\fR is the default when
|
15588 |
|
|
\&\fB\-march=r10000\fR is used; \fB\-mno\-fix\-r10000\fR is the default
|
15589 |
|
|
otherwise.
|
15590 |
|
|
.RE
|
15591 |
|
|
.IP "\fB\-mfix\-vr4120\fR" 4
|
15592 |
|
|
.IX Item "-mfix-vr4120"
|
15593 |
|
|
.PD 0
|
15594 |
|
|
.IP "\fB\-mno\-fix\-vr4120\fR" 4
|
15595 |
|
|
.IX Item "-mno-fix-vr4120"
|
15596 |
|
|
.PD
|
15597 |
|
|
Work around certain \s-1VR4120\s0 errata:
|
15598 |
|
|
.RS 4
|
15599 |
|
|
.IP "\-" 4
|
15600 |
|
|
\&\f(CW\*(C`dmultu\*(C'\fR does not always produce the correct result.
|
15601 |
|
|
.IP "\-" 4
|
15602 |
|
|
\&\f(CW\*(C`div\*(C'\fR and \f(CW\*(C`ddiv\*(C'\fR do not always produce the correct result if one
|
15603 |
|
|
of the operands is negative.
|
15604 |
|
|
.RE
|
15605 |
|
|
.RS 4
|
15606 |
|
|
.Sp
|
15607 |
|
|
The workarounds for the division errata rely on special functions in
|
15608 |
|
|
\&\fIlibgcc.a\fR. At present, these functions are only provided by
|
15609 |
|
|
the \f(CW\*(C`mips64vr*\-elf\*(C'\fR configurations.
|
15610 |
|
|
.Sp
|
15611 |
|
|
Other \s-1VR4120\s0 errata require a \s-1NOP\s0 to be inserted between certain pairs of
|
15612 |
|
|
instructions. These errata are handled by the assembler, not by \s-1GCC\s0 itself.
|
15613 |
|
|
.RE
|
15614 |
|
|
.IP "\fB\-mfix\-vr4130\fR" 4
|
15615 |
|
|
.IX Item "-mfix-vr4130"
|
15616 |
|
|
Work around the \s-1VR4130\s0 \f(CW\*(C`mflo\*(C'\fR/\f(CW\*(C`mfhi\*(C'\fR errata. The
|
15617 |
|
|
workarounds are implemented by the assembler rather than by \s-1GCC\s0,
|
15618 |
|
|
although \s-1GCC\s0 avoids using \f(CW\*(C`mflo\*(C'\fR and \f(CW\*(C`mfhi\*(C'\fR if the
|
15619 |
|
|
\&\s-1VR4130\s0 \f(CW\*(C`macc\*(C'\fR, \f(CW\*(C`macchi\*(C'\fR, \f(CW\*(C`dmacc\*(C'\fR and \f(CW\*(C`dmacchi\*(C'\fR
|
15620 |
|
|
instructions are available instead.
|
15621 |
|
|
.IP "\fB\-mfix\-sb1\fR" 4
|
15622 |
|
|
.IX Item "-mfix-sb1"
|
15623 |
|
|
.PD 0
|
15624 |
|
|
.IP "\fB\-mno\-fix\-sb1\fR" 4
|
15625 |
|
|
.IX Item "-mno-fix-sb1"
|
15626 |
|
|
.PD
|
15627 |
|
|
Work around certain \s-1SB\-1\s0 \s-1CPU\s0 core errata.
|
15628 |
|
|
(This flag currently works around the \s-1SB\-1\s0 revision 2
|
15629 |
|
|
\&\*(L"F1\*(R" and \*(L"F2\*(R" floating-point errata.)
|
15630 |
|
|
.IP "\fB\-mr10k\-cache\-barrier=\fR\fIsetting\fR" 4
|
15631 |
|
|
.IX Item "-mr10k-cache-barrier=setting"
|
15632 |
|
|
Specify whether \s-1GCC\s0 should insert cache barriers to avoid the
|
15633 |
|
|
side-effects of speculation on R10K processors.
|
15634 |
|
|
.Sp
|
15635 |
|
|
In common with many processors, the R10K tries to predict the outcome
|
15636 |
|
|
of a conditional branch and speculatively executes instructions from
|
15637 |
|
|
the \*(L"taken\*(R" branch. It later aborts these instructions if the
|
15638 |
|
|
predicted outcome is wrong. However, on the R10K, even aborted
|
15639 |
|
|
instructions can have side effects.
|
15640 |
|
|
.Sp
|
15641 |
|
|
This problem only affects kernel stores and, depending on the system,
|
15642 |
|
|
kernel loads. As an example, a speculatively-executed store may load
|
15643 |
|
|
the target memory into cache and mark the cache line as dirty, even if
|
15644 |
|
|
the store itself is later aborted. If a \s-1DMA\s0 operation writes to the
|
15645 |
|
|
same area of memory before the \*(L"dirty\*(R" line is flushed, the cached
|
15646 |
|
|
data overwrites the DMA-ed data. See the R10K processor manual
|
15647 |
|
|
for a full description, including other potential problems.
|
15648 |
|
|
.Sp
|
15649 |
|
|
One workaround is to insert cache barrier instructions before every memory
|
15650 |
|
|
access that might be speculatively executed and that might have side
|
15651 |
|
|
effects even if aborted. \fB\-mr10k\-cache\-barrier=\fR\fIsetting\fR
|
15652 |
|
|
controls \s-1GCC\s0's implementation of this workaround. It assumes that
|
15653 |
|
|
aborted accesses to any byte in the following regions does not have
|
15654 |
|
|
side effects:
|
15655 |
|
|
.RS 4
|
15656 |
|
|
.IP "1." 4
|
15657 |
|
|
the memory occupied by the current function's stack frame;
|
15658 |
|
|
.IP "2." 4
|
15659 |
|
|
the memory occupied by an incoming stack argument;
|
15660 |
|
|
.IP "3." 4
|
15661 |
|
|
the memory occupied by an object with a link-time-constant address.
|
15662 |
|
|
.RE
|
15663 |
|
|
.RS 4
|
15664 |
|
|
.Sp
|
15665 |
|
|
It is the kernel's responsibility to ensure that speculative
|
15666 |
|
|
accesses to these regions are indeed safe.
|
15667 |
|
|
.Sp
|
15668 |
|
|
If the input program contains a function declaration such as:
|
15669 |
|
|
.Sp
|
15670 |
|
|
.Vb 1
|
15671 |
|
|
\& void foo (void);
|
15672 |
|
|
.Ve
|
15673 |
|
|
.Sp
|
15674 |
|
|
then the implementation of \f(CW\*(C`foo\*(C'\fR must allow \f(CW\*(C`j foo\*(C'\fR and
|
15675 |
|
|
\&\f(CW\*(C`jal foo\*(C'\fR to be executed speculatively. \s-1GCC\s0 honors this
|
15676 |
|
|
restriction for functions it compiles itself. It expects non-GCC
|
15677 |
|
|
functions (such as hand-written assembly code) to do the same.
|
15678 |
|
|
.Sp
|
15679 |
|
|
The option has three forms:
|
15680 |
|
|
.IP "\fB\-mr10k\-cache\-barrier=load\-store\fR" 4
|
15681 |
|
|
.IX Item "-mr10k-cache-barrier=load-store"
|
15682 |
|
|
Insert a cache barrier before a load or store that might be
|
15683 |
|
|
speculatively executed and that might have side effects even
|
15684 |
|
|
if aborted.
|
15685 |
|
|
.IP "\fB\-mr10k\-cache\-barrier=store\fR" 4
|
15686 |
|
|
.IX Item "-mr10k-cache-barrier=store"
|
15687 |
|
|
Insert a cache barrier before a store that might be speculatively
|
15688 |
|
|
executed and that might have side effects even if aborted.
|
15689 |
|
|
.IP "\fB\-mr10k\-cache\-barrier=none\fR" 4
|
15690 |
|
|
.IX Item "-mr10k-cache-barrier=none"
|
15691 |
|
|
Disable the insertion of cache barriers. This is the default setting.
|
15692 |
|
|
.RE
|
15693 |
|
|
.RS 4
|
15694 |
|
|
.RE
|
15695 |
|
|
.IP "\fB\-mflush\-func=\fR\fIfunc\fR" 4
|
15696 |
|
|
.IX Item "-mflush-func=func"
|
15697 |
|
|
.PD 0
|
15698 |
|
|
.IP "\fB\-mno\-flush\-func\fR" 4
|
15699 |
|
|
.IX Item "-mno-flush-func"
|
15700 |
|
|
.PD
|
15701 |
|
|
Specifies the function to call to flush the I and D caches, or to not
|
15702 |
|
|
call any such function. If called, the function must take the same
|
15703 |
|
|
arguments as the common \f(CW\*(C`_flush_func()\*(C'\fR, that is, the address of the
|
15704 |
|
|
memory range for which the cache is being flushed, the size of the
|
15705 |
|
|
memory range, and the number 3 (to flush both caches). The default
|
15706 |
|
|
depends on the target \s-1GCC\s0 was configured for, but commonly is either
|
15707 |
|
|
\&\fB_flush_func\fR or \fB_\|_cpu_flush\fR.
|
15708 |
|
|
.IP "\fBmbranch\-cost=\fR\fInum\fR" 4
|
15709 |
|
|
.IX Item "mbranch-cost=num"
|
15710 |
|
|
Set the cost of branches to roughly \fInum\fR \*(L"simple\*(R" instructions.
|
15711 |
|
|
This cost is only a heuristic and is not guaranteed to produce
|
15712 |
|
|
consistent results across releases. A zero cost redundantly selects
|
15713 |
|
|
the default, which is based on the \fB\-mtune\fR setting.
|
15714 |
|
|
.IP "\fB\-mbranch\-likely\fR" 4
|
15715 |
|
|
.IX Item "-mbranch-likely"
|
15716 |
|
|
.PD 0
|
15717 |
|
|
.IP "\fB\-mno\-branch\-likely\fR" 4
|
15718 |
|
|
.IX Item "-mno-branch-likely"
|
15719 |
|
|
.PD
|
15720 |
|
|
Enable or disable use of Branch Likely instructions, regardless of the
|
15721 |
|
|
default for the selected architecture. By default, Branch Likely
|
15722 |
|
|
instructions may be generated if they are supported by the selected
|
15723 |
|
|
architecture. An exception is for the \s-1MIPS32\s0 and \s-1MIPS64\s0 architectures
|
15724 |
|
|
and processors that implement those architectures; for those, Branch
|
15725 |
|
|
Likely instructions are not be generated by default because the \s-1MIPS32\s0
|
15726 |
|
|
and \s-1MIPS64\s0 architectures specifically deprecate their use.
|
15727 |
|
|
.IP "\fB\-mfp\-exceptions\fR" 4
|
15728 |
|
|
.IX Item "-mfp-exceptions"
|
15729 |
|
|
.PD 0
|
15730 |
|
|
.IP "\fB\-mno\-fp\-exceptions\fR" 4
|
15731 |
|
|
.IX Item "-mno-fp-exceptions"
|
15732 |
|
|
.PD
|
15733 |
|
|
Specifies whether \s-1FP\s0 exceptions are enabled. This affects how
|
15734 |
|
|
\&\s-1FP\s0 instructions are scheduled for some processors.
|
15735 |
|
|
The default is that \s-1FP\s0 exceptions are
|
15736 |
|
|
enabled.
|
15737 |
|
|
.Sp
|
15738 |
|
|
For instance, on the \s-1SB\-1\s0, if \s-1FP\s0 exceptions are disabled, and we are emitting
|
15739 |
|
|
64\-bit code, then we can use both \s-1FP\s0 pipes. Otherwise, we can only use one
|
15740 |
|
|
\&\s-1FP\s0 pipe.
|
15741 |
|
|
.IP "\fB\-mvr4130\-align\fR" 4
|
15742 |
|
|
.IX Item "-mvr4130-align"
|
15743 |
|
|
.PD 0
|
15744 |
|
|
.IP "\fB\-mno\-vr4130\-align\fR" 4
|
15745 |
|
|
.IX Item "-mno-vr4130-align"
|
15746 |
|
|
.PD
|
15747 |
|
|
The \s-1VR4130\s0 pipeline is two-way superscalar, but can only issue two
|
15748 |
|
|
instructions together if the first one is 8\-byte aligned. When this
|
15749 |
|
|
option is enabled, \s-1GCC\s0 aligns pairs of instructions that it
|
15750 |
|
|
thinks should execute in parallel.
|
15751 |
|
|
.Sp
|
15752 |
|
|
This option only has an effect when optimizing for the \s-1VR4130\s0.
|
15753 |
|
|
It normally makes code faster, but at the expense of making it bigger.
|
15754 |
|
|
It is enabled by default at optimization level \fB\-O3\fR.
|
15755 |
|
|
.IP "\fB\-msynci\fR" 4
|
15756 |
|
|
.IX Item "-msynci"
|
15757 |
|
|
.PD 0
|
15758 |
|
|
.IP "\fB\-mno\-synci\fR" 4
|
15759 |
|
|
.IX Item "-mno-synci"
|
15760 |
|
|
.PD
|
15761 |
|
|
Enable (disable) generation of \f(CW\*(C`synci\*(C'\fR instructions on
|
15762 |
|
|
architectures that support it. The \f(CW\*(C`synci\*(C'\fR instructions (if
|
15763 |
|
|
enabled) are generated when \f(CW\*(C`_\|_builtin_\|_\|_clear_cache()\*(C'\fR is
|
15764 |
|
|
compiled.
|
15765 |
|
|
.Sp
|
15766 |
|
|
This option defaults to \f(CW\*(C`\-mno\-synci\*(C'\fR, but the default can be
|
15767 |
|
|
overridden by configuring with \f(CW\*(C`\-\-with\-synci\*(C'\fR.
|
15768 |
|
|
.Sp
|
15769 |
|
|
When compiling code for single processor systems, it is generally safe
|
15770 |
|
|
to use \f(CW\*(C`synci\*(C'\fR. However, on many multi-core (\s-1SMP\s0) systems, it
|
15771 |
|
|
does not invalidate the instruction caches on all cores and may lead
|
15772 |
|
|
to undefined behavior.
|
15773 |
|
|
.IP "\fB\-mrelax\-pic\-calls\fR" 4
|
15774 |
|
|
.IX Item "-mrelax-pic-calls"
|
15775 |
|
|
.PD 0
|
15776 |
|
|
.IP "\fB\-mno\-relax\-pic\-calls\fR" 4
|
15777 |
|
|
.IX Item "-mno-relax-pic-calls"
|
15778 |
|
|
.PD
|
15779 |
|
|
Try to turn \s-1PIC\s0 calls that are normally dispatched via register
|
15780 |
|
|
\&\f(CW$25\fR into direct calls. This is only possible if the linker can
|
15781 |
|
|
resolve the destination at link-time and if the destination is within
|
15782 |
|
|
range for a direct call.
|
15783 |
|
|
.Sp
|
15784 |
|
|
\&\fB\-mrelax\-pic\-calls\fR is the default if \s-1GCC\s0 was configured to use
|
15785 |
|
|
an assembler and a linker that support the \f(CW\*(C`.reloc\*(C'\fR assembly
|
15786 |
|
|
directive and \f(CW\*(C`\-mexplicit\-relocs\*(C'\fR is in effect. With
|
15787 |
|
|
\&\f(CW\*(C`\-mno\-explicit\-relocs\*(C'\fR, this optimization can be performed by the
|
15788 |
|
|
assembler and the linker alone without help from the compiler.
|
15789 |
|
|
.IP "\fB\-mmcount\-ra\-address\fR" 4
|
15790 |
|
|
.IX Item "-mmcount-ra-address"
|
15791 |
|
|
.PD 0
|
15792 |
|
|
.IP "\fB\-mno\-mcount\-ra\-address\fR" 4
|
15793 |
|
|
.IX Item "-mno-mcount-ra-address"
|
15794 |
|
|
.PD
|
15795 |
|
|
Emit (do not emit) code that allows \f(CW\*(C`_mcount\*(C'\fR to modify the
|
15796 |
|
|
calling function's return address. When enabled, this option extends
|
15797 |
|
|
the usual \f(CW\*(C`_mcount\*(C'\fR interface with a new \fIra-address\fR
|
15798 |
|
|
parameter, which has type \f(CW\*(C`intptr_t *\*(C'\fR and is passed in register
|
15799 |
|
|
\&\f(CW$12\fR. \f(CW\*(C`_mcount\*(C'\fR can then modify the return address by
|
15800 |
|
|
doing both of the following:
|
15801 |
|
|
.RS 4
|
15802 |
|
|
.IP "\(bu" 4
|
15803 |
|
|
Returning the new address in register \f(CW$31\fR.
|
15804 |
|
|
.IP "\(bu" 4
|
15805 |
|
|
Storing the new address in \f(CW\*(C`*\f(CIra\-address\f(CW\*(C'\fR,
|
15806 |
|
|
if \fIra-address\fR is nonnull.
|
15807 |
|
|
.RE
|
15808 |
|
|
.RS 4
|
15809 |
|
|
.Sp
|
15810 |
|
|
The default is \fB\-mno\-mcount\-ra\-address\fR.
|
15811 |
|
|
.RE
|
15812 |
|
|
.PP
|
15813 |
|
|
\fI\s-1MMIX\s0 Options\fR
|
15814 |
|
|
.IX Subsection "MMIX Options"
|
15815 |
|
|
.PP
|
15816 |
|
|
These options are defined for the \s-1MMIX:\s0
|
15817 |
|
|
.IP "\fB\-mlibfuncs\fR" 4
|
15818 |
|
|
.IX Item "-mlibfuncs"
|
15819 |
|
|
.PD 0
|
15820 |
|
|
.IP "\fB\-mno\-libfuncs\fR" 4
|
15821 |
|
|
.IX Item "-mno-libfuncs"
|
15822 |
|
|
.PD
|
15823 |
|
|
Specify that intrinsic library functions are being compiled, passing all
|
15824 |
|
|
values in registers, no matter the size.
|
15825 |
|
|
.IP "\fB\-mepsilon\fR" 4
|
15826 |
|
|
.IX Item "-mepsilon"
|
15827 |
|
|
.PD 0
|
15828 |
|
|
.IP "\fB\-mno\-epsilon\fR" 4
|
15829 |
|
|
.IX Item "-mno-epsilon"
|
15830 |
|
|
.PD
|
15831 |
|
|
Generate floating-point comparison instructions that compare with respect
|
15832 |
|
|
to the \f(CW\*(C`rE\*(C'\fR epsilon register.
|
15833 |
|
|
.IP "\fB\-mabi=mmixware\fR" 4
|
15834 |
|
|
.IX Item "-mabi=mmixware"
|
15835 |
|
|
.PD 0
|
15836 |
|
|
.IP "\fB\-mabi=gnu\fR" 4
|
15837 |
|
|
.IX Item "-mabi=gnu"
|
15838 |
|
|
.PD
|
15839 |
|
|
Generate code that passes function parameters and return values that (in
|
15840 |
|
|
the called function) are seen as registers \f(CW$0\fR and up, as opposed to
|
15841 |
|
|
the \s-1GNU\s0 \s-1ABI\s0 which uses global registers \f(CW$231\fR and up.
|
15842 |
|
|
.IP "\fB\-mzero\-extend\fR" 4
|
15843 |
|
|
.IX Item "-mzero-extend"
|
15844 |
|
|
.PD 0
|
15845 |
|
|
.IP "\fB\-mno\-zero\-extend\fR" 4
|
15846 |
|
|
.IX Item "-mno-zero-extend"
|
15847 |
|
|
.PD
|
15848 |
|
|
When reading data from memory in sizes shorter than 64 bits, use (do not
|
15849 |
|
|
use) zero-extending load instructions by default, rather than
|
15850 |
|
|
sign-extending ones.
|
15851 |
|
|
.IP "\fB\-mknuthdiv\fR" 4
|
15852 |
|
|
.IX Item "-mknuthdiv"
|
15853 |
|
|
.PD 0
|
15854 |
|
|
.IP "\fB\-mno\-knuthdiv\fR" 4
|
15855 |
|
|
.IX Item "-mno-knuthdiv"
|
15856 |
|
|
.PD
|
15857 |
|
|
Make the result of a division yielding a remainder have the same sign as
|
15858 |
|
|
the divisor. With the default, \fB\-mno\-knuthdiv\fR, the sign of the
|
15859 |
|
|
remainder follows the sign of the dividend. Both methods are
|
15860 |
|
|
arithmetically valid, the latter being almost exclusively used.
|
15861 |
|
|
.IP "\fB\-mtoplevel\-symbols\fR" 4
|
15862 |
|
|
.IX Item "-mtoplevel-symbols"
|
15863 |
|
|
.PD 0
|
15864 |
|
|
.IP "\fB\-mno\-toplevel\-symbols\fR" 4
|
15865 |
|
|
.IX Item "-mno-toplevel-symbols"
|
15866 |
|
|
.PD
|
15867 |
|
|
Prepend (do not prepend) a \fB:\fR to all global symbols, so the assembly
|
15868 |
|
|
code can be used with the \f(CW\*(C`PREFIX\*(C'\fR assembly directive.
|
15869 |
|
|
.IP "\fB\-melf\fR" 4
|
15870 |
|
|
.IX Item "-melf"
|
15871 |
|
|
Generate an executable in the \s-1ELF\s0 format, rather than the default
|
15872 |
|
|
\&\fBmmo\fR format used by the \fBmmix\fR simulator.
|
15873 |
|
|
.IP "\fB\-mbranch\-predict\fR" 4
|
15874 |
|
|
.IX Item "-mbranch-predict"
|
15875 |
|
|
.PD 0
|
15876 |
|
|
.IP "\fB\-mno\-branch\-predict\fR" 4
|
15877 |
|
|
.IX Item "-mno-branch-predict"
|
15878 |
|
|
.PD
|
15879 |
|
|
Use (do not use) the probable-branch instructions, when static branch
|
15880 |
|
|
prediction indicates a probable branch.
|
15881 |
|
|
.IP "\fB\-mbase\-addresses\fR" 4
|
15882 |
|
|
.IX Item "-mbase-addresses"
|
15883 |
|
|
.PD 0
|
15884 |
|
|
.IP "\fB\-mno\-base\-addresses\fR" 4
|
15885 |
|
|
.IX Item "-mno-base-addresses"
|
15886 |
|
|
.PD
|
15887 |
|
|
Generate (do not generate) code that uses \fIbase addresses\fR. Using a
|
15888 |
|
|
base address automatically generates a request (handled by the assembler
|
15889 |
|
|
and the linker) for a constant to be set up in a global register. The
|
15890 |
|
|
register is used for one or more base address requests within the range 0
|
15891 |
|
|
to 255 from the value held in the register. The generally leads to short
|
15892 |
|
|
and fast code, but the number of different data items that can be
|
15893 |
|
|
addressed is limited. This means that a program that uses lots of static
|
15894 |
|
|
data may require \fB\-mno\-base\-addresses\fR.
|
15895 |
|
|
.IP "\fB\-msingle\-exit\fR" 4
|
15896 |
|
|
.IX Item "-msingle-exit"
|
15897 |
|
|
.PD 0
|
15898 |
|
|
.IP "\fB\-mno\-single\-exit\fR" 4
|
15899 |
|
|
.IX Item "-mno-single-exit"
|
15900 |
|
|
.PD
|
15901 |
|
|
Force (do not force) generated code to have a single exit point in each
|
15902 |
|
|
function.
|
15903 |
|
|
.PP
|
15904 |
|
|
\fI\s-1MN10300\s0 Options\fR
|
15905 |
|
|
.IX Subsection "MN10300 Options"
|
15906 |
|
|
.PP
|
15907 |
|
|
These \fB\-m\fR options are defined for Matsushita \s-1MN10300\s0 architectures:
|
15908 |
|
|
.IP "\fB\-mmult\-bug\fR" 4
|
15909 |
|
|
.IX Item "-mmult-bug"
|
15910 |
|
|
Generate code to avoid bugs in the multiply instructions for the \s-1MN10300\s0
|
15911 |
|
|
processors. This is the default.
|
15912 |
|
|
.IP "\fB\-mno\-mult\-bug\fR" 4
|
15913 |
|
|
.IX Item "-mno-mult-bug"
|
15914 |
|
|
Do not generate code to avoid bugs in the multiply instructions for the
|
15915 |
|
|
\&\s-1MN10300\s0 processors.
|
15916 |
|
|
.IP "\fB\-mam33\fR" 4
|
15917 |
|
|
.IX Item "-mam33"
|
15918 |
|
|
Generate code using features specific to the \s-1AM33\s0 processor.
|
15919 |
|
|
.IP "\fB\-mno\-am33\fR" 4
|
15920 |
|
|
.IX Item "-mno-am33"
|
15921 |
|
|
Do not generate code using features specific to the \s-1AM33\s0 processor. This
|
15922 |
|
|
is the default.
|
15923 |
|
|
.IP "\fB\-mam33\-2\fR" 4
|
15924 |
|
|
.IX Item "-mam33-2"
|
15925 |
|
|
Generate code using features specific to the \s-1AM33/2\s0.0 processor.
|
15926 |
|
|
.IP "\fB\-mam34\fR" 4
|
15927 |
|
|
.IX Item "-mam34"
|
15928 |
|
|
Generate code using features specific to the \s-1AM34\s0 processor.
|
15929 |
|
|
.IP "\fB\-mtune=\fR\fIcpu-type\fR" 4
|
15930 |
|
|
.IX Item "-mtune=cpu-type"
|
15931 |
|
|
Use the timing characteristics of the indicated \s-1CPU\s0 type when
|
15932 |
|
|
scheduling instructions. This does not change the targeted processor
|
15933 |
|
|
type. The \s-1CPU\s0 type must be one of \fBmn10300\fR, \fBam33\fR,
|
15934 |
|
|
\&\fBam33\-2\fR or \fBam34\fR.
|
15935 |
|
|
.IP "\fB\-mreturn\-pointer\-on\-d0\fR" 4
|
15936 |
|
|
.IX Item "-mreturn-pointer-on-d0"
|
15937 |
|
|
When generating a function that returns a pointer, return the pointer
|
15938 |
|
|
in both \f(CW\*(C`a0\*(C'\fR and \f(CW\*(C`d0\*(C'\fR. Otherwise, the pointer is returned
|
15939 |
|
|
only in \f(CW\*(C`a0\*(C'\fR, and attempts to call such functions without a prototype
|
15940 |
|
|
result in errors. Note that this option is on by default; use
|
15941 |
|
|
\&\fB\-mno\-return\-pointer\-on\-d0\fR to disable it.
|
15942 |
|
|
.IP "\fB\-mno\-crt0\fR" 4
|
15943 |
|
|
.IX Item "-mno-crt0"
|
15944 |
|
|
Do not link in the C run-time initialization object file.
|
15945 |
|
|
.IP "\fB\-mrelax\fR" 4
|
15946 |
|
|
.IX Item "-mrelax"
|
15947 |
|
|
Indicate to the linker that it should perform a relaxation optimization pass
|
15948 |
|
|
to shorten branches, calls and absolute memory addresses. This option only
|
15949 |
|
|
has an effect when used on the command line for the final link step.
|
15950 |
|
|
.Sp
|
15951 |
|
|
This option makes symbolic debugging impossible.
|
15952 |
|
|
.IP "\fB\-mliw\fR" 4
|
15953 |
|
|
.IX Item "-mliw"
|
15954 |
|
|
Allow the compiler to generate \fILong Instruction Word\fR
|
15955 |
|
|
instructions if the target is the \fB\s-1AM33\s0\fR or later. This is the
|
15956 |
|
|
default. This option defines the preprocessor macro \fB_\|_LIW_\|_\fR.
|
15957 |
|
|
.IP "\fB\-mnoliw\fR" 4
|
15958 |
|
|
.IX Item "-mnoliw"
|
15959 |
|
|
Do not allow the compiler to generate \fILong Instruction Word\fR
|
15960 |
|
|
instructions. This option defines the preprocessor macro
|
15961 |
|
|
\&\fB_\|_NO_LIW_\|_\fR.
|
15962 |
|
|
.IP "\fB\-msetlb\fR" 4
|
15963 |
|
|
.IX Item "-msetlb"
|
15964 |
|
|
Allow the compiler to generate the \fI\s-1SETLB\s0\fR and \fILcc\fR
|
15965 |
|
|
instructions if the target is the \fB\s-1AM33\s0\fR or later. This is the
|
15966 |
|
|
default. This option defines the preprocessor macro \fB_\|_SETLB_\|_\fR.
|
15967 |
|
|
.IP "\fB\-mnosetlb\fR" 4
|
15968 |
|
|
.IX Item "-mnosetlb"
|
15969 |
|
|
Do not allow the compiler to generate \fI\s-1SETLB\s0\fR or \fILcc\fR
|
15970 |
|
|
instructions. This option defines the preprocessor macro
|
15971 |
|
|
\&\fB_\|_NO_SETLB_\|_\fR.
|
15972 |
|
|
.PP
|
15973 |
|
|
\fIMoxie Options\fR
|
15974 |
|
|
.IX Subsection "Moxie Options"
|
15975 |
|
|
.IP "\fB\-meb\fR" 4
|
15976 |
|
|
.IX Item "-meb"
|
15977 |
|
|
Generate big-endian code. This is the default for \fBmoxie\-*\-*\fR
|
15978 |
|
|
configurations.
|
15979 |
|
|
.IP "\fB\-mel\fR" 4
|
15980 |
|
|
.IX Item "-mel"
|
15981 |
|
|
Generate little-endian code.
|
15982 |
|
|
.IP "\fB\-mno\-crt0\fR" 4
|
15983 |
|
|
.IX Item "-mno-crt0"
|
15984 |
|
|
Do not link in the C run-time initialization object file.
|
15985 |
|
|
.PP
|
15986 |
|
|
\fI\s-1PDP\-11\s0 Options\fR
|
15987 |
|
|
.IX Subsection "PDP-11 Options"
|
15988 |
|
|
.PP
|
15989 |
|
|
These options are defined for the \s-1PDP\-11:\s0
|
15990 |
|
|
.IP "\fB\-mfpu\fR" 4
|
15991 |
|
|
.IX Item "-mfpu"
|
15992 |
|
|
Use hardware \s-1FPP\s0 floating point. This is the default. (\s-1FIS\s0 floating
|
15993 |
|
|
point on the \s-1PDP\-11/40\s0 is not supported.)
|
15994 |
|
|
.IP "\fB\-msoft\-float\fR" 4
|
15995 |
|
|
.IX Item "-msoft-float"
|
15996 |
|
|
Do not use hardware floating point.
|
15997 |
|
|
.IP "\fB\-mac0\fR" 4
|
15998 |
|
|
.IX Item "-mac0"
|
15999 |
|
|
Return floating-point results in ac0 (fr0 in Unix assembler syntax).
|
16000 |
|
|
.IP "\fB\-mno\-ac0\fR" 4
|
16001 |
|
|
.IX Item "-mno-ac0"
|
16002 |
|
|
Return floating-point results in memory. This is the default.
|
16003 |
|
|
.IP "\fB\-m40\fR" 4
|
16004 |
|
|
.IX Item "-m40"
|
16005 |
|
|
Generate code for a \s-1PDP\-11/40\s0.
|
16006 |
|
|
.IP "\fB\-m45\fR" 4
|
16007 |
|
|
.IX Item "-m45"
|
16008 |
|
|
Generate code for a \s-1PDP\-11/45\s0. This is the default.
|
16009 |
|
|
.IP "\fB\-m10\fR" 4
|
16010 |
|
|
.IX Item "-m10"
|
16011 |
|
|
Generate code for a \s-1PDP\-11/10\s0.
|
16012 |
|
|
.IP "\fB\-mbcopy\-builtin\fR" 4
|
16013 |
|
|
.IX Item "-mbcopy-builtin"
|
16014 |
|
|
Use inline \f(CW\*(C`movmemhi\*(C'\fR patterns for copying memory. This is the
|
16015 |
|
|
default.
|
16016 |
|
|
.IP "\fB\-mbcopy\fR" 4
|
16017 |
|
|
.IX Item "-mbcopy"
|
16018 |
|
|
Do not use inline \f(CW\*(C`movmemhi\*(C'\fR patterns for copying memory.
|
16019 |
|
|
.IP "\fB\-mint16\fR" 4
|
16020 |
|
|
.IX Item "-mint16"
|
16021 |
|
|
.PD 0
|
16022 |
|
|
.IP "\fB\-mno\-int32\fR" 4
|
16023 |
|
|
.IX Item "-mno-int32"
|
16024 |
|
|
.PD
|
16025 |
|
|
Use 16\-bit \f(CW\*(C`int\*(C'\fR. This is the default.
|
16026 |
|
|
.IP "\fB\-mint32\fR" 4
|
16027 |
|
|
.IX Item "-mint32"
|
16028 |
|
|
.PD 0
|
16029 |
|
|
.IP "\fB\-mno\-int16\fR" 4
|
16030 |
|
|
.IX Item "-mno-int16"
|
16031 |
|
|
.PD
|
16032 |
|
|
Use 32\-bit \f(CW\*(C`int\*(C'\fR.
|
16033 |
|
|
.IP "\fB\-mfloat64\fR" 4
|
16034 |
|
|
.IX Item "-mfloat64"
|
16035 |
|
|
.PD 0
|
16036 |
|
|
.IP "\fB\-mno\-float32\fR" 4
|
16037 |
|
|
.IX Item "-mno-float32"
|
16038 |
|
|
.PD
|
16039 |
|
|
Use 64\-bit \f(CW\*(C`float\*(C'\fR. This is the default.
|
16040 |
|
|
.IP "\fB\-mfloat32\fR" 4
|
16041 |
|
|
.IX Item "-mfloat32"
|
16042 |
|
|
.PD 0
|
16043 |
|
|
.IP "\fB\-mno\-float64\fR" 4
|
16044 |
|
|
.IX Item "-mno-float64"
|
16045 |
|
|
.PD
|
16046 |
|
|
Use 32\-bit \f(CW\*(C`float\*(C'\fR.
|
16047 |
|
|
.IP "\fB\-mabshi\fR" 4
|
16048 |
|
|
.IX Item "-mabshi"
|
16049 |
|
|
Use \f(CW\*(C`abshi2\*(C'\fR pattern. This is the default.
|
16050 |
|
|
.IP "\fB\-mno\-abshi\fR" 4
|
16051 |
|
|
.IX Item "-mno-abshi"
|
16052 |
|
|
Do not use \f(CW\*(C`abshi2\*(C'\fR pattern.
|
16053 |
|
|
.IP "\fB\-mbranch\-expensive\fR" 4
|
16054 |
|
|
.IX Item "-mbranch-expensive"
|
16055 |
|
|
Pretend that branches are expensive. This is for experimenting with
|
16056 |
|
|
code generation only.
|
16057 |
|
|
.IP "\fB\-mbranch\-cheap\fR" 4
|
16058 |
|
|
.IX Item "-mbranch-cheap"
|
16059 |
|
|
Do not pretend that branches are expensive. This is the default.
|
16060 |
|
|
.IP "\fB\-munix\-asm\fR" 4
|
16061 |
|
|
.IX Item "-munix-asm"
|
16062 |
|
|
Use Unix assembler syntax. This is the default when configured for
|
16063 |
|
|
\&\fBpdp11\-*\-bsd\fR.
|
16064 |
|
|
.IP "\fB\-mdec\-asm\fR" 4
|
16065 |
|
|
.IX Item "-mdec-asm"
|
16066 |
|
|
Use \s-1DEC\s0 assembler syntax. This is the default when configured for any
|
16067 |
|
|
\&\s-1PDP\-11\s0 target other than \fBpdp11\-*\-bsd\fR.
|
16068 |
|
|
.PP
|
16069 |
|
|
\fIpicoChip Options\fR
|
16070 |
|
|
.IX Subsection "picoChip Options"
|
16071 |
|
|
.PP
|
16072 |
|
|
These \fB\-m\fR options are defined for picoChip implementations:
|
16073 |
|
|
.IP "\fB\-mae=\fR\fIae_type\fR" 4
|
16074 |
|
|
.IX Item "-mae=ae_type"
|
16075 |
|
|
Set the instruction set, register set, and instruction scheduling
|
16076 |
|
|
parameters for array element type \fIae_type\fR. Supported values
|
16077 |
|
|
for \fIae_type\fR are \fB\s-1ANY\s0\fR, \fB\s-1MUL\s0\fR, and \fB\s-1MAC\s0\fR.
|
16078 |
|
|
.Sp
|
16079 |
|
|
\&\fB\-mae=ANY\fR selects a completely generic \s-1AE\s0 type. Code
|
16080 |
|
|
generated with this option runs on any of the other \s-1AE\s0 types. The
|
16081 |
|
|
code is not as efficient as it would be if compiled for a specific
|
16082 |
|
|
\&\s-1AE\s0 type, and some types of operation (e.g., multiplication) do not
|
16083 |
|
|
work properly on all types of \s-1AE\s0.
|
16084 |
|
|
.Sp
|
16085 |
|
|
\&\fB\-mae=MUL\fR selects a \s-1MUL\s0 \s-1AE\s0 type. This is the most useful \s-1AE\s0 type
|
16086 |
|
|
for compiled code, and is the default.
|
16087 |
|
|
.Sp
|
16088 |
|
|
\&\fB\-mae=MAC\fR selects a DSP-style \s-1MAC\s0 \s-1AE\s0. Code compiled with this
|
16089 |
|
|
option may suffer from poor performance of byte (char) manipulation,
|
16090 |
|
|
since the \s-1DSP\s0 \s-1AE\s0 does not provide hardware support for byte load/stores.
|
16091 |
|
|
.IP "\fB\-msymbol\-as\-address\fR" 4
|
16092 |
|
|
.IX Item "-msymbol-as-address"
|
16093 |
|
|
Enable the compiler to directly use a symbol name as an address in a
|
16094 |
|
|
load/store instruction, without first loading it into a
|
16095 |
|
|
register. Typically, the use of this option generates larger
|
16096 |
|
|
programs, which run faster than when the option isn't used. However, the
|
16097 |
|
|
results vary from program to program, so it is left as a user option,
|
16098 |
|
|
rather than being permanently enabled.
|
16099 |
|
|
.IP "\fB\-mno\-inefficient\-warnings\fR" 4
|
16100 |
|
|
.IX Item "-mno-inefficient-warnings"
|
16101 |
|
|
Disables warnings about the generation of inefficient code. These
|
16102 |
|
|
warnings can be generated, for example, when compiling code that
|
16103 |
|
|
performs byte-level memory operations on the \s-1MAC\s0 \s-1AE\s0 type. The \s-1MAC\s0 \s-1AE\s0 has
|
16104 |
|
|
no hardware support for byte-level memory operations, so all byte
|
16105 |
|
|
load/stores must be synthesized from word load/store operations. This is
|
16106 |
|
|
inefficient and a warning is generated to indicate
|
16107 |
|
|
that you should rewrite the code to avoid byte operations, or to target
|
16108 |
|
|
an \s-1AE\s0 type that has the necessary hardware support. This option disables
|
16109 |
|
|
these warnings.
|
16110 |
|
|
.PP
|
16111 |
|
|
\fIPowerPC Options\fR
|
16112 |
|
|
.IX Subsection "PowerPC Options"
|
16113 |
|
|
.PP
|
16114 |
|
|
These are listed under
|
16115 |
|
|
.PP
|
16116 |
|
|
\fI\s-1RL78\s0 Options\fR
|
16117 |
|
|
.IX Subsection "RL78 Options"
|
16118 |
|
|
.IP "\fB\-msim\fR" 4
|
16119 |
|
|
.IX Item "-msim"
|
16120 |
|
|
Links in additional target libraries to support operation within a
|
16121 |
|
|
simulator.
|
16122 |
|
|
.IP "\fB\-mmul=none\fR" 4
|
16123 |
|
|
.IX Item "-mmul=none"
|
16124 |
|
|
.PD 0
|
16125 |
|
|
.IP "\fB\-mmul=g13\fR" 4
|
16126 |
|
|
.IX Item "-mmul=g13"
|
16127 |
|
|
.IP "\fB\-mmul=rl78\fR" 4
|
16128 |
|
|
.IX Item "-mmul=rl78"
|
16129 |
|
|
.PD
|
16130 |
|
|
Specifies the type of hardware multiplication support to be used. The
|
16131 |
|
|
default is \f(CW\*(C`none\*(C'\fR, which uses software multiplication functions.
|
16132 |
|
|
The \f(CW\*(C`g13\*(C'\fR option is for the hardware multiply/divide peripheral
|
16133 |
|
|
only on the \s-1RL78/G13\s0 targets. The \f(CW\*(C`rl78\*(C'\fR option is for the
|
16134 |
|
|
standard hardware multiplication defined in the \s-1RL78\s0 software manual.
|
16135 |
|
|
.PP
|
16136 |
|
|
\fI\s-1IBM\s0 \s-1RS/6000\s0 and PowerPC Options\fR
|
16137 |
|
|
.IX Subsection "IBM RS/6000 and PowerPC Options"
|
16138 |
|
|
.PP
|
16139 |
|
|
These \fB\-m\fR options are defined for the \s-1IBM\s0 \s-1RS/6000\s0 and PowerPC:
|
16140 |
|
|
.IP "\fB\-mpowerpc\-gpopt\fR" 4
|
16141 |
|
|
.IX Item "-mpowerpc-gpopt"
|
16142 |
|
|
.PD 0
|
16143 |
|
|
.IP "\fB\-mno\-powerpc\-gpopt\fR" 4
|
16144 |
|
|
.IX Item "-mno-powerpc-gpopt"
|
16145 |
|
|
.IP "\fB\-mpowerpc\-gfxopt\fR" 4
|
16146 |
|
|
.IX Item "-mpowerpc-gfxopt"
|
16147 |
|
|
.IP "\fB\-mno\-powerpc\-gfxopt\fR" 4
|
16148 |
|
|
.IX Item "-mno-powerpc-gfxopt"
|
16149 |
|
|
.IP "\fB\-mpowerpc64\fR" 4
|
16150 |
|
|
.IX Item "-mpowerpc64"
|
16151 |
|
|
.IP "\fB\-mno\-powerpc64\fR" 4
|
16152 |
|
|
.IX Item "-mno-powerpc64"
|
16153 |
|
|
.IP "\fB\-mmfcrf\fR" 4
|
16154 |
|
|
.IX Item "-mmfcrf"
|
16155 |
|
|
.IP "\fB\-mno\-mfcrf\fR" 4
|
16156 |
|
|
.IX Item "-mno-mfcrf"
|
16157 |
|
|
.IP "\fB\-mpopcntb\fR" 4
|
16158 |
|
|
.IX Item "-mpopcntb"
|
16159 |
|
|
.IP "\fB\-mno\-popcntb\fR" 4
|
16160 |
|
|
.IX Item "-mno-popcntb"
|
16161 |
|
|
.IP "\fB\-mpopcntd\fR" 4
|
16162 |
|
|
.IX Item "-mpopcntd"
|
16163 |
|
|
.IP "\fB\-mno\-popcntd\fR" 4
|
16164 |
|
|
.IX Item "-mno-popcntd"
|
16165 |
|
|
.IP "\fB\-mfprnd\fR" 4
|
16166 |
|
|
.IX Item "-mfprnd"
|
16167 |
|
|
.IP "\fB\-mno\-fprnd\fR" 4
|
16168 |
|
|
.IX Item "-mno-fprnd"
|
16169 |
|
|
.IP "\fB\-mcmpb\fR" 4
|
16170 |
|
|
.IX Item "-mcmpb"
|
16171 |
|
|
.IP "\fB\-mno\-cmpb\fR" 4
|
16172 |
|
|
.IX Item "-mno-cmpb"
|
16173 |
|
|
.IP "\fB\-mmfpgpr\fR" 4
|
16174 |
|
|
.IX Item "-mmfpgpr"
|
16175 |
|
|
.IP "\fB\-mno\-mfpgpr\fR" 4
|
16176 |
|
|
.IX Item "-mno-mfpgpr"
|
16177 |
|
|
.IP "\fB\-mhard\-dfp\fR" 4
|
16178 |
|
|
.IX Item "-mhard-dfp"
|
16179 |
|
|
.IP "\fB\-mno\-hard\-dfp\fR" 4
|
16180 |
|
|
.IX Item "-mno-hard-dfp"
|
16181 |
|
|
.PD
|
16182 |
|
|
You use these options to specify which instructions are available on the
|
16183 |
|
|
processor you are using. The default value of these options is
|
16184 |
|
|
determined when configuring \s-1GCC\s0. Specifying the
|
16185 |
|
|
\&\fB\-mcpu=\fR\fIcpu_type\fR overrides the specification of these
|
16186 |
|
|
options. We recommend you use the \fB\-mcpu=\fR\fIcpu_type\fR option
|
16187 |
|
|
rather than the options listed above.
|
16188 |
|
|
.Sp
|
16189 |
|
|
Specifying \fB\-mpowerpc\-gpopt\fR allows
|
16190 |
|
|
\&\s-1GCC\s0 to use the optional PowerPC architecture instructions in the
|
16191 |
|
|
General Purpose group, including floating-point square root. Specifying
|
16192 |
|
|
\&\fB\-mpowerpc\-gfxopt\fR allows \s-1GCC\s0 to
|
16193 |
|
|
use the optional PowerPC architecture instructions in the Graphics
|
16194 |
|
|
group, including floating-point select.
|
16195 |
|
|
.Sp
|
16196 |
|
|
The \fB\-mmfcrf\fR option allows \s-1GCC\s0 to generate the move from
|
16197 |
|
|
condition register field instruction implemented on the \s-1POWER4\s0
|
16198 |
|
|
processor and other processors that support the PowerPC V2.01
|
16199 |
|
|
architecture.
|
16200 |
|
|
The \fB\-mpopcntb\fR option allows \s-1GCC\s0 to generate the popcount and
|
16201 |
|
|
double-precision \s-1FP\s0 reciprocal estimate instruction implemented on the
|
16202 |
|
|
\&\s-1POWER5\s0 processor and other processors that support the PowerPC V2.02
|
16203 |
|
|
architecture.
|
16204 |
|
|
The \fB\-mpopcntd\fR option allows \s-1GCC\s0 to generate the popcount
|
16205 |
|
|
instruction implemented on the \s-1POWER7\s0 processor and other processors
|
16206 |
|
|
that support the PowerPC V2.06 architecture.
|
16207 |
|
|
The \fB\-mfprnd\fR option allows \s-1GCC\s0 to generate the \s-1FP\s0 round to
|
16208 |
|
|
integer instructions implemented on the \s-1POWER5+\s0 processor and other
|
16209 |
|
|
processors that support the PowerPC V2.03 architecture.
|
16210 |
|
|
The \fB\-mcmpb\fR option allows \s-1GCC\s0 to generate the compare bytes
|
16211 |
|
|
instruction implemented on the \s-1POWER6\s0 processor and other processors
|
16212 |
|
|
that support the PowerPC V2.05 architecture.
|
16213 |
|
|
The \fB\-mmfpgpr\fR option allows \s-1GCC\s0 to generate the \s-1FP\s0 move to/from
|
16214 |
|
|
general-purpose register instructions implemented on the \s-1POWER6X\s0
|
16215 |
|
|
processor and other processors that support the extended PowerPC V2.05
|
16216 |
|
|
architecture.
|
16217 |
|
|
The \fB\-mhard\-dfp\fR option allows \s-1GCC\s0 to generate the decimal
|
16218 |
|
|
floating-point instructions implemented on some \s-1POWER\s0 processors.
|
16219 |
|
|
.Sp
|
16220 |
|
|
The \fB\-mpowerpc64\fR option allows \s-1GCC\s0 to generate the additional
|
16221 |
|
|
64\-bit instructions that are found in the full PowerPC64 architecture
|
16222 |
|
|
and to treat GPRs as 64\-bit, doubleword quantities. \s-1GCC\s0 defaults to
|
16223 |
|
|
\&\fB\-mno\-powerpc64\fR.
|
16224 |
|
|
.IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4
|
16225 |
|
|
.IX Item "-mcpu=cpu_type"
|
16226 |
|
|
Set architecture type, register usage, and
|
16227 |
|
|
instruction scheduling parameters for machine type \fIcpu_type\fR.
|
16228 |
|
|
Supported values for \fIcpu_type\fR are \fB401\fR, \fB403\fR,
|
16229 |
|
|
\&\fB405\fR, \fB405fp\fR, \fB440\fR, \fB440fp\fR, \fB464\fR, \fB464fp\fR,
|
16230 |
|
|
\&\fB476\fR, \fB476fp\fR, \fB505\fR, \fB601\fR, \fB602\fR, \fB603\fR,
|
16231 |
|
|
\&\fB603e\fR, \fB604\fR, \fB604e\fR, \fB620\fR, \fB630\fR, \fB740\fR,
|
16232 |
|
|
\&\fB7400\fR, \fB7450\fR, \fB750\fR, \fB801\fR, \fB821\fR, \fB823\fR,
|
16233 |
|
|
\&\fB860\fR, \fB970\fR, \fB8540\fR, \fBa2\fR, \fBe300c2\fR,
|
16234 |
|
|
\&\fBe300c3\fR, \fBe500mc\fR, \fBe500mc64\fR, \fBe5500\fR,
|
16235 |
|
|
\&\fBe6500\fR, \fBec603e\fR, \fBG3\fR, \fBG4\fR, \fBG5\fR,
|
16236 |
|
|
\&\fBtitan\fR, \fBpower3\fR, \fBpower4\fR, \fBpower5\fR, \fBpower5+\fR,
|
16237 |
|
|
\&\fBpower6\fR, \fBpower6x\fR, \fBpower7\fR, \fBpower8\fR, \fBpowerpc\fR,
|
16238 |
|
|
\&\fBpowerpc64\fR, and \fBrs64\fR.
|
16239 |
|
|
.Sp
|
16240 |
|
|
\&\fB\-mcpu=powerpc\fR, and \fB\-mcpu=powerpc64\fR specify pure 32\-bit
|
16241 |
|
|
PowerPC and 64\-bit PowerPC architecture machine
|
16242 |
|
|
types, with an appropriate, generic processor model assumed for
|
16243 |
|
|
scheduling purposes.
|
16244 |
|
|
.Sp
|
16245 |
|
|
The other options specify a specific processor. Code generated under
|
16246 |
|
|
those options runs best on that processor, and may not run at all on
|
16247 |
|
|
others.
|
16248 |
|
|
.Sp
|
16249 |
|
|
The \fB\-mcpu\fR options automatically enable or disable the
|
16250 |
|
|
following options:
|
16251 |
|
|
.Sp
|
16252 |
|
|
\&\fB\-maltivec \-mfprnd \-mhard\-float \-mmfcrf \-mmultiple
|
16253 |
|
|
\&\-mpopcntb \-mpopcntd \-mpowerpc64
|
16254 |
|
|
\&\-mpowerpc\-gpopt \-mpowerpc\-gfxopt \-msingle\-float \-mdouble\-float
|
16255 |
|
|
\&\-msimple\-fpu \-mstring \-mmulhw \-mdlmzb \-mmfpgpr \-mvsx\fR
|
16256 |
|
|
.Sp
|
16257 |
|
|
The particular options set for any particular \s-1CPU\s0 varies between
|
16258 |
|
|
compiler versions, depending on what setting seems to produce optimal
|
16259 |
|
|
code for that \s-1CPU\s0; it doesn't necessarily reflect the actual hardware's
|
16260 |
|
|
capabilities. If you wish to set an individual option to a particular
|
16261 |
|
|
value, you may specify it after the \fB\-mcpu\fR option, like
|
16262 |
|
|
\&\fB\-mcpu=970 \-mno\-altivec\fR.
|
16263 |
|
|
.Sp
|
16264 |
|
|
On \s-1AIX\s0, the \fB\-maltivec\fR and \fB\-mpowerpc64\fR options are
|
16265 |
|
|
not enabled or disabled by the \fB\-mcpu\fR option at present because
|
16266 |
|
|
\&\s-1AIX\s0 does not have full support for these options. You may still
|
16267 |
|
|
enable or disable them individually if you're sure it'll work in your
|
16268 |
|
|
environment.
|
16269 |
|
|
.IP "\fB\-mtune=\fR\fIcpu_type\fR" 4
|
16270 |
|
|
.IX Item "-mtune=cpu_type"
|
16271 |
|
|
Set the instruction scheduling parameters for machine type
|
16272 |
|
|
\&\fIcpu_type\fR, but do not set the architecture type or register usage,
|
16273 |
|
|
as \fB\-mcpu=\fR\fIcpu_type\fR does. The same
|
16274 |
|
|
values for \fIcpu_type\fR are used for \fB\-mtune\fR as for
|
16275 |
|
|
\&\fB\-mcpu\fR. If both are specified, the code generated uses the
|
16276 |
|
|
architecture and registers set by \fB\-mcpu\fR, but the
|
16277 |
|
|
scheduling parameters set by \fB\-mtune\fR.
|
16278 |
|
|
.IP "\fB\-mcmodel=small\fR" 4
|
16279 |
|
|
.IX Item "-mcmodel=small"
|
16280 |
|
|
Generate PowerPC64 code for the small model: The \s-1TOC\s0 is limited to
|
16281 |
|
|
64k.
|
16282 |
|
|
.IP "\fB\-mcmodel=medium\fR" 4
|
16283 |
|
|
.IX Item "-mcmodel=medium"
|
16284 |
|
|
Generate PowerPC64 code for the medium model: The \s-1TOC\s0 and other static
|
16285 |
|
|
data may be up to a total of 4G in size.
|
16286 |
|
|
.IP "\fB\-mcmodel=large\fR" 4
|
16287 |
|
|
.IX Item "-mcmodel=large"
|
16288 |
|
|
Generate PowerPC64 code for the large model: The \s-1TOC\s0 may be up to 4G
|
16289 |
|
|
in size. Other data and code is only limited by the 64\-bit address
|
16290 |
|
|
space.
|
16291 |
|
|
.IP "\fB\-maltivec\fR" 4
|
16292 |
|
|
.IX Item "-maltivec"
|
16293 |
|
|
.PD 0
|
16294 |
|
|
.IP "\fB\-mno\-altivec\fR" 4
|
16295 |
|
|
.IX Item "-mno-altivec"
|
16296 |
|
|
.PD
|
16297 |
|
|
Generate code that uses (does not use) AltiVec instructions, and also
|
16298 |
|
|
enable the use of built-in functions that allow more direct access to
|
16299 |
|
|
the AltiVec instruction set. You may also need to set
|
16300 |
|
|
\&\fB\-mabi=altivec\fR to adjust the current \s-1ABI\s0 with AltiVec \s-1ABI\s0
|
16301 |
|
|
enhancements.
|
16302 |
|
|
.IP "\fB\-mvrsave\fR" 4
|
16303 |
|
|
.IX Item "-mvrsave"
|
16304 |
|
|
.PD 0
|
16305 |
|
|
.IP "\fB\-mno\-vrsave\fR" 4
|
16306 |
|
|
.IX Item "-mno-vrsave"
|
16307 |
|
|
.PD
|
16308 |
|
|
Generate \s-1VRSAVE\s0 instructions when generating AltiVec code.
|
16309 |
|
|
.IP "\fB\-mgen\-cell\-microcode\fR" 4
|
16310 |
|
|
.IX Item "-mgen-cell-microcode"
|
16311 |
|
|
Generate Cell microcode instructions.
|
16312 |
|
|
.IP "\fB\-mwarn\-cell\-microcode\fR" 4
|
16313 |
|
|
.IX Item "-mwarn-cell-microcode"
|
16314 |
|
|
Warn when a Cell microcode instruction is emitted. An example
|
16315 |
|
|
of a Cell microcode instruction is a variable shift.
|
16316 |
|
|
.IP "\fB\-msecure\-plt\fR" 4
|
16317 |
|
|
.IX Item "-msecure-plt"
|
16318 |
|
|
Generate code that allows \fBld\fR and \fBld.so\fR
|
16319 |
|
|
to build executables and shared
|
16320 |
|
|
libraries with non-executable \f(CW\*(C`.plt\*(C'\fR and \f(CW\*(C`.got\*(C'\fR sections.
|
16321 |
|
|
This is a PowerPC
|
16322 |
|
|
32\-bit \s-1SYSV\s0 \s-1ABI\s0 option.
|
16323 |
|
|
.IP "\fB\-mbss\-plt\fR" 4
|
16324 |
|
|
.IX Item "-mbss-plt"
|
16325 |
|
|
Generate code that uses a \s-1BSS\s0 \f(CW\*(C`.plt\*(C'\fR section that \fBld.so\fR
|
16326 |
|
|
fills in, and
|
16327 |
|
|
requires \f(CW\*(C`.plt\*(C'\fR and \f(CW\*(C`.got\*(C'\fR
|
16328 |
|
|
sections that are both writable and executable.
|
16329 |
|
|
This is a PowerPC 32\-bit \s-1SYSV\s0 \s-1ABI\s0 option.
|
16330 |
|
|
.IP "\fB\-misel\fR" 4
|
16331 |
|
|
.IX Item "-misel"
|
16332 |
|
|
.PD 0
|
16333 |
|
|
.IP "\fB\-mno\-isel\fR" 4
|
16334 |
|
|
.IX Item "-mno-isel"
|
16335 |
|
|
.PD
|
16336 |
|
|
This switch enables or disables the generation of \s-1ISEL\s0 instructions.
|
16337 |
|
|
.IP "\fB\-misel=\fR\fIyes/no\fR" 4
|
16338 |
|
|
.IX Item "-misel=yes/no"
|
16339 |
|
|
This switch has been deprecated. Use \fB\-misel\fR and
|
16340 |
|
|
\&\fB\-mno\-isel\fR instead.
|
16341 |
|
|
.IP "\fB\-mspe\fR" 4
|
16342 |
|
|
.IX Item "-mspe"
|
16343 |
|
|
.PD 0
|
16344 |
|
|
.IP "\fB\-mno\-spe\fR" 4
|
16345 |
|
|
.IX Item "-mno-spe"
|
16346 |
|
|
.PD
|
16347 |
|
|
This switch enables or disables the generation of \s-1SPE\s0 simd
|
16348 |
|
|
instructions.
|
16349 |
|
|
.IP "\fB\-mpaired\fR" 4
|
16350 |
|
|
.IX Item "-mpaired"
|
16351 |
|
|
.PD 0
|
16352 |
|
|
.IP "\fB\-mno\-paired\fR" 4
|
16353 |
|
|
.IX Item "-mno-paired"
|
16354 |
|
|
.PD
|
16355 |
|
|
This switch enables or disables the generation of \s-1PAIRED\s0 simd
|
16356 |
|
|
instructions.
|
16357 |
|
|
.IP "\fB\-mspe=\fR\fIyes/no\fR" 4
|
16358 |
|
|
.IX Item "-mspe=yes/no"
|
16359 |
|
|
This option has been deprecated. Use \fB\-mspe\fR and
|
16360 |
|
|
\&\fB\-mno\-spe\fR instead.
|
16361 |
|
|
.IP "\fB\-mvsx\fR" 4
|
16362 |
|
|
.IX Item "-mvsx"
|
16363 |
|
|
.PD 0
|
16364 |
|
|
.IP "\fB\-mno\-vsx\fR" 4
|
16365 |
|
|
.IX Item "-mno-vsx"
|
16366 |
|
|
.PD
|
16367 |
|
|
Generate code that uses (does not use) vector/scalar (\s-1VSX\s0)
|
16368 |
|
|
instructions, and also enable the use of built-in functions that allow
|
16369 |
|
|
more direct access to the \s-1VSX\s0 instruction set.
|
16370 |
|
|
.IP "\fB\-mfloat\-gprs=\fR\fIyes/single/double/no\fR" 4
|
16371 |
|
|
.IX Item "-mfloat-gprs=yes/single/double/no"
|
16372 |
|
|
.PD 0
|
16373 |
|
|
.IP "\fB\-mfloat\-gprs\fR" 4
|
16374 |
|
|
.IX Item "-mfloat-gprs"
|
16375 |
|
|
.PD
|
16376 |
|
|
This switch enables or disables the generation of floating-point
|
16377 |
|
|
operations on the general-purpose registers for architectures that
|
16378 |
|
|
support it.
|
16379 |
|
|
.Sp
|
16380 |
|
|
The argument \fIyes\fR or \fIsingle\fR enables the use of
|
16381 |
|
|
single-precision floating-point operations.
|
16382 |
|
|
.Sp
|
16383 |
|
|
The argument \fIdouble\fR enables the use of single and
|
16384 |
|
|
double-precision floating-point operations.
|
16385 |
|
|
.Sp
|
16386 |
|
|
The argument \fIno\fR disables floating-point operations on the
|
16387 |
|
|
general-purpose registers.
|
16388 |
|
|
.Sp
|
16389 |
|
|
This option is currently only available on the MPC854x.
|
16390 |
|
|
.IP "\fB\-m32\fR" 4
|
16391 |
|
|
.IX Item "-m32"
|
16392 |
|
|
.PD 0
|
16393 |
|
|
.IP "\fB\-m64\fR" 4
|
16394 |
|
|
.IX Item "-m64"
|
16395 |
|
|
.PD
|
16396 |
|
|
Generate code for 32\-bit or 64\-bit environments of Darwin and \s-1SVR4\s0
|
16397 |
|
|
targets (including GNU/Linux). The 32\-bit environment sets int, long
|
16398 |
|
|
and pointer to 32 bits and generates code that runs on any PowerPC
|
16399 |
|
|
variant. The 64\-bit environment sets int to 32 bits and long and
|
16400 |
|
|
pointer to 64 bits, and generates code for PowerPC64, as for
|
16401 |
|
|
\&\fB\-mpowerpc64\fR.
|
16402 |
|
|
.IP "\fB\-mfull\-toc\fR" 4
|
16403 |
|
|
.IX Item "-mfull-toc"
|
16404 |
|
|
.PD 0
|
16405 |
|
|
.IP "\fB\-mno\-fp\-in\-toc\fR" 4
|
16406 |
|
|
.IX Item "-mno-fp-in-toc"
|
16407 |
|
|
.IP "\fB\-mno\-sum\-in\-toc\fR" 4
|
16408 |
|
|
.IX Item "-mno-sum-in-toc"
|
16409 |
|
|
.IP "\fB\-mminimal\-toc\fR" 4
|
16410 |
|
|
.IX Item "-mminimal-toc"
|
16411 |
|
|
.PD
|
16412 |
|
|
Modify generation of the \s-1TOC\s0 (Table Of Contents), which is created for
|
16413 |
|
|
every executable file. The \fB\-mfull\-toc\fR option is selected by
|
16414 |
|
|
default. In that case, \s-1GCC\s0 allocates at least one \s-1TOC\s0 entry for
|
16415 |
|
|
each unique non-automatic variable reference in your program. \s-1GCC\s0
|
16416 |
|
|
also places floating-point constants in the \s-1TOC\s0. However, only
|
16417 |
|
|
16,384 entries are available in the \s-1TOC\s0.
|
16418 |
|
|
.Sp
|
16419 |
|
|
If you receive a linker error message that saying you have overflowed
|
16420 |
|
|
the available \s-1TOC\s0 space, you can reduce the amount of \s-1TOC\s0 space used
|
16421 |
|
|
with the \fB\-mno\-fp\-in\-toc\fR and \fB\-mno\-sum\-in\-toc\fR options.
|
16422 |
|
|
\&\fB\-mno\-fp\-in\-toc\fR prevents \s-1GCC\s0 from putting floating-point
|
16423 |
|
|
constants in the \s-1TOC\s0 and \fB\-mno\-sum\-in\-toc\fR forces \s-1GCC\s0 to
|
16424 |
|
|
generate code to calculate the sum of an address and a constant at
|
16425 |
|
|
run time instead of putting that sum into the \s-1TOC\s0. You may specify one
|
16426 |
|
|
or both of these options. Each causes \s-1GCC\s0 to produce very slightly
|
16427 |
|
|
slower and larger code at the expense of conserving \s-1TOC\s0 space.
|
16428 |
|
|
.Sp
|
16429 |
|
|
If you still run out of space in the \s-1TOC\s0 even when you specify both of
|
16430 |
|
|
these options, specify \fB\-mminimal\-toc\fR instead. This option causes
|
16431 |
|
|
\&\s-1GCC\s0 to make only one \s-1TOC\s0 entry for every file. When you specify this
|
16432 |
|
|
option, \s-1GCC\s0 produces code that is slower and larger but which
|
16433 |
|
|
uses extremely little \s-1TOC\s0 space. You may wish to use this option
|
16434 |
|
|
only on files that contain less frequently-executed code.
|
16435 |
|
|
.IP "\fB\-maix64\fR" 4
|
16436 |
|
|
.IX Item "-maix64"
|
16437 |
|
|
.PD 0
|
16438 |
|
|
.IP "\fB\-maix32\fR" 4
|
16439 |
|
|
.IX Item "-maix32"
|
16440 |
|
|
.PD
|
16441 |
|
|
Enable 64\-bit \s-1AIX\s0 \s-1ABI\s0 and calling convention: 64\-bit pointers, 64\-bit
|
16442 |
|
|
\&\f(CW\*(C`long\*(C'\fR type, and the infrastructure needed to support them.
|
16443 |
|
|
Specifying \fB\-maix64\fR implies \fB\-mpowerpc64\fR,
|
16444 |
|
|
while \fB\-maix32\fR disables the 64\-bit \s-1ABI\s0 and
|
16445 |
|
|
implies \fB\-mno\-powerpc64\fR. \s-1GCC\s0 defaults to \fB\-maix32\fR.
|
16446 |
|
|
.IP "\fB\-mxl\-compat\fR" 4
|
16447 |
|
|
.IX Item "-mxl-compat"
|
16448 |
|
|
.PD 0
|
16449 |
|
|
.IP "\fB\-mno\-xl\-compat\fR" 4
|
16450 |
|
|
.IX Item "-mno-xl-compat"
|
16451 |
|
|
.PD
|
16452 |
|
|
Produce code that conforms more closely to \s-1IBM\s0 \s-1XL\s0 compiler semantics
|
16453 |
|
|
when using AIX-compatible \s-1ABI\s0. Pass floating-point arguments to
|
16454 |
|
|
prototyped functions beyond the register save area (\s-1RSA\s0) on the stack
|
16455 |
|
|
in addition to argument FPRs. Do not assume that most significant
|
16456 |
|
|
double in 128\-bit long double value is properly rounded when comparing
|
16457 |
|
|
values and converting to double. Use \s-1XL\s0 symbol names for long double
|
16458 |
|
|
support routines.
|
16459 |
|
|
.Sp
|
16460 |
|
|
The \s-1AIX\s0 calling convention was extended but not initially documented to
|
16461 |
|
|
handle an obscure K&R C case of calling a function that takes the
|
16462 |
|
|
address of its arguments with fewer arguments than declared. \s-1IBM\s0 \s-1XL\s0
|
16463 |
|
|
compilers access floating-point arguments that do not fit in the
|
16464 |
|
|
\&\s-1RSA\s0 from the stack when a subroutine is compiled without
|
16465 |
|
|
optimization. Because always storing floating-point arguments on the
|
16466 |
|
|
stack is inefficient and rarely needed, this option is not enabled by
|
16467 |
|
|
default and only is necessary when calling subroutines compiled by \s-1IBM\s0
|
16468 |
|
|
\&\s-1XL\s0 compilers without optimization.
|
16469 |
|
|
.IP "\fB\-mpe\fR" 4
|
16470 |
|
|
.IX Item "-mpe"
|
16471 |
|
|
Support \fI\s-1IBM\s0 \s-1RS/6000\s0 \s-1SP\s0\fR \fIParallel Environment\fR (\s-1PE\s0). Link an
|
16472 |
|
|
application written to use message passing with special startup code to
|
16473 |
|
|
enable the application to run. The system must have \s-1PE\s0 installed in the
|
16474 |
|
|
standard location (\fI/usr/lpp/ppe.poe/\fR), or the \fIspecs\fR file
|
16475 |
|
|
must be overridden with the \fB\-specs=\fR option to specify the
|
16476 |
|
|
appropriate directory location. The Parallel Environment does not
|
16477 |
|
|
support threads, so the \fB\-mpe\fR option and the \fB\-pthread\fR
|
16478 |
|
|
option are incompatible.
|
16479 |
|
|
.IP "\fB\-malign\-natural\fR" 4
|
16480 |
|
|
.IX Item "-malign-natural"
|
16481 |
|
|
.PD 0
|
16482 |
|
|
.IP "\fB\-malign\-power\fR" 4
|
16483 |
|
|
.IX Item "-malign-power"
|
16484 |
|
|
.PD
|
16485 |
|
|
On \s-1AIX\s0, 32\-bit Darwin, and 64\-bit PowerPC GNU/Linux, the option
|
16486 |
|
|
\&\fB\-malign\-natural\fR overrides the ABI-defined alignment of larger
|
16487 |
|
|
types, such as floating-point doubles, on their natural size-based boundary.
|
16488 |
|
|
The option \fB\-malign\-power\fR instructs \s-1GCC\s0 to follow the ABI-specified
|
16489 |
|
|
alignment rules. \s-1GCC\s0 defaults to the standard alignment defined in the \s-1ABI\s0.
|
16490 |
|
|
.Sp
|
16491 |
|
|
On 64\-bit Darwin, natural alignment is the default, and \fB\-malign\-power\fR
|
16492 |
|
|
is not supported.
|
16493 |
|
|
.IP "\fB\-msoft\-float\fR" 4
|
16494 |
|
|
.IX Item "-msoft-float"
|
16495 |
|
|
.PD 0
|
16496 |
|
|
.IP "\fB\-mhard\-float\fR" 4
|
16497 |
|
|
.IX Item "-mhard-float"
|
16498 |
|
|
.PD
|
16499 |
|
|
Generate code that does not use (uses) the floating-point register set.
|
16500 |
|
|
Software floating-point emulation is provided if you use the
|
16501 |
|
|
\&\fB\-msoft\-float\fR option, and pass the option to \s-1GCC\s0 when linking.
|
16502 |
|
|
.IP "\fB\-msingle\-float\fR" 4
|
16503 |
|
|
.IX Item "-msingle-float"
|
16504 |
|
|
.PD 0
|
16505 |
|
|
.IP "\fB\-mdouble\-float\fR" 4
|
16506 |
|
|
.IX Item "-mdouble-float"
|
16507 |
|
|
.PD
|
16508 |
|
|
Generate code for single\- or double-precision floating-point operations.
|
16509 |
|
|
\&\fB\-mdouble\-float\fR implies \fB\-msingle\-float\fR.
|
16510 |
|
|
.IP "\fB\-msimple\-fpu\fR" 4
|
16511 |
|
|
.IX Item "-msimple-fpu"
|
16512 |
|
|
Do not generate \f(CW\*(C`sqrt\*(C'\fR and \f(CW\*(C`div\*(C'\fR instructions for hardware
|
16513 |
|
|
floating-point unit.
|
16514 |
|
|
.IP "\fB\-mfpu=\fR\fIname\fR" 4
|
16515 |
|
|
.IX Item "-mfpu=name"
|
16516 |
|
|
Specify type of floating-point unit. Valid values for \fIname\fR are
|
16517 |
|
|
\&\fBsp_lite\fR (equivalent to \fB\-msingle\-float \-msimple\-fpu\fR),
|
16518 |
|
|
\&\fBdp_lite\fR (equivalent to \fB\-mdouble\-float \-msimple\-fpu\fR),
|
16519 |
|
|
\&\fBsp_full\fR (equivalent to \fB\-msingle\-float\fR),
|
16520 |
|
|
and \fBdp_full\fR (equivalent to \fB\-mdouble\-float\fR).
|
16521 |
|
|
.IP "\fB\-mxilinx\-fpu\fR" 4
|
16522 |
|
|
.IX Item "-mxilinx-fpu"
|
16523 |
|
|
Perform optimizations for the floating-point unit on Xilinx \s-1PPC\s0 405/440.
|
16524 |
|
|
.IP "\fB\-mmultiple\fR" 4
|
16525 |
|
|
.IX Item "-mmultiple"
|
16526 |
|
|
.PD 0
|
16527 |
|
|
.IP "\fB\-mno\-multiple\fR" 4
|
16528 |
|
|
.IX Item "-mno-multiple"
|
16529 |
|
|
.PD
|
16530 |
|
|
Generate code that uses (does not use) the load multiple word
|
16531 |
|
|
instructions and the store multiple word instructions. These
|
16532 |
|
|
instructions are generated by default on \s-1POWER\s0 systems, and not
|
16533 |
|
|
generated on PowerPC systems. Do not use \fB\-mmultiple\fR on little-endian
|
16534 |
|
|
PowerPC systems, since those instructions do not work when the
|
16535 |
|
|
processor is in little-endian mode. The exceptions are \s-1PPC740\s0 and
|
16536 |
|
|
\&\s-1PPC750\s0 which permit these instructions in little-endian mode.
|
16537 |
|
|
.IP "\fB\-mstring\fR" 4
|
16538 |
|
|
.IX Item "-mstring"
|
16539 |
|
|
.PD 0
|
16540 |
|
|
.IP "\fB\-mno\-string\fR" 4
|
16541 |
|
|
.IX Item "-mno-string"
|
16542 |
|
|
.PD
|
16543 |
|
|
Generate code that uses (does not use) the load string instructions
|
16544 |
|
|
and the store string word instructions to save multiple registers and
|
16545 |
|
|
do small block moves. These instructions are generated by default on
|
16546 |
|
|
\&\s-1POWER\s0 systems, and not generated on PowerPC systems. Do not use
|
16547 |
|
|
\&\fB\-mstring\fR on little-endian PowerPC systems, since those
|
16548 |
|
|
instructions do not work when the processor is in little-endian mode.
|
16549 |
|
|
The exceptions are \s-1PPC740\s0 and \s-1PPC750\s0 which permit these instructions
|
16550 |
|
|
in little-endian mode.
|
16551 |
|
|
.IP "\fB\-mupdate\fR" 4
|
16552 |
|
|
.IX Item "-mupdate"
|
16553 |
|
|
.PD 0
|
16554 |
|
|
.IP "\fB\-mno\-update\fR" 4
|
16555 |
|
|
.IX Item "-mno-update"
|
16556 |
|
|
.PD
|
16557 |
|
|
Generate code that uses (does not use) the load or store instructions
|
16558 |
|
|
that update the base register to the address of the calculated memory
|
16559 |
|
|
location. These instructions are generated by default. If you use
|
16560 |
|
|
\&\fB\-mno\-update\fR, there is a small window between the time that the
|
16561 |
|
|
stack pointer is updated and the address of the previous frame is
|
16562 |
|
|
stored, which means code that walks the stack frame across interrupts or
|
16563 |
|
|
signals may get corrupted data.
|
16564 |
|
|
.IP "\fB\-mavoid\-indexed\-addresses\fR" 4
|
16565 |
|
|
.IX Item "-mavoid-indexed-addresses"
|
16566 |
|
|
.PD 0
|
16567 |
|
|
.IP "\fB\-mno\-avoid\-indexed\-addresses\fR" 4
|
16568 |
|
|
.IX Item "-mno-avoid-indexed-addresses"
|
16569 |
|
|
.PD
|
16570 |
|
|
Generate code that tries to avoid (not avoid) the use of indexed load
|
16571 |
|
|
or store instructions. These instructions can incur a performance
|
16572 |
|
|
penalty on Power6 processors in certain situations, such as when
|
16573 |
|
|
stepping through large arrays that cross a 16M boundary. This option
|
16574 |
|
|
is enabled by default when targeting Power6 and disabled otherwise.
|
16575 |
|
|
.IP "\fB\-mfused\-madd\fR" 4
|
16576 |
|
|
.IX Item "-mfused-madd"
|
16577 |
|
|
.PD 0
|
16578 |
|
|
.IP "\fB\-mno\-fused\-madd\fR" 4
|
16579 |
|
|
.IX Item "-mno-fused-madd"
|
16580 |
|
|
.PD
|
16581 |
|
|
Generate code that uses (does not use) the floating-point multiply and
|
16582 |
|
|
accumulate instructions. These instructions are generated by default
|
16583 |
|
|
if hardware floating point is used. The machine-dependent
|
16584 |
|
|
\&\fB\-mfused\-madd\fR option is now mapped to the machine-independent
|
16585 |
|
|
\&\fB\-ffp\-contract=fast\fR option, and \fB\-mno\-fused\-madd\fR is
|
16586 |
|
|
mapped to \fB\-ffp\-contract=off\fR.
|
16587 |
|
|
.IP "\fB\-mmulhw\fR" 4
|
16588 |
|
|
.IX Item "-mmulhw"
|
16589 |
|
|
.PD 0
|
16590 |
|
|
.IP "\fB\-mno\-mulhw\fR" 4
|
16591 |
|
|
.IX Item "-mno-mulhw"
|
16592 |
|
|
.PD
|
16593 |
|
|
Generate code that uses (does not use) the half-word multiply and
|
16594 |
|
|
multiply-accumulate instructions on the \s-1IBM\s0 405, 440, 464 and 476 processors.
|
16595 |
|
|
These instructions are generated by default when targeting those
|
16596 |
|
|
processors.
|
16597 |
|
|
.IP "\fB\-mdlmzb\fR" 4
|
16598 |
|
|
.IX Item "-mdlmzb"
|
16599 |
|
|
.PD 0
|
16600 |
|
|
.IP "\fB\-mno\-dlmzb\fR" 4
|
16601 |
|
|
.IX Item "-mno-dlmzb"
|
16602 |
|
|
.PD
|
16603 |
|
|
Generate code that uses (does not use) the string-search \fBdlmzb\fR
|
16604 |
|
|
instruction on the \s-1IBM\s0 405, 440, 464 and 476 processors. This instruction is
|
16605 |
|
|
generated by default when targeting those processors.
|
16606 |
|
|
.IP "\fB\-mno\-bit\-align\fR" 4
|
16607 |
|
|
.IX Item "-mno-bit-align"
|
16608 |
|
|
.PD 0
|
16609 |
|
|
.IP "\fB\-mbit\-align\fR" 4
|
16610 |
|
|
.IX Item "-mbit-align"
|
16611 |
|
|
.PD
|
16612 |
|
|
On System V.4 and embedded PowerPC systems do not (do) force structures
|
16613 |
|
|
and unions that contain bit-fields to be aligned to the base type of the
|
16614 |
|
|
bit-field.
|
16615 |
|
|
.Sp
|
16616 |
|
|
For example, by default a structure containing nothing but 8
|
16617 |
|
|
\&\f(CW\*(C`unsigned\*(C'\fR bit-fields of length 1 is aligned to a 4\-byte
|
16618 |
|
|
boundary and has a size of 4 bytes. By using \fB\-mno\-bit\-align\fR,
|
16619 |
|
|
the structure is aligned to a 1\-byte boundary and is 1 byte in
|
16620 |
|
|
size.
|
16621 |
|
|
.IP "\fB\-mno\-strict\-align\fR" 4
|
16622 |
|
|
.IX Item "-mno-strict-align"
|
16623 |
|
|
.PD 0
|
16624 |
|
|
.IP "\fB\-mstrict\-align\fR" 4
|
16625 |
|
|
.IX Item "-mstrict-align"
|
16626 |
|
|
.PD
|
16627 |
|
|
On System V.4 and embedded PowerPC systems do not (do) assume that
|
16628 |
|
|
unaligned memory references are handled by the system.
|
16629 |
|
|
.IP "\fB\-mrelocatable\fR" 4
|
16630 |
|
|
.IX Item "-mrelocatable"
|
16631 |
|
|
.PD 0
|
16632 |
|
|
.IP "\fB\-mno\-relocatable\fR" 4
|
16633 |
|
|
.IX Item "-mno-relocatable"
|
16634 |
|
|
.PD
|
16635 |
|
|
Generate code that allows (does not allow) a static executable to be
|
16636 |
|
|
relocated to a different address at run time. A simple embedded
|
16637 |
|
|
PowerPC system loader should relocate the entire contents of
|
16638 |
|
|
\&\f(CW\*(C`.got2\*(C'\fR and 4\-byte locations listed in the \f(CW\*(C`.fixup\*(C'\fR section,
|
16639 |
|
|
a table of 32\-bit addresses generated by this option. For this to
|
16640 |
|
|
work, all objects linked together must be compiled with
|
16641 |
|
|
\&\fB\-mrelocatable\fR or \fB\-mrelocatable\-lib\fR.
|
16642 |
|
|
\&\fB\-mrelocatable\fR code aligns the stack to an 8\-byte boundary.
|
16643 |
|
|
.IP "\fB\-mrelocatable\-lib\fR" 4
|
16644 |
|
|
.IX Item "-mrelocatable-lib"
|
16645 |
|
|
.PD 0
|
16646 |
|
|
.IP "\fB\-mno\-relocatable\-lib\fR" 4
|
16647 |
|
|
.IX Item "-mno-relocatable-lib"
|
16648 |
|
|
.PD
|
16649 |
|
|
Like \fB\-mrelocatable\fR, \fB\-mrelocatable\-lib\fR generates a
|
16650 |
|
|
\&\f(CW\*(C`.fixup\*(C'\fR section to allow static executables to be relocated at
|
16651 |
|
|
run time, but \fB\-mrelocatable\-lib\fR does not use the smaller stack
|
16652 |
|
|
alignment of \fB\-mrelocatable\fR. Objects compiled with
|
16653 |
|
|
\&\fB\-mrelocatable\-lib\fR may be linked with objects compiled with
|
16654 |
|
|
any combination of the \fB\-mrelocatable\fR options.
|
16655 |
|
|
.IP "\fB\-mno\-toc\fR" 4
|
16656 |
|
|
.IX Item "-mno-toc"
|
16657 |
|
|
.PD 0
|
16658 |
|
|
.IP "\fB\-mtoc\fR" 4
|
16659 |
|
|
.IX Item "-mtoc"
|
16660 |
|
|
.PD
|
16661 |
|
|
On System V.4 and embedded PowerPC systems do not (do) assume that
|
16662 |
|
|
register 2 contains a pointer to a global area pointing to the addresses
|
16663 |
|
|
used in the program.
|
16664 |
|
|
.IP "\fB\-mlittle\fR" 4
|
16665 |
|
|
.IX Item "-mlittle"
|
16666 |
|
|
.PD 0
|
16667 |
|
|
.IP "\fB\-mlittle\-endian\fR" 4
|
16668 |
|
|
.IX Item "-mlittle-endian"
|
16669 |
|
|
.PD
|
16670 |
|
|
On System V.4 and embedded PowerPC systems compile code for the
|
16671 |
|
|
processor in little-endian mode. The \fB\-mlittle\-endian\fR option is
|
16672 |
|
|
the same as \fB\-mlittle\fR.
|
16673 |
|
|
.IP "\fB\-mbig\fR" 4
|
16674 |
|
|
.IX Item "-mbig"
|
16675 |
|
|
.PD 0
|
16676 |
|
|
.IP "\fB\-mbig\-endian\fR" 4
|
16677 |
|
|
.IX Item "-mbig-endian"
|
16678 |
|
|
.PD
|
16679 |
|
|
On System V.4 and embedded PowerPC systems compile code for the
|
16680 |
|
|
processor in big-endian mode. The \fB\-mbig\-endian\fR option is
|
16681 |
|
|
the same as \fB\-mbig\fR.
|
16682 |
|
|
.IP "\fB\-mdynamic\-no\-pic\fR" 4
|
16683 |
|
|
.IX Item "-mdynamic-no-pic"
|
16684 |
|
|
On Darwin and Mac \s-1OS\s0 X systems, compile code so that it is not
|
16685 |
|
|
relocatable, but that its external references are relocatable. The
|
16686 |
|
|
resulting code is suitable for applications, but not shared
|
16687 |
|
|
libraries.
|
16688 |
|
|
.IP "\fB\-msingle\-pic\-base\fR" 4
|
16689 |
|
|
.IX Item "-msingle-pic-base"
|
16690 |
|
|
Treat the register used for \s-1PIC\s0 addressing as read-only, rather than
|
16691 |
|
|
loading it in the prologue for each function. The runtime system is
|
16692 |
|
|
responsible for initializing this register with an appropriate value
|
16693 |
|
|
before execution begins.
|
16694 |
|
|
.IP "\fB\-mprioritize\-restricted\-insns=\fR\fIpriority\fR" 4
|
16695 |
|
|
.IX Item "-mprioritize-restricted-insns=priority"
|
16696 |
|
|
This option controls the priority that is assigned to
|
16697 |
|
|
dispatch-slot restricted instructions during the second scheduling
|
16698 |
|
|
pass. The argument \fIpriority\fR takes the value \fB0\fR, \fB1\fR,
|
16699 |
|
|
or \fB2\fR to assign no, highest, or second-highest (respectively)
|
16700 |
|
|
priority to dispatch-slot restricted
|
16701 |
|
|
instructions.
|
16702 |
|
|
.IP "\fB\-msched\-costly\-dep=\fR\fIdependence_type\fR" 4
|
16703 |
|
|
.IX Item "-msched-costly-dep=dependence_type"
|
16704 |
|
|
This option controls which dependences are considered costly
|
16705 |
|
|
by the target during instruction scheduling. The argument
|
16706 |
|
|
\&\fIdependence_type\fR takes one of the following values:
|
16707 |
|
|
.RS 4
|
16708 |
|
|
.IP "\fBno\fR" 4
|
16709 |
|
|
.IX Item "no"
|
16710 |
|
|
No dependence is costly.
|
16711 |
|
|
.IP "\fBall\fR" 4
|
16712 |
|
|
.IX Item "all"
|
16713 |
|
|
All dependences are costly.
|
16714 |
|
|
.IP "\fBtrue_store_to_load\fR" 4
|
16715 |
|
|
.IX Item "true_store_to_load"
|
16716 |
|
|
A true dependence from store to load is costly.
|
16717 |
|
|
.IP "\fBstore_to_load\fR" 4
|
16718 |
|
|
.IX Item "store_to_load"
|
16719 |
|
|
Any dependence from store to load is costly.
|
16720 |
|
|
.IP "\fInumber\fR" 4
|
16721 |
|
|
.IX Item "number"
|
16722 |
|
|
Any dependence for which the latency is greater than or equal to
|
16723 |
|
|
\&\fInumber\fR is costly.
|
16724 |
|
|
.RE
|
16725 |
|
|
.RS 4
|
16726 |
|
|
.RE
|
16727 |
|
|
.IP "\fB\-minsert\-sched\-nops=\fR\fIscheme\fR" 4
|
16728 |
|
|
.IX Item "-minsert-sched-nops=scheme"
|
16729 |
|
|
This option controls which \s-1NOP\s0 insertion scheme is used during
|
16730 |
|
|
the second scheduling pass. The argument \fIscheme\fR takes one of the
|
16731 |
|
|
following values:
|
16732 |
|
|
.RS 4
|
16733 |
|
|
.IP "\fBno\fR" 4
|
16734 |
|
|
.IX Item "no"
|
16735 |
|
|
Don't insert NOPs.
|
16736 |
|
|
.IP "\fBpad\fR" 4
|
16737 |
|
|
.IX Item "pad"
|
16738 |
|
|
Pad with NOPs any dispatch group that has vacant issue slots,
|
16739 |
|
|
according to the scheduler's grouping.
|
16740 |
|
|
.IP "\fBregroup_exact\fR" 4
|
16741 |
|
|
.IX Item "regroup_exact"
|
16742 |
|
|
Insert NOPs to force costly dependent insns into
|
16743 |
|
|
separate groups. Insert exactly as many NOPs as needed to force an insn
|
16744 |
|
|
to a new group, according to the estimated processor grouping.
|
16745 |
|
|
.IP "\fInumber\fR" 4
|
16746 |
|
|
.IX Item "number"
|
16747 |
|
|
Insert NOPs to force costly dependent insns into
|
16748 |
|
|
separate groups. Insert \fInumber\fR NOPs to force an insn to a new group.
|
16749 |
|
|
.RE
|
16750 |
|
|
.RS 4
|
16751 |
|
|
.RE
|
16752 |
|
|
.IP "\fB\-mcall\-sysv\fR" 4
|
16753 |
|
|
.IX Item "-mcall-sysv"
|
16754 |
|
|
On System V.4 and embedded PowerPC systems compile code using calling
|
16755 |
|
|
conventions that adhere to the March 1995 draft of the System V
|
16756 |
|
|
Application Binary Interface, PowerPC processor supplement. This is the
|
16757 |
|
|
default unless you configured \s-1GCC\s0 using \fBpowerpc\-*\-eabiaix\fR.
|
16758 |
|
|
.IP "\fB\-mcall\-sysv\-eabi\fR" 4
|
16759 |
|
|
.IX Item "-mcall-sysv-eabi"
|
16760 |
|
|
.PD 0
|
16761 |
|
|
.IP "\fB\-mcall\-eabi\fR" 4
|
16762 |
|
|
.IX Item "-mcall-eabi"
|
16763 |
|
|
.PD
|
16764 |
|
|
Specify both \fB\-mcall\-sysv\fR and \fB\-meabi\fR options.
|
16765 |
|
|
.IP "\fB\-mcall\-sysv\-noeabi\fR" 4
|
16766 |
|
|
.IX Item "-mcall-sysv-noeabi"
|
16767 |
|
|
Specify both \fB\-mcall\-sysv\fR and \fB\-mno\-eabi\fR options.
|
16768 |
|
|
.IP "\fB\-mcall\-aixdesc\fR" 4
|
16769 |
|
|
.IX Item "-mcall-aixdesc"
|
16770 |
|
|
On System V.4 and embedded PowerPC systems compile code for the \s-1AIX\s0
|
16771 |
|
|
operating system.
|
16772 |
|
|
.IP "\fB\-mcall\-linux\fR" 4
|
16773 |
|
|
.IX Item "-mcall-linux"
|
16774 |
|
|
On System V.4 and embedded PowerPC systems compile code for the
|
16775 |
|
|
Linux-based \s-1GNU\s0 system.
|
16776 |
|
|
.IP "\fB\-mcall\-freebsd\fR" 4
|
16777 |
|
|
.IX Item "-mcall-freebsd"
|
16778 |
|
|
On System V.4 and embedded PowerPC systems compile code for the
|
16779 |
|
|
FreeBSD operating system.
|
16780 |
|
|
.IP "\fB\-mcall\-netbsd\fR" 4
|
16781 |
|
|
.IX Item "-mcall-netbsd"
|
16782 |
|
|
On System V.4 and embedded PowerPC systems compile code for the
|
16783 |
|
|
NetBSD operating system.
|
16784 |
|
|
.IP "\fB\-mcall\-openbsd\fR" 4
|
16785 |
|
|
.IX Item "-mcall-openbsd"
|
16786 |
|
|
On System V.4 and embedded PowerPC systems compile code for the
|
16787 |
|
|
OpenBSD operating system.
|
16788 |
|
|
.IP "\fB\-maix\-struct\-return\fR" 4
|
16789 |
|
|
.IX Item "-maix-struct-return"
|
16790 |
|
|
Return all structures in memory (as specified by the \s-1AIX\s0 \s-1ABI\s0).
|
16791 |
|
|
.IP "\fB\-msvr4\-struct\-return\fR" 4
|
16792 |
|
|
.IX Item "-msvr4-struct-return"
|
16793 |
|
|
Return structures smaller than 8 bytes in registers (as specified by the
|
16794 |
|
|
\&\s-1SVR4\s0 \s-1ABI\s0).
|
16795 |
|
|
.IP "\fB\-mabi=\fR\fIabi-type\fR" 4
|
16796 |
|
|
.IX Item "-mabi=abi-type"
|
16797 |
|
|
Extend the current \s-1ABI\s0 with a particular extension, or remove such extension.
|
16798 |
|
|
Valid values are \fIaltivec\fR, \fIno-altivec\fR, \fIspe\fR,
|
16799 |
|
|
\&\fIno-spe\fR, \fIibmlongdouble\fR, \fIieeelongdouble\fR.
|
16800 |
|
|
.IP "\fB\-mabi=spe\fR" 4
|
16801 |
|
|
.IX Item "-mabi=spe"
|
16802 |
|
|
Extend the current \s-1ABI\s0 with \s-1SPE\s0 \s-1ABI\s0 extensions. This does not change
|
16803 |
|
|
the default \s-1ABI\s0, instead it adds the \s-1SPE\s0 \s-1ABI\s0 extensions to the current
|
16804 |
|
|
\&\s-1ABI\s0.
|
16805 |
|
|
.IP "\fB\-mabi=no\-spe\fR" 4
|
16806 |
|
|
.IX Item "-mabi=no-spe"
|
16807 |
|
|
Disable Book-E \s-1SPE\s0 \s-1ABI\s0 extensions for the current \s-1ABI\s0.
|
16808 |
|
|
.IP "\fB\-mabi=ibmlongdouble\fR" 4
|
16809 |
|
|
.IX Item "-mabi=ibmlongdouble"
|
16810 |
|
|
Change the current \s-1ABI\s0 to use \s-1IBM\s0 extended-precision long double.
|
16811 |
|
|
This is a PowerPC 32\-bit \s-1SYSV\s0 \s-1ABI\s0 option.
|
16812 |
|
|
.IP "\fB\-mabi=ieeelongdouble\fR" 4
|
16813 |
|
|
.IX Item "-mabi=ieeelongdouble"
|
16814 |
|
|
Change the current \s-1ABI\s0 to use \s-1IEEE\s0 extended-precision long double.
|
16815 |
|
|
This is a PowerPC 32\-bit Linux \s-1ABI\s0 option.
|
16816 |
|
|
.IP "\fB\-mprototype\fR" 4
|
16817 |
|
|
.IX Item "-mprototype"
|
16818 |
|
|
.PD 0
|
16819 |
|
|
.IP "\fB\-mno\-prototype\fR" 4
|
16820 |
|
|
.IX Item "-mno-prototype"
|
16821 |
|
|
.PD
|
16822 |
|
|
On System V.4 and embedded PowerPC systems assume that all calls to
|
16823 |
|
|
variable argument functions are properly prototyped. Otherwise, the
|
16824 |
|
|
compiler must insert an instruction before every non-prototyped call to
|
16825 |
|
|
set or clear bit 6 of the condition code register (\fI\s-1CR\s0\fR) to
|
16826 |
|
|
indicate whether floating-point values are passed in the floating-point
|
16827 |
|
|
registers in case the function takes variable arguments. With
|
16828 |
|
|
\&\fB\-mprototype\fR, only calls to prototyped variable argument functions
|
16829 |
|
|
set or clear the bit.
|
16830 |
|
|
.IP "\fB\-msim\fR" 4
|
16831 |
|
|
.IX Item "-msim"
|
16832 |
|
|
On embedded PowerPC systems, assume that the startup module is called
|
16833 |
|
|
\&\fIsim\-crt0.o\fR and that the standard C libraries are \fIlibsim.a\fR and
|
16834 |
|
|
\&\fIlibc.a\fR. This is the default for \fBpowerpc\-*\-eabisim\fR
|
16835 |
|
|
configurations.
|
16836 |
|
|
.IP "\fB\-mmvme\fR" 4
|
16837 |
|
|
.IX Item "-mmvme"
|
16838 |
|
|
On embedded PowerPC systems, assume that the startup module is called
|
16839 |
|
|
\&\fIcrt0.o\fR and the standard C libraries are \fIlibmvme.a\fR and
|
16840 |
|
|
\&\fIlibc.a\fR.
|
16841 |
|
|
.IP "\fB\-mads\fR" 4
|
16842 |
|
|
.IX Item "-mads"
|
16843 |
|
|
On embedded PowerPC systems, assume that the startup module is called
|
16844 |
|
|
\&\fIcrt0.o\fR and the standard C libraries are \fIlibads.a\fR and
|
16845 |
|
|
\&\fIlibc.a\fR.
|
16846 |
|
|
.IP "\fB\-myellowknife\fR" 4
|
16847 |
|
|
.IX Item "-myellowknife"
|
16848 |
|
|
On embedded PowerPC systems, assume that the startup module is called
|
16849 |
|
|
\&\fIcrt0.o\fR and the standard C libraries are \fIlibyk.a\fR and
|
16850 |
|
|
\&\fIlibc.a\fR.
|
16851 |
|
|
.IP "\fB\-mvxworks\fR" 4
|
16852 |
|
|
.IX Item "-mvxworks"
|
16853 |
|
|
On System V.4 and embedded PowerPC systems, specify that you are
|
16854 |
|
|
compiling for a VxWorks system.
|
16855 |
|
|
.IP "\fB\-memb\fR" 4
|
16856 |
|
|
.IX Item "-memb"
|
16857 |
|
|
On embedded PowerPC systems, set the \fI\s-1PPC_EMB\s0\fR bit in the \s-1ELF\s0 flags
|
16858 |
|
|
header to indicate that \fBeabi\fR extended relocations are used.
|
16859 |
|
|
.IP "\fB\-meabi\fR" 4
|
16860 |
|
|
.IX Item "-meabi"
|
16861 |
|
|
.PD 0
|
16862 |
|
|
.IP "\fB\-mno\-eabi\fR" 4
|
16863 |
|
|
.IX Item "-mno-eabi"
|
16864 |
|
|
.PD
|
16865 |
|
|
On System V.4 and embedded PowerPC systems do (do not) adhere to the
|
16866 |
|
|
Embedded Applications Binary Interface (\s-1EABI\s0), which is a set of
|
16867 |
|
|
modifications to the System V.4 specifications. Selecting \fB\-meabi\fR
|
16868 |
|
|
means that the stack is aligned to an 8\-byte boundary, a function
|
16869 |
|
|
\&\f(CW\*(C`_\|_eabi\*(C'\fR is called from \f(CW\*(C`main\*(C'\fR to set up the \s-1EABI\s0
|
16870 |
|
|
environment, and the \fB\-msdata\fR option can use both \f(CW\*(C`r2\*(C'\fR and
|
16871 |
|
|
\&\f(CW\*(C`r13\*(C'\fR to point to two separate small data areas. Selecting
|
16872 |
|
|
\&\fB\-mno\-eabi\fR means that the stack is aligned to a 16\-byte boundary,
|
16873 |
|
|
no \s-1EABI\s0 initialization function is called from \f(CW\*(C`main\*(C'\fR, and the
|
16874 |
|
|
\&\fB\-msdata\fR option only uses \f(CW\*(C`r13\*(C'\fR to point to a single
|
16875 |
|
|
small data area. The \fB\-meabi\fR option is on by default if you
|
16876 |
|
|
configured \s-1GCC\s0 using one of the \fBpowerpc*\-*\-eabi*\fR options.
|
16877 |
|
|
.IP "\fB\-msdata=eabi\fR" 4
|
16878 |
|
|
.IX Item "-msdata=eabi"
|
16879 |
|
|
On System V.4 and embedded PowerPC systems, put small initialized
|
16880 |
|
|
\&\f(CW\*(C`const\*(C'\fR global and static data in the \fB.sdata2\fR section, which
|
16881 |
|
|
is pointed to by register \f(CW\*(C`r2\*(C'\fR. Put small initialized
|
16882 |
|
|
non\-\f(CW\*(C`const\*(C'\fR global and static data in the \fB.sdata\fR section,
|
16883 |
|
|
which is pointed to by register \f(CW\*(C`r13\*(C'\fR. Put small uninitialized
|
16884 |
|
|
global and static data in the \fB.sbss\fR section, which is adjacent to
|
16885 |
|
|
the \fB.sdata\fR section. The \fB\-msdata=eabi\fR option is
|
16886 |
|
|
incompatible with the \fB\-mrelocatable\fR option. The
|
16887 |
|
|
\&\fB\-msdata=eabi\fR option also sets the \fB\-memb\fR option.
|
16888 |
|
|
.IP "\fB\-msdata=sysv\fR" 4
|
16889 |
|
|
.IX Item "-msdata=sysv"
|
16890 |
|
|
On System V.4 and embedded PowerPC systems, put small global and static
|
16891 |
|
|
data in the \fB.sdata\fR section, which is pointed to by register
|
16892 |
|
|
\&\f(CW\*(C`r13\*(C'\fR. Put small uninitialized global and static data in the
|
16893 |
|
|
\&\fB.sbss\fR section, which is adjacent to the \fB.sdata\fR section.
|
16894 |
|
|
The \fB\-msdata=sysv\fR option is incompatible with the
|
16895 |
|
|
\&\fB\-mrelocatable\fR option.
|
16896 |
|
|
.IP "\fB\-msdata=default\fR" 4
|
16897 |
|
|
.IX Item "-msdata=default"
|
16898 |
|
|
.PD 0
|
16899 |
|
|
.IP "\fB\-msdata\fR" 4
|
16900 |
|
|
.IX Item "-msdata"
|
16901 |
|
|
.PD
|
16902 |
|
|
On System V.4 and embedded PowerPC systems, if \fB\-meabi\fR is used,
|
16903 |
|
|
compile code the same as \fB\-msdata=eabi\fR, otherwise compile code the
|
16904 |
|
|
same as \fB\-msdata=sysv\fR.
|
16905 |
|
|
.IP "\fB\-msdata=data\fR" 4
|
16906 |
|
|
.IX Item "-msdata=data"
|
16907 |
|
|
On System V.4 and embedded PowerPC systems, put small global
|
16908 |
|
|
data in the \fB.sdata\fR section. Put small uninitialized global
|
16909 |
|
|
data in the \fB.sbss\fR section. Do not use register \f(CW\*(C`r13\*(C'\fR
|
16910 |
|
|
to address small data however. This is the default behavior unless
|
16911 |
|
|
other \fB\-msdata\fR options are used.
|
16912 |
|
|
.IP "\fB\-msdata=none\fR" 4
|
16913 |
|
|
.IX Item "-msdata=none"
|
16914 |
|
|
.PD 0
|
16915 |
|
|
.IP "\fB\-mno\-sdata\fR" 4
|
16916 |
|
|
.IX Item "-mno-sdata"
|
16917 |
|
|
.PD
|
16918 |
|
|
On embedded PowerPC systems, put all initialized global and static data
|
16919 |
|
|
in the \fB.data\fR section, and all uninitialized data in the
|
16920 |
|
|
\&\fB.bss\fR section.
|
16921 |
|
|
.IP "\fB\-mblock\-move\-inline\-limit=\fR\fInum\fR" 4
|
16922 |
|
|
.IX Item "-mblock-move-inline-limit=num"
|
16923 |
|
|
Inline all block moves (such as calls to \f(CW\*(C`memcpy\*(C'\fR or structure
|
16924 |
|
|
copies) less than or equal to \fInum\fR bytes. The minimum value for
|
16925 |
|
|
\&\fInum\fR is 32 bytes on 32\-bit targets and 64 bytes on 64\-bit
|
16926 |
|
|
targets. The default value is target-specific.
|
16927 |
|
|
.IP "\fB\-G\fR \fInum\fR" 4
|
16928 |
|
|
.IX Item "-G num"
|
16929 |
|
|
On embedded PowerPC systems, put global and static items less than or
|
16930 |
|
|
equal to \fInum\fR bytes into the small data or \s-1BSS\s0 sections instead of
|
16931 |
|
|
the normal data or \s-1BSS\s0 section. By default, \fInum\fR is 8. The
|
16932 |
|
|
\&\fB\-G\fR \fInum\fR switch is also passed to the linker.
|
16933 |
|
|
All modules should be compiled with the same \fB\-G\fR \fInum\fR value.
|
16934 |
|
|
.IP "\fB\-mregnames\fR" 4
|
16935 |
|
|
.IX Item "-mregnames"
|
16936 |
|
|
.PD 0
|
16937 |
|
|
.IP "\fB\-mno\-regnames\fR" 4
|
16938 |
|
|
.IX Item "-mno-regnames"
|
16939 |
|
|
.PD
|
16940 |
|
|
On System V.4 and embedded PowerPC systems do (do not) emit register
|
16941 |
|
|
names in the assembly language output using symbolic forms.
|
16942 |
|
|
.IP "\fB\-mlongcall\fR" 4
|
16943 |
|
|
.IX Item "-mlongcall"
|
16944 |
|
|
.PD 0
|
16945 |
|
|
.IP "\fB\-mno\-longcall\fR" 4
|
16946 |
|
|
.IX Item "-mno-longcall"
|
16947 |
|
|
.PD
|
16948 |
|
|
By default assume that all calls are far away so that a longer and more
|
16949 |
|
|
expensive calling sequence is required. This is required for calls
|
16950 |
|
|
farther than 32 megabytes (33,554,432 bytes) from the current location.
|
16951 |
|
|
A short call is generated if the compiler knows
|
16952 |
|
|
the call cannot be that far away. This setting can be overridden by
|
16953 |
|
|
the \f(CW\*(C`shortcall\*(C'\fR function attribute, or by \f(CW\*(C`#pragma
|
16954 |
|
|
longcall(0)\*(C'\fR.
|
16955 |
|
|
.Sp
|
16956 |
|
|
Some linkers are capable of detecting out-of-range calls and generating
|
16957 |
|
|
glue code on the fly. On these systems, long calls are unnecessary and
|
16958 |
|
|
generate slower code. As of this writing, the \s-1AIX\s0 linker can do this,
|
16959 |
|
|
as can the \s-1GNU\s0 linker for PowerPC/64. It is planned to add this feature
|
16960 |
|
|
to the \s-1GNU\s0 linker for 32\-bit PowerPC systems as well.
|
16961 |
|
|
.Sp
|
16962 |
|
|
On Darwin/PPC systems, \f(CW\*(C`#pragma longcall\*(C'\fR generates \f(CW\*(C`jbsr
|
16963 |
|
|
callee, L42\*(C'\fR, plus a \fIbranch island\fR (glue code). The two target
|
16964 |
|
|
addresses represent the callee and the branch island. The
|
16965 |
|
|
Darwin/PPC linker prefers the first address and generates a \f(CW\*(C`bl
|
16966 |
|
|
callee\*(C'\fR if the \s-1PPC\s0 \f(CW\*(C`bl\*(C'\fR instruction reaches the callee directly;
|
16967 |
|
|
otherwise, the linker generates \f(CW\*(C`bl L42\*(C'\fR to call the branch
|
16968 |
|
|
island. The branch island is appended to the body of the
|
16969 |
|
|
calling function; it computes the full 32\-bit address of the callee
|
16970 |
|
|
and jumps to it.
|
16971 |
|
|
.Sp
|
16972 |
|
|
On Mach-O (Darwin) systems, this option directs the compiler emit to
|
16973 |
|
|
the glue for every direct call, and the Darwin linker decides whether
|
16974 |
|
|
to use or discard it.
|
16975 |
|
|
.Sp
|
16976 |
|
|
In the future, \s-1GCC\s0 may ignore all longcall specifications
|
16977 |
|
|
when the linker is known to generate glue.
|
16978 |
|
|
.IP "\fB\-mtls\-markers\fR" 4
|
16979 |
|
|
.IX Item "-mtls-markers"
|
16980 |
|
|
.PD 0
|
16981 |
|
|
.IP "\fB\-mno\-tls\-markers\fR" 4
|
16982 |
|
|
.IX Item "-mno-tls-markers"
|
16983 |
|
|
.PD
|
16984 |
|
|
Mark (do not mark) calls to \f(CW\*(C`_\|_tls_get_addr\*(C'\fR with a relocation
|
16985 |
|
|
specifying the function argument. The relocation allows the linker to
|
16986 |
|
|
reliably associate function call with argument setup instructions for
|
16987 |
|
|
\&\s-1TLS\s0 optimization, which in turn allows \s-1GCC\s0 to better schedule the
|
16988 |
|
|
sequence.
|
16989 |
|
|
.IP "\fB\-pthread\fR" 4
|
16990 |
|
|
.IX Item "-pthread"
|
16991 |
|
|
Adds support for multithreading with the \fIpthreads\fR library.
|
16992 |
|
|
This option sets flags for both the preprocessor and linker.
|
16993 |
|
|
.IP "\fB\-mrecip\fR" 4
|
16994 |
|
|
.IX Item "-mrecip"
|
16995 |
|
|
.PD 0
|
16996 |
|
|
.IP "\fB\-mno\-recip\fR" 4
|
16997 |
|
|
.IX Item "-mno-recip"
|
16998 |
|
|
.PD
|
16999 |
|
|
This option enables use of the reciprocal estimate and
|
17000 |
|
|
reciprocal square root estimate instructions with additional
|
17001 |
|
|
Newton-Raphson steps to increase precision instead of doing a divide or
|
17002 |
|
|
square root and divide for floating-point arguments. You should use
|
17003 |
|
|
the \fB\-ffast\-math\fR option when using \fB\-mrecip\fR (or at
|
17004 |
|
|
least \fB\-funsafe\-math\-optimizations\fR,
|
17005 |
|
|
\&\fB\-finite\-math\-only\fR, \fB\-freciprocal\-math\fR and
|
17006 |
|
|
\&\fB\-fno\-trapping\-math\fR). Note that while the throughput of the
|
17007 |
|
|
sequence is generally higher than the throughput of the non-reciprocal
|
17008 |
|
|
instruction, the precision of the sequence can be decreased by up to 2
|
17009 |
|
|
ulp (i.e. the inverse of 1.0 equals 0.99999994) for reciprocal square
|
17010 |
|
|
roots.
|
17011 |
|
|
.IP "\fB\-mrecip=\fR\fIopt\fR" 4
|
17012 |
|
|
.IX Item "-mrecip=opt"
|
17013 |
|
|
This option controls which reciprocal estimate instructions
|
17014 |
|
|
may be used. \fIopt\fR is a comma-separated list of options, which may
|
17015 |
|
|
be preceded by a \f(CW\*(C`!\*(C'\fR to invert the option:
|
17016 |
|
|
\&\f(CW\*(C`all\*(C'\fR: enable all estimate instructions,
|
17017 |
|
|
\&\f(CW\*(C`default\*(C'\fR: enable the default instructions, equivalent to \fB\-mrecip\fR,
|
17018 |
|
|
\&\f(CW\*(C`none\*(C'\fR: disable all estimate instructions, equivalent to \fB\-mno\-recip\fR;
|
17019 |
|
|
\&\f(CW\*(C`div\*(C'\fR: enable the reciprocal approximation instructions for both single and double precision;
|
17020 |
|
|
\&\f(CW\*(C`divf\*(C'\fR: enable the single-precision reciprocal approximation instructions;
|
17021 |
|
|
\&\f(CW\*(C`divd\*(C'\fR: enable the double-precision reciprocal approximation instructions;
|
17022 |
|
|
\&\f(CW\*(C`rsqrt\*(C'\fR: enable the reciprocal square root approximation instructions for both single and double precision;
|
17023 |
|
|
\&\f(CW\*(C`rsqrtf\*(C'\fR: enable the single-precision reciprocal square root approximation instructions;
|
17024 |
|
|
\&\f(CW\*(C`rsqrtd\*(C'\fR: enable the double-precision reciprocal square root approximation instructions;
|
17025 |
|
|
.Sp
|
17026 |
|
|
So, for example, \fB\-mrecip=all,!rsqrtd\fR enables
|
17027 |
|
|
all of the reciprocal estimate instructions, except for the
|
17028 |
|
|
\&\f(CW\*(C`FRSQRTE\*(C'\fR, \f(CW\*(C`XSRSQRTEDP\*(C'\fR, and \f(CW\*(C`XVRSQRTEDP\*(C'\fR instructions
|
17029 |
|
|
which handle the double-precision reciprocal square root calculations.
|
17030 |
|
|
.IP "\fB\-mrecip\-precision\fR" 4
|
17031 |
|
|
.IX Item "-mrecip-precision"
|
17032 |
|
|
.PD 0
|
17033 |
|
|
.IP "\fB\-mno\-recip\-precision\fR" 4
|
17034 |
|
|
.IX Item "-mno-recip-precision"
|
17035 |
|
|
.PD
|
17036 |
|
|
Assume (do not assume) that the reciprocal estimate instructions
|
17037 |
|
|
provide higher-precision estimates than is mandated by the PowerPC
|
17038 |
|
|
\&\s-1ABI\s0. Selecting \fB\-mcpu=power6\fR, \fB\-mcpu=power7\fR or
|
17039 |
|
|
\&\fB\-mcpu=power8\fR automatically selects \fB\-mrecip\-precision\fR.
|
17040 |
|
|
The double-precision square root estimate instructions are not generated by
|
17041 |
|
|
default on low-precision machines, since they do not provide an
|
17042 |
|
|
estimate that converges after three steps.
|
17043 |
|
|
.IP "\fB\-mveclibabi=\fR\fItype\fR" 4
|
17044 |
|
|
.IX Item "-mveclibabi=type"
|
17045 |
|
|
Specifies the \s-1ABI\s0 type to use for vectorizing intrinsics using an
|
17046 |
|
|
external library. The only type supported at present is \f(CW\*(C`mass\*(C'\fR,
|
17047 |
|
|
which specifies to use \s-1IBM\s0's Mathematical Acceleration Subsystem
|
17048 |
|
|
(\s-1MASS\s0) libraries for vectorizing intrinsics using external libraries.
|
17049 |
|
|
\&\s-1GCC\s0 currently emits calls to \f(CW\*(C`acosd2\*(C'\fR, \f(CW\*(C`acosf4\*(C'\fR,
|
17050 |
|
|
\&\f(CW\*(C`acoshd2\*(C'\fR, \f(CW\*(C`acoshf4\*(C'\fR, \f(CW\*(C`asind2\*(C'\fR, \f(CW\*(C`asinf4\*(C'\fR,
|
17051 |
|
|
\&\f(CW\*(C`asinhd2\*(C'\fR, \f(CW\*(C`asinhf4\*(C'\fR, \f(CW\*(C`atan2d2\*(C'\fR, \f(CW\*(C`atan2f4\*(C'\fR,
|
17052 |
|
|
\&\f(CW\*(C`atand2\*(C'\fR, \f(CW\*(C`atanf4\*(C'\fR, \f(CW\*(C`atanhd2\*(C'\fR, \f(CW\*(C`atanhf4\*(C'\fR,
|
17053 |
|
|
\&\f(CW\*(C`cbrtd2\*(C'\fR, \f(CW\*(C`cbrtf4\*(C'\fR, \f(CW\*(C`cosd2\*(C'\fR, \f(CW\*(C`cosf4\*(C'\fR,
|
17054 |
|
|
\&\f(CW\*(C`coshd2\*(C'\fR, \f(CW\*(C`coshf4\*(C'\fR, \f(CW\*(C`erfcd2\*(C'\fR, \f(CW\*(C`erfcf4\*(C'\fR,
|
17055 |
|
|
\&\f(CW\*(C`erfd2\*(C'\fR, \f(CW\*(C`erff4\*(C'\fR, \f(CW\*(C`exp2d2\*(C'\fR, \f(CW\*(C`exp2f4\*(C'\fR,
|
17056 |
|
|
\&\f(CW\*(C`expd2\*(C'\fR, \f(CW\*(C`expf4\*(C'\fR, \f(CW\*(C`expm1d2\*(C'\fR, \f(CW\*(C`expm1f4\*(C'\fR,
|
17057 |
|
|
\&\f(CW\*(C`hypotd2\*(C'\fR, \f(CW\*(C`hypotf4\*(C'\fR, \f(CW\*(C`lgammad2\*(C'\fR, \f(CW\*(C`lgammaf4\*(C'\fR,
|
17058 |
|
|
\&\f(CW\*(C`log10d2\*(C'\fR, \f(CW\*(C`log10f4\*(C'\fR, \f(CW\*(C`log1pd2\*(C'\fR, \f(CW\*(C`log1pf4\*(C'\fR,
|
17059 |
|
|
\&\f(CW\*(C`log2d2\*(C'\fR, \f(CW\*(C`log2f4\*(C'\fR, \f(CW\*(C`logd2\*(C'\fR, \f(CW\*(C`logf4\*(C'\fR,
|
17060 |
|
|
\&\f(CW\*(C`powd2\*(C'\fR, \f(CW\*(C`powf4\*(C'\fR, \f(CW\*(C`sind2\*(C'\fR, \f(CW\*(C`sinf4\*(C'\fR, \f(CW\*(C`sinhd2\*(C'\fR,
|
17061 |
|
|
\&\f(CW\*(C`sinhf4\*(C'\fR, \f(CW\*(C`sqrtd2\*(C'\fR, \f(CW\*(C`sqrtf4\*(C'\fR, \f(CW\*(C`tand2\*(C'\fR,
|
17062 |
|
|
\&\f(CW\*(C`tanf4\*(C'\fR, \f(CW\*(C`tanhd2\*(C'\fR, and \f(CW\*(C`tanhf4\*(C'\fR when generating code
|
17063 |
|
|
for power7. Both \fB\-ftree\-vectorize\fR and
|
17064 |
|
|
\&\fB\-funsafe\-math\-optimizations\fR must also be enabled. The \s-1MASS\s0
|
17065 |
|
|
libraries must be specified at link time.
|
17066 |
|
|
.IP "\fB\-mfriz\fR" 4
|
17067 |
|
|
.IX Item "-mfriz"
|
17068 |
|
|
.PD 0
|
17069 |
|
|
.IP "\fB\-mno\-friz\fR" 4
|
17070 |
|
|
.IX Item "-mno-friz"
|
17071 |
|
|
.PD
|
17072 |
|
|
Generate (do not generate) the \f(CW\*(C`friz\*(C'\fR instruction when the
|
17073 |
|
|
\&\fB\-funsafe\-math\-optimizations\fR option is used to optimize
|
17074 |
|
|
rounding of floating-point values to 64\-bit integer and back to floating
|
17075 |
|
|
point. The \f(CW\*(C`friz\*(C'\fR instruction does not return the same value if
|
17076 |
|
|
the floating-point number is too large to fit in an integer.
|
17077 |
|
|
.IP "\fB\-mpointers\-to\-nested\-functions\fR" 4
|
17078 |
|
|
.IX Item "-mpointers-to-nested-functions"
|
17079 |
|
|
.PD 0
|
17080 |
|
|
.IP "\fB\-mno\-pointers\-to\-nested\-functions\fR" 4
|
17081 |
|
|
.IX Item "-mno-pointers-to-nested-functions"
|
17082 |
|
|
.PD
|
17083 |
|
|
Generate (do not generate) code to load up the static chain register
|
17084 |
|
|
(\fIr11\fR) when calling through a pointer on \s-1AIX\s0 and 64\-bit Linux
|
17085 |
|
|
systems where a function pointer points to a 3\-word descriptor giving
|
17086 |
|
|
the function address, \s-1TOC\s0 value to be loaded in register \fIr2\fR, and
|
17087 |
|
|
static chain value to be loaded in register \fIr11\fR. The
|
17088 |
|
|
\&\fB\-mpointers\-to\-nested\-functions\fR is on by default. You cannot
|
17089 |
|
|
call through pointers to nested functions or pointers
|
17090 |
|
|
to functions compiled in other languages that use the static chain if
|
17091 |
|
|
you use the \fB\-mno\-pointers\-to\-nested\-functions\fR.
|
17092 |
|
|
.IP "\fB\-msave\-toc\-indirect\fR" 4
|
17093 |
|
|
.IX Item "-msave-toc-indirect"
|
17094 |
|
|
.PD 0
|
17095 |
|
|
.IP "\fB\-mno\-save\-toc\-indirect\fR" 4
|
17096 |
|
|
.IX Item "-mno-save-toc-indirect"
|
17097 |
|
|
.PD
|
17098 |
|
|
Generate (do not generate) code to save the \s-1TOC\s0 value in the reserved
|
17099 |
|
|
stack location in the function prologue if the function calls through
|
17100 |
|
|
a pointer on \s-1AIX\s0 and 64\-bit Linux systems. If the \s-1TOC\s0 value is not
|
17101 |
|
|
saved in the prologue, it is saved just before the call through the
|
17102 |
|
|
pointer. The \fB\-mno\-save\-toc\-indirect\fR option is the default.
|
17103 |
|
|
.PP
|
17104 |
|
|
\fI\s-1RX\s0 Options\fR
|
17105 |
|
|
.IX Subsection "RX Options"
|
17106 |
|
|
.PP
|
17107 |
|
|
These command-line options are defined for \s-1RX\s0 targets:
|
17108 |
|
|
.IP "\fB\-m64bit\-doubles\fR" 4
|
17109 |
|
|
.IX Item "-m64bit-doubles"
|
17110 |
|
|
.PD 0
|
17111 |
|
|
.IP "\fB\-m32bit\-doubles\fR" 4
|
17112 |
|
|
.IX Item "-m32bit-doubles"
|
17113 |
|
|
.PD
|
17114 |
|
|
Make the \f(CW\*(C`double\*(C'\fR data type be 64 bits (\fB\-m64bit\-doubles\fR)
|
17115 |
|
|
or 32 bits (\fB\-m32bit\-doubles\fR) in size. The default is
|
17116 |
|
|
\&\fB\-m32bit\-doubles\fR. \fINote\fR \s-1RX\s0 floating-point hardware only
|
17117 |
|
|
works on 32\-bit values, which is why the default is
|
17118 |
|
|
\&\fB\-m32bit\-doubles\fR.
|
17119 |
|
|
.IP "\fB\-fpu\fR" 4
|
17120 |
|
|
.IX Item "-fpu"
|
17121 |
|
|
.PD 0
|
17122 |
|
|
.IP "\fB\-nofpu\fR" 4
|
17123 |
|
|
.IX Item "-nofpu"
|
17124 |
|
|
.PD
|
17125 |
|
|
Enables (\fB\-fpu\fR) or disables (\fB\-nofpu\fR) the use of \s-1RX\s0
|
17126 |
|
|
floating-point hardware. The default is enabled for the \fI\s-1RX600\s0\fR
|
17127 |
|
|
series and disabled for the \fI\s-1RX200\s0\fR series.
|
17128 |
|
|
.Sp
|
17129 |
|
|
Floating-point instructions are only generated for 32\-bit floating-point
|
17130 |
|
|
values, however, so the \s-1FPU\s0 hardware is not used for doubles if the
|
17131 |
|
|
\&\fB\-m64bit\-doubles\fR option is used.
|
17132 |
|
|
.Sp
|
17133 |
|
|
\&\fINote\fR If the \fB\-fpu\fR option is enabled then
|
17134 |
|
|
\&\fB\-funsafe\-math\-optimizations\fR is also enabled automatically.
|
17135 |
|
|
This is because the \s-1RX\s0 \s-1FPU\s0 instructions are themselves unsafe.
|
17136 |
|
|
.IP "\fB\-mcpu=\fR\fIname\fR" 4
|
17137 |
|
|
.IX Item "-mcpu=name"
|
17138 |
|
|
Selects the type of \s-1RX\s0 \s-1CPU\s0 to be targeted. Currently three types are
|
17139 |
|
|
supported, the generic \fI\s-1RX600\s0\fR and \fI\s-1RX200\s0\fR series hardware and
|
17140 |
|
|
the specific \fI\s-1RX610\s0\fR \s-1CPU\s0. The default is \fI\s-1RX600\s0\fR.
|
17141 |
|
|
.Sp
|
17142 |
|
|
The only difference between \fI\s-1RX600\s0\fR and \fI\s-1RX610\s0\fR is that the
|
17143 |
|
|
\&\fI\s-1RX610\s0\fR does not support the \f(CW\*(C`MVTIPL\*(C'\fR instruction.
|
17144 |
|
|
.Sp
|
17145 |
|
|
The \fI\s-1RX200\s0\fR series does not have a hardware floating-point unit
|
17146 |
|
|
and so \fB\-nofpu\fR is enabled by default when this type is
|
17147 |
|
|
selected.
|
17148 |
|
|
.IP "\fB\-mbig\-endian\-data\fR" 4
|
17149 |
|
|
.IX Item "-mbig-endian-data"
|
17150 |
|
|
.PD 0
|
17151 |
|
|
.IP "\fB\-mlittle\-endian\-data\fR" 4
|
17152 |
|
|
.IX Item "-mlittle-endian-data"
|
17153 |
|
|
.PD
|
17154 |
|
|
Store data (but not code) in the big-endian format. The default is
|
17155 |
|
|
\&\fB\-mlittle\-endian\-data\fR, i.e. to store data in the little-endian
|
17156 |
|
|
format.
|
17157 |
|
|
.IP "\fB\-msmall\-data\-limit=\fR\fIN\fR" 4
|
17158 |
|
|
.IX Item "-msmall-data-limit=N"
|
17159 |
|
|
Specifies the maximum size in bytes of global and static variables
|
17160 |
|
|
which can be placed into the small data area. Using the small data
|
17161 |
|
|
area can lead to smaller and faster code, but the size of area is
|
17162 |
|
|
limited and it is up to the programmer to ensure that the area does
|
17163 |
|
|
not overflow. Also when the small data area is used one of the \s-1RX\s0's
|
17164 |
|
|
registers (usually \f(CW\*(C`r13\*(C'\fR) is reserved for use pointing to this
|
17165 |
|
|
area, so it is no longer available for use by the compiler. This
|
17166 |
|
|
could result in slower and/or larger code if variables are pushed onto
|
17167 |
|
|
the stack instead of being held in this register.
|
17168 |
|
|
.Sp
|
17169 |
|
|
Note, common variables (variables that have not been initialized) and
|
17170 |
|
|
constants are not placed into the small data area as they are assigned
|
17171 |
|
|
to other sections in the output executable.
|
17172 |
|
|
.Sp
|
17173 |
|
|
The default value is zero, which disables this feature. Note, this
|
17174 |
|
|
feature is not enabled by default with higher optimization levels
|
17175 |
|
|
(\fB\-O2\fR etc) because of the potentially detrimental effects of
|
17176 |
|
|
reserving a register. It is up to the programmer to experiment and
|
17177 |
|
|
discover whether this feature is of benefit to their program. See the
|
17178 |
|
|
description of the \fB\-mpid\fR option for a description of how the
|
17179 |
|
|
actual register to hold the small data area pointer is chosen.
|
17180 |
|
|
.IP "\fB\-msim\fR" 4
|
17181 |
|
|
.IX Item "-msim"
|
17182 |
|
|
.PD 0
|
17183 |
|
|
.IP "\fB\-mno\-sim\fR" 4
|
17184 |
|
|
.IX Item "-mno-sim"
|
17185 |
|
|
.PD
|
17186 |
|
|
Use the simulator runtime. The default is to use the libgloss
|
17187 |
|
|
board-specific runtime.
|
17188 |
|
|
.IP "\fB\-mas100\-syntax\fR" 4
|
17189 |
|
|
.IX Item "-mas100-syntax"
|
17190 |
|
|
.PD 0
|
17191 |
|
|
.IP "\fB\-mno\-as100\-syntax\fR" 4
|
17192 |
|
|
.IX Item "-mno-as100-syntax"
|
17193 |
|
|
.PD
|
17194 |
|
|
When generating assembler output use a syntax that is compatible with
|
17195 |
|
|
Renesas's \s-1AS100\s0 assembler. This syntax can also be handled by the \s-1GAS\s0
|
17196 |
|
|
assembler, but it has some restrictions so it is not generated by default.
|
17197 |
|
|
.IP "\fB\-mmax\-constant\-size=\fR\fIN\fR" 4
|
17198 |
|
|
.IX Item "-mmax-constant-size=N"
|
17199 |
|
|
Specifies the maximum size, in bytes, of a constant that can be used as
|
17200 |
|
|
an operand in a \s-1RX\s0 instruction. Although the \s-1RX\s0 instruction set does
|
17201 |
|
|
allow constants of up to 4 bytes in length to be used in instructions,
|
17202 |
|
|
a longer value equates to a longer instruction. Thus in some
|
17203 |
|
|
circumstances it can be beneficial to restrict the size of constants
|
17204 |
|
|
that are used in instructions. Constants that are too big are instead
|
17205 |
|
|
placed into a constant pool and referenced via register indirection.
|
17206 |
|
|
.Sp
|
17207 |
|
|
The value \fIN\fR can be between 0 and 4. A value of 0 (the default)
|
17208 |
|
|
or 4 means that constants of any size are allowed.
|
17209 |
|
|
.IP "\fB\-mrelax\fR" 4
|
17210 |
|
|
.IX Item "-mrelax"
|
17211 |
|
|
Enable linker relaxation. Linker relaxation is a process whereby the
|
17212 |
|
|
linker attempts to reduce the size of a program by finding shorter
|
17213 |
|
|
versions of various instructions. Disabled by default.
|
17214 |
|
|
.IP "\fB\-mint\-register=\fR\fIN\fR" 4
|
17215 |
|
|
.IX Item "-mint-register=N"
|
17216 |
|
|
Specify the number of registers to reserve for fast interrupt handler
|
17217 |
|
|
functions. The value \fIN\fR can be between 0 and 4. A value of 1
|
17218 |
|
|
means that register \f(CW\*(C`r13\*(C'\fR is reserved for the exclusive use
|
17219 |
|
|
of fast interrupt handlers. A value of 2 reserves \f(CW\*(C`r13\*(C'\fR and
|
17220 |
|
|
\&\f(CW\*(C`r12\*(C'\fR. A value of 3 reserves \f(CW\*(C`r13\*(C'\fR, \f(CW\*(C`r12\*(C'\fR and
|
17221 |
|
|
\&\f(CW\*(C`r11\*(C'\fR, and a value of 4 reserves \f(CW\*(C`r13\*(C'\fR through \f(CW\*(C`r10\*(C'\fR.
|
17222 |
|
|
A value of 0, the default, does not reserve any registers.
|
17223 |
|
|
.IP "\fB\-msave\-acc\-in\-interrupts\fR" 4
|
17224 |
|
|
.IX Item "-msave-acc-in-interrupts"
|
17225 |
|
|
Specifies that interrupt handler functions should preserve the
|
17226 |
|
|
accumulator register. This is only necessary if normal code might use
|
17227 |
|
|
the accumulator register, for example because it performs 64\-bit
|
17228 |
|
|
multiplications. The default is to ignore the accumulator as this
|
17229 |
|
|
makes the interrupt handlers faster.
|
17230 |
|
|
.IP "\fB\-mpid\fR" 4
|
17231 |
|
|
.IX Item "-mpid"
|
17232 |
|
|
.PD 0
|
17233 |
|
|
.IP "\fB\-mno\-pid\fR" 4
|
17234 |
|
|
.IX Item "-mno-pid"
|
17235 |
|
|
.PD
|
17236 |
|
|
Enables the generation of position independent data. When enabled any
|
17237 |
|
|
access to constant data is done via an offset from a base address
|
17238 |
|
|
held in a register. This allows the location of constant data to be
|
17239 |
|
|
determined at run time without requiring the executable to be
|
17240 |
|
|
relocated, which is a benefit to embedded applications with tight
|
17241 |
|
|
memory constraints. Data that can be modified is not affected by this
|
17242 |
|
|
option.
|
17243 |
|
|
.Sp
|
17244 |
|
|
Note, using this feature reserves a register, usually \f(CW\*(C`r13\*(C'\fR, for
|
17245 |
|
|
the constant data base address. This can result in slower and/or
|
17246 |
|
|
larger code, especially in complicated functions.
|
17247 |
|
|
.Sp
|
17248 |
|
|
The actual register chosen to hold the constant data base address
|
17249 |
|
|
depends upon whether the \fB\-msmall\-data\-limit\fR and/or the
|
17250 |
|
|
\&\fB\-mint\-register\fR command-line options are enabled. Starting
|
17251 |
|
|
with register \f(CW\*(C`r13\*(C'\fR and proceeding downwards, registers are
|
17252 |
|
|
allocated first to satisfy the requirements of \fB\-mint\-register\fR,
|
17253 |
|
|
then \fB\-mpid\fR and finally \fB\-msmall\-data\-limit\fR. Thus it
|
17254 |
|
|
is possible for the small data area register to be \f(CW\*(C`r8\*(C'\fR if both
|
17255 |
|
|
\&\fB\-mint\-register=4\fR and \fB\-mpid\fR are specified on the
|
17256 |
|
|
command line.
|
17257 |
|
|
.Sp
|
17258 |
|
|
By default this feature is not enabled. The default can be restored
|
17259 |
|
|
via the \fB\-mno\-pid\fR command-line option.
|
17260 |
|
|
.IP "\fB\-mno\-warn\-multiple\-fast\-interrupts\fR" 4
|
17261 |
|
|
.IX Item "-mno-warn-multiple-fast-interrupts"
|
17262 |
|
|
.PD 0
|
17263 |
|
|
.IP "\fB\-mwarn\-multiple\-fast\-interrupts\fR" 4
|
17264 |
|
|
.IX Item "-mwarn-multiple-fast-interrupts"
|
17265 |
|
|
.PD
|
17266 |
|
|
Prevents \s-1GCC\s0 from issuing a warning message if it finds more than one
|
17267 |
|
|
fast interrupt handler when it is compiling a file. The default is to
|
17268 |
|
|
issue a warning for each extra fast interrupt handler found, as the \s-1RX\s0
|
17269 |
|
|
only supports one such interrupt.
|
17270 |
|
|
.PP
|
17271 |
|
|
\&\fINote:\fR The generic \s-1GCC\s0 command-line option \fB\-ffixed\-\fR\fIreg\fR
|
17272 |
|
|
has special significance to the \s-1RX\s0 port when used with the
|
17273 |
|
|
\&\f(CW\*(C`interrupt\*(C'\fR function attribute. This attribute indicates a
|
17274 |
|
|
function intended to process fast interrupts. \s-1GCC\s0 ensures
|
17275 |
|
|
that it only uses the registers \f(CW\*(C`r10\*(C'\fR, \f(CW\*(C`r11\*(C'\fR, \f(CW\*(C`r12\*(C'\fR
|
17276 |
|
|
and/or \f(CW\*(C`r13\*(C'\fR and only provided that the normal use of the
|
17277 |
|
|
corresponding registers have been restricted via the
|
17278 |
|
|
\&\fB\-ffixed\-\fR\fIreg\fR or \fB\-mint\-register\fR command-line
|
17279 |
|
|
options.
|
17280 |
|
|
.PP
|
17281 |
|
|
\fIS/390 and zSeries Options\fR
|
17282 |
|
|
.IX Subsection "S/390 and zSeries Options"
|
17283 |
|
|
.PP
|
17284 |
|
|
These are the \fB\-m\fR options defined for the S/390 and zSeries architecture.
|
17285 |
|
|
.IP "\fB\-mhard\-float\fR" 4
|
17286 |
|
|
.IX Item "-mhard-float"
|
17287 |
|
|
.PD 0
|
17288 |
|
|
.IP "\fB\-msoft\-float\fR" 4
|
17289 |
|
|
.IX Item "-msoft-float"
|
17290 |
|
|
.PD
|
17291 |
|
|
Use (do not use) the hardware floating-point instructions and registers
|
17292 |
|
|
for floating-point operations. When \fB\-msoft\-float\fR is specified,
|
17293 |
|
|
functions in \fIlibgcc.a\fR are used to perform floating-point
|
17294 |
|
|
operations. When \fB\-mhard\-float\fR is specified, the compiler
|
17295 |
|
|
generates \s-1IEEE\s0 floating-point instructions. This is the default.
|
17296 |
|
|
.IP "\fB\-mhard\-dfp\fR" 4
|
17297 |
|
|
.IX Item "-mhard-dfp"
|
17298 |
|
|
.PD 0
|
17299 |
|
|
.IP "\fB\-mno\-hard\-dfp\fR" 4
|
17300 |
|
|
.IX Item "-mno-hard-dfp"
|
17301 |
|
|
.PD
|
17302 |
|
|
Use (do not use) the hardware decimal-floating-point instructions for
|
17303 |
|
|
decimal-floating-point operations. When \fB\-mno\-hard\-dfp\fR is
|
17304 |
|
|
specified, functions in \fIlibgcc.a\fR are used to perform
|
17305 |
|
|
decimal-floating-point operations. When \fB\-mhard\-dfp\fR is
|
17306 |
|
|
specified, the compiler generates decimal-floating-point hardware
|
17307 |
|
|
instructions. This is the default for \fB\-march=z9\-ec\fR or higher.
|
17308 |
|
|
.IP "\fB\-mlong\-double\-64\fR" 4
|
17309 |
|
|
.IX Item "-mlong-double-64"
|
17310 |
|
|
.PD 0
|
17311 |
|
|
.IP "\fB\-mlong\-double\-128\fR" 4
|
17312 |
|
|
.IX Item "-mlong-double-128"
|
17313 |
|
|
.PD
|
17314 |
|
|
These switches control the size of \f(CW\*(C`long double\*(C'\fR type. A size
|
17315 |
|
|
of 64 bits makes the \f(CW\*(C`long double\*(C'\fR type equivalent to the \f(CW\*(C`double\*(C'\fR
|
17316 |
|
|
type. This is the default.
|
17317 |
|
|
.IP "\fB\-mbackchain\fR" 4
|
17318 |
|
|
.IX Item "-mbackchain"
|
17319 |
|
|
.PD 0
|
17320 |
|
|
.IP "\fB\-mno\-backchain\fR" 4
|
17321 |
|
|
.IX Item "-mno-backchain"
|
17322 |
|
|
.PD
|
17323 |
|
|
Store (do not store) the address of the caller's frame as backchain pointer
|
17324 |
|
|
into the callee's stack frame.
|
17325 |
|
|
A backchain may be needed to allow debugging using tools that do not understand
|
17326 |
|
|
\&\s-1DWARF\s0 2 call frame information.
|
17327 |
|
|
When \fB\-mno\-packed\-stack\fR is in effect, the backchain pointer is stored
|
17328 |
|
|
at the bottom of the stack frame; when \fB\-mpacked\-stack\fR is in effect,
|
17329 |
|
|
the backchain is placed into the topmost word of the 96/160 byte register
|
17330 |
|
|
save area.
|
17331 |
|
|
.Sp
|
17332 |
|
|
In general, code compiled with \fB\-mbackchain\fR is call-compatible with
|
17333 |
|
|
code compiled with \fB\-mmo\-backchain\fR; however, use of the backchain
|
17334 |
|
|
for debugging purposes usually requires that the whole binary is built with
|
17335 |
|
|
\&\fB\-mbackchain\fR. Note that the combination of \fB\-mbackchain\fR,
|
17336 |
|
|
\&\fB\-mpacked\-stack\fR and \fB\-mhard\-float\fR is not supported. In order
|
17337 |
|
|
to build a linux kernel use \fB\-msoft\-float\fR.
|
17338 |
|
|
.Sp
|
17339 |
|
|
The default is to not maintain the backchain.
|
17340 |
|
|
.IP "\fB\-mpacked\-stack\fR" 4
|
17341 |
|
|
.IX Item "-mpacked-stack"
|
17342 |
|
|
.PD 0
|
17343 |
|
|
.IP "\fB\-mno\-packed\-stack\fR" 4
|
17344 |
|
|
.IX Item "-mno-packed-stack"
|
17345 |
|
|
.PD
|
17346 |
|
|
Use (do not use) the packed stack layout. When \fB\-mno\-packed\-stack\fR is
|
17347 |
|
|
specified, the compiler uses the all fields of the 96/160 byte register save
|
17348 |
|
|
area only for their default purpose; unused fields still take up stack space.
|
17349 |
|
|
When \fB\-mpacked\-stack\fR is specified, register save slots are densely
|
17350 |
|
|
packed at the top of the register save area; unused space is reused for other
|
17351 |
|
|
purposes, allowing for more efficient use of the available stack space.
|
17352 |
|
|
However, when \fB\-mbackchain\fR is also in effect, the topmost word of
|
17353 |
|
|
the save area is always used to store the backchain, and the return address
|
17354 |
|
|
register is always saved two words below the backchain.
|
17355 |
|
|
.Sp
|
17356 |
|
|
As long as the stack frame backchain is not used, code generated with
|
17357 |
|
|
\&\fB\-mpacked\-stack\fR is call-compatible with code generated with
|
17358 |
|
|
\&\fB\-mno\-packed\-stack\fR. Note that some non-FSF releases of \s-1GCC\s0 2.95 for
|
17359 |
|
|
S/390 or zSeries generated code that uses the stack frame backchain at run
|
17360 |
|
|
time, not just for debugging purposes. Such code is not call-compatible
|
17361 |
|
|
with code compiled with \fB\-mpacked\-stack\fR. Also, note that the
|
17362 |
|
|
combination of \fB\-mbackchain\fR,
|
17363 |
|
|
\&\fB\-mpacked\-stack\fR and \fB\-mhard\-float\fR is not supported. In order
|
17364 |
|
|
to build a linux kernel use \fB\-msoft\-float\fR.
|
17365 |
|
|
.Sp
|
17366 |
|
|
The default is to not use the packed stack layout.
|
17367 |
|
|
.IP "\fB\-msmall\-exec\fR" 4
|
17368 |
|
|
.IX Item "-msmall-exec"
|
17369 |
|
|
.PD 0
|
17370 |
|
|
.IP "\fB\-mno\-small\-exec\fR" 4
|
17371 |
|
|
.IX Item "-mno-small-exec"
|
17372 |
|
|
.PD
|
17373 |
|
|
Generate (or do not generate) code using the \f(CW\*(C`bras\*(C'\fR instruction
|
17374 |
|
|
to do subroutine calls.
|
17375 |
|
|
This only works reliably if the total executable size does not
|
17376 |
|
|
exceed 64k. The default is to use the \f(CW\*(C`basr\*(C'\fR instruction instead,
|
17377 |
|
|
which does not have this limitation.
|
17378 |
|
|
.IP "\fB\-m64\fR" 4
|
17379 |
|
|
.IX Item "-m64"
|
17380 |
|
|
.PD 0
|
17381 |
|
|
.IP "\fB\-m31\fR" 4
|
17382 |
|
|
.IX Item "-m31"
|
17383 |
|
|
.PD
|
17384 |
|
|
When \fB\-m31\fR is specified, generate code compliant to the
|
17385 |
|
|
GNU/Linux for S/390 \s-1ABI\s0. When \fB\-m64\fR is specified, generate
|
17386 |
|
|
code compliant to the GNU/Linux for zSeries \s-1ABI\s0. This allows \s-1GCC\s0 in
|
17387 |
|
|
particular to generate 64\-bit instructions. For the \fBs390\fR
|
17388 |
|
|
targets, the default is \fB\-m31\fR, while the \fBs390x\fR
|
17389 |
|
|
targets default to \fB\-m64\fR.
|
17390 |
|
|
.IP "\fB\-mzarch\fR" 4
|
17391 |
|
|
.IX Item "-mzarch"
|
17392 |
|
|
.PD 0
|
17393 |
|
|
.IP "\fB\-mesa\fR" 4
|
17394 |
|
|
.IX Item "-mesa"
|
17395 |
|
|
.PD
|
17396 |
|
|
When \fB\-mzarch\fR is specified, generate code using the
|
17397 |
|
|
instructions available on z/Architecture.
|
17398 |
|
|
When \fB\-mesa\fR is specified, generate code using the
|
17399 |
|
|
instructions available on \s-1ESA/390\s0. Note that \fB\-mesa\fR is
|
17400 |
|
|
not possible with \fB\-m64\fR.
|
17401 |
|
|
When generating code compliant to the GNU/Linux for S/390 \s-1ABI\s0,
|
17402 |
|
|
the default is \fB\-mesa\fR. When generating code compliant
|
17403 |
|
|
to the GNU/Linux for zSeries \s-1ABI\s0, the default is \fB\-mzarch\fR.
|
17404 |
|
|
.IP "\fB\-mmvcle\fR" 4
|
17405 |
|
|
.IX Item "-mmvcle"
|
17406 |
|
|
.PD 0
|
17407 |
|
|
.IP "\fB\-mno\-mvcle\fR" 4
|
17408 |
|
|
.IX Item "-mno-mvcle"
|
17409 |
|
|
.PD
|
17410 |
|
|
Generate (or do not generate) code using the \f(CW\*(C`mvcle\*(C'\fR instruction
|
17411 |
|
|
to perform block moves. When \fB\-mno\-mvcle\fR is specified,
|
17412 |
|
|
use a \f(CW\*(C`mvc\*(C'\fR loop instead. This is the default unless optimizing for
|
17413 |
|
|
size.
|
17414 |
|
|
.IP "\fB\-mdebug\fR" 4
|
17415 |
|
|
.IX Item "-mdebug"
|
17416 |
|
|
.PD 0
|
17417 |
|
|
.IP "\fB\-mno\-debug\fR" 4
|
17418 |
|
|
.IX Item "-mno-debug"
|
17419 |
|
|
.PD
|
17420 |
|
|
Print (or do not print) additional debug information when compiling.
|
17421 |
|
|
The default is to not print debug information.
|
17422 |
|
|
.IP "\fB\-march=\fR\fIcpu-type\fR" 4
|
17423 |
|
|
.IX Item "-march=cpu-type"
|
17424 |
|
|
Generate code that runs on \fIcpu-type\fR, which is the name of a system
|
17425 |
|
|
representing a certain processor type. Possible values for
|
17426 |
|
|
\&\fIcpu-type\fR are \fBg5\fR, \fBg6\fR, \fBz900\fR, \fBz990\fR,
|
17427 |
|
|
\&\fBz9\-109\fR, \fBz9\-ec\fR and \fBz10\fR.
|
17428 |
|
|
When generating code using the instructions available on z/Architecture,
|
17429 |
|
|
the default is \fB\-march=z900\fR. Otherwise, the default is
|
17430 |
|
|
\&\fB\-march=g5\fR.
|
17431 |
|
|
.IP "\fB\-mtune=\fR\fIcpu-type\fR" 4
|
17432 |
|
|
.IX Item "-mtune=cpu-type"
|
17433 |
|
|
Tune to \fIcpu-type\fR everything applicable about the generated code,
|
17434 |
|
|
except for the \s-1ABI\s0 and the set of available instructions.
|
17435 |
|
|
The list of \fIcpu-type\fR values is the same as for \fB\-march\fR.
|
17436 |
|
|
The default is the value used for \fB\-march\fR.
|
17437 |
|
|
.IP "\fB\-mtpf\-trace\fR" 4
|
17438 |
|
|
.IX Item "-mtpf-trace"
|
17439 |
|
|
.PD 0
|
17440 |
|
|
.IP "\fB\-mno\-tpf\-trace\fR" 4
|
17441 |
|
|
.IX Item "-mno-tpf-trace"
|
17442 |
|
|
.PD
|
17443 |
|
|
Generate code that adds (does not add) in \s-1TPF\s0 \s-1OS\s0 specific branches to trace
|
17444 |
|
|
routines in the operating system. This option is off by default, even
|
17445 |
|
|
when compiling for the \s-1TPF\s0 \s-1OS\s0.
|
17446 |
|
|
.IP "\fB\-mfused\-madd\fR" 4
|
17447 |
|
|
.IX Item "-mfused-madd"
|
17448 |
|
|
.PD 0
|
17449 |
|
|
.IP "\fB\-mno\-fused\-madd\fR" 4
|
17450 |
|
|
.IX Item "-mno-fused-madd"
|
17451 |
|
|
.PD
|
17452 |
|
|
Generate code that uses (does not use) the floating-point multiply and
|
17453 |
|
|
accumulate instructions. These instructions are generated by default if
|
17454 |
|
|
hardware floating point is used.
|
17455 |
|
|
.IP "\fB\-mwarn\-framesize=\fR\fIframesize\fR" 4
|
17456 |
|
|
.IX Item "-mwarn-framesize=framesize"
|
17457 |
|
|
Emit a warning if the current function exceeds the given frame size. Because
|
17458 |
|
|
this is a compile-time check it doesn't need to be a real problem when the program
|
17459 |
|
|
runs. It is intended to identify functions that most probably cause
|
17460 |
|
|
a stack overflow. It is useful to be used in an environment with limited stack
|
17461 |
|
|
size e.g. the linux kernel.
|
17462 |
|
|
.IP "\fB\-mwarn\-dynamicstack\fR" 4
|
17463 |
|
|
.IX Item "-mwarn-dynamicstack"
|
17464 |
|
|
Emit a warning if the function calls \f(CW\*(C`alloca\*(C'\fR or uses dynamically-sized
|
17465 |
|
|
arrays. This is generally a bad idea with a limited stack size.
|
17466 |
|
|
.IP "\fB\-mstack\-guard=\fR\fIstack-guard\fR" 4
|
17467 |
|
|
.IX Item "-mstack-guard=stack-guard"
|
17468 |
|
|
.PD 0
|
17469 |
|
|
.IP "\fB\-mstack\-size=\fR\fIstack-size\fR" 4
|
17470 |
|
|
.IX Item "-mstack-size=stack-size"
|
17471 |
|
|
.PD
|
17472 |
|
|
If these options are provided the S/390 back end emits additional instructions in
|
17473 |
|
|
the function prologue that trigger a trap if the stack size is \fIstack-guard\fR
|
17474 |
|
|
bytes above the \fIstack-size\fR (remember that the stack on S/390 grows downward).
|
17475 |
|
|
If the \fIstack-guard\fR option is omitted the smallest power of 2 larger than
|
17476 |
|
|
the frame size of the compiled function is chosen.
|
17477 |
|
|
These options are intended to be used to help debugging stack overflow problems.
|
17478 |
|
|
The additionally emitted code causes only little overhead and hence can also be
|
17479 |
|
|
used in production-like systems without greater performance degradation. The given
|
17480 |
|
|
values have to be exact powers of 2 and \fIstack-size\fR has to be greater than
|
17481 |
|
|
\&\fIstack-guard\fR without exceeding 64k.
|
17482 |
|
|
In order to be efficient the extra code makes the assumption that the stack starts
|
17483 |
|
|
at an address aligned to the value given by \fIstack-size\fR.
|
17484 |
|
|
The \fIstack-guard\fR option can only be used in conjunction with \fIstack-size\fR.
|
17485 |
|
|
.PP
|
17486 |
|
|
\fIScore Options\fR
|
17487 |
|
|
.IX Subsection "Score Options"
|
17488 |
|
|
.PP
|
17489 |
|
|
These options are defined for Score implementations:
|
17490 |
|
|
.IP "\fB\-meb\fR" 4
|
17491 |
|
|
.IX Item "-meb"
|
17492 |
|
|
Compile code for big-endian mode. This is the default.
|
17493 |
|
|
.IP "\fB\-mel\fR" 4
|
17494 |
|
|
.IX Item "-mel"
|
17495 |
|
|
Compile code for little-endian mode.
|
17496 |
|
|
.IP "\fB\-mnhwloop\fR" 4
|
17497 |
|
|
.IX Item "-mnhwloop"
|
17498 |
|
|
Disable generation of \f(CW\*(C`bcnz\*(C'\fR instructions.
|
17499 |
|
|
.IP "\fB\-muls\fR" 4
|
17500 |
|
|
.IX Item "-muls"
|
17501 |
|
|
Enable generation of unaligned load and store instructions.
|
17502 |
|
|
.IP "\fB\-mmac\fR" 4
|
17503 |
|
|
.IX Item "-mmac"
|
17504 |
|
|
Enable the use of multiply-accumulate instructions. Disabled by default.
|
17505 |
|
|
.IP "\fB\-mscore5\fR" 4
|
17506 |
|
|
.IX Item "-mscore5"
|
17507 |
|
|
Specify the \s-1SCORE5\s0 as the target architecture.
|
17508 |
|
|
.IP "\fB\-mscore5u\fR" 4
|
17509 |
|
|
.IX Item "-mscore5u"
|
17510 |
|
|
Specify the \s-1SCORE5U\s0 of the target architecture.
|
17511 |
|
|
.IP "\fB\-mscore7\fR" 4
|
17512 |
|
|
.IX Item "-mscore7"
|
17513 |
|
|
Specify the \s-1SCORE7\s0 as the target architecture. This is the default.
|
17514 |
|
|
.IP "\fB\-mscore7d\fR" 4
|
17515 |
|
|
.IX Item "-mscore7d"
|
17516 |
|
|
Specify the \s-1SCORE7D\s0 as the target architecture.
|
17517 |
|
|
.PP
|
17518 |
|
|
\fI\s-1SH\s0 Options\fR
|
17519 |
|
|
.IX Subsection "SH Options"
|
17520 |
|
|
.PP
|
17521 |
|
|
These \fB\-m\fR options are defined for the \s-1SH\s0 implementations:
|
17522 |
|
|
.IP "\fB\-m1\fR" 4
|
17523 |
|
|
.IX Item "-m1"
|
17524 |
|
|
Generate code for the \s-1SH1\s0.
|
17525 |
|
|
.IP "\fB\-m2\fR" 4
|
17526 |
|
|
.IX Item "-m2"
|
17527 |
|
|
Generate code for the \s-1SH2\s0.
|
17528 |
|
|
.IP "\fB\-m2e\fR" 4
|
17529 |
|
|
.IX Item "-m2e"
|
17530 |
|
|
Generate code for the SH2e.
|
17531 |
|
|
.IP "\fB\-m2a\-nofpu\fR" 4
|
17532 |
|
|
.IX Item "-m2a-nofpu"
|
17533 |
|
|
Generate code for the SH2a without \s-1FPU\s0, or for a SH2a\-FPU in such a way
|
17534 |
|
|
that the floating-point unit is not used.
|
17535 |
|
|
.IP "\fB\-m2a\-single\-only\fR" 4
|
17536 |
|
|
.IX Item "-m2a-single-only"
|
17537 |
|
|
Generate code for the SH2a\-FPU, in such a way that no double-precision
|
17538 |
|
|
floating-point operations are used.
|
17539 |
|
|
.IP "\fB\-m2a\-single\fR" 4
|
17540 |
|
|
.IX Item "-m2a-single"
|
17541 |
|
|
Generate code for the SH2a\-FPU assuming the floating-point unit is in
|
17542 |
|
|
single-precision mode by default.
|
17543 |
|
|
.IP "\fB\-m2a\fR" 4
|
17544 |
|
|
.IX Item "-m2a"
|
17545 |
|
|
Generate code for the SH2a\-FPU assuming the floating-point unit is in
|
17546 |
|
|
double-precision mode by default.
|
17547 |
|
|
.IP "\fB\-m3\fR" 4
|
17548 |
|
|
.IX Item "-m3"
|
17549 |
|
|
Generate code for the \s-1SH3\s0.
|
17550 |
|
|
.IP "\fB\-m3e\fR" 4
|
17551 |
|
|
.IX Item "-m3e"
|
17552 |
|
|
Generate code for the SH3e.
|
17553 |
|
|
.IP "\fB\-m4\-nofpu\fR" 4
|
17554 |
|
|
.IX Item "-m4-nofpu"
|
17555 |
|
|
Generate code for the \s-1SH4\s0 without a floating-point unit.
|
17556 |
|
|
.IP "\fB\-m4\-single\-only\fR" 4
|
17557 |
|
|
.IX Item "-m4-single-only"
|
17558 |
|
|
Generate code for the \s-1SH4\s0 with a floating-point unit that only
|
17559 |
|
|
supports single-precision arithmetic.
|
17560 |
|
|
.IP "\fB\-m4\-single\fR" 4
|
17561 |
|
|
.IX Item "-m4-single"
|
17562 |
|
|
Generate code for the \s-1SH4\s0 assuming the floating-point unit is in
|
17563 |
|
|
single-precision mode by default.
|
17564 |
|
|
.IP "\fB\-m4\fR" 4
|
17565 |
|
|
.IX Item "-m4"
|
17566 |
|
|
Generate code for the \s-1SH4\s0.
|
17567 |
|
|
.IP "\fB\-m4a\-nofpu\fR" 4
|
17568 |
|
|
.IX Item "-m4a-nofpu"
|
17569 |
|
|
Generate code for the SH4al\-dsp, or for a SH4a in such a way that the
|
17570 |
|
|
floating-point unit is not used.
|
17571 |
|
|
.IP "\fB\-m4a\-single\-only\fR" 4
|
17572 |
|
|
.IX Item "-m4a-single-only"
|
17573 |
|
|
Generate code for the SH4a, in such a way that no double-precision
|
17574 |
|
|
floating-point operations are used.
|
17575 |
|
|
.IP "\fB\-m4a\-single\fR" 4
|
17576 |
|
|
.IX Item "-m4a-single"
|
17577 |
|
|
Generate code for the SH4a assuming the floating-point unit is in
|
17578 |
|
|
single-precision mode by default.
|
17579 |
|
|
.IP "\fB\-m4a\fR" 4
|
17580 |
|
|
.IX Item "-m4a"
|
17581 |
|
|
Generate code for the SH4a.
|
17582 |
|
|
.IP "\fB\-m4al\fR" 4
|
17583 |
|
|
.IX Item "-m4al"
|
17584 |
|
|
Same as \fB\-m4a\-nofpu\fR, except that it implicitly passes
|
17585 |
|
|
\&\fB\-dsp\fR to the assembler. \s-1GCC\s0 doesn't generate any \s-1DSP\s0
|
17586 |
|
|
instructions at the moment.
|
17587 |
|
|
.IP "\fB\-mb\fR" 4
|
17588 |
|
|
.IX Item "-mb"
|
17589 |
|
|
Compile code for the processor in big-endian mode.
|
17590 |
|
|
.IP "\fB\-ml\fR" 4
|
17591 |
|
|
.IX Item "-ml"
|
17592 |
|
|
Compile code for the processor in little-endian mode.
|
17593 |
|
|
.IP "\fB\-mdalign\fR" 4
|
17594 |
|
|
.IX Item "-mdalign"
|
17595 |
|
|
Align doubles at 64\-bit boundaries. Note that this changes the calling
|
17596 |
|
|
conventions, and thus some functions from the standard C library do
|
17597 |
|
|
not work unless you recompile it first with \fB\-mdalign\fR.
|
17598 |
|
|
.IP "\fB\-mrelax\fR" 4
|
17599 |
|
|
.IX Item "-mrelax"
|
17600 |
|
|
Shorten some address references at link time, when possible; uses the
|
17601 |
|
|
linker option \fB\-relax\fR.
|
17602 |
|
|
.IP "\fB\-mbigtable\fR" 4
|
17603 |
|
|
.IX Item "-mbigtable"
|
17604 |
|
|
Use 32\-bit offsets in \f(CW\*(C`switch\*(C'\fR tables. The default is to use
|
17605 |
|
|
16\-bit offsets.
|
17606 |
|
|
.IP "\fB\-mbitops\fR" 4
|
17607 |
|
|
.IX Item "-mbitops"
|
17608 |
|
|
Enable the use of bit manipulation instructions on \s-1SH2A\s0.
|
17609 |
|
|
.IP "\fB\-mfmovd\fR" 4
|
17610 |
|
|
.IX Item "-mfmovd"
|
17611 |
|
|
Enable the use of the instruction \f(CW\*(C`fmovd\*(C'\fR. Check \fB\-mdalign\fR for
|
17612 |
|
|
alignment constraints.
|
17613 |
|
|
.IP "\fB\-mhitachi\fR" 4
|
17614 |
|
|
.IX Item "-mhitachi"
|
17615 |
|
|
Comply with the calling conventions defined by Renesas.
|
17616 |
|
|
.IP "\fB\-mrenesas\fR" 4
|
17617 |
|
|
.IX Item "-mrenesas"
|
17618 |
|
|
Comply with the calling conventions defined by Renesas.
|
17619 |
|
|
.IP "\fB\-mno\-renesas\fR" 4
|
17620 |
|
|
.IX Item "-mno-renesas"
|
17621 |
|
|
Comply with the calling conventions defined for \s-1GCC\s0 before the Renesas
|
17622 |
|
|
conventions were available. This option is the default for all
|
17623 |
|
|
targets of the \s-1SH\s0 toolchain.
|
17624 |
|
|
.IP "\fB\-mnomacsave\fR" 4
|
17625 |
|
|
.IX Item "-mnomacsave"
|
17626 |
|
|
Mark the \f(CW\*(C`MAC\*(C'\fR register as call-clobbered, even if
|
17627 |
|
|
\&\fB\-mhitachi\fR is given.
|
17628 |
|
|
.IP "\fB\-mieee\fR" 4
|
17629 |
|
|
.IX Item "-mieee"
|
17630 |
|
|
.PD 0
|
17631 |
|
|
.IP "\fB\-mno\-ieee\fR" 4
|
17632 |
|
|
.IX Item "-mno-ieee"
|
17633 |
|
|
.PD
|
17634 |
|
|
Control the \s-1IEEE\s0 compliance of floating-point comparisons, which affects the
|
17635 |
|
|
handling of cases where the result of a comparison is unordered. By default
|
17636 |
|
|
\&\fB\-mieee\fR is implicitly enabled. If \fB\-ffinite\-math\-only\fR is
|
17637 |
|
|
enabled \fB\-mno\-ieee\fR is implicitly set, which results in faster
|
17638 |
|
|
floating-point greater-equal and less-equal comparisons. The implcit settings
|
17639 |
|
|
can be overridden by specifying either \fB\-mieee\fR or \fB\-mno\-ieee\fR.
|
17640 |
|
|
.IP "\fB\-minline\-ic_invalidate\fR" 4
|
17641 |
|
|
.IX Item "-minline-ic_invalidate"
|
17642 |
|
|
Inline code to invalidate instruction cache entries after setting up
|
17643 |
|
|
nested function trampolines.
|
17644 |
|
|
This option has no effect if \fB\-musermode\fR is in effect and the selected
|
17645 |
|
|
code generation option (e.g. \fB\-m4\fR) does not allow the use of the \f(CW\*(C`icbi\*(C'\fR
|
17646 |
|
|
instruction.
|
17647 |
|
|
If the selected code generation option does not allow the use of the \f(CW\*(C`icbi\*(C'\fR
|
17648 |
|
|
instruction, and \fB\-musermode\fR is not in effect, the inlined code
|
17649 |
|
|
manipulates the instruction cache address array directly with an associative
|
17650 |
|
|
write. This not only requires privileged mode at run time, but it also
|
17651 |
|
|
fails if the cache line had been mapped via the \s-1TLB\s0 and has become unmapped.
|
17652 |
|
|
.IP "\fB\-misize\fR" 4
|
17653 |
|
|
.IX Item "-misize"
|
17654 |
|
|
Dump instruction size and location in the assembly code.
|
17655 |
|
|
.IP "\fB\-mpadstruct\fR" 4
|
17656 |
|
|
.IX Item "-mpadstruct"
|
17657 |
|
|
This option is deprecated. It pads structures to multiple of 4 bytes,
|
17658 |
|
|
which is incompatible with the \s-1SH\s0 \s-1ABI\s0.
|
17659 |
|
|
.IP "\fB\-matomic\-model=\fR\fImodel\fR" 4
|
17660 |
|
|
.IX Item "-matomic-model=model"
|
17661 |
|
|
Sets the model of atomic operations and additional parameters as a comma
|
17662 |
|
|
separated list. For details on the atomic built-in functions see
|
17663 |
|
|
\&\fB_\|_atomic Builtins\fR. The following models and parameters are supported:
|
17664 |
|
|
.RS 4
|
17665 |
|
|
.IP "\fBnone\fR" 4
|
17666 |
|
|
.IX Item "none"
|
17667 |
|
|
Disable compiler generated atomic sequences and emit library calls for atomic
|
17668 |
|
|
operations. This is the default if the target is not \f(CW\*(C`sh\-*\-linux*\*(C'\fR.
|
17669 |
|
|
.IP "\fBsoft-gusa\fR" 4
|
17670 |
|
|
.IX Item "soft-gusa"
|
17671 |
|
|
Generate GNU/Linux compatible gUSA software atomic sequences for the atomic
|
17672 |
|
|
built-in functions. The generated atomic sequences require additional support
|
17673 |
|
|
from the interrupt/exception handling code of the system and are only suitable
|
17674 |
|
|
for SH3* and SH4* single-core systems. This option is enabled by default when
|
17675 |
|
|
the target is \f(CW\*(C`sh\-*\-linux*\*(C'\fR and SH3* or SH4*. When the target is \s-1SH4A\s0,
|
17676 |
|
|
this option will also partially utilize the hardware atomic instructions
|
17677 |
|
|
\&\f(CW\*(C`movli.l\*(C'\fR and \f(CW\*(C`movco.l\*(C'\fR to create more efficient code, unless
|
17678 |
|
|
\&\fBstrict\fR is specified.
|
17679 |
|
|
.IP "\fBsoft-tcb\fR" 4
|
17680 |
|
|
.IX Item "soft-tcb"
|
17681 |
|
|
Generate software atomic sequences that use a variable in the thread control
|
17682 |
|
|
block. This is a variation of the gUSA sequences which can also be used on
|
17683 |
|
|
SH1* and SH2* targets. The generated atomic sequences require additional
|
17684 |
|
|
support from the interrupt/exception handling code of the system and are only
|
17685 |
|
|
suitable for single-core systems. When using this model, the \fBgbr\-offset=\fR
|
17686 |
|
|
parameter has to be specified as well.
|
17687 |
|
|
.IP "\fBsoft-imask\fR" 4
|
17688 |
|
|
.IX Item "soft-imask"
|
17689 |
|
|
Generate software atomic sequences that temporarily disable interrupts by
|
17690 |
|
|
setting \f(CW\*(C`SR.IMASK = 1111\*(C'\fR. This model works only when the program runs
|
17691 |
|
|
in privileged mode and is only suitable for single-core systems. Additional
|
17692 |
|
|
support from the interrupt/exception handling code of the system is not
|
17693 |
|
|
required. This model is enabled by default when the target is
|
17694 |
|
|
\&\f(CW\*(C`sh\-*\-linux*\*(C'\fR and SH1* or SH2*.
|
17695 |
|
|
.IP "\fBhard-llcs\fR" 4
|
17696 |
|
|
.IX Item "hard-llcs"
|
17697 |
|
|
Generate hardware atomic sequences using the \f(CW\*(C`movli.l\*(C'\fR and \f(CW\*(C`movco.l\*(C'\fR
|
17698 |
|
|
instructions only. This is only available on \s-1SH4A\s0 and is suitable for
|
17699 |
|
|
multi-core systems. Since the hardware instructions support only 32 bit atomic
|
17700 |
|
|
variables access to 8 or 16 bit variables is emulated with 32 bit accesses.
|
17701 |
|
|
Code compiled with this option will also be compatible with other software
|
17702 |
|
|
atomic model interrupt/exception handling systems if executed on an \s-1SH4A\s0
|
17703 |
|
|
system. Additional support from the interrupt/exception handling code of the
|
17704 |
|
|
system is not required for this model.
|
17705 |
|
|
.IP "\fBgbr\-offset=\fR" 4
|
17706 |
|
|
.IX Item "gbr-offset="
|
17707 |
|
|
This parameter specifies the offset in bytes of the variable in the thread
|
17708 |
|
|
control block structure that should be used by the generated atomic sequences
|
17709 |
|
|
when the \fBsoft-tcb\fR model has been selected. For other models this
|
17710 |
|
|
parameter is ignored. The specified value must be an integer multiple of four
|
17711 |
|
|
and in the range 0\-1020.
|
17712 |
|
|
.IP "\fBstrict\fR" 4
|
17713 |
|
|
.IX Item "strict"
|
17714 |
|
|
This parameter prevents mixed usage of multiple atomic models, even though they
|
17715 |
|
|
would be compatible, and will make the compiler generate atomic sequences of the
|
17716 |
|
|
specified model only.
|
17717 |
|
|
.RE
|
17718 |
|
|
.RS 4
|
17719 |
|
|
.RE
|
17720 |
|
|
.IP "\fB\-mtas\fR" 4
|
17721 |
|
|
.IX Item "-mtas"
|
17722 |
|
|
Generate the \f(CW\*(C`tas.b\*(C'\fR opcode for \f(CW\*(C`_\|_atomic_test_and_set\*(C'\fR.
|
17723 |
|
|
Notice that depending on the particular hardware and software configuration
|
17724 |
|
|
this can degrade overall performance due to the operand cache line flushes
|
17725 |
|
|
that are implied by the \f(CW\*(C`tas.b\*(C'\fR instruction. On multi-core \s-1SH4A\s0
|
17726 |
|
|
processors the \f(CW\*(C`tas.b\*(C'\fR instruction must be used with caution since it
|
17727 |
|
|
can result in data corruption for certain cache configurations.
|
17728 |
|
|
.IP "\fB\-mspace\fR" 4
|
17729 |
|
|
.IX Item "-mspace"
|
17730 |
|
|
Optimize for space instead of speed. Implied by \fB\-Os\fR.
|
17731 |
|
|
.IP "\fB\-mprefergot\fR" 4
|
17732 |
|
|
.IX Item "-mprefergot"
|
17733 |
|
|
When generating position-independent code, emit function calls using
|
17734 |
|
|
the Global Offset Table instead of the Procedure Linkage Table.
|
17735 |
|
|
.IP "\fB\-musermode\fR" 4
|
17736 |
|
|
.IX Item "-musermode"
|
17737 |
|
|
Don't generate privileged mode only code. This option
|
17738 |
|
|
implies \fB\-mno\-inline\-ic_invalidate\fR
|
17739 |
|
|
if the inlined code would not work in user mode.
|
17740 |
|
|
This is the default when the target is \f(CW\*(C`sh\-*\-linux*\*(C'\fR.
|
17741 |
|
|
.IP "\fB\-multcost=\fR\fInumber\fR" 4
|
17742 |
|
|
.IX Item "-multcost=number"
|
17743 |
|
|
Set the cost to assume for a multiply insn.
|
17744 |
|
|
.IP "\fB\-mdiv=\fR\fIstrategy\fR" 4
|
17745 |
|
|
.IX Item "-mdiv=strategy"
|
17746 |
|
|
Set the division strategy to use for SHmedia code. \fIstrategy\fR must be
|
17747 |
|
|
one of:
|
17748 |
|
|
.RS 4
|
17749 |
|
|
.IP "\fBfp\fR" 4
|
17750 |
|
|
.IX Item "fp"
|
17751 |
|
|
Performs the operation in floating point. This has a very high latency,
|
17752 |
|
|
but needs only a few instructions, so it might be a good choice if
|
17753 |
|
|
your code has enough easily-exploitable \s-1ILP\s0 to allow the compiler to
|
17754 |
|
|
schedule the floating-point instructions together with other instructions.
|
17755 |
|
|
Division by zero causes a floating-point exception.
|
17756 |
|
|
.IP "\fBinv\fR" 4
|
17757 |
|
|
.IX Item "inv"
|
17758 |
|
|
Uses integer operations to calculate the inverse of the divisor,
|
17759 |
|
|
and then multiplies the dividend with the inverse. This strategy allows
|
17760 |
|
|
\&\s-1CSE\s0 and hoisting of the inverse calculation. Division by zero calculates
|
17761 |
|
|
an unspecified result, but does not trap.
|
17762 |
|
|
.IP "\fBinv:minlat\fR" 4
|
17763 |
|
|
.IX Item "inv:minlat"
|
17764 |
|
|
A variant of \fBinv\fR where, if no \s-1CSE\s0 or hoisting opportunities
|
17765 |
|
|
have been found, or if the entire operation has been hoisted to the same
|
17766 |
|
|
place, the last stages of the inverse calculation are intertwined with the
|
17767 |
|
|
final multiply to reduce the overall latency, at the expense of using a few
|
17768 |
|
|
more instructions, and thus offering fewer scheduling opportunities with
|
17769 |
|
|
other code.
|
17770 |
|
|
.IP "\fBcall\fR" 4
|
17771 |
|
|
.IX Item "call"
|
17772 |
|
|
Calls a library function that usually implements the \fBinv:minlat\fR
|
17773 |
|
|
strategy.
|
17774 |
|
|
This gives high code density for \f(CW\*(C`m5\-*media\-nofpu\*(C'\fR compilations.
|
17775 |
|
|
.IP "\fBcall2\fR" 4
|
17776 |
|
|
.IX Item "call2"
|
17777 |
|
|
Uses a different entry point of the same library function, where it
|
17778 |
|
|
assumes that a pointer to a lookup table has already been set up, which
|
17779 |
|
|
exposes the pointer load to \s-1CSE\s0 and code hoisting optimizations.
|
17780 |
|
|
.IP "\fBinv:call\fR" 4
|
17781 |
|
|
.IX Item "inv:call"
|
17782 |
|
|
.PD 0
|
17783 |
|
|
.IP "\fBinv:call2\fR" 4
|
17784 |
|
|
.IX Item "inv:call2"
|
17785 |
|
|
.IP "\fBinv:fp\fR" 4
|
17786 |
|
|
.IX Item "inv:fp"
|
17787 |
|
|
.PD
|
17788 |
|
|
Use the \fBinv\fR algorithm for initial
|
17789 |
|
|
code generation, but if the code stays unoptimized, revert to the \fBcall\fR,
|
17790 |
|
|
\&\fBcall2\fR, or \fBfp\fR strategies, respectively. Note that the
|
17791 |
|
|
potentially-trapping side effect of division by zero is carried by a
|
17792 |
|
|
separate instruction, so it is possible that all the integer instructions
|
17793 |
|
|
are hoisted out, but the marker for the side effect stays where it is.
|
17794 |
|
|
A recombination to floating-point operations or a call is not possible
|
17795 |
|
|
in that case.
|
17796 |
|
|
.IP "\fBinv20u\fR" 4
|
17797 |
|
|
.IX Item "inv20u"
|
17798 |
|
|
.PD 0
|
17799 |
|
|
.IP "\fBinv20l\fR" 4
|
17800 |
|
|
.IX Item "inv20l"
|
17801 |
|
|
.PD
|
17802 |
|
|
Variants of the \fBinv:minlat\fR strategy. In the case
|
17803 |
|
|
that the inverse calculation is not separated from the multiply, they speed
|
17804 |
|
|
up division where the dividend fits into 20 bits (plus sign where applicable)
|
17805 |
|
|
by inserting a test to skip a number of operations in this case; this test
|
17806 |
|
|
slows down the case of larger dividends. \fBinv20u\fR assumes the case of a such
|
17807 |
|
|
a small dividend to be unlikely, and \fBinv20l\fR assumes it to be likely.
|
17808 |
|
|
.RE
|
17809 |
|
|
.RS 4
|
17810 |
|
|
.RE
|
17811 |
|
|
.IP "\fB\-maccumulate\-outgoing\-args\fR" 4
|
17812 |
|
|
.IX Item "-maccumulate-outgoing-args"
|
17813 |
|
|
Reserve space once for outgoing arguments in the function prologue rather
|
17814 |
|
|
than around each call. Generally beneficial for performance and size. Also
|
17815 |
|
|
needed for unwinding to avoid changing the stack frame around conditional code.
|
17816 |
|
|
.IP "\fB\-mdivsi3_libfunc=\fR\fIname\fR" 4
|
17817 |
|
|
.IX Item "-mdivsi3_libfunc=name"
|
17818 |
|
|
Set the name of the library function used for 32\-bit signed division to
|
17819 |
|
|
\&\fIname\fR.
|
17820 |
|
|
This only affects the name used in the \fBcall\fR and \fBinv:call\fR
|
17821 |
|
|
division strategies, and the compiler still expects the same
|
17822 |
|
|
sets of input/output/clobbered registers as if this option were not present.
|
17823 |
|
|
.IP "\fB\-mfixed\-range=\fR\fIregister-range\fR" 4
|
17824 |
|
|
.IX Item "-mfixed-range=register-range"
|
17825 |
|
|
Generate code treating the given register range as fixed registers.
|
17826 |
|
|
A fixed register is one that the register allocator can not use. This is
|
17827 |
|
|
useful when compiling kernel code. A register range is specified as
|
17828 |
|
|
two registers separated by a dash. Multiple register ranges can be
|
17829 |
|
|
specified separated by a comma.
|
17830 |
|
|
.IP "\fB\-mindexed\-addressing\fR" 4
|
17831 |
|
|
.IX Item "-mindexed-addressing"
|
17832 |
|
|
Enable the use of the indexed addressing mode for SHmedia32/SHcompact.
|
17833 |
|
|
This is only safe if the hardware and/or \s-1OS\s0 implement 32\-bit wrap-around
|
17834 |
|
|
semantics for the indexed addressing mode. The architecture allows the
|
17835 |
|
|
implementation of processors with 64\-bit \s-1MMU\s0, which the \s-1OS\s0 could use to
|
17836 |
|
|
get 32\-bit addressing, but since no current hardware implementation supports
|
17837 |
|
|
this or any other way to make the indexed addressing mode safe to use in
|
17838 |
|
|
the 32\-bit \s-1ABI\s0, the default is \fB\-mno\-indexed\-addressing\fR.
|
17839 |
|
|
.IP "\fB\-mgettrcost=\fR\fInumber\fR" 4
|
17840 |
|
|
.IX Item "-mgettrcost=number"
|
17841 |
|
|
Set the cost assumed for the \f(CW\*(C`gettr\*(C'\fR instruction to \fInumber\fR.
|
17842 |
|
|
The default is 2 if \fB\-mpt\-fixed\fR is in effect, 100 otherwise.
|
17843 |
|
|
.IP "\fB\-mpt\-fixed\fR" 4
|
17844 |
|
|
.IX Item "-mpt-fixed"
|
17845 |
|
|
Assume \f(CW\*(C`pt*\*(C'\fR instructions won't trap. This generally generates
|
17846 |
|
|
better-scheduled code, but is unsafe on current hardware.
|
17847 |
|
|
The current architecture
|
17848 |
|
|
definition says that \f(CW\*(C`ptabs\*(C'\fR and \f(CW\*(C`ptrel\*(C'\fR trap when the target
|
17849 |
|
|
anded with 3 is 3.
|
17850 |
|
|
This has the unintentional effect of making it unsafe to schedule these
|
17851 |
|
|
instructions before a branch, or hoist them out of a loop. For example,
|
17852 |
|
|
\&\f(CW\*(C`_\|_do_global_ctors\*(C'\fR, a part of \fIlibgcc\fR
|
17853 |
|
|
that runs constructors at program
|
17854 |
|
|
startup, calls functions in a list which is delimited by \-1. With the
|
17855 |
|
|
\&\fB\-mpt\-fixed\fR option, the \f(CW\*(C`ptabs\*(C'\fR is done before testing against \-1.
|
17856 |
|
|
That means that all the constructors run a bit more quickly, but when
|
17857 |
|
|
the loop comes to the end of the list, the program crashes because \f(CW\*(C`ptabs\*(C'\fR
|
17858 |
|
|
loads \-1 into a target register.
|
17859 |
|
|
.Sp
|
17860 |
|
|
Since this option is unsafe for any
|
17861 |
|
|
hardware implementing the current architecture specification, the default
|
17862 |
|
|
is \fB\-mno\-pt\-fixed\fR. Unless specified explicitly with
|
17863 |
|
|
\&\fB\-mgettrcost\fR, \fB\-mno\-pt\-fixed\fR also implies \fB\-mgettrcost=100\fR;
|
17864 |
|
|
this deters register allocation from using target registers for storing
|
17865 |
|
|
ordinary integers.
|
17866 |
|
|
.IP "\fB\-minvalid\-symbols\fR" 4
|
17867 |
|
|
.IX Item "-minvalid-symbols"
|
17868 |
|
|
Assume symbols might be invalid. Ordinary function symbols generated by
|
17869 |
|
|
the compiler are always valid to load with
|
17870 |
|
|
\&\f(CW\*(C`movi\*(C'\fR/\f(CW\*(C`shori\*(C'\fR/\f(CW\*(C`ptabs\*(C'\fR or
|
17871 |
|
|
\&\f(CW\*(C`movi\*(C'\fR/\f(CW\*(C`shori\*(C'\fR/\f(CW\*(C`ptrel\*(C'\fR,
|
17872 |
|
|
but with assembler and/or linker tricks it is possible
|
17873 |
|
|
to generate symbols that cause \f(CW\*(C`ptabs\*(C'\fR or \f(CW\*(C`ptrel\*(C'\fR to trap.
|
17874 |
|
|
This option is only meaningful when \fB\-mno\-pt\-fixed\fR is in effect.
|
17875 |
|
|
It prevents cross-basic-block \s-1CSE\s0, hoisting and most scheduling
|
17876 |
|
|
of symbol loads. The default is \fB\-mno\-invalid\-symbols\fR.
|
17877 |
|
|
.IP "\fB\-mbranch\-cost=\fR\fInum\fR" 4
|
17878 |
|
|
.IX Item "-mbranch-cost=num"
|
17879 |
|
|
Assume \fInum\fR to be the cost for a branch instruction. Higher numbers
|
17880 |
|
|
make the compiler try to generate more branch-free code if possible.
|
17881 |
|
|
If not specified the value is selected depending on the processor type that
|
17882 |
|
|
is being compiled for.
|
17883 |
|
|
.IP "\fB\-mzdcbranch\fR" 4
|
17884 |
|
|
.IX Item "-mzdcbranch"
|
17885 |
|
|
.PD 0
|
17886 |
|
|
.IP "\fB\-mno\-zdcbranch\fR" 4
|
17887 |
|
|
.IX Item "-mno-zdcbranch"
|
17888 |
|
|
.PD
|
17889 |
|
|
Assume (do not assume) that zero displacement conditional branch instructions
|
17890 |
|
|
\&\f(CW\*(C`bt\*(C'\fR and \f(CW\*(C`bf\*(C'\fR are fast. If \fB\-mzdcbranch\fR is specified, the
|
17891 |
|
|
compiler will try to prefer zero displacement branch code sequences. This is
|
17892 |
|
|
enabled by default when generating code for \s-1SH4\s0 and \s-1SH4A\s0. It can be explicitly
|
17893 |
|
|
disabled by specifying \fB\-mno\-zdcbranch\fR.
|
17894 |
|
|
.IP "\fB\-mcbranchdi\fR" 4
|
17895 |
|
|
.IX Item "-mcbranchdi"
|
17896 |
|
|
Enable the \f(CW\*(C`cbranchdi4\*(C'\fR instruction pattern.
|
17897 |
|
|
.IP "\fB\-mcmpeqdi\fR" 4
|
17898 |
|
|
.IX Item "-mcmpeqdi"
|
17899 |
|
|
Emit the \f(CW\*(C`cmpeqdi_t\*(C'\fR instruction pattern even when \fB\-mcbranchdi\fR
|
17900 |
|
|
is in effect.
|
17901 |
|
|
.IP "\fB\-mfused\-madd\fR" 4
|
17902 |
|
|
.IX Item "-mfused-madd"
|
17903 |
|
|
.PD 0
|
17904 |
|
|
.IP "\fB\-mno\-fused\-madd\fR" 4
|
17905 |
|
|
.IX Item "-mno-fused-madd"
|
17906 |
|
|
.PD
|
17907 |
|
|
Generate code that uses (does not use) the floating-point multiply and
|
17908 |
|
|
accumulate instructions. These instructions are generated by default
|
17909 |
|
|
if hardware floating point is used. The machine-dependent
|
17910 |
|
|
\&\fB\-mfused\-madd\fR option is now mapped to the machine-independent
|
17911 |
|
|
\&\fB\-ffp\-contract=fast\fR option, and \fB\-mno\-fused\-madd\fR is
|
17912 |
|
|
mapped to \fB\-ffp\-contract=off\fR.
|
17913 |
|
|
.IP "\fB\-mfsca\fR" 4
|
17914 |
|
|
.IX Item "-mfsca"
|
17915 |
|
|
.PD 0
|
17916 |
|
|
.IP "\fB\-mno\-fsca\fR" 4
|
17917 |
|
|
.IX Item "-mno-fsca"
|
17918 |
|
|
.PD
|
17919 |
|
|
Allow or disallow the compiler to emit the \f(CW\*(C`fsca\*(C'\fR instruction for sine
|
17920 |
|
|
and cosine approximations. The option \f(CW\*(C`\-mfsca\*(C'\fR must be used in
|
17921 |
|
|
combination with \f(CW\*(C`\-funsafe\-math\-optimizations\*(C'\fR. It is enabled by default
|
17922 |
|
|
when generating code for \s-1SH4A\s0. Using \f(CW\*(C`\-mno\-fsca\*(C'\fR disables sine and cosine
|
17923 |
|
|
approximations even if \f(CW\*(C`\-funsafe\-math\-optimizations\*(C'\fR is in effect.
|
17924 |
|
|
.IP "\fB\-mfsrra\fR" 4
|
17925 |
|
|
.IX Item "-mfsrra"
|
17926 |
|
|
.PD 0
|
17927 |
|
|
.IP "\fB\-mno\-fsrra\fR" 4
|
17928 |
|
|
.IX Item "-mno-fsrra"
|
17929 |
|
|
.PD
|
17930 |
|
|
Allow or disallow the compiler to emit the \f(CW\*(C`fsrra\*(C'\fR instruction for
|
17931 |
|
|
reciprocal square root approximations. The option \f(CW\*(C`\-mfsrra\*(C'\fR must be used
|
17932 |
|
|
in combination with \f(CW\*(C`\-funsafe\-math\-optimizations\*(C'\fR and
|
17933 |
|
|
\&\f(CW\*(C`\-ffinite\-math\-only\*(C'\fR. It is enabled by default when generating code for
|
17934 |
|
|
\&\s-1SH4A\s0. Using \f(CW\*(C`\-mno\-fsrra\*(C'\fR disables reciprocal square root approximations
|
17935 |
|
|
even if \f(CW\*(C`\-funsafe\-math\-optimizations\*(C'\fR and \f(CW\*(C`\-ffinite\-math\-only\*(C'\fR are
|
17936 |
|
|
in effect.
|
17937 |
|
|
.IP "\fB\-mpretend\-cmove\fR" 4
|
17938 |
|
|
.IX Item "-mpretend-cmove"
|
17939 |
|
|
Prefer zero-displacement conditional branches for conditional move instruction
|
17940 |
|
|
patterns. This can result in faster code on the \s-1SH4\s0 processor.
|
17941 |
|
|
.PP
|
17942 |
|
|
\fISolaris 2 Options\fR
|
17943 |
|
|
.IX Subsection "Solaris 2 Options"
|
17944 |
|
|
.PP
|
17945 |
|
|
These \fB\-m\fR options are supported on Solaris 2:
|
17946 |
|
|
.IP "\fB\-mimpure\-text\fR" 4
|
17947 |
|
|
.IX Item "-mimpure-text"
|
17948 |
|
|
\&\fB\-mimpure\-text\fR, used in addition to \fB\-shared\fR, tells
|
17949 |
|
|
the compiler to not pass \fB\-z text\fR to the linker when linking a
|
17950 |
|
|
shared object. Using this option, you can link position-dependent
|
17951 |
|
|
code into a shared object.
|
17952 |
|
|
.Sp
|
17953 |
|
|
\&\fB\-mimpure\-text\fR suppresses the \*(L"relocations remain against
|
17954 |
|
|
allocatable but non-writable sections\*(R" linker error message.
|
17955 |
|
|
However, the necessary relocations trigger copy-on-write, and the
|
17956 |
|
|
shared object is not actually shared across processes. Instead of
|
17957 |
|
|
using \fB\-mimpure\-text\fR, you should compile all source code with
|
17958 |
|
|
\&\fB\-fpic\fR or \fB\-fPIC\fR.
|
17959 |
|
|
.PP
|
17960 |
|
|
These switches are supported in addition to the above on Solaris 2:
|
17961 |
|
|
.IP "\fB\-pthreads\fR" 4
|
17962 |
|
|
.IX Item "-pthreads"
|
17963 |
|
|
Add support for multithreading using the \s-1POSIX\s0 threads library. This
|
17964 |
|
|
option sets flags for both the preprocessor and linker. This option does
|
17965 |
|
|
not affect the thread safety of object code produced by the compiler or
|
17966 |
|
|
that of libraries supplied with it.
|
17967 |
|
|
.IP "\fB\-pthread\fR" 4
|
17968 |
|
|
.IX Item "-pthread"
|
17969 |
|
|
This is a synonym for \fB\-pthreads\fR.
|
17970 |
|
|
.PP
|
17971 |
|
|
\fI\s-1SPARC\s0 Options\fR
|
17972 |
|
|
.IX Subsection "SPARC Options"
|
17973 |
|
|
.PP
|
17974 |
|
|
These \fB\-m\fR options are supported on the \s-1SPARC:\s0
|
17975 |
|
|
.IP "\fB\-mno\-app\-regs\fR" 4
|
17976 |
|
|
.IX Item "-mno-app-regs"
|
17977 |
|
|
.PD 0
|
17978 |
|
|
.IP "\fB\-mapp\-regs\fR" 4
|
17979 |
|
|
.IX Item "-mapp-regs"
|
17980 |
|
|
.PD
|
17981 |
|
|
Specify \fB\-mapp\-regs\fR to generate output using the global registers
|
17982 |
|
|
2 through 4, which the \s-1SPARC\s0 \s-1SVR4\s0 \s-1ABI\s0 reserves for applications. This
|
17983 |
|
|
is the default.
|
17984 |
|
|
.Sp
|
17985 |
|
|
To be fully \s-1SVR4\s0 ABI-compliant at the cost of some performance loss,
|
17986 |
|
|
specify \fB\-mno\-app\-regs\fR. You should compile libraries and system
|
17987 |
|
|
software with this option.
|
17988 |
|
|
.IP "\fB\-mflat\fR" 4
|
17989 |
|
|
.IX Item "-mflat"
|
17990 |
|
|
.PD 0
|
17991 |
|
|
.IP "\fB\-mno\-flat\fR" 4
|
17992 |
|
|
.IX Item "-mno-flat"
|
17993 |
|
|
.PD
|
17994 |
|
|
With \fB\-mflat\fR, the compiler does not generate save/restore instructions
|
17995 |
|
|
and uses a \*(L"flat\*(R" or single register window model. This model is compatible
|
17996 |
|
|
with the regular register window model. The local registers and the input
|
17997 |
|
|
registers (0\-\-5) are still treated as \*(L"call-saved\*(R" registers and are
|
17998 |
|
|
saved on the stack as needed.
|
17999 |
|
|
.Sp
|
18000 |
|
|
With \fB\-mno\-flat\fR (the default), the compiler generates save/restore
|
18001 |
|
|
instructions (except for leaf functions). This is the normal operating mode.
|
18002 |
|
|
.IP "\fB\-mfpu\fR" 4
|
18003 |
|
|
.IX Item "-mfpu"
|
18004 |
|
|
.PD 0
|
18005 |
|
|
.IP "\fB\-mhard\-float\fR" 4
|
18006 |
|
|
.IX Item "-mhard-float"
|
18007 |
|
|
.PD
|
18008 |
|
|
Generate output containing floating-point instructions. This is the
|
18009 |
|
|
default.
|
18010 |
|
|
.IP "\fB\-mno\-fpu\fR" 4
|
18011 |
|
|
.IX Item "-mno-fpu"
|
18012 |
|
|
.PD 0
|
18013 |
|
|
.IP "\fB\-msoft\-float\fR" 4
|
18014 |
|
|
.IX Item "-msoft-float"
|
18015 |
|
|
.PD
|
18016 |
|
|
Generate output containing library calls for floating point.
|
18017 |
|
|
\&\fBWarning:\fR the requisite libraries are not available for all \s-1SPARC\s0
|
18018 |
|
|
targets. Normally the facilities of the machine's usual C compiler are
|
18019 |
|
|
used, but this cannot be done directly in cross-compilation. You must make
|
18020 |
|
|
your own arrangements to provide suitable library functions for
|
18021 |
|
|
cross-compilation. The embedded targets \fBsparc\-*\-aout\fR and
|
18022 |
|
|
\&\fBsparclite\-*\-*\fR do provide software floating-point support.
|
18023 |
|
|
.Sp
|
18024 |
|
|
\&\fB\-msoft\-float\fR changes the calling convention in the output file;
|
18025 |
|
|
therefore, it is only useful if you compile \fIall\fR of a program with
|
18026 |
|
|
this option. In particular, you need to compile \fIlibgcc.a\fR, the
|
18027 |
|
|
library that comes with \s-1GCC\s0, with \fB\-msoft\-float\fR in order for
|
18028 |
|
|
this to work.
|
18029 |
|
|
.IP "\fB\-mhard\-quad\-float\fR" 4
|
18030 |
|
|
.IX Item "-mhard-quad-float"
|
18031 |
|
|
Generate output containing quad-word (long double) floating-point
|
18032 |
|
|
instructions.
|
18033 |
|
|
.IP "\fB\-msoft\-quad\-float\fR" 4
|
18034 |
|
|
.IX Item "-msoft-quad-float"
|
18035 |
|
|
Generate output containing library calls for quad-word (long double)
|
18036 |
|
|
floating-point instructions. The functions called are those specified
|
18037 |
|
|
in the \s-1SPARC\s0 \s-1ABI\s0. This is the default.
|
18038 |
|
|
.Sp
|
18039 |
|
|
As of this writing, there are no \s-1SPARC\s0 implementations that have hardware
|
18040 |
|
|
support for the quad-word floating-point instructions. They all invoke
|
18041 |
|
|
a trap handler for one of these instructions, and then the trap handler
|
18042 |
|
|
emulates the effect of the instruction. Because of the trap handler overhead,
|
18043 |
|
|
this is much slower than calling the \s-1ABI\s0 library routines. Thus the
|
18044 |
|
|
\&\fB\-msoft\-quad\-float\fR option is the default.
|
18045 |
|
|
.IP "\fB\-mno\-unaligned\-doubles\fR" 4
|
18046 |
|
|
.IX Item "-mno-unaligned-doubles"
|
18047 |
|
|
.PD 0
|
18048 |
|
|
.IP "\fB\-munaligned\-doubles\fR" 4
|
18049 |
|
|
.IX Item "-munaligned-doubles"
|
18050 |
|
|
.PD
|
18051 |
|
|
Assume that doubles have 8\-byte alignment. This is the default.
|
18052 |
|
|
.Sp
|
18053 |
|
|
With \fB\-munaligned\-doubles\fR, \s-1GCC\s0 assumes that doubles have 8\-byte
|
18054 |
|
|
alignment only if they are contained in another type, or if they have an
|
18055 |
|
|
absolute address. Otherwise, it assumes they have 4\-byte alignment.
|
18056 |
|
|
Specifying this option avoids some rare compatibility problems with code
|
18057 |
|
|
generated by other compilers. It is not the default because it results
|
18058 |
|
|
in a performance loss, especially for floating-point code.
|
18059 |
|
|
.IP "\fB\-mno\-faster\-structs\fR" 4
|
18060 |
|
|
.IX Item "-mno-faster-structs"
|
18061 |
|
|
.PD 0
|
18062 |
|
|
.IP "\fB\-mfaster\-structs\fR" 4
|
18063 |
|
|
.IX Item "-mfaster-structs"
|
18064 |
|
|
.PD
|
18065 |
|
|
With \fB\-mfaster\-structs\fR, the compiler assumes that structures
|
18066 |
|
|
should have 8\-byte alignment. This enables the use of pairs of
|
18067 |
|
|
\&\f(CW\*(C`ldd\*(C'\fR and \f(CW\*(C`std\*(C'\fR instructions for copies in structure
|
18068 |
|
|
assignment, in place of twice as many \f(CW\*(C`ld\*(C'\fR and \f(CW\*(C`st\*(C'\fR pairs.
|
18069 |
|
|
However, the use of this changed alignment directly violates the \s-1SPARC\s0
|
18070 |
|
|
\&\s-1ABI\s0. Thus, it's intended only for use on targets where the developer
|
18071 |
|
|
acknowledges that their resulting code is not directly in line with
|
18072 |
|
|
the rules of the \s-1ABI\s0.
|
18073 |
|
|
.IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4
|
18074 |
|
|
.IX Item "-mcpu=cpu_type"
|
18075 |
|
|
Set the instruction set, register set, and instruction scheduling parameters
|
18076 |
|
|
for machine type \fIcpu_type\fR. Supported values for \fIcpu_type\fR are
|
18077 |
|
|
\&\fBv7\fR, \fBcypress\fR, \fBv8\fR, \fBsupersparc\fR, \fBhypersparc\fR,
|
18078 |
|
|
\&\fBleon\fR, \fBsparclite\fR, \fBf930\fR, \fBf934\fR, \fBsparclite86x\fR,
|
18079 |
|
|
\&\fBsparclet\fR, \fBtsc701\fR, \fBv9\fR, \fBultrasparc\fR,
|
18080 |
|
|
\&\fBultrasparc3\fR, \fBniagara\fR, \fBniagara2\fR, \fBniagara3\fR,
|
18081 |
|
|
and \fBniagara4\fR.
|
18082 |
|
|
.Sp
|
18083 |
|
|
Native Solaris and GNU/Linux toolchains also support the value \fBnative\fR,
|
18084 |
|
|
which selects the best architecture option for the host processor.
|
18085 |
|
|
\&\fB\-mcpu=native\fR has no effect if \s-1GCC\s0 does not recognize
|
18086 |
|
|
the processor.
|
18087 |
|
|
.Sp
|
18088 |
|
|
Default instruction scheduling parameters are used for values that select
|
18089 |
|
|
an architecture and not an implementation. These are \fBv7\fR, \fBv8\fR,
|
18090 |
|
|
\&\fBsparclite\fR, \fBsparclet\fR, \fBv9\fR.
|
18091 |
|
|
.Sp
|
18092 |
|
|
Here is a list of each supported architecture and their supported
|
18093 |
|
|
implementations.
|
18094 |
|
|
.RS 4
|
18095 |
|
|
.IP "v7" 4
|
18096 |
|
|
.IX Item "v7"
|
18097 |
|
|
cypress
|
18098 |
|
|
.IP "v8" 4
|
18099 |
|
|
.IX Item "v8"
|
18100 |
|
|
supersparc, hypersparc, leon
|
18101 |
|
|
.IP "sparclite" 4
|
18102 |
|
|
.IX Item "sparclite"
|
18103 |
|
|
f930, f934, sparclite86x
|
18104 |
|
|
.IP "sparclet" 4
|
18105 |
|
|
.IX Item "sparclet"
|
18106 |
|
|
tsc701
|
18107 |
|
|
.IP "v9" 4
|
18108 |
|
|
.IX Item "v9"
|
18109 |
|
|
ultrasparc, ultrasparc3, niagara, niagara2, niagara3, niagara4
|
18110 |
|
|
.RE
|
18111 |
|
|
.RS 4
|
18112 |
|
|
.Sp
|
18113 |
|
|
By default (unless configured otherwise), \s-1GCC\s0 generates code for the V7
|
18114 |
|
|
variant of the \s-1SPARC\s0 architecture. With \fB\-mcpu=cypress\fR, the compiler
|
18115 |
|
|
additionally optimizes it for the Cypress \s-1CY7C602\s0 chip, as used in the
|
18116 |
|
|
SPARCStation/SPARCServer 3xx series. This is also appropriate for the older
|
18117 |
|
|
SPARCStation 1, 2, \s-1IPX\s0 etc.
|
18118 |
|
|
.Sp
|
18119 |
|
|
With \fB\-mcpu=v8\fR, \s-1GCC\s0 generates code for the V8 variant of the \s-1SPARC\s0
|
18120 |
|
|
architecture. The only difference from V7 code is that the compiler emits
|
18121 |
|
|
the integer multiply and integer divide instructions which exist in \s-1SPARC\-V8\s0
|
18122 |
|
|
but not in \s-1SPARC\-V7\s0. With \fB\-mcpu=supersparc\fR, the compiler additionally
|
18123 |
|
|
optimizes it for the SuperSPARC chip, as used in the SPARCStation 10, 1000 and
|
18124 |
|
|
2000 series.
|
18125 |
|
|
.Sp
|
18126 |
|
|
With \fB\-mcpu=sparclite\fR, \s-1GCC\s0 generates code for the SPARClite variant of
|
18127 |
|
|
the \s-1SPARC\s0 architecture. This adds the integer multiply, integer divide step
|
18128 |
|
|
and scan (\f(CW\*(C`ffs\*(C'\fR) instructions which exist in SPARClite but not in \s-1SPARC\-V7\s0.
|
18129 |
|
|
With \fB\-mcpu=f930\fR, the compiler additionally optimizes it for the
|
18130 |
|
|
Fujitsu \s-1MB86930\s0 chip, which is the original SPARClite, with no \s-1FPU\s0. With
|
18131 |
|
|
\&\fB\-mcpu=f934\fR, the compiler additionally optimizes it for the Fujitsu
|
18132 |
|
|
\&\s-1MB86934\s0 chip, which is the more recent SPARClite with \s-1FPU\s0.
|
18133 |
|
|
.Sp
|
18134 |
|
|
With \fB\-mcpu=sparclet\fR, \s-1GCC\s0 generates code for the SPARClet variant of
|
18135 |
|
|
the \s-1SPARC\s0 architecture. This adds the integer multiply, multiply/accumulate,
|
18136 |
|
|
integer divide step and scan (\f(CW\*(C`ffs\*(C'\fR) instructions which exist in SPARClet
|
18137 |
|
|
but not in \s-1SPARC\-V7\s0. With \fB\-mcpu=tsc701\fR, the compiler additionally
|
18138 |
|
|
optimizes it for the \s-1TEMIC\s0 SPARClet chip.
|
18139 |
|
|
.Sp
|
18140 |
|
|
With \fB\-mcpu=v9\fR, \s-1GCC\s0 generates code for the V9 variant of the \s-1SPARC\s0
|
18141 |
|
|
architecture. This adds 64\-bit integer and floating-point move instructions,
|
18142 |
|
|
3 additional floating-point condition code registers and conditional move
|
18143 |
|
|
instructions. With \fB\-mcpu=ultrasparc\fR, the compiler additionally
|
18144 |
|
|
optimizes it for the Sun UltraSPARC I/II/IIi chips. With
|
18145 |
|
|
\&\fB\-mcpu=ultrasparc3\fR, the compiler additionally optimizes it for the
|
18146 |
|
|
Sun UltraSPARC III/III+/IIIi/IIIi+/IV/IV+ chips. With
|
18147 |
|
|
\&\fB\-mcpu=niagara\fR, the compiler additionally optimizes it for
|
18148 |
|
|
Sun UltraSPARC T1 chips. With \fB\-mcpu=niagara2\fR, the compiler
|
18149 |
|
|
additionally optimizes it for Sun UltraSPARC T2 chips. With
|
18150 |
|
|
\&\fB\-mcpu=niagara3\fR, the compiler additionally optimizes it for Sun
|
18151 |
|
|
UltraSPARC T3 chips. With \fB\-mcpu=niagara4\fR, the compiler
|
18152 |
|
|
additionally optimizes it for Sun UltraSPARC T4 chips.
|
18153 |
|
|
.RE
|
18154 |
|
|
.IP "\fB\-mtune=\fR\fIcpu_type\fR" 4
|
18155 |
|
|
.IX Item "-mtune=cpu_type"
|
18156 |
|
|
Set the instruction scheduling parameters for machine type
|
18157 |
|
|
\&\fIcpu_type\fR, but do not set the instruction set or register set that the
|
18158 |
|
|
option \fB\-mcpu=\fR\fIcpu_type\fR does.
|
18159 |
|
|
.Sp
|
18160 |
|
|
The same values for \fB\-mcpu=\fR\fIcpu_type\fR can be used for
|
18161 |
|
|
\&\fB\-mtune=\fR\fIcpu_type\fR, but the only useful values are those
|
18162 |
|
|
that select a particular \s-1CPU\s0 implementation. Those are \fBcypress\fR,
|
18163 |
|
|
\&\fBsupersparc\fR, \fBhypersparc\fR, \fBleon\fR, \fBf930\fR, \fBf934\fR,
|
18164 |
|
|
\&\fBsparclite86x\fR, \fBtsc701\fR, \fBultrasparc\fR, \fBultrasparc3\fR,
|
18165 |
|
|
\&\fBniagara\fR, \fBniagara2\fR, \fBniagara3\fR and \fBniagara4\fR. With
|
18166 |
|
|
native Solaris and GNU/Linux toolchains, \fBnative\fR can also be used.
|
18167 |
|
|
.IP "\fB\-mv8plus\fR" 4
|
18168 |
|
|
.IX Item "-mv8plus"
|
18169 |
|
|
.PD 0
|
18170 |
|
|
.IP "\fB\-mno\-v8plus\fR" 4
|
18171 |
|
|
.IX Item "-mno-v8plus"
|
18172 |
|
|
.PD
|
18173 |
|
|
With \fB\-mv8plus\fR, \s-1GCC\s0 generates code for the \s-1SPARC\-V8+\s0 \s-1ABI\s0. The
|
18174 |
|
|
difference from the V8 \s-1ABI\s0 is that the global and out registers are
|
18175 |
|
|
considered 64 bits wide. This is enabled by default on Solaris in 32\-bit
|
18176 |
|
|
mode for all \s-1SPARC\-V9\s0 processors.
|
18177 |
|
|
.IP "\fB\-mvis\fR" 4
|
18178 |
|
|
.IX Item "-mvis"
|
18179 |
|
|
.PD 0
|
18180 |
|
|
.IP "\fB\-mno\-vis\fR" 4
|
18181 |
|
|
.IX Item "-mno-vis"
|
18182 |
|
|
.PD
|
18183 |
|
|
With \fB\-mvis\fR, \s-1GCC\s0 generates code that takes advantage of the UltraSPARC
|
18184 |
|
|
Visual Instruction Set extensions. The default is \fB\-mno\-vis\fR.
|
18185 |
|
|
.IP "\fB\-mvis2\fR" 4
|
18186 |
|
|
.IX Item "-mvis2"
|
18187 |
|
|
.PD 0
|
18188 |
|
|
.IP "\fB\-mno\-vis2\fR" 4
|
18189 |
|
|
.IX Item "-mno-vis2"
|
18190 |
|
|
.PD
|
18191 |
|
|
With \fB\-mvis2\fR, \s-1GCC\s0 generates code that takes advantage of
|
18192 |
|
|
version 2.0 of the UltraSPARC Visual Instruction Set extensions. The
|
18193 |
|
|
default is \fB\-mvis2\fR when targeting a cpu that supports such
|
18194 |
|
|
instructions, such as UltraSPARC-III and later. Setting \fB\-mvis2\fR
|
18195 |
|
|
also sets \fB\-mvis\fR.
|
18196 |
|
|
.IP "\fB\-mvis3\fR" 4
|
18197 |
|
|
.IX Item "-mvis3"
|
18198 |
|
|
.PD 0
|
18199 |
|
|
.IP "\fB\-mno\-vis3\fR" 4
|
18200 |
|
|
.IX Item "-mno-vis3"
|
18201 |
|
|
.PD
|
18202 |
|
|
With \fB\-mvis3\fR, \s-1GCC\s0 generates code that takes advantage of
|
18203 |
|
|
version 3.0 of the UltraSPARC Visual Instruction Set extensions. The
|
18204 |
|
|
default is \fB\-mvis3\fR when targeting a cpu that supports such
|
18205 |
|
|
instructions, such as niagara\-3 and later. Setting \fB\-mvis3\fR
|
18206 |
|
|
also sets \fB\-mvis2\fR and \fB\-mvis\fR.
|
18207 |
|
|
.IP "\fB\-mcbcond\fR" 4
|
18208 |
|
|
.IX Item "-mcbcond"
|
18209 |
|
|
.PD 0
|
18210 |
|
|
.IP "\fB\-mno\-cbcond\fR" 4
|
18211 |
|
|
.IX Item "-mno-cbcond"
|
18212 |
|
|
.PD
|
18213 |
|
|
With \fB\-mcbcond\fR, \s-1GCC\s0 generates code that takes advantage of
|
18214 |
|
|
compare-and-branch instructions, as defined in the Sparc Architecture 2011.
|
18215 |
|
|
The default is \fB\-mcbcond\fR when targeting a cpu that supports such
|
18216 |
|
|
instructions, such as niagara\-4 and later.
|
18217 |
|
|
.IP "\fB\-mpopc\fR" 4
|
18218 |
|
|
.IX Item "-mpopc"
|
18219 |
|
|
.PD 0
|
18220 |
|
|
.IP "\fB\-mno\-popc\fR" 4
|
18221 |
|
|
.IX Item "-mno-popc"
|
18222 |
|
|
.PD
|
18223 |
|
|
With \fB\-mpopc\fR, \s-1GCC\s0 generates code that takes advantage of the UltraSPARC
|
18224 |
|
|
population count instruction. The default is \fB\-mpopc\fR
|
18225 |
|
|
when targeting a cpu that supports such instructions, such as Niagara\-2 and
|
18226 |
|
|
later.
|
18227 |
|
|
.IP "\fB\-mfmaf\fR" 4
|
18228 |
|
|
.IX Item "-mfmaf"
|
18229 |
|
|
.PD 0
|
18230 |
|
|
.IP "\fB\-mno\-fmaf\fR" 4
|
18231 |
|
|
.IX Item "-mno-fmaf"
|
18232 |
|
|
.PD
|
18233 |
|
|
With \fB\-mfmaf\fR, \s-1GCC\s0 generates code that takes advantage of the UltraSPARC
|
18234 |
|
|
Fused Multiply-Add Floating-point extensions. The default is \fB\-mfmaf\fR
|
18235 |
|
|
when targeting a cpu that supports such instructions, such as Niagara\-3 and
|
18236 |
|
|
later.
|
18237 |
|
|
.IP "\fB\-mfix\-at697f\fR" 4
|
18238 |
|
|
.IX Item "-mfix-at697f"
|
18239 |
|
|
Enable the documented workaround for the single erratum of the Atmel \s-1AT697F\s0
|
18240 |
|
|
processor (which corresponds to erratum #13 of the \s-1AT697E\s0 processor).
|
18241 |
|
|
.PP
|
18242 |
|
|
These \fB\-m\fR options are supported in addition to the above
|
18243 |
|
|
on \s-1SPARC\-V9\s0 processors in 64\-bit environments:
|
18244 |
|
|
.IP "\fB\-mlittle\-endian\fR" 4
|
18245 |
|
|
.IX Item "-mlittle-endian"
|
18246 |
|
|
Generate code for a processor running in little-endian mode. It is only
|
18247 |
|
|
available for a few configurations and most notably not on Solaris and Linux.
|
18248 |
|
|
.IP "\fB\-m32\fR" 4
|
18249 |
|
|
.IX Item "-m32"
|
18250 |
|
|
.PD 0
|
18251 |
|
|
.IP "\fB\-m64\fR" 4
|
18252 |
|
|
.IX Item "-m64"
|
18253 |
|
|
.PD
|
18254 |
|
|
Generate code for a 32\-bit or 64\-bit environment.
|
18255 |
|
|
The 32\-bit environment sets int, long and pointer to 32 bits.
|
18256 |
|
|
The 64\-bit environment sets int to 32 bits and long and pointer
|
18257 |
|
|
to 64 bits.
|
18258 |
|
|
.IP "\fB\-mcmodel=\fR\fIwhich\fR" 4
|
18259 |
|
|
.IX Item "-mcmodel=which"
|
18260 |
|
|
Set the code model to one of
|
18261 |
|
|
.RS 4
|
18262 |
|
|
.IP "\fBmedlow\fR" 4
|
18263 |
|
|
.IX Item "medlow"
|
18264 |
|
|
The Medium/Low code model: 64\-bit addresses, programs
|
18265 |
|
|
must be linked in the low 32 bits of memory. Programs can be statically
|
18266 |
|
|
or dynamically linked.
|
18267 |
|
|
.IP "\fBmedmid\fR" 4
|
18268 |
|
|
.IX Item "medmid"
|
18269 |
|
|
The Medium/Middle code model: 64\-bit addresses, programs
|
18270 |
|
|
must be linked in the low 44 bits of memory, the text and data segments must
|
18271 |
|
|
be less than 2GB in size and the data segment must be located within 2GB of
|
18272 |
|
|
the text segment.
|
18273 |
|
|
.IP "\fBmedany\fR" 4
|
18274 |
|
|
.IX Item "medany"
|
18275 |
|
|
The Medium/Anywhere code model: 64\-bit addresses, programs
|
18276 |
|
|
may be linked anywhere in memory, the text and data segments must be less
|
18277 |
|
|
than 2GB in size and the data segment must be located within 2GB of the
|
18278 |
|
|
text segment.
|
18279 |
|
|
.IP "\fBembmedany\fR" 4
|
18280 |
|
|
.IX Item "embmedany"
|
18281 |
|
|
The Medium/Anywhere code model for embedded systems:
|
18282 |
|
|
64\-bit addresses, the text and data segments must be less than 2GB in
|
18283 |
|
|
size, both starting anywhere in memory (determined at link time). The
|
18284 |
|
|
global register \f(CW%g4\fR points to the base of the data segment. Programs
|
18285 |
|
|
are statically linked and \s-1PIC\s0 is not supported.
|
18286 |
|
|
.RE
|
18287 |
|
|
.RS 4
|
18288 |
|
|
.RE
|
18289 |
|
|
.IP "\fB\-mmemory\-model=\fR\fImem-model\fR" 4
|
18290 |
|
|
.IX Item "-mmemory-model=mem-model"
|
18291 |
|
|
Set the memory model in force on the processor to one of
|
18292 |
|
|
.RS 4
|
18293 |
|
|
.IP "\fBdefault\fR" 4
|
18294 |
|
|
.IX Item "default"
|
18295 |
|
|
The default memory model for the processor and operating system.
|
18296 |
|
|
.IP "\fBrmo\fR" 4
|
18297 |
|
|
.IX Item "rmo"
|
18298 |
|
|
Relaxed Memory Order
|
18299 |
|
|
.IP "\fBpso\fR" 4
|
18300 |
|
|
.IX Item "pso"
|
18301 |
|
|
Partial Store Order
|
18302 |
|
|
.IP "\fBtso\fR" 4
|
18303 |
|
|
.IX Item "tso"
|
18304 |
|
|
Total Store Order
|
18305 |
|
|
.IP "\fBsc\fR" 4
|
18306 |
|
|
.IX Item "sc"
|
18307 |
|
|
Sequential Consistency
|
18308 |
|
|
.RE
|
18309 |
|
|
.RS 4
|
18310 |
|
|
.Sp
|
18311 |
|
|
These memory models are formally defined in Appendix D of the Sparc V9
|
18312 |
|
|
architecture manual, as set in the processor's \f(CW\*(C`PSTATE.MM\*(C'\fR field.
|
18313 |
|
|
.RE
|
18314 |
|
|
.IP "\fB\-mstack\-bias\fR" 4
|
18315 |
|
|
.IX Item "-mstack-bias"
|
18316 |
|
|
.PD 0
|
18317 |
|
|
.IP "\fB\-mno\-stack\-bias\fR" 4
|
18318 |
|
|
.IX Item "-mno-stack-bias"
|
18319 |
|
|
.PD
|
18320 |
|
|
With \fB\-mstack\-bias\fR, \s-1GCC\s0 assumes that the stack pointer, and
|
18321 |
|
|
frame pointer if present, are offset by \-2047 which must be added back
|
18322 |
|
|
when making stack frame references. This is the default in 64\-bit mode.
|
18323 |
|
|
Otherwise, assume no such offset is present.
|
18324 |
|
|
.PP
|
18325 |
|
|
\fI\s-1SPU\s0 Options\fR
|
18326 |
|
|
.IX Subsection "SPU Options"
|
18327 |
|
|
.PP
|
18328 |
|
|
These \fB\-m\fR options are supported on the \s-1SPU:\s0
|
18329 |
|
|
.IP "\fB\-mwarn\-reloc\fR" 4
|
18330 |
|
|
.IX Item "-mwarn-reloc"
|
18331 |
|
|
.PD 0
|
18332 |
|
|
.IP "\fB\-merror\-reloc\fR" 4
|
18333 |
|
|
.IX Item "-merror-reloc"
|
18334 |
|
|
.PD
|
18335 |
|
|
The loader for \s-1SPU\s0 does not handle dynamic relocations. By default, \s-1GCC\s0
|
18336 |
|
|
gives an error when it generates code that requires a dynamic
|
18337 |
|
|
relocation. \fB\-mno\-error\-reloc\fR disables the error,
|
18338 |
|
|
\&\fB\-mwarn\-reloc\fR generates a warning instead.
|
18339 |
|
|
.IP "\fB\-msafe\-dma\fR" 4
|
18340 |
|
|
.IX Item "-msafe-dma"
|
18341 |
|
|
.PD 0
|
18342 |
|
|
.IP "\fB\-munsafe\-dma\fR" 4
|
18343 |
|
|
.IX Item "-munsafe-dma"
|
18344 |
|
|
.PD
|
18345 |
|
|
Instructions that initiate or test completion of \s-1DMA\s0 must not be
|
18346 |
|
|
reordered with respect to loads and stores of the memory that is being
|
18347 |
|
|
accessed.
|
18348 |
|
|
With \fB\-munsafe\-dma\fR you must use the \f(CW\*(C`volatile\*(C'\fR keyword to protect
|
18349 |
|
|
memory accesses, but that can lead to inefficient code in places where the
|
18350 |
|
|
memory is known to not change. Rather than mark the memory as volatile,
|
18351 |
|
|
you can use \fB\-msafe\-dma\fR to tell the compiler to treat
|
18352 |
|
|
the \s-1DMA\s0 instructions as potentially affecting all memory.
|
18353 |
|
|
.IP "\fB\-mbranch\-hints\fR" 4
|
18354 |
|
|
.IX Item "-mbranch-hints"
|
18355 |
|
|
By default, \s-1GCC\s0 generates a branch hint instruction to avoid
|
18356 |
|
|
pipeline stalls for always-taken or probably-taken branches. A hint
|
18357 |
|
|
is not generated closer than 8 instructions away from its branch.
|
18358 |
|
|
There is little reason to disable them, except for debugging purposes,
|
18359 |
|
|
or to make an object a little bit smaller.
|
18360 |
|
|
.IP "\fB\-msmall\-mem\fR" 4
|
18361 |
|
|
.IX Item "-msmall-mem"
|
18362 |
|
|
.PD 0
|
18363 |
|
|
.IP "\fB\-mlarge\-mem\fR" 4
|
18364 |
|
|
.IX Item "-mlarge-mem"
|
18365 |
|
|
.PD
|
18366 |
|
|
By default, \s-1GCC\s0 generates code assuming that addresses are never larger
|
18367 |
|
|
than 18 bits. With \fB\-mlarge\-mem\fR code is generated that assumes
|
18368 |
|
|
a full 32\-bit address.
|
18369 |
|
|
.IP "\fB\-mstdmain\fR" 4
|
18370 |
|
|
.IX Item "-mstdmain"
|
18371 |
|
|
By default, \s-1GCC\s0 links against startup code that assumes the SPU-style
|
18372 |
|
|
main function interface (which has an unconventional parameter list).
|
18373 |
|
|
With \fB\-mstdmain\fR, \s-1GCC\s0 links your program against startup
|
18374 |
|
|
code that assumes a C99\-style interface to \f(CW\*(C`main\*(C'\fR, including a
|
18375 |
|
|
local copy of \f(CW\*(C`argv\*(C'\fR strings.
|
18376 |
|
|
.IP "\fB\-mfixed\-range=\fR\fIregister-range\fR" 4
|
18377 |
|
|
.IX Item "-mfixed-range=register-range"
|
18378 |
|
|
Generate code treating the given register range as fixed registers.
|
18379 |
|
|
A fixed register is one that the register allocator cannot use. This is
|
18380 |
|
|
useful when compiling kernel code. A register range is specified as
|
18381 |
|
|
two registers separated by a dash. Multiple register ranges can be
|
18382 |
|
|
specified separated by a comma.
|
18383 |
|
|
.IP "\fB\-mea32\fR" 4
|
18384 |
|
|
.IX Item "-mea32"
|
18385 |
|
|
.PD 0
|
18386 |
|
|
.IP "\fB\-mea64\fR" 4
|
18387 |
|
|
.IX Item "-mea64"
|
18388 |
|
|
.PD
|
18389 |
|
|
Compile code assuming that pointers to the \s-1PPU\s0 address space accessed
|
18390 |
|
|
via the \f(CW\*(C`_\|_ea\*(C'\fR named address space qualifier are either 32 or 64
|
18391 |
|
|
bits wide. The default is 32 bits. As this is an ABI-changing option,
|
18392 |
|
|
all object code in an executable must be compiled with the same setting.
|
18393 |
|
|
.IP "\fB\-maddress\-space\-conversion\fR" 4
|
18394 |
|
|
.IX Item "-maddress-space-conversion"
|
18395 |
|
|
.PD 0
|
18396 |
|
|
.IP "\fB\-mno\-address\-space\-conversion\fR" 4
|
18397 |
|
|
.IX Item "-mno-address-space-conversion"
|
18398 |
|
|
.PD
|
18399 |
|
|
Allow/disallow treating the \f(CW\*(C`_\|_ea\*(C'\fR address space as superset
|
18400 |
|
|
of the generic address space. This enables explicit type casts
|
18401 |
|
|
between \f(CW\*(C`_\|_ea\*(C'\fR and generic pointer as well as implicit
|
18402 |
|
|
conversions of generic pointers to \f(CW\*(C`_\|_ea\*(C'\fR pointers. The
|
18403 |
|
|
default is to allow address space pointer conversions.
|
18404 |
|
|
.IP "\fB\-mcache\-size=\fR\fIcache-size\fR" 4
|
18405 |
|
|
.IX Item "-mcache-size=cache-size"
|
18406 |
|
|
This option controls the version of libgcc that the compiler links to an
|
18407 |
|
|
executable and selects a software-managed cache for accessing variables
|
18408 |
|
|
in the \f(CW\*(C`_\|_ea\*(C'\fR address space with a particular cache size. Possible
|
18409 |
|
|
options for \fIcache-size\fR are \fB8\fR, \fB16\fR, \fB32\fR, \fB64\fR
|
18410 |
|
|
and \fB128\fR. The default cache size is 64KB.
|
18411 |
|
|
.IP "\fB\-matomic\-updates\fR" 4
|
18412 |
|
|
.IX Item "-matomic-updates"
|
18413 |
|
|
.PD 0
|
18414 |
|
|
.IP "\fB\-mno\-atomic\-updates\fR" 4
|
18415 |
|
|
.IX Item "-mno-atomic-updates"
|
18416 |
|
|
.PD
|
18417 |
|
|
This option controls the version of libgcc that the compiler links to an
|
18418 |
|
|
executable and selects whether atomic updates to the software-managed
|
18419 |
|
|
cache of PPU-side variables are used. If you use atomic updates, changes
|
18420 |
|
|
to a \s-1PPU\s0 variable from \s-1SPU\s0 code using the \f(CW\*(C`_\|_ea\*(C'\fR named address space
|
18421 |
|
|
qualifier do not interfere with changes to other \s-1PPU\s0 variables residing
|
18422 |
|
|
in the same cache line from \s-1PPU\s0 code. If you do not use atomic updates,
|
18423 |
|
|
such interference may occur; however, writing back cache lines is
|
18424 |
|
|
more efficient. The default behavior is to use atomic updates.
|
18425 |
|
|
.IP "\fB\-mdual\-nops\fR" 4
|
18426 |
|
|
.IX Item "-mdual-nops"
|
18427 |
|
|
.PD 0
|
18428 |
|
|
.IP "\fB\-mdual\-nops=\fR\fIn\fR" 4
|
18429 |
|
|
.IX Item "-mdual-nops=n"
|
18430 |
|
|
.PD
|
18431 |
|
|
By default, \s-1GCC\s0 inserts nops to increase dual issue when it expects
|
18432 |
|
|
it to increase performance. \fIn\fR can be a value from 0 to 10. A
|
18433 |
|
|
smaller \fIn\fR inserts fewer nops. 10 is the default, 0 is the
|
18434 |
|
|
same as \fB\-mno\-dual\-nops\fR. Disabled with \fB\-Os\fR.
|
18435 |
|
|
.IP "\fB\-mhint\-max\-nops=\fR\fIn\fR" 4
|
18436 |
|
|
.IX Item "-mhint-max-nops=n"
|
18437 |
|
|
Maximum number of nops to insert for a branch hint. A branch hint must
|
18438 |
|
|
be at least 8 instructions away from the branch it is affecting. \s-1GCC\s0
|
18439 |
|
|
inserts up to \fIn\fR nops to enforce this, otherwise it does not
|
18440 |
|
|
generate the branch hint.
|
18441 |
|
|
.IP "\fB\-mhint\-max\-distance=\fR\fIn\fR" 4
|
18442 |
|
|
.IX Item "-mhint-max-distance=n"
|
18443 |
|
|
The encoding of the branch hint instruction limits the hint to be within
|
18444 |
|
|
256 instructions of the branch it is affecting. By default, \s-1GCC\s0 makes
|
18445 |
|
|
sure it is within 125.
|
18446 |
|
|
.IP "\fB\-msafe\-hints\fR" 4
|
18447 |
|
|
.IX Item "-msafe-hints"
|
18448 |
|
|
Work around a hardware bug that causes the \s-1SPU\s0 to stall indefinitely.
|
18449 |
|
|
By default, \s-1GCC\s0 inserts the \f(CW\*(C`hbrp\*(C'\fR instruction to make sure
|
18450 |
|
|
this stall won't happen.
|
18451 |
|
|
.PP
|
18452 |
|
|
\fIOptions for System V\fR
|
18453 |
|
|
.IX Subsection "Options for System V"
|
18454 |
|
|
.PP
|
18455 |
|
|
These additional options are available on System V Release 4 for
|
18456 |
|
|
compatibility with other compilers on those systems:
|
18457 |
|
|
.IP "\fB\-G\fR" 4
|
18458 |
|
|
.IX Item "-G"
|
18459 |
|
|
Create a shared object.
|
18460 |
|
|
It is recommended that \fB\-symbolic\fR or \fB\-shared\fR be used instead.
|
18461 |
|
|
.IP "\fB\-Qy\fR" 4
|
18462 |
|
|
.IX Item "-Qy"
|
18463 |
|
|
Identify the versions of each tool used by the compiler, in a
|
18464 |
|
|
\&\f(CW\*(C`.ident\*(C'\fR assembler directive in the output.
|
18465 |
|
|
.IP "\fB\-Qn\fR" 4
|
18466 |
|
|
.IX Item "-Qn"
|
18467 |
|
|
Refrain from adding \f(CW\*(C`.ident\*(C'\fR directives to the output file (this is
|
18468 |
|
|
the default).
|
18469 |
|
|
.IP "\fB\-YP,\fR\fIdirs\fR" 4
|
18470 |
|
|
.IX Item "-YP,dirs"
|
18471 |
|
|
Search the directories \fIdirs\fR, and no others, for libraries
|
18472 |
|
|
specified with \fB\-l\fR.
|
18473 |
|
|
.IP "\fB\-Ym,\fR\fIdir\fR" 4
|
18474 |
|
|
.IX Item "-Ym,dir"
|
18475 |
|
|
Look in the directory \fIdir\fR to find the M4 preprocessor.
|
18476 |
|
|
The assembler uses this option.
|
18477 |
|
|
.PP
|
18478 |
|
|
\fITILE-Gx Options\fR
|
18479 |
|
|
.IX Subsection "TILE-Gx Options"
|
18480 |
|
|
.PP
|
18481 |
|
|
These \fB\-m\fR options are supported on the TILE-Gx:
|
18482 |
|
|
.IP "\fB\-mcmodel=small\fR" 4
|
18483 |
|
|
.IX Item "-mcmodel=small"
|
18484 |
|
|
Generate code for the small model. The distance for direct calls is
|
18485 |
|
|
limited to 500M in either direction. PC-relative addresses are 32
|
18486 |
|
|
bits. Absolute addresses support the full address range.
|
18487 |
|
|
.IP "\fB\-mcmodel=large\fR" 4
|
18488 |
|
|
.IX Item "-mcmodel=large"
|
18489 |
|
|
Generate code for the large model. There is no limitation on call
|
18490 |
|
|
distance, pc-relative addresses, or absolute addresses.
|
18491 |
|
|
.IP "\fB\-mcpu=\fR\fIname\fR" 4
|
18492 |
|
|
.IX Item "-mcpu=name"
|
18493 |
|
|
Selects the type of \s-1CPU\s0 to be targeted. Currently the only supported
|
18494 |
|
|
type is \fBtilegx\fR.
|
18495 |
|
|
.IP "\fB\-m32\fR" 4
|
18496 |
|
|
.IX Item "-m32"
|
18497 |
|
|
.PD 0
|
18498 |
|
|
.IP "\fB\-m64\fR" 4
|
18499 |
|
|
.IX Item "-m64"
|
18500 |
|
|
.PD
|
18501 |
|
|
Generate code for a 32\-bit or 64\-bit environment. The 32\-bit
|
18502 |
|
|
environment sets int, long, and pointer to 32 bits. The 64\-bit
|
18503 |
|
|
environment sets int to 32 bits and long and pointer to 64 bits.
|
18504 |
|
|
.PP
|
18505 |
|
|
\fITILEPro Options\fR
|
18506 |
|
|
.IX Subsection "TILEPro Options"
|
18507 |
|
|
.PP
|
18508 |
|
|
These \fB\-m\fR options are supported on the TILEPro:
|
18509 |
|
|
.IP "\fB\-mcpu=\fR\fIname\fR" 4
|
18510 |
|
|
.IX Item "-mcpu=name"
|
18511 |
|
|
Selects the type of \s-1CPU\s0 to be targeted. Currently the only supported
|
18512 |
|
|
type is \fBtilepro\fR.
|
18513 |
|
|
.IP "\fB\-m32\fR" 4
|
18514 |
|
|
.IX Item "-m32"
|
18515 |
|
|
Generate code for a 32\-bit environment, which sets int, long, and
|
18516 |
|
|
pointer to 32 bits. This is the only supported behavior so the flag
|
18517 |
|
|
is essentially ignored.
|
18518 |
|
|
.PP
|
18519 |
|
|
\fIV850 Options\fR
|
18520 |
|
|
.IX Subsection "V850 Options"
|
18521 |
|
|
.PP
|
18522 |
|
|
These \fB\-m\fR options are defined for V850 implementations:
|
18523 |
|
|
.IP "\fB\-mlong\-calls\fR" 4
|
18524 |
|
|
.IX Item "-mlong-calls"
|
18525 |
|
|
.PD 0
|
18526 |
|
|
.IP "\fB\-mno\-long\-calls\fR" 4
|
18527 |
|
|
.IX Item "-mno-long-calls"
|
18528 |
|
|
.PD
|
18529 |
|
|
Treat all calls as being far away (near). If calls are assumed to be
|
18530 |
|
|
far away, the compiler always loads the function's address into a
|
18531 |
|
|
register, and calls indirect through the pointer.
|
18532 |
|
|
.IP "\fB\-mno\-ep\fR" 4
|
18533 |
|
|
.IX Item "-mno-ep"
|
18534 |
|
|
.PD 0
|
18535 |
|
|
.IP "\fB\-mep\fR" 4
|
18536 |
|
|
.IX Item "-mep"
|
18537 |
|
|
.PD
|
18538 |
|
|
Do not optimize (do optimize) basic blocks that use the same index
|
18539 |
|
|
pointer 4 or more times to copy pointer into the \f(CW\*(C`ep\*(C'\fR register, and
|
18540 |
|
|
use the shorter \f(CW\*(C`sld\*(C'\fR and \f(CW\*(C`sst\*(C'\fR instructions. The \fB\-mep\fR
|
18541 |
|
|
option is on by default if you optimize.
|
18542 |
|
|
.IP "\fB\-mno\-prolog\-function\fR" 4
|
18543 |
|
|
.IX Item "-mno-prolog-function"
|
18544 |
|
|
.PD 0
|
18545 |
|
|
.IP "\fB\-mprolog\-function\fR" 4
|
18546 |
|
|
.IX Item "-mprolog-function"
|
18547 |
|
|
.PD
|
18548 |
|
|
Do not use (do use) external functions to save and restore registers
|
18549 |
|
|
at the prologue and epilogue of a function. The external functions
|
18550 |
|
|
are slower, but use less code space if more than one function saves
|
18551 |
|
|
the same number of registers. The \fB\-mprolog\-function\fR option
|
18552 |
|
|
is on by default if you optimize.
|
18553 |
|
|
.IP "\fB\-mspace\fR" 4
|
18554 |
|
|
.IX Item "-mspace"
|
18555 |
|
|
Try to make the code as small as possible. At present, this just turns
|
18556 |
|
|
on the \fB\-mep\fR and \fB\-mprolog\-function\fR options.
|
18557 |
|
|
.IP "\fB\-mtda=\fR\fIn\fR" 4
|
18558 |
|
|
.IX Item "-mtda=n"
|
18559 |
|
|
Put static or global variables whose size is \fIn\fR bytes or less into
|
18560 |
|
|
the tiny data area that register \f(CW\*(C`ep\*(C'\fR points to. The tiny data
|
18561 |
|
|
area can hold up to 256 bytes in total (128 bytes for byte references).
|
18562 |
|
|
.IP "\fB\-msda=\fR\fIn\fR" 4
|
18563 |
|
|
.IX Item "-msda=n"
|
18564 |
|
|
Put static or global variables whose size is \fIn\fR bytes or less into
|
18565 |
|
|
the small data area that register \f(CW\*(C`gp\*(C'\fR points to. The small data
|
18566 |
|
|
area can hold up to 64 kilobytes.
|
18567 |
|
|
.IP "\fB\-mzda=\fR\fIn\fR" 4
|
18568 |
|
|
.IX Item "-mzda=n"
|
18569 |
|
|
Put static or global variables whose size is \fIn\fR bytes or less into
|
18570 |
|
|
the first 32 kilobytes of memory.
|
18571 |
|
|
.IP "\fB\-mv850\fR" 4
|
18572 |
|
|
.IX Item "-mv850"
|
18573 |
|
|
Specify that the target processor is the V850.
|
18574 |
|
|
.IP "\fB\-mbig\-switch\fR" 4
|
18575 |
|
|
.IX Item "-mbig-switch"
|
18576 |
|
|
Generate code suitable for big switch tables. Use this option only if
|
18577 |
|
|
the assembler/linker complain about out of range branches within a switch
|
18578 |
|
|
table.
|
18579 |
|
|
.IP "\fB\-mapp\-regs\fR" 4
|
18580 |
|
|
.IX Item "-mapp-regs"
|
18581 |
|
|
This option causes r2 and r5 to be used in the code generated by
|
18582 |
|
|
the compiler. This setting is the default.
|
18583 |
|
|
.IP "\fB\-mno\-app\-regs\fR" 4
|
18584 |
|
|
.IX Item "-mno-app-regs"
|
18585 |
|
|
This option causes r2 and r5 to be treated as fixed registers.
|
18586 |
|
|
.IP "\fB\-mv850e2v3\fR" 4
|
18587 |
|
|
.IX Item "-mv850e2v3"
|
18588 |
|
|
Specify that the target processor is the V850E2V3. The preprocessor
|
18589 |
|
|
constant \fB_\|_v850e2v3_\|_\fR is defined if
|
18590 |
|
|
this option is used.
|
18591 |
|
|
.IP "\fB\-mv850e2\fR" 4
|
18592 |
|
|
.IX Item "-mv850e2"
|
18593 |
|
|
Specify that the target processor is the V850E2. The preprocessor
|
18594 |
|
|
constant \fB_\|_v850e2_\|_\fR is defined if this option is used.
|
18595 |
|
|
.IP "\fB\-mv850e1\fR" 4
|
18596 |
|
|
.IX Item "-mv850e1"
|
18597 |
|
|
Specify that the target processor is the V850E1. The preprocessor
|
18598 |
|
|
constants \fB_\|_v850e1_\|_\fR and \fB_\|_v850e_\|_\fR are defined if
|
18599 |
|
|
this option is used.
|
18600 |
|
|
.IP "\fB\-mv850es\fR" 4
|
18601 |
|
|
.IX Item "-mv850es"
|
18602 |
|
|
Specify that the target processor is the V850ES. This is an alias for
|
18603 |
|
|
the \fB\-mv850e1\fR option.
|
18604 |
|
|
.IP "\fB\-mv850e\fR" 4
|
18605 |
|
|
.IX Item "-mv850e"
|
18606 |
|
|
Specify that the target processor is the V850E. The preprocessor
|
18607 |
|
|
constant \fB_\|_v850e_\|_\fR is defined if this option is used.
|
18608 |
|
|
.Sp
|
18609 |
|
|
If neither \fB\-mv850\fR nor \fB\-mv850e\fR nor \fB\-mv850e1\fR
|
18610 |
|
|
nor \fB\-mv850e2\fR nor \fB\-mv850e2v3\fR
|
18611 |
|
|
are defined then a default target processor is chosen and the
|
18612 |
|
|
relevant \fB_\|_v850*_\|_\fR preprocessor constant is defined.
|
18613 |
|
|
.Sp
|
18614 |
|
|
The preprocessor constants \fB_\|_v850\fR and \fB_\|_v851_\|_\fR are always
|
18615 |
|
|
defined, regardless of which processor variant is the target.
|
18616 |
|
|
.IP "\fB\-mdisable\-callt\fR" 4
|
18617 |
|
|
.IX Item "-mdisable-callt"
|
18618 |
|
|
This option suppresses generation of the \f(CW\*(C`CALLT\*(C'\fR instruction for the
|
18619 |
|
|
v850e, v850e1, v850e2 and v850e2v3 flavors of the v850 architecture. The default is
|
18620 |
|
|
\&\fB\-mno\-disable\-callt\fR which allows the \f(CW\*(C`CALLT\*(C'\fR instruction to be used.
|
18621 |
|
|
.PP
|
18622 |
|
|
\fI\s-1VAX\s0 Options\fR
|
18623 |
|
|
.IX Subsection "VAX Options"
|
18624 |
|
|
.PP
|
18625 |
|
|
These \fB\-m\fR options are defined for the \s-1VAX:\s0
|
18626 |
|
|
.IP "\fB\-munix\fR" 4
|
18627 |
|
|
.IX Item "-munix"
|
18628 |
|
|
Do not output certain jump instructions (\f(CW\*(C`aobleq\*(C'\fR and so on)
|
18629 |
|
|
that the Unix assembler for the \s-1VAX\s0 cannot handle across long
|
18630 |
|
|
ranges.
|
18631 |
|
|
.IP "\fB\-mgnu\fR" 4
|
18632 |
|
|
.IX Item "-mgnu"
|
18633 |
|
|
Do output those jump instructions, on the assumption that the
|
18634 |
|
|
\&\s-1GNU\s0 assembler is being used.
|
18635 |
|
|
.IP "\fB\-mg\fR" 4
|
18636 |
|
|
.IX Item "-mg"
|
18637 |
|
|
Output code for G\-format floating-point numbers instead of D\-format.
|
18638 |
|
|
.PP
|
18639 |
|
|
\fI\s-1VMS\s0 Options\fR
|
18640 |
|
|
.IX Subsection "VMS Options"
|
18641 |
|
|
.PP
|
18642 |
|
|
These \fB\-m\fR options are defined for the \s-1VMS\s0 implementations:
|
18643 |
|
|
.IP "\fB\-mvms\-return\-codes\fR" 4
|
18644 |
|
|
.IX Item "-mvms-return-codes"
|
18645 |
|
|
Return \s-1VMS\s0 condition codes from \f(CW\*(C`main\*(C'\fR. The default is to return POSIX-style
|
18646 |
|
|
condition (e.g. error) codes.
|
18647 |
|
|
.IP "\fB\-mdebug\-main=\fR\fIprefix\fR" 4
|
18648 |
|
|
.IX Item "-mdebug-main=prefix"
|
18649 |
|
|
Flag the first routine whose name starts with \fIprefix\fR as the main
|
18650 |
|
|
routine for the debugger.
|
18651 |
|
|
.IP "\fB\-mmalloc64\fR" 4
|
18652 |
|
|
.IX Item "-mmalloc64"
|
18653 |
|
|
Default to 64\-bit memory allocation routines.
|
18654 |
|
|
.IP "\fB\-mpointer\-size=\fR\fIsize\fR" 4
|
18655 |
|
|
.IX Item "-mpointer-size=size"
|
18656 |
|
|
Set the default size of pointers. Possible options for \fIsize\fR are
|
18657 |
|
|
\&\fB32\fR or \fBshort\fR for 32 bit pointers, \fB64\fR or \fBlong\fR
|
18658 |
|
|
for 64 bit pointers, and \fBno\fR for supporting only 32 bit pointers.
|
18659 |
|
|
The later option disables \f(CW\*(C`pragma pointer_size\*(C'\fR.
|
18660 |
|
|
.PP
|
18661 |
|
|
\fIVxWorks Options\fR
|
18662 |
|
|
.IX Subsection "VxWorks Options"
|
18663 |
|
|
.PP
|
18664 |
|
|
The options in this section are defined for all VxWorks targets.
|
18665 |
|
|
Options specific to the target hardware are listed with the other
|
18666 |
|
|
options for that target.
|
18667 |
|
|
.IP "\fB\-mrtp\fR" 4
|
18668 |
|
|
.IX Item "-mrtp"
|
18669 |
|
|
\&\s-1GCC\s0 can generate code for both VxWorks kernels and real time processes
|
18670 |
|
|
(RTPs). This option switches from the former to the latter. It also
|
18671 |
|
|
defines the preprocessor macro \f(CW\*(C`_\|_RTP_\|_\*(C'\fR.
|
18672 |
|
|
.IP "\fB\-non\-static\fR" 4
|
18673 |
|
|
.IX Item "-non-static"
|
18674 |
|
|
Link an \s-1RTP\s0 executable against shared libraries rather than static
|
18675 |
|
|
libraries. The options \fB\-static\fR and \fB\-shared\fR can
|
18676 |
|
|
also be used for RTPs; \fB\-static\fR
|
18677 |
|
|
is the default.
|
18678 |
|
|
.IP "\fB\-Bstatic\fR" 4
|
18679 |
|
|
.IX Item "-Bstatic"
|
18680 |
|
|
.PD 0
|
18681 |
|
|
.IP "\fB\-Bdynamic\fR" 4
|
18682 |
|
|
.IX Item "-Bdynamic"
|
18683 |
|
|
.PD
|
18684 |
|
|
These options are passed down to the linker. They are defined for
|
18685 |
|
|
compatibility with Diab.
|
18686 |
|
|
.IP "\fB\-Xbind\-lazy\fR" 4
|
18687 |
|
|
.IX Item "-Xbind-lazy"
|
18688 |
|
|
Enable lazy binding of function calls. This option is equivalent to
|
18689 |
|
|
\&\fB\-Wl,\-z,now\fR and is defined for compatibility with Diab.
|
18690 |
|
|
.IP "\fB\-Xbind\-now\fR" 4
|
18691 |
|
|
.IX Item "-Xbind-now"
|
18692 |
|
|
Disable lazy binding of function calls. This option is the default and
|
18693 |
|
|
is defined for compatibility with Diab.
|
18694 |
|
|
.PP
|
18695 |
|
|
\fIx86\-64 Options\fR
|
18696 |
|
|
.IX Subsection "x86-64 Options"
|
18697 |
|
|
.PP
|
18698 |
|
|
These are listed under
|
18699 |
|
|
.PP
|
18700 |
|
|
\fIXstormy16 Options\fR
|
18701 |
|
|
.IX Subsection "Xstormy16 Options"
|
18702 |
|
|
.PP
|
18703 |
|
|
These options are defined for Xstormy16:
|
18704 |
|
|
.IP "\fB\-msim\fR" 4
|
18705 |
|
|
.IX Item "-msim"
|
18706 |
|
|
Choose startup files and linker script suitable for the simulator.
|
18707 |
|
|
.PP
|
18708 |
|
|
\fIXtensa Options\fR
|
18709 |
|
|
.IX Subsection "Xtensa Options"
|
18710 |
|
|
.PP
|
18711 |
|
|
These options are supported for Xtensa targets:
|
18712 |
|
|
.IP "\fB\-mconst16\fR" 4
|
18713 |
|
|
.IX Item "-mconst16"
|
18714 |
|
|
.PD 0
|
18715 |
|
|
.IP "\fB\-mno\-const16\fR" 4
|
18716 |
|
|
.IX Item "-mno-const16"
|
18717 |
|
|
.PD
|
18718 |
|
|
Enable or disable use of \f(CW\*(C`CONST16\*(C'\fR instructions for loading
|
18719 |
|
|
constant values. The \f(CW\*(C`CONST16\*(C'\fR instruction is currently not a
|
18720 |
|
|
standard option from Tensilica. When enabled, \f(CW\*(C`CONST16\*(C'\fR
|
18721 |
|
|
instructions are always used in place of the standard \f(CW\*(C`L32R\*(C'\fR
|
18722 |
|
|
instructions. The use of \f(CW\*(C`CONST16\*(C'\fR is enabled by default only if
|
18723 |
|
|
the \f(CW\*(C`L32R\*(C'\fR instruction is not available.
|
18724 |
|
|
.IP "\fB\-mfused\-madd\fR" 4
|
18725 |
|
|
.IX Item "-mfused-madd"
|
18726 |
|
|
.PD 0
|
18727 |
|
|
.IP "\fB\-mno\-fused\-madd\fR" 4
|
18728 |
|
|
.IX Item "-mno-fused-madd"
|
18729 |
|
|
.PD
|
18730 |
|
|
Enable or disable use of fused multiply/add and multiply/subtract
|
18731 |
|
|
instructions in the floating-point option. This has no effect if the
|
18732 |
|
|
floating-point option is not also enabled. Disabling fused multiply/add
|
18733 |
|
|
and multiply/subtract instructions forces the compiler to use separate
|
18734 |
|
|
instructions for the multiply and add/subtract operations. This may be
|
18735 |
|
|
desirable in some cases where strict \s-1IEEE\s0 754\-compliant results are
|
18736 |
|
|
required: the fused multiply add/subtract instructions do not round the
|
18737 |
|
|
intermediate result, thereby producing results with \fImore\fR bits of
|
18738 |
|
|
precision than specified by the \s-1IEEE\s0 standard. Disabling fused multiply
|
18739 |
|
|
add/subtract instructions also ensures that the program output is not
|
18740 |
|
|
sensitive to the compiler's ability to combine multiply and add/subtract
|
18741 |
|
|
operations.
|
18742 |
|
|
.IP "\fB\-mserialize\-volatile\fR" 4
|
18743 |
|
|
.IX Item "-mserialize-volatile"
|
18744 |
|
|
.PD 0
|
18745 |
|
|
.IP "\fB\-mno\-serialize\-volatile\fR" 4
|
18746 |
|
|
.IX Item "-mno-serialize-volatile"
|
18747 |
|
|
.PD
|
18748 |
|
|
When this option is enabled, \s-1GCC\s0 inserts \f(CW\*(C`MEMW\*(C'\fR instructions before
|
18749 |
|
|
\&\f(CW\*(C`volatile\*(C'\fR memory references to guarantee sequential consistency.
|
18750 |
|
|
The default is \fB\-mserialize\-volatile\fR. Use
|
18751 |
|
|
\&\fB\-mno\-serialize\-volatile\fR to omit the \f(CW\*(C`MEMW\*(C'\fR instructions.
|
18752 |
|
|
.IP "\fB\-mforce\-no\-pic\fR" 4
|
18753 |
|
|
.IX Item "-mforce-no-pic"
|
18754 |
|
|
For targets, like GNU/Linux, where all user-mode Xtensa code must be
|
18755 |
|
|
position-independent code (\s-1PIC\s0), this option disables \s-1PIC\s0 for compiling
|
18756 |
|
|
kernel code.
|
18757 |
|
|
.IP "\fB\-mtext\-section\-literals\fR" 4
|
18758 |
|
|
.IX Item "-mtext-section-literals"
|
18759 |
|
|
.PD 0
|
18760 |
|
|
.IP "\fB\-mno\-text\-section\-literals\fR" 4
|
18761 |
|
|
.IX Item "-mno-text-section-literals"
|
18762 |
|
|
.PD
|
18763 |
|
|
Control the treatment of literal pools. The default is
|
18764 |
|
|
\&\fB\-mno\-text\-section\-literals\fR, which places literals in a separate
|
18765 |
|
|
section in the output file. This allows the literal pool to be placed
|
18766 |
|
|
in a data \s-1RAM/ROM\s0, and it also allows the linker to combine literal
|
18767 |
|
|
pools from separate object files to remove redundant literals and
|
18768 |
|
|
improve code size. With \fB\-mtext\-section\-literals\fR, the literals
|
18769 |
|
|
are interspersed in the text section in order to keep them as close as
|
18770 |
|
|
possible to their references. This may be necessary for large assembly
|
18771 |
|
|
files.
|
18772 |
|
|
.IP "\fB\-mtarget\-align\fR" 4
|
18773 |
|
|
.IX Item "-mtarget-align"
|
18774 |
|
|
.PD 0
|
18775 |
|
|
.IP "\fB\-mno\-target\-align\fR" 4
|
18776 |
|
|
.IX Item "-mno-target-align"
|
18777 |
|
|
.PD
|
18778 |
|
|
When this option is enabled, \s-1GCC\s0 instructs the assembler to
|
18779 |
|
|
automatically align instructions to reduce branch penalties at the
|
18780 |
|
|
expense of some code density. The assembler attempts to widen density
|
18781 |
|
|
instructions to align branch targets and the instructions following call
|
18782 |
|
|
instructions. If there are not enough preceding safe density
|
18783 |
|
|
instructions to align a target, no widening is performed. The
|
18784 |
|
|
default is \fB\-mtarget\-align\fR. These options do not affect the
|
18785 |
|
|
treatment of auto-aligned instructions like \f(CW\*(C`LOOP\*(C'\fR, which the
|
18786 |
|
|
assembler always aligns, either by widening density instructions or
|
18787 |
|
|
by inserting \s-1NOP\s0 instructions.
|
18788 |
|
|
.IP "\fB\-mlongcalls\fR" 4
|
18789 |
|
|
.IX Item "-mlongcalls"
|
18790 |
|
|
.PD 0
|
18791 |
|
|
.IP "\fB\-mno\-longcalls\fR" 4
|
18792 |
|
|
.IX Item "-mno-longcalls"
|
18793 |
|
|
.PD
|
18794 |
|
|
When this option is enabled, \s-1GCC\s0 instructs the assembler to translate
|
18795 |
|
|
direct calls to indirect calls unless it can determine that the target
|
18796 |
|
|
of a direct call is in the range allowed by the call instruction. This
|
18797 |
|
|
translation typically occurs for calls to functions in other source
|
18798 |
|
|
files. Specifically, the assembler translates a direct \f(CW\*(C`CALL\*(C'\fR
|
18799 |
|
|
instruction into an \f(CW\*(C`L32R\*(C'\fR followed by a \f(CW\*(C`CALLX\*(C'\fR instruction.
|
18800 |
|
|
The default is \fB\-mno\-longcalls\fR. This option should be used in
|
18801 |
|
|
programs where the call target can potentially be out of range. This
|
18802 |
|
|
option is implemented in the assembler, not the compiler, so the
|
18803 |
|
|
assembly code generated by \s-1GCC\s0 still shows direct call
|
18804 |
|
|
instructions\-\-\-look at the disassembled object code to see the actual
|
18805 |
|
|
instructions. Note that the assembler uses an indirect call for
|
18806 |
|
|
every cross-file call, not just those that really are out of range.
|
18807 |
|
|
.PP
|
18808 |
|
|
\fIzSeries Options\fR
|
18809 |
|
|
.IX Subsection "zSeries Options"
|
18810 |
|
|
.PP
|
18811 |
|
|
These are listed under
|
18812 |
|
|
.SS "Options for Code Generation Conventions"
|
18813 |
|
|
.IX Subsection "Options for Code Generation Conventions"
|
18814 |
|
|
These machine-independent options control the interface conventions
|
18815 |
|
|
used in code generation.
|
18816 |
|
|
.PP
|
18817 |
|
|
Most of them have both positive and negative forms; the negative form
|
18818 |
|
|
of \fB\-ffoo\fR is \fB\-fno\-foo\fR. In the table below, only
|
18819 |
|
|
one of the forms is listed\-\-\-the one that is not the default. You
|
18820 |
|
|
can figure out the other form by either removing \fBno\-\fR or adding
|
18821 |
|
|
it.
|
18822 |
|
|
.IP "\fB\-fbounds\-check\fR" 4
|
18823 |
|
|
.IX Item "-fbounds-check"
|
18824 |
|
|
For front ends that support it, generate additional code to check that
|
18825 |
|
|
indices used to access arrays are within the declared range. This is
|
18826 |
|
|
currently only supported by the Java and Fortran front ends, where
|
18827 |
|
|
this option defaults to true and false respectively.
|
18828 |
|
|
.IP "\fB\-fstack\-reuse=\fR\fIreuse-level\fR" 4
|
18829 |
|
|
.IX Item "-fstack-reuse=reuse-level"
|
18830 |
|
|
This option controls stack space reuse for user declared local/auto variables
|
18831 |
|
|
and compiler generated temporaries. \fIreuse_level\fR can be \fBall\fR,
|
18832 |
|
|
\&\fBnamed_vars\fR, or \fBnone\fR. \fBall\fR enables stack reuse for all
|
18833 |
|
|
local variables and temporaries, \fBnamed_vars\fR enables the reuse only for
|
18834 |
|
|
user defined local variables with names, and \fBnone\fR disables stack reuse
|
18835 |
|
|
completely. The default value is \fBall\fR. The option is needed when the
|
18836 |
|
|
program extends the lifetime of a scoped local variable or a compiler generated
|
18837 |
|
|
temporary beyond the end point defined by the language. When a lifetime of
|
18838 |
|
|
a variable ends, and if the variable lives in memory, the optimizing compiler
|
18839 |
|
|
has the freedom to reuse its stack space with other temporaries or scoped
|
18840 |
|
|
local variables whose live range does not overlap with it. Legacy code extending
|
18841 |
|
|
local lifetime will likely to break with the stack reuse optimization.
|
18842 |
|
|
.Sp
|
18843 |
|
|
For example,
|
18844 |
|
|
.Sp
|
18845 |
|
|
.Vb 3
|
18846 |
|
|
\& int *p;
|
18847 |
|
|
\& {
|
18848 |
|
|
\& int local1;
|
18849 |
|
|
\&
|
18850 |
|
|
\& p = &local1;
|
18851 |
|
|
\& local1 = 10;
|
18852 |
|
|
\& ....
|
18853 |
|
|
\& }
|
18854 |
|
|
\& {
|
18855 |
|
|
\& int local2;
|
18856 |
|
|
\& local2 = 20;
|
18857 |
|
|
\& ...
|
18858 |
|
|
\& }
|
18859 |
|
|
\&
|
18860 |
|
|
\& if (*p == 10) // out of scope use of local1
|
18861 |
|
|
\& {
|
18862 |
|
|
\&
|
18863 |
|
|
\& }
|
18864 |
|
|
.Ve
|
18865 |
|
|
.Sp
|
18866 |
|
|
Another example:
|
18867 |
|
|
.Sp
|
18868 |
|
|
.Vb 6
|
18869 |
|
|
\& struct A
|
18870 |
|
|
\& {
|
18871 |
|
|
\& A(int k) : i(k), j(k) { }
|
18872 |
|
|
\& int i;
|
18873 |
|
|
\& int j;
|
18874 |
|
|
\& };
|
18875 |
|
|
\&
|
18876 |
|
|
\& A *ap;
|
18877 |
|
|
\&
|
18878 |
|
|
\& void foo(const A& ar)
|
18879 |
|
|
\& {
|
18880 |
|
|
\& ap = &ar;
|
18881 |
|
|
\& }
|
18882 |
|
|
\&
|
18883 |
|
|
\& void bar()
|
18884 |
|
|
\& {
|
18885 |
|
|
\& foo(A(10)); // temp object\*(Aqs lifetime ends when foo returns
|
18886 |
|
|
\&
|
18887 |
|
|
\& {
|
18888 |
|
|
\& A a(20);
|
18889 |
|
|
\& ....
|
18890 |
|
|
\& }
|
18891 |
|
|
\& ap\->i+= 10; // ap references out of scope temp whose space
|
18892 |
|
|
\& // is reused with a. What is the value of ap\->i?
|
18893 |
|
|
\& }
|
18894 |
|
|
.Ve
|
18895 |
|
|
.Sp
|
18896 |
|
|
The lifetime of a compiler generated temporary is well defined by the \*(C+
|
18897 |
|
|
standard. When a lifetime of a temporary ends, and if the temporary lives
|
18898 |
|
|
in memory, the optimizing compiler has the freedom to reuse its stack
|
18899 |
|
|
space with other temporaries or scoped local variables whose live range
|
18900 |
|
|
does not overlap with it. However some of the legacy code relies on
|
18901 |
|
|
the behavior of older compilers in which temporaries' stack space is
|
18902 |
|
|
not reused, the aggressive stack reuse can lead to runtime errors. This
|
18903 |
|
|
option is used to control the temporary stack reuse optimization.
|
18904 |
|
|
.IP "\fB\-ftrapv\fR" 4
|
18905 |
|
|
.IX Item "-ftrapv"
|
18906 |
|
|
This option generates traps for signed overflow on addition, subtraction,
|
18907 |
|
|
multiplication operations.
|
18908 |
|
|
.IP "\fB\-fwrapv\fR" 4
|
18909 |
|
|
.IX Item "-fwrapv"
|
18910 |
|
|
This option instructs the compiler to assume that signed arithmetic
|
18911 |
|
|
overflow of addition, subtraction and multiplication wraps around
|
18912 |
|
|
using twos-complement representation. This flag enables some optimizations
|
18913 |
|
|
and disables others. This option is enabled by default for the Java
|
18914 |
|
|
front end, as required by the Java language specification.
|
18915 |
|
|
.IP "\fB\-fexceptions\fR" 4
|
18916 |
|
|
.IX Item "-fexceptions"
|
18917 |
|
|
Enable exception handling. Generates extra code needed to propagate
|
18918 |
|
|
exceptions. For some targets, this implies \s-1GCC\s0 generates frame
|
18919 |
|
|
unwind information for all functions, which can produce significant data
|
18920 |
|
|
size overhead, although it does not affect execution. If you do not
|
18921 |
|
|
specify this option, \s-1GCC\s0 enables it by default for languages like
|
18922 |
|
|
\&\*(C+ that normally require exception handling, and disables it for
|
18923 |
|
|
languages like C that do not normally require it. However, you may need
|
18924 |
|
|
to enable this option when compiling C code that needs to interoperate
|
18925 |
|
|
properly with exception handlers written in \*(C+. You may also wish to
|
18926 |
|
|
disable this option if you are compiling older \*(C+ programs that don't
|
18927 |
|
|
use exception handling.
|
18928 |
|
|
.IP "\fB\-fnon\-call\-exceptions\fR" 4
|
18929 |
|
|
.IX Item "-fnon-call-exceptions"
|
18930 |
|
|
Generate code that allows trapping instructions to throw exceptions.
|
18931 |
|
|
Note that this requires platform-specific runtime support that does
|
18932 |
|
|
not exist everywhere. Moreover, it only allows \fItrapping\fR
|
18933 |
|
|
instructions to throw exceptions, i.e. memory references or floating-point
|
18934 |
|
|
instructions. It does not allow exceptions to be thrown from
|
18935 |
|
|
arbitrary signal handlers such as \f(CW\*(C`SIGALRM\*(C'\fR.
|
18936 |
|
|
.IP "\fB\-fdelete\-dead\-exceptions\fR" 4
|
18937 |
|
|
.IX Item "-fdelete-dead-exceptions"
|
18938 |
|
|
Consider that instructions that may throw exceptions but don't otherwise
|
18939 |
|
|
contribute to the execution of the program can be optimized away.
|
18940 |
|
|
This option is enabled by default for the Ada front end, as permitted by
|
18941 |
|
|
the Ada language specification.
|
18942 |
|
|
Optimization passes that cause dead exceptions to be removed are enabled independently at different optimization levels.
|
18943 |
|
|
.IP "\fB\-funwind\-tables\fR" 4
|
18944 |
|
|
.IX Item "-funwind-tables"
|
18945 |
|
|
Similar to \fB\-fexceptions\fR, except that it just generates any needed
|
18946 |
|
|
static data, but does not affect the generated code in any other way.
|
18947 |
|
|
You normally do not need to enable this option; instead, a language processor
|
18948 |
|
|
that needs this handling enables it on your behalf.
|
18949 |
|
|
.IP "\fB\-fasynchronous\-unwind\-tables\fR" 4
|
18950 |
|
|
.IX Item "-fasynchronous-unwind-tables"
|
18951 |
|
|
Generate unwind table in \s-1DWARF\s0 2 format, if supported by target machine. The
|
18952 |
|
|
table is exact at each instruction boundary, so it can be used for stack
|
18953 |
|
|
unwinding from asynchronous events (such as debugger or garbage collector).
|
18954 |
|
|
.IP "\fB\-fpcc\-struct\-return\fR" 4
|
18955 |
|
|
.IX Item "-fpcc-struct-return"
|
18956 |
|
|
Return \*(L"short\*(R" \f(CW\*(C`struct\*(C'\fR and \f(CW\*(C`union\*(C'\fR values in memory like
|
18957 |
|
|
longer ones, rather than in registers. This convention is less
|
18958 |
|
|
efficient, but it has the advantage of allowing intercallability between
|
18959 |
|
|
GCC-compiled files and files compiled with other compilers, particularly
|
18960 |
|
|
the Portable C Compiler (pcc).
|
18961 |
|
|
.Sp
|
18962 |
|
|
The precise convention for returning structures in memory depends
|
18963 |
|
|
on the target configuration macros.
|
18964 |
|
|
.Sp
|
18965 |
|
|
Short structures and unions are those whose size and alignment match
|
18966 |
|
|
that of some integer type.
|
18967 |
|
|
.Sp
|
18968 |
|
|
\&\fBWarning:\fR code compiled with the \fB\-fpcc\-struct\-return\fR
|
18969 |
|
|
switch is not binary compatible with code compiled with the
|
18970 |
|
|
\&\fB\-freg\-struct\-return\fR switch.
|
18971 |
|
|
Use it to conform to a non-default application binary interface.
|
18972 |
|
|
.IP "\fB\-freg\-struct\-return\fR" 4
|
18973 |
|
|
.IX Item "-freg-struct-return"
|
18974 |
|
|
Return \f(CW\*(C`struct\*(C'\fR and \f(CW\*(C`union\*(C'\fR values in registers when possible.
|
18975 |
|
|
This is more efficient for small structures than
|
18976 |
|
|
\&\fB\-fpcc\-struct\-return\fR.
|
18977 |
|
|
.Sp
|
18978 |
|
|
If you specify neither \fB\-fpcc\-struct\-return\fR nor
|
18979 |
|
|
\&\fB\-freg\-struct\-return\fR, \s-1GCC\s0 defaults to whichever convention is
|
18980 |
|
|
standard for the target. If there is no standard convention, \s-1GCC\s0
|
18981 |
|
|
defaults to \fB\-fpcc\-struct\-return\fR, except on targets where \s-1GCC\s0 is
|
18982 |
|
|
the principal compiler. In those cases, we can choose the standard, and
|
18983 |
|
|
we chose the more efficient register return alternative.
|
18984 |
|
|
.Sp
|
18985 |
|
|
\&\fBWarning:\fR code compiled with the \fB\-freg\-struct\-return\fR
|
18986 |
|
|
switch is not binary compatible with code compiled with the
|
18987 |
|
|
\&\fB\-fpcc\-struct\-return\fR switch.
|
18988 |
|
|
Use it to conform to a non-default application binary interface.
|
18989 |
|
|
.IP "\fB\-fshort\-enums\fR" 4
|
18990 |
|
|
.IX Item "-fshort-enums"
|
18991 |
|
|
Allocate to an \f(CW\*(C`enum\*(C'\fR type only as many bytes as it needs for the
|
18992 |
|
|
declared range of possible values. Specifically, the \f(CW\*(C`enum\*(C'\fR type
|
18993 |
|
|
is equivalent to the smallest integer type that has enough room.
|
18994 |
|
|
.Sp
|
18995 |
|
|
\&\fBWarning:\fR the \fB\-fshort\-enums\fR switch causes \s-1GCC\s0 to generate
|
18996 |
|
|
code that is not binary compatible with code generated without that switch.
|
18997 |
|
|
Use it to conform to a non-default application binary interface.
|
18998 |
|
|
.IP "\fB\-fshort\-double\fR" 4
|
18999 |
|
|
.IX Item "-fshort-double"
|
19000 |
|
|
Use the same size for \f(CW\*(C`double\*(C'\fR as for \f(CW\*(C`float\*(C'\fR.
|
19001 |
|
|
.Sp
|
19002 |
|
|
\&\fBWarning:\fR the \fB\-fshort\-double\fR switch causes \s-1GCC\s0 to generate
|
19003 |
|
|
code that is not binary compatible with code generated without that switch.
|
19004 |
|
|
Use it to conform to a non-default application binary interface.
|
19005 |
|
|
.IP "\fB\-fshort\-wchar\fR" 4
|
19006 |
|
|
.IX Item "-fshort-wchar"
|
19007 |
|
|
Override the underlying type for \fBwchar_t\fR to be \fBshort
|
19008 |
|
|
unsigned int\fR instead of the default for the target. This option is
|
19009 |
|
|
useful for building programs to run under \s-1WINE\s0.
|
19010 |
|
|
.Sp
|
19011 |
|
|
\&\fBWarning:\fR the \fB\-fshort\-wchar\fR switch causes \s-1GCC\s0 to generate
|
19012 |
|
|
code that is not binary compatible with code generated without that switch.
|
19013 |
|
|
Use it to conform to a non-default application binary interface.
|
19014 |
|
|
.IP "\fB\-fno\-common\fR" 4
|
19015 |
|
|
.IX Item "-fno-common"
|
19016 |
|
|
In C code, controls the placement of uninitialized global variables.
|
19017 |
|
|
Unix C compilers have traditionally permitted multiple definitions of
|
19018 |
|
|
such variables in different compilation units by placing the variables
|
19019 |
|
|
in a common block.
|
19020 |
|
|
This is the behavior specified by \fB\-fcommon\fR, and is the default
|
19021 |
|
|
for \s-1GCC\s0 on most targets.
|
19022 |
|
|
On the other hand, this behavior is not required by \s-1ISO\s0 C, and on some
|
19023 |
|
|
targets may carry a speed or code size penalty on variable references.
|
19024 |
|
|
The \fB\-fno\-common\fR option specifies that the compiler should place
|
19025 |
|
|
uninitialized global variables in the data section of the object file,
|
19026 |
|
|
rather than generating them as common blocks.
|
19027 |
|
|
This has the effect that if the same variable is declared
|
19028 |
|
|
(without \f(CW\*(C`extern\*(C'\fR) in two different compilations,
|
19029 |
|
|
you get a multiple-definition error when you link them.
|
19030 |
|
|
In this case, you must compile with \fB\-fcommon\fR instead.
|
19031 |
|
|
Compiling with \fB\-fno\-common\fR is useful on targets for which
|
19032 |
|
|
it provides better performance, or if you wish to verify that the
|
19033 |
|
|
program will work on other systems that always treat uninitialized
|
19034 |
|
|
variable declarations this way.
|
19035 |
|
|
.IP "\fB\-fno\-ident\fR" 4
|
19036 |
|
|
.IX Item "-fno-ident"
|
19037 |
|
|
Ignore the \fB#ident\fR directive.
|
19038 |
|
|
.IP "\fB\-finhibit\-size\-directive\fR" 4
|
19039 |
|
|
.IX Item "-finhibit-size-directive"
|
19040 |
|
|
Don't output a \f(CW\*(C`.size\*(C'\fR assembler directive, or anything else that
|
19041 |
|
|
would cause trouble if the function is split in the middle, and the
|
19042 |
|
|
two halves are placed at locations far apart in memory. This option is
|
19043 |
|
|
used when compiling \fIcrtstuff.c\fR; you should not need to use it
|
19044 |
|
|
for anything else.
|
19045 |
|
|
.IP "\fB\-fverbose\-asm\fR" 4
|
19046 |
|
|
.IX Item "-fverbose-asm"
|
19047 |
|
|
Put extra commentary information in the generated assembly code to
|
19048 |
|
|
make it more readable. This option is generally only of use to those
|
19049 |
|
|
who actually need to read the generated assembly code (perhaps while
|
19050 |
|
|
debugging the compiler itself).
|
19051 |
|
|
.Sp
|
19052 |
|
|
\&\fB\-fno\-verbose\-asm\fR, the default, causes the
|
19053 |
|
|
extra information to be omitted and is useful when comparing two assembler
|
19054 |
|
|
files.
|
19055 |
|
|
.IP "\fB\-frecord\-gcc\-switches\fR" 4
|
19056 |
|
|
.IX Item "-frecord-gcc-switches"
|
19057 |
|
|
This switch causes the command line used to invoke the
|
19058 |
|
|
compiler to be recorded into the object file that is being created.
|
19059 |
|
|
This switch is only implemented on some targets and the exact format
|
19060 |
|
|
of the recording is target and binary file format dependent, but it
|
19061 |
|
|
usually takes the form of a section containing \s-1ASCII\s0 text. This
|
19062 |
|
|
switch is related to the \fB\-fverbose\-asm\fR switch, but that
|
19063 |
|
|
switch only records information in the assembler output file as
|
19064 |
|
|
comments, so it never reaches the object file.
|
19065 |
|
|
See also \fB\-grecord\-gcc\-switches\fR for another
|
19066 |
|
|
way of storing compiler options into the object file.
|
19067 |
|
|
.IP "\fB\-fpic\fR" 4
|
19068 |
|
|
.IX Item "-fpic"
|
19069 |
|
|
Generate position-independent code (\s-1PIC\s0) suitable for use in a shared
|
19070 |
|
|
library, if supported for the target machine. Such code accesses all
|
19071 |
|
|
constant addresses through a global offset table (\s-1GOT\s0). The dynamic
|
19072 |
|
|
loader resolves the \s-1GOT\s0 entries when the program starts (the dynamic
|
19073 |
|
|
loader is not part of \s-1GCC\s0; it is part of the operating system). If
|
19074 |
|
|
the \s-1GOT\s0 size for the linked executable exceeds a machine-specific
|
19075 |
|
|
maximum size, you get an error message from the linker indicating that
|
19076 |
|
|
\&\fB\-fpic\fR does not work; in that case, recompile with \fB\-fPIC\fR
|
19077 |
|
|
instead. (These maximums are 8k on the \s-1SPARC\s0 and 32k
|
19078 |
|
|
on the m68k and \s-1RS/6000\s0. The 386 has no such limit.)
|
19079 |
|
|
.Sp
|
19080 |
|
|
Position-independent code requires special support, and therefore works
|
19081 |
|
|
only on certain machines. For the 386, \s-1GCC\s0 supports \s-1PIC\s0 for System V
|
19082 |
|
|
but not for the Sun 386i. Code generated for the \s-1IBM\s0 \s-1RS/6000\s0 is always
|
19083 |
|
|
position-independent.
|
19084 |
|
|
.Sp
|
19085 |
|
|
When this flag is set, the macros \f(CW\*(C`_\|_pic_\|_\*(C'\fR and \f(CW\*(C`_\|_PIC_\|_\*(C'\fR
|
19086 |
|
|
are defined to 1.
|
19087 |
|
|
.IP "\fB\-fPIC\fR" 4
|
19088 |
|
|
.IX Item "-fPIC"
|
19089 |
|
|
If supported for the target machine, emit position-independent code,
|
19090 |
|
|
suitable for dynamic linking and avoiding any limit on the size of the
|
19091 |
|
|
global offset table. This option makes a difference on the m68k,
|
19092 |
|
|
PowerPC and \s-1SPARC\s0.
|
19093 |
|
|
.Sp
|
19094 |
|
|
Position-independent code requires special support, and therefore works
|
19095 |
|
|
only on certain machines.
|
19096 |
|
|
.Sp
|
19097 |
|
|
When this flag is set, the macros \f(CW\*(C`_\|_pic_\|_\*(C'\fR and \f(CW\*(C`_\|_PIC_\|_\*(C'\fR
|
19098 |
|
|
are defined to 2.
|
19099 |
|
|
.IP "\fB\-fpie\fR" 4
|
19100 |
|
|
.IX Item "-fpie"
|
19101 |
|
|
.PD 0
|
19102 |
|
|
.IP "\fB\-fPIE\fR" 4
|
19103 |
|
|
.IX Item "-fPIE"
|
19104 |
|
|
.PD
|
19105 |
|
|
These options are similar to \fB\-fpic\fR and \fB\-fPIC\fR, but
|
19106 |
|
|
generated position independent code can be only linked into executables.
|
19107 |
|
|
Usually these options are used when \fB\-pie\fR \s-1GCC\s0 option is
|
19108 |
|
|
used during linking.
|
19109 |
|
|
.Sp
|
19110 |
|
|
\&\fB\-fpie\fR and \fB\-fPIE\fR both define the macros
|
19111 |
|
|
\&\f(CW\*(C`_\|_pie_\|_\*(C'\fR and \f(CW\*(C`_\|_PIE_\|_\*(C'\fR. The macros have the value 1
|
19112 |
|
|
for \fB\-fpie\fR and 2 for \fB\-fPIE\fR.
|
19113 |
|
|
.IP "\fB\-fno\-jump\-tables\fR" 4
|
19114 |
|
|
.IX Item "-fno-jump-tables"
|
19115 |
|
|
Do not use jump tables for switch statements even where it would be
|
19116 |
|
|
more efficient than other code generation strategies. This option is
|
19117 |
|
|
of use in conjunction with \fB\-fpic\fR or \fB\-fPIC\fR for
|
19118 |
|
|
building code that forms part of a dynamic linker and cannot
|
19119 |
|
|
reference the address of a jump table. On some targets, jump tables
|
19120 |
|
|
do not require a \s-1GOT\s0 and this option is not needed.
|
19121 |
|
|
.IP "\fB\-ffixed\-\fR\fIreg\fR" 4
|
19122 |
|
|
.IX Item "-ffixed-reg"
|
19123 |
|
|
Treat the register named \fIreg\fR as a fixed register; generated code
|
19124 |
|
|
should never refer to it (except perhaps as a stack pointer, frame
|
19125 |
|
|
pointer or in some other fixed role).
|
19126 |
|
|
.Sp
|
19127 |
|
|
\&\fIreg\fR must be the name of a register. The register names accepted
|
19128 |
|
|
are machine-specific and are defined in the \f(CW\*(C`REGISTER_NAMES\*(C'\fR
|
19129 |
|
|
macro in the machine description macro file.
|
19130 |
|
|
.Sp
|
19131 |
|
|
This flag does not have a negative form, because it specifies a
|
19132 |
|
|
three-way choice.
|
19133 |
|
|
.IP "\fB\-fcall\-used\-\fR\fIreg\fR" 4
|
19134 |
|
|
.IX Item "-fcall-used-reg"
|
19135 |
|
|
Treat the register named \fIreg\fR as an allocable register that is
|
19136 |
|
|
clobbered by function calls. It may be allocated for temporaries or
|
19137 |
|
|
variables that do not live across a call. Functions compiled this way
|
19138 |
|
|
do not save and restore the register \fIreg\fR.
|
19139 |
|
|
.Sp
|
19140 |
|
|
It is an error to use this flag with the frame pointer or stack pointer.
|
19141 |
|
|
Use of this flag for other registers that have fixed pervasive roles in
|
19142 |
|
|
the machine's execution model produces disastrous results.
|
19143 |
|
|
.Sp
|
19144 |
|
|
This flag does not have a negative form, because it specifies a
|
19145 |
|
|
three-way choice.
|
19146 |
|
|
.IP "\fB\-fcall\-saved\-\fR\fIreg\fR" 4
|
19147 |
|
|
.IX Item "-fcall-saved-reg"
|
19148 |
|
|
Treat the register named \fIreg\fR as an allocable register saved by
|
19149 |
|
|
functions. It may be allocated even for temporaries or variables that
|
19150 |
|
|
live across a call. Functions compiled this way save and restore
|
19151 |
|
|
the register \fIreg\fR if they use it.
|
19152 |
|
|
.Sp
|
19153 |
|
|
It is an error to use this flag with the frame pointer or stack pointer.
|
19154 |
|
|
Use of this flag for other registers that have fixed pervasive roles in
|
19155 |
|
|
the machine's execution model produces disastrous results.
|
19156 |
|
|
.Sp
|
19157 |
|
|
A different sort of disaster results from the use of this flag for
|
19158 |
|
|
a register in which function values may be returned.
|
19159 |
|
|
.Sp
|
19160 |
|
|
This flag does not have a negative form, because it specifies a
|
19161 |
|
|
three-way choice.
|
19162 |
|
|
.IP "\fB\-fpack\-struct[=\fR\fIn\fR\fB]\fR" 4
|
19163 |
|
|
.IX Item "-fpack-struct[=n]"
|
19164 |
|
|
Without a value specified, pack all structure members together without
|
19165 |
|
|
holes. When a value is specified (which must be a small power of two), pack
|
19166 |
|
|
structure members according to this value, representing the maximum
|
19167 |
|
|
alignment (that is, objects with default alignment requirements larger than
|
19168 |
|
|
this are output potentially unaligned at the next fitting location.
|
19169 |
|
|
.Sp
|
19170 |
|
|
\&\fBWarning:\fR the \fB\-fpack\-struct\fR switch causes \s-1GCC\s0 to generate
|
19171 |
|
|
code that is not binary compatible with code generated without that switch.
|
19172 |
|
|
Additionally, it makes the code suboptimal.
|
19173 |
|
|
Use it to conform to a non-default application binary interface.
|
19174 |
|
|
.IP "\fB\-finstrument\-functions\fR" 4
|
19175 |
|
|
.IX Item "-finstrument-functions"
|
19176 |
|
|
Generate instrumentation calls for entry and exit to functions. Just
|
19177 |
|
|
after function entry and just before function exit, the following
|
19178 |
|
|
profiling functions are called with the address of the current
|
19179 |
|
|
function and its call site. (On some platforms,
|
19180 |
|
|
\&\f(CW\*(C`_\|_builtin_return_address\*(C'\fR does not work beyond the current
|
19181 |
|
|
function, so the call site information may not be available to the
|
19182 |
|
|
profiling functions otherwise.)
|
19183 |
|
|
.Sp
|
19184 |
|
|
.Vb 4
|
19185 |
|
|
\& void _\|_cyg_profile_func_enter (void *this_fn,
|
19186 |
|
|
\& void *call_site);
|
19187 |
|
|
\& void _\|_cyg_profile_func_exit (void *this_fn,
|
19188 |
|
|
\& void *call_site);
|
19189 |
|
|
.Ve
|
19190 |
|
|
.Sp
|
19191 |
|
|
The first argument is the address of the start of the current function,
|
19192 |
|
|
which may be looked up exactly in the symbol table.
|
19193 |
|
|
.Sp
|
19194 |
|
|
This instrumentation is also done for functions expanded inline in other
|
19195 |
|
|
functions. The profiling calls indicate where, conceptually, the
|
19196 |
|
|
inline function is entered and exited. This means that addressable
|
19197 |
|
|
versions of such functions must be available. If all your uses of a
|
19198 |
|
|
function are expanded inline, this may mean an additional expansion of
|
19199 |
|
|
code size. If you use \fBextern inline\fR in your C code, an
|
19200 |
|
|
addressable version of such functions must be provided. (This is
|
19201 |
|
|
normally the case anyway, but if you get lucky and the optimizer always
|
19202 |
|
|
expands the functions inline, you might have gotten away without
|
19203 |
|
|
providing static copies.)
|
19204 |
|
|
.Sp
|
19205 |
|
|
A function may be given the attribute \f(CW\*(C`no_instrument_function\*(C'\fR, in
|
19206 |
|
|
which case this instrumentation is not done. This can be used, for
|
19207 |
|
|
example, for the profiling functions listed above, high-priority
|
19208 |
|
|
interrupt routines, and any functions from which the profiling functions
|
19209 |
|
|
cannot safely be called (perhaps signal handlers, if the profiling
|
19210 |
|
|
routines generate output or allocate memory).
|
19211 |
|
|
.IP "\fB\-finstrument\-functions\-exclude\-file\-list=\fR\fIfile\fR\fB,\fR\fIfile\fR\fB,...\fR" 4
|
19212 |
|
|
.IX Item "-finstrument-functions-exclude-file-list=file,file,..."
|
19213 |
|
|
Set the list of functions that are excluded from instrumentation (see
|
19214 |
|
|
the description of \f(CW\*(C`\-finstrument\-functions\*(C'\fR). If the file that
|
19215 |
|
|
contains a function definition matches with one of \fIfile\fR, then
|
19216 |
|
|
that function is not instrumented. The match is done on substrings:
|
19217 |
|
|
if the \fIfile\fR parameter is a substring of the file name, it is
|
19218 |
|
|
considered to be a match.
|
19219 |
|
|
.Sp
|
19220 |
|
|
For example:
|
19221 |
|
|
.Sp
|
19222 |
|
|
.Vb 1
|
19223 |
|
|
\& \-finstrument\-functions\-exclude\-file\-list=/bits/stl,include/sys
|
19224 |
|
|
.Ve
|
19225 |
|
|
.Sp
|
19226 |
|
|
excludes any inline function defined in files whose pathnames
|
19227 |
|
|
contain \f(CW\*(C`/bits/stl\*(C'\fR or \f(CW\*(C`include/sys\*(C'\fR.
|
19228 |
|
|
.Sp
|
19229 |
|
|
If, for some reason, you want to include letter \f(CW\*(Aq,\*(Aq\fR in one of
|
19230 |
|
|
\&\fIsym\fR, write \f(CW\*(Aq,\*(Aq\fR. For example,
|
19231 |
|
|
\&\f(CW\*(C`\-finstrument\-functions\-exclude\-file\-list=\*(Aq,,tmp\*(Aq\*(C'\fR
|
19232 |
|
|
(note the single quote surrounding the option).
|
19233 |
|
|
.IP "\fB\-finstrument\-functions\-exclude\-function\-list=\fR\fIsym\fR\fB,\fR\fIsym\fR\fB,...\fR" 4
|
19234 |
|
|
.IX Item "-finstrument-functions-exclude-function-list=sym,sym,..."
|
19235 |
|
|
This is similar to \f(CW\*(C`\-finstrument\-functions\-exclude\-file\-list\*(C'\fR,
|
19236 |
|
|
but this option sets the list of function names to be excluded from
|
19237 |
|
|
instrumentation. The function name to be matched is its user-visible
|
19238 |
|
|
name, such as \f(CW\*(C`vector blah(const vector &)\*(C'\fR, not the
|
19239 |
|
|
internal mangled name (e.g., \f(CW\*(C`_Z4blahRSt6vectorIiSaIiEE\*(C'\fR). The
|
19240 |
|
|
match is done on substrings: if the \fIsym\fR parameter is a substring
|
19241 |
|
|
of the function name, it is considered to be a match. For C99 and \*(C+
|
19242 |
|
|
extended identifiers, the function name must be given in \s-1UTF\-8\s0, not
|
19243 |
|
|
using universal character names.
|
19244 |
|
|
.IP "\fB\-fstack\-check\fR" 4
|
19245 |
|
|
.IX Item "-fstack-check"
|
19246 |
|
|
Generate code to verify that you do not go beyond the boundary of the
|
19247 |
|
|
stack. You should specify this flag if you are running in an
|
19248 |
|
|
environment with multiple threads, but you only rarely need to specify it in
|
19249 |
|
|
a single-threaded environment since stack overflow is automatically
|
19250 |
|
|
detected on nearly all systems if there is only one stack.
|
19251 |
|
|
.Sp
|
19252 |
|
|
Note that this switch does not actually cause checking to be done; the
|
19253 |
|
|
operating system or the language runtime must do that. The switch causes
|
19254 |
|
|
generation of code to ensure that they see the stack being extended.
|
19255 |
|
|
.Sp
|
19256 |
|
|
You can additionally specify a string parameter: \f(CW\*(C`no\*(C'\fR means no
|
19257 |
|
|
checking, \f(CW\*(C`generic\*(C'\fR means force the use of old-style checking,
|
19258 |
|
|
\&\f(CW\*(C`specific\*(C'\fR means use the best checking method and is equivalent
|
19259 |
|
|
to bare \fB\-fstack\-check\fR.
|
19260 |
|
|
.Sp
|
19261 |
|
|
Old-style checking is a generic mechanism that requires no specific
|
19262 |
|
|
target support in the compiler but comes with the following drawbacks:
|
19263 |
|
|
.RS 4
|
19264 |
|
|
.IP "1." 4
|
19265 |
|
|
Modified allocation strategy for large objects: they are always
|
19266 |
|
|
allocated dynamically if their size exceeds a fixed threshold.
|
19267 |
|
|
.IP "2." 4
|
19268 |
|
|
Fixed limit on the size of the static frame of functions: when it is
|
19269 |
|
|
topped by a particular function, stack checking is not reliable and
|
19270 |
|
|
a warning is issued by the compiler.
|
19271 |
|
|
.IP "3." 4
|
19272 |
|
|
Inefficiency: because of both the modified allocation strategy and the
|
19273 |
|
|
generic implementation, code performance is hampered.
|
19274 |
|
|
.RE
|
19275 |
|
|
.RS 4
|
19276 |
|
|
.Sp
|
19277 |
|
|
Note that old-style stack checking is also the fallback method for
|
19278 |
|
|
\&\f(CW\*(C`specific\*(C'\fR if no target support has been added in the compiler.
|
19279 |
|
|
.RE
|
19280 |
|
|
.IP "\fB\-fstack\-limit\-register=\fR\fIreg\fR" 4
|
19281 |
|
|
.IX Item "-fstack-limit-register=reg"
|
19282 |
|
|
.PD 0
|
19283 |
|
|
.IP "\fB\-fstack\-limit\-symbol=\fR\fIsym\fR" 4
|
19284 |
|
|
.IX Item "-fstack-limit-symbol=sym"
|
19285 |
|
|
.IP "\fB\-fno\-stack\-limit\fR" 4
|
19286 |
|
|
.IX Item "-fno-stack-limit"
|
19287 |
|
|
.PD
|
19288 |
|
|
Generate code to ensure that the stack does not grow beyond a certain value,
|
19289 |
|
|
either the value of a register or the address of a symbol. If a larger
|
19290 |
|
|
stack is required, a signal is raised at run time. For most targets,
|
19291 |
|
|
the signal is raised before the stack overruns the boundary, so
|
19292 |
|
|
it is possible to catch the signal without taking special precautions.
|
19293 |
|
|
.Sp
|
19294 |
|
|
For instance, if the stack starts at absolute address \fB0x80000000\fR
|
19295 |
|
|
and grows downwards, you can use the flags
|
19296 |
|
|
\&\fB\-fstack\-limit\-symbol=_\|_stack_limit\fR and
|
19297 |
|
|
\&\fB\-Wl,\-\-defsym,_\|_stack_limit=0x7ffe0000\fR to enforce a stack limit
|
19298 |
|
|
of 128KB. Note that this may only work with the \s-1GNU\s0 linker.
|
19299 |
|
|
.IP "\fB\-fsplit\-stack\fR" 4
|
19300 |
|
|
.IX Item "-fsplit-stack"
|
19301 |
|
|
Generate code to automatically split the stack before it overflows.
|
19302 |
|
|
The resulting program has a discontiguous stack which can only
|
19303 |
|
|
overflow if the program is unable to allocate any more memory. This
|
19304 |
|
|
is most useful when running threaded programs, as it is no longer
|
19305 |
|
|
necessary to calculate a good stack size to use for each thread. This
|
19306 |
|
|
is currently only implemented for the i386 and x86_64 back ends running
|
19307 |
|
|
GNU/Linux.
|
19308 |
|
|
.Sp
|
19309 |
|
|
When code compiled with \fB\-fsplit\-stack\fR calls code compiled
|
19310 |
|
|
without \fB\-fsplit\-stack\fR, there may not be much stack space
|
19311 |
|
|
available for the latter code to run. If compiling all code,
|
19312 |
|
|
including library code, with \fB\-fsplit\-stack\fR is not an option,
|
19313 |
|
|
then the linker can fix up these calls so that the code compiled
|
19314 |
|
|
without \fB\-fsplit\-stack\fR always has a large stack. Support for
|
19315 |
|
|
this is implemented in the gold linker in \s-1GNU\s0 binutils release 2.21
|
19316 |
|
|
and later.
|
19317 |
|
|
.IP "\fB\-fleading\-underscore\fR" 4
|
19318 |
|
|
.IX Item "-fleading-underscore"
|
19319 |
|
|
This option and its counterpart, \fB\-fno\-leading\-underscore\fR, forcibly
|
19320 |
|
|
change the way C symbols are represented in the object file. One use
|
19321 |
|
|
is to help link with legacy assembly code.
|
19322 |
|
|
.Sp
|
19323 |
|
|
\&\fBWarning:\fR the \fB\-fleading\-underscore\fR switch causes \s-1GCC\s0 to
|
19324 |
|
|
generate code that is not binary compatible with code generated without that
|
19325 |
|
|
switch. Use it to conform to a non-default application binary interface.
|
19326 |
|
|
Not all targets provide complete support for this switch.
|
19327 |
|
|
.IP "\fB\-ftls\-model=\fR\fImodel\fR" 4
|
19328 |
|
|
.IX Item "-ftls-model=model"
|
19329 |
|
|
Alter the thread-local storage model to be used.
|
19330 |
|
|
The \fImodel\fR argument should be one of \f(CW\*(C`global\-dynamic\*(C'\fR,
|
19331 |
|
|
\&\f(CW\*(C`local\-dynamic\*(C'\fR, \f(CW\*(C`initial\-exec\*(C'\fR or \f(CW\*(C`local\-exec\*(C'\fR.
|
19332 |
|
|
.Sp
|
19333 |
|
|
The default without \fB\-fpic\fR is \f(CW\*(C`initial\-exec\*(C'\fR; with
|
19334 |
|
|
\&\fB\-fpic\fR the default is \f(CW\*(C`global\-dynamic\*(C'\fR.
|
19335 |
|
|
.IP "\fB\-fvisibility=\fR\fIdefault|internal|hidden|protected\fR" 4
|
19336 |
|
|
.IX Item "-fvisibility=default|internal|hidden|protected"
|
19337 |
|
|
Set the default \s-1ELF\s0 image symbol visibility to the specified option\-\-\-all
|
19338 |
|
|
symbols are marked with this unless overridden within the code.
|
19339 |
|
|
Using this feature can very substantially improve linking and
|
19340 |
|
|
load times of shared object libraries, produce more optimized
|
19341 |
|
|
code, provide near-perfect \s-1API\s0 export and prevent symbol clashes.
|
19342 |
|
|
It is \fBstrongly\fR recommended that you use this in any shared objects
|
19343 |
|
|
you distribute.
|
19344 |
|
|
.Sp
|
19345 |
|
|
Despite the nomenclature, \f(CW\*(C`default\*(C'\fR always means public; i.e.,
|
19346 |
|
|
available to be linked against from outside the shared object.
|
19347 |
|
|
\&\f(CW\*(C`protected\*(C'\fR and \f(CW\*(C`internal\*(C'\fR are pretty useless in real-world
|
19348 |
|
|
usage so the only other commonly used option is \f(CW\*(C`hidden\*(C'\fR.
|
19349 |
|
|
The default if \fB\-fvisibility\fR isn't specified is
|
19350 |
|
|
\&\f(CW\*(C`default\*(C'\fR, i.e., make every
|
19351 |
|
|
symbol public\-\-\-this causes the same behavior as previous versions of
|
19352 |
|
|
\&\s-1GCC\s0.
|
19353 |
|
|
.Sp
|
19354 |
|
|
A good explanation of the benefits offered by ensuring \s-1ELF\s0
|
19355 |
|
|
symbols have the correct visibility is given by \*(L"How To Write
|
19356 |
|
|
Shared Libraries\*(R" by Ulrich Drepper (which can be found at
|
19357 |
|
|
<\fBhttp://people.redhat.com/~drepper/\fR>)\-\-\-however a superior
|
19358 |
|
|
solution made possible by this option to marking things hidden when
|
19359 |
|
|
the default is public is to make the default hidden and mark things
|
19360 |
|
|
public. This is the norm with DLLs on Windows and with \fB\-fvisibility=hidden\fR
|
19361 |
|
|
and \f(CW\*(C`_\|_attribute_\|_ ((visibility("default")))\*(C'\fR instead of
|
19362 |
|
|
\&\f(CW\*(C`_\|_declspec(dllexport)\*(C'\fR you get almost identical semantics with
|
19363 |
|
|
identical syntax. This is a great boon to those working with
|
19364 |
|
|
cross-platform projects.
|
19365 |
|
|
.Sp
|
19366 |
|
|
For those adding visibility support to existing code, you may find
|
19367 |
|
|
\&\fB#pragma \s-1GCC\s0 visibility\fR of use. This works by you enclosing
|
19368 |
|
|
the declarations you wish to set visibility for with (for example)
|
19369 |
|
|
\&\fB#pragma \s-1GCC\s0 visibility push(hidden)\fR and
|
19370 |
|
|
\&\fB#pragma \s-1GCC\s0 visibility pop\fR.
|
19371 |
|
|
Bear in mind that symbol visibility should be viewed \fBas
|
19372 |
|
|
part of the \s-1API\s0 interface contract\fR and thus all new code should
|
19373 |
|
|
always specify visibility when it is not the default; i.e., declarations
|
19374 |
|
|
only for use within the local \s-1DSO\s0 should \fBalways\fR be marked explicitly
|
19375 |
|
|
as hidden as so to avoid \s-1PLT\s0 indirection overheads\-\-\-making this
|
19376 |
|
|
abundantly clear also aids readability and self-documentation of the code.
|
19377 |
|
|
Note that due to \s-1ISO\s0 \*(C+ specification requirements, \f(CW\*(C`operator new\*(C'\fR and
|
19378 |
|
|
\&\f(CW\*(C`operator delete\*(C'\fR must always be of default visibility.
|
19379 |
|
|
.Sp
|
19380 |
|
|
Be aware that headers from outside your project, in particular system
|
19381 |
|
|
headers and headers from any other library you use, may not be
|
19382 |
|
|
expecting to be compiled with visibility other than the default. You
|
19383 |
|
|
may need to explicitly say \fB#pragma \s-1GCC\s0 visibility push(default)\fR
|
19384 |
|
|
before including any such headers.
|
19385 |
|
|
.Sp
|
19386 |
|
|
\&\fBextern\fR declarations are not affected by \fB\-fvisibility\fR, so
|
19387 |
|
|
a lot of code can be recompiled with \fB\-fvisibility=hidden\fR with
|
19388 |
|
|
no modifications. However, this means that calls to \f(CW\*(C`extern\*(C'\fR
|
19389 |
|
|
functions with no explicit visibility use the \s-1PLT\s0, so it is more
|
19390 |
|
|
effective to use \f(CW\*(C`_\|_attribute ((visibility))\*(C'\fR and/or
|
19391 |
|
|
\&\f(CW\*(C`#pragma GCC visibility\*(C'\fR to tell the compiler which \f(CW\*(C`extern\*(C'\fR
|
19392 |
|
|
declarations should be treated as hidden.
|
19393 |
|
|
.Sp
|
19394 |
|
|
Note that \fB\-fvisibility\fR does affect \*(C+ vague linkage
|
19395 |
|
|
entities. This means that, for instance, an exception class that is
|
19396 |
|
|
be thrown between DSOs must be explicitly marked with default
|
19397 |
|
|
visibility so that the \fBtype_info\fR nodes are unified between
|
19398 |
|
|
the DSOs.
|
19399 |
|
|
.Sp
|
19400 |
|
|
An overview of these techniques, their benefits and how to use them
|
19401 |
|
|
is at <\fBhttp://gcc.gnu.org/wiki/Visibility\fR>.
|
19402 |
|
|
.IP "\fB\-fstrict\-volatile\-bitfields\fR" 4
|
19403 |
|
|
.IX Item "-fstrict-volatile-bitfields"
|
19404 |
|
|
This option should be used if accesses to volatile bit-fields (or other
|
19405 |
|
|
structure fields, although the compiler usually honors those types
|
19406 |
|
|
anyway) should use a single access of the width of the
|
19407 |
|
|
field's type, aligned to a natural alignment if possible. For
|
19408 |
|
|
example, targets with memory-mapped peripheral registers might require
|
19409 |
|
|
all such accesses to be 16 bits wide; with this flag you can
|
19410 |
|
|
declare all peripheral bit-fields as \f(CW\*(C`unsigned short\*(C'\fR (assuming short
|
19411 |
|
|
is 16 bits on these targets) to force \s-1GCC\s0 to use 16\-bit accesses
|
19412 |
|
|
instead of, perhaps, a more efficient 32\-bit access.
|
19413 |
|
|
.Sp
|
19414 |
|
|
If this option is disabled, the compiler uses the most efficient
|
19415 |
|
|
instruction. In the previous example, that might be a 32\-bit load
|
19416 |
|
|
instruction, even though that accesses bytes that do not contain
|
19417 |
|
|
any portion of the bit-field, or memory-mapped registers unrelated to
|
19418 |
|
|
the one being updated.
|
19419 |
|
|
.Sp
|
19420 |
|
|
If the target requires strict alignment, and honoring the field
|
19421 |
|
|
type would require violating this alignment, a warning is issued.
|
19422 |
|
|
If the field has \f(CW\*(C`packed\*(C'\fR attribute, the access is done without
|
19423 |
|
|
honoring the field type. If the field doesn't have \f(CW\*(C`packed\*(C'\fR
|
19424 |
|
|
attribute, the access is done honoring the field type. In both cases,
|
19425 |
|
|
\&\s-1GCC\s0 assumes that the user knows something about the target hardware
|
19426 |
|
|
that it is unaware of.
|
19427 |
|
|
.Sp
|
19428 |
|
|
The default value of this option is determined by the application binary
|
19429 |
|
|
interface for the target processor.
|
19430 |
|
|
.IP "\fB\-fsync\-libcalls\fR" 4
|
19431 |
|
|
.IX Item "-fsync-libcalls"
|
19432 |
|
|
This option controls whether any out-of-line instance of the \f(CW\*(C`_\|_sync\*(C'\fR
|
19433 |
|
|
family of functions may be used to implement the \*(C+11 \f(CW\*(C`_\|_atomic\*(C'\fR
|
19434 |
|
|
family of functions.
|
19435 |
|
|
.Sp
|
19436 |
|
|
The default value of this option is enabled, thus the only useful form
|
19437 |
|
|
of the option is \fB\-fno\-sync\-libcalls\fR. This option is used in
|
19438 |
|
|
the implementation of the \fIlibatomic\fR runtime library.
|
19439 |
|
|
.SH "ENVIRONMENT"
|
19440 |
|
|
.IX Header "ENVIRONMENT"
|
19441 |
|
|
This section describes several environment variables that affect how \s-1GCC\s0
|
19442 |
|
|
operates. Some of them work by specifying directories or prefixes to use
|
19443 |
|
|
when searching for various kinds of files. Some are used to specify other
|
19444 |
|
|
aspects of the compilation environment.
|
19445 |
|
|
.PP
|
19446 |
|
|
Note that you can also specify places to search using options such as
|
19447 |
|
|
\&\fB\-B\fR, \fB\-I\fR and \fB\-L\fR. These
|
19448 |
|
|
take precedence over places specified using environment variables, which
|
19449 |
|
|
in turn take precedence over those specified by the configuration of \s-1GCC\s0.
|
19450 |
|
|
.IP "\fB\s-1LANG\s0\fR" 4
|
19451 |
|
|
.IX Item "LANG"
|
19452 |
|
|
.PD 0
|
19453 |
|
|
.IP "\fB\s-1LC_CTYPE\s0\fR" 4
|
19454 |
|
|
.IX Item "LC_CTYPE"
|
19455 |
|
|
.IP "\fB\s-1LC_MESSAGES\s0\fR" 4
|
19456 |
|
|
.IX Item "LC_MESSAGES"
|
19457 |
|
|
.IP "\fB\s-1LC_ALL\s0\fR" 4
|
19458 |
|
|
.IX Item "LC_ALL"
|
19459 |
|
|
.PD
|
19460 |
|
|
These environment variables control the way that \s-1GCC\s0 uses
|
19461 |
|
|
localization information which allows \s-1GCC\s0 to work with different
|
19462 |
|
|
national conventions. \s-1GCC\s0 inspects the locale categories
|
19463 |
|
|
\&\fB\s-1LC_CTYPE\s0\fR and \fB\s-1LC_MESSAGES\s0\fR if it has been configured to do
|
19464 |
|
|
so. These locale categories can be set to any value supported by your
|
19465 |
|
|
installation. A typical value is \fBen_GB.UTF\-8\fR for English in the United
|
19466 |
|
|
Kingdom encoded in \s-1UTF\-8\s0.
|
19467 |
|
|
.Sp
|
19468 |
|
|
The \fB\s-1LC_CTYPE\s0\fR environment variable specifies character
|
19469 |
|
|
classification. \s-1GCC\s0 uses it to determine the character boundaries in
|
19470 |
|
|
a string; this is needed for some multibyte encodings that contain quote
|
19471 |
|
|
and escape characters that are otherwise interpreted as a string
|
19472 |
|
|
end or escape.
|
19473 |
|
|
.Sp
|
19474 |
|
|
The \fB\s-1LC_MESSAGES\s0\fR environment variable specifies the language to
|
19475 |
|
|
use in diagnostic messages.
|
19476 |
|
|
.Sp
|
19477 |
|
|
If the \fB\s-1LC_ALL\s0\fR environment variable is set, it overrides the value
|
19478 |
|
|
of \fB\s-1LC_CTYPE\s0\fR and \fB\s-1LC_MESSAGES\s0\fR; otherwise, \fB\s-1LC_CTYPE\s0\fR
|
19479 |
|
|
and \fB\s-1LC_MESSAGES\s0\fR default to the value of the \fB\s-1LANG\s0\fR
|
19480 |
|
|
environment variable. If none of these variables are set, \s-1GCC\s0
|
19481 |
|
|
defaults to traditional C English behavior.
|
19482 |
|
|
.IP "\fB\s-1TMPDIR\s0\fR" 4
|
19483 |
|
|
.IX Item "TMPDIR"
|
19484 |
|
|
If \fB\s-1TMPDIR\s0\fR is set, it specifies the directory to use for temporary
|
19485 |
|
|
files. \s-1GCC\s0 uses temporary files to hold the output of one stage of
|
19486 |
|
|
compilation which is to be used as input to the next stage: for example,
|
19487 |
|
|
the output of the preprocessor, which is the input to the compiler
|
19488 |
|
|
proper.
|
19489 |
|
|
.IP "\fB\s-1GCC_COMPARE_DEBUG\s0\fR" 4
|
19490 |
|
|
.IX Item "GCC_COMPARE_DEBUG"
|
19491 |
|
|
Setting \fB\s-1GCC_COMPARE_DEBUG\s0\fR is nearly equivalent to passing
|
19492 |
|
|
\&\fB\-fcompare\-debug\fR to the compiler driver. See the documentation
|
19493 |
|
|
of this option for more details.
|
19494 |
|
|
.IP "\fB\s-1GCC_EXEC_PREFIX\s0\fR" 4
|
19495 |
|
|
.IX Item "GCC_EXEC_PREFIX"
|
19496 |
|
|
If \fB\s-1GCC_EXEC_PREFIX\s0\fR is set, it specifies a prefix to use in the
|
19497 |
|
|
names of the subprograms executed by the compiler. No slash is added
|
19498 |
|
|
when this prefix is combined with the name of a subprogram, but you can
|
19499 |
|
|
specify a prefix that ends with a slash if you wish.
|
19500 |
|
|
.Sp
|
19501 |
|
|
If \fB\s-1GCC_EXEC_PREFIX\s0\fR is not set, \s-1GCC\s0 attempts to figure out
|
19502 |
|
|
an appropriate prefix to use based on the pathname it is invoked with.
|
19503 |
|
|
.Sp
|
19504 |
|
|
If \s-1GCC\s0 cannot find the subprogram using the specified prefix, it
|
19505 |
|
|
tries looking in the usual places for the subprogram.
|
19506 |
|
|
.Sp
|
19507 |
|
|
The default value of \fB\s-1GCC_EXEC_PREFIX\s0\fR is
|
19508 |
|
|
\&\fI\fIprefix\fI/lib/gcc/\fR where \fIprefix\fR is the prefix to
|
19509 |
|
|
the installed compiler. In many cases \fIprefix\fR is the value
|
19510 |
|
|
of \f(CW\*(C`prefix\*(C'\fR when you ran the \fIconfigure\fR script.
|
19511 |
|
|
.Sp
|
19512 |
|
|
Other prefixes specified with \fB\-B\fR take precedence over this prefix.
|
19513 |
|
|
.Sp
|
19514 |
|
|
This prefix is also used for finding files such as \fIcrt0.o\fR that are
|
19515 |
|
|
used for linking.
|
19516 |
|
|
.Sp
|
19517 |
|
|
In addition, the prefix is used in an unusual way in finding the
|
19518 |
|
|
directories to search for header files. For each of the standard
|
19519 |
|
|
directories whose name normally begins with \fB/usr/local/lib/gcc\fR
|
19520 |
|
|
(more precisely, with the value of \fB\s-1GCC_INCLUDE_DIR\s0\fR), \s-1GCC\s0 tries
|
19521 |
|
|
replacing that beginning with the specified prefix to produce an
|
19522 |
|
|
alternate directory name. Thus, with \fB\-Bfoo/\fR, \s-1GCC\s0 searches
|
19523 |
|
|
\&\fIfoo/bar\fR just before it searches the standard directory
|
19524 |
|
|
\&\fI/usr/local/lib/bar\fR.
|
19525 |
|
|
If a standard directory begins with the configured
|
19526 |
|
|
\&\fIprefix\fR then the value of \fIprefix\fR is replaced by
|
19527 |
|
|
\&\fB\s-1GCC_EXEC_PREFIX\s0\fR when looking for header files.
|
19528 |
|
|
.IP "\fB\s-1COMPILER_PATH\s0\fR" 4
|
19529 |
|
|
.IX Item "COMPILER_PATH"
|
19530 |
|
|
The value of \fB\s-1COMPILER_PATH\s0\fR is a colon-separated list of
|
19531 |
|
|
directories, much like \fB\s-1PATH\s0\fR. \s-1GCC\s0 tries the directories thus
|
19532 |
|
|
specified when searching for subprograms, if it can't find the
|
19533 |
|
|
subprograms using \fB\s-1GCC_EXEC_PREFIX\s0\fR.
|
19534 |
|
|
.IP "\fB\s-1LIBRARY_PATH\s0\fR" 4
|
19535 |
|
|
.IX Item "LIBRARY_PATH"
|
19536 |
|
|
The value of \fB\s-1LIBRARY_PATH\s0\fR is a colon-separated list of
|
19537 |
|
|
directories, much like \fB\s-1PATH\s0\fR. When configured as a native compiler,
|
19538 |
|
|
\&\s-1GCC\s0 tries the directories thus specified when searching for special
|
19539 |
|
|
linker files, if it can't find them using \fB\s-1GCC_EXEC_PREFIX\s0\fR. Linking
|
19540 |
|
|
using \s-1GCC\s0 also uses these directories when searching for ordinary
|
19541 |
|
|
libraries for the \fB\-l\fR option (but directories specified with
|
19542 |
|
|
\&\fB\-L\fR come first).
|
19543 |
|
|
.IP "\fB\s-1LANG\s0\fR" 4
|
19544 |
|
|
.IX Item "LANG"
|
19545 |
|
|
This variable is used to pass locale information to the compiler. One way in
|
19546 |
|
|
which this information is used is to determine the character set to be used
|
19547 |
|
|
when character literals, string literals and comments are parsed in C and \*(C+.
|
19548 |
|
|
When the compiler is configured to allow multibyte characters,
|
19549 |
|
|
the following values for \fB\s-1LANG\s0\fR are recognized:
|
19550 |
|
|
.RS 4
|
19551 |
|
|
.IP "\fBC\-JIS\fR" 4
|
19552 |
|
|
.IX Item "C-JIS"
|
19553 |
|
|
Recognize \s-1JIS\s0 characters.
|
19554 |
|
|
.IP "\fBC\-SJIS\fR" 4
|
19555 |
|
|
.IX Item "C-SJIS"
|
19556 |
|
|
Recognize \s-1SJIS\s0 characters.
|
19557 |
|
|
.IP "\fBC\-EUCJP\fR" 4
|
19558 |
|
|
.IX Item "C-EUCJP"
|
19559 |
|
|
Recognize \s-1EUCJP\s0 characters.
|
19560 |
|
|
.RE
|
19561 |
|
|
.RS 4
|
19562 |
|
|
.Sp
|
19563 |
|
|
If \fB\s-1LANG\s0\fR is not defined, or if it has some other value, then the
|
19564 |
|
|
compiler uses \f(CW\*(C`mblen\*(C'\fR and \f(CW\*(C`mbtowc\*(C'\fR as defined by the default locale to
|
19565 |
|
|
recognize and translate multibyte characters.
|
19566 |
|
|
.RE
|
19567 |
|
|
.PP
|
19568 |
|
|
Some additional environment variables affect the behavior of the
|
19569 |
|
|
preprocessor.
|
19570 |
|
|
.IP "\fB\s-1CPATH\s0\fR" 4
|
19571 |
|
|
.IX Item "CPATH"
|
19572 |
|
|
.PD 0
|
19573 |
|
|
.IP "\fBC_INCLUDE_PATH\fR" 4
|
19574 |
|
|
.IX Item "C_INCLUDE_PATH"
|
19575 |
|
|
.IP "\fB\s-1CPLUS_INCLUDE_PATH\s0\fR" 4
|
19576 |
|
|
.IX Item "CPLUS_INCLUDE_PATH"
|
19577 |
|
|
.IP "\fB\s-1OBJC_INCLUDE_PATH\s0\fR" 4
|
19578 |
|
|
.IX Item "OBJC_INCLUDE_PATH"
|
19579 |
|
|
.PD
|
19580 |
|
|
Each variable's value is a list of directories separated by a special
|
19581 |
|
|
character, much like \fB\s-1PATH\s0\fR, in which to look for header files.
|
19582 |
|
|
The special character, \f(CW\*(C`PATH_SEPARATOR\*(C'\fR, is target-dependent and
|
19583 |
|
|
determined at \s-1GCC\s0 build time. For Microsoft Windows-based targets it is a
|
19584 |
|
|
semicolon, and for almost all other targets it is a colon.
|
19585 |
|
|
.Sp
|
19586 |
|
|
\&\fB\s-1CPATH\s0\fR specifies a list of directories to be searched as if
|
19587 |
|
|
specified with \fB\-I\fR, but after any paths given with \fB\-I\fR
|
19588 |
|
|
options on the command line. This environment variable is used
|
19589 |
|
|
regardless of which language is being preprocessed.
|
19590 |
|
|
.Sp
|
19591 |
|
|
The remaining environment variables apply only when preprocessing the
|
19592 |
|
|
particular language indicated. Each specifies a list of directories
|
19593 |
|
|
to be searched as if specified with \fB\-isystem\fR, but after any
|
19594 |
|
|
paths given with \fB\-isystem\fR options on the command line.
|
19595 |
|
|
.Sp
|
19596 |
|
|
In all these variables, an empty element instructs the compiler to
|
19597 |
|
|
search its current working directory. Empty elements can appear at the
|
19598 |
|
|
beginning or end of a path. For instance, if the value of
|
19599 |
|
|
\&\fB\s-1CPATH\s0\fR is \f(CW\*(C`:/special/include\*(C'\fR, that has the same
|
19600 |
|
|
effect as \fB\-I.\ \-I/special/include\fR.
|
19601 |
|
|
.IP "\fB\s-1DEPENDENCIES_OUTPUT\s0\fR" 4
|
19602 |
|
|
.IX Item "DEPENDENCIES_OUTPUT"
|
19603 |
|
|
If this variable is set, its value specifies how to output
|
19604 |
|
|
dependencies for Make based on the non-system header files processed
|
19605 |
|
|
by the compiler. System header files are ignored in the dependency
|
19606 |
|
|
output.
|
19607 |
|
|
.Sp
|
19608 |
|
|
The value of \fB\s-1DEPENDENCIES_OUTPUT\s0\fR can be just a file name, in
|
19609 |
|
|
which case the Make rules are written to that file, guessing the target
|
19610 |
|
|
name from the source file name. Or the value can have the form
|
19611 |
|
|
\&\fIfile\fR\fB \fR\fItarget\fR, in which case the rules are written to
|
19612 |
|
|
file \fIfile\fR using \fItarget\fR as the target name.
|
19613 |
|
|
.Sp
|
19614 |
|
|
In other words, this environment variable is equivalent to combining
|
19615 |
|
|
the options \fB\-MM\fR and \fB\-MF\fR,
|
19616 |
|
|
with an optional \fB\-MT\fR switch too.
|
19617 |
|
|
.IP "\fB\s-1SUNPRO_DEPENDENCIES\s0\fR" 4
|
19618 |
|
|
.IX Item "SUNPRO_DEPENDENCIES"
|
19619 |
|
|
This variable is the same as \fB\s-1DEPENDENCIES_OUTPUT\s0\fR (see above),
|
19620 |
|
|
except that system header files are not ignored, so it implies
|
19621 |
|
|
\&\fB\-M\fR rather than \fB\-MM\fR. However, the dependence on the
|
19622 |
|
|
main input file is omitted.
|
19623 |
|
|
.SH "BUGS"
|
19624 |
|
|
.IX Header "BUGS"
|
19625 |
|
|
For instructions on reporting bugs, see
|
19626 |
|
|
<\fBhttp://gcc.gnu.org/bugs.html\fR>.
|
19627 |
|
|
.SH "FOOTNOTES"
|
19628 |
|
|
.IX Header "FOOTNOTES"
|
19629 |
|
|
.IP "1." 4
|
19630 |
|
|
On some systems, \fBgcc \-shared\fR
|
19631 |
|
|
needs to build supplementary stub code for constructors to work. On
|
19632 |
|
|
multi-libbed systems, \fBgcc \-shared\fR must select the correct support
|
19633 |
|
|
libraries to link against. Failing to supply the correct flags may lead
|
19634 |
|
|
to subtle defects. Supplying them in cases where they are not necessary
|
19635 |
|
|
is innocuous.
|
19636 |
|
|
.SH "SEE ALSO"
|
19637 |
|
|
.IX Header "SEE ALSO"
|
19638 |
|
|
\&\fIgpl\fR\|(7), \fIgfdl\fR\|(7), \fIfsf\-funding\fR\|(7),
|
19639 |
|
|
\&\fIcpp\fR\|(1), \fIgcov\fR\|(1), \fIas\fR\|(1), \fIld\fR\|(1), \fIgdb\fR\|(1), \fIadb\fR\|(1), \fIdbx\fR\|(1), \fIsdb\fR\|(1)
|
19640 |
|
|
and the Info entries for \fIgcc\fR, \fIcpp\fR, \fIas\fR,
|
19641 |
|
|
\&\fIld\fR, \fIbinutils\fR and \fIgdb\fR.
|
19642 |
|
|
.SH "AUTHOR"
|
19643 |
|
|
.IX Header "AUTHOR"
|
19644 |
|
|
See the Info entry for \fBgcc\fR, or
|
19645 |
|
|
<\fBhttp://gcc.gnu.org/onlinedocs/gcc/Contributors.html\fR>,
|
19646 |
|
|
for contributors to \s-1GCC\s0.
|
19647 |
|
|
.SH "COPYRIGHT"
|
19648 |
|
|
.IX Header "COPYRIGHT"
|
19649 |
|
|
Copyright (c) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
|
19650 |
|
|
1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011,
|
19651 |
|
|
2012
|
19652 |
|
|
Free Software Foundation, Inc.
|
19653 |
|
|
.PP
|
19654 |
|
|
Permission is granted to copy, distribute and/or modify this document
|
19655 |
|
|
under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3 or
|
19656 |
|
|
any later version published by the Free Software Foundation; with the
|
19657 |
|
|
Invariant Sections being \*(L"\s-1GNU\s0 General Public License\*(R" and \*(L"Funding
|
19658 |
|
|
Free Software\*(R", the Front-Cover texts being (a) (see below), and with
|
19659 |
|
|
the Back-Cover Texts being (b) (see below). A copy of the license is
|
19660 |
|
|
included in the \fIgfdl\fR\|(7) man page.
|
19661 |
|
|
.PP
|
19662 |
|
|
(a) The \s-1FSF\s0's Front-Cover Text is:
|
19663 |
|
|
.PP
|
19664 |
|
|
.Vb 1
|
19665 |
|
|
\& A GNU Manual
|
19666 |
|
|
.Ve
|
19667 |
|
|
.PP
|
19668 |
|
|
(b) The \s-1FSF\s0's Back-Cover Text is:
|
19669 |
|
|
.PP
|
19670 |
|
|
.Vb 3
|
19671 |
|
|
\& You have freedom to copy and modify this GNU Manual, like GNU
|
19672 |
|
|
\& software. Copies published by the Free Software Foundation raise
|
19673 |
|
|
\& funds for GNU development.
|
19674 |
|
|
.Ve
|