| 1 |
37 |
ultra_embe |
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firmware.elf: file format elf32-or1k
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| 4 |
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Sections:
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Idx Name Size VMA LMA File off Algn
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CONTENTS, ALLOC, LOAD, READONLY, CODE
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1 .data 00000008 10002fd8 10002fd8 00004fd8 2**2
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CONTENTS, ALLOC, LOAD, DATA
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| 10 |
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2 .bss 00001030 10002fe0 10002fe0 00004fe0 2**2
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| 11 |
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ALLOC
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3 .debug_info 00002151 00000000 00000000 00004fe0 2**0
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| 13 |
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CONTENTS, READONLY, DEBUGGING
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| 14 |
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4 .debug_abbrev 00000b63 00000000 00000000 00007131 2**0
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| 15 |
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CONTENTS, READONLY, DEBUGGING
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| 16 |
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5 .debug_loc 00000fc6 00000000 00000000 00007c94 2**0
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| 17 |
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CONTENTS, READONLY, DEBUGGING
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| 18 |
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6 .debug_aranges 00000140 00000000 00000000 00008c5a 2**0
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| 19 |
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CONTENTS, READONLY, DEBUGGING
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| 20 |
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7 .debug_ranges 000000b8 00000000 00000000 00008d9a 2**0
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| 21 |
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CONTENTS, READONLY, DEBUGGING
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| 22 |
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8 .debug_line 00000ad7 00000000 00000000 00008e52 2**0
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| 23 |
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CONTENTS, READONLY, DEBUGGING
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| 24 |
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9 .debug_str 000006d5 00000000 00000000 00009929 2**0
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| 25 |
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CONTENTS, READONLY, DEBUGGING
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| 26 |
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10 .comment 00000029 00000000 00000000 00009ffe 2**0
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| 27 |
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CONTENTS, READONLY
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| 28 |
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11 .debug_frame 0000039c 00000000 00000000 0000a028 2**2
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| 29 |
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CONTENTS, READONLY, DEBUGGING
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| 30 |
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| 31 |
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Disassembly of section .text:
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| 32 |
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| 33 |
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10000000 <_start-0x100>:
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| 34 |
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...
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| 35 |
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| 36 |
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10000100 <_start>:
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| 37 |
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10000100: 18 80 10 00 l.movhi r4,0x1000
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| 38 |
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10000104: a8 24 40 00 l.ori r1,r4,0x4000
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| 39 |
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10000108: 18 80 10 00 l.movhi r4,0x1000
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| 40 |
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1000010c: a8 84 2f e0 l.ori r4,r4,0x2fe0
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| 41 |
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10000110: 18 a0 10 00 l.movhi r5,0x1000
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| 42 |
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10000114: a8 a5 40 10 l.ori r5,r5,0x4010
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| 43 |
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| 44 |
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10000118 :
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| 45 |
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10000118: d4 04 00 00 l.sw 0(r4),r0
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| 46 |
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1000011c: e4 a4 28 00 l.sfleu r4,r5
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| 47 |
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10000120: 9c 84 00 04 l.addi r4,r4,4
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| 48 |
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10000124: 13 ff ff fd l.bf 10000118
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| 49 |
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10000128: 15 00 00 00 l.nop 0x0
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| 50 |
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1000012c: 04 00 03 b5 l.jal 10001000
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| 51 |
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10000130: 15 00 00 00 l.nop 0x0
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| 52 |
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...
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| 53 |
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| 54 |
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10000400 :
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| 55 |
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10000400: 24 00 00 00 l.rfe
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| 56 |
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10000404: 15 00 00 00 l.nop 0x0
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| 57 |
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...
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| 58 |
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10000ffc: 15 00 00 00 l.nop 0x0
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| 59 |
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| 60 |
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10001000 :
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| 61 |
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int main(void)
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| 62 |
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{
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| 63 |
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int res;
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| 64 |
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| 65 |
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// Setup printf to serial port
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| 66 |
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printf_register(serial_putchar);
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| 67 |
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10001000: 18 60 10 00 l.movhi r3,0x1000
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| 68 |
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| 69 |
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//-----------------------------------------------------------------
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| 70 |
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// main:
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| 71 |
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//-----------------------------------------------------------------
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| 72 |
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int main(void)
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| 73 |
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{
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| 74 |
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10001004: d7 e1 4f fc l.sw -4(r1),r9
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| 75 |
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10001008: d7 e1 0f f8 l.sw -8(r1),r1
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| 76 |
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int res;
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| 77 |
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| 78 |
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// Setup printf to serial port
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| 79 |
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printf_register(serial_putchar);
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| 80 |
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1000100c: a8 63 1a 54 l.ori r3,r3,0x1a54
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| 81 |
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| 82 |
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//-----------------------------------------------------------------
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| 83 |
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// main:
|
| 84 |
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//-----------------------------------------------------------------
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| 85 |
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int main(void)
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| 86 |
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{
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| 87 |
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10001010: 9c 21 ff f8 l.addi r1,r1,-8
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| 88 |
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int res;
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| 89 |
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| 90 |
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// Setup printf to serial port
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| 91 |
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printf_register(serial_putchar);
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| 92 |
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10001014: 04 00 01 32 l.jal 100014dc
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| 93 |
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| 94 |
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// Run test
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| 95 |
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res = test();
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| 96 |
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10001018: 04 00 03 35 l.jal 10001cec
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| 97 |
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static inline void exit(unsigned exit_code)
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| 98 |
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{
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| 99 |
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volatile register char t1 asm ("r1") = exit_code;
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| 100 |
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| 101 |
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// No error?
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| 102 |
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if (exit_code == 0)
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| 103 |
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1000101c: bc 2b 00 00 l.sfnei r11,0
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| 104 |
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| 105 |
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}
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| 106 |
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| 107 |
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static inline void exit(unsigned exit_code)
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| 108 |
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{
|
| 109 |
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volatile register char t1 asm ("r1") = exit_code;
|
| 110 |
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10001020: a5 6b 00 ff l.andi r11,r11,0xff
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| 111 |
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10001024: a8 2b 00 00 l.ori r1,r11,0x0
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| 112 |
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|
|
| 113 |
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// No error?
|
| 114 |
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if (exit_code == 0)
|
| 115 |
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10001028: 0c 00 00 06 l.bnf 10001040
|
| 116 |
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__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 117 |
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}
|
| 118 |
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else
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| 119 |
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{
|
| 120 |
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// Invalid instruction!
|
| 121 |
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__asm__ __volatile__ ( "\t lf.add.s r0,r0,r0 ");
|
| 122 |
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1000102c: c8 00 00 00 lf.add.s r0,r0,r0
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| 123 |
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|
|
| 124 |
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// Exit with result
|
| 125 |
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exit(res);
|
| 126 |
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}
|
| 127 |
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10001030: 9c 21 00 08 l.addi r1,r1,8
|
| 128 |
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10001034: 85 21 ff fc l.lwz r9,-4(r1)
|
| 129 |
|
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10001038: 84 21 ff f8 l.lwz r1,-8(r1)
|
| 130 |
|
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1000103c: 44 00 48 00 l.jr r9
|
| 131 |
|
|
|
| 132 |
|
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// No error?
|
| 133 |
|
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if (exit_code == 0)
|
| 134 |
|
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{
|
| 135 |
|
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// Trap instruction
|
| 136 |
|
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__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 137 |
|
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10001040: 21 00 00 00 l.trap 0x0
|
| 138 |
|
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10001044: 03 ff ff fb l.j 10001030
|
| 139 |
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|
|
| 140 |
|
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10001048 :
|
| 141 |
|
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static volatile int in_interrupt = 0;
|
| 142 |
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|
| 143 |
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//-----------------------------------------------------------------
|
| 144 |
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// exception_register:
|
| 145 |
|
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//-----------------------------------------------------------------
|
| 146 |
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void exception_register_fault_handler(void (*func)(void)) { func_fault = func; }
|
| 147 |
|
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10001048: 18 80 10 00 l.movhi r4,0x1000
|
| 148 |
|
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1000104c: d7 e1 0f fc l.sw -4(r1),r1
|
| 149 |
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10001050: a8 84 2f f0 l.ori r4,r4,0x2ff0
|
| 150 |
|
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10001054: 9c 21 ff fc l.addi r1,r1,-4
|
| 151 |
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10001058: d4 04 18 00 l.sw 0(r4),r3
|
| 152 |
|
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1000105c: 9c 21 00 04 l.addi r1,r1,4
|
| 153 |
|
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10001060: 84 21 ff fc l.lwz r1,-4(r1)
|
| 154 |
|
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10001064: 44 00 48 00 l.jr r9
|
| 155 |
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|
| 156 |
|
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10001068 :
|
| 157 |
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void exception_register_break_handler(void (*func)(void)) { func_break = func; }
|
| 158 |
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10001068: 18 80 10 00 l.movhi r4,0x1000
|
| 159 |
|
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1000106c: d7 e1 0f fc l.sw -4(r1),r1
|
| 160 |
|
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10001070: a8 84 2f ec l.ori r4,r4,0x2fec
|
| 161 |
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10001074: 9c 21 ff fc l.addi r1,r1,-4
|
| 162 |
|
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10001078: d4 04 18 00 l.sw 0(r4),r3
|
| 163 |
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1000107c: 9c 21 00 04 l.addi r1,r1,4
|
| 164 |
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10001080: 84 21 ff fc l.lwz r1,-4(r1)
|
| 165 |
|
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10001084: 44 00 48 00 l.jr r9
|
| 166 |
|
|
|
| 167 |
|
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10001088 :
|
| 168 |
|
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void exception_register_extint_handler(void (*func)(void)) { func_extint = func; }
|
| 169 |
|
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10001088: 18 80 10 00 l.movhi r4,0x1000
|
| 170 |
|
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1000108c: d7 e1 0f fc l.sw -4(r1),r1
|
| 171 |
|
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10001090: a8 84 2f e8 l.ori r4,r4,0x2fe8
|
| 172 |
|
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10001094: 9c 21 ff fc l.addi r1,r1,-4
|
| 173 |
|
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10001098: d4 04 18 00 l.sw 0(r4),r3
|
| 174 |
|
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1000109c: 9c 21 00 04 l.addi r1,r1,4
|
| 175 |
|
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100010a0: 84 21 ff fc l.lwz r1,-4(r1)
|
| 176 |
|
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100010a4: 44 00 48 00 l.jr r9
|
| 177 |
|
|
|
| 178 |
|
|
100010a8 :
|
| 179 |
|
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void exception_register_syscall_handler(void (*func)(void)) { func_syscall = func; }
|
| 180 |
|
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100010a8: 18 80 10 00 l.movhi r4,0x1000
|
| 181 |
|
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100010ac: d7 e1 0f fc l.sw -4(r1),r1
|
| 182 |
|
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100010b0: a8 84 2f e4 l.ori r4,r4,0x2fe4
|
| 183 |
|
|
100010b4: 9c 21 ff fc l.addi r1,r1,-4
|
| 184 |
|
|
100010b8: d4 04 18 00 l.sw 0(r4),r3
|
| 185 |
|
|
100010bc: 9c 21 00 04 l.addi r1,r1,4
|
| 186 |
|
|
100010c0: 84 21 ff fc l.lwz r1,-4(r1)
|
| 187 |
|
|
100010c4: 44 00 48 00 l.jr r9
|
| 188 |
|
|
|
| 189 |
|
|
100010c8 :
|
| 190 |
|
|
|
| 191 |
|
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//-----------------------------------------------------------------
|
| 192 |
|
|
// cpu_handle_irq:
|
| 193 |
|
|
//-----------------------------------------------------------------
|
| 194 |
|
|
void cpu_handle_irq(unsigned cause)
|
| 195 |
|
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{
|
| 196 |
|
|
100010c8: d7 e1 17 f4 l.sw -12(r1),r2
|
| 197 |
|
|
int recursive_int = (in_interrupt != 0);
|
| 198 |
|
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100010cc: 18 40 10 00 l.movhi r2,0x1000
|
| 199 |
|
|
|
| 200 |
|
|
in_interrupt = 1;
|
| 201 |
|
|
100010d0: 9c 80 00 01 l.addi r4,r0,1
|
| 202 |
|
|
//-----------------------------------------------------------------
|
| 203 |
|
|
// cpu_handle_irq:
|
| 204 |
|
|
//-----------------------------------------------------------------
|
| 205 |
|
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void cpu_handle_irq(unsigned cause)
|
| 206 |
|
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{
|
| 207 |
|
|
int recursive_int = (in_interrupt != 0);
|
| 208 |
|
|
100010d4: a8 42 2f e0 l.ori r2,r2,0x2fe0
|
| 209 |
|
|
|
| 210 |
|
|
//-----------------------------------------------------------------
|
| 211 |
|
|
// cpu_handle_irq:
|
| 212 |
|
|
//-----------------------------------------------------------------
|
| 213 |
|
|
void cpu_handle_irq(unsigned cause)
|
| 214 |
|
|
{
|
| 215 |
|
|
100010d8: d7 e1 77 f8 l.sw -8(r1),r14
|
| 216 |
|
|
100010dc: d7 e1 4f fc l.sw -4(r1),r9
|
| 217 |
|
|
100010e0: d7 e1 0f f0 l.sw -16(r1),r1
|
| 218 |
|
|
int recursive_int = (in_interrupt != 0);
|
| 219 |
|
|
100010e4: 85 c2 00 00 l.lwz r14,0(r2)
|
| 220 |
|
|
|
| 221 |
|
|
in_interrupt = 1;
|
| 222 |
|
|
|
| 223 |
|
|
switch (cause)
|
| 224 |
|
|
100010e8: bc 43 00 08 l.sfgtui r3,8
|
| 225 |
|
|
//-----------------------------------------------------------------
|
| 226 |
|
|
void cpu_handle_irq(unsigned cause)
|
| 227 |
|
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{
|
| 228 |
|
|
int recursive_int = (in_interrupt != 0);
|
| 229 |
|
|
|
| 230 |
|
|
in_interrupt = 1;
|
| 231 |
|
|
100010ec: d4 02 20 00 l.sw 0(r2),r4
|
| 232 |
|
|
|
| 233 |
|
|
//-----------------------------------------------------------------
|
| 234 |
|
|
// cpu_handle_irq:
|
| 235 |
|
|
//-----------------------------------------------------------------
|
| 236 |
|
|
void cpu_handle_irq(unsigned cause)
|
| 237 |
|
|
{
|
| 238 |
|
|
100010f0: 9c 21 ff e4 l.addi r1,r1,-28
|
| 239 |
|
|
int recursive_int = (in_interrupt != 0);
|
| 240 |
|
|
|
| 241 |
|
|
in_interrupt = 1;
|
| 242 |
|
|
|
| 243 |
|
|
switch (cause)
|
| 244 |
|
|
100010f4: 10 00 00 71 l.bf 100012b8
|
| 245 |
|
|
100010f8: 18 80 10 00 l.movhi r4,0x1000
|
| 246 |
|
|
100010fc: b8 63 00 02 l.slli r3,r3,0x2
|
| 247 |
|
|
10001100: a8 84 2b 00 l.ori r4,r4,0x2b00
|
| 248 |
|
|
10001104: e0 63 20 00 l.add r3,r3,r4
|
| 249 |
|
|
10001108: 84 63 00 00 l.lwz r3,0(r3)
|
| 250 |
|
|
1000110c: 44 00 18 00 l.jr r3
|
| 251 |
|
|
case EXCEPTION_DIV:
|
| 252 |
|
|
panic("DIV!");
|
| 253 |
|
|
break;
|
| 254 |
|
|
|
| 255 |
|
|
case EXCEPTION_UDIV:
|
| 256 |
|
|
panic("UDIV!");
|
| 257 |
|
|
10001110: 18 60 10 00 l.movhi r3,0x1000
|
| 258 |
|
|
10001114: a8 63 2c e4 l.ori r3,r3,0x2ce4
|
| 259 |
|
|
10001118: d4 01 18 00 l.sw 0(r1),r3
|
| 260 |
|
|
1000111c: 18 60 10 00 l.movhi r3,0x1000
|
| 261 |
|
|
10001120: a8 63 2c 9a l.ori r3,r3,0x2c9a
|
| 262 |
|
|
10001124: d4 01 18 04 l.sw 4(r1),r3
|
| 263 |
|
|
10001128: 9c 60 00 6e l.addi r3,r0,110
|
| 264 |
|
|
break;
|
| 265 |
|
|
|
| 266 |
|
|
default:
|
| 267 |
|
|
panic("UNKNOWN");
|
| 268 |
|
|
1000112c: d4 01 18 08 l.sw 8(r1),r3
|
| 269 |
|
|
10001130: 18 60 10 00 l.movhi r3,0x1000
|
| 270 |
|
|
10001134: a8 63 2c 74 l.ori r3,r3,0x2c74
|
| 271 |
|
|
10001138: 04 00 02 2b l.jal 100019e4
|
| 272 |
|
|
|
| 273 |
|
|
}
|
| 274 |
|
|
|
| 275 |
|
|
static inline void exit(unsigned exit_code)
|
| 276 |
|
|
{
|
| 277 |
|
|
volatile register char t1 asm ("r1") = exit_code;
|
| 278 |
|
|
1000113c: 9c 20 00 01 l.addi r1,r0,1
|
| 279 |
|
|
__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 280 |
|
|
}
|
| 281 |
|
|
else
|
| 282 |
|
|
{
|
| 283 |
|
|
// Invalid instruction!
|
| 284 |
|
|
__asm__ __volatile__ ( "\t lf.add.s r0,r0,r0 ");
|
| 285 |
|
|
10001140: c8 00 00 00 lf.add.s r0,r0,r0
|
| 286 |
|
|
break;
|
| 287 |
|
|
}
|
| 288 |
|
|
|
| 289 |
|
|
assert(recursive_int == 0);
|
| 290 |
|
|
10001144: bc 0e 00 00 l.sfeqi r14,0
|
| 291 |
|
|
10001148: 10 00 00 0e l.bf 10001180
|
| 292 |
|
|
1000114c: 18 60 10 00 l.movhi r3,0x1000
|
| 293 |
|
|
10001150: a8 63 2c f6 l.ori r3,r3,0x2cf6
|
| 294 |
|
|
10001154: d4 01 18 00 l.sw 0(r1),r3
|
| 295 |
|
|
10001158: 18 60 10 00 l.movhi r3,0x1000
|
| 296 |
|
|
1000115c: a8 63 2c 9a l.ori r3,r3,0x2c9a
|
| 297 |
|
|
10001160: d4 01 18 04 l.sw 4(r1),r3
|
| 298 |
|
|
10001164: 9c 60 00 76 l.addi r3,r0,118
|
| 299 |
|
|
10001168: d4 01 18 08 l.sw 8(r1),r3
|
| 300 |
|
|
1000116c: 18 60 10 00 l.movhi r3,0x1000
|
| 301 |
|
|
10001170: a8 63 2c 74 l.ori r3,r3,0x2c74
|
| 302 |
|
|
10001174: 04 00 02 1c l.jal 100019e4
|
| 303 |
|
|
|
| 304 |
|
|
}
|
| 305 |
|
|
|
| 306 |
|
|
static inline void exit(unsigned exit_code)
|
| 307 |
|
|
{
|
| 308 |
|
|
volatile register char t1 asm ("r1") = exit_code;
|
| 309 |
|
|
10001178: 9c 20 00 01 l.addi r1,r0,1
|
| 310 |
|
|
__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 311 |
|
|
}
|
| 312 |
|
|
else
|
| 313 |
|
|
{
|
| 314 |
|
|
// Invalid instruction!
|
| 315 |
|
|
__asm__ __volatile__ ( "\t lf.add.s r0,r0,r0 ");
|
| 316 |
|
|
1000117c: c8 00 00 00 lf.add.s r0,r0,r0
|
| 317 |
|
|
|
| 318 |
|
|
in_interrupt = 0;
|
| 319 |
|
|
10001180: 9c 60 00 00 l.addi r3,r0,0
|
| 320 |
|
|
10001184: d4 02 18 00 l.sw 0(r2),r3
|
| 321 |
|
|
}
|
| 322 |
|
|
10001188: 9c 21 00 1c l.addi r1,r1,28
|
| 323 |
|
|
1000118c: 85 21 ff fc l.lwz r9,-4(r1)
|
| 324 |
|
|
10001190: 84 21 ff f0 l.lwz r1,-16(r1)
|
| 325 |
|
|
10001194: 84 41 ff f4 l.lwz r2,-12(r1)
|
| 326 |
|
|
10001198: 85 c1 ff f8 l.lwz r14,-8(r1)
|
| 327 |
|
|
1000119c: 44 00 48 00 l.jr r9
|
| 328 |
|
|
in_interrupt = 1;
|
| 329 |
|
|
|
| 330 |
|
|
switch (cause)
|
| 331 |
|
|
{
|
| 332 |
|
|
case EXCEPTION_SYSCALL:
|
| 333 |
|
|
if (func_syscall)
|
| 334 |
|
|
100011a0: 18 60 10 00 l.movhi r3,0x1000
|
| 335 |
|
|
100011a4: a8 63 2f e4 l.ori r3,r3,0x2fe4
|
| 336 |
|
|
100011a8: 84 63 00 00 l.lwz r3,0(r3)
|
| 337 |
|
|
100011ac: bc 03 00 00 l.sfeqi r3,0
|
| 338 |
|
|
100011b0: 10 00 00 4a l.bf 100012d8
|
| 339 |
|
|
panic("EXT_INT!");
|
| 340 |
|
|
break;
|
| 341 |
|
|
|
| 342 |
|
|
case EXCEPTION_FAULT:
|
| 343 |
|
|
if (func_fault)
|
| 344 |
|
|
func_fault();
|
| 345 |
|
|
100011b4: 48 00 18 00 l.jalr r3
|
| 346 |
|
|
100011b8: 03 ff ff e3 l.j 10001144
|
| 347 |
|
|
else
|
| 348 |
|
|
panic("SYSCALL!");
|
| 349 |
|
|
break;
|
| 350 |
|
|
|
| 351 |
|
|
case EXCEPTION_BREAK:
|
| 352 |
|
|
if (func_break)
|
| 353 |
|
|
100011bc: 18 60 10 00 l.movhi r3,0x1000
|
| 354 |
|
|
100011c0: a8 63 2f ec l.ori r3,r3,0x2fec
|
| 355 |
|
|
100011c4: 84 63 00 00 l.lwz r3,0(r3)
|
| 356 |
|
|
100011c8: bc 03 00 00 l.sfeqi r3,0
|
| 357 |
|
|
100011cc: 0f ff ff fa l.bnf 100011b4
|
| 358 |
|
|
func_break();
|
| 359 |
|
|
else
|
| 360 |
|
|
panic("BREAK!");
|
| 361 |
|
|
100011d0: 18 60 10 00 l.movhi r3,0x1000
|
| 362 |
|
|
100011d4: a8 63 2c b0 l.ori r3,r3,0x2cb0
|
| 363 |
|
|
100011d8: d4 01 18 00 l.sw 0(r1),r3
|
| 364 |
|
|
100011dc: 18 60 10 00 l.movhi r3,0x1000
|
| 365 |
|
|
100011e0: a8 63 2c 9a l.ori r3,r3,0x2c9a
|
| 366 |
|
|
100011e4: d4 01 18 04 l.sw 4(r1),r3
|
| 367 |
|
|
100011e8: 9c 60 00 50 l.addi r3,r0,80
|
| 368 |
|
|
100011ec: 03 ff ff d0 l.j 1000112c
|
| 369 |
|
|
break;
|
| 370 |
|
|
|
| 371 |
|
|
case EXCEPTION_EXTINT:
|
| 372 |
|
|
if (func_extint)
|
| 373 |
|
|
100011f0: 18 60 10 00 l.movhi r3,0x1000
|
| 374 |
|
|
100011f4: a8 63 2f e8 l.ori r3,r3,0x2fe8
|
| 375 |
|
|
100011f8: 84 63 00 00 l.lwz r3,0(r3)
|
| 376 |
|
|
100011fc: bc 03 00 00 l.sfeqi r3,0
|
| 377 |
|
|
10001200: 0f ff ff ed l.bnf 100011b4
|
| 378 |
|
|
func_extint();
|
| 379 |
|
|
else
|
| 380 |
|
|
panic("EXT_INT!");
|
| 381 |
|
|
10001204: 18 60 10 00 l.movhi r3,0x1000
|
| 382 |
|
|
10001208: a8 63 2c b9 l.ori r3,r3,0x2cb9
|
| 383 |
|
|
1000120c: d4 01 18 00 l.sw 0(r1),r3
|
| 384 |
|
|
10001210: 18 60 10 00 l.movhi r3,0x1000
|
| 385 |
|
|
10001214: a8 63 2c 9a l.ori r3,r3,0x2c9a
|
| 386 |
|
|
10001218: d4 01 18 04 l.sw 4(r1),r3
|
| 387 |
|
|
1000121c: 9c 60 00 57 l.addi r3,r0,87
|
| 388 |
|
|
10001220: 03 ff ff c3 l.j 1000112c
|
| 389 |
|
|
break;
|
| 390 |
|
|
|
| 391 |
|
|
case EXCEPTION_FAULT:
|
| 392 |
|
|
if (func_fault)
|
| 393 |
|
|
10001224: 18 60 10 00 l.movhi r3,0x1000
|
| 394 |
|
|
10001228: a8 63 2f f0 l.ori r3,r3,0x2ff0
|
| 395 |
|
|
1000122c: 84 63 00 00 l.lwz r3,0(r3)
|
| 396 |
|
|
10001230: bc 03 00 00 l.sfeqi r3,0
|
| 397 |
|
|
10001234: 0f ff ff e0 l.bnf 100011b4
|
| 398 |
|
|
func_fault();
|
| 399 |
|
|
else
|
| 400 |
|
|
panic("FAULT");
|
| 401 |
|
|
10001238: 18 60 10 00 l.movhi r3,0x1000
|
| 402 |
|
|
1000123c: a8 63 2c c4 l.ori r3,r3,0x2cc4
|
| 403 |
|
|
10001240: d4 01 18 00 l.sw 0(r1),r3
|
| 404 |
|
|
10001244: 18 60 10 00 l.movhi r3,0x1000
|
| 405 |
|
|
10001248: a8 63 2c 9a l.ori r3,r3,0x2c9a
|
| 406 |
|
|
1000124c: d4 01 18 04 l.sw 4(r1),r3
|
| 407 |
|
|
10001250: 9c 60 00 5e l.addi r3,r0,94
|
| 408 |
|
|
10001254: 03 ff ff b6 l.j 1000112c
|
| 409 |
|
|
break;
|
| 410 |
|
|
|
| 411 |
|
|
case EXCEPTION_MULT:
|
| 412 |
|
|
panic("MULT!");
|
| 413 |
|
|
10001258: 18 60 10 00 l.movhi r3,0x1000
|
| 414 |
|
|
1000125c: a8 63 2c cc l.ori r3,r3,0x2ccc
|
| 415 |
|
|
10001260: d4 01 18 00 l.sw 0(r1),r3
|
| 416 |
|
|
10001264: 18 60 10 00 l.movhi r3,0x1000
|
| 417 |
|
|
10001268: a8 63 2c 9a l.ori r3,r3,0x2c9a
|
| 418 |
|
|
1000126c: d4 01 18 04 l.sw 4(r1),r3
|
| 419 |
|
|
10001270: 9c 60 00 62 l.addi r3,r0,98
|
| 420 |
|
|
10001274: 03 ff ff ae l.j 1000112c
|
| 421 |
|
|
break;
|
| 422 |
|
|
|
| 423 |
|
|
case EXCEPTION_UMULT:
|
| 424 |
|
|
panic("UMULT!");
|
| 425 |
|
|
10001278: 18 60 10 00 l.movhi r3,0x1000
|
| 426 |
|
|
1000127c: a8 63 2c d4 l.ori r3,r3,0x2cd4
|
| 427 |
|
|
10001280: d4 01 18 00 l.sw 0(r1),r3
|
| 428 |
|
|
10001284: 18 60 10 00 l.movhi r3,0x1000
|
| 429 |
|
|
10001288: a8 63 2c 9a l.ori r3,r3,0x2c9a
|
| 430 |
|
|
1000128c: d4 01 18 04 l.sw 4(r1),r3
|
| 431 |
|
|
10001290: 9c 60 00 66 l.addi r3,r0,102
|
| 432 |
|
|
10001294: 03 ff ff a6 l.j 1000112c
|
| 433 |
|
|
break;
|
| 434 |
|
|
|
| 435 |
|
|
case EXCEPTION_DIV:
|
| 436 |
|
|
panic("DIV!");
|
| 437 |
|
|
10001298: 18 60 10 00 l.movhi r3,0x1000
|
| 438 |
|
|
1000129c: a8 63 2c dd l.ori r3,r3,0x2cdd
|
| 439 |
|
|
100012a0: d4 01 18 00 l.sw 0(r1),r3
|
| 440 |
|
|
100012a4: 18 60 10 00 l.movhi r3,0x1000
|
| 441 |
|
|
100012a8: a8 63 2c 9a l.ori r3,r3,0x2c9a
|
| 442 |
|
|
100012ac: d4 01 18 04 l.sw 4(r1),r3
|
| 443 |
|
|
100012b0: 9c 60 00 6a l.addi r3,r0,106
|
| 444 |
|
|
100012b4: 03 ff ff 9e l.j 1000112c
|
| 445 |
|
|
case EXCEPTION_UDIV:
|
| 446 |
|
|
panic("UDIV!");
|
| 447 |
|
|
break;
|
| 448 |
|
|
|
| 449 |
|
|
default:
|
| 450 |
|
|
panic("UNKNOWN");
|
| 451 |
|
|
100012b8: 18 60 10 00 l.movhi r3,0x1000
|
| 452 |
|
|
100012bc: a8 63 2c ec l.ori r3,r3,0x2cec
|
| 453 |
|
|
100012c0: d4 01 18 00 l.sw 0(r1),r3
|
| 454 |
|
|
100012c4: 18 60 10 00 l.movhi r3,0x1000
|
| 455 |
|
|
100012c8: a8 63 2c 9a l.ori r3,r3,0x2c9a
|
| 456 |
|
|
100012cc: d4 01 18 04 l.sw 4(r1),r3
|
| 457 |
|
|
100012d0: 9c 60 00 72 l.addi r3,r0,114
|
| 458 |
|
|
100012d4: 03 ff ff 96 l.j 1000112c
|
| 459 |
|
|
{
|
| 460 |
|
|
case EXCEPTION_SYSCALL:
|
| 461 |
|
|
if (func_syscall)
|
| 462 |
|
|
func_syscall();
|
| 463 |
|
|
else
|
| 464 |
|
|
panic("SYSCALL!");
|
| 465 |
|
|
100012d8: 18 60 10 00 l.movhi r3,0x1000
|
| 466 |
|
|
100012dc: a8 63 2c 8f l.ori r3,r3,0x2c8f
|
| 467 |
|
|
100012e0: d4 01 18 00 l.sw 0(r1),r3
|
| 468 |
|
|
100012e4: 18 60 10 00 l.movhi r3,0x1000
|
| 469 |
|
|
100012e8: a8 63 2c 9a l.ori r3,r3,0x2c9a
|
| 470 |
|
|
100012ec: d4 01 18 04 l.sw 4(r1),r3
|
| 471 |
|
|
100012f0: 9c 60 00 49 l.addi r3,r0,73
|
| 472 |
|
|
100012f4: 03 ff ff 8e l.j 1000112c
|
| 473 |
|
|
|
| 474 |
|
|
100012f8 :
|
| 475 |
|
|
static void outnum( struct vbuf *buf, const long n, const long base, params_t *par)
|
| 476 |
|
|
{
|
| 477 |
|
|
char* cp;
|
| 478 |
|
|
int negative;
|
| 479 |
|
|
char outbuf[32];
|
| 480 |
|
|
const char udigits[] = "0123456789ABCDEF";
|
| 481 |
|
|
100012f8: 18 e0 38 39 l.movhi r7,0x3839
|
| 482 |
|
|
/* This routine moves a number to the output buffer */
|
| 483 |
|
|
/* as directed by the padding and positioning flags. */
|
| 484 |
|
|
/* */
|
| 485 |
|
|
//----------------------------------------------------
|
| 486 |
|
|
#if defined PRINTF_DEC_PRINT || defined PRINTF_HEX_PRINT
|
| 487 |
|
|
static void outnum( struct vbuf *buf, const long n, const long base, params_t *par)
|
| 488 |
|
|
100012fc: d7 e1 17 dc l.sw -36(r1),r2
|
| 489 |
|
|
{
|
| 490 |
|
|
char* cp;
|
| 491 |
|
|
int negative;
|
| 492 |
|
|
char outbuf[32];
|
| 493 |
|
|
const char udigits[] = "0123456789ABCDEF";
|
| 494 |
|
|
10001300: a9 07 41 42 l.ori r8,r7,0x4142
|
| 495 |
|
|
/* This routine moves a number to the output buffer */
|
| 496 |
|
|
/* as directed by the padding and positioning flags. */
|
| 497 |
|
|
/* */
|
| 498 |
|
|
//----------------------------------------------------
|
| 499 |
|
|
#if defined PRINTF_DEC_PRINT || defined PRINTF_HEX_PRINT
|
| 500 |
|
|
static void outnum( struct vbuf *buf, const long n, const long base, params_t *par)
|
| 501 |
|
|
10001304: d7 e1 a7 e8 l.sw -24(r1),r20
|
| 502 |
|
|
10001308: d7 e1 b7 ec l.sw -20(r1),r22
|
| 503 |
|
|
1000130c: d7 e1 4f fc l.sw -4(r1),r9
|
| 504 |
|
|
10001310: d7 e1 0f d8 l.sw -40(r1),r1
|
| 505 |
|
|
10001314: d7 e1 77 e0 l.sw -32(r1),r14
|
| 506 |
|
|
10001318: d7 e1 97 e4 l.sw -28(r1),r18
|
| 507 |
|
|
1000131c: d7 e1 c7 f0 l.sw -16(r1),r24
|
| 508 |
|
|
10001320: d7 e1 d7 f4 l.sw -12(r1),r26
|
| 509 |
|
|
10001324: d7 e1 e7 f8 l.sw -8(r1),r28
|
| 510 |
|
|
{
|
| 511 |
|
|
char* cp;
|
| 512 |
|
|
int negative;
|
| 513 |
|
|
char outbuf[32];
|
| 514 |
|
|
const char udigits[] = "0123456789ABCDEF";
|
| 515 |
|
|
10001328: 18 40 34 35 l.movhi r2,0x3435
|
| 516 |
|
|
/* This routine moves a number to the output buffer */
|
| 517 |
|
|
/* as directed by the padding and positioning flags. */
|
| 518 |
|
|
/* */
|
| 519 |
|
|
//----------------------------------------------------
|
| 520 |
|
|
#if defined PRINTF_DEC_PRINT || defined PRINTF_HEX_PRINT
|
| 521 |
|
|
static void outnum( struct vbuf *buf, const long n, const long base, params_t *par)
|
| 522 |
|
|
1000132c: 9c 21 ff 90 l.addi r1,r1,-112
|
| 523 |
|
|
const char *digits;
|
| 524 |
|
|
unsigned long num;
|
| 525 |
|
|
int count;
|
| 526 |
|
|
|
| 527 |
|
|
/* Check if number is negative */
|
| 528 |
|
|
if (base == 10 && n < 0L) {
|
| 529 |
|
|
10001330: ac c4 00 0a l.xori r6,r4,10
|
| 530 |
|
|
static void outnum( struct vbuf *buf, const long n, const long base, params_t *par)
|
| 531 |
|
|
{
|
| 532 |
|
|
char* cp;
|
| 533 |
|
|
int negative;
|
| 534 |
|
|
char outbuf[32];
|
| 535 |
|
|
const char udigits[] = "0123456789ABCDEF";
|
| 536 |
|
|
10001334: a8 42 36 37 l.ori r2,r2,0x3637
|
| 537 |
|
|
10001338: d4 01 40 08 l.sw 8(r1),r8
|
| 538 |
|
|
1000133c: 19 00 43 44 l.movhi r8,0x4344
|
| 539 |
|
|
/* This routine moves a number to the output buffer */
|
| 540 |
|
|
/* as directed by the padding and positioning flags. */
|
| 541 |
|
|
/* */
|
| 542 |
|
|
//----------------------------------------------------
|
| 543 |
|
|
#if defined PRINTF_DEC_PRINT || defined PRINTF_HEX_PRINT
|
| 544 |
|
|
static void outnum( struct vbuf *buf, const long n, const long base, params_t *par)
|
| 545 |
|
|
10001340: aa 84 00 00 l.ori r20,r4,0x0
|
| 546 |
|
|
{
|
| 547 |
|
|
char* cp;
|
| 548 |
|
|
int negative;
|
| 549 |
|
|
char outbuf[32];
|
| 550 |
|
|
const char udigits[] = "0123456789ABCDEF";
|
| 551 |
|
|
10001344: a9 08 45 46 l.ori r8,r8,0x4546
|
| 552 |
|
|
const char *digits;
|
| 553 |
|
|
unsigned long num;
|
| 554 |
|
|
int count;
|
| 555 |
|
|
|
| 556 |
|
|
/* Check if number is negative */
|
| 557 |
|
|
if (base == 10 && n < 0L) {
|
| 558 |
|
|
10001348: e1 60 30 02 l.sub r11,r0,r6
|
| 559 |
|
|
static void outnum( struct vbuf *buf, const long n, const long base, params_t *par)
|
| 560 |
|
|
{
|
| 561 |
|
|
char* cp;
|
| 562 |
|
|
int negative;
|
| 563 |
|
|
char outbuf[32];
|
| 564 |
|
|
const char udigits[] = "0123456789ABCDEF";
|
| 565 |
|
|
1000134c: 18 80 30 31 l.movhi r4,0x3031
|
| 566 |
|
|
10001350: d4 01 10 04 l.sw 4(r1),r2
|
| 567 |
|
|
const char ldigits[] = "0123456789abcdef";
|
| 568 |
|
|
10001354: d4 01 10 18 l.sw 24(r1),r2
|
| 569 |
|
|
10001358: 18 40 63 64 l.movhi r2,0x6364
|
| 570 |
|
|
static void outnum( struct vbuf *buf, const long n, const long base, params_t *par)
|
| 571 |
|
|
{
|
| 572 |
|
|
char* cp;
|
| 573 |
|
|
int negative;
|
| 574 |
|
|
char outbuf[32];
|
| 575 |
|
|
const char udigits[] = "0123456789ABCDEF";
|
| 576 |
|
|
1000135c: a8 84 32 33 l.ori r4,r4,0x3233
|
| 577 |
|
|
const char ldigits[] = "0123456789abcdef";
|
| 578 |
|
|
10001360: a8 e7 61 62 l.ori r7,r7,0x6162
|
| 579 |
|
|
const char *digits;
|
| 580 |
|
|
unsigned long num;
|
| 581 |
|
|
int count;
|
| 582 |
|
|
|
| 583 |
|
|
/* Check if number is negative */
|
| 584 |
|
|
if (base == 10 && n < 0L) {
|
| 585 |
|
|
10001364: e0 cb 30 04 l.or r6,r11,r6
|
| 586 |
|
|
static void outnum( struct vbuf *buf, const long n, const long base, params_t *par)
|
| 587 |
|
|
{
|
| 588 |
|
|
char* cp;
|
| 589 |
|
|
int negative;
|
| 590 |
|
|
char outbuf[32];
|
| 591 |
|
|
const char udigits[] = "0123456789ABCDEF";
|
| 592 |
|
|
10001368: d4 01 40 0c l.sw 12(r1),r8
|
| 593 |
|
|
const char ldigits[] = "0123456789abcdef";
|
| 594 |
|
|
1000136c: a8 42 65 66 l.ori r2,r2,0x6566
|
| 595 |
|
|
static void outnum( struct vbuf *buf, const long n, const long base, params_t *par)
|
| 596 |
|
|
{
|
| 597 |
|
|
char* cp;
|
| 598 |
|
|
int negative;
|
| 599 |
|
|
char outbuf[32];
|
| 600 |
|
|
const char udigits[] = "0123456789ABCDEF";
|
| 601 |
|
|
10001370: 9d 00 00 00 l.addi r8,r0,0
|
| 602 |
|
|
10001374: d4 01 20 00 l.sw 0(r1),r4
|
| 603 |
|
|
10001378: d8 01 40 10 l.sb 16(r1),r8
|
| 604 |
|
|
const char ldigits[] = "0123456789abcdef";
|
| 605 |
|
|
1000137c: d4 01 20 14 l.sw 20(r1),r4
|
| 606 |
|
|
10001380: d4 01 38 1c l.sw 28(r1),r7
|
| 607 |
|
|
10001384: d4 01 10 20 l.sw 32(r1),r2
|
| 608 |
|
|
10001388: d8 01 40 24 l.sb 36(r1),r8
|
| 609 |
|
|
const char *digits;
|
| 610 |
|
|
unsigned long num;
|
| 611 |
|
|
int count;
|
| 612 |
|
|
|
| 613 |
|
|
/* Check if number is negative */
|
| 614 |
|
|
if (base == 10 && n < 0L) {
|
| 615 |
|
|
1000138c: bd 86 00 00 l.sfltsi r6,0
|
| 616 |
|
|
/* This routine moves a number to the output buffer */
|
| 617 |
|
|
/* as directed by the padding and positioning flags. */
|
| 618 |
|
|
/* */
|
| 619 |
|
|
//----------------------------------------------------
|
| 620 |
|
|
#if defined PRINTF_DEC_PRINT || defined PRINTF_HEX_PRINT
|
| 621 |
|
|
static void outnum( struct vbuf *buf, const long n, const long base, params_t *par)
|
| 622 |
|
|
10001390: aa c5 00 00 l.ori r22,r5,0x0
|
| 623 |
|
|
const char *digits;
|
| 624 |
|
|
unsigned long num;
|
| 625 |
|
|
int count;
|
| 626 |
|
|
|
| 627 |
|
|
/* Check if number is negative */
|
| 628 |
|
|
if (base == 10 && n < 0L) {
|
| 629 |
|
|
10001394: 10 00 00 03 l.bf 100013a0
|
| 630 |
|
|
10001398: bd 63 00 00 l.sfgesi r3,0
|
| 631 |
|
|
1000139c: 0c 00 00 4d l.bnf 100014d0
|
| 632 |
|
|
negative = 1;
|
| 633 |
|
|
num = -(n);
|
| 634 |
|
|
}
|
| 635 |
|
|
else{
|
| 636 |
|
|
num = (n);
|
| 637 |
|
|
100013a0: a8 43 00 00 l.ori r2,r3,0x0
|
| 638 |
|
|
negative = 0;
|
| 639 |
|
|
100013a4: 9f 80 00 00 l.addi r28,r0,0
|
| 640 |
|
|
}
|
| 641 |
|
|
|
| 642 |
|
|
if (par->uppercase)
|
| 643 |
|
|
100013a8: 84 76 00 18 l.lwz r3,24(r22)
|
| 644 |
|
|
digits = udigits;
|
| 645 |
|
|
100013ac: ab 41 00 00 l.ori r26,r1,0x0
|
| 646 |
|
|
else{
|
| 647 |
|
|
num = (n);
|
| 648 |
|
|
negative = 0;
|
| 649 |
|
|
}
|
| 650 |
|
|
|
| 651 |
|
|
if (par->uppercase)
|
| 652 |
|
|
100013b0: bc 03 00 00 l.sfeqi r3,0
|
| 653 |
|
|
100013b4: 0c 00 00 02 l.bnf 100013bc
|
| 654 |
|
|
digits = udigits;
|
| 655 |
|
|
else
|
| 656 |
|
|
digits = ldigits;
|
| 657 |
|
|
100013b8: 9f 41 00 14 l.addi r26,r1,20
|
| 658 |
|
|
100013bc: 9f 01 00 28 l.addi r24,r1,40
|
| 659 |
|
|
100013c0: a9 d8 00 00 l.ori r14,r24,0x0
|
| 660 |
|
|
100013c4: 00 00 00 02 l.j 100013cc
|
| 661 |
|
|
100013c8: a9 d2 00 00 l.ori r14,r18,0x0
|
| 662 |
|
|
|
| 663 |
|
|
/* Build number (backwards) in outbuf */
|
| 664 |
|
|
cp = outbuf;
|
| 665 |
|
|
do {
|
| 666 |
|
|
*cp++ = digits[(int)(num % base)];
|
| 667 |
|
|
100013cc: a8 62 00 00 l.ori r3,r2,0x0
|
| 668 |
|
|
100013d0: a8 94 00 00 l.ori r4,r20,0x0
|
| 669 |
|
|
/* This routine moves a number to the output buffer */
|
| 670 |
|
|
/* as directed by the padding and positioning flags. */
|
| 671 |
|
|
/* */
|
| 672 |
|
|
//----------------------------------------------------
|
| 673 |
|
|
#if defined PRINTF_DEC_PRINT || defined PRINTF_HEX_PRINT
|
| 674 |
|
|
static void outnum( struct vbuf *buf, const long n, const long base, params_t *par)
|
| 675 |
|
|
100013d4: 9e 4e 00 01 l.addi r18,r14,1
|
| 676 |
|
|
digits = ldigits;
|
| 677 |
|
|
|
| 678 |
|
|
/* Build number (backwards) in outbuf */
|
| 679 |
|
|
cp = outbuf;
|
| 680 |
|
|
do {
|
| 681 |
|
|
*cp++ = digits[(int)(num % base)];
|
| 682 |
|
|
100013d8: 04 00 05 52 l.jal 10002920 <__umodsi3>
|
| 683 |
|
|
100013dc: e1 7a 58 00 l.add r11,r26,r11
|
| 684 |
|
|
} while ((num /= base) > 0);
|
| 685 |
|
|
100013e0: a8 62 00 00 l.ori r3,r2,0x0
|
| 686 |
|
|
digits = ldigits;
|
| 687 |
|
|
|
| 688 |
|
|
/* Build number (backwards) in outbuf */
|
| 689 |
|
|
cp = outbuf;
|
| 690 |
|
|
do {
|
| 691 |
|
|
*cp++ = digits[(int)(num % base)];
|
| 692 |
|
|
100013e4: 8d 6b 00 00 l.lbz r11,0(r11)
|
| 693 |
|
|
} while ((num /= base) > 0);
|
| 694 |
|
|
100013e8: a8 94 00 00 l.ori r4,r20,0x0
|
| 695 |
|
|
digits = ldigits;
|
| 696 |
|
|
|
| 697 |
|
|
/* Build number (backwards) in outbuf */
|
| 698 |
|
|
cp = outbuf;
|
| 699 |
|
|
do {
|
| 700 |
|
|
*cp++ = digits[(int)(num % base)];
|
| 701 |
|
|
100013ec: d8 0e 58 00 l.sb 0(r14),r11
|
| 702 |
|
|
} while ((num /= base) > 0);
|
| 703 |
|
|
100013f0: 04 00 05 43 l.jal 100028fc <__udivsi3>
|
| 704 |
|
|
100013f4: bc 0b 00 00 l.sfeqi r11,0
|
| 705 |
|
|
100013f8: a8 4b 00 00 l.ori r2,r11,0x0
|
| 706 |
|
|
100013fc: 0f ff ff f3 l.bnf 100013c8
|
| 707 |
|
|
if (negative)
|
| 708 |
|
|
10001400: bc 1c 00 00 l.sfeqi r28,0
|
| 709 |
|
|
10001404: 10 00 00 04 l.bf 10001414
|
| 710 |
|
|
*cp++ = '-';
|
| 711 |
|
|
10001408: 9c 40 00 2d l.addi r2,r0,45
|
| 712 |
|
|
1000140c: 9e 4e 00 02 l.addi r18,r14,2
|
| 713 |
|
|
10001410: d8 0e 10 01 l.sb 1(r14),r2
|
| 714 |
|
|
*cp-- = 0;
|
| 715 |
|
|
10001414: 9d 00 00 00 l.addi r8,r0,0
|
| 716 |
|
|
10001418: 9d d2 ff ff l.addi r14,r18,-1
|
| 717 |
|
|
1000141c: d8 12 40 00 l.sb 0(r18),r8
|
| 718 |
|
|
const char * s;
|
| 719 |
|
|
|
| 720 |
|
|
if(!str)
|
| 721 |
|
|
return 0;
|
| 722 |
|
|
|
| 723 |
|
|
for(s = str; *s; ++ s)
|
| 724 |
|
|
10001420: 90 81 00 28 l.lbs r4,40(r1)
|
| 725 |
|
|
10001424: bc 04 00 00 l.sfeqi r4,0
|
| 726 |
|
|
10001428: 10 00 00 08 l.bf 10001448
|
| 727 |
|
|
1000142c: 9c 41 00 29 l.addi r2,r1,41
|
| 728 |
|
|
10001430: a8 82 00 00 l.ori r4,r2,0x0
|
| 729 |
|
|
10001434: 9c 42 00 01 l.addi r2,r2,1
|
| 730 |
|
|
10001438: 90 62 ff ff l.lbs r3,-1(r2)
|
| 731 |
|
|
1000143c: bc 03 00 00 l.sfeqi r3,0
|
| 732 |
|
|
10001440: 0f ff ff fc l.bnf 10001430
|
| 733 |
|
|
10001444: e0 84 c0 02 l.sub r4,r4,r24
|
| 734 |
|
|
*cp++ = '-';
|
| 735 |
|
|
*cp-- = 0;
|
| 736 |
|
|
|
| 737 |
|
|
/* Move the converted number to the buffer and */
|
| 738 |
|
|
/* add in the padding where needed. */
|
| 739 |
|
|
par->len = strlen(outbuf);
|
| 740 |
|
|
10001448: d4 16 20 00 l.sw 0(r22),r4
|
| 741 |
|
|
#ifdef PRINTF_ENABLE_PADDING
|
| 742 |
|
|
padding(buf, !(par->left_flag), par);
|
| 743 |
|
|
#endif
|
| 744 |
|
|
count = 0;
|
| 745 |
|
|
while (cp >= outbuf && count++ < par->max_len)
|
| 746 |
|
|
1000144c: e4 6e c0 00 l.sfgeu r14,r24
|
| 747 |
|
|
10001450: 0c 00 00 14 l.bnf 100014a0
|
| 748 |
|
|
10001454: 84 56 00 1c l.lwz r2,28(r22)
|
| 749 |
|
|
10001458: bd a2 00 00 l.sflesi r2,0
|
| 750 |
|
|
1000145c: 10 00 00 11 l.bf 100014a0
|
| 751 |
|
|
10001460: 1a 80 10 00 l.movhi r20,0x1000
|
| 752 |
|
|
/* This routine moves a number to the output buffer */
|
| 753 |
|
|
/* as directed by the padding and positioning flags. */
|
| 754 |
|
|
/* */
|
| 755 |
|
|
//----------------------------------------------------
|
| 756 |
|
|
#if defined PRINTF_DEC_PRINT || defined PRINTF_HEX_PRINT
|
| 757 |
|
|
static void outnum( struct vbuf *buf, const long n, const long base, params_t *par)
|
| 758 |
|
|
10001464: e2 52 c0 02 l.sub r18,r18,r24
|
| 759 |
|
|
par->len = strlen(outbuf);
|
| 760 |
|
|
#ifdef PRINTF_ENABLE_PADDING
|
| 761 |
|
|
padding(buf, !(par->left_flag), par);
|
| 762 |
|
|
#endif
|
| 763 |
|
|
count = 0;
|
| 764 |
|
|
while (cp >= outbuf && count++ < par->max_len)
|
| 765 |
|
|
10001468: 9c 40 00 01 l.addi r2,r0,1
|
| 766 |
|
|
1000146c: aa 94 2f f4 l.ori r20,r20,0x2ff4
|
| 767 |
|
|
10001470: 00 00 00 05 l.j 10001484
|
| 768 |
|
|
10001474: 84 96 00 1c l.lwz r4,28(r22)
|
| 769 |
|
|
10001478: e5 a4 10 00 l.sfles r4,r2
|
| 770 |
|
|
1000147c: a8 43 00 00 l.ori r2,r3,0x0
|
| 771 |
|
|
10001480: 10 00 00 08 l.bf 100014a0
|
| 772 |
|
|
vbuf_putchar(buf, *cp--);
|
| 773 |
|
|
10001484: 90 6e 00 00 l.lbs r3,0(r14)
|
| 774 |
|
|
10001488: 85 74 00 00 l.lwz r11,0(r20)
|
| 775 |
|
|
1000148c: 9d ce ff ff l.addi r14,r14,-1
|
| 776 |
|
|
10001490: 48 00 58 00 l.jalr r11
|
| 777 |
|
|
par->len = strlen(outbuf);
|
| 778 |
|
|
#ifdef PRINTF_ENABLE_PADDING
|
| 779 |
|
|
padding(buf, !(par->left_flag), par);
|
| 780 |
|
|
#endif
|
| 781 |
|
|
count = 0;
|
| 782 |
|
|
while (cp >= outbuf && count++ < par->max_len)
|
| 783 |
|
|
10001494: e4 02 90 00 l.sfeq r2,r18
|
| 784 |
|
|
10001498: 9c 62 00 01 l.addi r3,r2,1
|
| 785 |
|
|
1000149c: 0f ff ff f6 l.bnf 10001474
|
| 786 |
|
|
vbuf_putchar(buf, *cp--);
|
| 787 |
|
|
#ifdef PRINTF_ENABLE_PADDING
|
| 788 |
|
|
padding(buf, par->left_flag, par);
|
| 789 |
|
|
#endif
|
| 790 |
|
|
}
|
| 791 |
|
|
100014a0: 9c 21 00 70 l.addi r1,r1,112
|
| 792 |
|
|
100014a4: 85 21 ff fc l.lwz r9,-4(r1)
|
| 793 |
|
|
100014a8: 84 21 ff d8 l.lwz r1,-40(r1)
|
| 794 |
|
|
100014ac: 84 41 ff dc l.lwz r2,-36(r1)
|
| 795 |
|
|
100014b0: 85 c1 ff e0 l.lwz r14,-32(r1)
|
| 796 |
|
|
100014b4: 86 41 ff e4 l.lwz r18,-28(r1)
|
| 797 |
|
|
100014b8: 86 81 ff e8 l.lwz r20,-24(r1)
|
| 798 |
|
|
100014bc: 86 c1 ff ec l.lwz r22,-20(r1)
|
| 799 |
|
|
100014c0: 87 01 ff f0 l.lwz r24,-16(r1)
|
| 800 |
|
|
100014c4: 87 41 ff f4 l.lwz r26,-12(r1)
|
| 801 |
|
|
100014c8: 87 81 ff f8 l.lwz r28,-8(r1)
|
| 802 |
|
|
100014cc: 44 00 48 00 l.jr r9
|
| 803 |
|
|
int count;
|
| 804 |
|
|
|
| 805 |
|
|
/* Check if number is negative */
|
| 806 |
|
|
if (base == 10 && n < 0L) {
|
| 807 |
|
|
negative = 1;
|
| 808 |
|
|
num = -(n);
|
| 809 |
|
|
100014d0: e0 40 18 02 l.sub r2,r0,r3
|
| 810 |
|
|
unsigned long num;
|
| 811 |
|
|
int count;
|
| 812 |
|
|
|
| 813 |
|
|
/* Check if number is negative */
|
| 814 |
|
|
if (base == 10 && n < 0L) {
|
| 815 |
|
|
negative = 1;
|
| 816 |
|
|
100014d4: 9f 80 00 01 l.addi r28,r0,1
|
| 817 |
|
|
100014d8: 03 ff ff b4 l.j 100013a8
|
| 818 |
|
|
|
| 819 |
|
|
100014dc :
|
| 820 |
|
|
//----------------------------------------------------
|
| 821 |
|
|
// printf_register: Assign printf output function
|
| 822 |
|
|
//----------------------------------------------------
|
| 823 |
|
|
void printf_register(FP_OUTCHAR f)
|
| 824 |
|
|
{
|
| 825 |
|
|
_stdout = f;
|
| 826 |
|
|
100014dc: 18 80 10 00 l.movhi r4,0x1000
|
| 827 |
|
|
}
|
| 828 |
|
|
//----------------------------------------------------
|
| 829 |
|
|
// printf_register: Assign printf output function
|
| 830 |
|
|
//----------------------------------------------------
|
| 831 |
|
|
void printf_register(FP_OUTCHAR f)
|
| 832 |
|
|
{
|
| 833 |
|
|
100014e0: d7 e1 0f fc l.sw -4(r1),r1
|
| 834 |
|
|
_stdout = f;
|
| 835 |
|
|
100014e4: a8 84 2f f4 l.ori r4,r4,0x2ff4
|
| 836 |
|
|
}
|
| 837 |
|
|
//----------------------------------------------------
|
| 838 |
|
|
// printf_register: Assign printf output function
|
| 839 |
|
|
//----------------------------------------------------
|
| 840 |
|
|
void printf_register(FP_OUTCHAR f)
|
| 841 |
|
|
{
|
| 842 |
|
|
100014e8: 9c 21 ff fc l.addi r1,r1,-4
|
| 843 |
|
|
_stdout = f;
|
| 844 |
|
|
100014ec: d4 04 18 00 l.sw 0(r4),r3
|
| 845 |
|
|
}
|
| 846 |
|
|
100014f0: 9c 21 00 04 l.addi r1,r1,4
|
| 847 |
|
|
100014f4: 84 21 ff fc l.lwz r1,-4(r1)
|
| 848 |
|
|
100014f8: 44 00 48 00 l.jr r9
|
| 849 |
|
|
|
| 850 |
|
|
100014fc :
|
| 851 |
|
|
#endif
|
| 852 |
|
|
//----------------------------------------------------
|
| 853 |
|
|
// puts:
|
| 854 |
|
|
//----------------------------------------------------
|
| 855 |
|
|
int puts( const char * str )
|
| 856 |
|
|
{
|
| 857 |
|
|
100014fc: d7 e1 77 f8 l.sw -8(r1),r14
|
| 858 |
|
|
if (!_stdout)
|
| 859 |
|
|
10001500: 19 c0 10 00 l.movhi r14,0x1000
|
| 860 |
|
|
#endif
|
| 861 |
|
|
//----------------------------------------------------
|
| 862 |
|
|
// puts:
|
| 863 |
|
|
//----------------------------------------------------
|
| 864 |
|
|
int puts( const char * str )
|
| 865 |
|
|
{
|
| 866 |
|
|
10001504: d7 e1 17 f4 l.sw -12(r1),r2
|
| 867 |
|
|
if (!_stdout)
|
| 868 |
|
|
10001508: a9 ce 2f f4 l.ori r14,r14,0x2ff4
|
| 869 |
|
|
#endif
|
| 870 |
|
|
//----------------------------------------------------
|
| 871 |
|
|
// puts:
|
| 872 |
|
|
//----------------------------------------------------
|
| 873 |
|
|
int puts( const char * str )
|
| 874 |
|
|
{
|
| 875 |
|
|
1000150c: d7 e1 4f fc l.sw -4(r1),r9
|
| 876 |
|
|
if (!_stdout)
|
| 877 |
|
|
10001510: 85 6e 00 00 l.lwz r11,0(r14)
|
| 878 |
|
|
#endif
|
| 879 |
|
|
//----------------------------------------------------
|
| 880 |
|
|
// puts:
|
| 881 |
|
|
//----------------------------------------------------
|
| 882 |
|
|
int puts( const char * str )
|
| 883 |
|
|
{
|
| 884 |
|
|
10001514: d7 e1 0f f0 l.sw -16(r1),r1
|
| 885 |
|
|
if (!_stdout)
|
| 886 |
|
|
10001518: bc 0b 00 00 l.sfeqi r11,0
|
| 887 |
|
|
#endif
|
| 888 |
|
|
//----------------------------------------------------
|
| 889 |
|
|
// puts:
|
| 890 |
|
|
//----------------------------------------------------
|
| 891 |
|
|
int puts( const char * str )
|
| 892 |
|
|
{
|
| 893 |
|
|
1000151c: 9c 21 ff f0 l.addi r1,r1,-16
|
| 894 |
|
|
10001520: a8 43 00 00 l.ori r2,r3,0x0
|
| 895 |
|
|
if (!_stdout)
|
| 896 |
|
|
10001524: 10 00 00 12 l.bf 1000156c
|
| 897 |
|
|
return -1;
|
| 898 |
|
|
|
| 899 |
|
|
while (*str)
|
| 900 |
|
|
10001528: 90 63 00 00 l.lbs r3,0(r3)
|
| 901 |
|
|
1000152c: bc 03 00 00 l.sfeqi r3,0
|
| 902 |
|
|
10001530: 10 00 00 07 l.bf 1000154c
|
| 903 |
|
|
_stdout(*str++);
|
| 904 |
|
|
10001534: 9c 42 00 01 l.addi r2,r2,1
|
| 905 |
|
|
10001538: 48 00 58 00 l.jalr r11
|
| 906 |
|
|
int puts( const char * str )
|
| 907 |
|
|
{
|
| 908 |
|
|
if (!_stdout)
|
| 909 |
|
|
return -1;
|
| 910 |
|
|
|
| 911 |
|
|
while (*str)
|
| 912 |
|
|
1000153c: 90 62 00 00 l.lbs r3,0(r2)
|
| 913 |
|
|
10001540: bc 03 00 00 l.sfeqi r3,0
|
| 914 |
|
|
10001544: 85 6e 00 00 l.lwz r11,0(r14)
|
| 915 |
|
|
10001548: 0f ff ff fb l.bnf 10001534
|
| 916 |
|
|
_stdout(*str++);
|
| 917 |
|
|
|
| 918 |
|
|
return _stdout('\n');
|
| 919 |
|
|
1000154c: 9c 60 00 0a l.addi r3,r0,10
|
| 920 |
|
|
10001550: 48 00 58 00 l.jalr r11
|
| 921 |
|
|
}
|
| 922 |
|
|
10001554: 9c 21 00 10 l.addi r1,r1,16
|
| 923 |
|
|
10001558: 85 21 ff fc l.lwz r9,-4(r1)
|
| 924 |
|
|
1000155c: 84 21 ff f0 l.lwz r1,-16(r1)
|
| 925 |
|
|
10001560: 84 41 ff f4 l.lwz r2,-12(r1)
|
| 926 |
|
|
10001564: 85 c1 ff f8 l.lwz r14,-8(r1)
|
| 927 |
|
|
10001568: 44 00 48 00 l.jr r9
|
| 928 |
|
|
// puts:
|
| 929 |
|
|
//----------------------------------------------------
|
| 930 |
|
|
int puts( const char * str )
|
| 931 |
|
|
{
|
| 932 |
|
|
if (!_stdout)
|
| 933 |
|
|
return -1;
|
| 934 |
|
|
1000156c: 9d 60 ff ff l.addi r11,r0,-1
|
| 935 |
|
|
10001570: 03 ff ff f9 l.j 10001554
|
| 936 |
|
|
|
| 937 |
|
|
10001574 :
|
| 938 |
|
|
}
|
| 939 |
|
|
//----------------------------------------------------
|
| 940 |
|
|
// putchar:
|
| 941 |
|
|
//----------------------------------------------------
|
| 942 |
|
|
int putchar( int c )
|
| 943 |
|
|
{
|
| 944 |
|
|
10001574: d7 e1 17 f8 l.sw -8(r1),r2
|
| 945 |
|
|
10001578: a8 43 00 00 l.ori r2,r3,0x0
|
| 946 |
|
|
if (!_stdout)
|
| 947 |
|
|
1000157c: 18 60 10 00 l.movhi r3,0x1000
|
| 948 |
|
|
}
|
| 949 |
|
|
//----------------------------------------------------
|
| 950 |
|
|
// putchar:
|
| 951 |
|
|
//----------------------------------------------------
|
| 952 |
|
|
int putchar( int c )
|
| 953 |
|
|
{
|
| 954 |
|
|
10001580: d7 e1 4f fc l.sw -4(r1),r9
|
| 955 |
|
|
if (!_stdout)
|
| 956 |
|
|
10001584: a8 63 2f f4 l.ori r3,r3,0x2ff4
|
| 957 |
|
|
}
|
| 958 |
|
|
//----------------------------------------------------
|
| 959 |
|
|
// putchar:
|
| 960 |
|
|
//----------------------------------------------------
|
| 961 |
|
|
int putchar( int c )
|
| 962 |
|
|
{
|
| 963 |
|
|
10001588: d7 e1 0f f4 l.sw -12(r1),r1
|
| 964 |
|
|
if (!_stdout)
|
| 965 |
|
|
1000158c: 85 63 00 00 l.lwz r11,0(r3)
|
| 966 |
|
|
}
|
| 967 |
|
|
//----------------------------------------------------
|
| 968 |
|
|
// putchar:
|
| 969 |
|
|
//----------------------------------------------------
|
| 970 |
|
|
int putchar( int c )
|
| 971 |
|
|
{
|
| 972 |
|
|
10001590: 9c 21 ff f4 l.addi r1,r1,-12
|
| 973 |
|
|
if (!_stdout)
|
| 974 |
|
|
10001594: bc 0b 00 00 l.sfeqi r11,0
|
| 975 |
|
|
10001598: 10 00 00 0a l.bf 100015c0
|
| 976 |
|
|
return -1;
|
| 977 |
|
|
|
| 978 |
|
|
_stdout((char)c);
|
| 979 |
|
|
1000159c: b8 62 00 18 l.slli r3,r2,0x18
|
| 980 |
|
|
100015a0: b8 63 00 98 l.srai r3,r3,0x18
|
| 981 |
|
|
100015a4: 48 00 58 00 l.jalr r11
|
| 982 |
|
|
|
| 983 |
|
|
return c;
|
| 984 |
|
|
100015a8: a9 62 00 00 l.ori r11,r2,0x0
|
| 985 |
|
|
}
|
| 986 |
|
|
100015ac: 9c 21 00 0c l.addi r1,r1,12
|
| 987 |
|
|
100015b0: 85 21 ff fc l.lwz r9,-4(r1)
|
| 988 |
|
|
100015b4: 84 21 ff f4 l.lwz r1,-12(r1)
|
| 989 |
|
|
100015b8: 84 41 ff f8 l.lwz r2,-8(r1)
|
| 990 |
|
|
100015bc: 44 00 48 00 l.jr r9
|
| 991 |
|
|
// putchar:
|
| 992 |
|
|
//----------------------------------------------------
|
| 993 |
|
|
int putchar( int c )
|
| 994 |
|
|
{
|
| 995 |
|
|
if (!_stdout)
|
| 996 |
|
|
return -1;
|
| 997 |
|
|
100015c0: 9d 60 ff ff l.addi r11,r0,-1
|
| 998 |
|
|
100015c4: 03 ff ff fa l.j 100015ac
|
| 999 |
|
|
|
| 1000 |
|
|
100015c8 :
|
| 1001 |
|
|
/* added easily by following the examples shown for */
|
| 1002 |
|
|
/* the supported formats. */
|
| 1003 |
|
|
/* */
|
| 1004 |
|
|
//----------------------------------------------------
|
| 1005 |
|
|
int vbuf_printf(struct vbuf *buf, const char* ctrl1, va_list argp)
|
| 1006 |
|
|
{
|
| 1007 |
|
|
100015c8: d7 e1 97 e0 l.sw -32(r1),r18
|
| 1008 |
|
|
100015cc: d7 e1 f7 f8 l.sw -8(r1),r30
|
| 1009 |
|
|
100015d0: d7 e1 4f fc l.sw -4(r1),r9
|
| 1010 |
|
|
100015d4: d7 e1 0f d4 l.sw -44(r1),r1
|
| 1011 |
|
|
100015d8: d7 e1 17 d8 l.sw -40(r1),r2
|
| 1012 |
|
|
100015dc: d7 e1 77 dc l.sw -36(r1),r14
|
| 1013 |
|
|
100015e0: d7 e1 a7 e4 l.sw -28(r1),r20
|
| 1014 |
|
|
100015e4: d7 e1 b7 e8 l.sw -24(r1),r22
|
| 1015 |
|
|
100015e8: d7 e1 c7 ec l.sw -20(r1),r24
|
| 1016 |
|
|
100015ec: d7 e1 d7 f0 l.sw -16(r1),r26
|
| 1017 |
|
|
100015f0: d7 e1 e7 f4 l.sw -12(r1),r28
|
| 1018 |
|
|
100015f4: ab c4 00 00 l.ori r30,r4,0x0
|
| 1019 |
|
|
params_t par;
|
| 1020 |
|
|
|
| 1021 |
|
|
char ch;
|
| 1022 |
|
|
char* ctrl = (char*)ctrl1;
|
| 1023 |
|
|
|
| 1024 |
|
|
for ( ; *ctrl; ctrl++)
|
| 1025 |
|
|
100015f8: 90 64 00 00 l.lbs r3,0(r4)
|
| 1026 |
|
|
100015fc: bc 23 00 00 l.sfnei r3,0
|
| 1027 |
|
|
/* added easily by following the examples shown for */
|
| 1028 |
|
|
/* the supported formats. */
|
| 1029 |
|
|
/* */
|
| 1030 |
|
|
//----------------------------------------------------
|
| 1031 |
|
|
int vbuf_printf(struct vbuf *buf, const char* ctrl1, va_list argp)
|
| 1032 |
|
|
{
|
| 1033 |
|
|
10001600: 9c 21 ff b4 l.addi r1,r1,-76
|
| 1034 |
|
|
10001604: aa 45 00 00 l.ori r18,r5,0x0
|
| 1035 |
|
|
params_t par;
|
| 1036 |
|
|
|
| 1037 |
|
|
char ch;
|
| 1038 |
|
|
char* ctrl = (char*)ctrl1;
|
| 1039 |
|
|
|
| 1040 |
|
|
for ( ; *ctrl; ctrl++)
|
| 1041 |
|
|
10001608: 0c 00 00 77 l.bnf 100017e4
|
| 1042 |
|
|
{
|
| 1043 |
|
|
/* move format string chars to buffer until a */
|
| 1044 |
|
|
/* format control is found. */
|
| 1045 |
|
|
if (*ctrl != '%')
|
| 1046 |
|
|
{
|
| 1047 |
|
|
vbuf_putchar(buf, *ctrl);
|
| 1048 |
|
|
1000160c: 19 c0 10 00 l.movhi r14,0x1000
|
| 1049 |
|
|
}
|
| 1050 |
|
|
|
| 1051 |
|
|
/* initialize all the flags for this format. */
|
| 1052 |
|
|
dot_flag = long_flag = par.left_flag = par.do_padding = 0;
|
| 1053 |
|
|
par.pad_character = ' ';
|
| 1054 |
|
|
par.num2=32767;
|
| 1055 |
|
|
10001610: 9f 40 7f ff l.addi r26,r0,32767
|
| 1056 |
|
|
{
|
| 1057 |
|
|
/* move format string chars to buffer until a */
|
| 1058 |
|
|
/* format control is found. */
|
| 1059 |
|
|
if (*ctrl != '%')
|
| 1060 |
|
|
{
|
| 1061 |
|
|
vbuf_putchar(buf, *ctrl);
|
| 1062 |
|
|
10001614: a9 ce 2f f4 l.ori r14,r14,0x2ff4
|
| 1063 |
|
|
|
| 1064 |
|
|
/* initialize all the flags for this format. */
|
| 1065 |
|
|
dot_flag = long_flag = par.left_flag = par.do_padding = 0;
|
| 1066 |
|
|
par.pad_character = ' ';
|
| 1067 |
|
|
par.num2=32767;
|
| 1068 |
|
|
par.max_len = 10;
|
| 1069 |
|
|
10001618: 9f 00 00 0a l.addi r24,r0,10
|
| 1070 |
|
|
1000161c: 00 00 00 08 l.j 1000163c
|
| 1071 |
|
|
{
|
| 1072 |
|
|
/* move format string chars to buffer until a */
|
| 1073 |
|
|
/* format control is found. */
|
| 1074 |
|
|
if (*ctrl != '%')
|
| 1075 |
|
|
{
|
| 1076 |
|
|
vbuf_putchar(buf, *ctrl);
|
| 1077 |
|
|
10001620: 85 6e 00 00 l.lwz r11,0(r14)
|
| 1078 |
|
|
continue;
|
| 1079 |
|
|
10001624: ab 9e 00 00 l.ori r28,r30,0x0
|
| 1080 |
|
|
{
|
| 1081 |
|
|
/* move format string chars to buffer until a */
|
| 1082 |
|
|
/* format control is found. */
|
| 1083 |
|
|
if (*ctrl != '%')
|
| 1084 |
|
|
{
|
| 1085 |
|
|
vbuf_putchar(buf, *ctrl);
|
| 1086 |
|
|
10001628: 48 00 58 00 l.jalr r11
|
| 1087 |
|
|
params_t par;
|
| 1088 |
|
|
|
| 1089 |
|
|
char ch;
|
| 1090 |
|
|
char* ctrl = (char*)ctrl1;
|
| 1091 |
|
|
|
| 1092 |
|
|
for ( ; *ctrl; ctrl++)
|
| 1093 |
|
|
1000162c: 90 7c 00 01 l.lbs r3,1(r28)
|
| 1094 |
|
|
10001630: bc 03 00 00 l.sfeqi r3,0
|
| 1095 |
|
|
10001634: 9f dc 00 01 l.addi r30,r28,1
|
| 1096 |
|
|
10001638: 10 00 00 6b l.bf 100017e4
|
| 1097 |
|
|
{
|
| 1098 |
|
|
/* move format string chars to buffer until a */
|
| 1099 |
|
|
/* format control is found. */
|
| 1100 |
|
|
if (*ctrl != '%')
|
| 1101 |
|
|
1000163c: bc 03 00 25 l.sfeqi r3,37
|
| 1102 |
|
|
10001640: 0f ff ff f8 l.bnf 10001620
|
| 1103 |
|
|
|
| 1104 |
|
|
/* initialize all the flags for this format. */
|
| 1105 |
|
|
dot_flag = long_flag = par.left_flag = par.do_padding = 0;
|
| 1106 |
|
|
par.pad_character = ' ';
|
| 1107 |
|
|
par.num2=32767;
|
| 1108 |
|
|
par.max_len = 10;
|
| 1109 |
|
|
10001644: 90 be 00 01 l.lbs r5,1(r30)
|
| 1110 |
|
|
continue;
|
| 1111 |
|
|
}
|
| 1112 |
|
|
|
| 1113 |
|
|
/* initialize all the flags for this format. */
|
| 1114 |
|
|
dot_flag = long_flag = par.left_flag = par.do_padding = 0;
|
| 1115 |
|
|
par.pad_character = ' ';
|
| 1116 |
|
|
10001648: 9c 60 00 20 l.addi r3,r0,32
|
| 1117 |
|
|
vbuf_putchar(buf, *ctrl);
|
| 1118 |
|
|
continue;
|
| 1119 |
|
|
}
|
| 1120 |
|
|
|
| 1121 |
|
|
/* initialize all the flags for this format. */
|
| 1122 |
|
|
dot_flag = long_flag = par.left_flag = par.do_padding = 0;
|
| 1123 |
|
|
1000164c: 9c 40 00 00 l.addi r2,r0,0
|
| 1124 |
|
|
par.pad_character = ' ';
|
| 1125 |
|
|
10001650: d8 01 18 0c l.sb 12(r1),r3
|
| 1126 |
|
|
par.max_len = 10;
|
| 1127 |
|
|
|
| 1128 |
|
|
try_next:
|
| 1129 |
|
|
ch = *(++ctrl);
|
| 1130 |
|
|
|
| 1131 |
|
|
if ((ch >= '0' && ch <= '9'))
|
| 1132 |
|
|
10001654: a4 65 00 ff l.andi r3,r5,0xff
|
| 1133 |
|
|
vbuf_putchar(buf, *ctrl);
|
| 1134 |
|
|
continue;
|
| 1135 |
|
|
}
|
| 1136 |
|
|
|
| 1137 |
|
|
/* initialize all the flags for this format. */
|
| 1138 |
|
|
dot_flag = long_flag = par.left_flag = par.do_padding = 0;
|
| 1139 |
|
|
10001658: d4 01 10 10 l.sw 16(r1),r2
|
| 1140 |
|
|
par.max_len = 10;
|
| 1141 |
|
|
|
| 1142 |
|
|
try_next:
|
| 1143 |
|
|
ch = *(++ctrl);
|
| 1144 |
|
|
|
| 1145 |
|
|
if ((ch >= '0' && ch <= '9'))
|
| 1146 |
|
|
1000165c: 9c 83 ff d0 l.addi r4,r3,-48
|
| 1147 |
|
|
vbuf_putchar(buf, *ctrl);
|
| 1148 |
|
|
continue;
|
| 1149 |
|
|
}
|
| 1150 |
|
|
|
| 1151 |
|
|
/* initialize all the flags for this format. */
|
| 1152 |
|
|
dot_flag = long_flag = par.left_flag = par.do_padding = 0;
|
| 1153 |
|
|
10001660: d4 01 10 14 l.sw 20(r1),r2
|
| 1154 |
|
|
par.max_len = 10;
|
| 1155 |
|
|
|
| 1156 |
|
|
try_next:
|
| 1157 |
|
|
ch = *(++ctrl);
|
| 1158 |
|
|
|
| 1159 |
|
|
if ((ch >= '0' && ch <= '9'))
|
| 1160 |
|
|
10001664: a4 84 00 ff l.andi r4,r4,0xff
|
| 1161 |
|
|
}
|
| 1162 |
|
|
|
| 1163 |
|
|
/* initialize all the flags for this format. */
|
| 1164 |
|
|
dot_flag = long_flag = par.left_flag = par.do_padding = 0;
|
| 1165 |
|
|
par.pad_character = ' ';
|
| 1166 |
|
|
par.num2=32767;
|
| 1167 |
|
|
10001668: d4 01 d0 08 l.sw 8(r1),r26
|
| 1168 |
|
|
par.max_len = 10;
|
| 1169 |
|
|
1000166c: d4 01 c0 1c l.sw 28(r1),r24
|
| 1170 |
|
|
|
| 1171 |
|
|
try_next:
|
| 1172 |
|
|
ch = *(++ctrl);
|
| 1173 |
|
|
|
| 1174 |
|
|
if ((ch >= '0' && ch <= '9'))
|
| 1175 |
|
|
10001670: bc 44 00 09 l.sfgtui r4,9
|
| 1176 |
|
|
10001674: 9f 9e 00 01 l.addi r28,r30,1
|
| 1177 |
|
|
}
|
| 1178 |
|
|
ctrl--;
|
| 1179 |
|
|
goto try_next;
|
| 1180 |
|
|
}
|
| 1181 |
|
|
|
| 1182 |
|
|
par.uppercase = (ch >= 'A' && ch <= 'Z') ? 1 : 0;
|
| 1183 |
|
|
10001678: 9e 80 00 01 l.addi r20,r0,1
|
| 1184 |
|
|
par.max_len = 10;
|
| 1185 |
|
|
|
| 1186 |
|
|
try_next:
|
| 1187 |
|
|
ch = *(++ctrl);
|
| 1188 |
|
|
|
| 1189 |
|
|
if ((ch >= '0' && ch <= '9'))
|
| 1190 |
|
|
1000167c: 10 00 00 1a l.bf 100016e4
|
| 1191 |
|
|
{
|
| 1192 |
|
|
if (dot_flag)
|
| 1193 |
|
|
10001680: bc 02 00 00 l.sfeqi r2,0
|
| 1194 |
|
|
10001684: 10 00 00 9a l.bf 100018ec
|
| 1195 |
|
|
10001688: 9c c0 00 00 l.addi r6,r0,0
|
| 1196 |
|
|
1000168c: 9c 85 ff d0 l.addi r4,r5,-48
|
| 1197 |
|
|
10001690: 00 00 00 02 l.j 10001698
|
| 1198 |
|
|
char* cp;
|
| 1199 |
|
|
|
| 1200 |
|
|
n = 0;
|
| 1201 |
|
|
cp = *linep;
|
| 1202 |
|
|
while (((*cp) >= '0' && (*cp) <= '9'))
|
| 1203 |
|
|
n = n*10 + ((*cp++) - '0');
|
| 1204 |
|
|
10001694: ab 83 00 00 l.ori r28,r3,0x0
|
| 1205 |
|
|
10001698: b8 e6 00 03 l.slli r7,r6,0x3
|
| 1206 |
|
|
1000169c: 9c 7c 00 01 l.addi r3,r28,1
|
| 1207 |
|
|
100016a0: e0 c6 30 00 l.add r6,r6,r6
|
| 1208 |
|
|
long n;
|
| 1209 |
|
|
char* cp;
|
| 1210 |
|
|
|
| 1211 |
|
|
n = 0;
|
| 1212 |
|
|
cp = *linep;
|
| 1213 |
|
|
while (((*cp) >= '0' && (*cp) <= '9'))
|
| 1214 |
|
|
100016a4: 90 a3 00 00 l.lbs r5,0(r3)
|
| 1215 |
|
|
n = n*10 + ((*cp++) - '0');
|
| 1216 |
|
|
100016a8: e0 c6 38 00 l.add r6,r6,r7
|
| 1217 |
|
|
100016ac: e0 c6 20 00 l.add r6,r6,r4
|
| 1218 |
|
|
long n;
|
| 1219 |
|
|
char* cp;
|
| 1220 |
|
|
|
| 1221 |
|
|
n = 0;
|
| 1222 |
|
|
cp = *linep;
|
| 1223 |
|
|
while (((*cp) >= '0' && (*cp) <= '9'))
|
| 1224 |
|
|
100016b0: 9c 85 ff d0 l.addi r4,r5,-48
|
| 1225 |
|
|
100016b4: a4 e4 00 ff l.andi r7,r4,0xff
|
| 1226 |
|
|
100016b8: bc 47 00 09 l.sfgtui r7,9
|
| 1227 |
|
|
100016bc: 0f ff ff f6 l.bnf 10001694
|
| 1228 |
|
|
100016c0: a8 83 00 00 l.ori r4,r3,0x0
|
| 1229 |
|
|
ch = *(++ctrl);
|
| 1230 |
|
|
|
| 1231 |
|
|
if ((ch >= '0' && ch <= '9'))
|
| 1232 |
|
|
{
|
| 1233 |
|
|
if (dot_flag)
|
| 1234 |
|
|
par.num2 = getnum(&ctrl);
|
| 1235 |
|
|
100016c4: d4 01 30 08 l.sw 8(r1),r6
|
| 1236 |
|
|
par.pad_character = '0';
|
| 1237 |
|
|
|
| 1238 |
|
|
par.num1 = getnum(&ctrl);
|
| 1239 |
|
|
par.do_padding = 1;
|
| 1240 |
|
|
}
|
| 1241 |
|
|
ctrl--;
|
| 1242 |
|
|
100016c8: 9f c3 ff ff l.addi r30,r3,-1
|
| 1243 |
|
|
100016cc: ab 84 00 00 l.ori r28,r4,0x0
|
| 1244 |
|
|
par.max_len = 10;
|
| 1245 |
|
|
|
| 1246 |
|
|
try_next:
|
| 1247 |
|
|
ch = *(++ctrl);
|
| 1248 |
|
|
|
| 1249 |
|
|
if ((ch >= '0' && ch <= '9'))
|
| 1250 |
|
|
100016d0: a4 65 00 ff l.andi r3,r5,0xff
|
| 1251 |
|
|
100016d4: 9c 83 ff d0 l.addi r4,r3,-48
|
| 1252 |
|
|
100016d8: a4 84 00 ff l.andi r4,r4,0xff
|
| 1253 |
|
|
100016dc: bc 44 00 09 l.sfgtui r4,9
|
| 1254 |
|
|
100016e0: 0f ff ff e8 l.bnf 10001680
|
| 1255 |
|
|
}
|
| 1256 |
|
|
ctrl--;
|
| 1257 |
|
|
goto try_next;
|
| 1258 |
|
|
}
|
| 1259 |
|
|
|
| 1260 |
|
|
par.uppercase = (ch >= 'A' && ch <= 'Z') ? 1 : 0;
|
| 1261 |
|
|
100016e4: 9c 63 ff bf l.addi r3,r3,-65
|
| 1262 |
|
|
100016e8: 9c 80 00 01 l.addi r4,r0,1
|
| 1263 |
|
|
100016ec: a4 63 00 ff l.andi r3,r3,0xff
|
| 1264 |
|
|
100016f0: bc a3 00 19 l.sfleui r3,25
|
| 1265 |
|
|
100016f4: 10 00 00 02 l.bf 100016fc
|
| 1266 |
|
|
100016f8: 9c 80 00 00 l.addi r4,r0,0
|
| 1267 |
|
|
100016fc: d4 01 20 18 l.sw 24(r1),r4
|
| 1268 |
|
|
|
| 1269 |
|
|
switch ((par.uppercase ? ch + 32: ch))
|
| 1270 |
|
|
10001700: bc 04 00 00 l.sfeqi r4,0
|
| 1271 |
|
|
10001704: a8 65 00 00 l.ori r3,r5,0x0
|
| 1272 |
|
|
10001708: 10 00 00 02 l.bf 10001710
|
| 1273 |
|
|
1000170c: 9c 65 00 20 l.addi r3,r5,32
|
| 1274 |
|
|
10001710: 9c 63 ff db l.addi r3,r3,-37
|
| 1275 |
|
|
10001714: bc 43 00 53 l.sfgtui r3,83
|
| 1276 |
|
|
10001718: 13 ff ff c5 l.bf 1000162c
|
| 1277 |
|
|
1000171c: 18 80 10 00 l.movhi r4,0x1000
|
| 1278 |
|
|
10001720: b8 63 00 02 l.slli r3,r3,0x2
|
| 1279 |
|
|
10001724: a8 84 2b 24 l.ori r4,r4,0x2b24
|
| 1280 |
|
|
10001728: e0 63 20 00 l.add r3,r3,r4
|
| 1281 |
|
|
1000172c: 84 63 00 00 l.lwz r3,0(r3)
|
| 1282 |
|
|
10001730: 44 00 18 00 l.jr r3
|
| 1283 |
|
|
}
|
| 1284 |
|
|
continue;
|
| 1285 |
|
|
#endif
|
| 1286 |
|
|
#ifdef PRINTF_STR_PRINT
|
| 1287 |
|
|
case 's':
|
| 1288 |
|
|
outs(buf, va_arg( argp, char*), &par);
|
| 1289 |
|
|
10001734: 86 d2 00 00 l.lwz r22,0(r18)
|
| 1290 |
|
|
10001738: 9e 52 00 04 l.addi r18,r18,4
|
| 1291 |
|
|
//----------------------------------------------------
|
| 1292 |
|
|
static int strlen(const char * str)
|
| 1293 |
|
|
{
|
| 1294 |
|
|
const char * s;
|
| 1295 |
|
|
|
| 1296 |
|
|
if(!str)
|
| 1297 |
|
|
1000173c: bc 16 00 00 l.sfeqi r22,0
|
| 1298 |
|
|
10001740: 10 00 00 a4 l.bf 100019d0
|
| 1299 |
|
|
return 0;
|
| 1300 |
|
|
|
| 1301 |
|
|
for(s = str; *s; ++ s)
|
| 1302 |
|
|
10001744: 90 56 00 00 l.lbs r2,0(r22)
|
| 1303 |
|
|
10001748: bc 02 00 00 l.sfeqi r2,0
|
| 1304 |
|
|
1000174c: 10 00 00 07 l.bf 10001768
|
| 1305 |
|
|
10001750: a8 56 00 00 l.ori r2,r22,0x0
|
| 1306 |
|
|
10001754: 9c 42 00 01 l.addi r2,r2,1
|
| 1307 |
|
|
10001758: 90 62 00 00 l.lbs r3,0(r2)
|
| 1308 |
|
|
1000175c: bc 03 00 00 l.sfeqi r3,0
|
| 1309 |
|
|
10001760: 0f ff ff fd l.bnf 10001754
|
| 1310 |
|
|
10001764: e0 42 b0 02 l.sub r2,r2,r22
|
| 1311 |
|
|
//----------------------------------------------------
|
| 1312 |
|
|
#ifdef PRINTF_STR_PRINT
|
| 1313 |
|
|
static void outs( struct vbuf *buf, char* lp, params_t *par)
|
| 1314 |
|
|
{
|
| 1315 |
|
|
/* pad on left if needed */
|
| 1316 |
|
|
par->len = strlen( lp);
|
| 1317 |
|
|
10001768: d4 01 10 00 l.sw 0(r1),r2
|
| 1318 |
|
|
#ifdef PRINTF_ENABLE_PADDING
|
| 1319 |
|
|
padding(buf, !(par->left_flag), par);
|
| 1320 |
|
|
#endif
|
| 1321 |
|
|
|
| 1322 |
|
|
/* Move string to the buffer */
|
| 1323 |
|
|
while (*lp && (par->num2)--)
|
| 1324 |
|
|
1000176c: 90 56 00 00 l.lbs r2,0(r22)
|
| 1325 |
|
|
10001770: bc 02 00 00 l.sfeqi r2,0
|
| 1326 |
|
|
10001774: 10 00 00 16 l.bf 100017cc
|
| 1327 |
|
|
10001778: 84 41 00 08 l.lwz r2,8(r1)
|
| 1328 |
|
|
1000177c: aa 96 00 00 l.ori r20,r22,0x0
|
| 1329 |
|
|
10001780: 9c 62 ff ff l.addi r3,r2,-1
|
| 1330 |
|
|
10001784: bc 22 00 00 l.sfnei r2,0
|
| 1331 |
|
|
10001788: d4 01 18 08 l.sw 8(r1),r3
|
| 1332 |
|
|
1000178c: 10 00 00 09 l.bf 100017b0
|
| 1333 |
|
|
10001790: 00 00 00 92 l.j 100019d8
|
| 1334 |
|
|
10001794: 84 61 00 08 l.lwz r3,8(r1)
|
| 1335 |
|
|
10001798: 9e 94 00 01 l.addi r20,r20,1
|
| 1336 |
|
|
1000179c: 9c 83 ff ff l.addi r4,r3,-1
|
| 1337 |
|
|
100017a0: bc 03 00 00 l.sfeqi r3,0
|
| 1338 |
|
|
100017a4: d4 01 20 08 l.sw 8(r1),r4
|
| 1339 |
|
|
100017a8: 10 00 00 72 l.bf 10001970
|
| 1340 |
|
|
vbuf_putchar(buf, *lp++);
|
| 1341 |
|
|
100017ac: aa c2 00 00 l.ori r22,r2,0x0
|
| 1342 |
|
|
100017b0: 90 74 00 00 l.lbs r3,0(r20)
|
| 1343 |
|
|
100017b4: 85 6e 00 00 l.lwz r11,0(r14)
|
| 1344 |
|
|
100017b8: 9c 56 00 01 l.addi r2,r22,1
|
| 1345 |
|
|
100017bc: 48 00 58 00 l.jalr r11
|
| 1346 |
|
|
#ifdef PRINTF_ENABLE_PADDING
|
| 1347 |
|
|
padding(buf, !(par->left_flag), par);
|
| 1348 |
|
|
#endif
|
| 1349 |
|
|
|
| 1350 |
|
|
/* Move string to the buffer */
|
| 1351 |
|
|
while (*lp && (par->num2)--)
|
| 1352 |
|
|
100017c0: 90 62 00 00 l.lbs r3,0(r2)
|
| 1353 |
|
|
100017c4: bc 03 00 00 l.sfeqi r3,0
|
| 1354 |
|
|
100017c8: 0f ff ff f3 l.bnf 10001794
|
| 1355 |
|
|
const char * s;
|
| 1356 |
|
|
|
| 1357 |
|
|
if(!str)
|
| 1358 |
|
|
return 0;
|
| 1359 |
|
|
|
| 1360 |
|
|
for(s = str; *s; ++ s)
|
| 1361 |
|
|
100017cc: 9c 60 00 00 l.addi r3,r0,0
|
| 1362 |
|
|
/* Move string to the buffer */
|
| 1363 |
|
|
while (*lp && (par->num2)--)
|
| 1364 |
|
|
vbuf_putchar(buf, *lp++);
|
| 1365 |
|
|
|
| 1366 |
|
|
/* Pad on right if needed */
|
| 1367 |
|
|
par->len = strlen( lp);
|
| 1368 |
|
|
100017d0: d4 01 18 00 l.sw 0(r1),r3
|
| 1369 |
|
|
params_t par;
|
| 1370 |
|
|
|
| 1371 |
|
|
char ch;
|
| 1372 |
|
|
char* ctrl = (char*)ctrl1;
|
| 1373 |
|
|
|
| 1374 |
|
|
for ( ; *ctrl; ctrl++)
|
| 1375 |
|
|
100017d4: 90 7c 00 01 l.lbs r3,1(r28)
|
| 1376 |
|
|
100017d8: bc 03 00 00 l.sfeqi r3,0
|
| 1377 |
|
|
100017dc: 9f dc 00 01 l.addi r30,r28,1
|
| 1378 |
|
|
100017e0: 0f ff ff 97 l.bnf 1000163c
|
| 1379 |
|
|
}
|
| 1380 |
|
|
goto try_next;
|
| 1381 |
|
|
}
|
| 1382 |
|
|
|
| 1383 |
|
|
return res;
|
| 1384 |
|
|
}
|
| 1385 |
|
|
100017e4: 9c 21 00 4c l.addi r1,r1,76
|
| 1386 |
|
|
100017e8: 9d 60 00 00 l.addi r11,r0,0
|
| 1387 |
|
|
100017ec: 85 21 ff fc l.lwz r9,-4(r1)
|
| 1388 |
|
|
100017f0: 84 21 ff d4 l.lwz r1,-44(r1)
|
| 1389 |
|
|
100017f4: 84 41 ff d8 l.lwz r2,-40(r1)
|
| 1390 |
|
|
100017f8: 85 c1 ff dc l.lwz r14,-36(r1)
|
| 1391 |
|
|
100017fc: 86 41 ff e0 l.lwz r18,-32(r1)
|
| 1392 |
|
|
10001800: 86 81 ff e4 l.lwz r20,-28(r1)
|
| 1393 |
|
|
10001804: 86 c1 ff e8 l.lwz r22,-24(r1)
|
| 1394 |
|
|
10001808: 87 01 ff ec l.lwz r24,-20(r1)
|
| 1395 |
|
|
1000180c: 87 41 ff f0 l.lwz r26,-16(r1)
|
| 1396 |
|
|
10001810: 87 81 ff f4 l.lwz r28,-12(r1)
|
| 1397 |
|
|
10001814: 87 c1 ff f8 l.lwz r30,-8(r1)
|
| 1398 |
|
|
10001818: 44 00 48 00 l.jr r9
|
| 1399 |
|
|
case 'x':
|
| 1400 |
|
|
case 'p':
|
| 1401 |
|
|
if (long_flag || ch == 'D')
|
| 1402 |
|
|
{
|
| 1403 |
|
|
par.max_len = sizeof(long) * 2;
|
| 1404 |
|
|
outnum(buf, (long)va_arg(argp, long), 16L, &par);
|
| 1405 |
|
|
1000181c: 84 72 00 00 l.lwz r3,0(r18)
|
| 1406 |
|
|
#ifdef PRINTF_HEX_PRINT
|
| 1407 |
|
|
case 'x':
|
| 1408 |
|
|
case 'p':
|
| 1409 |
|
|
if (long_flag || ch == 'D')
|
| 1410 |
|
|
{
|
| 1411 |
|
|
par.max_len = sizeof(long) * 2;
|
| 1412 |
|
|
10001820: 9c 40 00 08 l.addi r2,r0,8
|
| 1413 |
|
|
outnum(buf, (long)va_arg(argp, long), 16L, &par);
|
| 1414 |
|
|
10001824: 9c 80 00 10 l.addi r4,r0,16
|
| 1415 |
|
|
10001828: a8 a1 00 00 l.ori r5,r1,0x0
|
| 1416 |
|
|
1000182c: 9e 52 00 04 l.addi r18,r18,4
|
| 1417 |
|
|
#ifdef PRINTF_HEX_PRINT
|
| 1418 |
|
|
case 'x':
|
| 1419 |
|
|
case 'p':
|
| 1420 |
|
|
if (long_flag || ch == 'D')
|
| 1421 |
|
|
{
|
| 1422 |
|
|
par.max_len = sizeof(long) * 2;
|
| 1423 |
|
|
10001830: d4 01 10 1c l.sw 28(r1),r2
|
| 1424 |
|
|
outnum(buf, (long)va_arg(argp, long), 16L, &par);
|
| 1425 |
|
|
10001834: 07 ff fe b1 l.jal 100012f8
|
| 1426 |
|
|
10001838: 03 ff ff 7d l.j 1000162c
|
| 1427 |
|
|
1000183c: 9c 9e 00 02 l.addi r4,r30,2
|
| 1428 |
|
|
10001840: 90 be 00 02 l.lbs r5,2(r30)
|
| 1429 |
|
|
par.pad_character = ' ';
|
| 1430 |
|
|
par.num2=32767;
|
| 1431 |
|
|
par.max_len = 10;
|
| 1432 |
|
|
|
| 1433 |
|
|
try_next:
|
| 1434 |
|
|
ch = *(++ctrl);
|
| 1435 |
|
|
10001844: ab dc 00 00 l.ori r30,r28,0x0
|
| 1436 |
|
|
10001848: ab 84 00 00 l.ori r28,r4,0x0
|
| 1437 |
|
|
1000184c: 03 ff ff a1 l.j 100016d0
|
| 1438 |
|
|
{
|
| 1439 |
|
|
outnum(buf, va_arg(argp, long), 10L, &par);
|
| 1440 |
|
|
continue;
|
| 1441 |
|
|
}
|
| 1442 |
|
|
else {
|
| 1443 |
|
|
outnum(buf, va_arg(argp, int), 10L, &par);
|
| 1444 |
|
|
10001850: 84 72 00 00 l.lwz r3,0(r18)
|
| 1445 |
|
|
10001854: 9c 80 00 0a l.addi r4,r0,10
|
| 1446 |
|
|
10001858: a8 a1 00 00 l.ori r5,r1,0x0
|
| 1447 |
|
|
1000185c: 9e 52 00 04 l.addi r18,r18,4
|
| 1448 |
|
|
case 'x':
|
| 1449 |
|
|
case 'p':
|
| 1450 |
|
|
if (long_flag || ch == 'D')
|
| 1451 |
|
|
{
|
| 1452 |
|
|
par.max_len = sizeof(long) * 2;
|
| 1453 |
|
|
outnum(buf, (long)va_arg(argp, long), 16L, &par);
|
| 1454 |
|
|
10001860: 07 ff fe a6 l.jal 100012f8
|
| 1455 |
|
|
10001864: 03 ff ff 72 l.j 1000162c
|
| 1456 |
|
|
outs(buf, va_arg( argp, char*), &par);
|
| 1457 |
|
|
continue;
|
| 1458 |
|
|
#endif
|
| 1459 |
|
|
#ifdef PRINTF_CHR_PRINT
|
| 1460 |
|
|
case 'c':
|
| 1461 |
|
|
vbuf_putchar(buf, va_arg( argp, int));
|
| 1462 |
|
|
10001868: 90 72 00 03 l.lbs r3,3(r18)
|
| 1463 |
|
|
1000186c: 85 6e 00 00 l.lwz r11,0(r14)
|
| 1464 |
|
|
10001870: 9e 52 00 04 l.addi r18,r18,4
|
| 1465 |
|
|
10001874: 48 00 58 00 l.jalr r11
|
| 1466 |
|
|
continue;
|
| 1467 |
|
|
10001878: 03 ff ff 6d l.j 1000162c
|
| 1468 |
|
|
#endif
|
| 1469 |
|
|
case '\\':
|
| 1470 |
|
|
switch (*ctrl) {
|
| 1471 |
|
|
1000187c: bc 05 00 68 l.sfeqi r5,104
|
| 1472 |
|
|
10001880: 10 00 00 50 l.bf 100019c0
|
| 1473 |
|
|
10001884: bd 45 00 68 l.sfgtsi r5,104
|
| 1474 |
|
|
10001888: 0c 00 00 30 l.bnf 10001948
|
| 1475 |
|
|
1000188c: bc 05 00 6e l.sfeqi r5,110
|
| 1476 |
|
|
10001890: 10 00 00 48 l.bf 100019b0
|
| 1477 |
|
|
10001894: bc 05 00 72 l.sfeqi r5,114
|
| 1478 |
|
|
10001898: 0c 00 00 42 l.bnf 100019a0
|
| 1479 |
|
|
break;
|
| 1480 |
|
|
case 'h':
|
| 1481 |
|
|
vbuf_putchar(buf, 0x08);
|
| 1482 |
|
|
break;
|
| 1483 |
|
|
case 'r':
|
| 1484 |
|
|
vbuf_putchar(buf, 0x0D);
|
| 1485 |
|
|
1000189c: 85 6e 00 00 l.lwz r11,0(r14)
|
| 1486 |
|
|
100018a0: 9c 60 00 0d l.addi r3,r0,13
|
| 1487 |
|
|
100018a4: 48 00 58 00 l.jalr r11
|
| 1488 |
|
|
break;
|
| 1489 |
|
|
100018a8: 00 00 00 2d l.j 1000195c
|
| 1490 |
|
|
100018ac: 9c 9e 00 02 l.addi r4,r30,2
|
| 1491 |
|
|
100018b0: 90 be 00 02 l.lbs r5,2(r30)
|
| 1492 |
|
|
case '-':
|
| 1493 |
|
|
par.left_flag = 1;
|
| 1494 |
|
|
break;
|
| 1495 |
|
|
|
| 1496 |
|
|
case '.':
|
| 1497 |
|
|
dot_flag = 1;
|
| 1498 |
|
|
100018b4: 9c 40 00 01 l.addi r2,r0,1
|
| 1499 |
|
|
par.pad_character = ' ';
|
| 1500 |
|
|
par.num2=32767;
|
| 1501 |
|
|
par.max_len = 10;
|
| 1502 |
|
|
|
| 1503 |
|
|
try_next:
|
| 1504 |
|
|
ch = *(++ctrl);
|
| 1505 |
|
|
100018b8: ab dc 00 00 l.ori r30,r28,0x0
|
| 1506 |
|
|
100018bc: ab 84 00 00 l.ori r28,r4,0x0
|
| 1507 |
|
|
100018c0: 03 ff ff 84 l.j 100016d0
|
| 1508 |
|
|
100018c4: 9c 9e 00 02 l.addi r4,r30,2
|
| 1509 |
|
|
100018c8: 90 be 00 02 l.lbs r5,2(r30)
|
| 1510 |
|
|
case '%':
|
| 1511 |
|
|
vbuf_putchar(buf, '%');
|
| 1512 |
|
|
continue;
|
| 1513 |
|
|
|
| 1514 |
|
|
case '-':
|
| 1515 |
|
|
par.left_flag = 1;
|
| 1516 |
|
|
100018cc: d4 01 a0 14 l.sw 20(r1),r20
|
| 1517 |
|
|
par.pad_character = ' ';
|
| 1518 |
|
|
par.num2=32767;
|
| 1519 |
|
|
par.max_len = 10;
|
| 1520 |
|
|
|
| 1521 |
|
|
try_next:
|
| 1522 |
|
|
ch = *(++ctrl);
|
| 1523 |
|
|
100018d0: ab dc 00 00 l.ori r30,r28,0x0
|
| 1524 |
|
|
100018d4: ab 84 00 00 l.ori r28,r4,0x0
|
| 1525 |
|
|
100018d8: 03 ff ff 7e l.j 100016d0
|
| 1526 |
|
|
par.uppercase = (ch >= 'A' && ch <= 'Z') ? 1 : 0;
|
| 1527 |
|
|
|
| 1528 |
|
|
switch ((par.uppercase ? ch + 32: ch))
|
| 1529 |
|
|
{
|
| 1530 |
|
|
case '%':
|
| 1531 |
|
|
vbuf_putchar(buf, '%');
|
| 1532 |
|
|
100018dc: 85 6e 00 00 l.lwz r11,0(r14)
|
| 1533 |
|
|
100018e0: 9c 60 00 25 l.addi r3,r0,37
|
| 1534 |
|
|
100018e4: 48 00 58 00 l.jalr r11
|
| 1535 |
|
|
continue;
|
| 1536 |
|
|
100018e8: 03 ff ff 51 l.j 1000162c
|
| 1537 |
|
|
if ((ch >= '0' && ch <= '9'))
|
| 1538 |
|
|
{
|
| 1539 |
|
|
if (dot_flag)
|
| 1540 |
|
|
par.num2 = getnum(&ctrl);
|
| 1541 |
|
|
else {
|
| 1542 |
|
|
if (ch == '0')
|
| 1543 |
|
|
100018ec: bc 25 00 30 l.sfnei r5,48
|
| 1544 |
|
|
100018f0: 0c 00 00 14 l.bnf 10001940
|
| 1545 |
|
|
static long getnum( char** linep)
|
| 1546 |
|
|
{
|
| 1547 |
|
|
long n;
|
| 1548 |
|
|
char* cp;
|
| 1549 |
|
|
|
| 1550 |
|
|
n = 0;
|
| 1551 |
|
|
100018f4: 9c c0 00 00 l.addi r6,r0,0
|
| 1552 |
|
|
100018f8: 9c 85 ff d0 l.addi r4,r5,-48
|
| 1553 |
|
|
100018fc: 00 00 00 02 l.j 10001904
|
| 1554 |
|
|
cp = *linep;
|
| 1555 |
|
|
while (((*cp) >= '0' && (*cp) <= '9'))
|
| 1556 |
|
|
n = n*10 + ((*cp++) - '0');
|
| 1557 |
|
|
10001900: ab 83 00 00 l.ori r28,r3,0x0
|
| 1558 |
|
|
10001904: b8 e6 00 03 l.slli r7,r6,0x3
|
| 1559 |
|
|
10001908: 9c 7c 00 01 l.addi r3,r28,1
|
| 1560 |
|
|
1000190c: e0 c6 30 00 l.add r6,r6,r6
|
| 1561 |
|
|
long n;
|
| 1562 |
|
|
char* cp;
|
| 1563 |
|
|
|
| 1564 |
|
|
n = 0;
|
| 1565 |
|
|
cp = *linep;
|
| 1566 |
|
|
while (((*cp) >= '0' && (*cp) <= '9'))
|
| 1567 |
|
|
10001910: 90 a3 00 00 l.lbs r5,0(r3)
|
| 1568 |
|
|
n = n*10 + ((*cp++) - '0');
|
| 1569 |
|
|
10001914: e0 c6 38 00 l.add r6,r6,r7
|
| 1570 |
|
|
10001918: e0 c6 20 00 l.add r6,r6,r4
|
| 1571 |
|
|
long n;
|
| 1572 |
|
|
char* cp;
|
| 1573 |
|
|
|
| 1574 |
|
|
n = 0;
|
| 1575 |
|
|
cp = *linep;
|
| 1576 |
|
|
while (((*cp) >= '0' && (*cp) <= '9'))
|
| 1577 |
|
|
1000191c: 9c 85 ff d0 l.addi r4,r5,-48
|
| 1578 |
|
|
10001920: a4 e4 00 ff l.andi r7,r4,0xff
|
| 1579 |
|
|
10001924: bc 47 00 09 l.sfgtui r7,9
|
| 1580 |
|
|
10001928: 0f ff ff f6 l.bnf 10001900
|
| 1581 |
|
|
1000192c: a8 83 00 00 l.ori r4,r3,0x0
|
| 1582 |
|
|
par.num2 = getnum(&ctrl);
|
| 1583 |
|
|
else {
|
| 1584 |
|
|
if (ch == '0')
|
| 1585 |
|
|
par.pad_character = '0';
|
| 1586 |
|
|
|
| 1587 |
|
|
par.num1 = getnum(&ctrl);
|
| 1588 |
|
|
10001930: d4 01 30 04 l.sw 4(r1),r6
|
| 1589 |
|
|
par.do_padding = 1;
|
| 1590 |
|
|
10001934: d4 01 a0 10 l.sw 16(r1),r20
|
| 1591 |
|
|
}
|
| 1592 |
|
|
ctrl--;
|
| 1593 |
|
|
10001938: 9f c3 ff ff l.addi r30,r3,-1
|
| 1594 |
|
|
1000193c: 03 ff ff 64 l.j 100016cc
|
| 1595 |
|
|
{
|
| 1596 |
|
|
if (dot_flag)
|
| 1597 |
|
|
par.num2 = getnum(&ctrl);
|
| 1598 |
|
|
else {
|
| 1599 |
|
|
if (ch == '0')
|
| 1600 |
|
|
par.pad_character = '0';
|
| 1601 |
|
|
10001940: d8 01 28 0c l.sb 12(r1),r5
|
| 1602 |
|
|
10001944: 03 ff ff ec l.j 100018f4
|
| 1603 |
|
|
case 'c':
|
| 1604 |
|
|
vbuf_putchar(buf, va_arg( argp, int));
|
| 1605 |
|
|
continue;
|
| 1606 |
|
|
#endif
|
| 1607 |
|
|
case '\\':
|
| 1608 |
|
|
switch (*ctrl) {
|
| 1609 |
|
|
10001948: bc 05 00 61 l.sfeqi r5,97
|
| 1610 |
|
|
1000194c: 0c 00 00 15 l.bnf 100019a0
|
| 1611 |
|
|
case 'a':
|
| 1612 |
|
|
vbuf_putchar(buf, 0x07);
|
| 1613 |
|
|
10001950: 85 6e 00 00 l.lwz r11,0(r14)
|
| 1614 |
|
|
10001954: 9c 60 00 07 l.addi r3,r0,7
|
| 1615 |
|
|
10001958: 48 00 58 00 l.jalr r11
|
| 1616 |
|
|
1000195c: 9c 9e 00 03 l.addi r4,r30,3
|
| 1617 |
|
|
10001960: 90 be 00 03 l.lbs r5,3(r30)
|
| 1618 |
|
|
10001964: ab 84 00 00 l.ori r28,r4,0x0
|
| 1619 |
|
|
break;
|
| 1620 |
|
|
default:
|
| 1621 |
|
|
vbuf_putchar(buf, *ctrl);
|
| 1622 |
|
|
break;
|
| 1623 |
|
|
}
|
| 1624 |
|
|
ctrl++;
|
| 1625 |
|
|
10001968: 9f de 00 02 l.addi r30,r30,2
|
| 1626 |
|
|
1000196c: 03 ff ff 59 l.j 100016d0
|
| 1627 |
|
|
10001970: 90 76 00 01 l.lbs r3,1(r22)
|
| 1628 |
|
|
const char * s;
|
| 1629 |
|
|
|
| 1630 |
|
|
if(!str)
|
| 1631 |
|
|
return 0;
|
| 1632 |
|
|
|
| 1633 |
|
|
for(s = str; *s; ++ s)
|
| 1634 |
|
|
10001974: bc 03 00 00 l.sfeqi r3,0
|
| 1635 |
|
|
10001978: 9c 60 00 00 l.addi r3,r0,0
|
| 1636 |
|
|
1000197c: 13 ff ff 95 l.bf 100017d0
|
| 1637 |
|
|
10001980: a8 62 00 00 l.ori r3,r2,0x0
|
| 1638 |
|
|
10001984: 9c 63 00 01 l.addi r3,r3,1
|
| 1639 |
|
|
10001988: 90 83 00 00 l.lbs r4,0(r3)
|
| 1640 |
|
|
1000198c: bc 04 00 00 l.sfeqi r4,0
|
| 1641 |
|
|
10001990: 0f ff ff fd l.bnf 10001984
|
| 1642 |
|
|
10001994: e0 63 10 02 l.sub r3,r3,r2
|
| 1643 |
|
|
/* Move string to the buffer */
|
| 1644 |
|
|
while (*lp && (par->num2)--)
|
| 1645 |
|
|
vbuf_putchar(buf, *lp++);
|
| 1646 |
|
|
|
| 1647 |
|
|
/* Pad on right if needed */
|
| 1648 |
|
|
par->len = strlen( lp);
|
| 1649 |
|
|
10001998: d4 01 18 00 l.sw 0(r1),r3
|
| 1650 |
|
|
1000199c: 03 ff ff 8e l.j 100017d4
|
| 1651 |
|
|
break;
|
| 1652 |
|
|
case 'n':
|
| 1653 |
|
|
vbuf_putchar(buf, 0x0A);
|
| 1654 |
|
|
break;
|
| 1655 |
|
|
default:
|
| 1656 |
|
|
vbuf_putchar(buf, *ctrl);
|
| 1657 |
|
|
100019a0: 90 7e 00 01 l.lbs r3,1(r30)
|
| 1658 |
|
|
100019a4: 85 6e 00 00 l.lwz r11,0(r14)
|
| 1659 |
|
|
100019a8: 48 00 58 00 l.jalr r11
|
| 1660 |
|
|
break;
|
| 1661 |
|
|
100019ac: 03 ff ff ec l.j 1000195c
|
| 1662 |
|
|
break;
|
| 1663 |
|
|
case 'r':
|
| 1664 |
|
|
vbuf_putchar(buf, 0x0D);
|
| 1665 |
|
|
break;
|
| 1666 |
|
|
case 'n':
|
| 1667 |
|
|
vbuf_putchar(buf, 0x0A);
|
| 1668 |
|
|
100019b0: 85 6e 00 00 l.lwz r11,0(r14)
|
| 1669 |
|
|
100019b4: 9c 60 00 0a l.addi r3,r0,10
|
| 1670 |
|
|
100019b8: 48 00 58 00 l.jalr r11
|
| 1671 |
|
|
break;
|
| 1672 |
|
|
100019bc: 03 ff ff e8 l.j 1000195c
|
| 1673 |
|
|
switch (*ctrl) {
|
| 1674 |
|
|
case 'a':
|
| 1675 |
|
|
vbuf_putchar(buf, 0x07);
|
| 1676 |
|
|
break;
|
| 1677 |
|
|
case 'h':
|
| 1678 |
|
|
vbuf_putchar(buf, 0x08);
|
| 1679 |
|
|
100019c0: 85 6e 00 00 l.lwz r11,0(r14)
|
| 1680 |
|
|
100019c4: 9c 60 00 08 l.addi r3,r0,8
|
| 1681 |
|
|
100019c8: 48 00 58 00 l.jalr r11
|
| 1682 |
|
|
break;
|
| 1683 |
|
|
100019cc: 03 ff ff e4 l.j 1000195c
|
| 1684 |
|
|
static int strlen(const char * str)
|
| 1685 |
|
|
{
|
| 1686 |
|
|
const char * s;
|
| 1687 |
|
|
|
| 1688 |
|
|
if(!str)
|
| 1689 |
|
|
return 0;
|
| 1690 |
|
|
100019d0: a8 56 00 00 l.ori r2,r22,0x0
|
| 1691 |
|
|
100019d4: 03 ff ff 65 l.j 10001768
|
| 1692 |
|
|
100019d8: 90 76 00 00 l.lbs r3,0(r22)
|
| 1693 |
|
|
#ifdef PRINTF_ENABLE_PADDING
|
| 1694 |
|
|
padding(buf, !(par->left_flag), par);
|
| 1695 |
|
|
#endif
|
| 1696 |
|
|
|
| 1697 |
|
|
/* Move string to the buffer */
|
| 1698 |
|
|
while (*lp && (par->num2)--)
|
| 1699 |
|
|
100019dc: a8 56 00 00 l.ori r2,r22,0x0
|
| 1700 |
|
|
100019e0: 03 ff ff e5 l.j 10001974
|
| 1701 |
|
|
|
| 1702 |
|
|
100019e4 :
|
| 1703 |
|
|
{
|
| 1704 |
|
|
int res = 0;
|
| 1705 |
|
|
va_list argp;
|
| 1706 |
|
|
struct vbuf buf;
|
| 1707 |
|
|
|
| 1708 |
|
|
if (_stdout && ctrl1)
|
| 1709 |
|
|
100019e4: 18 a0 10 00 l.movhi r5,0x1000
|
| 1710 |
|
|
}
|
| 1711 |
|
|
//----------------------------------------------------
|
| 1712 |
|
|
// printf: Console based printf
|
| 1713 |
|
|
//----------------------------------------------------
|
| 1714 |
|
|
int printf( const char* ctrl1, ... )
|
| 1715 |
|
|
{
|
| 1716 |
|
|
100019e8: d7 e1 4f fc l.sw -4(r1),r9
|
| 1717 |
|
|
int res = 0;
|
| 1718 |
|
|
va_list argp;
|
| 1719 |
|
|
struct vbuf buf;
|
| 1720 |
|
|
|
| 1721 |
|
|
if (_stdout && ctrl1)
|
| 1722 |
|
|
100019ec: a8 a5 2f f4 l.ori r5,r5,0x2ff4
|
| 1723 |
|
|
}
|
| 1724 |
|
|
//----------------------------------------------------
|
| 1725 |
|
|
// printf: Console based printf
|
| 1726 |
|
|
//----------------------------------------------------
|
| 1727 |
|
|
int printf( const char* ctrl1, ... )
|
| 1728 |
|
|
{
|
| 1729 |
|
|
100019f0: d7 e1 0f f4 l.sw -12(r1),r1
|
| 1730 |
|
|
int res = 0;
|
| 1731 |
|
|
va_list argp;
|
| 1732 |
|
|
struct vbuf buf;
|
| 1733 |
|
|
|
| 1734 |
|
|
if (_stdout && ctrl1)
|
| 1735 |
|
|
100019f4: 85 65 00 00 l.lwz r11,0(r5)
|
| 1736 |
|
|
}
|
| 1737 |
|
|
//----------------------------------------------------
|
| 1738 |
|
|
// printf: Console based printf
|
| 1739 |
|
|
//----------------------------------------------------
|
| 1740 |
|
|
int printf( const char* ctrl1, ... )
|
| 1741 |
|
|
{
|
| 1742 |
|
|
100019f8: d7 e1 17 f8 l.sw -8(r1),r2
|
| 1743 |
|
|
int res = 0;
|
| 1744 |
|
|
va_list argp;
|
| 1745 |
|
|
struct vbuf buf;
|
| 1746 |
|
|
|
| 1747 |
|
|
if (_stdout && ctrl1)
|
| 1748 |
|
|
100019fc: bc 0b 00 00 l.sfeqi r11,0
|
| 1749 |
|
|
}
|
| 1750 |
|
|
//----------------------------------------------------
|
| 1751 |
|
|
// printf: Console based printf
|
| 1752 |
|
|
//----------------------------------------------------
|
| 1753 |
|
|
int printf( const char* ctrl1, ... )
|
| 1754 |
|
|
{
|
| 1755 |
|
|
10001a00: 9c 21 ff e4 l.addi r1,r1,-28
|
| 1756 |
|
|
10001a04: a8 83 00 00 l.ori r4,r3,0x0
|
| 1757 |
|
|
int res = 0;
|
| 1758 |
|
|
va_list argp;
|
| 1759 |
|
|
struct vbuf buf;
|
| 1760 |
|
|
|
| 1761 |
|
|
if (_stdout && ctrl1)
|
| 1762 |
|
|
10001a08: 10 00 00 09 l.bf 10001a2c
|
| 1763 |
|
|
{
|
| 1764 |
|
|
va_start( argp, ctrl1);
|
| 1765 |
|
|
|
| 1766 |
|
|
// Setup target to be stdout function
|
| 1767 |
|
|
buf.function = _stdout;
|
| 1768 |
|
|
buf.buffer = 0;
|
| 1769 |
|
|
10001a0c: 9c 40 00 00 l.addi r2,r0,0
|
| 1770 |
|
|
buf.offset = 0;
|
| 1771 |
|
|
buf.max_length = 0;
|
| 1772 |
|
|
|
| 1773 |
|
|
res = vbuf_printf(&buf, ctrl1, argp);
|
| 1774 |
|
|
10001a10: a8 61 00 00 l.ori r3,r1,0x0
|
| 1775 |
|
|
10001a14: 9c a1 00 1c l.addi r5,r1,28
|
| 1776 |
|
|
if (_stdout && ctrl1)
|
| 1777 |
|
|
{
|
| 1778 |
|
|
va_start( argp, ctrl1);
|
| 1779 |
|
|
|
| 1780 |
|
|
// Setup target to be stdout function
|
| 1781 |
|
|
buf.function = _stdout;
|
| 1782 |
|
|
10001a18: d4 01 58 00 l.sw 0(r1),r11
|
| 1783 |
|
|
buf.buffer = 0;
|
| 1784 |
|
|
10001a1c: d4 01 10 04 l.sw 4(r1),r2
|
| 1785 |
|
|
buf.offset = 0;
|
| 1786 |
|
|
10001a20: d4 01 10 08 l.sw 8(r1),r2
|
| 1787 |
|
|
buf.max_length = 0;
|
| 1788 |
|
|
10001a24: d4 01 10 0c l.sw 12(r1),r2
|
| 1789 |
|
|
|
| 1790 |
|
|
res = vbuf_printf(&buf, ctrl1, argp);
|
| 1791 |
|
|
10001a28: 07 ff fe e8 l.jal 100015c8
|
| 1792 |
|
|
|
| 1793 |
|
|
va_end( argp);
|
| 1794 |
|
|
}
|
| 1795 |
|
|
|
| 1796 |
|
|
return res;
|
| 1797 |
|
|
}
|
| 1798 |
|
|
10001a2c: 9c 21 00 1c l.addi r1,r1,28
|
| 1799 |
|
|
10001a30: 85 21 ff fc l.lwz r9,-4(r1)
|
| 1800 |
|
|
10001a34: 84 21 ff f4 l.lwz r1,-12(r1)
|
| 1801 |
|
|
10001a38: 84 41 ff f8 l.lwz r2,-8(r1)
|
| 1802 |
|
|
10001a3c: 44 00 48 00 l.jr r9
|
| 1803 |
|
|
|
| 1804 |
|
|
10001a40 :
|
| 1805 |
|
|
|
| 1806 |
|
|
//-------------------------------------------------------------
|
| 1807 |
|
|
// serial_init:
|
| 1808 |
|
|
//-------------------------------------------------------------
|
| 1809 |
|
|
void serial_init (void)
|
| 1810 |
|
|
{
|
| 1811 |
|
|
10001a40: d7 e1 0f fc l.sw -4(r1),r1
|
| 1812 |
|
|
10001a44: 9c 21 ff fc l.addi r1,r1,-4
|
| 1813 |
|
|
|
| 1814 |
|
|
}
|
| 1815 |
|
|
10001a48: 9c 21 00 04 l.addi r1,r1,4
|
| 1816 |
|
|
10001a4c: 84 21 ff fc l.lwz r1,-4(r1)
|
| 1817 |
|
|
10001a50: 44 00 48 00 l.jr r9
|
| 1818 |
|
|
|
| 1819 |
|
|
10001a54 :
|
| 1820 |
|
|
//-------------------------------------------------------------
|
| 1821 |
|
|
// serial_putchar: Write character to Serial Port (used by printf)
|
| 1822 |
|
|
//-------------------------------------------------------------
|
| 1823 |
|
|
int serial_putchar(char ch)
|
| 1824 |
|
|
{
|
| 1825 |
|
|
10001a54: b8 63 00 18 l.slli r3,r3,0x18
|
| 1826 |
|
|
10001a58: d7 e1 17 f8 l.sw -8(r1),r2
|
| 1827 |
|
|
10001a5c: d7 e1 4f fc l.sw -4(r1),r9
|
| 1828 |
|
|
10001a60: b8 43 00 98 l.srai r2,r3,0x18
|
| 1829 |
|
|
10001a64: d7 e1 0f f4 l.sw -12(r1),r1
|
| 1830 |
|
|
10001a68: 9c 21 ff f4 l.addi r1,r1,-12
|
| 1831 |
|
|
if (ch == '\n')
|
| 1832 |
|
|
10001a6c: bc 22 00 0a l.sfnei r2,10
|
| 1833 |
|
|
10001a70: 0c 00 00 10 l.bnf 10001ab0
|
| 1834 |
|
|
serial_putchar('\r');
|
| 1835 |
|
|
|
| 1836 |
|
|
{
|
| 1837 |
|
|
register char t1 asm ("r3") = ch;
|
| 1838 |
|
|
10001a74: a8 62 00 00 l.ori r3,r2,0x0
|
| 1839 |
|
|
asm volatile ("\tl.nop\t%0" : : "K" (0x0004), "r" (t1));
|
| 1840 |
|
|
10001a78: 15 00 00 04 l.nop 0x4
|
| 1841 |
|
|
}
|
| 1842 |
|
|
|
| 1843 |
|
|
UART_UDR = ch;
|
| 1844 |
|
|
10001a7c: 18 60 12 00 l.movhi r3,0x1200
|
| 1845 |
|
|
10001a80: a8 83 00 08 l.ori r4,r3,0x8
|
| 1846 |
|
|
while (UART_USR & UART_TX_BUSY);
|
| 1847 |
|
|
10001a84: a8 63 00 04 l.ori r3,r3,0x4
|
| 1848 |
|
|
{
|
| 1849 |
|
|
register char t1 asm ("r3") = ch;
|
| 1850 |
|
|
asm volatile ("\tl.nop\t%0" : : "K" (0x0004), "r" (t1));
|
| 1851 |
|
|
}
|
| 1852 |
|
|
|
| 1853 |
|
|
UART_UDR = ch;
|
| 1854 |
|
|
10001a88: d4 04 10 00 l.sw 0(r4),r2
|
| 1855 |
|
|
while (UART_USR & UART_TX_BUSY);
|
| 1856 |
|
|
10001a8c: 85 63 00 00 l.lwz r11,0(r3)
|
| 1857 |
|
|
10001a90: a5 6b 00 08 l.andi r11,r11,0x8
|
| 1858 |
|
|
10001a94: bc 0b 00 00 l.sfeqi r11,0
|
| 1859 |
|
|
10001a98: 0f ff ff fd l.bnf 10001a8c
|
| 1860 |
|
|
|
| 1861 |
|
|
return 0;
|
| 1862 |
|
|
}
|
| 1863 |
|
|
10001a9c: 9c 21 00 0c l.addi r1,r1,12
|
| 1864 |
|
|
10001aa0: 85 21 ff fc l.lwz r9,-4(r1)
|
| 1865 |
|
|
10001aa4: 84 21 ff f4 l.lwz r1,-12(r1)
|
| 1866 |
|
|
10001aa8: 84 41 ff f8 l.lwz r2,-8(r1)
|
| 1867 |
|
|
10001aac: 44 00 48 00 l.jr r9
|
| 1868 |
|
|
// serial_putchar: Write character to Serial Port (used by printf)
|
| 1869 |
|
|
//-------------------------------------------------------------
|
| 1870 |
|
|
int serial_putchar(char ch)
|
| 1871 |
|
|
{
|
| 1872 |
|
|
if (ch == '\n')
|
| 1873 |
|
|
serial_putchar('\r');
|
| 1874 |
|
|
10001ab0: 9c 60 00 0d l.addi r3,r0,13
|
| 1875 |
|
|
10001ab4: 07 ff ff e8 l.jal 10001a54
|
| 1876 |
|
|
10001ab8: 03 ff ff ef l.j 10001a74
|
| 1877 |
|
|
|
| 1878 |
|
|
10001abc :
|
| 1879 |
|
|
// serial_haschar:
|
| 1880 |
|
|
//-------------------------------------------------------------
|
| 1881 |
|
|
int serial_haschar()
|
| 1882 |
|
|
{
|
| 1883 |
|
|
#ifndef USE_NOP_PUTC
|
| 1884 |
|
|
return (UART_USR & UART_RX_AVAIL);
|
| 1885 |
|
|
10001abc: 18 60 12 00 l.movhi r3,0x1200
|
| 1886 |
|
|
}
|
| 1887 |
|
|
//-------------------------------------------------------------
|
| 1888 |
|
|
// serial_getchar: Read character from Serial Port
|
| 1889 |
|
|
//-------------------------------------------------------------
|
| 1890 |
|
|
int serial_getchar (void)
|
| 1891 |
|
|
{
|
| 1892 |
|
|
10001ac0: d7 e1 0f fc l.sw -4(r1),r1
|
| 1893 |
|
|
// serial_haschar:
|
| 1894 |
|
|
//-------------------------------------------------------------
|
| 1895 |
|
|
int serial_haschar()
|
| 1896 |
|
|
{
|
| 1897 |
|
|
#ifndef USE_NOP_PUTC
|
| 1898 |
|
|
return (UART_USR & UART_RX_AVAIL);
|
| 1899 |
|
|
10001ac4: a8 83 00 04 l.ori r4,r3,0x4
|
| 1900 |
|
|
}
|
| 1901 |
|
|
//-------------------------------------------------------------
|
| 1902 |
|
|
// serial_getchar: Read character from Serial Port
|
| 1903 |
|
|
//-------------------------------------------------------------
|
| 1904 |
|
|
int serial_getchar (void)
|
| 1905 |
|
|
{
|
| 1906 |
|
|
10001ac8: 9c 21 ff fc l.addi r1,r1,-4
|
| 1907 |
|
|
// serial_haschar:
|
| 1908 |
|
|
//-------------------------------------------------------------
|
| 1909 |
|
|
int serial_haschar()
|
| 1910 |
|
|
{
|
| 1911 |
|
|
#ifndef USE_NOP_PUTC
|
| 1912 |
|
|
return (UART_USR & UART_RX_AVAIL);
|
| 1913 |
|
|
10001acc: 84 84 00 00 l.lwz r4,0(r4)
|
| 1914 |
|
|
10001ad0: a4 84 00 01 l.andi r4,r4,0x1
|
| 1915 |
|
|
//-------------------------------------------------------------
|
| 1916 |
|
|
int serial_getchar (void)
|
| 1917 |
|
|
{
|
| 1918 |
|
|
// Read character in from UART0 Recieve Buffer and return
|
| 1919 |
|
|
#ifndef USE_NOP_PUTC
|
| 1920 |
|
|
if (serial_haschar())
|
| 1921 |
|
|
10001ad4: bc 04 00 00 l.sfeqi r4,0
|
| 1922 |
|
|
10001ad8: 10 00 00 06 l.bf 10001af0
|
| 1923 |
|
|
return UART_UDR;
|
| 1924 |
|
|
10001adc: a8 63 00 08 l.ori r3,r3,0x8
|
| 1925 |
|
|
10001ae0: 85 63 00 00 l.lwz r11,0(r3)
|
| 1926 |
|
|
else
|
| 1927 |
|
|
#endif
|
| 1928 |
|
|
return -1;
|
| 1929 |
|
|
}
|
| 1930 |
|
|
10001ae4: 9c 21 00 04 l.addi r1,r1,4
|
| 1931 |
|
|
10001ae8: 84 21 ff fc l.lwz r1,-4(r1)
|
| 1932 |
|
|
10001aec: 44 00 48 00 l.jr r9
|
| 1933 |
|
|
#ifndef USE_NOP_PUTC
|
| 1934 |
|
|
if (serial_haschar())
|
| 1935 |
|
|
return UART_UDR;
|
| 1936 |
|
|
else
|
| 1937 |
|
|
#endif
|
| 1938 |
|
|
return -1;
|
| 1939 |
|
|
10001af0: 9d 60 ff ff l.addi r11,r0,-1
|
| 1940 |
|
|
10001af4: 03 ff ff fc l.j 10001ae4
|
| 1941 |
|
|
|
| 1942 |
|
|
10001af8 :
|
| 1943 |
|
|
// serial_haschar:
|
| 1944 |
|
|
//-------------------------------------------------------------
|
| 1945 |
|
|
int serial_haschar()
|
| 1946 |
|
|
{
|
| 1947 |
|
|
#ifndef USE_NOP_PUTC
|
| 1948 |
|
|
return (UART_USR & UART_RX_AVAIL);
|
| 1949 |
|
|
10001af8: 18 60 12 00 l.movhi r3,0x1200
|
| 1950 |
|
|
}
|
| 1951 |
|
|
//-------------------------------------------------------------
|
| 1952 |
|
|
// serial_haschar:
|
| 1953 |
|
|
//-------------------------------------------------------------
|
| 1954 |
|
|
int serial_haschar()
|
| 1955 |
|
|
{
|
| 1956 |
|
|
10001afc: d7 e1 0f fc l.sw -4(r1),r1
|
| 1957 |
|
|
#ifndef USE_NOP_PUTC
|
| 1958 |
|
|
return (UART_USR & UART_RX_AVAIL);
|
| 1959 |
|
|
10001b00: a8 63 00 04 l.ori r3,r3,0x4
|
| 1960 |
|
|
}
|
| 1961 |
|
|
//-------------------------------------------------------------
|
| 1962 |
|
|
// serial_haschar:
|
| 1963 |
|
|
//-------------------------------------------------------------
|
| 1964 |
|
|
int serial_haschar()
|
| 1965 |
|
|
{
|
| 1966 |
|
|
10001b04: 9c 21 ff fc l.addi r1,r1,-4
|
| 1967 |
|
|
#ifndef USE_NOP_PUTC
|
| 1968 |
|
|
return (UART_USR & UART_RX_AVAIL);
|
| 1969 |
|
|
10001b08: 85 63 00 00 l.lwz r11,0(r3)
|
| 1970 |
|
|
#else
|
| 1971 |
|
|
return 0;
|
| 1972 |
|
|
#endif
|
| 1973 |
|
|
}
|
| 1974 |
|
|
10001b0c: 9c 21 00 04 l.addi r1,r1,4
|
| 1975 |
|
|
10001b10: a5 6b 00 01 l.andi r11,r11,0x1
|
| 1976 |
|
|
10001b14: 84 21 ff fc l.lwz r1,-4(r1)
|
| 1977 |
|
|
10001b18: 44 00 48 00 l.jr r9
|
| 1978 |
|
|
|
| 1979 |
|
|
10001b1c :
|
| 1980 |
|
|
//-------------------------------------------------------------
|
| 1981 |
|
|
// serial_putstr:
|
| 1982 |
|
|
//-------------------------------------------------------------
|
| 1983 |
|
|
void serial_putstr(char *str)
|
| 1984 |
|
|
{
|
| 1985 |
|
|
10001b1c: d7 e1 17 f8 l.sw -8(r1),r2
|
| 1986 |
|
|
10001b20: d7 e1 4f fc l.sw -4(r1),r9
|
| 1987 |
|
|
10001b24: d7 e1 0f f4 l.sw -12(r1),r1
|
| 1988 |
|
|
10001b28: a8 43 00 00 l.ori r2,r3,0x0
|
| 1989 |
|
|
while (*str)
|
| 1990 |
|
|
10001b2c: 90 63 00 00 l.lbs r3,0(r3)
|
| 1991 |
|
|
10001b30: bc 23 00 00 l.sfnei r3,0
|
| 1992 |
|
|
}
|
| 1993 |
|
|
//-------------------------------------------------------------
|
| 1994 |
|
|
// serial_putstr:
|
| 1995 |
|
|
//-------------------------------------------------------------
|
| 1996 |
|
|
void serial_putstr(char *str)
|
| 1997 |
|
|
{
|
| 1998 |
|
|
10001b34: 9c 21 ff f4 l.addi r1,r1,-12
|
| 1999 |
|
|
while (*str)
|
| 2000 |
|
|
10001b38: 0c 00 00 06 l.bnf 10001b50
|
| 2001 |
|
|
serial_putchar(*str++);
|
| 2002 |
|
|
10001b3c: 9c 42 00 01 l.addi r2,r2,1
|
| 2003 |
|
|
10001b40: 07 ff ff c5 l.jal 10001a54
|
| 2004 |
|
|
//-------------------------------------------------------------
|
| 2005 |
|
|
// serial_putstr:
|
| 2006 |
|
|
//-------------------------------------------------------------
|
| 2007 |
|
|
void serial_putstr(char *str)
|
| 2008 |
|
|
{
|
| 2009 |
|
|
while (*str)
|
| 2010 |
|
|
10001b44: 90 62 00 00 l.lbs r3,0(r2)
|
| 2011 |
|
|
10001b48: bc 03 00 00 l.sfeqi r3,0
|
| 2012 |
|
|
10001b4c: 0f ff ff fc l.bnf 10001b3c
|
| 2013 |
|
|
serial_putchar(*str++);
|
| 2014 |
|
|
}
|
| 2015 |
|
|
10001b50: 9c 21 00 0c l.addi r1,r1,12
|
| 2016 |
|
|
10001b54: 85 21 ff fc l.lwz r9,-4(r1)
|
| 2017 |
|
|
10001b58: 84 21 ff f4 l.lwz r1,-12(r1)
|
| 2018 |
|
|
10001b5c: 84 41 ff f8 l.lwz r2,-8(r1)
|
| 2019 |
|
|
10001b60: 44 00 48 00 l.jr r9
|
| 2020 |
|
|
|
| 2021 |
|
|
10001b64 :
|
| 2022 |
|
|
//-------------------------------------------------------------
|
| 2023 |
|
|
// serial_putnum:
|
| 2024 |
|
|
//-------------------------------------------------------------
|
| 2025 |
|
|
void serial_putnum( int n )
|
| 2026 |
|
|
{
|
| 2027 |
|
|
10001b64: d7 e1 17 e8 l.sw -24(r1),r2
|
| 2028 |
|
|
char* cp;
|
| 2029 |
|
|
int negative;
|
| 2030 |
|
|
char outbuf[32];
|
| 2031 |
|
|
const char digits[] = "0123456789ABCDEF";
|
| 2032 |
|
|
10001b68: 18 40 30 31 l.movhi r2,0x3031
|
| 2033 |
|
|
}
|
| 2034 |
|
|
//-------------------------------------------------------------
|
| 2035 |
|
|
// serial_putnum:
|
| 2036 |
|
|
//-------------------------------------------------------------
|
| 2037 |
|
|
void serial_putnum( int n )
|
| 2038 |
|
|
{
|
| 2039 |
|
|
10001b6c: d7 e1 4f fc l.sw -4(r1),r9
|
| 2040 |
|
|
char* cp;
|
| 2041 |
|
|
int negative;
|
| 2042 |
|
|
char outbuf[32];
|
| 2043 |
|
|
const char digits[] = "0123456789ABCDEF";
|
| 2044 |
|
|
10001b70: a8 42 32 33 l.ori r2,r2,0x3233
|
| 2045 |
|
|
}
|
| 2046 |
|
|
//-------------------------------------------------------------
|
| 2047 |
|
|
// serial_putnum:
|
| 2048 |
|
|
//-------------------------------------------------------------
|
| 2049 |
|
|
void serial_putnum( int n )
|
| 2050 |
|
|
{
|
| 2051 |
|
|
10001b74: d7 e1 0f e4 l.sw -28(r1),r1
|
| 2052 |
|
|
10001b78: d7 e1 77 ec l.sw -20(r1),r14
|
| 2053 |
|
|
10001b7c: d7 e1 97 f0 l.sw -16(r1),r18
|
| 2054 |
|
|
10001b80: d7 e1 a7 f4 l.sw -12(r1),r20
|
| 2055 |
|
|
10001b84: d7 e1 b7 f8 l.sw -8(r1),r22
|
| 2056 |
|
|
10001b88: 9c 21 ff b0 l.addi r1,r1,-80
|
| 2057 |
|
|
char outbuf[32];
|
| 2058 |
|
|
const char digits[] = "0123456789ABCDEF";
|
| 2059 |
|
|
unsigned long num;
|
| 2060 |
|
|
|
| 2061 |
|
|
/* Check if number is negative */
|
| 2062 |
|
|
if (n < 0L) {
|
| 2063 |
|
|
10001b8c: bd 63 00 00 l.sfgesi r3,0
|
| 2064 |
|
|
void serial_putnum( int n )
|
| 2065 |
|
|
{
|
| 2066 |
|
|
char* cp;
|
| 2067 |
|
|
int negative;
|
| 2068 |
|
|
char outbuf[32];
|
| 2069 |
|
|
const char digits[] = "0123456789ABCDEF";
|
| 2070 |
|
|
10001b90: d4 01 10 00 l.sw 0(r1),r2
|
| 2071 |
|
|
10001b94: 18 40 34 35 l.movhi r2,0x3435
|
| 2072 |
|
|
10001b98: a8 42 36 37 l.ori r2,r2,0x3637
|
| 2073 |
|
|
10001b9c: d4 01 10 04 l.sw 4(r1),r2
|
| 2074 |
|
|
10001ba0: 18 40 38 39 l.movhi r2,0x3839
|
| 2075 |
|
|
10001ba4: a8 42 41 42 l.ori r2,r2,0x4142
|
| 2076 |
|
|
10001ba8: d4 01 10 08 l.sw 8(r1),r2
|
| 2077 |
|
|
10001bac: 18 40 43 44 l.movhi r2,0x4344
|
| 2078 |
|
|
10001bb0: a8 42 45 46 l.ori r2,r2,0x4546
|
| 2079 |
|
|
10001bb4: d4 01 10 0c l.sw 12(r1),r2
|
| 2080 |
|
|
10001bb8: 9c 40 00 00 l.addi r2,r0,0
|
| 2081 |
|
|
10001bbc: d8 01 10 10 l.sb 16(r1),r2
|
| 2082 |
|
|
unsigned long num;
|
| 2083 |
|
|
|
| 2084 |
|
|
/* Check if number is negative */
|
| 2085 |
|
|
if (n < 0L) {
|
| 2086 |
|
|
10001bc0: 0c 00 00 2e l.bnf 10001c78
|
| 2087 |
|
|
negative = 1;
|
| 2088 |
|
|
num = -(n);
|
| 2089 |
|
|
}
|
| 2090 |
|
|
else{
|
| 2091 |
|
|
num = (n);
|
| 2092 |
|
|
10001bc4: a8 43 00 00 l.ori r2,r3,0x0
|
| 2093 |
|
|
negative = 0;
|
| 2094 |
|
|
10001bc8: 9e c0 00 00 l.addi r22,r0,0
|
| 2095 |
|
|
10001bcc: 9e 81 00 14 l.addi r20,r1,20
|
| 2096 |
|
|
10001bd0: a9 d4 00 00 l.ori r14,r20,0x0
|
| 2097 |
|
|
10001bd4: 00 00 00 02 l.j 10001bdc
|
| 2098 |
|
|
10001bd8: a9 d2 00 00 l.ori r14,r18,0x0
|
| 2099 |
|
|
}
|
| 2100 |
|
|
|
| 2101 |
|
|
/* Build number (backwards) in outbuf */
|
| 2102 |
|
|
cp = outbuf;
|
| 2103 |
|
|
do {
|
| 2104 |
|
|
*cp++ = digits[(int)(num % 10)];
|
| 2105 |
|
|
10001bdc: a8 62 00 00 l.ori r3,r2,0x0
|
| 2106 |
|
|
10001be0: 9c 80 00 0a l.addi r4,r0,10
|
| 2107 |
|
|
serial_putchar(*str++);
|
| 2108 |
|
|
}
|
| 2109 |
|
|
//-------------------------------------------------------------
|
| 2110 |
|
|
// serial_putnum:
|
| 2111 |
|
|
//-------------------------------------------------------------
|
| 2112 |
|
|
void serial_putnum( int n )
|
| 2113 |
|
|
10001be4: 9e 4e 00 01 l.addi r18,r14,1
|
| 2114 |
|
|
}
|
| 2115 |
|
|
|
| 2116 |
|
|
/* Build number (backwards) in outbuf */
|
| 2117 |
|
|
cp = outbuf;
|
| 2118 |
|
|
do {
|
| 2119 |
|
|
*cp++ = digits[(int)(num % 10)];
|
| 2120 |
|
|
10001be8: 04 00 03 4e l.jal 10002920 <__umodsi3>
|
| 2121 |
|
|
10001bec: 9c 61 00 00 l.addi r3,r1,0
|
| 2122 |
|
|
} while ((num /= 10) > 0);
|
| 2123 |
|
|
10001bf0: 9c 80 00 0a l.addi r4,r0,10
|
| 2124 |
|
|
}
|
| 2125 |
|
|
|
| 2126 |
|
|
/* Build number (backwards) in outbuf */
|
| 2127 |
|
|
cp = outbuf;
|
| 2128 |
|
|
do {
|
| 2129 |
|
|
*cp++ = digits[(int)(num % 10)];
|
| 2130 |
|
|
10001bf4: e1 63 58 00 l.add r11,r3,r11
|
| 2131 |
|
|
} while ((num /= 10) > 0);
|
| 2132 |
|
|
10001bf8: a8 62 00 00 l.ori r3,r2,0x0
|
| 2133 |
|
|
}
|
| 2134 |
|
|
|
| 2135 |
|
|
/* Build number (backwards) in outbuf */
|
| 2136 |
|
|
cp = outbuf;
|
| 2137 |
|
|
do {
|
| 2138 |
|
|
*cp++ = digits[(int)(num % 10)];
|
| 2139 |
|
|
10001bfc: 8d 6b 00 00 l.lbz r11,0(r11)
|
| 2140 |
|
|
10001c00: d8 0e 58 00 l.sb 0(r14),r11
|
| 2141 |
|
|
} while ((num /= 10) > 0);
|
| 2142 |
|
|
10001c04: 04 00 03 3e l.jal 100028fc <__udivsi3>
|
| 2143 |
|
|
10001c08: bc 0b 00 00 l.sfeqi r11,0
|
| 2144 |
|
|
10001c0c: a8 4b 00 00 l.ori r2,r11,0x0
|
| 2145 |
|
|
10001c10: 0f ff ff f2 l.bnf 10001bd8
|
| 2146 |
|
|
if (negative)
|
| 2147 |
|
|
10001c14: bc 16 00 00 l.sfeqi r22,0
|
| 2148 |
|
|
10001c18: 10 00 00 04 l.bf 10001c28
|
| 2149 |
|
|
*cp++ = '-';
|
| 2150 |
|
|
10001c1c: 9c 40 00 2d l.addi r2,r0,45
|
| 2151 |
|
|
10001c20: 9e 4e 00 02 l.addi r18,r14,2
|
| 2152 |
|
|
10001c24: d8 0e 10 01 l.sb 1(r14),r2
|
| 2153 |
|
|
*cp-- = 0;
|
| 2154 |
|
|
10001c28: 9c 52 ff ff l.addi r2,r18,-1
|
| 2155 |
|
|
10001c2c: 9c 60 00 00 l.addi r3,r0,0
|
| 2156 |
|
|
|
| 2157 |
|
|
while (cp >= outbuf)
|
| 2158 |
|
|
10001c30: e4 62 a0 00 l.sfgeu r2,r20
|
| 2159 |
|
|
do {
|
| 2160 |
|
|
*cp++ = digits[(int)(num % 10)];
|
| 2161 |
|
|
} while ((num /= 10) > 0);
|
| 2162 |
|
|
if (negative)
|
| 2163 |
|
|
*cp++ = '-';
|
| 2164 |
|
|
*cp-- = 0;
|
| 2165 |
|
|
10001c34: d8 12 18 00 l.sb 0(r18),r3
|
| 2166 |
|
|
|
| 2167 |
|
|
while (cp >= outbuf)
|
| 2168 |
|
|
10001c38: 0c 00 00 07 l.bnf 10001c54
|
| 2169 |
|
|
serial_putchar(*str++);
|
| 2170 |
|
|
}
|
| 2171 |
|
|
//-------------------------------------------------------------
|
| 2172 |
|
|
// serial_putnum:
|
| 2173 |
|
|
//-------------------------------------------------------------
|
| 2174 |
|
|
void serial_putnum( int n )
|
| 2175 |
|
|
10001c3c: 9d d4 ff ff l.addi r14,r20,-1
|
| 2176 |
|
|
if (negative)
|
| 2177 |
|
|
*cp++ = '-';
|
| 2178 |
|
|
*cp-- = 0;
|
| 2179 |
|
|
|
| 2180 |
|
|
while (cp >= outbuf)
|
| 2181 |
|
|
serial_putchar(*cp--);
|
| 2182 |
|
|
10001c40: 90 62 00 00 l.lbs r3,0(r2)
|
| 2183 |
|
|
10001c44: 9c 42 ff ff l.addi r2,r2,-1
|
| 2184 |
|
|
10001c48: 07 ff ff 83 l.jal 10001a54
|
| 2185 |
|
|
} while ((num /= 10) > 0);
|
| 2186 |
|
|
if (negative)
|
| 2187 |
|
|
*cp++ = '-';
|
| 2188 |
|
|
*cp-- = 0;
|
| 2189 |
|
|
|
| 2190 |
|
|
while (cp >= outbuf)
|
| 2191 |
|
|
10001c4c: e4 02 70 00 l.sfeq r2,r14
|
| 2192 |
|
|
10001c50: 0f ff ff fc l.bnf 10001c40
|
| 2193 |
|
|
serial_putchar(*cp--);
|
| 2194 |
|
|
}
|
| 2195 |
|
|
10001c54: 9c 21 00 50 l.addi r1,r1,80
|
| 2196 |
|
|
10001c58: 85 21 ff fc l.lwz r9,-4(r1)
|
| 2197 |
|
|
10001c5c: 84 21 ff e4 l.lwz r1,-28(r1)
|
| 2198 |
|
|
10001c60: 84 41 ff e8 l.lwz r2,-24(r1)
|
| 2199 |
|
|
10001c64: 85 c1 ff ec l.lwz r14,-20(r1)
|
| 2200 |
|
|
10001c68: 86 41 ff f0 l.lwz r18,-16(r1)
|
| 2201 |
|
|
10001c6c: 86 81 ff f4 l.lwz r20,-12(r1)
|
| 2202 |
|
|
10001c70: 86 c1 ff f8 l.lwz r22,-8(r1)
|
| 2203 |
|
|
10001c74: 44 00 48 00 l.jr r9
|
| 2204 |
|
|
unsigned long num;
|
| 2205 |
|
|
|
| 2206 |
|
|
/* Check if number is negative */
|
| 2207 |
|
|
if (n < 0L) {
|
| 2208 |
|
|
negative = 1;
|
| 2209 |
|
|
num = -(n);
|
| 2210 |
|
|
10001c78: e0 40 18 02 l.sub r2,r0,r3
|
| 2211 |
|
|
const char digits[] = "0123456789ABCDEF";
|
| 2212 |
|
|
unsigned long num;
|
| 2213 |
|
|
|
| 2214 |
|
|
/* Check if number is negative */
|
| 2215 |
|
|
if (n < 0L) {
|
| 2216 |
|
|
negative = 1;
|
| 2217 |
|
|
10001c7c: 9e c0 00 01 l.addi r22,r0,1
|
| 2218 |
|
|
10001c80: 03 ff ff d3 l.j 10001bcc
|
| 2219 |
|
|
|
| 2220 |
|
|
10001c84 :
|
| 2221 |
|
|
|
| 2222 |
|
|
//--------------------------------------------------------------------------
|
| 2223 |
|
|
// timer_init:
|
| 2224 |
|
|
//--------------------------------------------------------------------------
|
| 2225 |
|
|
void timer_init(void)
|
| 2226 |
|
|
{
|
| 2227 |
|
|
10001c84: d7 e1 0f fc l.sw -4(r1),r1
|
| 2228 |
|
|
10001c88: 9c 21 ff fc l.addi r1,r1,-4
|
| 2229 |
|
|
|
| 2230 |
|
|
}
|
| 2231 |
|
|
10001c8c: 9c 21 00 04 l.addi r1,r1,4
|
| 2232 |
|
|
10001c90: 84 21 ff fc l.lwz r1,-4(r1)
|
| 2233 |
|
|
10001c94: 44 00 48 00 l.jr r9
|
| 2234 |
|
|
|
| 2235 |
|
|
10001c98 :
|
| 2236 |
|
|
// Prototypes:
|
| 2237 |
|
|
//-----------------------------------------------------------------
|
| 2238 |
|
|
|
| 2239 |
|
|
// General timer
|
| 2240 |
|
|
void timer_init(void);
|
| 2241 |
|
|
static t_time timer_now(void) { return TIMER_VAL; }
|
| 2242 |
|
|
10001c98: 18 a0 12 00 l.movhi r5,0x1200
|
| 2243 |
|
|
//--------------------------------------------------------------------------
|
| 2244 |
|
|
// timer_sleep:
|
| 2245 |
|
|
//--------------------------------------------------------------------------
|
| 2246 |
|
|
void timer_sleep(int timeMs)
|
| 2247 |
|
|
{
|
| 2248 |
|
|
10001c9c: d7 e1 0f fc l.sw -4(r1),r1
|
| 2249 |
|
|
10001ca0: a8 a5 01 00 l.ori r5,r5,0x100
|
| 2250 |
|
|
10001ca4: 9c 21 ff fc l.addi r1,r1,-4
|
| 2251 |
|
|
10001ca8: 84 c5 00 00 l.lwz r6,0(r5)
|
| 2252 |
|
|
10001cac: 84 85 00 00 l.lwz r4,0(r5)
|
| 2253 |
|
|
static long timer_diff(t_time a, t_time b) { return (long)(a - b); }
|
| 2254 |
|
|
10001cb0: e0 84 30 02 l.sub r4,r4,r6
|
| 2255 |
|
|
t_time t = timer_now();
|
| 2256 |
|
|
|
| 2257 |
|
|
while (timer_diff(timer_now(), t) < timeMs)
|
| 2258 |
|
|
10001cb4: e5 a3 20 00 l.sfles r3,r4
|
| 2259 |
|
|
10001cb8: 0f ff ff fd l.bnf 10001cac
|
| 2260 |
|
|
;
|
| 2261 |
|
|
}
|
| 2262 |
|
|
10001cbc: 9c 21 00 04 l.addi r1,r1,4
|
| 2263 |
|
|
10001cc0: 84 21 ff fc l.lwz r1,-4(r1)
|
| 2264 |
|
|
10001cc4: 44 00 48 00 l.jr r9
|
| 2265 |
|
|
|
| 2266 |
|
|
10001cc8 :
|
| 2267 |
|
|
volatile int syscall_done = 0;
|
| 2268 |
|
|
|
| 2269 |
|
|
//-----------------------------------------------------------------
|
| 2270 |
|
|
// Syscall handling:
|
| 2271 |
|
|
//-----------------------------------------------------------------
|
| 2272 |
|
|
void empty_syscall(void) { syscall_done = 1; }
|
| 2273 |
|
|
10001cc8: 18 60 10 00 l.movhi r3,0x1000
|
| 2274 |
|
|
10001ccc: 9c 80 00 01 l.addi r4,r0,1
|
| 2275 |
|
|
10001cd0: a8 63 2f f8 l.ori r3,r3,0x2ff8
|
| 2276 |
|
|
10001cd4: d7 e1 0f fc l.sw -4(r1),r1
|
| 2277 |
|
|
10001cd8: 9c 21 ff fc l.addi r1,r1,-4
|
| 2278 |
|
|
10001cdc: d4 03 20 00 l.sw 0(r3),r4
|
| 2279 |
|
|
10001ce0: 9c 21 00 04 l.addi r1,r1,4
|
| 2280 |
|
|
10001ce4: 84 21 ff fc l.lwz r1,-4(r1)
|
| 2281 |
|
|
10001ce8: 44 00 48 00 l.jr r9
|
| 2282 |
|
|
|
| 2283 |
|
|
10001cec :
|
| 2284 |
|
|
unsigned short sw;
|
| 2285 |
|
|
unsigned short *psw;
|
| 2286 |
|
|
unsigned char sb;
|
| 2287 |
|
|
unsigned char *psb;
|
| 2288 |
|
|
|
| 2289 |
|
|
serial_putstr("\nTest:\n");
|
| 2290 |
|
|
10001cec: 18 60 10 00 l.movhi r3,0x1000
|
| 2291 |
|
|
|
| 2292 |
|
|
//-----------------------------------------------------------------
|
| 2293 |
|
|
// main:
|
| 2294 |
|
|
//-----------------------------------------------------------------
|
| 2295 |
|
|
int test(void)
|
| 2296 |
|
|
{
|
| 2297 |
|
|
10001cf0: d7 e1 4f fc l.sw -4(r1),r9
|
| 2298 |
|
|
10001cf4: d7 e1 17 f0 l.sw -16(r1),r2
|
| 2299 |
|
|
10001cf8: d7 e1 0f ec l.sw -20(r1),r1
|
| 2300 |
|
|
10001cfc: d7 e1 77 f4 l.sw -12(r1),r14
|
| 2301 |
|
|
10001d00: d7 e1 97 f8 l.sw -8(r1),r18
|
| 2302 |
|
|
unsigned short sw;
|
| 2303 |
|
|
unsigned short *psw;
|
| 2304 |
|
|
unsigned char sb;
|
| 2305 |
|
|
unsigned char *psb;
|
| 2306 |
|
|
|
| 2307 |
|
|
serial_putstr("\nTest:\n");
|
| 2308 |
|
|
10001d04: a8 63 2d 09 l.ori r3,r3,0x2d09
|
| 2309 |
|
|
|
| 2310 |
|
|
//-----------------------------------------------------------------
|
| 2311 |
|
|
// main:
|
| 2312 |
|
|
//-----------------------------------------------------------------
|
| 2313 |
|
|
int test(void)
|
| 2314 |
|
|
{
|
| 2315 |
|
|
10001d08: 9c 21 ff e0 l.addi r1,r1,-32
|
| 2316 |
|
|
|
| 2317 |
|
|
// Assign empty syscall handler
|
| 2318 |
|
|
exception_register_syscall_handler(empty_syscall);
|
| 2319 |
|
|
|
| 2320 |
|
|
serial_putstr("1. Initialised data\n");
|
| 2321 |
|
|
assert(var == 0x1234); // .text
|
| 2322 |
|
|
10001d0c: 18 40 10 00 l.movhi r2,0x1000
|
| 2323 |
|
|
unsigned short sw;
|
| 2324 |
|
|
unsigned short *psw;
|
| 2325 |
|
|
unsigned char sb;
|
| 2326 |
|
|
unsigned char *psb;
|
| 2327 |
|
|
|
| 2328 |
|
|
serial_putstr("\nTest:\n");
|
| 2329 |
|
|
10001d10: 07 ff ff 83 l.jal 10001b1c
|
| 2330 |
|
|
|
| 2331 |
|
|
// Adjust ISR vector to match this app's vector offset
|
| 2332 |
|
|
asm_set_isr_vector(asm_save_context);
|
| 2333 |
|
|
|
| 2334 |
|
|
// Assign empty syscall handler
|
| 2335 |
|
|
exception_register_syscall_handler(empty_syscall);
|
| 2336 |
|
|
10001d14: 18 60 10 00 l.movhi r3,0x1000
|
| 2337 |
|
|
|
| 2338 |
|
|
serial_putstr("1. Initialised data\n");
|
| 2339 |
|
|
assert(var == 0x1234); // .text
|
| 2340 |
|
|
10001d18: a8 42 2f d8 l.ori r2,r2,0x2fd8
|
| 2341 |
|
|
|
| 2342 |
|
|
// Adjust ISR vector to match this app's vector offset
|
| 2343 |
|
|
asm_set_isr_vector(asm_save_context);
|
| 2344 |
|
|
|
| 2345 |
|
|
// Assign empty syscall handler
|
| 2346 |
|
|
exception_register_syscall_handler(empty_syscall);
|
| 2347 |
|
|
10001d1c: a8 63 1c c8 l.ori r3,r3,0x1cc8
|
| 2348 |
|
|
10001d20: 07 ff fc e2 l.jal 100010a8
|
| 2349 |
|
|
|
| 2350 |
|
|
serial_putstr("1. Initialised data\n");
|
| 2351 |
|
|
10001d24: 18 60 10 00 l.movhi r3,0x1000
|
| 2352 |
|
|
10001d28: a8 63 2d 11 l.ori r3,r3,0x2d11
|
| 2353 |
|
|
10001d2c: 07 ff ff 7c l.jal 10001b1c
|
| 2354 |
|
|
assert(var == 0x1234); // .text
|
| 2355 |
|
|
10001d30: 84 62 00 00 l.lwz r3,0(r2)
|
| 2356 |
|
|
10001d34: bc 03 12 34 l.sfeqi r3,4660
|
| 2357 |
|
|
10001d38: 10 00 00 0e l.bf 10001d70
|
| 2358 |
|
|
10001d3c: 18 60 10 00 l.movhi r3,0x1000
|
| 2359 |
|
|
10001d40: a8 63 2d 26 l.ori r3,r3,0x2d26
|
| 2360 |
|
|
10001d44: d4 01 18 00 l.sw 0(r1),r3
|
| 2361 |
|
|
10001d48: 18 60 10 00 l.movhi r3,0x1000
|
| 2362 |
|
|
10001d4c: a8 63 2d 34 l.ori r3,r3,0x2d34
|
| 2363 |
|
|
10001d50: d4 01 18 04 l.sw 4(r1),r3
|
| 2364 |
|
|
10001d54: 9c 60 00 29 l.addi r3,r0,41
|
| 2365 |
|
|
10001d58: d4 01 18 08 l.sw 8(r1),r3
|
| 2366 |
|
|
10001d5c: 18 60 10 00 l.movhi r3,0x1000
|
| 2367 |
|
|
10001d60: a8 63 2c 74 l.ori r3,r3,0x2c74
|
| 2368 |
|
|
10001d64: 07 ff ff 20 l.jal 100019e4
|
| 2369 |
|
|
|
| 2370 |
|
|
}
|
| 2371 |
|
|
|
| 2372 |
|
|
static inline void exit(unsigned exit_code)
|
| 2373 |
|
|
{
|
| 2374 |
|
|
volatile register char t1 asm ("r1") = exit_code;
|
| 2375 |
|
|
10001d68: 9c 20 00 01 l.addi r1,r0,1
|
| 2376 |
|
|
__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 2377 |
|
|
}
|
| 2378 |
|
|
else
|
| 2379 |
|
|
{
|
| 2380 |
|
|
// Invalid instruction!
|
| 2381 |
|
|
__asm__ __volatile__ ( "\t lf.add.s r0,r0,r0 ");
|
| 2382 |
|
|
10001d6c: c8 00 00 00 lf.add.s r0,r0,r0
|
| 2383 |
|
|
assert(uvar == 0x0); // .bss
|
| 2384 |
|
|
10001d70: 19 c0 10 00 l.movhi r14,0x1000
|
| 2385 |
|
|
10001d74: a9 ce 30 04 l.ori r14,r14,0x3004
|
| 2386 |
|
|
10001d78: 84 6e 00 00 l.lwz r3,0(r14)
|
| 2387 |
|
|
10001d7c: bc 03 00 00 l.sfeqi r3,0
|
| 2388 |
|
|
10001d80: 0c 00 02 d1 l.bnf 100028c4
|
| 2389 |
|
|
|
| 2390 |
|
|
serial_putstr("2. Multiply\n");
|
| 2391 |
|
|
10001d84: 18 60 10 00 l.movhi r3,0x1000
|
| 2392 |
|
|
10001d88: a8 63 2d 47 l.ori r3,r3,0x2d47
|
| 2393 |
|
|
10001d8c: 07 ff ff 64 l.jal 10001b1c
|
| 2394 |
|
|
var = var * 3;
|
| 2395 |
|
|
10001d90: 84 62 00 00 l.lwz r3,0(r2)
|
| 2396 |
|
|
10001d94: e0 83 18 00 l.add r4,r3,r3
|
| 2397 |
|
|
10001d98: e0 64 18 00 l.add r3,r4,r3
|
| 2398 |
|
|
10001d9c: d4 02 18 00 l.sw 0(r2),r3
|
| 2399 |
|
|
assert(var == 13980);
|
| 2400 |
|
|
10001da0: 84 62 00 00 l.lwz r3,0(r2)
|
| 2401 |
|
|
10001da4: bc 03 36 9c l.sfeqi r3,13980
|
| 2402 |
|
|
10001da8: 10 00 00 0e l.bf 10001de0
|
| 2403 |
|
|
10001dac: 18 60 10 00 l.movhi r3,0x1000
|
| 2404 |
|
|
10001db0: a8 63 2d 54 l.ori r3,r3,0x2d54
|
| 2405 |
|
|
10001db4: d4 01 18 00 l.sw 0(r1),r3
|
| 2406 |
|
|
10001db8: 18 60 10 00 l.movhi r3,0x1000
|
| 2407 |
|
|
10001dbc: a8 63 2d 34 l.ori r3,r3,0x2d34
|
| 2408 |
|
|
10001dc0: d4 01 18 04 l.sw 4(r1),r3
|
| 2409 |
|
|
10001dc4: 9c 60 00 2e l.addi r3,r0,46
|
| 2410 |
|
|
10001dc8: d4 01 18 08 l.sw 8(r1),r3
|
| 2411 |
|
|
10001dcc: 18 60 10 00 l.movhi r3,0x1000
|
| 2412 |
|
|
10001dd0: a8 63 2c 74 l.ori r3,r3,0x2c74
|
| 2413 |
|
|
10001dd4: 07 ff ff 04 l.jal 100019e4
|
| 2414 |
|
|
|
| 2415 |
|
|
}
|
| 2416 |
|
|
|
| 2417 |
|
|
static inline void exit(unsigned exit_code)
|
| 2418 |
|
|
{
|
| 2419 |
|
|
volatile register char t1 asm ("r1") = exit_code;
|
| 2420 |
|
|
10001dd8: 9c 20 00 01 l.addi r1,r0,1
|
| 2421 |
|
|
__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 2422 |
|
|
}
|
| 2423 |
|
|
else
|
| 2424 |
|
|
{
|
| 2425 |
|
|
// Invalid instruction!
|
| 2426 |
|
|
__asm__ __volatile__ ( "\t lf.add.s r0,r0,r0 ");
|
| 2427 |
|
|
10001ddc: c8 00 00 00 lf.add.s r0,r0,r0
|
| 2428 |
|
|
var = -1;
|
| 2429 |
|
|
10001de0: 9c 60 ff ff l.addi r3,r0,-1
|
| 2430 |
|
|
10001de4: d4 02 18 00 l.sw 0(r2),r3
|
| 2431 |
|
|
var = var * 3;
|
| 2432 |
|
|
10001de8: 84 62 00 00 l.lwz r3,0(r2)
|
| 2433 |
|
|
10001dec: e0 83 18 00 l.add r4,r3,r3
|
| 2434 |
|
|
10001df0: e0 64 18 00 l.add r3,r4,r3
|
| 2435 |
|
|
10001df4: d4 02 18 00 l.sw 0(r2),r3
|
| 2436 |
|
|
assert(var == -3);
|
| 2437 |
|
|
10001df8: 84 62 00 00 l.lwz r3,0(r2)
|
| 2438 |
|
|
10001dfc: bc 03 ff fd l.sfeqi r3,-3
|
| 2439 |
|
|
10001e00: 10 00 00 0e l.bf 10001e38
|
| 2440 |
|
|
10001e04: 18 60 10 00 l.movhi r3,0x1000
|
| 2441 |
|
|
10001e08: a8 63 2d 61 l.ori r3,r3,0x2d61
|
| 2442 |
|
|
10001e0c: d4 01 18 00 l.sw 0(r1),r3
|
| 2443 |
|
|
10001e10: 18 60 10 00 l.movhi r3,0x1000
|
| 2444 |
|
|
10001e14: a8 63 2d 34 l.ori r3,r3,0x2d34
|
| 2445 |
|
|
10001e18: d4 01 18 04 l.sw 4(r1),r3
|
| 2446 |
|
|
10001e1c: 9c 60 00 31 l.addi r3,r0,49
|
| 2447 |
|
|
10001e20: d4 01 18 08 l.sw 8(r1),r3
|
| 2448 |
|
|
10001e24: 18 60 10 00 l.movhi r3,0x1000
|
| 2449 |
|
|
10001e28: a8 63 2c 74 l.ori r3,r3,0x2c74
|
| 2450 |
|
|
10001e2c: 07 ff fe ee l.jal 100019e4
|
| 2451 |
|
|
|
| 2452 |
|
|
}
|
| 2453 |
|
|
|
| 2454 |
|
|
static inline void exit(unsigned exit_code)
|
| 2455 |
|
|
{
|
| 2456 |
|
|
volatile register char t1 asm ("r1") = exit_code;
|
| 2457 |
|
|
10001e30: 9c 20 00 01 l.addi r1,r0,1
|
| 2458 |
|
|
__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 2459 |
|
|
}
|
| 2460 |
|
|
else
|
| 2461 |
|
|
{
|
| 2462 |
|
|
// Invalid instruction!
|
| 2463 |
|
|
__asm__ __volatile__ ( "\t lf.add.s r0,r0,r0 ");
|
| 2464 |
|
|
10001e34: c8 00 00 00 lf.add.s r0,r0,r0
|
| 2465 |
|
|
var = -5;
|
| 2466 |
|
|
10001e38: 9c 60 ff fb l.addi r3,r0,-5
|
| 2467 |
|
|
10001e3c: d4 02 18 00 l.sw 0(r2),r3
|
| 2468 |
|
|
var = var * 13;
|
| 2469 |
|
|
10001e40: 84 62 00 00 l.lwz r3,0(r2)
|
| 2470 |
|
|
10001e44: e0 83 18 00 l.add r4,r3,r3
|
| 2471 |
|
|
10001e48: e0 84 18 00 l.add r4,r4,r3
|
| 2472 |
|
|
10001e4c: b8 84 00 02 l.slli r4,r4,0x2
|
| 2473 |
|
|
10001e50: e0 64 18 00 l.add r3,r4,r3
|
| 2474 |
|
|
10001e54: d4 02 18 00 l.sw 0(r2),r3
|
| 2475 |
|
|
assert(var == -65);
|
| 2476 |
|
|
10001e58: 84 62 00 00 l.lwz r3,0(r2)
|
| 2477 |
|
|
10001e5c: bc 03 ff bf l.sfeqi r3,-65
|
| 2478 |
|
|
10001e60: 10 00 00 0e l.bf 10001e98
|
| 2479 |
|
|
10001e64: 18 60 10 00 l.movhi r3,0x1000
|
| 2480 |
|
|
10001e68: a8 63 2d 6b l.ori r3,r3,0x2d6b
|
| 2481 |
|
|
10001e6c: d4 01 18 00 l.sw 0(r1),r3
|
| 2482 |
|
|
10001e70: 18 60 10 00 l.movhi r3,0x1000
|
| 2483 |
|
|
10001e74: a8 63 2d 34 l.ori r3,r3,0x2d34
|
| 2484 |
|
|
10001e78: d4 01 18 04 l.sw 4(r1),r3
|
| 2485 |
|
|
10001e7c: 9c 60 00 34 l.addi r3,r0,52
|
| 2486 |
|
|
10001e80: d4 01 18 08 l.sw 8(r1),r3
|
| 2487 |
|
|
10001e84: 18 60 10 00 l.movhi r3,0x1000
|
| 2488 |
|
|
10001e88: a8 63 2c 74 l.ori r3,r3,0x2c74
|
| 2489 |
|
|
10001e8c: 07 ff fe d6 l.jal 100019e4
|
| 2490 |
|
|
|
| 2491 |
|
|
}
|
| 2492 |
|
|
|
| 2493 |
|
|
static inline void exit(unsigned exit_code)
|
| 2494 |
|
|
{
|
| 2495 |
|
|
volatile register char t1 asm ("r1") = exit_code;
|
| 2496 |
|
|
10001e90: 9c 20 00 01 l.addi r1,r0,1
|
| 2497 |
|
|
__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 2498 |
|
|
}
|
| 2499 |
|
|
else
|
| 2500 |
|
|
{
|
| 2501 |
|
|
// Invalid instruction!
|
| 2502 |
|
|
__asm__ __volatile__ ( "\t lf.add.s r0,r0,r0 ");
|
| 2503 |
|
|
10001e94: c8 00 00 00 lf.add.s r0,r0,r0
|
| 2504 |
|
|
var = -5;
|
| 2505 |
|
|
10001e98: 9c 60 ff fb l.addi r3,r0,-5
|
| 2506 |
|
|
var = var * -13;
|
| 2507 |
|
|
10001e9c: 9c 80 ff f3 l.addi r4,r0,-13
|
| 2508 |
|
|
var = var * 3;
|
| 2509 |
|
|
assert(var == -3);
|
| 2510 |
|
|
var = -5;
|
| 2511 |
|
|
var = var * 13;
|
| 2512 |
|
|
assert(var == -65);
|
| 2513 |
|
|
var = -5;
|
| 2514 |
|
|
10001ea0: d4 02 18 00 l.sw 0(r2),r3
|
| 2515 |
|
|
var = var * -13;
|
| 2516 |
|
|
10001ea4: 84 62 00 00 l.lwz r3,0(r2)
|
| 2517 |
|
|
10001ea8: 04 00 03 04 l.jal 10002ab8 <__mulsi3>
|
| 2518 |
|
|
10001eac: d4 02 58 00 l.sw 0(r2),r11
|
| 2519 |
|
|
assert(var == (-5*-13));
|
| 2520 |
|
|
10001eb0: 84 62 00 00 l.lwz r3,0(r2)
|
| 2521 |
|
|
10001eb4: bc 03 00 41 l.sfeqi r3,65
|
| 2522 |
|
|
10001eb8: 10 00 00 0e l.bf 10001ef0
|
| 2523 |
|
|
10001ebc: 18 60 10 00 l.movhi r3,0x1000
|
| 2524 |
|
|
10001ec0: a8 63 2d 76 l.ori r3,r3,0x2d76
|
| 2525 |
|
|
10001ec4: d4 01 18 00 l.sw 0(r1),r3
|
| 2526 |
|
|
10001ec8: 18 60 10 00 l.movhi r3,0x1000
|
| 2527 |
|
|
10001ecc: a8 63 2d 34 l.ori r3,r3,0x2d34
|
| 2528 |
|
|
10001ed0: d4 01 18 04 l.sw 4(r1),r3
|
| 2529 |
|
|
10001ed4: 9c 60 00 37 l.addi r3,r0,55
|
| 2530 |
|
|
10001ed8: d4 01 18 08 l.sw 8(r1),r3
|
| 2531 |
|
|
10001edc: 18 60 10 00 l.movhi r3,0x1000
|
| 2532 |
|
|
10001ee0: a8 63 2c 74 l.ori r3,r3,0x2c74
|
| 2533 |
|
|
10001ee4: 07 ff fe c0 l.jal 100019e4
|
| 2534 |
|
|
|
| 2535 |
|
|
}
|
| 2536 |
|
|
|
| 2537 |
|
|
static inline void exit(unsigned exit_code)
|
| 2538 |
|
|
{
|
| 2539 |
|
|
volatile register char t1 asm ("r1") = exit_code;
|
| 2540 |
|
|
10001ee8: 9c 20 00 01 l.addi r1,r0,1
|
| 2541 |
|
|
__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 2542 |
|
|
}
|
| 2543 |
|
|
else
|
| 2544 |
|
|
{
|
| 2545 |
|
|
// Invalid instruction!
|
| 2546 |
|
|
__asm__ __volatile__ ( "\t lf.add.s r0,r0,r0 ");
|
| 2547 |
|
|
10001eec: c8 00 00 00 lf.add.s r0,r0,r0
|
| 2548 |
|
|
var = -123123415;
|
| 2549 |
|
|
10001ef0: 18 60 f8 a9 l.movhi r3,0xf8a9
|
| 2550 |
|
|
var = var * 9664563;
|
| 2551 |
|
|
10001ef4: 18 80 00 93 l.movhi r4,0x93
|
| 2552 |
|
|
var = var * 13;
|
| 2553 |
|
|
assert(var == -65);
|
| 2554 |
|
|
var = -5;
|
| 2555 |
|
|
var = var * -13;
|
| 2556 |
|
|
assert(var == (-5*-13));
|
| 2557 |
|
|
var = -123123415;
|
| 2558 |
|
|
10001ef8: a8 63 49 29 l.ori r3,r3,0x4929
|
| 2559 |
|
|
var = var * 9664563;
|
| 2560 |
|
|
10001efc: a8 84 78 33 l.ori r4,r4,0x7833
|
| 2561 |
|
|
var = var * 13;
|
| 2562 |
|
|
assert(var == -65);
|
| 2563 |
|
|
var = -5;
|
| 2564 |
|
|
var = var * -13;
|
| 2565 |
|
|
assert(var == (-5*-13));
|
| 2566 |
|
|
var = -123123415;
|
| 2567 |
|
|
10001f00: d4 02 18 00 l.sw 0(r2),r3
|
| 2568 |
|
|
var = var * 9664563;
|
| 2569 |
|
|
10001f04: 84 62 00 00 l.lwz r3,0(r2)
|
| 2570 |
|
|
10001f08: 04 00 02 ec l.jal 10002ab8 <__mulsi3>
|
| 2571 |
|
|
assert(var == (-123123415*9664563));
|
| 2572 |
|
|
10001f0c: 18 80 e6 8f l.movhi r4,0xe68f
|
| 2573 |
|
|
assert(var == -65);
|
| 2574 |
|
|
var = -5;
|
| 2575 |
|
|
var = var * -13;
|
| 2576 |
|
|
assert(var == (-5*-13));
|
| 2577 |
|
|
var = -123123415;
|
| 2578 |
|
|
var = var * 9664563;
|
| 2579 |
|
|
10001f10: d4 02 58 00 l.sw 0(r2),r11
|
| 2580 |
|
|
assert(var == (-123123415*9664563));
|
| 2581 |
|
|
10001f14: a8 84 cb 2b l.ori r4,r4,0xcb2b
|
| 2582 |
|
|
10001f18: 84 62 00 00 l.lwz r3,0(r2)
|
| 2583 |
|
|
10001f1c: e4 03 20 00 l.sfeq r3,r4
|
| 2584 |
|
|
10001f20: 10 00 00 0e l.bf 10001f58
|
| 2585 |
|
|
10001f24: 18 60 10 00 l.movhi r3,0x1000
|
| 2586 |
|
|
10001f28: a8 63 2d 86 l.ori r3,r3,0x2d86
|
| 2587 |
|
|
10001f2c: d4 01 18 00 l.sw 0(r1),r3
|
| 2588 |
|
|
10001f30: 18 60 10 00 l.movhi r3,0x1000
|
| 2589 |
|
|
10001f34: a8 63 2d 34 l.ori r3,r3,0x2d34
|
| 2590 |
|
|
10001f38: d4 01 18 04 l.sw 4(r1),r3
|
| 2591 |
|
|
10001f3c: 9c 60 00 3a l.addi r3,r0,58
|
| 2592 |
|
|
10001f40: d4 01 18 08 l.sw 8(r1),r3
|
| 2593 |
|
|
10001f44: 18 60 10 00 l.movhi r3,0x1000
|
| 2594 |
|
|
10001f48: a8 63 2c 74 l.ori r3,r3,0x2c74
|
| 2595 |
|
|
10001f4c: 07 ff fe a6 l.jal 100019e4
|
| 2596 |
|
|
|
| 2597 |
|
|
}
|
| 2598 |
|
|
|
| 2599 |
|
|
static inline void exit(unsigned exit_code)
|
| 2600 |
|
|
{
|
| 2601 |
|
|
volatile register char t1 asm ("r1") = exit_code;
|
| 2602 |
|
|
10001f50: 9c 20 00 01 l.addi r1,r0,1
|
| 2603 |
|
|
__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 2604 |
|
|
}
|
| 2605 |
|
|
else
|
| 2606 |
|
|
{
|
| 2607 |
|
|
// Invalid instruction!
|
| 2608 |
|
|
__asm__ __volatile__ ( "\t lf.add.s r0,r0,r0 ");
|
| 2609 |
|
|
10001f54: c8 00 00 00 lf.add.s r0,r0,r0
|
| 2610 |
|
|
|
| 2611 |
|
|
serial_putstr("3. Divide\n");
|
| 2612 |
|
|
10001f58: 18 60 10 00 l.movhi r3,0x1000
|
| 2613 |
|
|
10001f5c: a8 63 2d a2 l.ori r3,r3,0x2da2
|
| 2614 |
|
|
10001f60: 07 ff fe ef l.jal 10001b1c
|
| 2615 |
|
|
var = 13980;
|
| 2616 |
|
|
10001f64: 9c 60 36 9c l.addi r3,r0,13980
|
| 2617 |
|
|
var = var / 5;
|
| 2618 |
|
|
10001f68: 9c 80 00 05 l.addi r4,r0,5
|
| 2619 |
|
|
var = -123123415;
|
| 2620 |
|
|
var = var * 9664563;
|
| 2621 |
|
|
assert(var == (-123123415*9664563));
|
| 2622 |
|
|
|
| 2623 |
|
|
serial_putstr("3. Divide\n");
|
| 2624 |
|
|
var = 13980;
|
| 2625 |
|
|
10001f6c: d4 02 18 00 l.sw 0(r2),r3
|
| 2626 |
|
|
var = var / 5;
|
| 2627 |
|
|
10001f70: 84 62 00 00 l.lwz r3,0(r2)
|
| 2628 |
|
|
10001f74: 04 00 02 74 l.jal 10002944 <__divsi3>
|
| 2629 |
|
|
10001f78: d4 02 58 00 l.sw 0(r2),r11
|
| 2630 |
|
|
assert(var == 2796);
|
| 2631 |
|
|
10001f7c: 84 62 00 00 l.lwz r3,0(r2)
|
| 2632 |
|
|
10001f80: bc 03 0a ec l.sfeqi r3,2796
|
| 2633 |
|
|
10001f84: 10 00 00 0e l.bf 10001fbc
|
| 2634 |
|
|
10001f88: 18 60 10 00 l.movhi r3,0x1000
|
| 2635 |
|
|
10001f8c: a8 63 2d ad l.ori r3,r3,0x2dad
|
| 2636 |
|
|
10001f90: d4 01 18 00 l.sw 0(r1),r3
|
| 2637 |
|
|
10001f94: 18 60 10 00 l.movhi r3,0x1000
|
| 2638 |
|
|
10001f98: a8 63 2d 34 l.ori r3,r3,0x2d34
|
| 2639 |
|
|
10001f9c: d4 01 18 04 l.sw 4(r1),r3
|
| 2640 |
|
|
10001fa0: 9c 60 00 3f l.addi r3,r0,63
|
| 2641 |
|
|
10001fa4: d4 01 18 08 l.sw 8(r1),r3
|
| 2642 |
|
|
10001fa8: 18 60 10 00 l.movhi r3,0x1000
|
| 2643 |
|
|
10001fac: a8 63 2c 74 l.ori r3,r3,0x2c74
|
| 2644 |
|
|
10001fb0: 07 ff fe 8d l.jal 100019e4
|
| 2645 |
|
|
|
| 2646 |
|
|
}
|
| 2647 |
|
|
|
| 2648 |
|
|
static inline void exit(unsigned exit_code)
|
| 2649 |
|
|
{
|
| 2650 |
|
|
volatile register char t1 asm ("r1") = exit_code;
|
| 2651 |
|
|
10001fb4: 9c 20 00 01 l.addi r1,r0,1
|
| 2652 |
|
|
__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 2653 |
|
|
}
|
| 2654 |
|
|
else
|
| 2655 |
|
|
{
|
| 2656 |
|
|
// Invalid instruction!
|
| 2657 |
|
|
__asm__ __volatile__ ( "\t lf.add.s r0,r0,r0 ");
|
| 2658 |
|
|
10001fb8: c8 00 00 00 lf.add.s r0,r0,r0
|
| 2659 |
|
|
var = var % 100;
|
| 2660 |
|
|
10001fbc: 84 62 00 00 l.lwz r3,0(r2)
|
| 2661 |
|
|
10001fc0: 9c 80 00 64 l.addi r4,r0,100
|
| 2662 |
|
|
10001fc4: 04 00 02 7a l.jal 100029ac <__modsi3>
|
| 2663 |
|
|
10001fc8: d4 02 58 00 l.sw 0(r2),r11
|
| 2664 |
|
|
assert(var == 96);
|
| 2665 |
|
|
10001fcc: 84 62 00 00 l.lwz r3,0(r2)
|
| 2666 |
|
|
10001fd0: bc 03 00 60 l.sfeqi r3,96
|
| 2667 |
|
|
10001fd4: 10 00 00 0e l.bf 1000200c
|
| 2668 |
|
|
10001fd8: 18 60 10 00 l.movhi r3,0x1000
|
| 2669 |
|
|
10001fdc: a8 63 2d b9 l.ori r3,r3,0x2db9
|
| 2670 |
|
|
10001fe0: d4 01 18 00 l.sw 0(r1),r3
|
| 2671 |
|
|
10001fe4: 18 60 10 00 l.movhi r3,0x1000
|
| 2672 |
|
|
10001fe8: a8 63 2d 34 l.ori r3,r3,0x2d34
|
| 2673 |
|
|
10001fec: d4 01 18 04 l.sw 4(r1),r3
|
| 2674 |
|
|
10001ff0: 9c 60 00 41 l.addi r3,r0,65
|
| 2675 |
|
|
10001ff4: d4 01 18 08 l.sw 8(r1),r3
|
| 2676 |
|
|
10001ff8: 18 60 10 00 l.movhi r3,0x1000
|
| 2677 |
|
|
10001ffc: a8 63 2c 74 l.ori r3,r3,0x2c74
|
| 2678 |
|
|
10002000: 07 ff fe 79 l.jal 100019e4
|
| 2679 |
|
|
|
| 2680 |
|
|
}
|
| 2681 |
|
|
|
| 2682 |
|
|
static inline void exit(unsigned exit_code)
|
| 2683 |
|
|
{
|
| 2684 |
|
|
volatile register char t1 asm ("r1") = exit_code;
|
| 2685 |
|
|
10002004: 9c 20 00 01 l.addi r1,r0,1
|
| 2686 |
|
|
__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 2687 |
|
|
}
|
| 2688 |
|
|
else
|
| 2689 |
|
|
{
|
| 2690 |
|
|
// Invalid instruction!
|
| 2691 |
|
|
__asm__ __volatile__ ( "\t lf.add.s r0,r0,r0 ");
|
| 2692 |
|
|
10002008: c8 00 00 00 lf.add.s r0,r0,r0
|
| 2693 |
|
|
var = -1273;
|
| 2694 |
|
|
1000200c: 9c 60 fb 07 l.addi r3,r0,-1273
|
| 2695 |
|
|
var = var / 19;
|
| 2696 |
|
|
10002010: 9c 80 00 13 l.addi r4,r0,19
|
| 2697 |
|
|
var = 13980;
|
| 2698 |
|
|
var = var / 5;
|
| 2699 |
|
|
assert(var == 2796);
|
| 2700 |
|
|
var = var % 100;
|
| 2701 |
|
|
assert(var == 96);
|
| 2702 |
|
|
var = -1273;
|
| 2703 |
|
|
10002014: d4 02 18 00 l.sw 0(r2),r3
|
| 2704 |
|
|
var = var / 19;
|
| 2705 |
|
|
10002018: 84 62 00 00 l.lwz r3,0(r2)
|
| 2706 |
|
|
1000201c: 04 00 02 4a l.jal 10002944 <__divsi3>
|
| 2707 |
|
|
10002020: d4 02 58 00 l.sw 0(r2),r11
|
| 2708 |
|
|
assert(var == -67);
|
| 2709 |
|
|
10002024: 84 62 00 00 l.lwz r3,0(r2)
|
| 2710 |
|
|
10002028: bc 03 ff bd l.sfeqi r3,-67
|
| 2711 |
|
|
1000202c: 10 00 00 0e l.bf 10002064
|
| 2712 |
|
|
10002030: 18 60 10 00 l.movhi r3,0x1000
|
| 2713 |
|
|
10002034: a8 63 2d c3 l.ori r3,r3,0x2dc3
|
| 2714 |
|
|
10002038: d4 01 18 00 l.sw 0(r1),r3
|
| 2715 |
|
|
1000203c: 18 60 10 00 l.movhi r3,0x1000
|
| 2716 |
|
|
10002040: a8 63 2d 34 l.ori r3,r3,0x2d34
|
| 2717 |
|
|
10002044: d4 01 18 04 l.sw 4(r1),r3
|
| 2718 |
|
|
10002048: 9c 60 00 44 l.addi r3,r0,68
|
| 2719 |
|
|
1000204c: d4 01 18 08 l.sw 8(r1),r3
|
| 2720 |
|
|
10002050: 18 60 10 00 l.movhi r3,0x1000
|
| 2721 |
|
|
10002054: a8 63 2c 74 l.ori r3,r3,0x2c74
|
| 2722 |
|
|
10002058: 07 ff fe 63 l.jal 100019e4
|
| 2723 |
|
|
|
| 2724 |
|
|
}
|
| 2725 |
|
|
|
| 2726 |
|
|
static inline void exit(unsigned exit_code)
|
| 2727 |
|
|
{
|
| 2728 |
|
|
volatile register char t1 asm ("r1") = exit_code;
|
| 2729 |
|
|
1000205c: 9c 20 00 01 l.addi r1,r0,1
|
| 2730 |
|
|
__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 2731 |
|
|
}
|
| 2732 |
|
|
else
|
| 2733 |
|
|
{
|
| 2734 |
|
|
// Invalid instruction!
|
| 2735 |
|
|
__asm__ __volatile__ ( "\t lf.add.s r0,r0,r0 ");
|
| 2736 |
|
|
10002060: c8 00 00 00 lf.add.s r0,r0,r0
|
| 2737 |
|
|
|
| 2738 |
|
|
serial_putstr("4. Shift left\n");
|
| 2739 |
|
|
10002064: 18 60 10 00 l.movhi r3,0x1000
|
| 2740 |
|
|
var = 0x1;
|
| 2741 |
|
|
10002068: 9e 40 00 01 l.addi r18,r0,1
|
| 2742 |
|
|
assert(var == 96);
|
| 2743 |
|
|
var = -1273;
|
| 2744 |
|
|
var = var / 19;
|
| 2745 |
|
|
assert(var == -67);
|
| 2746 |
|
|
|
| 2747 |
|
|
serial_putstr("4. Shift left\n");
|
| 2748 |
|
|
1000206c: a8 63 2d ce l.ori r3,r3,0x2dce
|
| 2749 |
|
|
10002070: 07 ff fe ab l.jal 10001b1c
|
| 2750 |
|
|
var = 0x1;
|
| 2751 |
|
|
10002074: d4 02 90 00 l.sw 0(r2),r18
|
| 2752 |
|
|
var <<= 31;
|
| 2753 |
|
|
assert(var == 0x80000000);
|
| 2754 |
|
|
10002078: 18 80 80 00 l.movhi r4,0x8000
|
| 2755 |
|
|
var = var / 19;
|
| 2756 |
|
|
assert(var == -67);
|
| 2757 |
|
|
|
| 2758 |
|
|
serial_putstr("4. Shift left\n");
|
| 2759 |
|
|
var = 0x1;
|
| 2760 |
|
|
var <<= 31;
|
| 2761 |
|
|
1000207c: 84 62 00 00 l.lwz r3,0(r2)
|
| 2762 |
|
|
10002080: b8 63 00 1f l.slli r3,r3,0x1f
|
| 2763 |
|
|
10002084: d4 02 18 00 l.sw 0(r2),r3
|
| 2764 |
|
|
assert(var == 0x80000000);
|
| 2765 |
|
|
10002088: 84 62 00 00 l.lwz r3,0(r2)
|
| 2766 |
|
|
1000208c: e4 03 20 00 l.sfeq r3,r4
|
| 2767 |
|
|
10002090: 10 00 00 0e l.bf 100020c8
|
| 2768 |
|
|
10002094: 18 60 10 00 l.movhi r3,0x1000
|
| 2769 |
|
|
10002098: a8 63 2d dd l.ori r3,r3,0x2ddd
|
| 2770 |
|
|
1000209c: d4 01 18 00 l.sw 0(r1),r3
|
| 2771 |
|
|
100020a0: 18 60 10 00 l.movhi r3,0x1000
|
| 2772 |
|
|
100020a4: a8 63 2d 34 l.ori r3,r3,0x2d34
|
| 2773 |
|
|
100020a8: d4 01 18 04 l.sw 4(r1),r3
|
| 2774 |
|
|
100020ac: 9c 60 00 49 l.addi r3,r0,73
|
| 2775 |
|
|
100020b0: d4 01 18 08 l.sw 8(r1),r3
|
| 2776 |
|
|
100020b4: 18 60 10 00 l.movhi r3,0x1000
|
| 2777 |
|
|
100020b8: a8 63 2c 74 l.ori r3,r3,0x2c74
|
| 2778 |
|
|
100020bc: 07 ff fe 4a l.jal 100019e4
|
| 2779 |
|
|
|
| 2780 |
|
|
}
|
| 2781 |
|
|
|
| 2782 |
|
|
static inline void exit(unsigned exit_code)
|
| 2783 |
|
|
{
|
| 2784 |
|
|
volatile register char t1 asm ("r1") = exit_code;
|
| 2785 |
|
|
100020c0: a8 32 00 00 l.ori r1,r18,0x0
|
| 2786 |
|
|
__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 2787 |
|
|
}
|
| 2788 |
|
|
else
|
| 2789 |
|
|
{
|
| 2790 |
|
|
// Invalid instruction!
|
| 2791 |
|
|
__asm__ __volatile__ ( "\t lf.add.s r0,r0,r0 ");
|
| 2792 |
|
|
100020c4: c8 00 00 00 lf.add.s r0,r0,r0
|
| 2793 |
|
|
|
| 2794 |
|
|
serial_putstr("5. Shift right\n");
|
| 2795 |
|
|
100020c8: 18 60 10 00 l.movhi r3,0x1000
|
| 2796 |
|
|
100020cc: a8 63 2d ef l.ori r3,r3,0x2def
|
| 2797 |
|
|
100020d0: 07 ff fe 93 l.jal 10001b1c
|
| 2798 |
|
|
uvar = 0x80000000;
|
| 2799 |
|
|
100020d4: 18 60 80 00 l.movhi r3,0x8000
|
| 2800 |
|
|
uvar >>= 1;
|
| 2801 |
|
|
assert(uvar == 0x40000000);
|
| 2802 |
|
|
100020d8: 18 80 40 00 l.movhi r4,0x4000
|
| 2803 |
|
|
var = 0x1;
|
| 2804 |
|
|
var <<= 31;
|
| 2805 |
|
|
assert(var == 0x80000000);
|
| 2806 |
|
|
|
| 2807 |
|
|
serial_putstr("5. Shift right\n");
|
| 2808 |
|
|
uvar = 0x80000000;
|
| 2809 |
|
|
100020dc: d4 0e 18 00 l.sw 0(r14),r3
|
| 2810 |
|
|
uvar >>= 1;
|
| 2811 |
|
|
100020e0: 84 6e 00 00 l.lwz r3,0(r14)
|
| 2812 |
|
|
100020e4: b8 63 00 41 l.srli r3,r3,0x1
|
| 2813 |
|
|
100020e8: d4 0e 18 00 l.sw 0(r14),r3
|
| 2814 |
|
|
assert(uvar == 0x40000000);
|
| 2815 |
|
|
100020ec: 84 6e 00 00 l.lwz r3,0(r14)
|
| 2816 |
|
|
100020f0: e4 03 20 00 l.sfeq r3,r4
|
| 2817 |
|
|
100020f4: 10 00 00 0e l.bf 1000212c
|
| 2818 |
|
|
100020f8: 18 60 10 00 l.movhi r3,0x1000
|
| 2819 |
|
|
100020fc: a8 63 2d ff l.ori r3,r3,0x2dff
|
| 2820 |
|
|
10002100: d4 01 18 00 l.sw 0(r1),r3
|
| 2821 |
|
|
10002104: 18 60 10 00 l.movhi r3,0x1000
|
| 2822 |
|
|
10002108: a8 63 2d 34 l.ori r3,r3,0x2d34
|
| 2823 |
|
|
1000210c: d4 01 18 04 l.sw 4(r1),r3
|
| 2824 |
|
|
10002110: 9c 60 00 4e l.addi r3,r0,78
|
| 2825 |
|
|
10002114: d4 01 18 08 l.sw 8(r1),r3
|
| 2826 |
|
|
10002118: 18 60 10 00 l.movhi r3,0x1000
|
| 2827 |
|
|
1000211c: a8 63 2c 74 l.ori r3,r3,0x2c74
|
| 2828 |
|
|
10002120: 07 ff fe 31 l.jal 100019e4
|
| 2829 |
|
|
|
| 2830 |
|
|
}
|
| 2831 |
|
|
|
| 2832 |
|
|
static inline void exit(unsigned exit_code)
|
| 2833 |
|
|
{
|
| 2834 |
|
|
volatile register char t1 asm ("r1") = exit_code;
|
| 2835 |
|
|
10002124: 9c 20 00 01 l.addi r1,r0,1
|
| 2836 |
|
|
__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 2837 |
|
|
}
|
| 2838 |
|
|
else
|
| 2839 |
|
|
{
|
| 2840 |
|
|
// Invalid instruction!
|
| 2841 |
|
|
__asm__ __volatile__ ( "\t lf.add.s r0,r0,r0 ");
|
| 2842 |
|
|
10002128: c8 00 00 00 lf.add.s r0,r0,r0
|
| 2843 |
|
|
uvar >>= 30;
|
| 2844 |
|
|
1000212c: 84 6e 00 00 l.lwz r3,0(r14)
|
| 2845 |
|
|
10002130: b8 63 00 5e l.srli r3,r3,0x1e
|
| 2846 |
|
|
10002134: d4 0e 18 00 l.sw 0(r14),r3
|
| 2847 |
|
|
assert(uvar == 0x00000001);
|
| 2848 |
|
|
10002138: 84 6e 00 00 l.lwz r3,0(r14)
|
| 2849 |
|
|
1000213c: bc 03 00 01 l.sfeqi r3,1
|
| 2850 |
|
|
10002140: 10 00 00 0e l.bf 10002178
|
| 2851 |
|
|
10002144: 18 60 10 00 l.movhi r3,0x1000
|
| 2852 |
|
|
10002148: a8 63 2e 12 l.ori r3,r3,0x2e12
|
| 2853 |
|
|
1000214c: d4 01 18 00 l.sw 0(r1),r3
|
| 2854 |
|
|
10002150: 18 60 10 00 l.movhi r3,0x1000
|
| 2855 |
|
|
10002154: a8 63 2d 34 l.ori r3,r3,0x2d34
|
| 2856 |
|
|
10002158: d4 01 18 04 l.sw 4(r1),r3
|
| 2857 |
|
|
1000215c: 9c 60 00 50 l.addi r3,r0,80
|
| 2858 |
|
|
10002160: d4 01 18 08 l.sw 8(r1),r3
|
| 2859 |
|
|
10002164: 18 60 10 00 l.movhi r3,0x1000
|
| 2860 |
|
|
10002168: a8 63 2c 74 l.ori r3,r3,0x2c74
|
| 2861 |
|
|
1000216c: 07 ff fe 1e l.jal 100019e4
|
| 2862 |
|
|
|
| 2863 |
|
|
}
|
| 2864 |
|
|
|
| 2865 |
|
|
static inline void exit(unsigned exit_code)
|
| 2866 |
|
|
{
|
| 2867 |
|
|
volatile register char t1 asm ("r1") = exit_code;
|
| 2868 |
|
|
10002170: 9c 20 00 01 l.addi r1,r0,1
|
| 2869 |
|
|
__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 2870 |
|
|
}
|
| 2871 |
|
|
else
|
| 2872 |
|
|
{
|
| 2873 |
|
|
// Invalid instruction!
|
| 2874 |
|
|
__asm__ __volatile__ ( "\t lf.add.s r0,r0,r0 ");
|
| 2875 |
|
|
10002174: c8 00 00 00 lf.add.s r0,r0,r0
|
| 2876 |
|
|
|
| 2877 |
|
|
serial_putstr("6. Shift right arithmetic\n");
|
| 2878 |
|
|
10002178: 18 60 10 00 l.movhi r3,0x1000
|
| 2879 |
|
|
1000217c: a8 63 2e 25 l.ori r3,r3,0x2e25
|
| 2880 |
|
|
10002180: 07 ff fe 67 l.jal 10001b1c
|
| 2881 |
|
|
var = 0x80000000;
|
| 2882 |
|
|
10002184: 18 60 80 00 l.movhi r3,0x8000
|
| 2883 |
|
|
var >>= 1;
|
| 2884 |
|
|
assert(var == 0xC0000000);
|
| 2885 |
|
|
10002188: 18 80 c0 00 l.movhi r4,0xc000
|
| 2886 |
|
|
assert(uvar == 0x40000000);
|
| 2887 |
|
|
uvar >>= 30;
|
| 2888 |
|
|
assert(uvar == 0x00000001);
|
| 2889 |
|
|
|
| 2890 |
|
|
serial_putstr("6. Shift right arithmetic\n");
|
| 2891 |
|
|
var = 0x80000000;
|
| 2892 |
|
|
1000218c: d4 02 18 00 l.sw 0(r2),r3
|
| 2893 |
|
|
var >>= 1;
|
| 2894 |
|
|
10002190: 84 62 00 00 l.lwz r3,0(r2)
|
| 2895 |
|
|
10002194: b8 63 00 81 l.srai r3,r3,0x1
|
| 2896 |
|
|
10002198: d4 02 18 00 l.sw 0(r2),r3
|
| 2897 |
|
|
assert(var == 0xC0000000);
|
| 2898 |
|
|
1000219c: 84 62 00 00 l.lwz r3,0(r2)
|
| 2899 |
|
|
100021a0: e4 03 20 00 l.sfeq r3,r4
|
| 2900 |
|
|
100021a4: 10 00 00 0e l.bf 100021dc
|
| 2901 |
|
|
100021a8: 18 60 10 00 l.movhi r3,0x1000
|
| 2902 |
|
|
100021ac: a8 63 2e 40 l.ori r3,r3,0x2e40
|
| 2903 |
|
|
100021b0: d4 01 18 00 l.sw 0(r1),r3
|
| 2904 |
|
|
100021b4: 18 60 10 00 l.movhi r3,0x1000
|
| 2905 |
|
|
100021b8: a8 63 2d 34 l.ori r3,r3,0x2d34
|
| 2906 |
|
|
100021bc: d4 01 18 04 l.sw 4(r1),r3
|
| 2907 |
|
|
100021c0: 9c 60 00 55 l.addi r3,r0,85
|
| 2908 |
|
|
100021c4: d4 01 18 08 l.sw 8(r1),r3
|
| 2909 |
|
|
100021c8: 18 60 10 00 l.movhi r3,0x1000
|
| 2910 |
|
|
100021cc: a8 63 2c 74 l.ori r3,r3,0x2c74
|
| 2911 |
|
|
100021d0: 07 ff fe 05 l.jal 100019e4
|
| 2912 |
|
|
|
| 2913 |
|
|
}
|
| 2914 |
|
|
|
| 2915 |
|
|
static inline void exit(unsigned exit_code)
|
| 2916 |
|
|
{
|
| 2917 |
|
|
volatile register char t1 asm ("r1") = exit_code;
|
| 2918 |
|
|
100021d4: 9c 20 00 01 l.addi r1,r0,1
|
| 2919 |
|
|
__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 2920 |
|
|
}
|
| 2921 |
|
|
else
|
| 2922 |
|
|
{
|
| 2923 |
|
|
// Invalid instruction!
|
| 2924 |
|
|
__asm__ __volatile__ ( "\t lf.add.s r0,r0,r0 ");
|
| 2925 |
|
|
100021d8: c8 00 00 00 lf.add.s r0,r0,r0
|
| 2926 |
|
|
|
| 2927 |
|
|
serial_putstr("7. Signed comparision\n");
|
| 2928 |
|
|
100021dc: 18 60 10 00 l.movhi r3,0x1000
|
| 2929 |
|
|
100021e0: a8 63 2e 52 l.ori r3,r3,0x2e52
|
| 2930 |
|
|
100021e4: 07 ff fe 4e l.jal 10001b1c
|
| 2931 |
|
|
var = -1;
|
| 2932 |
|
|
100021e8: 9c 60 ff ff l.addi r3,r0,-1
|
| 2933 |
|
|
100021ec: d4 02 18 00 l.sw 0(r2),r3
|
| 2934 |
|
|
assert(var < 1);
|
| 2935 |
|
|
100021f0: 84 62 00 00 l.lwz r3,0(r2)
|
| 2936 |
|
|
100021f4: bd a3 00 00 l.sflesi r3,0
|
| 2937 |
|
|
100021f8: 10 00 00 0e l.bf 10002230
|
| 2938 |
|
|
100021fc: 18 60 10 00 l.movhi r3,0x1000
|
| 2939 |
|
|
10002200: a8 63 2e 69 l.ori r3,r3,0x2e69
|
| 2940 |
|
|
10002204: d4 01 18 00 l.sw 0(r1),r3
|
| 2941 |
|
|
10002208: 18 60 10 00 l.movhi r3,0x1000
|
| 2942 |
|
|
1000220c: a8 63 2d 34 l.ori r3,r3,0x2d34
|
| 2943 |
|
|
10002210: d4 01 18 04 l.sw 4(r1),r3
|
| 2944 |
|
|
10002214: 9c 60 00 59 l.addi r3,r0,89
|
| 2945 |
|
|
10002218: d4 01 18 08 l.sw 8(r1),r3
|
| 2946 |
|
|
1000221c: 18 60 10 00 l.movhi r3,0x1000
|
| 2947 |
|
|
10002220: a8 63 2c 74 l.ori r3,r3,0x2c74
|
| 2948 |
|
|
10002224: 07 ff fd f0 l.jal 100019e4
|
| 2949 |
|
|
|
| 2950 |
|
|
}
|
| 2951 |
|
|
|
| 2952 |
|
|
static inline void exit(unsigned exit_code)
|
| 2953 |
|
|
{
|
| 2954 |
|
|
volatile register char t1 asm ("r1") = exit_code;
|
| 2955 |
|
|
10002228: 9c 20 00 01 l.addi r1,r0,1
|
| 2956 |
|
|
__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 2957 |
|
|
}
|
| 2958 |
|
|
else
|
| 2959 |
|
|
{
|
| 2960 |
|
|
// Invalid instruction!
|
| 2961 |
|
|
__asm__ __volatile__ ( "\t lf.add.s r0,r0,r0 ");
|
| 2962 |
|
|
1000222c: c8 00 00 00 lf.add.s r0,r0,r0
|
| 2963 |
|
|
x = 10;
|
| 2964 |
|
|
assert(var < x);
|
| 2965 |
|
|
10002230: 84 62 00 00 l.lwz r3,0(r2)
|
| 2966 |
|
|
10002234: bd a3 00 09 l.sflesi r3,9
|
| 2967 |
|
|
10002238: 0c 00 01 95 l.bnf 1000288c
|
| 2968 |
|
|
assert(!(var > x));
|
| 2969 |
|
|
1000223c: 84 62 00 00 l.lwz r3,0(r2)
|
| 2970 |
|
|
10002240: bd a3 00 0a l.sflesi r3,10
|
| 2971 |
|
|
10002244: 0c 00 01 84 l.bnf 10002854
|
| 2972 |
|
|
x = -3;
|
| 2973 |
|
|
assert(var > x);
|
| 2974 |
|
|
10002248: 84 62 00 00 l.lwz r3,0(r2)
|
| 2975 |
|
|
1000224c: bd 63 ff fe l.sfgesi r3,-2
|
| 2976 |
|
|
10002250: 0c 00 01 73 l.bnf 1000281c
|
| 2977 |
|
|
assert(x <= var);
|
| 2978 |
|
|
10002254: 84 42 00 00 l.lwz r2,0(r2)
|
| 2979 |
|
|
10002258: bd 62 ff fd l.sfgesi r2,-3
|
| 2980 |
|
|
1000225c: 0c 00 01 62 l.bnf 100027e4
|
| 2981 |
|
|
|
| 2982 |
|
|
serial_putstr("8. Word access\n");
|
| 2983 |
|
|
10002260: 18 60 10 00 l.movhi r3,0x1000
|
| 2984 |
|
|
uvar = 0x12345678;
|
| 2985 |
|
|
10002264: 18 40 12 34 l.movhi r2,0x1234
|
| 2986 |
|
|
assert(!(var > x));
|
| 2987 |
|
|
x = -3;
|
| 2988 |
|
|
assert(var > x);
|
| 2989 |
|
|
assert(x <= var);
|
| 2990 |
|
|
|
| 2991 |
|
|
serial_putstr("8. Word access\n");
|
| 2992 |
|
|
10002268: a8 63 2e 95 l.ori r3,r3,0x2e95
|
| 2993 |
|
|
uvar = 0x12345678;
|
| 2994 |
|
|
1000226c: a8 42 56 78 l.ori r2,r2,0x5678
|
| 2995 |
|
|
assert(!(var > x));
|
| 2996 |
|
|
x = -3;
|
| 2997 |
|
|
assert(var > x);
|
| 2998 |
|
|
assert(x <= var);
|
| 2999 |
|
|
|
| 3000 |
|
|
serial_putstr("8. Word access\n");
|
| 3001 |
|
|
10002270: 07 ff fe 2b l.jal 10001b1c
|
| 3002 |
|
|
uvar = 0x12345678;
|
| 3003 |
|
|
assert(uvar == 0x12345678);
|
| 3004 |
|
|
10002274: 18 60 12 34 l.movhi r3,0x1234
|
| 3005 |
|
|
x = -3;
|
| 3006 |
|
|
assert(var > x);
|
| 3007 |
|
|
assert(x <= var);
|
| 3008 |
|
|
|
| 3009 |
|
|
serial_putstr("8. Word access\n");
|
| 3010 |
|
|
uvar = 0x12345678;
|
| 3011 |
|
|
10002278: d4 0e 10 00 l.sw 0(r14),r2
|
| 3012 |
|
|
assert(uvar == 0x12345678);
|
| 3013 |
|
|
1000227c: a8 63 56 78 l.ori r3,r3,0x5678
|
| 3014 |
|
|
10002280: 84 4e 00 00 l.lwz r2,0(r14)
|
| 3015 |
|
|
10002284: e4 02 18 00 l.sfeq r2,r3
|
| 3016 |
|
|
10002288: 10 00 00 0e l.bf 100022c0
|
| 3017 |
|
|
1000228c: 18 40 10 00 l.movhi r2,0x1000
|
| 3018 |
|
|
10002290: 18 60 10 00 l.movhi r3,0x1000
|
| 3019 |
|
|
10002294: a8 42 2e a5 l.ori r2,r2,0x2ea5
|
| 3020 |
|
|
10002298: a8 63 2c 74 l.ori r3,r3,0x2c74
|
| 3021 |
|
|
1000229c: d4 01 10 00 l.sw 0(r1),r2
|
| 3022 |
|
|
100022a0: 18 40 10 00 l.movhi r2,0x1000
|
| 3023 |
|
|
100022a4: a8 42 2d 34 l.ori r2,r2,0x2d34
|
| 3024 |
|
|
100022a8: d4 01 10 04 l.sw 4(r1),r2
|
| 3025 |
|
|
100022ac: 9c 40 00 63 l.addi r2,r0,99
|
| 3026 |
|
|
100022b0: d4 01 10 08 l.sw 8(r1),r2
|
| 3027 |
|
|
100022b4: 07 ff fd cc l.jal 100019e4
|
| 3028 |
|
|
|
| 3029 |
|
|
}
|
| 3030 |
|
|
|
| 3031 |
|
|
static inline void exit(unsigned exit_code)
|
| 3032 |
|
|
{
|
| 3033 |
|
|
volatile register char t1 asm ("r1") = exit_code;
|
| 3034 |
|
|
100022b8: 9c 20 00 01 l.addi r1,r0,1
|
| 3035 |
|
|
__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 3036 |
|
|
}
|
| 3037 |
|
|
else
|
| 3038 |
|
|
{
|
| 3039 |
|
|
// Invalid instruction!
|
| 3040 |
|
|
__asm__ __volatile__ ( "\t lf.add.s r0,r0,r0 ");
|
| 3041 |
|
|
100022bc: c8 00 00 00 lf.add.s r0,r0,r0
|
| 3042 |
|
|
sw = uvar;
|
| 3043 |
|
|
100022c0: 84 4e 00 00 l.lwz r2,0(r14)
|
| 3044 |
|
|
assert(sw == 0x5678);
|
| 3045 |
|
|
100022c4: a4 42 ff ff l.andi r2,r2,0xffff
|
| 3046 |
|
|
100022c8: bc 02 56 78 l.sfeqi r2,22136
|
| 3047 |
|
|
100022cc: 10 00 00 0e l.bf 10002304
|
| 3048 |
|
|
100022d0: 18 40 10 00 l.movhi r2,0x1000
|
| 3049 |
|
|
100022d4: 18 60 10 00 l.movhi r3,0x1000
|
| 3050 |
|
|
100022d8: a8 42 2e b8 l.ori r2,r2,0x2eb8
|
| 3051 |
|
|
100022dc: a8 63 2c 74 l.ori r3,r3,0x2c74
|
| 3052 |
|
|
100022e0: d4 01 10 00 l.sw 0(r1),r2
|
| 3053 |
|
|
100022e4: 18 40 10 00 l.movhi r2,0x1000
|
| 3054 |
|
|
100022e8: a8 42 2d 34 l.ori r2,r2,0x2d34
|
| 3055 |
|
|
100022ec: d4 01 10 04 l.sw 4(r1),r2
|
| 3056 |
|
|
100022f0: 9c 40 00 65 l.addi r2,r0,101
|
| 3057 |
|
|
100022f4: d4 01 10 08 l.sw 8(r1),r2
|
| 3058 |
|
|
100022f8: 07 ff fd bb l.jal 100019e4
|
| 3059 |
|
|
|
| 3060 |
|
|
}
|
| 3061 |
|
|
|
| 3062 |
|
|
static inline void exit(unsigned exit_code)
|
| 3063 |
|
|
{
|
| 3064 |
|
|
volatile register char t1 asm ("r1") = exit_code;
|
| 3065 |
|
|
100022fc: 9c 20 00 01 l.addi r1,r0,1
|
| 3066 |
|
|
__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 3067 |
|
|
}
|
| 3068 |
|
|
else
|
| 3069 |
|
|
{
|
| 3070 |
|
|
// Invalid instruction!
|
| 3071 |
|
|
__asm__ __volatile__ ( "\t lf.add.s r0,r0,r0 ");
|
| 3072 |
|
|
10002300: c8 00 00 00 lf.add.s r0,r0,r0
|
| 3073 |
|
|
psw = &uvar;
|
| 3074 |
|
|
assert(*psw++ == 0x1234);
|
| 3075 |
|
|
10002304: 94 4e 00 00 l.lhz r2,0(r14)
|
| 3076 |
|
|
10002308: bc 02 12 34 l.sfeqi r2,4660
|
| 3077 |
|
|
1000230c: 10 00 00 0e l.bf 10002344
|
| 3078 |
|
|
10002310: 18 40 10 00 l.movhi r2,0x1000
|
| 3079 |
|
|
10002314: 18 60 10 00 l.movhi r3,0x1000
|
| 3080 |
|
|
10002318: a8 42 2e c5 l.ori r2,r2,0x2ec5
|
| 3081 |
|
|
1000231c: a8 63 2c 74 l.ori r3,r3,0x2c74
|
| 3082 |
|
|
10002320: d4 01 10 00 l.sw 0(r1),r2
|
| 3083 |
|
|
10002324: 18 40 10 00 l.movhi r2,0x1000
|
| 3084 |
|
|
10002328: a8 42 2d 34 l.ori r2,r2,0x2d34
|
| 3085 |
|
|
1000232c: d4 01 10 04 l.sw 4(r1),r2
|
| 3086 |
|
|
10002330: 9c 40 00 67 l.addi r2,r0,103
|
| 3087 |
|
|
10002334: d4 01 10 08 l.sw 8(r1),r2
|
| 3088 |
|
|
10002338: 07 ff fd ab l.jal 100019e4
|
| 3089 |
|
|
|
| 3090 |
|
|
}
|
| 3091 |
|
|
|
| 3092 |
|
|
static inline void exit(unsigned exit_code)
|
| 3093 |
|
|
{
|
| 3094 |
|
|
volatile register char t1 asm ("r1") = exit_code;
|
| 3095 |
|
|
1000233c: 9c 20 00 01 l.addi r1,r0,1
|
| 3096 |
|
|
__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 3097 |
|
|
}
|
| 3098 |
|
|
else
|
| 3099 |
|
|
{
|
| 3100 |
|
|
// Invalid instruction!
|
| 3101 |
|
|
__asm__ __volatile__ ( "\t lf.add.s r0,r0,r0 ");
|
| 3102 |
|
|
10002340: c8 00 00 00 lf.add.s r0,r0,r0
|
| 3103 |
|
|
assert(*psw++ == 0x5678);
|
| 3104 |
|
|
10002344: 94 4e 00 02 l.lhz r2,2(r14)
|
| 3105 |
|
|
10002348: bc 02 56 78 l.sfeqi r2,22136
|
| 3106 |
|
|
1000234c: 10 00 01 1f l.bf 100027c8
|
| 3107 |
|
|
10002350: 9c 60 00 68 l.addi r3,r0,104
|
| 3108 |
|
|
10002354: 1a 40 10 00 l.movhi r18,0x1000
|
| 3109 |
|
|
10002358: 18 40 10 00 l.movhi r2,0x1000
|
| 3110 |
|
|
1000235c: d4 01 18 08 l.sw 8(r1),r3
|
| 3111 |
|
|
10002360: aa 52 2e d6 l.ori r18,r18,0x2ed6
|
| 3112 |
|
|
10002364: a8 42 2d 34 l.ori r2,r2,0x2d34
|
| 3113 |
|
|
10002368: 18 60 10 00 l.movhi r3,0x1000
|
| 3114 |
|
|
1000236c: d4 01 90 00 l.sw 0(r1),r18
|
| 3115 |
|
|
10002370: d4 01 10 04 l.sw 4(r1),r2
|
| 3116 |
|
|
10002374: a8 63 2c 74 l.ori r3,r3,0x2c74
|
| 3117 |
|
|
10002378: 07 ff fd 9b l.jal 100019e4
|
| 3118 |
|
|
|
| 3119 |
|
|
}
|
| 3120 |
|
|
|
| 3121 |
|
|
static inline void exit(unsigned exit_code)
|
| 3122 |
|
|
{
|
| 3123 |
|
|
volatile register char t1 asm ("r1") = exit_code;
|
| 3124 |
|
|
1000237c: 9c 20 00 01 l.addi r1,r0,1
|
| 3125 |
|
|
__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 3126 |
|
|
}
|
| 3127 |
|
|
else
|
| 3128 |
|
|
{
|
| 3129 |
|
|
// Invalid instruction!
|
| 3130 |
|
|
__asm__ __volatile__ ( "\t lf.add.s r0,r0,r0 ");
|
| 3131 |
|
|
10002380: c8 00 00 00 lf.add.s r0,r0,r0
|
| 3132 |
|
|
10002384: 94 6e 00 02 l.lhz r3,2(r14)
|
| 3133 |
|
|
psw = &uvar;
|
| 3134 |
|
|
*psw = 0xcafe;
|
| 3135 |
|
|
10002388: 9c 80 ca fe l.addi r4,r0,-13570
|
| 3136 |
|
|
assert(*psw++ == 0xcafe);
|
| 3137 |
|
|
assert(*psw++ == 0x5678);
|
| 3138 |
|
|
1000238c: bc 03 56 78 l.sfeqi r3,22136
|
| 3139 |
|
|
assert(sw == 0x5678);
|
| 3140 |
|
|
psw = &uvar;
|
| 3141 |
|
|
assert(*psw++ == 0x1234);
|
| 3142 |
|
|
assert(*psw++ == 0x5678);
|
| 3143 |
|
|
psw = &uvar;
|
| 3144 |
|
|
*psw = 0xcafe;
|
| 3145 |
|
|
10002390: dc 0e 20 00 l.sh 0(r14),r4
|
| 3146 |
|
|
assert(*psw++ == 0xcafe);
|
| 3147 |
|
|
assert(*psw++ == 0x5678);
|
| 3148 |
|
|
10002394: 10 00 01 11 l.bf 100027d8
|
| 3149 |
|
|
10002398: 9c 60 00 6c l.addi r3,r0,108
|
| 3150 |
|
|
1000239c: d4 01 90 00 l.sw 0(r1),r18
|
| 3151 |
|
|
100023a0: d4 01 18 08 l.sw 8(r1),r3
|
| 3152 |
|
|
100023a4: 18 60 10 00 l.movhi r3,0x1000
|
| 3153 |
|
|
100023a8: d4 01 10 04 l.sw 4(r1),r2
|
| 3154 |
|
|
100023ac: a8 63 2c 74 l.ori r3,r3,0x2c74
|
| 3155 |
|
|
100023b0: 07 ff fd 8d l.jal 100019e4
|
| 3156 |
|
|
|
| 3157 |
|
|
}
|
| 3158 |
|
|
|
| 3159 |
|
|
static inline void exit(unsigned exit_code)
|
| 3160 |
|
|
{
|
| 3161 |
|
|
volatile register char t1 asm ("r1") = exit_code;
|
| 3162 |
|
|
100023b4: 9c 20 00 01 l.addi r1,r0,1
|
| 3163 |
|
|
__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 3164 |
|
|
}
|
| 3165 |
|
|
else
|
| 3166 |
|
|
{
|
| 3167 |
|
|
// Invalid instruction!
|
| 3168 |
|
|
__asm__ __volatile__ ( "\t lf.add.s r0,r0,r0 ");
|
| 3169 |
|
|
100023b8: c8 00 00 00 lf.add.s r0,r0,r0
|
| 3170 |
|
|
psw = &uvar;
|
| 3171 |
|
|
*(++psw) = 0xbabe;
|
| 3172 |
|
|
100023bc: 9c 80 ba be l.addi r4,r0,-17730
|
| 3173 |
|
|
100023c0: 94 6e 00 00 l.lhz r3,0(r14)
|
| 3174 |
|
|
100023c4: dc 0e 20 02 l.sh 2(r14),r4
|
| 3175 |
|
|
psw = &uvar;
|
| 3176 |
|
|
assert(*psw++ == 0xcafe);
|
| 3177 |
|
|
100023c8: a8 80 ca fe l.ori r4,r0,0xcafe
|
| 3178 |
|
|
100023cc: e4 23 20 00 l.sfne r3,r4
|
| 3179 |
|
|
100023d0: 0c 00 00 1b l.bnf 1000243c
|
| 3180 |
|
|
100023d4: 18 60 10 00 l.movhi r3,0x1000
|
| 3181 |
|
|
100023d8: d4 01 10 04 l.sw 4(r1),r2
|
| 3182 |
|
|
100023dc: a8 63 2e e7 l.ori r3,r3,0x2ee7
|
| 3183 |
|
|
100023e0: d4 01 18 00 l.sw 0(r1),r3
|
| 3184 |
|
|
100023e4: 9c 60 00 70 l.addi r3,r0,112
|
| 3185 |
|
|
100023e8: d4 01 18 08 l.sw 8(r1),r3
|
| 3186 |
|
|
100023ec: 18 60 10 00 l.movhi r3,0x1000
|
| 3187 |
|
|
100023f0: a8 63 2c 74 l.ori r3,r3,0x2c74
|
| 3188 |
|
|
100023f4: 07 ff fd 7c l.jal 100019e4
|
| 3189 |
|
|
|
| 3190 |
|
|
}
|
| 3191 |
|
|
|
| 3192 |
|
|
static inline void exit(unsigned exit_code)
|
| 3193 |
|
|
{
|
| 3194 |
|
|
volatile register char t1 asm ("r1") = exit_code;
|
| 3195 |
|
|
100023f8: 9c 20 00 01 l.addi r1,r0,1
|
| 3196 |
|
|
__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 3197 |
|
|
}
|
| 3198 |
|
|
else
|
| 3199 |
|
|
{
|
| 3200 |
|
|
// Invalid instruction!
|
| 3201 |
|
|
__asm__ __volatile__ ( "\t lf.add.s r0,r0,r0 ");
|
| 3202 |
|
|
100023fc: c8 00 00 00 lf.add.s r0,r0,r0
|
| 3203 |
|
|
assert(*psw++ == 0xbabe);
|
| 3204 |
|
|
10002400: a8 80 ba be l.ori r4,r0,0xbabe
|
| 3205 |
|
|
10002404: 94 6e 00 02 l.lhz r3,2(r14)
|
| 3206 |
|
|
10002408: e4 03 20 00 l.sfeq r3,r4
|
| 3207 |
|
|
1000240c: 10 00 00 0c l.bf 1000243c
|
| 3208 |
|
|
10002410: 18 60 10 00 l.movhi r3,0x1000
|
| 3209 |
|
|
10002414: d4 01 10 04 l.sw 4(r1),r2
|
| 3210 |
|
|
10002418: a8 63 2e f8 l.ori r3,r3,0x2ef8
|
| 3211 |
|
|
1000241c: 9c 40 00 71 l.addi r2,r0,113
|
| 3212 |
|
|
10002420: d4 01 18 00 l.sw 0(r1),r3
|
| 3213 |
|
|
10002424: 18 60 10 00 l.movhi r3,0x1000
|
| 3214 |
|
|
10002428: d4 01 10 08 l.sw 8(r1),r2
|
| 3215 |
|
|
1000242c: a8 63 2c 74 l.ori r3,r3,0x2c74
|
| 3216 |
|
|
10002430: 07 ff fd 6d l.jal 100019e4
|
| 3217 |
|
|
|
| 3218 |
|
|
}
|
| 3219 |
|
|
|
| 3220 |
|
|
static inline void exit(unsigned exit_code)
|
| 3221 |
|
|
{
|
| 3222 |
|
|
volatile register char t1 asm ("r1") = exit_code;
|
| 3223 |
|
|
10002434: 9c 20 00 01 l.addi r1,r0,1
|
| 3224 |
|
|
__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 3225 |
|
|
}
|
| 3226 |
|
|
else
|
| 3227 |
|
|
{
|
| 3228 |
|
|
// Invalid instruction!
|
| 3229 |
|
|
__asm__ __volatile__ ( "\t lf.add.s r0,r0,r0 ");
|
| 3230 |
|
|
10002438: c8 00 00 00 lf.add.s r0,r0,r0
|
| 3231 |
|
|
|
| 3232 |
|
|
serial_putstr("9. Byte access\n");
|
| 3233 |
|
|
1000243c: 18 60 10 00 l.movhi r3,0x1000
|
| 3234 |
|
|
uvar = 0x12345678;
|
| 3235 |
|
|
10002440: 18 40 12 34 l.movhi r2,0x1234
|
| 3236 |
|
|
*(++psw) = 0xbabe;
|
| 3237 |
|
|
psw = &uvar;
|
| 3238 |
|
|
assert(*psw++ == 0xcafe);
|
| 3239 |
|
|
assert(*psw++ == 0xbabe);
|
| 3240 |
|
|
|
| 3241 |
|
|
serial_putstr("9. Byte access\n");
|
| 3242 |
|
|
10002444: a8 63 2f 09 l.ori r3,r3,0x2f09
|
| 3243 |
|
|
uvar = 0x12345678;
|
| 3244 |
|
|
10002448: a8 42 56 78 l.ori r2,r2,0x5678
|
| 3245 |
|
|
*(++psw) = 0xbabe;
|
| 3246 |
|
|
psw = &uvar;
|
| 3247 |
|
|
assert(*psw++ == 0xcafe);
|
| 3248 |
|
|
assert(*psw++ == 0xbabe);
|
| 3249 |
|
|
|
| 3250 |
|
|
serial_putstr("9. Byte access\n");
|
| 3251 |
|
|
1000244c: 07 ff fd b4 l.jal 10001b1c
|
| 3252 |
|
|
uvar = 0x12345678;
|
| 3253 |
|
|
assert(uvar == 0x12345678);
|
| 3254 |
|
|
10002450: 18 60 12 34 l.movhi r3,0x1234
|
| 3255 |
|
|
psw = &uvar;
|
| 3256 |
|
|
assert(*psw++ == 0xcafe);
|
| 3257 |
|
|
assert(*psw++ == 0xbabe);
|
| 3258 |
|
|
|
| 3259 |
|
|
serial_putstr("9. Byte access\n");
|
| 3260 |
|
|
uvar = 0x12345678;
|
| 3261 |
|
|
10002454: d4 0e 10 00 l.sw 0(r14),r2
|
| 3262 |
|
|
assert(uvar == 0x12345678);
|
| 3263 |
|
|
10002458: a8 63 56 78 l.ori r3,r3,0x5678
|
| 3264 |
|
|
1000245c: 84 4e 00 00 l.lwz r2,0(r14)
|
| 3265 |
|
|
10002460: e4 02 18 00 l.sfeq r2,r3
|
| 3266 |
|
|
10002464: 10 00 00 0e l.bf 1000249c
|
| 3267 |
|
|
10002468: 18 40 10 00 l.movhi r2,0x1000
|
| 3268 |
|
|
1000246c: 18 60 10 00 l.movhi r3,0x1000
|
| 3269 |
|
|
10002470: a8 42 2e a5 l.ori r2,r2,0x2ea5
|
| 3270 |
|
|
10002474: a8 63 2c 74 l.ori r3,r3,0x2c74
|
| 3271 |
|
|
10002478: d4 01 10 00 l.sw 0(r1),r2
|
| 3272 |
|
|
1000247c: 18 40 10 00 l.movhi r2,0x1000
|
| 3273 |
|
|
10002480: a8 42 2d 34 l.ori r2,r2,0x2d34
|
| 3274 |
|
|
10002484: d4 01 10 04 l.sw 4(r1),r2
|
| 3275 |
|
|
10002488: 9c 40 00 75 l.addi r2,r0,117
|
| 3276 |
|
|
1000248c: d4 01 10 08 l.sw 8(r1),r2
|
| 3277 |
|
|
10002490: 07 ff fd 55 l.jal 100019e4
|
| 3278 |
|
|
|
| 3279 |
|
|
}
|
| 3280 |
|
|
|
| 3281 |
|
|
static inline void exit(unsigned exit_code)
|
| 3282 |
|
|
{
|
| 3283 |
|
|
volatile register char t1 asm ("r1") = exit_code;
|
| 3284 |
|
|
10002494: 9c 20 00 01 l.addi r1,r0,1
|
| 3285 |
|
|
__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 3286 |
|
|
}
|
| 3287 |
|
|
else
|
| 3288 |
|
|
{
|
| 3289 |
|
|
// Invalid instruction!
|
| 3290 |
|
|
__asm__ __volatile__ ( "\t lf.add.s r0,r0,r0 ");
|
| 3291 |
|
|
10002498: c8 00 00 00 lf.add.s r0,r0,r0
|
| 3292 |
|
|
sb = uvar;
|
| 3293 |
|
|
1000249c: 84 4e 00 00 l.lwz r2,0(r14)
|
| 3294 |
|
|
assert(sb == 0x78);
|
| 3295 |
|
|
100024a0: a4 42 00 ff l.andi r2,r2,0xff
|
| 3296 |
|
|
100024a4: bc 02 00 78 l.sfeqi r2,120
|
| 3297 |
|
|
100024a8: 10 00 00 0e l.bf 100024e0
|
| 3298 |
|
|
100024ac: 18 40 10 00 l.movhi r2,0x1000
|
| 3299 |
|
|
100024b0: 18 60 10 00 l.movhi r3,0x1000
|
| 3300 |
|
|
100024b4: a8 42 2f 19 l.ori r2,r2,0x2f19
|
| 3301 |
|
|
100024b8: a8 63 2c 74 l.ori r3,r3,0x2c74
|
| 3302 |
|
|
100024bc: d4 01 10 00 l.sw 0(r1),r2
|
| 3303 |
|
|
100024c0: 18 40 10 00 l.movhi r2,0x1000
|
| 3304 |
|
|
100024c4: a8 42 2d 34 l.ori r2,r2,0x2d34
|
| 3305 |
|
|
100024c8: d4 01 10 04 l.sw 4(r1),r2
|
| 3306 |
|
|
100024cc: 9c 40 00 77 l.addi r2,r0,119
|
| 3307 |
|
|
100024d0: d4 01 10 08 l.sw 8(r1),r2
|
| 3308 |
|
|
100024d4: 07 ff fd 44 l.jal 100019e4
|
| 3309 |
|
|
|
| 3310 |
|
|
}
|
| 3311 |
|
|
|
| 3312 |
|
|
static inline void exit(unsigned exit_code)
|
| 3313 |
|
|
{
|
| 3314 |
|
|
volatile register char t1 asm ("r1") = exit_code;
|
| 3315 |
|
|
100024d8: 9c 20 00 01 l.addi r1,r0,1
|
| 3316 |
|
|
__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 3317 |
|
|
}
|
| 3318 |
|
|
else
|
| 3319 |
|
|
{
|
| 3320 |
|
|
// Invalid instruction!
|
| 3321 |
|
|
__asm__ __volatile__ ( "\t lf.add.s r0,r0,r0 ");
|
| 3322 |
|
|
100024dc: c8 00 00 00 lf.add.s r0,r0,r0
|
| 3323 |
|
|
psb = &uvar;
|
| 3324 |
|
|
assert(*psb++ == 0x12);
|
| 3325 |
|
|
100024e0: 8c 4e 00 00 l.lbz r2,0(r14)
|
| 3326 |
|
|
100024e4: bc 02 00 12 l.sfeqi r2,18
|
| 3327 |
|
|
100024e8: 10 00 00 0e l.bf 10002520
|
| 3328 |
|
|
100024ec: 18 40 10 00 l.movhi r2,0x1000
|
| 3329 |
|
|
100024f0: 18 60 10 00 l.movhi r3,0x1000
|
| 3330 |
|
|
100024f4: a8 42 2f 24 l.ori r2,r2,0x2f24
|
| 3331 |
|
|
100024f8: a8 63 2c 74 l.ori r3,r3,0x2c74
|
| 3332 |
|
|
100024fc: d4 01 10 00 l.sw 0(r1),r2
|
| 3333 |
|
|
10002500: 18 40 10 00 l.movhi r2,0x1000
|
| 3334 |
|
|
10002504: a8 42 2d 34 l.ori r2,r2,0x2d34
|
| 3335 |
|
|
10002508: d4 01 10 04 l.sw 4(r1),r2
|
| 3336 |
|
|
1000250c: 9c 40 00 79 l.addi r2,r0,121
|
| 3337 |
|
|
10002510: d4 01 10 08 l.sw 8(r1),r2
|
| 3338 |
|
|
10002514: 07 ff fd 34 l.jal 100019e4
|
| 3339 |
|
|
|
| 3340 |
|
|
}
|
| 3341 |
|
|
|
| 3342 |
|
|
static inline void exit(unsigned exit_code)
|
| 3343 |
|
|
{
|
| 3344 |
|
|
volatile register char t1 asm ("r1") = exit_code;
|
| 3345 |
|
|
10002518: 9c 20 00 01 l.addi r1,r0,1
|
| 3346 |
|
|
__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 3347 |
|
|
}
|
| 3348 |
|
|
else
|
| 3349 |
|
|
{
|
| 3350 |
|
|
// Invalid instruction!
|
| 3351 |
|
|
__asm__ __volatile__ ( "\t lf.add.s r0,r0,r0 ");
|
| 3352 |
|
|
1000251c: c8 00 00 00 lf.add.s r0,r0,r0
|
| 3353 |
|
|
assert(*psb++ == 0x34);
|
| 3354 |
|
|
10002520: 8c 4e 00 01 l.lbz r2,1(r14)
|
| 3355 |
|
|
10002524: bc 02 00 34 l.sfeqi r2,52
|
| 3356 |
|
|
10002528: 10 00 00 0e l.bf 10002560
|
| 3357 |
|
|
1000252c: 18 40 10 00 l.movhi r2,0x1000
|
| 3358 |
|
|
10002530: 18 60 10 00 l.movhi r3,0x1000
|
| 3359 |
|
|
10002534: a8 42 2f 33 l.ori r2,r2,0x2f33
|
| 3360 |
|
|
10002538: a8 63 2c 74 l.ori r3,r3,0x2c74
|
| 3361 |
|
|
1000253c: d4 01 10 00 l.sw 0(r1),r2
|
| 3362 |
|
|
10002540: 18 40 10 00 l.movhi r2,0x1000
|
| 3363 |
|
|
10002544: a8 42 2d 34 l.ori r2,r2,0x2d34
|
| 3364 |
|
|
10002548: d4 01 10 04 l.sw 4(r1),r2
|
| 3365 |
|
|
1000254c: 9c 40 00 7a l.addi r2,r0,122
|
| 3366 |
|
|
10002550: d4 01 10 08 l.sw 8(r1),r2
|
| 3367 |
|
|
10002554: 07 ff fd 24 l.jal 100019e4
|
| 3368 |
|
|
|
| 3369 |
|
|
}
|
| 3370 |
|
|
|
| 3371 |
|
|
static inline void exit(unsigned exit_code)
|
| 3372 |
|
|
{
|
| 3373 |
|
|
volatile register char t1 asm ("r1") = exit_code;
|
| 3374 |
|
|
10002558: 9c 20 00 01 l.addi r1,r0,1
|
| 3375 |
|
|
__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 3376 |
|
|
}
|
| 3377 |
|
|
else
|
| 3378 |
|
|
{
|
| 3379 |
|
|
// Invalid instruction!
|
| 3380 |
|
|
__asm__ __volatile__ ( "\t lf.add.s r0,r0,r0 ");
|
| 3381 |
|
|
1000255c: c8 00 00 00 lf.add.s r0,r0,r0
|
| 3382 |
|
|
assert(*psb++ == 0x56);
|
| 3383 |
|
|
10002560: 8c 4e 00 02 l.lbz r2,2(r14)
|
| 3384 |
|
|
10002564: bc 02 00 56 l.sfeqi r2,86
|
| 3385 |
|
|
10002568: 10 00 00 0e l.bf 100025a0
|
| 3386 |
|
|
1000256c: 18 40 10 00 l.movhi r2,0x1000
|
| 3387 |
|
|
10002570: 18 60 10 00 l.movhi r3,0x1000
|
| 3388 |
|
|
10002574: a8 42 2f 42 l.ori r2,r2,0x2f42
|
| 3389 |
|
|
10002578: a8 63 2c 74 l.ori r3,r3,0x2c74
|
| 3390 |
|
|
1000257c: d4 01 10 00 l.sw 0(r1),r2
|
| 3391 |
|
|
10002580: 18 40 10 00 l.movhi r2,0x1000
|
| 3392 |
|
|
10002584: a8 42 2d 34 l.ori r2,r2,0x2d34
|
| 3393 |
|
|
10002588: d4 01 10 04 l.sw 4(r1),r2
|
| 3394 |
|
|
1000258c: 9c 40 00 7b l.addi r2,r0,123
|
| 3395 |
|
|
10002590: d4 01 10 08 l.sw 8(r1),r2
|
| 3396 |
|
|
10002594: 07 ff fd 14 l.jal 100019e4
|
| 3397 |
|
|
|
| 3398 |
|
|
}
|
| 3399 |
|
|
|
| 3400 |
|
|
static inline void exit(unsigned exit_code)
|
| 3401 |
|
|
{
|
| 3402 |
|
|
volatile register char t1 asm ("r1") = exit_code;
|
| 3403 |
|
|
10002598: 9c 20 00 01 l.addi r1,r0,1
|
| 3404 |
|
|
__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 3405 |
|
|
}
|
| 3406 |
|
|
else
|
| 3407 |
|
|
{
|
| 3408 |
|
|
// Invalid instruction!
|
| 3409 |
|
|
__asm__ __volatile__ ( "\t lf.add.s r0,r0,r0 ");
|
| 3410 |
|
|
1000259c: c8 00 00 00 lf.add.s r0,r0,r0
|
| 3411 |
|
|
assert(*psb++ == 0x78);
|
| 3412 |
|
|
100025a0: 8c 4e 00 03 l.lbz r2,3(r14)
|
| 3413 |
|
|
100025a4: bc 02 00 78 l.sfeqi r2,120
|
| 3414 |
|
|
100025a8: 10 00 00 0e l.bf 100025e0
|
| 3415 |
|
|
100025ac: 18 40 10 00 l.movhi r2,0x1000
|
| 3416 |
|
|
100025b0: 18 60 10 00 l.movhi r3,0x1000
|
| 3417 |
|
|
100025b4: a8 42 2f 51 l.ori r2,r2,0x2f51
|
| 3418 |
|
|
100025b8: a8 63 2c 74 l.ori r3,r3,0x2c74
|
| 3419 |
|
|
100025bc: d4 01 10 00 l.sw 0(r1),r2
|
| 3420 |
|
|
100025c0: 18 40 10 00 l.movhi r2,0x1000
|
| 3421 |
|
|
100025c4: a8 42 2d 34 l.ori r2,r2,0x2d34
|
| 3422 |
|
|
100025c8: d4 01 10 04 l.sw 4(r1),r2
|
| 3423 |
|
|
100025cc: 9c 40 00 7c l.addi r2,r0,124
|
| 3424 |
|
|
100025d0: d4 01 10 08 l.sw 8(r1),r2
|
| 3425 |
|
|
100025d4: 07 ff fd 04 l.jal 100019e4
|
| 3426 |
|
|
|
| 3427 |
|
|
}
|
| 3428 |
|
|
|
| 3429 |
|
|
static inline void exit(unsigned exit_code)
|
| 3430 |
|
|
{
|
| 3431 |
|
|
volatile register char t1 asm ("r1") = exit_code;
|
| 3432 |
|
|
100025d8: 9c 20 00 01 l.addi r1,r0,1
|
| 3433 |
|
|
__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 3434 |
|
|
}
|
| 3435 |
|
|
else
|
| 3436 |
|
|
{
|
| 3437 |
|
|
// Invalid instruction!
|
| 3438 |
|
|
__asm__ __volatile__ ( "\t lf.add.s r0,r0,r0 ");
|
| 3439 |
|
|
100025dc: c8 00 00 00 lf.add.s r0,r0,r0
|
| 3440 |
|
|
psb = &uvar;
|
| 3441 |
|
|
*psb++ = 0xab;
|
| 3442 |
|
|
100025e0: 9c 80 ff ab l.addi r4,r0,-85
|
| 3443 |
|
|
assert(uvar == 0xab345678);
|
| 3444 |
|
|
100025e4: 18 60 ab 34 l.movhi r3,0xab34
|
| 3445 |
|
|
assert(*psb++ == 0x12);
|
| 3446 |
|
|
assert(*psb++ == 0x34);
|
| 3447 |
|
|
assert(*psb++ == 0x56);
|
| 3448 |
|
|
assert(*psb++ == 0x78);
|
| 3449 |
|
|
psb = &uvar;
|
| 3450 |
|
|
*psb++ = 0xab;
|
| 3451 |
|
|
100025e8: d8 0e 20 00 l.sb 0(r14),r4
|
| 3452 |
|
|
assert(uvar == 0xab345678);
|
| 3453 |
|
|
100025ec: a8 63 56 78 l.ori r3,r3,0x5678
|
| 3454 |
|
|
100025f0: 84 4e 00 00 l.lwz r2,0(r14)
|
| 3455 |
|
|
100025f4: e4 02 18 00 l.sfeq r2,r3
|
| 3456 |
|
|
100025f8: 10 00 00 0e l.bf 10002630
|
| 3457 |
|
|
100025fc: 18 40 10 00 l.movhi r2,0x1000
|
| 3458 |
|
|
10002600: 18 60 10 00 l.movhi r3,0x1000
|
| 3459 |
|
|
10002604: a8 42 2f 60 l.ori r2,r2,0x2f60
|
| 3460 |
|
|
10002608: a8 63 2c 74 l.ori r3,r3,0x2c74
|
| 3461 |
|
|
1000260c: d4 01 10 00 l.sw 0(r1),r2
|
| 3462 |
|
|
10002610: 18 40 10 00 l.movhi r2,0x1000
|
| 3463 |
|
|
10002614: a8 42 2d 34 l.ori r2,r2,0x2d34
|
| 3464 |
|
|
10002618: d4 01 10 04 l.sw 4(r1),r2
|
| 3465 |
|
|
1000261c: 9c 40 00 7f l.addi r2,r0,127
|
| 3466 |
|
|
10002620: d4 01 10 08 l.sw 8(r1),r2
|
| 3467 |
|
|
10002624: 07 ff fc f0 l.jal 100019e4
|
| 3468 |
|
|
|
| 3469 |
|
|
}
|
| 3470 |
|
|
|
| 3471 |
|
|
static inline void exit(unsigned exit_code)
|
| 3472 |
|
|
{
|
| 3473 |
|
|
volatile register char t1 asm ("r1") = exit_code;
|
| 3474 |
|
|
10002628: 9c 20 00 01 l.addi r1,r0,1
|
| 3475 |
|
|
__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 3476 |
|
|
}
|
| 3477 |
|
|
else
|
| 3478 |
|
|
{
|
| 3479 |
|
|
// Invalid instruction!
|
| 3480 |
|
|
__asm__ __volatile__ ( "\t lf.add.s r0,r0,r0 ");
|
| 3481 |
|
|
1000262c: c8 00 00 00 lf.add.s r0,r0,r0
|
| 3482 |
|
|
*psb++ = 0xcd;
|
| 3483 |
|
|
10002630: 9c 80 ff cd l.addi r4,r0,-51
|
| 3484 |
|
|
assert(uvar == 0xabcd5678);
|
| 3485 |
|
|
10002634: 18 60 ab cd l.movhi r3,0xabcd
|
| 3486 |
|
|
assert(*psb++ == 0x56);
|
| 3487 |
|
|
assert(*psb++ == 0x78);
|
| 3488 |
|
|
psb = &uvar;
|
| 3489 |
|
|
*psb++ = 0xab;
|
| 3490 |
|
|
assert(uvar == 0xab345678);
|
| 3491 |
|
|
*psb++ = 0xcd;
|
| 3492 |
|
|
10002638: d8 0e 20 01 l.sb 1(r14),r4
|
| 3493 |
|
|
assert(uvar == 0xabcd5678);
|
| 3494 |
|
|
1000263c: a8 63 56 78 l.ori r3,r3,0x5678
|
| 3495 |
|
|
10002640: 84 4e 00 00 l.lwz r2,0(r14)
|
| 3496 |
|
|
10002644: e4 02 18 00 l.sfeq r2,r3
|
| 3497 |
|
|
10002648: 10 00 00 0e l.bf 10002680
|
| 3498 |
|
|
1000264c: 18 40 10 00 l.movhi r2,0x1000
|
| 3499 |
|
|
10002650: 18 60 10 00 l.movhi r3,0x1000
|
| 3500 |
|
|
10002654: a8 42 2f 73 l.ori r2,r2,0x2f73
|
| 3501 |
|
|
10002658: a8 63 2c 74 l.ori r3,r3,0x2c74
|
| 3502 |
|
|
1000265c: d4 01 10 00 l.sw 0(r1),r2
|
| 3503 |
|
|
10002660: 18 40 10 00 l.movhi r2,0x1000
|
| 3504 |
|
|
10002664: a8 42 2d 34 l.ori r2,r2,0x2d34
|
| 3505 |
|
|
10002668: d4 01 10 04 l.sw 4(r1),r2
|
| 3506 |
|
|
1000266c: 9c 40 00 81 l.addi r2,r0,129
|
| 3507 |
|
|
10002670: d4 01 10 08 l.sw 8(r1),r2
|
| 3508 |
|
|
10002674: 07 ff fc dc l.jal 100019e4
|
| 3509 |
|
|
|
| 3510 |
|
|
}
|
| 3511 |
|
|
|
| 3512 |
|
|
static inline void exit(unsigned exit_code)
|
| 3513 |
|
|
{
|
| 3514 |
|
|
volatile register char t1 asm ("r1") = exit_code;
|
| 3515 |
|
|
10002678: 9c 20 00 01 l.addi r1,r0,1
|
| 3516 |
|
|
__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 3517 |
|
|
}
|
| 3518 |
|
|
else
|
| 3519 |
|
|
{
|
| 3520 |
|
|
// Invalid instruction!
|
| 3521 |
|
|
__asm__ __volatile__ ( "\t lf.add.s r0,r0,r0 ");
|
| 3522 |
|
|
1000267c: c8 00 00 00 lf.add.s r0,r0,r0
|
| 3523 |
|
|
*psb++ = 0xef;
|
| 3524 |
|
|
10002680: 9c 80 ff ef l.addi r4,r0,-17
|
| 3525 |
|
|
assert(uvar == 0xabcdef78);
|
| 3526 |
|
|
10002684: 18 60 ab cd l.movhi r3,0xabcd
|
| 3527 |
|
|
psb = &uvar;
|
| 3528 |
|
|
*psb++ = 0xab;
|
| 3529 |
|
|
assert(uvar == 0xab345678);
|
| 3530 |
|
|
*psb++ = 0xcd;
|
| 3531 |
|
|
assert(uvar == 0xabcd5678);
|
| 3532 |
|
|
*psb++ = 0xef;
|
| 3533 |
|
|
10002688: d8 0e 20 02 l.sb 2(r14),r4
|
| 3534 |
|
|
assert(uvar == 0xabcdef78);
|
| 3535 |
|
|
1000268c: a8 63 ef 78 l.ori r3,r3,0xef78
|
| 3536 |
|
|
10002690: 84 4e 00 00 l.lwz r2,0(r14)
|
| 3537 |
|
|
10002694: e4 02 18 00 l.sfeq r2,r3
|
| 3538 |
|
|
10002698: 10 00 00 0e l.bf 100026d0
|
| 3539 |
|
|
1000269c: 18 40 10 00 l.movhi r2,0x1000
|
| 3540 |
|
|
100026a0: 18 60 10 00 l.movhi r3,0x1000
|
| 3541 |
|
|
100026a4: a8 42 2f 86 l.ori r2,r2,0x2f86
|
| 3542 |
|
|
100026a8: a8 63 2c 74 l.ori r3,r3,0x2c74
|
| 3543 |
|
|
100026ac: d4 01 10 00 l.sw 0(r1),r2
|
| 3544 |
|
|
100026b0: 18 40 10 00 l.movhi r2,0x1000
|
| 3545 |
|
|
100026b4: a8 42 2d 34 l.ori r2,r2,0x2d34
|
| 3546 |
|
|
100026b8: d4 01 10 04 l.sw 4(r1),r2
|
| 3547 |
|
|
100026bc: 9c 40 00 83 l.addi r2,r0,131
|
| 3548 |
|
|
100026c0: d4 01 10 08 l.sw 8(r1),r2
|
| 3549 |
|
|
100026c4: 07 ff fc c8 l.jal 100019e4
|
| 3550 |
|
|
|
| 3551 |
|
|
}
|
| 3552 |
|
|
|
| 3553 |
|
|
static inline void exit(unsigned exit_code)
|
| 3554 |
|
|
{
|
| 3555 |
|
|
volatile register char t1 asm ("r1") = exit_code;
|
| 3556 |
|
|
100026c8: 9c 20 00 01 l.addi r1,r0,1
|
| 3557 |
|
|
__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 3558 |
|
|
}
|
| 3559 |
|
|
else
|
| 3560 |
|
|
{
|
| 3561 |
|
|
// Invalid instruction!
|
| 3562 |
|
|
__asm__ __volatile__ ( "\t lf.add.s r0,r0,r0 ");
|
| 3563 |
|
|
100026cc: c8 00 00 00 lf.add.s r0,r0,r0
|
| 3564 |
|
|
*psb++ = 0x01;
|
| 3565 |
|
|
100026d0: 9c 80 00 01 l.addi r4,r0,1
|
| 3566 |
|
|
assert(uvar == 0xabcdef01);
|
| 3567 |
|
|
100026d4: 18 60 ab cd l.movhi r3,0xabcd
|
| 3568 |
|
|
assert(uvar == 0xab345678);
|
| 3569 |
|
|
*psb++ = 0xcd;
|
| 3570 |
|
|
assert(uvar == 0xabcd5678);
|
| 3571 |
|
|
*psb++ = 0xef;
|
| 3572 |
|
|
assert(uvar == 0xabcdef78);
|
| 3573 |
|
|
*psb++ = 0x01;
|
| 3574 |
|
|
100026d8: d8 0e 20 03 l.sb 3(r14),r4
|
| 3575 |
|
|
assert(uvar == 0xabcdef01);
|
| 3576 |
|
|
100026dc: a8 63 ef 01 l.ori r3,r3,0xef01
|
| 3577 |
|
|
100026e0: 84 4e 00 00 l.lwz r2,0(r14)
|
| 3578 |
|
|
100026e4: e4 02 18 00 l.sfeq r2,r3
|
| 3579 |
|
|
100026e8: 10 00 00 0e l.bf 10002720
|
| 3580 |
|
|
100026ec: 18 40 10 00 l.movhi r2,0x1000
|
| 3581 |
|
|
100026f0: 18 60 10 00 l.movhi r3,0x1000
|
| 3582 |
|
|
100026f4: a8 42 2f 99 l.ori r2,r2,0x2f99
|
| 3583 |
|
|
100026f8: a8 63 2c 74 l.ori r3,r3,0x2c74
|
| 3584 |
|
|
100026fc: d4 01 10 00 l.sw 0(r1),r2
|
| 3585 |
|
|
10002700: 18 40 10 00 l.movhi r2,0x1000
|
| 3586 |
|
|
10002704: a8 42 2d 34 l.ori r2,r2,0x2d34
|
| 3587 |
|
|
10002708: d4 01 10 04 l.sw 4(r1),r2
|
| 3588 |
|
|
1000270c: 9c 40 00 85 l.addi r2,r0,133
|
| 3589 |
|
|
10002710: d4 01 10 08 l.sw 8(r1),r2
|
| 3590 |
|
|
10002714: 07 ff fc b4 l.jal 100019e4
|
| 3591 |
|
|
|
| 3592 |
|
|
}
|
| 3593 |
|
|
|
| 3594 |
|
|
static inline void exit(unsigned exit_code)
|
| 3595 |
|
|
{
|
| 3596 |
|
|
volatile register char t1 asm ("r1") = exit_code;
|
| 3597 |
|
|
10002718: 9c 20 00 01 l.addi r1,r0,1
|
| 3598 |
|
|
__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 3599 |
|
|
}
|
| 3600 |
|
|
else
|
| 3601 |
|
|
{
|
| 3602 |
|
|
// Invalid instruction!
|
| 3603 |
|
|
__asm__ __volatile__ ( "\t lf.add.s r0,r0,r0 ");
|
| 3604 |
|
|
1000271c: c8 00 00 00 lf.add.s r0,r0,r0
|
| 3605 |
|
|
|
| 3606 |
|
|
serial_putstr("10. Comparision\n");
|
| 3607 |
|
|
10002720: 18 60 10 00 l.movhi r3,0x1000
|
| 3608 |
|
|
longvar = 0x1db9;
|
| 3609 |
|
|
10002724: 18 40 10 00 l.movhi r2,0x1000
|
| 3610 |
|
|
*psb++ = 0xef;
|
| 3611 |
|
|
assert(uvar == 0xabcdef78);
|
| 3612 |
|
|
*psb++ = 0x01;
|
| 3613 |
|
|
assert(uvar == 0xabcdef01);
|
| 3614 |
|
|
|
| 3615 |
|
|
serial_putstr("10. Comparision\n");
|
| 3616 |
|
|
10002728: a8 63 2f ac l.ori r3,r3,0x2fac
|
| 3617 |
|
|
longvar = 0x1db9;
|
| 3618 |
|
|
1000272c: a8 42 30 00 l.ori r2,r2,0x3000
|
| 3619 |
|
|
*psb++ = 0xef;
|
| 3620 |
|
|
assert(uvar == 0xabcdef78);
|
| 3621 |
|
|
*psb++ = 0x01;
|
| 3622 |
|
|
assert(uvar == 0xabcdef01);
|
| 3623 |
|
|
|
| 3624 |
|
|
serial_putstr("10. Comparision\n");
|
| 3625 |
|
|
10002730: 07 ff fc fb l.jal 10001b1c
|
| 3626 |
|
|
longvar = 0x1db9;
|
| 3627 |
|
|
10002734: 9c 60 1d b9 l.addi r3,r0,7609
|
| 3628 |
|
|
if (longvar >= 0xFFF8 && longvar <= 0xFFFF)
|
| 3629 |
|
|
10002738: a8 80 ff f7 l.ori r4,r0,0xfff7
|
| 3630 |
|
|
assert(uvar == 0xabcdef78);
|
| 3631 |
|
|
*psb++ = 0x01;
|
| 3632 |
|
|
assert(uvar == 0xabcdef01);
|
| 3633 |
|
|
|
| 3634 |
|
|
serial_putstr("10. Comparision\n");
|
| 3635 |
|
|
longvar = 0x1db9;
|
| 3636 |
|
|
1000273c: d4 02 18 00 l.sw 0(r2),r3
|
| 3637 |
|
|
if (longvar >= 0xFFF8 && longvar <= 0xFFFF)
|
| 3638 |
|
|
10002740: 84 62 00 00 l.lwz r3,0(r2)
|
| 3639 |
|
|
10002744: e4 a3 20 00 l.sfleu r3,r4
|
| 3640 |
|
|
10002748: 10 00 00 05 l.bf 1000275c
|
| 3641 |
|
|
1000274c: a8 60 ff ff l.ori r3,r0,0xffff
|
| 3642 |
|
|
10002750: 84 42 00 00 l.lwz r2,0(r2)
|
| 3643 |
|
|
10002754: e4 42 18 00 l.sfgtu r2,r3
|
| 3644 |
|
|
10002758: 0c 00 00 0b l.bnf 10002784
|
| 3645 |
|
|
|
| 3646 |
|
|
}
|
| 3647 |
|
|
|
| 3648 |
|
|
static inline void exit(unsigned exit_code)
|
| 3649 |
|
|
{
|
| 3650 |
|
|
volatile register char t1 asm ("r1") = exit_code;
|
| 3651 |
|
|
1000275c: 9c 20 00 00 l.addi r1,r0,0
|
| 3652 |
|
|
|
| 3653 |
|
|
// No error?
|
| 3654 |
|
|
if (exit_code == 0)
|
| 3655 |
|
|
{
|
| 3656 |
|
|
// Trap instruction
|
| 3657 |
|
|
__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 3658 |
|
|
10002760: 21 00 00 00 l.trap 0x0
|
| 3659 |
|
|
assert(0);
|
| 3660 |
|
|
}
|
| 3661 |
|
|
|
| 3662 |
|
|
// Success
|
| 3663 |
|
|
exit(0);
|
| 3664 |
|
|
}
|
| 3665 |
|
|
10002764: 9c 21 00 20 l.addi r1,r1,32
|
| 3666 |
|
|
10002768: 9d 60 00 00 l.addi r11,r0,0
|
| 3667 |
|
|
1000276c: 85 21 ff fc l.lwz r9,-4(r1)
|
| 3668 |
|
|
10002770: 84 21 ff ec l.lwz r1,-20(r1)
|
| 3669 |
|
|
10002774: 84 41 ff f0 l.lwz r2,-16(r1)
|
| 3670 |
|
|
10002778: 85 c1 ff f4 l.lwz r14,-12(r1)
|
| 3671 |
|
|
1000277c: 86 41 ff f8 l.lwz r18,-8(r1)
|
| 3672 |
|
|
10002780: 44 00 48 00 l.jr r9
|
| 3673 |
|
|
|
| 3674 |
|
|
serial_putstr("10. Comparision\n");
|
| 3675 |
|
|
longvar = 0x1db9;
|
| 3676 |
|
|
if (longvar >= 0xFFF8 && longvar <= 0xFFFF)
|
| 3677 |
|
|
{
|
| 3678 |
|
|
serial_putstr("- Incorrect comparision\n");
|
| 3679 |
|
|
10002784: 18 60 10 00 l.movhi r3,0x1000
|
| 3680 |
|
|
assert(0);
|
| 3681 |
|
|
10002788: 18 40 10 00 l.movhi r2,0x1000
|
| 3682 |
|
|
|
| 3683 |
|
|
serial_putstr("10. Comparision\n");
|
| 3684 |
|
|
longvar = 0x1db9;
|
| 3685 |
|
|
if (longvar >= 0xFFF8 && longvar <= 0xFFFF)
|
| 3686 |
|
|
{
|
| 3687 |
|
|
serial_putstr("- Incorrect comparision\n");
|
| 3688 |
|
|
1000278c: a8 63 2f bd l.ori r3,r3,0x2fbd
|
| 3689 |
|
|
assert(0);
|
| 3690 |
|
|
10002790: a8 42 2d 07 l.ori r2,r2,0x2d07
|
| 3691 |
|
|
|
| 3692 |
|
|
serial_putstr("10. Comparision\n");
|
| 3693 |
|
|
longvar = 0x1db9;
|
| 3694 |
|
|
if (longvar >= 0xFFF8 && longvar <= 0xFFFF)
|
| 3695 |
|
|
{
|
| 3696 |
|
|
serial_putstr("- Incorrect comparision\n");
|
| 3697 |
|
|
10002794: 07 ff fc e2 l.jal 10001b1c
|
| 3698 |
|
|
assert(0);
|
| 3699 |
|
|
10002798: d4 01 10 00 l.sw 0(r1),r2
|
| 3700 |
|
|
1000279c: 18 40 10 00 l.movhi r2,0x1000
|
| 3701 |
|
|
100027a0: 18 60 10 00 l.movhi r3,0x1000
|
| 3702 |
|
|
100027a4: a8 42 2d 34 l.ori r2,r2,0x2d34
|
| 3703 |
|
|
100027a8: a8 63 2c 74 l.ori r3,r3,0x2c74
|
| 3704 |
|
|
100027ac: d4 01 10 04 l.sw 4(r1),r2
|
| 3705 |
|
|
100027b0: 9c 40 00 8c l.addi r2,r0,140
|
| 3706 |
|
|
100027b4: d4 01 10 08 l.sw 8(r1),r2
|
| 3707 |
|
|
100027b8: 07 ff fc 8b l.jal 100019e4
|
| 3708 |
|
|
|
| 3709 |
|
|
}
|
| 3710 |
|
|
|
| 3711 |
|
|
static inline void exit(unsigned exit_code)
|
| 3712 |
|
|
{
|
| 3713 |
|
|
volatile register char t1 asm ("r1") = exit_code;
|
| 3714 |
|
|
100027bc: 9c 20 00 01 l.addi r1,r0,1
|
| 3715 |
|
|
__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 3716 |
|
|
}
|
| 3717 |
|
|
else
|
| 3718 |
|
|
{
|
| 3719 |
|
|
// Invalid instruction!
|
| 3720 |
|
|
__asm__ __volatile__ ( "\t lf.add.s r0,r0,r0 ");
|
| 3721 |
|
|
100027c0: c8 00 00 00 lf.add.s r0,r0,r0
|
| 3722 |
|
|
100027c4: 03 ff ff e6 l.j 1000275c
|
| 3723 |
|
|
assert(sw == 0x5678);
|
| 3724 |
|
|
psw = &uvar;
|
| 3725 |
|
|
assert(*psw++ == 0x1234);
|
| 3726 |
|
|
assert(*psw++ == 0x5678);
|
| 3727 |
|
|
psw = &uvar;
|
| 3728 |
|
|
*psw = 0xcafe;
|
| 3729 |
|
|
100027c8: 18 40 10 00 l.movhi r2,0x1000
|
| 3730 |
|
|
100027cc: 9c 80 ca fe l.addi r4,r0,-13570
|
| 3731 |
|
|
100027d0: a8 42 30 04 l.ori r2,r2,0x3004
|
| 3732 |
|
|
100027d4: dc 02 20 00 l.sh 0(r2),r4
|
| 3733 |
|
|
assert(*psw++ == 0xcafe);
|
| 3734 |
|
|
assert(*psw++ == 0x5678);
|
| 3735 |
|
|
psw = &uvar;
|
| 3736 |
|
|
*(++psw) = 0xbabe;
|
| 3737 |
|
|
100027d8: 9c 40 ba be l.addi r2,r0,-17730
|
| 3738 |
|
|
100027dc: dc 0e 10 02 l.sh 2(r14),r2
|
| 3739 |
|
|
100027e0: 03 ff ff 17 l.j 1000243c
|
| 3740 |
|
|
x = 10;
|
| 3741 |
|
|
assert(var < x);
|
| 3742 |
|
|
assert(!(var > x));
|
| 3743 |
|
|
x = -3;
|
| 3744 |
|
|
assert(var > x);
|
| 3745 |
|
|
assert(x <= var);
|
| 3746 |
|
|
100027e4: 18 40 10 00 l.movhi r2,0x1000
|
| 3747 |
|
|
100027e8: 18 60 10 00 l.movhi r3,0x1000
|
| 3748 |
|
|
100027ec: a8 42 2e 8c l.ori r2,r2,0x2e8c
|
| 3749 |
|
|
100027f0: a8 63 2c 74 l.ori r3,r3,0x2c74
|
| 3750 |
|
|
100027f4: d4 01 10 00 l.sw 0(r1),r2
|
| 3751 |
|
|
100027f8: 18 40 10 00 l.movhi r2,0x1000
|
| 3752 |
|
|
100027fc: a8 42 2d 34 l.ori r2,r2,0x2d34
|
| 3753 |
|
|
10002800: d4 01 10 04 l.sw 4(r1),r2
|
| 3754 |
|
|
10002804: 9c 40 00 5f l.addi r2,r0,95
|
| 3755 |
|
|
10002808: d4 01 10 08 l.sw 8(r1),r2
|
| 3756 |
|
|
1000280c: 07 ff fc 76 l.jal 100019e4
|
| 3757 |
|
|
|
| 3758 |
|
|
}
|
| 3759 |
|
|
|
| 3760 |
|
|
static inline void exit(unsigned exit_code)
|
| 3761 |
|
|
{
|
| 3762 |
|
|
volatile register char t1 asm ("r1") = exit_code;
|
| 3763 |
|
|
10002810: 9c 20 00 01 l.addi r1,r0,1
|
| 3764 |
|
|
__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 3765 |
|
|
}
|
| 3766 |
|
|
else
|
| 3767 |
|
|
{
|
| 3768 |
|
|
// Invalid instruction!
|
| 3769 |
|
|
__asm__ __volatile__ ( "\t lf.add.s r0,r0,r0 ");
|
| 3770 |
|
|
10002814: c8 00 00 00 lf.add.s r0,r0,r0
|
| 3771 |
|
|
10002818: 03 ff fe 92 l.j 10002260
|
| 3772 |
|
|
assert(var < 1);
|
| 3773 |
|
|
x = 10;
|
| 3774 |
|
|
assert(var < x);
|
| 3775 |
|
|
assert(!(var > x));
|
| 3776 |
|
|
x = -3;
|
| 3777 |
|
|
assert(var > x);
|
| 3778 |
|
|
1000281c: 18 60 10 00 l.movhi r3,0x1000
|
| 3779 |
|
|
10002820: a8 63 2e 84 l.ori r3,r3,0x2e84
|
| 3780 |
|
|
10002824: d4 01 18 00 l.sw 0(r1),r3
|
| 3781 |
|
|
10002828: 18 60 10 00 l.movhi r3,0x1000
|
| 3782 |
|
|
1000282c: a8 63 2d 34 l.ori r3,r3,0x2d34
|
| 3783 |
|
|
10002830: d4 01 18 04 l.sw 4(r1),r3
|
| 3784 |
|
|
10002834: 9c 60 00 5e l.addi r3,r0,94
|
| 3785 |
|
|
10002838: d4 01 18 08 l.sw 8(r1),r3
|
| 3786 |
|
|
1000283c: 18 60 10 00 l.movhi r3,0x1000
|
| 3787 |
|
|
10002840: a8 63 2c 74 l.ori r3,r3,0x2c74
|
| 3788 |
|
|
10002844: 07 ff fc 68 l.jal 100019e4
|
| 3789 |
|
|
|
| 3790 |
|
|
}
|
| 3791 |
|
|
|
| 3792 |
|
|
static inline void exit(unsigned exit_code)
|
| 3793 |
|
|
{
|
| 3794 |
|
|
volatile register char t1 asm ("r1") = exit_code;
|
| 3795 |
|
|
10002848: 9c 20 00 01 l.addi r1,r0,1
|
| 3796 |
|
|
__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 3797 |
|
|
}
|
| 3798 |
|
|
else
|
| 3799 |
|
|
{
|
| 3800 |
|
|
// Invalid instruction!
|
| 3801 |
|
|
__asm__ __volatile__ ( "\t lf.add.s r0,r0,r0 ");
|
| 3802 |
|
|
1000284c: c8 00 00 00 lf.add.s r0,r0,r0
|
| 3803 |
|
|
10002850: 03 ff fe 81 l.j 10002254
|
| 3804 |
|
|
serial_putstr("7. Signed comparision\n");
|
| 3805 |
|
|
var = -1;
|
| 3806 |
|
|
assert(var < 1);
|
| 3807 |
|
|
x = 10;
|
| 3808 |
|
|
assert(var < x);
|
| 3809 |
|
|
assert(!(var > x));
|
| 3810 |
|
|
10002854: 18 60 10 00 l.movhi r3,0x1000
|
| 3811 |
|
|
10002858: a8 63 2e 79 l.ori r3,r3,0x2e79
|
| 3812 |
|
|
1000285c: d4 01 18 00 l.sw 0(r1),r3
|
| 3813 |
|
|
10002860: 18 60 10 00 l.movhi r3,0x1000
|
| 3814 |
|
|
10002864: a8 63 2d 34 l.ori r3,r3,0x2d34
|
| 3815 |
|
|
10002868: d4 01 18 04 l.sw 4(r1),r3
|
| 3816 |
|
|
1000286c: 9c 60 00 5c l.addi r3,r0,92
|
| 3817 |
|
|
10002870: d4 01 18 08 l.sw 8(r1),r3
|
| 3818 |
|
|
10002874: 18 60 10 00 l.movhi r3,0x1000
|
| 3819 |
|
|
10002878: a8 63 2c 74 l.ori r3,r3,0x2c74
|
| 3820 |
|
|
1000287c: 07 ff fc 5a l.jal 100019e4
|
| 3821 |
|
|
|
| 3822 |
|
|
}
|
| 3823 |
|
|
|
| 3824 |
|
|
static inline void exit(unsigned exit_code)
|
| 3825 |
|
|
{
|
| 3826 |
|
|
volatile register char t1 asm ("r1") = exit_code;
|
| 3827 |
|
|
10002880: 9c 20 00 01 l.addi r1,r0,1
|
| 3828 |
|
|
__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 3829 |
|
|
}
|
| 3830 |
|
|
else
|
| 3831 |
|
|
{
|
| 3832 |
|
|
// Invalid instruction!
|
| 3833 |
|
|
__asm__ __volatile__ ( "\t lf.add.s r0,r0,r0 ");
|
| 3834 |
|
|
10002884: c8 00 00 00 lf.add.s r0,r0,r0
|
| 3835 |
|
|
10002888: 03 ff fe 70 l.j 10002248
|
| 3836 |
|
|
|
| 3837 |
|
|
serial_putstr("7. Signed comparision\n");
|
| 3838 |
|
|
var = -1;
|
| 3839 |
|
|
assert(var < 1);
|
| 3840 |
|
|
x = 10;
|
| 3841 |
|
|
assert(var < x);
|
| 3842 |
|
|
1000288c: 18 60 10 00 l.movhi r3,0x1000
|
| 3843 |
|
|
10002890: a8 63 2e 71 l.ori r3,r3,0x2e71
|
| 3844 |
|
|
10002894: d4 01 18 00 l.sw 0(r1),r3
|
| 3845 |
|
|
10002898: 18 60 10 00 l.movhi r3,0x1000
|
| 3846 |
|
|
1000289c: a8 63 2d 34 l.ori r3,r3,0x2d34
|
| 3847 |
|
|
100028a0: d4 01 18 04 l.sw 4(r1),r3
|
| 3848 |
|
|
100028a4: 9c 60 00 5b l.addi r3,r0,91
|
| 3849 |
|
|
100028a8: d4 01 18 08 l.sw 8(r1),r3
|
| 3850 |
|
|
100028ac: 18 60 10 00 l.movhi r3,0x1000
|
| 3851 |
|
|
100028b0: a8 63 2c 74 l.ori r3,r3,0x2c74
|
| 3852 |
|
|
100028b4: 07 ff fc 4c l.jal 100019e4
|
| 3853 |
|
|
|
| 3854 |
|
|
}
|
| 3855 |
|
|
|
| 3856 |
|
|
static inline void exit(unsigned exit_code)
|
| 3857 |
|
|
{
|
| 3858 |
|
|
volatile register char t1 asm ("r1") = exit_code;
|
| 3859 |
|
|
100028b8: 9c 20 00 01 l.addi r1,r0,1
|
| 3860 |
|
|
__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 3861 |
|
|
}
|
| 3862 |
|
|
else
|
| 3863 |
|
|
{
|
| 3864 |
|
|
// Invalid instruction!
|
| 3865 |
|
|
__asm__ __volatile__ ( "\t lf.add.s r0,r0,r0 ");
|
| 3866 |
|
|
100028bc: c8 00 00 00 lf.add.s r0,r0,r0
|
| 3867 |
|
|
100028c0: 03 ff fe 5f l.j 1000223c
|
| 3868 |
|
|
// Assign empty syscall handler
|
| 3869 |
|
|
exception_register_syscall_handler(empty_syscall);
|
| 3870 |
|
|
|
| 3871 |
|
|
serial_putstr("1. Initialised data\n");
|
| 3872 |
|
|
assert(var == 0x1234); // .text
|
| 3873 |
|
|
assert(uvar == 0x0); // .bss
|
| 3874 |
|
|
100028c4: 18 60 10 00 l.movhi r3,0x1000
|
| 3875 |
|
|
100028c8: a8 63 2d 3b l.ori r3,r3,0x2d3b
|
| 3876 |
|
|
100028cc: d4 01 18 00 l.sw 0(r1),r3
|
| 3877 |
|
|
100028d0: 18 60 10 00 l.movhi r3,0x1000
|
| 3878 |
|
|
100028d4: a8 63 2d 34 l.ori r3,r3,0x2d34
|
| 3879 |
|
|
100028d8: d4 01 18 04 l.sw 4(r1),r3
|
| 3880 |
|
|
100028dc: 9c 60 00 2a l.addi r3,r0,42
|
| 3881 |
|
|
100028e0: d4 01 18 08 l.sw 8(r1),r3
|
| 3882 |
|
|
100028e4: 18 60 10 00 l.movhi r3,0x1000
|
| 3883 |
|
|
100028e8: a8 63 2c 74 l.ori r3,r3,0x2c74
|
| 3884 |
|
|
100028ec: 07 ff fc 3e l.jal 100019e4
|
| 3885 |
|
|
|
| 3886 |
|
|
}
|
| 3887 |
|
|
|
| 3888 |
|
|
static inline void exit(unsigned exit_code)
|
| 3889 |
|
|
{
|
| 3890 |
|
|
volatile register char t1 asm ("r1") = exit_code;
|
| 3891 |
|
|
100028f0: 9c 20 00 01 l.addi r1,r0,1
|
| 3892 |
|
|
__asm__ __volatile__ ( "\t l.trap 0 ");
|
| 3893 |
|
|
}
|
| 3894 |
|
|
else
|
| 3895 |
|
|
{
|
| 3896 |
|
|
// Invalid instruction!
|
| 3897 |
|
|
__asm__ __volatile__ ( "\t lf.add.s r0,r0,r0 ");
|
| 3898 |
|
|
100028f4: c8 00 00 00 lf.add.s r0,r0,r0
|
| 3899 |
|
|
100028f8: 03 ff fd 23 l.j 10001d84
|
| 3900 |
|
|
|
| 3901 |
|
|
100028fc <__udivsi3>:
|
| 3902 |
|
|
|
| 3903 |
|
|
long udivmodsi4 ();
|
| 3904 |
|
|
|
| 3905 |
|
|
long
|
| 3906 |
|
|
__udivsi3 (long a, long b)
|
| 3907 |
|
|
{
|
| 3908 |
|
|
100028fc: d7 e1 4f fc l.sw -4(r1),r9
|
| 3909 |
|
|
10002900: d7 e1 0f f8 l.sw -8(r1),r1
|
| 3910 |
|
|
return udivmodsi4 (a, b, 0);
|
| 3911 |
|
|
10002904: 9c a0 00 00 l.addi r5,r0,0
|
| 3912 |
|
|
|
| 3913 |
|
|
long udivmodsi4 ();
|
| 3914 |
|
|
|
| 3915 |
|
|
long
|
| 3916 |
|
|
__udivsi3 (long a, long b)
|
| 3917 |
|
|
{
|
| 3918 |
|
|
10002908: 9c 21 ff f8 l.addi r1,r1,-8
|
| 3919 |
|
|
return udivmodsi4 (a, b, 0);
|
| 3920 |
|
|
1000290c: 04 00 00 40 l.jal 10002a0c
|
| 3921 |
|
|
}
|
| 3922 |
|
|
10002910: 9c 21 00 08 l.addi r1,r1,8
|
| 3923 |
|
|
10002914: 85 21 ff fc l.lwz r9,-4(r1)
|
| 3924 |
|
|
10002918: 84 21 ff f8 l.lwz r1,-8(r1)
|
| 3925 |
|
|
1000291c: 44 00 48 00 l.jr r9
|
| 3926 |
|
|
|
| 3927 |
|
|
10002920 <__umodsi3>:
|
| 3928 |
|
|
|
| 3929 |
|
|
long
|
| 3930 |
|
|
__umodsi3 (long a, long b)
|
| 3931 |
|
|
{
|
| 3932 |
|
|
10002920: d7 e1 4f fc l.sw -4(r1),r9
|
| 3933 |
|
|
10002924: d7 e1 0f f8 l.sw -8(r1),r1
|
| 3934 |
|
|
return udivmodsi4 (a, b, 1);
|
| 3935 |
|
|
10002928: 9c a0 00 01 l.addi r5,r0,1
|
| 3936 |
|
|
return udivmodsi4 (a, b, 0);
|
| 3937 |
|
|
}
|
| 3938 |
|
|
|
| 3939 |
|
|
long
|
| 3940 |
|
|
__umodsi3 (long a, long b)
|
| 3941 |
|
|
{
|
| 3942 |
|
|
1000292c: 9c 21 ff f8 l.addi r1,r1,-8
|
| 3943 |
|
|
return udivmodsi4 (a, b, 1);
|
| 3944 |
|
|
10002930: 04 00 00 37 l.jal 10002a0c
|
| 3945 |
|
|
}
|
| 3946 |
|
|
10002934: 9c 21 00 08 l.addi r1,r1,8
|
| 3947 |
|
|
10002938: 85 21 ff fc l.lwz r9,-4(r1)
|
| 3948 |
|
|
1000293c: 84 21 ff f8 l.lwz r1,-8(r1)
|
| 3949 |
|
|
10002940: 44 00 48 00 l.jr r9
|
| 3950 |
|
|
|
| 3951 |
|
|
10002944 <__divsi3>:
|
| 3952 |
|
|
|
| 3953 |
|
|
long udivmodsi4 ();
|
| 3954 |
|
|
|
| 3955 |
|
|
long
|
| 3956 |
|
|
__divsi3 (long a, long b)
|
| 3957 |
|
|
{
|
| 3958 |
|
|
10002944: d7 e1 17 f8 l.sw -8(r1),r2
|
| 3959 |
|
|
10002948: d7 e1 4f fc l.sw -4(r1),r9
|
| 3960 |
|
|
1000294c: d7 e1 0f f4 l.sw -12(r1),r1
|
| 3961 |
|
|
int neg = 0;
|
| 3962 |
|
|
long res;
|
| 3963 |
|
|
|
| 3964 |
|
|
if (a < 0)
|
| 3965 |
|
|
10002950: bd 63 00 00 l.sfgesi r3,0
|
| 3966 |
|
|
|
| 3967 |
|
|
long udivmodsi4 ();
|
| 3968 |
|
|
|
| 3969 |
|
|
long
|
| 3970 |
|
|
__divsi3 (long a, long b)
|
| 3971 |
|
|
{
|
| 3972 |
|
|
10002954: 9c 21 ff f4 l.addi r1,r1,-12
|
| 3973 |
|
|
int neg = 0;
|
| 3974 |
|
|
10002958: 9c 40 00 00 l.addi r2,r0,0
|
| 3975 |
|
|
long res;
|
| 3976 |
|
|
|
| 3977 |
|
|
if (a < 0)
|
| 3978 |
|
|
1000295c: 0c 00 00 0d l.bnf 10002990 <__divsi3+0x4c>
|
| 3979 |
|
|
{
|
| 3980 |
|
|
a = -a;
|
| 3981 |
|
|
neg = !neg;
|
| 3982 |
|
|
}
|
| 3983 |
|
|
|
| 3984 |
|
|
if (b < 0)
|
| 3985 |
|
|
10002960: bd 64 00 00 l.sfgesi r4,0
|
| 3986 |
|
|
10002964: 0c 00 00 0f l.bnf 100029a0 <__divsi3+0x5c>
|
| 3987 |
|
|
{
|
| 3988 |
|
|
b = -b;
|
| 3989 |
|
|
neg = !neg;
|
| 3990 |
|
|
}
|
| 3991 |
|
|
|
| 3992 |
|
|
res = udivmodsi4 (a, b, 0);
|
| 3993 |
|
|
10002968: 9c a0 00 00 l.addi r5,r0,0
|
| 3994 |
|
|
1000296c: 04 00 00 28 l.jal 10002a0c
|
| 3995 |
|
|
|
| 3996 |
|
|
if (neg)
|
| 3997 |
|
|
10002970: bc 02 00 00 l.sfeqi r2,0
|
| 3998 |
|
|
10002974: 10 00 00 02 l.bf 1000297c <__divsi3+0x38>
|
| 3999 |
|
|
res = -res;
|
| 4000 |
|
|
10002978: e1 60 58 02 l.sub r11,r0,r11
|
| 4001 |
|
|
|
| 4002 |
|
|
return res;
|
| 4003 |
|
|
}
|
| 4004 |
|
|
1000297c: 9c 21 00 0c l.addi r1,r1,12
|
| 4005 |
|
|
10002980: 85 21 ff fc l.lwz r9,-4(r1)
|
| 4006 |
|
|
10002984: 84 21 ff f4 l.lwz r1,-12(r1)
|
| 4007 |
|
|
10002988: 84 41 ff f8 l.lwz r2,-8(r1)
|
| 4008 |
|
|
1000298c: 44 00 48 00 l.jr r9
|
| 4009 |
|
|
{
|
| 4010 |
|
|
a = -a;
|
| 4011 |
|
|
neg = !neg;
|
| 4012 |
|
|
}
|
| 4013 |
|
|
|
| 4014 |
|
|
if (b < 0)
|
| 4015 |
|
|
10002990: bd 64 00 00 l.sfgesi r4,0
|
| 4016 |
|
|
int neg = 0;
|
| 4017 |
|
|
long res;
|
| 4018 |
|
|
|
| 4019 |
|
|
if (a < 0)
|
| 4020 |
|
|
{
|
| 4021 |
|
|
a = -a;
|
| 4022 |
|
|
10002994: e0 60 18 02 l.sub r3,r0,r3
|
| 4023 |
|
|
neg = !neg;
|
| 4024 |
|
|
10002998: 9c 40 00 01 l.addi r2,r0,1
|
| 4025 |
|
|
}
|
| 4026 |
|
|
|
| 4027 |
|
|
if (b < 0)
|
| 4028 |
|
|
1000299c: 13 ff ff f3 l.bf 10002968 <__divsi3+0x24>
|
| 4029 |
|
|
{
|
| 4030 |
|
|
b = -b;
|
| 4031 |
|
|
100029a0: e0 80 20 02 l.sub r4,r0,r4
|
| 4032 |
|
|
100029a4: ac 42 00 01 l.xori r2,r2,1
|
| 4033 |
|
|
100029a8: 03 ff ff f0 l.j 10002968 <__divsi3+0x24>
|
| 4034 |
|
|
|
| 4035 |
|
|
100029ac <__modsi3>:
|
| 4036 |
|
|
return res;
|
| 4037 |
|
|
}
|
| 4038 |
|
|
|
| 4039 |
|
|
long
|
| 4040 |
|
|
__modsi3 (long a, long b)
|
| 4041 |
|
|
{
|
| 4042 |
|
|
100029ac: d7 e1 4f fc l.sw -4(r1),r9
|
| 4043 |
|
|
100029b0: d7 e1 0f f8 l.sw -8(r1),r1
|
| 4044 |
|
|
int neg = 0;
|
| 4045 |
|
|
long res;
|
| 4046 |
|
|
|
| 4047 |
|
|
if (a < 0)
|
| 4048 |
|
|
100029b4: bd 63 00 00 l.sfgesi r3,0
|
| 4049 |
|
|
return res;
|
| 4050 |
|
|
}
|
| 4051 |
|
|
|
| 4052 |
|
|
long
|
| 4053 |
|
|
__modsi3 (long a, long b)
|
| 4054 |
|
|
{
|
| 4055 |
|
|
100029b8: 9c 21 ff f8 l.addi r1,r1,-8
|
| 4056 |
|
|
100029bc: b8 c4 00 9f l.srai r6,r4,0x1f
|
| 4057 |
|
|
int neg = 0;
|
| 4058 |
|
|
long res;
|
| 4059 |
|
|
|
| 4060 |
|
|
if (a < 0)
|
| 4061 |
|
|
100029c0: 0c 00 00 09 l.bnf 100029e4 <__modsi3+0x38>
|
| 4062 |
|
|
100029c4: e0 86 20 05 l.xor r4,r6,r4
|
| 4063 |
|
|
}
|
| 4064 |
|
|
|
| 4065 |
|
|
if (b < 0)
|
| 4066 |
|
|
b = -b;
|
| 4067 |
|
|
|
| 4068 |
|
|
res = udivmodsi4 (a, b, 1);
|
| 4069 |
|
|
100029c8: 9c a0 00 01 l.addi r5,r0,1
|
| 4070 |
|
|
100029cc: e0 84 30 02 l.sub r4,r4,r6
|
| 4071 |
|
|
100029d0: 04 00 00 0f l.jal 10002a0c
|
| 4072 |
|
|
|
| 4073 |
|
|
if (neg)
|
| 4074 |
|
|
res = -res;
|
| 4075 |
|
|
|
| 4076 |
|
|
return res;
|
| 4077 |
|
|
}
|
| 4078 |
|
|
100029d4: 9c 21 00 08 l.addi r1,r1,8
|
| 4079 |
|
|
100029d8: 85 21 ff fc l.lwz r9,-4(r1)
|
| 4080 |
|
|
100029dc: 84 21 ff f8 l.lwz r1,-8(r1)
|
| 4081 |
|
|
100029e0: 44 00 48 00 l.jr r9
|
| 4082 |
|
|
100029e4: e0 86 20 05 l.xor r4,r6,r4
|
| 4083 |
|
|
}
|
| 4084 |
|
|
|
| 4085 |
|
|
if (b < 0)
|
| 4086 |
|
|
b = -b;
|
| 4087 |
|
|
|
| 4088 |
|
|
res = udivmodsi4 (a, b, 1);
|
| 4089 |
|
|
100029e8: e0 60 18 02 l.sub r3,r0,r3
|
| 4090 |
|
|
100029ec: 9c a0 00 01 l.addi r5,r0,1
|
| 4091 |
|
|
100029f0: e0 84 30 02 l.sub r4,r4,r6
|
| 4092 |
|
|
100029f4: 04 00 00 06 l.jal 10002a0c
|
| 4093 |
|
|
|
| 4094 |
|
|
if (neg)
|
| 4095 |
|
|
res = -res;
|
| 4096 |
|
|
|
| 4097 |
|
|
return res;
|
| 4098 |
|
|
}
|
| 4099 |
|
|
100029f8: 9c 21 00 08 l.addi r1,r1,8
|
| 4100 |
|
|
b = -b;
|
| 4101 |
|
|
|
| 4102 |
|
|
res = udivmodsi4 (a, b, 1);
|
| 4103 |
|
|
|
| 4104 |
|
|
if (neg)
|
| 4105 |
|
|
res = -res;
|
| 4106 |
|
|
100029fc: e1 60 58 02 l.sub r11,r0,r11
|
| 4107 |
|
|
|
| 4108 |
|
|
return res;
|
| 4109 |
|
|
}
|
| 4110 |
|
|
10002a00: 85 21 ff fc l.lwz r9,-4(r1)
|
| 4111 |
|
|
10002a04: 84 21 ff f8 l.lwz r1,-8(r1)
|
| 4112 |
|
|
10002a08: 44 00 48 00 l.jr r9
|
| 4113 |
|
|
|
| 4114 |
|
|
10002a0c :
|
| 4115 |
|
|
see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
|
| 4116 |
|
|
. */
|
| 4117 |
|
|
|
| 4118 |
|
|
unsigned long
|
| 4119 |
|
|
udivmodsi4(unsigned long num, unsigned long den, int modwanted)
|
| 4120 |
|
|
{
|
| 4121 |
|
|
10002a0c: d7 e1 0f fc l.sw -4(r1),r1
|
| 4122 |
|
|
unsigned long bit = 1;
|
| 4123 |
|
|
unsigned long res = 0;
|
| 4124 |
|
|
|
| 4125 |
|
|
while (den < num && bit && !(den & (1L<<31)))
|
| 4126 |
|
|
10002a10: e4 64 18 00 l.sfgeu r4,r3
|
| 4127 |
|
|
see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
|
| 4128 |
|
|
. */
|
| 4129 |
|
|
|
| 4130 |
|
|
unsigned long
|
| 4131 |
|
|
udivmodsi4(unsigned long num, unsigned long den, int modwanted)
|
| 4132 |
|
|
{
|
| 4133 |
|
|
10002a14: 9c 21 ff fc l.addi r1,r1,-4
|
| 4134 |
|
|
unsigned long bit = 1;
|
| 4135 |
|
|
unsigned long res = 0;
|
| 4136 |
|
|
|
| 4137 |
|
|
while (den < num && bit && !(den & (1L<<31)))
|
| 4138 |
|
|
10002a18: 10 00 00 26 l.bf 10002ab0
|
| 4139 |
|
|
10002a1c: bd 64 00 00 l.sfgesi r4,0
|
| 4140 |
|
|
. */
|
| 4141 |
|
|
|
| 4142 |
|
|
unsigned long
|
| 4143 |
|
|
udivmodsi4(unsigned long num, unsigned long den, int modwanted)
|
| 4144 |
|
|
{
|
| 4145 |
|
|
unsigned long bit = 1;
|
| 4146 |
|
|
10002a20: 9c c0 00 01 l.addi r6,r0,1
|
| 4147 |
|
|
unsigned long res = 0;
|
| 4148 |
|
|
|
| 4149 |
|
|
while (den < num && bit && !(den & (1L<<31)))
|
| 4150 |
|
|
10002a24: 10 00 00 06 l.bf 10002a3c
|
| 4151 |
|
|
10002a28: 00 00 00 13 l.j 10002a74
|
| 4152 |
|
|
10002a2c: bd 88 00 00 l.sfltsi r8,0
|
| 4153 |
|
|
10002a30: 0c 00 00 0e l.bnf 10002a68
|
| 4154 |
|
|
10002a34: bd 84 00 00 l.sfltsi r4,0
|
| 4155 |
|
|
10002a38: 10 00 00 0f l.bf 10002a74
|
| 4156 |
|
|
{
|
| 4157 |
|
|
den <<=1;
|
| 4158 |
|
|
bit <<=1;
|
| 4159 |
|
|
10002a3c: e0 c6 30 00 l.add r6,r6,r6
|
| 4160 |
|
|
unsigned long bit = 1;
|
| 4161 |
|
|
unsigned long res = 0;
|
| 4162 |
|
|
|
| 4163 |
|
|
while (den < num && bit && !(den & (1L<<31)))
|
| 4164 |
|
|
{
|
| 4165 |
|
|
den <<=1;
|
| 4166 |
|
|
10002a40: e0 84 20 00 l.add r4,r4,r4
|
| 4167 |
|
|
udivmodsi4(unsigned long num, unsigned long den, int modwanted)
|
| 4168 |
|
|
{
|
| 4169 |
|
|
unsigned long bit = 1;
|
| 4170 |
|
|
unsigned long res = 0;
|
| 4171 |
|
|
|
| 4172 |
|
|
while (den < num && bit && !(den & (1L<<31)))
|
| 4173 |
|
|
10002a44: e1 00 30 02 l.sub r8,r0,r6
|
| 4174 |
|
|
10002a48: e4 43 20 00 l.sfgtu r3,r4
|
| 4175 |
|
|
10002a4c: 9c e0 00 01 l.addi r7,r0,1
|
| 4176 |
|
|
10002a50: e1 08 30 04 l.or r8,r8,r6
|
| 4177 |
|
|
10002a54: 10 00 00 02 l.bf 10002a5c
|
| 4178 |
|
|
10002a58: 9c e0 00 00 l.addi r7,r0,0
|
| 4179 |
|
|
10002a5c: a4 e7 00 ff l.andi r7,r7,0xff
|
| 4180 |
|
|
10002a60: bc 07 00 00 l.sfeqi r7,0
|
| 4181 |
|
|
10002a64: 0f ff ff f2 l.bnf 10002a2c
|
| 4182 |
|
|
{
|
| 4183 |
|
|
den <<=1;
|
| 4184 |
|
|
bit <<=1;
|
| 4185 |
|
|
}
|
| 4186 |
|
|
while (bit)
|
| 4187 |
|
|
10002a68: bc 26 00 00 l.sfnei r6,0
|
| 4188 |
|
|
10002a6c: a9 66 00 00 l.ori r11,r6,0x0
|
| 4189 |
|
|
10002a70: 0c 00 00 0a l.bnf 10002a98
|
| 4190 |
|
|
unsigned long res = 0;
|
| 4191 |
|
|
|
| 4192 |
|
|
while (den < num && bit && !(den & (1L<<31)))
|
| 4193 |
|
|
{
|
| 4194 |
|
|
den <<=1;
|
| 4195 |
|
|
bit <<=1;
|
| 4196 |
|
|
10002a74: 9d 60 00 00 l.addi r11,r0,0
|
| 4197 |
|
|
}
|
| 4198 |
|
|
while (bit)
|
| 4199 |
|
|
{
|
| 4200 |
|
|
if (num >= den)
|
| 4201 |
|
|
10002a78: e4 83 20 00 l.sfltu r3,r4
|
| 4202 |
|
|
10002a7c: 10 00 00 03 l.bf 10002a88
|
| 4203 |
|
|
{
|
| 4204 |
|
|
num -= den;
|
| 4205 |
|
|
10002a80: e0 63 20 02 l.sub r3,r3,r4
|
| 4206 |
|
|
res |= bit;
|
| 4207 |
|
|
10002a84: e1 6b 30 04 l.or r11,r11,r6
|
| 4208 |
|
|
}
|
| 4209 |
|
|
bit >>=1;
|
| 4210 |
|
|
10002a88: b8 c6 00 41 l.srli r6,r6,0x1
|
| 4211 |
|
|
den >>=1;
|
| 4212 |
|
|
10002a8c: b8 84 00 41 l.srli r4,r4,0x1
|
| 4213 |
|
|
while (den < num && bit && !(den & (1L<<31)))
|
| 4214 |
|
|
{
|
| 4215 |
|
|
den <<=1;
|
| 4216 |
|
|
bit <<=1;
|
| 4217 |
|
|
}
|
| 4218 |
|
|
while (bit)
|
| 4219 |
|
|
10002a90: bc 06 00 00 l.sfeqi r6,0
|
| 4220 |
|
|
10002a94: 0f ff ff f9 l.bnf 10002a78
|
| 4221 |
|
|
res |= bit;
|
| 4222 |
|
|
}
|
| 4223 |
|
|
bit >>=1;
|
| 4224 |
|
|
den >>=1;
|
| 4225 |
|
|
}
|
| 4226 |
|
|
if (modwanted) return num;
|
| 4227 |
|
|
10002a98: bc 05 00 00 l.sfeqi r5,0
|
| 4228 |
|
|
10002a9c: 10 00 00 02 l.bf 10002aa4
|
| 4229 |
|
|
10002aa0: a9 63 00 00 l.ori r11,r3,0x0
|
| 4230 |
|
|
return res;
|
| 4231 |
|
|
}
|
| 4232 |
|
|
10002aa4: 9c 21 00 04 l.addi r1,r1,4
|
| 4233 |
|
|
10002aa8: 84 21 ff fc l.lwz r1,-4(r1)
|
| 4234 |
|
|
10002aac: 44 00 48 00 l.jr r9
|
| 4235 |
|
|
udivmodsi4(unsigned long num, unsigned long den, int modwanted)
|
| 4236 |
|
|
{
|
| 4237 |
|
|
unsigned long bit = 1;
|
| 4238 |
|
|
unsigned long res = 0;
|
| 4239 |
|
|
|
| 4240 |
|
|
while (den < num && bit && !(den & (1L<<31)))
|
| 4241 |
|
|
10002ab0: 9c c0 00 01 l.addi r6,r0,1
|
| 4242 |
|
|
10002ab4: 03 ff ff f0 l.j 10002a74
|
| 4243 |
|
|
|
| 4244 |
|
|
10002ab8 <__mulsi3>:
|
| 4245 |
|
|
|
| 4246 |
|
|
typedef unsigned int USItype __attribute__ ((mode (SI)));
|
| 4247 |
|
|
|
| 4248 |
|
|
USItype
|
| 4249 |
|
|
__mulsi3 (USItype a, USItype b)
|
| 4250 |
|
|
{
|
| 4251 |
|
|
10002ab8: d7 e1 0f fc l.sw -4(r1),r1
|
| 4252 |
|
|
USItype c = 0;
|
| 4253 |
|
|
|
| 4254 |
|
|
while (a != 0)
|
| 4255 |
|
|
10002abc: bc 03 00 00 l.sfeqi r3,0
|
| 4256 |
|
|
|
| 4257 |
|
|
typedef unsigned int USItype __attribute__ ((mode (SI)));
|
| 4258 |
|
|
|
| 4259 |
|
|
USItype
|
| 4260 |
|
|
__mulsi3 (USItype a, USItype b)
|
| 4261 |
|
|
{
|
| 4262 |
|
|
10002ac0: 9c 21 ff fc l.addi r1,r1,-4
|
| 4263 |
|
|
USItype c = 0;
|
| 4264 |
|
|
|
| 4265 |
|
|
while (a != 0)
|
| 4266 |
|
|
10002ac4: 10 00 00 0d l.bf 10002af8 <__mulsi3+0x40>
|
| 4267 |
|
|
typedef unsigned int USItype __attribute__ ((mode (SI)));
|
| 4268 |
|
|
|
| 4269 |
|
|
USItype
|
| 4270 |
|
|
__mulsi3 (USItype a, USItype b)
|
| 4271 |
|
|
{
|
| 4272 |
|
|
USItype c = 0;
|
| 4273 |
|
|
10002ac8: 9d 60 00 00 l.addi r11,r0,0
|
| 4274 |
|
|
|
| 4275 |
|
|
while (a != 0)
|
| 4276 |
|
|
{
|
| 4277 |
|
|
if (a & 1)
|
| 4278 |
|
|
10002acc: a4 a3 00 01 l.andi r5,r3,0x1
|
| 4279 |
|
|
10002ad0: b8 63 00 41 l.srli r3,r3,0x1
|
| 4280 |
|
|
10002ad4: bc 05 00 00 l.sfeqi r5,0
|
| 4281 |
|
|
10002ad8: 10 00 00 02 l.bf 10002ae0 <__mulsi3+0x28>
|
| 4282 |
|
|
c += b;
|
| 4283 |
|
|
10002adc: e1 6b 20 00 l.add r11,r11,r4
|
| 4284 |
|
|
USItype
|
| 4285 |
|
|
__mulsi3 (USItype a, USItype b)
|
| 4286 |
|
|
{
|
| 4287 |
|
|
USItype c = 0;
|
| 4288 |
|
|
|
| 4289 |
|
|
while (a != 0)
|
| 4290 |
|
|
10002ae0: bc 03 00 00 l.sfeqi r3,0
|
| 4291 |
|
|
{
|
| 4292 |
|
|
if (a & 1)
|
| 4293 |
|
|
c += b;
|
| 4294 |
|
|
a >>= 1;
|
| 4295 |
|
|
b <<= 1;
|
| 4296 |
|
|
10002ae4: e0 84 20 00 l.add r4,r4,r4
|
| 4297 |
|
|
USItype
|
| 4298 |
|
|
__mulsi3 (USItype a, USItype b)
|
| 4299 |
|
|
{
|
| 4300 |
|
|
USItype c = 0;
|
| 4301 |
|
|
|
| 4302 |
|
|
while (a != 0)
|
| 4303 |
|
|
10002ae8: 0f ff ff f9 l.bnf 10002acc <__mulsi3+0x14>
|
| 4304 |
|
|
a >>= 1;
|
| 4305 |
|
|
b <<= 1;
|
| 4306 |
|
|
}
|
| 4307 |
|
|
|
| 4308 |
|
|
return c;
|
| 4309 |
|
|
}
|
| 4310 |
|
|
10002aec: 9c 21 00 04 l.addi r1,r1,4
|
| 4311 |
|
|
10002af0: 84 21 ff fc l.lwz r1,-4(r1)
|
| 4312 |
|
|
10002af4: 44 00 48 00 l.jr r9
|
| 4313 |
|
|
typedef unsigned int USItype __attribute__ ((mode (SI)));
|
| 4314 |
|
|
|
| 4315 |
|
|
USItype
|
| 4316 |
|
|
__mulsi3 (USItype a, USItype b)
|
| 4317 |
|
|
{
|
| 4318 |
|
|
USItype c = 0;
|
| 4319 |
|
|
10002af8: a9 63 00 00 l.ori r11,r3,0x0
|
| 4320 |
|
|
10002afc: 03 ff ff fc l.j 10002aec <__mulsi3+0x34>
|
| 4321 |
|
|
10002b00: 10 00 12 b8 l.bf 100075e0 <_end+0x35d0>
|
| 4322 |
|
|
10002b04: 10 00 11 a0 l.bf 10007184 <_end+0x3174>
|
| 4323 |
|
|
10002b08: 10 00 11 bc l.bf 100071f8 <_end+0x31e8>
|
| 4324 |
|
|
10002b0c: 10 00 11 f0 l.bf 100072cc <_end+0x32bc>
|
| 4325 |
|
|
10002b10: 10 00 12 24 l.bf 100073a0 <_end+0x3390>
|
| 4326 |
|
|
10002b14: 10 00 12 58 l.bf 10007474 <_end+0x3464>
|
| 4327 |
|
|
10002b18: 10 00 12 78 l.bf 100074f8 <_end+0x34e8>
|
| 4328 |
|
|
10002b1c: 10 00 12 98 l.bf 1000757c <_end+0x356c>
|
| 4329 |
|
|
10002b20: 10 00 11 10 l.bf 10006f60 <_end+0x2f50>
|
| 4330 |
|
|
10002b24: 10 00 18 dc l.bf 10008e94 <_end+0x4e84>
|
| 4331 |
|
|
10002b28: 10 00 16 2c l.bf 100083d8 <_end+0x43c8>
|
| 4332 |
|
|
10002b2c: 10 00 16 2c l.bf 100083dc <_end+0x43cc>
|
| 4333 |
|
|
10002b30: 10 00 16 2c l.bf 100083e0 <_end+0x43d0>
|
| 4334 |
|
|
10002b34: 10 00 16 2c l.bf 100083e4 <_end+0x43d4>
|
| 4335 |
|
|
10002b38: 10 00 16 2c l.bf 100083e8 <_end+0x43d8>
|
| 4336 |
|
|
10002b3c: 10 00 16 2c l.bf 100083ec <_end+0x43dc>
|
| 4337 |
|
|
10002b40: 10 00 16 2c l.bf 100083f0 <_end+0x43e0>
|
| 4338 |
|
|
10002b44: 10 00 18 c4 l.bf 10008e54 <_end+0x4e44>
|
| 4339 |
|
|
10002b48: 10 00 18 ac l.bf 10008df8 <_end+0x4de8>
|
| 4340 |
|
|
10002b4c: 10 00 16 2c l.bf 100083fc <_end+0x43ec>
|
| 4341 |
|
|
10002b50: 10 00 16 2c l.bf 10008400 <_end+0x43f0>
|
| 4342 |
|
|
10002b54: 10 00 16 2c l.bf 10008404 <_end+0x43f4>
|
| 4343 |
|
|
10002b58: 10 00 16 2c l.bf 10008408 <_end+0x43f8>
|
| 4344 |
|
|
10002b5c: 10 00 16 2c l.bf 1000840c <_end+0x43fc>
|
| 4345 |
|
|
10002b60: 10 00 16 2c l.bf 10008410 <_end+0x4400>
|
| 4346 |
|
|
10002b64: 10 00 16 2c l.bf 10008414 <_end+0x4404>
|
| 4347 |
|
|
10002b68: 10 00 16 2c l.bf 10008418 <_end+0x4408>
|
| 4348 |
|
|
10002b6c: 10 00 16 2c l.bf 1000841c <_end+0x440c>
|
| 4349 |
|
|
10002b70: 10 00 16 2c l.bf 10008420 <_end+0x4410>
|
| 4350 |
|
|
10002b74: 10 00 16 2c l.bf 10008424 <_end+0x4414>
|
| 4351 |
|
|
10002b78: 10 00 16 2c l.bf 10008428 <_end+0x4418>
|
| 4352 |
|
|
10002b7c: 10 00 16 2c l.bf 1000842c <_end+0x441c>
|
| 4353 |
|
|
10002b80: 10 00 16 2c l.bf 10008430 <_end+0x4420>
|
| 4354 |
|
|
10002b84: 10 00 16 2c l.bf 10008434 <_end+0x4424>
|
| 4355 |
|
|
10002b88: 10 00 16 2c l.bf 10008438 <_end+0x4428>
|
| 4356 |
|
|
10002b8c: 10 00 16 2c l.bf 1000843c <_end+0x442c>
|
| 4357 |
|
|
10002b90: 10 00 16 2c l.bf 10008440 <_end+0x4430>
|
| 4358 |
|
|
10002b94: 10 00 16 2c l.bf 10008444 <_end+0x4434>
|
| 4359 |
|
|
10002b98: 10 00 16 2c l.bf 10008448 <_end+0x4438>
|
| 4360 |
|
|
10002b9c: 10 00 16 2c l.bf 1000844c <_end+0x443c>
|
| 4361 |
|
|
10002ba0: 10 00 16 2c l.bf 10008450 <_end+0x4440>
|
| 4362 |
|
|
10002ba4: 10 00 16 2c l.bf 10008454 <_end+0x4444>
|
| 4363 |
|
|
10002ba8: 10 00 16 2c l.bf 10008458 <_end+0x4448>
|
| 4364 |
|
|
10002bac: 10 00 16 2c l.bf 1000845c <_end+0x444c>
|
| 4365 |
|
|
10002bb0: 10 00 16 2c l.bf 10008460 <_end+0x4450>
|
| 4366 |
|
|
10002bb4: 10 00 16 2c l.bf 10008464 <_end+0x4454>
|
| 4367 |
|
|
10002bb8: 10 00 16 2c l.bf 10008468 <_end+0x4458>
|
| 4368 |
|
|
10002bbc: 10 00 16 2c l.bf 1000846c <_end+0x445c>
|
| 4369 |
|
|
10002bc0: 10 00 16 2c l.bf 10008470 <_end+0x4460>
|
| 4370 |
|
|
10002bc4: 10 00 16 2c l.bf 10008474 <_end+0x4464>
|
| 4371 |
|
|
10002bc8: 10 00 16 2c l.bf 10008478 <_end+0x4468>
|
| 4372 |
|
|
10002bcc: 10 00 16 2c l.bf 1000847c <_end+0x446c>
|
| 4373 |
|
|
10002bd0: 10 00 16 2c l.bf 10008480 <_end+0x4470>
|
| 4374 |
|
|
10002bd4: 10 00 16 2c l.bf 10008484 <_end+0x4474>
|
| 4375 |
|
|
10002bd8: 10 00 16 2c l.bf 10008488 <_end+0x4478>
|
| 4376 |
|
|
10002bdc: 10 00 16 2c l.bf 1000848c <_end+0x447c>
|
| 4377 |
|
|
10002be0: 10 00 16 2c l.bf 10008490 <_end+0x4480>
|
| 4378 |
|
|
10002be4: 10 00 16 2c l.bf 10008494 <_end+0x4484>
|
| 4379 |
|
|
10002be8: 10 00 16 2c l.bf 10008498 <_end+0x4488>
|
| 4380 |
|
|
10002bec: 10 00 16 2c l.bf 1000849c <_end+0x448c>
|
| 4381 |
|
|
10002bf0: 10 00 16 2c l.bf 100084a0 <_end+0x4490>
|
| 4382 |
|
|
10002bf4: 10 00 16 2c l.bf 100084a4 <_end+0x4494>
|
| 4383 |
|
|
10002bf8: 10 00 16 2c l.bf 100084a8 <_end+0x4498>
|
| 4384 |
|
|
10002bfc: 10 00 16 2c l.bf 100084ac <_end+0x449c>
|
| 4385 |
|
|
10002c00: 10 00 18 7c l.bf 10008df0 <_end+0x4de0>
|
| 4386 |
|
|
10002c04: 10 00 16 2c l.bf 100084b4 <_end+0x44a4>
|
| 4387 |
|
|
10002c08: 10 00 16 2c l.bf 100084b8 <_end+0x44a8>
|
| 4388 |
|
|
10002c0c: 10 00 16 2c l.bf 100084bc <_end+0x44ac>
|
| 4389 |
|
|
10002c10: 10 00 16 2c l.bf 100084c0 <_end+0x44b0>
|
| 4390 |
|
|
10002c14: 10 00 16 2c l.bf 100084c4 <_end+0x44b4>
|
| 4391 |
|
|
10002c18: 10 00 16 2c l.bf 100084c8 <_end+0x44b8>
|
| 4392 |
|
|
10002c1c: 10 00 18 68 l.bf 10008dbc <_end+0x4dac>
|
| 4393 |
|
|
10002c20: 10 00 18 50 l.bf 10008d60 <_end+0x4d50>
|
| 4394 |
|
|
10002c24: 10 00 16 2c l.bf 100084d4 <_end+0x44c4>
|
| 4395 |
|
|
10002c28: 10 00 16 2c l.bf 100084d8 <_end+0x44c8>
|
| 4396 |
|
|
10002c2c: 10 00 16 2c l.bf 100084dc <_end+0x44cc>
|
| 4397 |
|
|
10002c30: 10 00 16 2c l.bf 100084e0 <_end+0x44d0>
|
| 4398 |
|
|
10002c34: 10 00 16 2c l.bf 100084e4 <_end+0x44d4>
|
| 4399 |
|
|
10002c38: 10 00 16 2c l.bf 100084e8 <_end+0x44d8>
|
| 4400 |
|
|
10002c3c: 10 00 16 2c l.bf 100084ec <_end+0x44dc>
|
| 4401 |
|
|
10002c40: 10 00 18 3c l.bf 10008d30 <_end+0x4d20>
|
| 4402 |
|
|
10002c44: 10 00 16 2c l.bf 100084f4 <_end+0x44e4>
|
| 4403 |
|
|
10002c48: 10 00 16 2c l.bf 100084f8 <_end+0x44e8>
|
| 4404 |
|
|
10002c4c: 10 00 16 2c l.bf 100084fc <_end+0x44ec>
|
| 4405 |
|
|
10002c50: 10 00 18 1c l.bf 10008cc0 <_end+0x4cb0>
|
| 4406 |
|
|
10002c54: 10 00 16 2c l.bf 10008504 <_end+0x44f4>
|
| 4407 |
|
|
10002c58: 10 00 16 2c l.bf 10008508 <_end+0x44f8>
|
| 4408 |
|
|
10002c5c: 10 00 17 34 l.bf 1000892c <_end+0x491c>
|
| 4409 |
|
|
10002c60: 10 00 16 2c l.bf 10008510 <_end+0x4500>
|
| 4410 |
|
|
10002c64: 10 00 16 2c l.bf 10008514 <_end+0x4504>
|
| 4411 |
|
|
10002c68: 10 00 16 2c l.bf 10008518 <_end+0x4508>
|
| 4412 |
|
|
10002c6c: 10 00 16 2c l.bf 1000851c <_end+0x450c>
|
| 4413 |
|
|
10002c70: 10 00 18 1c l.bf 10008ce0 <_end+0x4cd0>
|
| 4414 |
|
|
10002c74: 41 73 73 65 *unknown*
|
| 4415 |
|
|
10002c78: 72 74 20 66 *unknown*
|
| 4416 |
|
|
10002c7c: 61 69 6c 65 *unknown*
|
| 4417 |
|
|
10002c80: 64 3a 20 25 *unknown*
|
| 4418 |
|
|
10002c84: 73 20 28 25 *unknown*
|
| 4419 |
|
|
10002c88: 73 3a 25 64 *unknown*
|
| 4420 |
|
|
10002c8c: 29 0a 00 22 *unknown*
|
| 4421 |
|
|
10002c90: 53 59 53 43 *unknown*
|
| 4422 |
|
|
10002c94: 41 4c 4c 21 *unknown*
|
| 4423 |
|
|
10002c98: 22 00 2e 2e *unknown*
|
| 4424 |
|
|
10002c9c: 2f 63 6f 6d *unknown*
|
| 4425 |
|
|
10002ca0: 6d 6f 6e 2f *unknown*
|
| 4426 |
|
|
10002ca4: 65 78 63 65 *unknown*
|
| 4427 |
|
|
10002ca8: 70 74 69 6f *unknown*
|
| 4428 |
|
|
10002cac: 6e 2e 63 00 *unknown*
|
| 4429 |
|
|
10002cb0: 22 42 52 45 *unknown*
|
| 4430 |
|
|
10002cb4: 41 4b 21 22 *unknown*
|
| 4431 |
|
|
10002cb8: 00 22 45 58 l.j 10894218 <_end+0x890208>
|
| 4432 |
|
|
10002cbc: 54 5f 49 4e *unknown*
|
| 4433 |
|
|
10002cc0: 54 21 22 00 *unknown*
|
| 4434 |
|
|
10002cc4: 22 46 41 55 *unknown*
|
| 4435 |
|
|
10002cc8: 4c 54 22 00 *unknown*
|
| 4436 |
|
|
10002ccc: 22 4d 55 4c *unknown*
|
| 4437 |
|
|
10002cd0: 54 21 22 00 *unknown*
|
| 4438 |
|
|
10002cd4: 22 55 4d 55 *unknown*
|
| 4439 |
|
|
10002cd8: 4c 54 21 22 *unknown*
|
| 4440 |
|
|
10002cdc: 00 22 44 49 l.j 10893e00 <_end+0x88fdf0>
|
| 4441 |
|
|
10002ce0: 56 21 22 00 *unknown*
|
| 4442 |
|
|
10002ce4: 22 55 44 49 *unknown*
|
| 4443 |
|
|
10002ce8: 56 21 22 00 *unknown*
|
| 4444 |
|
|
10002cec: 22 55 4e 4b *unknown*
|
| 4445 |
|
|
10002cf0: 4e 4f 57 4e *unknown*
|
| 4446 |
|
|
10002cf4: 22 00 72 65 *unknown*
|
| 4447 |
|
|
10002cf8: 63 75 72 73 *unknown*
|
| 4448 |
|
|
10002cfc: 69 76 65 5f *unknown*
|
| 4449 |
|
|
10002d00: 69 6e 74 20 *unknown*
|
| 4450 |
|
|
10002d04: 3d 3d 20 30 *unknown*
|
| 4451 |
|
|
10002d08: 00 0a 54 65 l.j 10297e9c <_end+0x293e8c>
|
| 4452 |
|
|
10002d0c: 73 74 3a 0a *unknown*
|
| 4453 |
|
|
10002d10: 00 31 2e 20 l.j 10c4e590 <_end+0xc4a580>
|
| 4454 |
|
|
10002d14: 49 6e 69 74 *unknown*
|
| 4455 |
|
|
10002d18: 69 61 6c 69 *unknown*
|
| 4456 |
|
|
10002d1c: 73 65 64 20 *unknown*
|
| 4457 |
|
|
10002d20: 64 61 74 61 *unknown*
|
| 4458 |
|
|
10002d24: 0a 00 76 61 *unknown*
|
| 4459 |
|
|
10002d28: 72 20 3d 3d *unknown*
|
| 4460 |
|
|
10002d2c: 20 30 78 31 *unknown*
|
| 4461 |
|
|
10002d30: 32 33 34 00 *unknown*
|
| 4462 |
|
|
10002d34: 74 65 73 74 *unknown*
|
| 4463 |
|
|
10002d38: 2e 63 00 75 *unknown*
|
| 4464 |
|
|
10002d3c: 76 61 72 20 *unknown*
|
| 4465 |
|
|
10002d40: 3d 3d 20 30 *unknown*
|
| 4466 |
|
|
10002d44: 78 30 00 32 *unknown*
|
| 4467 |
|
|
10002d48: 2e 20 4d 75 *unknown*
|
| 4468 |
|
|
10002d4c: 6c 74 69 70 *unknown*
|
| 4469 |
|
|
10002d50: 6c 79 0a 00 *unknown*
|
| 4470 |
|
|
10002d54: 76 61 72 20 *unknown*
|
| 4471 |
|
|
10002d58: 3d 3d 20 31 *unknown*
|
| 4472 |
|
|
10002d5c: 33 39 38 30 *unknown*
|
| 4473 |
|
|
10002d60: 00 76 61 72 l.j 11d9b328 <_end+0x1d97318>
|
| 4474 |
|
|
10002d64: 20 3d 3d 20 *unknown*
|
| 4475 |
|
|
10002d68: 2d 33 00 76 *unknown*
|
| 4476 |
|
|
10002d6c: 61 72 20 3d *unknown*
|
| 4477 |
|
|
10002d70: 3d 20 2d 36 *unknown*
|
| 4478 |
|
|
10002d74: 35 00 76 61 *unknown*
|
| 4479 |
|
|
10002d78: 72 20 3d 3d *unknown*
|
| 4480 |
|
|
10002d7c: 20 28 2d 35 *unknown*
|
| 4481 |
|
|
10002d80: 2a 2d 31 33 *unknown*
|
| 4482 |
|
|
10002d84: 29 00 76 61 *unknown*
|
| 4483 |
|
|
10002d88: 72 20 3d 3d *unknown*
|
| 4484 |
|
|
10002d8c: 20 28 2d 31 *unknown*
|
| 4485 |
|
|
10002d90: 32 33 31 32 *unknown*
|
| 4486 |
|
|
10002d94: 33 34 31 35 *unknown*
|
| 4487 |
|
|
10002d98: 2a 39 36 36 *unknown*
|
| 4488 |
|
|
10002d9c: 34 35 36 33 *unknown*
|
| 4489 |
|
|
10002da0: 29 00 33 2e *unknown*
|
| 4490 |
|
|
10002da4: 20 44 69 76 *unknown*
|
| 4491 |
|
|
10002da8: 69 64 65 0a *unknown*
|
| 4492 |
|
|
10002dac: 00 76 61 72 l.j 11d9b374 <_end+0x1d97364>
|
| 4493 |
|
|
10002db0: 20 3d 3d 20 *unknown*
|
| 4494 |
|
|
10002db4: 32 37 39 36 *unknown*
|
| 4495 |
|
|
10002db8: 00 76 61 72 l.j 11d9b380 <_end+0x1d97370>
|
| 4496 |
|
|
10002dbc: 20 3d 3d 20 *unknown*
|
| 4497 |
|
|
10002dc0: 39 36 00 76 *unknown*
|
| 4498 |
|
|
10002dc4: 61 72 20 3d *unknown*
|
| 4499 |
|
|
10002dc8: 3d 20 2d 36 *unknown*
|
| 4500 |
|
|
10002dcc: 37 00 34 2e *unknown*
|
| 4501 |
|
|
10002dd0: 20 53 68 69 *unknown*
|
| 4502 |
|
|
10002dd4: 66 74 20 6c *unknown*
|
| 4503 |
|
|
10002dd8: 65 66 74 0a *unknown*
|
| 4504 |
|
|
10002ddc: 00 76 61 72 l.j 11d9b3a4 <_end+0x1d97394>
|
| 4505 |
|
|
10002de0: 20 3d 3d 20 *unknown*
|
| 4506 |
|
|
10002de4: 30 78 38 30 *unknown*
|
| 4507 |
|
|
10002de8: 30 30 30 30 *unknown*
|
| 4508 |
|
|
10002dec: 30 30 00 35 *unknown*
|
| 4509 |
|
|
10002df0: 2e 20 53 68 *unknown*
|
| 4510 |
|
|
10002df4: 69 66 74 20 *unknown*
|
| 4511 |
|
|
10002df8: 72 69 67 68 *unknown*
|
| 4512 |
|
|
10002dfc: 74 0a 00 75 *unknown*
|
| 4513 |
|
|
10002e00: 76 61 72 20 *unknown*
|
| 4514 |
|
|
10002e04: 3d 3d 20 30 *unknown*
|
| 4515 |
|
|
10002e08: 78 34 30 30 *unknown*
|
| 4516 |
|
|
10002e0c: 30 30 30 30 *unknown*
|
| 4517 |
|
|
10002e10: 30 00 75 76 *unknown*
|
| 4518 |
|
|
10002e14: 61 72 20 3d *unknown*
|
| 4519 |
|
|
10002e18: 3d 20 30 78 *unknown*
|
| 4520 |
|
|
10002e1c: 30 30 30 30 *unknown*
|
| 4521 |
|
|
10002e20: 30 30 30 31 *unknown*
|
| 4522 |
|
|
10002e24: 00 36 2e 20 l.j 10d8e6a4 <_end+0xd8a694>
|
| 4523 |
|
|
10002e28: 53 68 69 66 *unknown*
|
| 4524 |
|
|
10002e2c: 74 20 72 69 *unknown*
|
| 4525 |
|
|
10002e30: 67 68 74 20 *unknown*
|
| 4526 |
|
|
10002e34: 61 72 69 74 *unknown*
|
| 4527 |
|
|
10002e38: 68 6d 65 74 *unknown*
|
| 4528 |
|
|
10002e3c: 69 63 0a 00 *unknown*
|
| 4529 |
|
|
10002e40: 76 61 72 20 *unknown*
|
| 4530 |
|
|
10002e44: 3d 3d 20 30 *unknown*
|
| 4531 |
|
|
10002e48: 78 43 30 30 *unknown*
|
| 4532 |
|
|
10002e4c: 30 30 30 30 *unknown*
|
| 4533 |
|
|
10002e50: 30 00 37 2e *unknown*
|
| 4534 |
|
|
10002e54: 20 53 69 67 *unknown*
|
| 4535 |
|
|
10002e58: 6e 65 64 20 *unknown*
|
| 4536 |
|
|
10002e5c: 63 6f 6d 70 *unknown*
|
| 4537 |
|
|
10002e60: 61 72 69 73 *unknown*
|
| 4538 |
|
|
10002e64: 69 6f 6e 0a *unknown*
|
| 4539 |
|
|
10002e68: 00 76 61 72 l.j 11d9b430 <_end+0x1d97420>
|
| 4540 |
|
|
10002e6c: 20 3c 20 31 *unknown*
|
| 4541 |
|
|
10002e70: 00 76 61 72 l.j 11d9b438 <_end+0x1d97428>
|
| 4542 |
|
|
10002e74: 20 3c 20 78 *unknown*
|
| 4543 |
|
|
10002e78: 00 21 28 76 l.j 1084d050 <_end+0x849040>
|
| 4544 |
|
|
10002e7c: 61 72 20 3e *unknown*
|
| 4545 |
|
|
10002e80: 20 78 29 00 *unknown*
|
| 4546 |
|
|
10002e84: 76 61 72 20 *unknown*
|
| 4547 |
|
|
10002e88: 3e 20 78 00 *unknown*
|
| 4548 |
|
|
10002e8c: 78 20 3c 3d *unknown*
|
| 4549 |
|
|
10002e90: 20 76 61 72 *unknown*
|
| 4550 |
|
|
10002e94: 00 38 2e 20 l.j 10e0e714 <_end+0xe0a704>
|
| 4551 |
|
|
10002e98: 57 6f 72 64 *unknown*
|
| 4552 |
|
|
10002e9c: 20 61 63 63 *unknown*
|
| 4553 |
|
|
10002ea0: 65 73 73 0a *unknown*
|
| 4554 |
|
|
10002ea4: 00 75 76 61 l.j 11d60828 <_end+0x1d5c818>
|
| 4555 |
|
|
10002ea8: 72 20 3d 3d *unknown*
|
| 4556 |
|
|
10002eac: 20 30 78 31 *unknown*
|
| 4557 |
|
|
10002eb0: 32 33 34 35 *unknown*
|
| 4558 |
|
|
10002eb4: 36 37 38 00 *unknown*
|
| 4559 |
|
|
10002eb8: 73 77 20 3d *unknown*
|
| 4560 |
|
|
10002ebc: 3d 20 30 78 *unknown*
|
| 4561 |
|
|
10002ec0: 35 36 37 38 *unknown*
|
| 4562 |
|
|
10002ec4: 00 2a 70 73 l.j 10a9f090 <_end+0xa9b080>
|
| 4563 |
|
|
10002ec8: 77 2b 2b 20 *unknown*
|
| 4564 |
|
|
10002ecc: 3d 3d 20 30 *unknown*
|
| 4565 |
|
|
10002ed0: 78 31 32 33 *unknown*
|
| 4566 |
|
|
10002ed4: 34 00 2a 70 *unknown*
|
| 4567 |
|
|
10002ed8: 73 77 2b 2b *unknown*
|
| 4568 |
|
|
10002edc: 20 3d 3d 20 *unknown*
|
| 4569 |
|
|
10002ee0: 30 78 35 36 *unknown*
|
| 4570 |
|
|
10002ee4: 37 38 00 2a *unknown*
|
| 4571 |
|
|
10002ee8: 70 73 77 2b *unknown*
|
| 4572 |
|
|
10002eec: 2b 20 3d 3d *unknown*
|
| 4573 |
|
|
10002ef0: 20 30 78 63 *unknown*
|
| 4574 |
|
|
10002ef4: 61 66 65 00 *unknown*
|
| 4575 |
|
|
10002ef8: 2a 70 73 77 *unknown*
|
| 4576 |
|
|
10002efc: 2b 2b 20 3d *unknown*
|
| 4577 |
|
|
10002f00: 3d 20 30 78 *unknown*
|
| 4578 |
|
|
10002f04: 62 61 62 65 *unknown*
|
| 4579 |
|
|
10002f08: 00 39 2e 20 l.j 10e4e788 <_end+0xe4a778>
|
| 4580 |
|
|
10002f0c: 42 79 74 65 *unknown*
|
| 4581 |
|
|
10002f10: 20 61 63 63 *unknown*
|
| 4582 |
|
|
10002f14: 65 73 73 0a *unknown*
|
| 4583 |
|
|
10002f18: 00 73 62 20 l.j 11cdb798 <_end+0x1cd7788>
|
| 4584 |
|
|
10002f1c: 3d 3d 20 30 *unknown*
|
| 4585 |
|
|
10002f20: 78 37 38 00 *unknown*
|
| 4586 |
|
|
10002f24: 2a 70 73 62 *unknown*
|
| 4587 |
|
|
10002f28: 2b 2b 20 3d *unknown*
|
| 4588 |
|
|
10002f2c: 3d 20 30 78 *unknown*
|
| 4589 |
|
|
10002f30: 31 32 00 2a *unknown*
|
| 4590 |
|
|
10002f34: 70 73 62 2b *unknown*
|
| 4591 |
|
|
10002f38: 2b 20 3d 3d *unknown*
|
| 4592 |
|
|
10002f3c: 20 30 78 33 *unknown*
|
| 4593 |
|
|
10002f40: 34 00 2a 70 *unknown*
|
| 4594 |
|
|
10002f44: 73 62 2b 2b *unknown*
|
| 4595 |
|
|
10002f48: 20 3d 3d 20 *unknown*
|
| 4596 |
|
|
10002f4c: 30 78 35 36 *unknown*
|
| 4597 |
|
|
10002f50: 00 2a 70 73 l.j 10a9f11c <_end+0xa9b10c>
|
| 4598 |
|
|
10002f54: 62 2b 2b 20 *unknown*
|
| 4599 |
|
|
10002f58: 3d 3d 20 30 *unknown*
|
| 4600 |
|
|
10002f5c: 78 37 38 00 *unknown*
|
| 4601 |
|
|
10002f60: 75 76 61 72 *unknown*
|
| 4602 |
|
|
10002f64: 20 3d 3d 20 *unknown*
|
| 4603 |
|
|
10002f68: 30 78 61 62 *unknown*
|
| 4604 |
|
|
10002f6c: 33 34 35 36 *unknown*
|
| 4605 |
|
|
10002f70: 37 38 00 75 *unknown*
|
| 4606 |
|
|
10002f74: 76 61 72 20 *unknown*
|
| 4607 |
|
|
10002f78: 3d 3d 20 30 *unknown*
|
| 4608 |
|
|
10002f7c: 78 61 62 63 *unknown*
|
| 4609 |
|
|
10002f80: 64 35 36 37 *unknown*
|
| 4610 |
|
|
10002f84: 38 00 75 76 *unknown*
|
| 4611 |
|
|
10002f88: 61 72 20 3d *unknown*
|
| 4612 |
|
|
10002f8c: 3d 20 30 78 *unknown*
|
| 4613 |
|
|
10002f90: 61 62 63 64 *unknown*
|
| 4614 |
|
|
10002f94: 65 66 37 38 *unknown*
|
| 4615 |
|
|
10002f98: 00 75 76 61 l.j 11d6091c <_end+0x1d5c90c>
|
| 4616 |
|
|
10002f9c: 72 20 3d 3d *unknown*
|
| 4617 |
|
|
10002fa0: 20 30 78 61 *unknown*
|
| 4618 |
|
|
10002fa4: 62 63 64 65 *unknown*
|
| 4619 |
|
|
10002fa8: 66 30 31 00 *unknown*
|
| 4620 |
|
|
10002fac: 31 30 2e 20 *unknown*
|
| 4621 |
|
|
10002fb0: 43 6f 6d 70 *unknown*
|
| 4622 |
|
|
10002fb4: 61 72 69 73 *unknown*
|
| 4623 |
|
|
10002fb8: 69 6f 6e 0a *unknown*
|
| 4624 |
|
|
10002fbc: 00 2d 20 49 l.j 10b4b0e0 <_end+0xb470d0>
|
| 4625 |
|
|
10002fc0: 6e 63 6f 72 *unknown*
|
| 4626 |
|
|
10002fc4: 72 65 63 74 *unknown*
|
| 4627 |
|
|
10002fc8: 20 63 6f 6d *unknown*
|
| 4628 |
|
|
10002fcc: 70 61 72 69 *unknown*
|
| 4629 |
|
|
10002fd0: 73 69 6f 6e *unknown*
|
| 4630 |
|
|
10002fd4: 0a 00 00 00 *unknown*
|
