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zpekic |
# __ ____ _ __
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# / |/ (_)_____________ / | / /___ _ ______ _
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# / /|_/ / / ___/ ___/ __ \/ |/ / __ \ | / / __ `/
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# / / / / / /__/ / / /_/ / /| / /_/ / |/ / /_/ /
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# /_/ /_/_/\___/_/ \____/_/ |_/\____/|___/\__,_/
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#
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# Mercury BASEBOARD User Constraints File
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# Revision 1.0.0 (03/25/2015)
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# Copyright (c) 2015 MicroNova, LLC
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# www.micro-nova.com
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# system oscillators
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NET "EXT_CLK" LOC = "P44" | IOSTANDARD = LVTTL ;
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NET "CLK" LOC = "P43" | IOSTANDARD = LVTTL ;
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NET "CLK" TNM_NET = "CLK";
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TIMESPEC "TS_CLK" = PERIOD "CLK" 20 ns HIGH 50 %;
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# PS/2
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NET "PS2_DATA" LOC = "P13" | IOSTANDARD = LVTTL ;
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NET "PS2_CLK" LOC = "P15" | IOSTANDARD = LVTTL ;
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# Buttons
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NET "USR_BTN" LOC = "P41" | IOSTANDARD = LVTTL ;
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NET "BTN<0>" LOC = "P68" | IOSTANDARD = LVTTL ;
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NET "BTN<1>" LOC = "P97" | IOSTANDARD = LVTTL ;
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NET "BTN<2>" LOC = "P7" | IOSTANDARD = LVTTL ;
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NET "BTN<3>" LOC = "P82" | IOSTANDARD = LVTTL ;
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# VGA
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NET "RED<0>" LOC = "P20" | IOSTANDARD = LVTTL ;
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NET "RED<1>" LOC = "P32" | IOSTANDARD = LVTTL ;
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NET "RED<2>" LOC = "P33" | IOSTANDARD = LVTTL ;
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NET "GRN<0>" LOC = "P34" | IOSTANDARD = LVTTL ;
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NET "GRN<1>" LOC = "P35" | IOSTANDARD = LVTTL ;
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NET "GRN<2>" LOC = "P36" | IOSTANDARD = LVTTL ;
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NET "BLU<0>" LOC = "P37" | IOSTANDARD = LVTTL ;
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NET "BLU<1>" LOC = "P40" | IOSTANDARD = LVTTL ;
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NET "HSYNC" LOC = "P16" | IOSTANDARD = LVTTL ;
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NET "VSYNC" LOC = "P19" | IOSTANDARD = LVTTL ;
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# SWITCHES
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NET "SW<0>" LOC = "P59" | IOSTANDARD = LVTTL ;
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NET "SW<1>" LOC = "P60" | IOSTANDARD = LVTTL ;
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NET "SW<2>" LOC = "P61" | IOSTANDARD = LVTTL ;
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NET "SW<3>" LOC = "P62" | IOSTANDARD = LVTTL ;
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NET "SW<4>" LOC = "P64" | IOSTANDARD = LVTTL ;
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NET "SW<5>" LOC = "P57" | IOSTANDARD = LVTTL ;
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NET "SW<6>" LOC = "P56" | IOSTANDARD = LVTTL ;
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NET "SW<7>" LOC = "P52" | IOSTANDARD = LVTTL ;
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# 7 SEG
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NET "AN<0>" LOC = "P50" | IOSTANDARD = LVTTL ;
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NET "AN<1>" LOC = "P49" | IOSTANDARD = LVTTL ;
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NET "AN<2>" LOC = "P85" | IOSTANDARD = LVTTL ;
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NET "AN<3>" LOC = "P84" | IOSTANDARD = LVTTL ;
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NET "A_TO_G<0>" LOC = "P72" | IOSTANDARD = LVTTL ;
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NET "A_TO_G<1>" LOC = "P71" | IOSTANDARD = LVTTL ;
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NET "A_TO_G<2>" LOC = "P70" | IOSTANDARD = LVTTL ;
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NET "A_TO_G<3>" LOC = "P65" | IOSTANDARD = LVTTL ;
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NET "A_TO_G<4>" LOC = "P77" | IOSTANDARD = LVTTL ;
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NET "A_TO_G<5>" LOC = "P78" | IOSTANDARD = LVTTL ;
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NET "A_TO_G<6>" LOC = "P83" | IOSTANDARD = LVTTL ;
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NET "DOT" LOC = "P73" | IOSTANDARD = LVTTL ;
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# PMOD
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NET "PMOD<0>" LOC = "P5" | IOSTANDARD = LVTTL ;
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NET "PMOD<1>" LOC = "P4" | IOSTANDARD = LVTTL ;
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NET "PMOD<2>" LOC = "P6" | IOSTANDARD = LVTTL ;
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NET "PMOD<3>" LOC = "P98" | IOSTANDARD = LVTTL ;
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NET "PMOD<4>" LOC = "P94" | IOSTANDARD = LVTTL ;
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NET "PMOD<5>" LOC = "P93" | IOSTANDARD = LVTTL ;
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NET "PMOD<6>" LOC = "P90" | IOSTANDARD = LVTTL ;
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NET "PMOD<7>" LOC = "P89" | IOSTANDARD = LVTTL ;
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# AUDIO OUT
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NET "AUDIO_OUT_R" LOC = "P88" | IOSTANDARD = LVTTL ;
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NET "AUDIO_OUT_L" LOC = "P86" | IOSTANDARD = LVTTL ;
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# memory & bus-switch
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NET "SWITCH_OEN" LOC = "P3" | IOSTANDARD = LVTTL ;
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NET "MEMORY_OEN" LOC = "P30" | IOSTANDARD = LVTTL ;
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# flash/usb interface
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NET "FPGA_CSN" LOC = "P39" | IOSTANDARD = LVTTL ;
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NET "FLASH_CSN" LOC = "P27" | IOSTANDARD = LVTTL ;
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NET "SPI_MOSI" LOC = "P46" | IOSTANDARD = LVTTL ;
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NET "SPI_MISO" LOC = "P51" | IOSTANDARD = LVTTL ;
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NET "SPI_SCK" LOC = "P53" | IOSTANDARD = LVTTL ;
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# ADC interface
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NET "ADC_MISO" LOC = "P21" | IOSTANDARD = LVTTL ;
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NET "ADC_MOSI" LOC = "P10" | IOSTANDARD = LVTTL ;
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NET "ADC_SCK" LOC = "P9" | IOSTANDARD = LVTTL ;
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NET "ADC_CSN" LOC = "P12" | IOSTANDARD = LVTTL ;
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