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Subversion Repositories am9080_cpu_based_on_microcoded_am29xx_bit-slices

[/] [am9080_cpu_based_on_microcoded_am29xx_bit-slices/] [trunk/] [ipcore_dir/] [ram4kx8/] [simulation/] [functional/] [simulate_ncsim.sh] - Blame information for rev 6

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1 6 zpekic
#!/bin/sh
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# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved.
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#
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# This file contains confidential and proprietary information
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# of Xilinx, Inc. and is protected under U.S. and
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# international copyright and other intellectual property
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# laws.
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#
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# DISCLAIMER
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# This disclaimer is not a license and does not grant any
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# rights to the materials distributed herewith. Except as
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# otherwise provided in a valid license issued to you by
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# Xilinx, and to the maximum extent permitted by applicable
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# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
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# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
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# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
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# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
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# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
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# (2) Xilinx shall not be liable (whether in contract or tort,
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# including negligence, or under any other theory of
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# liability) for any loss or damage of any kind or nature
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# related to, arising under or in connection with these
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# loss or damage suffered as a result of any action brought
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# by a third party) even if such damage or loss was
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# reasonably foreseeable or Xilinx had been advised of the
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# possibility of the same.
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#
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# CRITICAL APPLICATIONS
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# Xilinx products are not designed or intended to be fail-
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# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
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#--------------------------------------------------------------------------------
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mkdir work
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echo "Compiling Core VHDL UNISIM/Behavioral model"
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ncvhdl -v93  -work work ../../../ram4kx8.vhd \
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    ../../example_design/ram4kx8_exdes.vhd
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echo "Compiling Test Bench Files"
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ncvhdl -v93 -work work    ../bmg_tb_pkg.vhd
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ncvhdl -v93 -work work    ../random.vhd
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ncvhdl -v93 -work work    ../data_gen.vhd
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ncvhdl -v93 -work work    ../addr_gen.vhd
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ncvhdl -v93 -work work    ../checker.vhd
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ncvhdl -v93 -work work    ../bmg_stim_gen.vhd
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ncvhdl -v93 -work work    ../ram4kx8_synth.vhd
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ncvhdl -v93 -work work    ../ram4kx8_tb.vhd
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echo "Elaborating Design"
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ncelab -access +rwc work.ram4kx8_tb
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echo "Simulating Design"
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ncsim -gui -input @"simvision -input wave_ncsim.sv" work.ram4kx8_tb

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