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[/] [amber/] [trunk/] [hw/] [tests/] [conflict_rd.S] - Blame information for rev 20

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/*****************************************************************
//                                                              //
//  Amber 2 Core Instruction Test                               //
//                                                              //
//  This file is part of the Amber project                      //
//  http://www.opencores.org/project,amber                      //
//                                                              //
//  Description                                                 //
//  Tests that a register conflict between a ldr and a regop    //
//  that changes the value of the same register is handled      //
//  correctly.                                                  //
//                                                              //
//  Author(s):                                                  //
//      - Conor Santifort, csantifort.amber@gmail.com           //
//                                                              //
//////////////////////////////////////////////////////////////////
//                                                              //
// Copyright (C) 2010 Authors and OPENCORES.ORG                 //
//                                                              //
// This source file may be used and distributed without         //
// restriction provided that this copyright statement is not    //
// removed from the file and that any derivative work contains  //
// the original copyright notice and the associated disclaimer. //
//                                                              //
// This source file is free software; you can redistribute it   //
// and/or modify it under the terms of the GNU Lesser General   //
// Public License as published by the Free Software Foundation; //
// either version 2.1 of the License, or (at your option) any   //
// later version.                                               //
//                                                              //
// This source is distributed in the hope that it will be       //
// useful, but WITHOUT ANY WARRANTY; without even the implied   //
// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      //
// PURPOSE.  See the GNU Lesser General Public License for more //
// details.                                                     //
//                                                              //
// You should have received a copy of the GNU Lesser General    //
// Public License along with this source; if not, download it   //
// from http://www.opencores.org/lgpl.shtml                     //
//                                                              //
*****************************************************************/
 
#include "amber_registers.h"
 
        .section .text
        .globl  main
main:
 
        @ Run through the test 4 times
        @ 1 - cache off
        @ 2 - cache on but empty
        @ 3 - cache on and loaded
        @ 4 - same as 3
 
        mov     r10, #40
 
1:      mov     r1, #1
        mov     r2, #2
        mov     r3, #3
        mov     r4, #4
        mov     r5, #0x1000
        mov     r6, #6
        str     r6, [r5]
        mov     sp, #0x800
 
        @ --------------------------
        tst     r3,  #1
        add     r0,  r6,  r4
        ldr     r1, Data1
        ldr     r3, Data2
        ldr     r2, Data3
        movne   r2,  r3     @ always executed
        ldr     r3, [r5]
 
        bl      2f
 
        nop
        nop
        nop
 
2:      stmdb   sp!, {r1, r2, r3}
 
        nop
        nop
 
        ldr     r8, [sp, #4]
        ldr     r9, Data2
        cmp     r8, r9
        addne   r10, #1
        bne     testfail
 
        @ ---------------------
        @ Enable the cache
        @ ---------------------
        mvn     r0,  #0
        mcr     15, 0, r0, cr3, cr0, 0   @ cacheable area
        mov     r0,  #1
        mcr     15, 0, r0, cr2, cr0, 0   @ cache enable
 
        subs    r10, r10, #10
        bne     1b
 
        b       testpass
 
testfail:
        ldr     r11, AdrTestStatus
        str     r10, [r11]
        b       testfail
 
testpass:
        ldr     r11, AdrTestStatus
        mov     r10, #17
        str     r10, [r11]
        b       testpass
 
 
/* Write 17 to this address to generate a Test Passed message */
AdrTestStatus:  .word  ADR_AMBER_TEST_STATUS
AdrHiBootBase:  .word  ADR_HIBOOT_BASE
 
Data1:          .word  0x1000
Data2:          .word  0x2000
Data3:          .word  0x3000
 
/* ========================================================================= */
/* ========================================================================= */
 

Line No.	Rev	Author	Line
1	20	csantifort	`/*****************************************************************`
2			`// //`
3			`// Amber 2 Core Instruction Test //`
4			`// //`
5			`// This file is part of the Amber project //`
6			`// http://www.opencores.org/project,amber //`
7			`// //`
8			`// Description //`
9			`// Tests that a register conflict between a ldr and a regop //`
10			`// that changes the value of the same register is handled //`
11			`// correctly. //`
12			`// //`
13			`// Author(s): //`
14			`// - Conor Santifort, csantifort.amber@gmail.com //`
15			`// //`
16			`//////////////////////////////////////////////////////////////////`
17			`// //`
18			`// Copyright (C) 2010 Authors and OPENCORES.ORG //`
19			`// //`
20			`// This source file may be used and distributed without //`
21			`// restriction provided that this copyright statement is not //`
22			`// removed from the file and that any derivative work contains //`
23			`// the original copyright notice and the associated disclaimer. //`
24			`// //`
25			`// This source file is free software; you can redistribute it //`
26			`// and/or modify it under the terms of the GNU Lesser General //`
27			`// Public License as published by the Free Software Foundation; //`
28			`// either version 2.1 of the License, or (at your option) any //`
29			`// later version. //`
30			`// //`
31			`// This source is distributed in the hope that it will be //`
32			`// useful, but WITHOUT ANY WARRANTY; without even the implied //`
33			`// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //`
34			`// PURPOSE. See the GNU Lesser General Public License for more //`
35			`// details. //`
36			`// //`
37			`// You should have received a copy of the GNU Lesser General //`
38			`// Public License along with this source; if not, download it //`
39			`// from http://www.opencores.org/lgpl.shtml //`
40			`// //`
41			`*****************************************************************/`
42
43			`#include "amber_registers.h"`
44
45			`.section .text`
46			`.globl main`
47			`main:`
48
49			`@ Run through the test 4 times`
50			`@ 1 - cache off`
51			`@ 2 - cache on but empty`
52			`@ 3 - cache on and loaded`
53			`@ 4 - same as 3`
54
55			`mov r10, #40`
56
57			`1: mov r1, #1`
58			`mov r2, #2`
59			`mov r3, #3`
60			`mov r4, #4`
61			`mov r5, #0x1000`
62			`mov r6, #6`
63			`str r6, [r5]`
64			`mov sp, #0x800`
65
66			`@ --------------------------`
67			`tst r3, #1`
68			`add r0, r6, r4`
69			`ldr r1, Data1`
70			`ldr r3, Data2`
71			`ldr r2, Data3`
72			`movne r2, r3 @ always executed`
73			`ldr r3, [r5]`
74
75			`bl 2f`
76
77			`nop`
78			`nop`
79			`nop`
80
81			`2: stmdb sp!, {r1, r2, r3}`
82
83			`nop`
84			`nop`
85
86			`ldr r8, [sp, #4]`
87			`ldr r9, Data2`
88			`cmp r8, r9`
89			`addne r10, #1`
90			`bne testfail`
91
92			`@ ---------------------`
93			`@ Enable the cache`
94			`@ ---------------------`
95			`mvn r0, #0`
96			`mcr 15, 0, r0, cr3, cr0, 0 @ cacheable area`
97			`mov r0, #1`
98			`mcr 15, 0, r0, cr2, cr0, 0 @ cache enable`
99
100			`subs r10, r10, #10`
101			`bne 1b`
102
103			`b testpass`
104
105			`testfail:`
106			`ldr r11, AdrTestStatus`
107			`str r10, [r11]`
108			`b testfail`
109
110			`testpass:`
111			`ldr r11, AdrTestStatus`
112			`mov r10, #17`
113			`str r10, [r11]`
114			`b testpass`
115
116
117			`/* Write 17 to this address to generate a Test Passed message */`
118			`AdrTestStatus: .word ADR_AMBER_TEST_STATUS`
119			`AdrHiBootBase: .word ADR_HIBOOT_BASE`
120
121			`Data1: .word 0x1000`
122			`Data2: .word 0x2000`
123			`Data3: .word 0x3000`
124
125			`/* ========================================================================= */`
126			`/* ========================================================================= */`
127

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[/] [amber/] [trunk/] [hw/] [tests/] [conflict_rd.S] - Blame information for rev 20