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csantifort |
/*****************************************************************
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// //
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// Amber 2 Core DDR3 Memory Access //
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// //
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// This file is part of the Amber project //
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// http://www.opencores.org/project,amber //
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// //
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// Description //
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// Tests byte read and write accesses. //
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// //
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// Author(s): //
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// - Conor Santifort, csantifort.amber@gmail.com //
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// //
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//////////////////////////////////////////////////////////////////
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// //
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// Copyright (C) 2010 Authors and OPENCORES.ORG //
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// //
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// This source file may be used and distributed without //
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// restriction provided that this copyright statement is not //
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// removed from the file and that any derivative work contains //
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// the original copyright notice and the associated disclaimer. //
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// //
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// This source file is free software; you can redistribute it //
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// and/or modify it under the terms of the GNU Lesser General //
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// Public License as published by the Free Software Foundation; //
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// either version 2.1 of the License, or (at your option) any //
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// later version. //
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// //
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// This source is distributed in the hope that it will be //
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// useful, but WITHOUT ANY WARRANTY; without even the implied //
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// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //
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// PURPOSE. See the GNU Lesser General Public License for more //
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// details. //
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// //
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// You should have received a copy of the GNU Lesser General //
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// Public License along with this source; if not, download it //
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// from http://www.opencores.org/lgpl.shtml //
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// //
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*****************************************************************/
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#include "amber_registers.h"
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.section .text
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.globl main
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main:
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mov r3, #4 @ main loop count
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ldr r0, AdrRanNum
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mainl: ldr r1, [r0] @ load a random number
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mov r1, r1, lsl #12
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@ --------------------------------------------
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@ write phase
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ldr r8, DDRBase
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add r8, r8, r1
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mov r9, #0xff
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1: strb r9, [r8], #1
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subs r9, r9, #1
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bne 1b
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@ read phase
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ldr r8, DDRBase
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add r8, r8, r1
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mov r9, #0xff
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2: ldrb r7, [r8], #1
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cmp r7, r9
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movne r10, #10
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bne testfail
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subs r9, r9, #1
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bne 2b
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@ --------------------------------------------
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subs r3, r3, #1
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bne mainl
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b testpass
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testfail:
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ldr r11, AdrTestStatus
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str r10, [r11]
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b testfail
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testpass:
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ldr r11, AdrTestStatus
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mov r10, #17
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str r10, [r11]
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b testpass
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/* Write 17 to this address to generate a Test Passed message */
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AdrTestStatus: .word ADR_AMBER_TEST_STATUS
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AdrRanNum: .word ADR_AMBER_TEST_RANDOM_NUM
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DDRBase: .word 0x100000
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