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csantifort |
/*****************************************************************
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// //
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// Amber 2 System Ethernet MAC Test //
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// //
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// This file is part of the Amber project //
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// http://www.opencores.org/project,amber //
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// //
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// Description //
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// Tests wishbone access to the internal memory in the //
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// Ethernet MAC module. //
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// //
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// Author(s): //
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// - Conor Santifort, csantifort.amber@gmail.com //
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// //
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//////////////////////////////////////////////////////////////////
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// //
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// Copyright (C) 2010 Authors and OPENCORES.ORG //
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// //
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// This source file may be used and distributed without //
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// restriction provided that this copyright statement is not //
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// removed from the file and that any derivative work contains //
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// the original copyright notice and the associated disclaimer. //
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// //
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// This source file is free software; you can redistribute it //
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// and/or modify it under the terms of the GNU Lesser General //
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// Public License as published by the Free Software Foundation; //
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// either version 2.1 of the License, or (at your option) any //
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// later version. //
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// //
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// This source is distributed in the hope that it will be //
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// useful, but WITHOUT ANY WARRANTY; without even the implied //
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// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //
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// PURPOSE. See the GNU Lesser General Public License for more //
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// details. //
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// //
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// You should have received a copy of the GNU Lesser General //
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// Public License along with this source; if not, download it //
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// from http://www.opencores.org/lgpl.shtml //
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// //
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*****************************************************************/
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#include "amber_registers.h"
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.section .text
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.globl main
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main:
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@ Test reading of ethmac's internal BD memory
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@ 0x400 to 0x7ff
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ldr r0, AdrEthMacMemBase
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ldr r1, Data0
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str r1, [r0], #4
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ldr r1, Data1
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str r1, [r0], #4
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ldr r1, Data2
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str r1, [r0], #4
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ldr r1, Data3
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str r1, [r0], #4
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@ Read back and check the 4 values
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ldr r0, AdrEthMacMemBase
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ldr r2, [r0], #4
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ldr r3, Data0
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cmp r2, r3
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movne r10, #10
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bne testfail
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ldr r2, [r0], #4
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ldr r3, Data1
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cmp r2, r3
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movne r10, #20
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bne testfail
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ldr r2, [r0], #4
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ldr r3, Data2
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cmp r2, r3
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movne r10, #30
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bne testfail
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ldr r2, [r0], #4
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ldr r3, Data3
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cmp r2, r3
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movne r10, #40
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bne testfail
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@ Write all locations from 0x400 to 0x7ff, with Data == Address
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ldr r0, AdrEthMacMemBase
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add r1, r0, #0x400
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mov r2, #0
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1: str r2, [r0], #4
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cmp r0, r1
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beq checkem
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add r2, r2, #4
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b 1b
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checkem:
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@ Now read back all the locations, checking the values
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ldr r0, AdrEthMacMemBase
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mov r2, #0
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2: ldr r3, [r0], #4
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cmp r2, r3
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movne r10, r0
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subne r10, r10, #4
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bne testfail
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add r2, r2, #4
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cmp r0, r1
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beq testpass
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b 2b
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testfail:
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ldr r11, AdrTestStatus
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str r10, [r11]
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b testfail
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testpass:
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ldr r11, AdrTestStatus
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mov r10, #17
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str r10, [r11]
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b testpass
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/* Write 17 to this address to generate a Test Passed message */
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AdrTestStatus: .word ADR_AMBER_TEST_STATUS
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AdrEthMacModer: .word ADR_ETHMAC_MODER
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AdrEthMacMIIModer: .word ADR_ETHMAC_MIIMODER
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AdrEthMacMIICommand: .word ADR_ETHMAC_MIICOMMAND
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AdrEthMacMIIAddress: .word ADR_ETHMAC_MIIADDRESS
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AdrEthMacMIITxData: .word ADR_ETHMAC_MIITXDATA
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AdrEthMacMIIRxData: .word ADR_ETHMAC_MIIRXDATA
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AdrEthMacMIIStatus: .word ADR_ETHMAC_MIISTATUS
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AdrEthMacMemBase: .word ADR_ETHMAC_BDBASE
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Data0: .word 0xc0c0c0c0
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Data1: .word 0xff00ff00
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Data2: .word 0x12345678
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Data3: .word 0x77777777
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/* ========================================================================= */
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/* ========================================================================= */
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