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csantifort |
/*****************************************************************
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// //
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// Amber 2 Core Instruction Test //
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// //
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// This file is part of the Amber project //
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// http://www.opencores.org/project,amber //
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// //
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// Description //
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// Tests the usage of ldm where the status bits are loaded //
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// //
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// Author(s): //
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// - Conor Santifort, csantifort.amber@gmail.com //
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// //
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//////////////////////////////////////////////////////////////////
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// //
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// Copyright (C) 2010 Authors and OPENCORES.ORG //
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// //
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// This source file may be used and distributed without //
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// restriction provided that this copyright statement is not //
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// removed from the file and that any derivative work contains //
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// the original copyright notice and the associated disclaimer. //
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// //
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// This source file is free software; you can redistribute it //
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// and/or modify it under the terms of the GNU Lesser General //
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// Public License as published by the Free Software Foundation; //
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// either version 2.1 of the License, or (at your option) any //
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// later version. //
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// //
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// This source is distributed in the hope that it will be //
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// useful, but WITHOUT ANY WARRANTY; without even the implied //
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// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //
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// PURPOSE. See the GNU Lesser General Public License for more //
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// details. //
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// //
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// You should have received a copy of the GNU Lesser General //
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// Public License along with this source; if not, download it //
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// from http://www.opencores.org/lgpl.shtml //
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// //
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*****************************************************************/
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#include "amber_registers.h"
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.section .text
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.globl main
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main:
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@ Write values to user mode registers r13 and r14
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mov r0, #0x200
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mov r1, #0x66
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str r1, [r0]
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mov r1, #0x77
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str r1, [r0, #4]
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ldmia r0, {r13, r14}^
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@ set the condition flags, and stay in supervisor mode
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teqp pc, #0xf0000003
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@ Because pc is included here, ldm loads the
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@ mode bits, These are zero so this load changes
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@ to the user mode with all status bits set to zero
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ldr r3, StaticBase
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ldmia r3, {r0-pc}^
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b testfail
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b testfail
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b testfail
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b testfail
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ldm_jump:
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@ Check that we're in user mode now
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mov r4, pc
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ldr r5, PCMask
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bics r6, r4, r5
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movne r10, #10
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bne testfail
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@ Check that User Mode r13 and r14 were not changed by the ldm instruction
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cmp r13, #0x66
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movne r10, #20
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bne testfail
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cmp r14, #0x77
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movne r10, #30
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bne testfail
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@ Check that r0 got loaded with the correct value
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cmp r0, #0
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movne r10, #40
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bne testfail
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@ Check that r1 got loaded with the correct value
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cmp r1, #1
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movne r10, #50
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bne testfail
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@ Check that r12 got loaded with the correct value
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cmp r12, #12
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movne r10, #60
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bne testfail
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@ ------------------------------------------
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@ ------------------------------------------
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b testpass
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testfail:
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ldr r11, AdrTestStatus
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str r10, [r11]
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b testfail
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testpass:
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ldr r11, AdrTestStatus
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mov r10, #17
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str r10, [r11]
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b testpass
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/* Write 17 to this address to generate a Test Passed message */
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AdrTestStatus: .word ADR_AMBER_TEST_STATUS
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StaticBase: .word Data1
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PCMask: .word 0x03fffffc
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Data1: .word 0x00
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.word 0x01
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.word 0x02
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.word 0x03
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.word 0x04
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.word 0x05
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.word 0x06
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.word 0x07
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.word 0x08
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.word 0x09
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.word 0x0a
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.word 0x0b
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.word 0x0c
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.word 0x0d
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.word 0x0e
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.word ldm_jump
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.word 0x10
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Data18: .word 0x11
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/* ========================================================================= */
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/* ========================================================================= */
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