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[/] [amber/] [trunk/] [hw/] [tests/] [ldr_str_pc.S] - Blame information for rev 36

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1 2 csantifort
/*****************************************************************
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//                                                              //
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//  Amber 2 Core Instruction Test                               //
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//                                                              //
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//  This file is part of the Amber project                      //
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//  http://www.opencores.org/project,amber                      //
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//                                                              //
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//  Description                                                 //
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//  Tests lrd and str of r15                                    //
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//                                                              //
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//  Author(s):                                                  //
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//      - Conor Santifort, csantifort.amber@gmail.com           //
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//                                                              //
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//////////////////////////////////////////////////////////////////
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//                                                              //
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// Copyright (C) 2010 Authors and OPENCORES.ORG                 //
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//                                                              //
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// This source file may be used and distributed without         //
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// restriction provided that this copyright statement is not    //
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// removed from the file and that any derivative work contains  //
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// the original copyright notice and the associated disclaimer. //
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//                                                              //
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// This source file is free software; you can redistribute it   //
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// and/or modify it under the terms of the GNU Lesser General   //
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// Public License as published by the Free Software Foundation; //
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// either version 2.1 of the License, or (at your option) any   //
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// later version.                                               //
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//                                                              //
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// This source is distributed in the hope that it will be       //
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// useful, but WITHOUT ANY WARRANTY; without even the implied   //
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// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      //
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// PURPOSE.  See the GNU Lesser General Public License for more //
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// details.                                                     //
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//                                                              //
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// You should have received a copy of the GNU Lesser General    //
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// Public License along with this source; if not, download it   //
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// from http://www.opencores.org/lgpl.shtml                     //
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//                                                              //
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*****************************************************************/
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#include "amber_registers.h"
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        .section .text
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        .globl  main
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main:
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        mov     r0, #0x800
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        @ this saves with pc and status bits
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1:      str     pc, [r0]
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        nop
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        nop
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        ldr     r1, [r0]
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        @ Check that the mode (supervisor) was saved
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        and     r2, r1, #3
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        cmp     r2, #3
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        movne   r10, #10
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        bne     testfail
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        @ Check that the correct pc value (location + 12) was saved
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        ldr     r6, FilterPC
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        and     r3, r1, r6
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        ldr     r4, =1b
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        add     r4, r4, #12
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        cmp     r3, r4
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        movne   r10, #20
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        bne     testfail
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        @ loading the pc with ldr only changes the pc values,
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        @ not the status bits
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        ldr     pc, =pcx
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        b       testfail
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        b       testfail
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        b       testfail
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        b       testfail
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        @ if the jump is 1 ahead or 1 behind the
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        @ test will fail
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pcx:    b       2f
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        b       testfail
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        b       testfail
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        b       testfail
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        b       testfail
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        @ Check that the pc load did not change the status bits,
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        @ - that we're still in supervisor mode
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2:      mov     r1, pc
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        and     r2, r1, #3
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        cmp     r2, #3
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        movne   r10, #30
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        bne     testfail
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        b       testpass
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testfail:
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        ldr     r11, AdrTestStatus
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        str     r10, [r11]
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        b       testfail
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testpass:
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        ldr     r11, AdrTestStatus
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        mov     r10, #17
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        str     r10, [r11]
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        b       testpass
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/* Write 17 to this address to generate a Test Passed message */
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AdrTestStatus:  .word  ADR_AMBER_TEST_STATUS
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/* Mark the location of the pc bits of r15 */
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FilterPC:       .word  0x03fffffc
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LoadPC:         .word  =pcx
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/* ========================================================================= */
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/* ========================================================================= */
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