OpenCores
URL https://opencores.org/ocsvn/amber/amber/trunk

Subversion Repositories amber

[/] [amber/] [trunk/] [hw/] [tests/] [strb.S] - Blame information for rev 64

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 csantifort
/*****************************************************************
2
//                                                              //
3
//  Amber 2 Core Instruction Test                               //
4
//                                                              //
5
//  This file is part of the Amber project                      //
6
//  http://www.opencores.org/project,amber                      //
7
//                                                              //
8
//  Description                                                 //
9
//  Tests str and strb with different indexing modes.           //
10
//                                                              //
11
//  Author(s):                                                  //
12
//      - Conor Santifort, csantifort.amber@gmail.com           //
13
//                                                              //
14
//////////////////////////////////////////////////////////////////
15
//                                                              //
16
// Copyright (C) 2010 Authors and OPENCORES.ORG                 //
17
//                                                              //
18
// This source file may be used and distributed without         //
19
// restriction provided that this copyright statement is not    //
20
// removed from the file and that any derivative work contains  //
21
// the original copyright notice and the associated disclaimer. //
22
//                                                              //
23
// This source file is free software; you can redistribute it   //
24
// and/or modify it under the terms of the GNU Lesser General   //
25
// Public License as published by the Free Software Foundation; //
26
// either version 2.1 of the License, or (at your option) any   //
27
// later version.                                               //
28
//                                                              //
29
// This source is distributed in the hope that it will be       //
30
// useful, but WITHOUT ANY WARRANTY; without even the implied   //
31
// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      //
32
// PURPOSE.  See the GNU Lesser General Public License for more //
33
// details.                                                     //
34
//                                                              //
35
// You should have received a copy of the GNU Lesser General    //
36
// Public License along with this source; if not, download it   //
37
// from http://www.opencores.org/lgpl.shtml                     //
38
//                                                              //
39
*****************************************************************/
40
 
41
#include "amber_registers.h"
42
 
43
        .section .text
44
        .globl  main
45
main:
46
 
47
        /* Store single Byte */
48
        ldr     r0,  StoreBase
49
        add     r0,  r0, #4
50
        mov     r4,  #0
51
        str     r4,  [r0]
52
        ldr     r1,  Data1
53
        strb    r1, [r0]
54
 
55
        and     r3, r1, #0xff
56
        ldr     r2, [r0]
57
        cmp     r3, r2
58
        movne   r10, #10   @ error number
59
        bne     testfail
60
 
61
        /* Store Byte at address 1, 2 and 3 */
62
        ldr     r0,  StoreBase
63
        add     r0,  r0, #8
64
        mov     r4,  #0
65
        @ start by writing a word of 0 to the memory location
66
        str     r4, [r0], #1
67
        ldr     r1,  Data1
68
 
69
        @ then store byte 0 in r1 to 3 positions
70
        @ in the memory location
71
        strb    r1, [r0], #1
72
        strb    r1, [r0], #1
73
        strb    r1, [r0], #1
74
 
75
        @ load back the memory location and check its contents
76
        ldr     r0,  StoreBase
77
        ldr     r2,  [r0, #8]
78
        ldr     r3,  Data3
79
        cmp     r2, r3
80
        movne   r10, #20   @ error number
81
        bne     testfail
82
 
83
        /* Reverse order of bytes */
84
        @ read in Data1 and store it out to
85
        @ StoreBase + 12, reversing the order
86
        @ of the bytes
87
        ldr     r2,  StoreBase
88
        add     r2, r2, #12
89
        ldr     r1,  Data1
90
 
91
        @ store byte 3
92
        mov     r1, r1, ror #24
93
        strb    r1, [r2], #1
94
 
95
        @ store byte 2
96
        mov     r1, r1, ror #24
97
        strb    r1, [r2], #1
98
 
99
        @ store byte 1
100
        mov     r1, r1, ror #24
101
        strb    r1, [r2], #1
102
 
103
        @ store byte 0
104
        mov     r1, r1, ror #24
105
        strb    r1, [r2], #1
106
 
107
        ldr     r2,  StoreBase
108
        add     r2, r2, #12
109
        ldr     r3, [r2]
110
        ldr     r4, Data4
111
        cmp     r3, r4
112
        movne   r10, #30
113
        bne     testfail
114
 
115
        /* Store word */
116
        ldr     r0,  StoreBase
117
        ldr     r1,  Data1
118
        str     r1, [r0]
119
 
120
        ldr     r2, [r0]
121
        cmp     r1, r2
122
        movne   r10, #50   @ error number
123
        bne     testfail
124
 
125
 
126
@ ------------------------------------------
127
@ ------------------------------------------
128
 
129
        b       testpass
130
 
131
testfail:
132
        ldr     r11, AdrTestStatus
133
        str     r10, [r11]
134
        b       testfail
135
 
136
testpass:
137
        ldr     r11, AdrTestStatus
138
        mov     r10, #17
139
        str     r10, [r11]
140
        b       testpass
141
 
142
 
143
/* Write 17 to this address to generate a Test Passed message */
144
AdrTestStatus:  .word  ADR_AMBER_TEST_STATUS
145
AdrData1:       .word  Data1
146
AdrData2:       .word  Data2
147
StoreBase:      .word  0x800
148
Data1:          .word  0x12345678
149
Data2:          .word  0xffccbbaa
150
Data3:          .word  0x78787800
151
Data4:          .word  0x78563412
152
 
153
/* ========================================================================= */
154
/* ========================================================================= */
155
 
156
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.