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[/] [amber/] [trunk/] [hw/] [tests/] [uart_reg.S] - Blame information for rev 87

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/*****************************************************************
//                                                              //
//  Amber 2 System UART Test                                    //
//                                                              //
//  This file is part of the Amber project                      //
//  http://www.opencores.org/project,amber                      //
//                                                              //
//  Description                                                 //
//  Tests wishbone read and write access to the Amber UART      //
//  registers.                                                  //
//                                                              //
//  Author(s):                                                  //
//      - Conor Santifort, csantifort.amber@gmail.com           //
//                                                              //
//////////////////////////////////////////////////////////////////
//                                                              //
// Copyright (C) 2010 Authors and OPENCORES.ORG                 //
//                                                              //
// This source file may be used and distributed without         //
// restriction provided that this copyright statement is not    //
// removed from the file and that any derivative work contains  //
// the original copyright notice and the associated disclaimer. //
//                                                              //
// This source file is free software; you can redistribute it   //
// and/or modify it under the terms of the GNU Lesser General   //
// Public License as published by the Free Software Foundation; //
// either version 2.1 of the License, or (at your option) any   //
// later version.                                               //
//                                                              //
// This source is distributed in the hope that it will be       //
// useful, but WITHOUT ANY WARRANTY; without even the implied   //
// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      //
// PURPOSE.  See the GNU Lesser General Public License for more //
// details.                                                     //
//                                                              //
// You should have received a copy of the GNU Lesser General    //
// Public License along with this source; if not, download it   //
// from http://www.opencores.org/lgpl.shtml                     //
//                                                              //
*****************************************************************/
 
#include "amber_registers.h"
 
        .section .text
        .globl  main
main:
 
        @ -------------------------------------------
        @ Write to and read back from UART0 registers
        ldr     r0, AdrUart0LCRH
        ldr     r1, AdrUart0LCRM
        ldr     r2, AdrUart0LCRL
 
        mov     r7, #0x80
        mov     r8, #0x0f
        mov     r9, #0xcc
 
        str     r7, [r0]
        str     r8, [r1]
        str     r9, [r2]
 
        @ Read Back
        ldr     r4, [r0]
        ldr     r5, [r1]
        ldr     r6, [r2]
 
 
        @ Check values read back
        cmp     r4, r7
        movne   r10, #10
        bne     testfail
 
        cmp     r5, r8
        movne   r10, #20
        bne     testfail
 
        cmp     r6, r9
        movne   r10, #30
        bne     testfail
 
 
        @ -------------------------------------------
        @ Write to and read back from UART1 registers
        ldr     r0, AdrUart1LCRH
        ldr     r1, AdrUart1LCRM
        ldr     r2, AdrUart1LCRL
 
        mov     r7, #0x44
        mov     r8, #0x22
        mov     r9, #0x55
 
        str     r7, [r0]
        str     r8, [r1]
        str     r9, [r2]
 
        @ Read Back
        ldr     r4, [r0]
        ldr     r5, [r1]
        ldr     r6, [r2]
 
 
        @ Check values read back
        cmp     r4, r7
        movne   r10, #40
        bne     testfail
 
        cmp     r5, r8
        movne   r10, #50
        bne     testfail
 
        cmp     r6, r9
        movne   r10, #60
        bne     testfail
 
@ ------------------------------------------
@ ------------------------------------------
 
        b       testpass
 
testfail:
        ldr     r11, AdrTestStatus
        str     r10, [r11]
        b       testfail
 
testpass:
        ldr     r11, AdrTestStatus
        mov     r10, #17
        str     r10, [r11]
        b       testpass
 
 
@ ------------------------------------------
@ ------------------------------------------
 
/* Write 17 to this address to generate a Test Passed message */
AdrTestStatus:  .word  ADR_AMBER_TEST_STATUS
 
AdrUart0LCRH:   .word  ADR_AMBER_UART0_LCRH
AdrUart0LCRM:   .word  ADR_AMBER_UART0_LCRM
AdrUart0LCRL:   .word  ADR_AMBER_UART0_LCRL
 
AdrUart1LCRH:   .word  ADR_AMBER_UART1_LCRH
AdrUart1LCRM:   .word  ADR_AMBER_UART1_LCRM
AdrUart1LCRL:   .word  ADR_AMBER_UART1_LCRL
 

Line No.	Rev	Author	Line
1	2	csantifort	`/*****************************************************************`
2			`// //`
3			`// Amber 2 System UART Test //`
4			`// //`
5			`// This file is part of the Amber project //`
6			`// http://www.opencores.org/project,amber //`
7			`// //`
8			`// Description //`
9			`// Tests wishbone read and write access to the Amber UART //`
10			`// registers. //`
11			`// //`
12			`// Author(s): //`
13			`// - Conor Santifort, csantifort.amber@gmail.com //`
14			`// //`
15			`//////////////////////////////////////////////////////////////////`
16			`// //`
17			`// Copyright (C) 2010 Authors and OPENCORES.ORG //`
18			`// //`
19			`// This source file may be used and distributed without //`
20			`// restriction provided that this copyright statement is not //`
21			`// removed from the file and that any derivative work contains //`
22			`// the original copyright notice and the associated disclaimer. //`
23			`// //`
24			`// This source file is free software; you can redistribute it //`
25			`// and/or modify it under the terms of the GNU Lesser General //`
26			`// Public License as published by the Free Software Foundation; //`
27			`// either version 2.1 of the License, or (at your option) any //`
28			`// later version. //`
29			`// //`
30			`// This source is distributed in the hope that it will be //`
31			`// useful, but WITHOUT ANY WARRANTY; without even the implied //`
32			`// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //`
33			`// PURPOSE. See the GNU Lesser General Public License for more //`
34			`// details. //`
35			`// //`
36			`// You should have received a copy of the GNU Lesser General //`
37			`// Public License along with this source; if not, download it //`
38			`// from http://www.opencores.org/lgpl.shtml //`
39			`// //`
40			`*****************************************************************/`
41
42			`#include "amber_registers.h"`
43
44			`.section .text`
45			`.globl main`
46			`main:`
47
48			`@ -------------------------------------------`
49			`@ Write to and read back from UART0 registers`
50			`ldr r0, AdrUart0LCRH`
51			`ldr r1, AdrUart0LCRM`
52			`ldr r2, AdrUart0LCRL`
53
54			`mov r7, #0x80`
55			`mov r8, #0x0f`
56			`mov r9, #0xcc`
57
58			`str r7, [r0]`
59			`str r8, [r1]`
60			`str r9, [r2]`
61
62			`@ Read Back`
63			`ldr r4, [r0]`
64			`ldr r5, [r1]`
65			`ldr r6, [r2]`
66
67
68			`@ Check values read back`
69			`cmp r4, r7`
70			`movne r10, #10`
71			`bne testfail`
72
73			`cmp r5, r8`
74			`movne r10, #20`
75			`bne testfail`
76
77			`cmp r6, r9`
78			`movne r10, #30`
79			`bne testfail`
80
81
82			`@ -------------------------------------------`
83			`@ Write to and read back from UART1 registers`
84			`ldr r0, AdrUart1LCRH`
85			`ldr r1, AdrUart1LCRM`
86			`ldr r2, AdrUart1LCRL`
87
88			`mov r7, #0x44`
89			`mov r8, #0x22`
90			`mov r9, #0x55`
91
92			`str r7, [r0]`
93			`str r8, [r1]`
94			`str r9, [r2]`
95
96			`@ Read Back`
97			`ldr r4, [r0]`
98			`ldr r5, [r1]`
99			`ldr r6, [r2]`
100
101
102			`@ Check values read back`
103			`cmp r4, r7`
104			`movne r10, #40`
105			`bne testfail`
106
107			`cmp r5, r8`
108			`movne r10, #50`
109			`bne testfail`
110
111			`cmp r6, r9`
112			`movne r10, #60`
113			`bne testfail`
114
115			`@ ------------------------------------------`
116			`@ ------------------------------------------`
117
118			`b testpass`
119
120			`testfail:`
121			`ldr r11, AdrTestStatus`
122			`str r10, [r11]`
123			`b testfail`
124
125			`testpass:`
126			`ldr r11, AdrTestStatus`
127			`mov r10, #17`
128			`str r10, [r11]`
129			`b testpass`
130
131
132			`@ ------------------------------------------`
133			`@ ------------------------------------------`
134
135			`/* Write 17 to this address to generate a Test Passed message */`
136			`AdrTestStatus: .word ADR_AMBER_TEST_STATUS`
137
138			`AdrUart0LCRH: .word ADR_AMBER_UART0_LCRH`
139			`AdrUart0LCRM: .word ADR_AMBER_UART0_LCRM`
140			`AdrUart0LCRL: .word ADR_AMBER_UART0_LCRL`
141
142			`AdrUart1LCRH: .word ADR_AMBER_UART1_LCRH`
143			`AdrUart1LCRM: .word ADR_AMBER_UART1_LCRM`
144			`AdrUart1LCRL: .word ADR_AMBER_UART1_LCRL`
145

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[/] [amber/] [trunk/] [hw/] [tests/] [uart_reg.S] - Blame information for rev 87