OpenCores
URL https://opencores.org/ocsvn/amber/amber/trunk

Subversion Repositories amber

[/] [amber/] [trunk/] [hw/] [vlog/] [xs6_ddr3/] [README.txt] - Blame information for rev 77

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 41 csantifort
*** Steps to create the Spartan-6 DDR3 memory interface for the SP605 development board.
2 64 csantifort
These instructions are based on using Xilinx ISE 14.5
3 41 csantifort
 
4 64 csantifort
Run coregen
5
Open the project hw/vlog/xs6_ddr3/coregen_sp605.cgp
6
Under Project IP, select the Core Name "MIG Virtex-6 and Spartan-6",
7
right mouse on it and select Regenerate 9Under Original Project Settings)
8
Answer Yes to 'Do you wish to continue?' twice. The core generation process then runs in a few seconds.
9
Exit coregen.
10
 
11
 
12
This is the controller configuration, for reference.
13 41 csantifort
- Component Name: ddr3
14
- Bank 3 Memory Type DDR3 SDRAM
15
- Frequency: 400MHz
16
- Memory Part: MT41J64M16XX-187E
17
- Configuration Selection: One 128-bit bi-directional port
18
- Memory Address Mapping Selection: Row, Bank, Column
19
 
20
 
21 64 csantifort
Once the controller is generated copy all the Verilog files from the
22
hw/vlog/xs6_ddr3/user_design/rtl and hw/vlog/xs6_ddr3/user_design/rtl/mcb_controller
23
directories to $AMBER_BASE/hw/vlog/xs6_ddr3. Then make the following modifications
24 41 csantifort
 
25 64 csantifort
1. ddr3
26
line 167 change
27
   localparam C3_CLKFBOUT_MULT        = 2;
28
to
29
   localparam C3_CLKFBOUT_MULT        = 4;
30
 
31
 
32
2. infrastructure.v
33
Comment out line 126, (* KEEP = "TRUE" *) wire sys_clk_ibufg;
34
Comment out the IBUFG instance u_ibufg_sys_clk on lines 156 to 160.
35
Change the CLKIN1 signal on line 202 from sys_clk_ibufg to sys_clk.
36 41 csantifort
 
37 64 csantifort
There is already an IBUFGDS on that signal in clocks_resets.v so the
38
one in infrastructure.v is not needed.
39 41 csantifort
 
40
 
41 64 csantifort
In order to use Impact on CentOS 6, you need to install a USB driver.
42
sudo yum install libusb-devel
43
Then download and make the usb driver from http://rmdir.de/~michael/xilinx/
44
Once its successfully compiled run setup_pcusb to add the device IDs to the Xilinx installation.
45 41 csantifort
 
46 64 csantifort
You also need to install the fxload package
47
sudo rpm -i fxload-2008_10_13-3.el6.i686.rpm
48
And reboot after installing it.
49 41 csantifort
 
50 64 csantifort
Then power on the SP605 board and connect its USB-JTAG port to your PC.
51
Then run impact as follows
52
export LD_PRELOAD=/your-path/libusb-driver.so
53
impact
54
Impact should now be able to auto-detect the FPFA card. Right click on the FPGA and select the bitfile to load into it.
55 41 csantifort
 
56 64 csantifort
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.