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/*----------------------------------------------------------------
//                                                              //
//  start.S                                                     //
//                                                              //
//  This file is part of the Amber project                      //
//  http://www.opencores.org/project,amber                      //
//                                                              //
//  Description                                                 //
//  Assembly routines for boot-loader.                          //
//  As boot-loader is a stand-alone application, it needs a     //
//  simple start function written in assembly to call the       //
//  C code main() function.                                     //
//                                                              //
//  Author(s):                                                  //
//      - Conor Santifort, csantifort.amber@gmail.com           //
//                                                              //
//////////////////////////////////////////////////////////////////
//                                                              //
// Copyright (C) 2010 Authors and OPENCORES.ORG                 //
//                                                              //
// This source file may be used and distributed without         //
// restriction provided that this copyright statement is not    //
// removed from the file and that any derivative work contains  //
// the original copyright notice and the associated disclaimer. //
//                                                              //
// This source file is free software; you can redistribute it   //
// and/or modify it under the terms of the GNU Lesser General   //
// Public License as published by the Free Software Foundation; //
// either version 2.1 of the License, or (at your option) any   //
// later version.                                               //
//                                                              //
// This source is distributed in the hope that it will be       //
// useful, but WITHOUT ANY WARRANTY; without even the implied   //
// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      //
// PURPOSE.  See the GNU Lesser General Public License for more //
// details.                                                     //
//                                                              //
// You should have received a copy of the GNU Lesser General    //
// Public License along with this source; if not, download it   //
// from http://www.opencores.org/lgpl.shtml                     //
//                                                              //
----------------------------------------------------------------*/
 
#include "amber_registers.h"
 
 
/* Defined in vmlinux/include/asm-arm/setup.h */
#define ATAG_CORE       0x54410001
#define ATAG_MEM        0x54410002
#define ATAG_INITRD     0x54410005
#define ATAG_RAMDISK    0x54410004
#define ATAG_NONE       0x00000000
 
#define ATAG_CORE_SIZE    ((2*4 + 3*4) >> 2)
#define ATAG_MEM_SIZE     ((2*4 + 2*4) >> 2)
#define ATAG_INITRD_SIZE  ((2*4 + 2*4) >> 2)
#define ATAG_RAMDISK_SIZE ((2*4 + 3*4) >> 2)
 
 
/* from vmlinux/arch/arm/kernel/compat.c */
#define FLAG_READONLY   1
 
/* from the list in wmlinux/arch/arm/tools/mach-types */
#define MACH_TYPE_A5K   11
 
 
 
        .section .text
        .globl  start
start:
        /* 0x00 Reset Interrupt vector address */
        b       startup
 
        /* 0x04 Undefined Instruction Interrupt vector address */
        b       _testfail
 
        /* 0x08 SWI Interrupt vector address */
        b       _testfail
 
        /* 0x0c Prefetch abort Interrupt vector address */
        b       _testfail
 
        /* 0x10 Data abort Interrupt vector address */
        b       _testfail
        b       _testfail
 
        /* 0x18 IRQ vector address */
        b       _testfail
 
        /* 0x1c FIRQ vector address */
        b       _testfail
 
startup:
        /* Unset interrupt mask bits, stay in svc mode */
        mov     r0, #0x00000003
        teqp    pc, r0
 
        @ Enable the cache
        mov     r0, #0xffffffff
        mcr     15, 0, r0, cr3, cr0, 0   @ cacheable area
        mov     r0, #1
        mcr     15, 0, r0, cr2, cr0, 0   @ cache enable
 
        @ init SP
        ldr     sp, AdrStack
 
        @ Set 32MB memory mode
        ldr     r0, AdrMemCtrl
        mov     r1, #1
        str     r1, [r0]
 
        .extern main
        bl      main
 
        @ jump to program at r0
        .globl _jump_to_program
_jump_to_program:
 
 
        @ ----------------------------------------------
        @ Copy ATAG structure to AdrBootParams
        @ ----------------------------------------------
        ldr     r1, AdrBootParams
        ldr     r2, AdrATAGBase
        ldr     r3, AdeEndATAG
 
1:      cmp     r2, r3
        beq     2f
        ldr     r4, [r2], #4
        str     r4, [r1], #4
        b       1b
 
        @ Set memc page tables
2:      ldr     r2, AdrPageTabes
        mov     r3, #0
        mov     r4, #40
3:      str     r3,[r2],#4
        subs    r4, r4, #1
        bne     3b
 
        @ ----------------------------------------------
        @ jump to start of program in svc mode with interrupts disabled
        @ ----------------------------------------------
        mov     r4, r0
        orr     r4, #0x0c000003
        mov     r0, #0
        mov     pc, r4
 
 
        @ ----------------------------------------------
        @ Print CPU Core status
        @ ----------------------------------------------
        .globl   _core_status
_core_status:
        stmdb   sp!,{lr}
        stmdb   sp!,{r0-r12}
        mov     r4, #0
        mov     r5, sp
        mov     r6, lr
 
1:      ldr     r0, =Status_Message
        mov     r1, r4
        ldr     r2, [r5], #4
        bl      printf
 
        cmp     r4, #13
        addne   r4, r4, #1
        bne     1b
 
        @ Stack Pointer
        ldr     r0, =SPStatus_Message
        mov     r1, sp
        bl      printf
 
        @ Program Counter - Use Link Register value because
        @ want the PC value of whatever called this function
        ldr     r0, =PCStatus_Message
        sub     r1, r6, #4
        bl      printf
 
        ldmia  sp!,{r0-r12}
        ldmia  sp!,{pc}^
 
 
/* stack at top of ddr3 memory space */
AdrStack:                   .word 0x02000000
AdrMemCtrl:                 .word ADR_AMBER_TEST_MEM_CTRL
 
/* core status messages */
Status_Message:             .ascii "r%2d  %08x\n\00"
SPStatus_Message:           .ascii "sp   %08x\n\00"
PCStatus_Message:           .ascii "pc   %08x\n\00"
 
                            .align 2
AdrATAGBase:                .word ATAGBase
AdeEndATAG:                 .word EndATAG
 
ATAGBase:                   .word ATAG_CORE_SIZE
                            .word ATAG_CORE
                            .word FLAG_READONLY     @ flags
                            .word 4096              @ page size
                            .word 0x0               @ rootdev
 
                            .word ATAG_MEM_SIZE
                            .word ATAG_MEM
                            .word 32*1024*1024      @ size - 32MB
                            .word 0x0               @ start
 
                            .word ATAG_RAMDISK_SIZE
                            .word ATAG_RAMDISK
                            .word 1                 @ flags: bit 0 = load, bit 1 = prompt
                            .word 0x000000d0        @ size in 1k blocks
                            .word 0x00800000        @ physical address of start of ramdisk
 
                            .word ATAG_INITRD_SIZE
                            .word ATAG_INITRD
                            .word 0x02800000        @ virtual address of start of initrd image
                            .word 0x00032000        @ size = 200k
 
                            .word ATAG_NONE
                            .word 0x0
EndATAG:                    .word 0x0
 
AdrBootParams:              .word 0x7c000
AdrPageTabes:               .word 0x3f01000

Line No.	Rev	Author	Line
1	2	csantifort	`/*----------------------------------------------------------------`
2			`// //`
3			`// start.S //`
4			`// //`
5			`// This file is part of the Amber project //`
6			`// http://www.opencores.org/project,amber //`
7			`// //`
8			`// Description //`
9			`// Assembly routines for boot-loader. //`
10			`// As boot-loader is a stand-alone application, it needs a //`
11			`// simple start function written in assembly to call the //`
12			`// C code main() function. //`
13			`// //`
14			`// Author(s): //`
15			`// - Conor Santifort, csantifort.amber@gmail.com //`
16			`// //`
17			`//////////////////////////////////////////////////////////////////`
18			`// //`
19			`// Copyright (C) 2010 Authors and OPENCORES.ORG //`
20			`// //`
21			`// This source file may be used and distributed without //`
22			`// restriction provided that this copyright statement is not //`
23			`// removed from the file and that any derivative work contains //`
24			`// the original copyright notice and the associated disclaimer. //`
25			`// //`
26			`// This source file is free software; you can redistribute it //`
27			`// and/or modify it under the terms of the GNU Lesser General //`
28			`// Public License as published by the Free Software Foundation; //`
29			`// either version 2.1 of the License, or (at your option) any //`
30			`// later version. //`
31			`// //`
32			`// This source is distributed in the hope that it will be //`
33			`// useful, but WITHOUT ANY WARRANTY; without even the implied //`
34			`// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //`
35			`// PURPOSE. See the GNU Lesser General Public License for more //`
36			`// details. //`
37			`// //`
38			`// You should have received a copy of the GNU Lesser General //`
39			`// Public License along with this source; if not, download it //`
40			`// from http://www.opencores.org/lgpl.shtml //`
41			`// //`
42			`----------------------------------------------------------------*/`
43
44			`#include "amber_registers.h"`
45
46
47	11	csantifort	`/* Defined in vmlinux/include/asm-arm/setup.h */`
48			`#define ATAG_CORE 0x54410001`
49			`#define ATAG_MEM 0x54410002`
50			`#define ATAG_INITRD 0x54410005`
51			`#define ATAG_RAMDISK 0x54410004`
52			`#define ATAG_NONE 0x00000000`
53
54			`#define ATAG_CORE_SIZE ((24 + 34) >> 2)`
55			`#define ATAG_MEM_SIZE ((24 + 24) >> 2)`
56			`#define ATAG_INITRD_SIZE ((24 + 24) >> 2)`
57			`#define ATAG_RAMDISK_SIZE ((24 + 34) >> 2)`
58
59
60			`/* from vmlinux/arch/arm/kernel/compat.c */`
61			`#define FLAG_READONLY 1`
62
63			`/* from the list in wmlinux/arch/arm/tools/mach-types */`
64			`#define MACH_TYPE_A5K 11`
65
66
67
68	2	csantifort	`.section .text`
69			`.globl start`
70			`start:`
71			`/* 0x00 Reset Interrupt vector address */`
72			`b startup`
73
74			`/* 0x04 Undefined Instruction Interrupt vector address */`
75			`b _testfail`
76
77			`/* 0x08 SWI Interrupt vector address */`
78			`b _testfail`
79
80			`/* 0x0c Prefetch abort Interrupt vector address */`
81			`b _testfail`
82
83			`/* 0x10 Data abort Interrupt vector address */`
84			`b _testfail`
85			`b _testfail`
86
87			`/* 0x18 IRQ vector address */`
88			`b _testfail`
89
90			`/* 0x1c FIRQ vector address */`
91			`b _testfail`
92
93			`startup:`
94	11	csantifort	`/* Unset interrupt mask bits, stay in svc mode */`
95			`mov r0, #0x00000003`
96	2	csantifort	`teqp pc, r0`
97
98			`@ Enable the cache`
99	11	csantifort	`mov r0, #0xffffffff`
100			`mcr 15, 0, r0, cr3, cr0, 0 @ cacheable area`
101			`mov r0, #1`
102			`mcr 15, 0, r0, cr2, cr0, 0 @ cache enable`
103	2	csantifort
104			`@ init SP`
105			`ldr sp, AdrStack`
106
107	11	csantifort	`@ Set 32MB memory mode`
108			`ldr r0, AdrMemCtrl`
109			`mov r1, #1`
110			`str r1, [r0]`
111
112	2	csantifort	`.extern main`
113			`bl main`
114
115	11	csantifort	`@ jump to program at r0`
116	2	csantifort	`.globl _jump_to_program`
117			`_jump_to_program:`
118
119	11	csantifort
120			`@ ----------------------------------------------`
121			`@ Copy ATAG structure to AdrBootParams`
122			`@ ----------------------------------------------`
123			`ldr r1, AdrBootParams`
124			`ldr r2, AdrATAGBase`
125			`ldr r3, AdeEndATAG`
126
127			`1: cmp r2, r3`
128			`beq 2f`
129			`ldr r4, [r2], #4`
130			`str r4, [r1], #4`
131			`b 1b`
132
133			`@ Set memc page tables`
134			`2: ldr r2, AdrPageTabes`
135			`mov r3, #0`
136			`mov r4, #40`
137			`3: str r3,[r2],#4`
138			`subs r4, r4, #1`
139			`bne 3b`
140
141			`@ ----------------------------------------------`
142			`@ jump to start of program in svc mode with interrupts disabled`
143			`@ ----------------------------------------------`
144			`mov r4, r0`
145			`orr r4, #0x0c000003`
146			`mov r0, #0`
147			`mov pc, r4`
148	2	csantifort
149
150			`@ ----------------------------------------------`
151			`@ Print CPU Core status`
152			`@ ----------------------------------------------`
153			`.globl _core_status`
154			`_core_status:`
155			`stmdb sp!,{lr}`
156			`stmdb sp!,{r0-r12}`
157			`mov r4, #0`
158			`mov r5, sp`
159			`mov r6, lr`
160
161			`1: ldr r0, =Status_Message`
162			`mov r1, r4`
163			`ldr r2, [r5], #4`
164			`bl printf`
165
166			`cmp r4, #13`
167			`addne r4, r4, #1`
168			`bne 1b`
169
170			`@ Stack Pointer`
171			`ldr r0, =SPStatus_Message`
172			`mov r1, sp`
173			`bl printf`
174
175			`@ Program Counter - Use Link Register value because`
176			`@ want the PC value of whatever called this function`
177			`ldr r0, =PCStatus_Message`
178			`sub r1, r6, #4`
179			`bl printf`
180
181			`ldmia sp!,{r0-r12}`
182			`ldmia sp!,{pc}^`
183
184
185			`/* stack at top of ddr3 memory space */`
186	11	csantifort	`AdrStack: .word 0x02000000`
187			`AdrMemCtrl: .word ADR_AMBER_TEST_MEM_CTRL`
188	2	csantifort
189			`/* core status messages */`
190	11	csantifort	`Status_Message: .ascii "r%2d %08x\n\00"`
191			`SPStatus_Message: .ascii "sp %08x\n\00"`
192			`PCStatus_Message: .ascii "pc %08x\n\00"`
193	2	csantifort
194	11	csantifort	`.align 2`
195			`AdrATAGBase: .word ATAGBase`
196			`AdeEndATAG: .word EndATAG`
197
198			`ATAGBase: .word ATAG_CORE_SIZE`
199			`.word ATAG_CORE`
200			`.word FLAG_READONLY @ flags`
201			`.word 4096 @ page size`
202			`.word 0x0 @ rootdev`
203
204			`.word ATAG_MEM_SIZE`
205			`.word ATAG_MEM`
206			`.word 3210241024 @ size - 32MB`
207			`.word 0x0 @ start`
208
209			`.word ATAG_RAMDISK_SIZE`
210			`.word ATAG_RAMDISK`
211			`.word 1 @ flags: bit 0 = load, bit 1 = prompt`
212	50	csantifort	`.word 0x000000d0 @ size in 1k blocks`
213	48	csantifort	`.word 0x00800000 @ physical address of start of ramdisk`
214	11	csantifort
215			`.word ATAG_INITRD_SIZE`
216			`.word ATAG_INITRD`
217	48	csantifort	`.word 0x02800000 @ virtual address of start of initrd image`
218	50	csantifort	`.word 0x00032000 @ size = 200k`
219	11	csantifort
220			`.word ATAG_NONE`
221			`.word 0x0`
222			`EndATAG: .word 0x0`
223
224			`AdrBootParams: .word 0x7c000`
225			`AdrPageTabes: .word 0x3f01000`

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[/] [amber/] [trunk/] [sw/] [boot-loader-serial/] [start.S] - Blame information for rev 81