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alirezamon |
#######################################################################
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## File: lm32_new.IP
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##
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## Copyright (C) 2014-2019 Alireza Monemi
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##
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## This file is part of ProNoC 1.9.1
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##
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## WARNING: THIS IS AN AUTO-GENERATED FILE. CHANGES TO IT
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## MAY CAUSE UNEXPECTED BEHAIVOR.
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################################################################################
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$ipgen = bless( {
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'parameters_order' => [
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'INTR_NUM',
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'BARREL_SHIFT',
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'SIGN_EXTEND',
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'BARREL_SHIFT',
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'MULTIPLIER_TYPE',
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'DIVIDOR_TYPE',
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'INSTRUCTION_CACHE',
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'ICACHE_ASSOCIATIVITY',
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'ICACHE_SETS',
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'DATA_CACHE',
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'DCACHE_ASSOCIATIVITY',
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'DCACHE_SETS'
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],
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'sw_files' => [
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'/mpsoc/src_processor/lm32/sw/lm32',
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'/mpsoc/src_processor/lm32/sw/linker.ld',
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'/mpsoc/src_processor/lm32/sw/Makefile'
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],
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'version' => 17,
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'system_h' => '#include "lm32/lm32_system.h"
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static inline void nop (void) {
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asm volatile ("nop");
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}',
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'sockets' => {
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'interrupt_peripheral' => {
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'interrupt_peripheral' => {},
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'value' => 'INTR_NUM',
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'type' => 'param',
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'connection_num' => 'single connection',
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'0' => {
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'name' => 'interrupt_peripheral'
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}
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}
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},
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'hdl_files' => [
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'/mpsoc/src_processor/new_lm32/rtl/lm32_top.v',
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'/mpsoc/src_processor/new_lm32/rtl/lm32_shifter.v',
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'/mpsoc/src_processor/new_lm32/rtl/lm32_ram.v',
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'/mpsoc/src_processor/new_lm32/rtl/lm32_multiplier.v',
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'/mpsoc/src_processor/new_lm32/rtl/lm32_mc_arithmetic.v',
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'/mpsoc/src_processor/new_lm32/rtl/lm32_logic_op.v',
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'/mpsoc/src_processor/new_lm32/rtl/lm32_load_store_unit.v',
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'/mpsoc/src_processor/new_lm32/rtl/lm32_jtag.v',
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'/mpsoc/src_processor/new_lm32/rtl/lm32_itlb.v',
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'/mpsoc/src_processor/new_lm32/rtl/lm32_interrupt.v',
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'/mpsoc/src_processor/new_lm32/rtl/lm32_instruction_unit.v',
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'/mpsoc/src_processor/new_lm32/rtl/lm32_include.v',
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'/mpsoc/src_processor/new_lm32/rtl/lm32_icache.v',
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'/mpsoc/src_processor/new_lm32/rtl/lm32_dtlb.v',
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'/mpsoc/src_processor/new_lm32/rtl/lm32_dp_ram.v',
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'/mpsoc/src_processor/new_lm32/rtl/lm32_decoder.v',
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'/mpsoc/src_processor/new_lm32/rtl/lm32_debug.v',
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'/mpsoc/src_processor/new_lm32/rtl/lm32_dcache.v',
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'/mpsoc/src_processor/new_lm32/rtl/lm32_cpu.v',
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'/mpsoc/src_processor/new_lm32/rtl/lm32_addsub.v',
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'/mpsoc/src_processor/new_lm32/rtl/lm32_adder.v',
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'/mpsoc/src_processor/new_lm32/rtl/lm32.v',
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'/mpsoc/src_processor/new_lm32/rtl/jtag_tap_spartan6.v',
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'/mpsoc/src_processor/new_lm32/rtl/jtag_cores.v'
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],
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'file_name' => 'mpsoc/src_processor/lm32/verilog/src/lm32.v',
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'module_name' => 'lm32',
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'ip_name' => 'lm32_new',
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'parameters' => {
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'INTR_NUM' => {
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'type' => 'Fixed',
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'redefine_param' => 1,
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'default' => '32',
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'content' => '',
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'info' => undef,
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'global_param' => 'Localparam'
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},
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'DIVIDOR_TYPE' => {
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'global_param' => 'Don\'t include',
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'info' => ' Enable the multi-cycle divider. Stalls the pipe until the result
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is ready after 32 cycles. If disabled, the divide operation is not supported.',
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'content' => 'MULTI_CYCLE,NONE',
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'default' => 'MULTI_CYCLE',
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'redefine_param' => 1,
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'type' => 'Combo-box'
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},
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'BARREL_SHIFT' => {
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'default' => 'PIPE_LINE',
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'global_param' => 'Don\'t include',
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'info' => 'Shifter
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You may either enable the piplined or the multi-cycle barrel
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shifter. The multi-cycle shifter will stall the pipeline until
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the result is available after 32 cycles.
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If both options are disabled, only "right shift by one bit" is
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available.',
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'content' => 'MULTI_CYCLE,PIPE_LINE,NONE',
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'type' => 'Combo-box',
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'redefine_param' => 1
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},
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'DCACHE_SETS' => {
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'redefine_param' => 1,
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'type' => 'Combo-box',
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'content' => '128,256,512,1024,2048,4096,8119,16384',
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'info' => ' Number of sets',
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'global_param' => 'Don\'t include',
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'default' => '256'
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},
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'DCACHE_ASSOCIATIVITY' => {
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'redefine_param' => 1,
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'type' => 'Combo-box',
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'content' => '1,2,4,8',
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'global_param' => 'Don\'t include',
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'info' => 'Data cache assocativity number ',
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'default' => '1'
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},
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'INSTRUCTION_CACHE' => {
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'type' => 'Combo-box',
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'redefine_param' => 1,
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'default' => 'ENABLED',
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'global_param' => 'Don\'t include',
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'info' => 'Enable/Disable Instruction cache',
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'content' => 'ENABLED,DISABLED'
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},
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'DATA_CACHE' => {
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'content' => 'ENABLED,DISABLED',
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'global_param' => 'Don\'t include',
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'info' => 'Enable/Disable the data cache',
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'default' => 'ENABLED',
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'redefine_param' => 1,
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'type' => 'Combo-box'
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},
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'ICACHE_ASSOCIATIVITY' => {
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'redefine_param' => 1,
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'type' => 'Combo-box',
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'global_param' => 'Don\'t include',
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'content' => '1,2,4,8',
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'info' => 'Istruction cache assocativity number ',
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'default' => '1'
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},
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'ICACHE_SETS' => {
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'default' => '256',
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'info' => ' Number of sets',
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'global_param' => 'Don\'t include',
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'content' => '128,256,512,1024,2048,4096,8119,16384',
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'type' => 'Combo-box',
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'redefine_param' => 1
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},
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'MULTIPLIER_TYPE' => {
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'content' => 'MULTI_CYCLE,PIPE_LINE,NONE',
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'global_param' => 'Don\'t include',
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'info' => '// Multiplier
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The multiplier is available either in a multi-cycle version or
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in a pipelined one. The multi-cycle multiplier stalls the pipe
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for 32 cycles. If both options are disabled, multiply operations
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are not supported.',
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'default' => 'PIPE_LINE',
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'redefine_param' => 1,
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'type' => 'Combo-box'
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},
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'SIGN_EXTEND' => {
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'type' => 'Combo-box',
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'redefine_param' => 1,
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'default' => 'ENABLED',
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'global_param' => 'Don\'t include',
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'content' => 'ENABLED,DISABLED',
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'info' => 'Enable sign-extension instructions'
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}
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},
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'gui_status' => {
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'timeout' => 0,
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'status' => 'ideal'
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},
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'modules' => {
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'lm32' => {}
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},
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'ports' => {
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'I_ERR_I' => {
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'intfc_name' => 'plug:wb_master[0]',
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'range' => '',
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'type' => 'input',
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'intfc_port' => 'err_i'
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},
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'D_ERR_I' => {
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'intfc_port' => 'err_i',
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'intfc_name' => 'plug:wb_master[1]',
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'range' => '',
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'type' => 'input'
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},
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'I_CTI_O' => {
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'type' => 'output',
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'intfc_name' => 'plug:wb_master[0]',
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'range' => '(3-1):0',
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'intfc_port' => 'cti_o'
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},
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'D_SEL_O' => {
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'intfc_port' => 'sel_o',
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'range' => '(4-1):0',
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'intfc_name' => 'plug:wb_master[1]',
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'type' => 'output'
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},
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'I_SEL_O' => {
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'range' => '(4-1):0',
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'type' => 'output',
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'intfc_name' => 'plug:wb_master[0]',
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'intfc_port' => 'sel_o'
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| 214 |
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},
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'en_i' => {
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'range' => '',
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| 217 |
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'intfc_name' => 'plug:enable[0]',
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'type' => 'input',
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'intfc_port' => 'enable_i'
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| 220 |
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},
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| 221 |
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'interrupt' => {
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| 222 |
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'type' => 'input',
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| 223 |
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'range' => '(32-1):0',
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| 224 |
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'intfc_name' => 'socket:interrupt_peripheral[array]',
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| 225 |
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'intfc_port' => 'int_i'
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},
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'I_DAT_O' => {
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'type' => 'output',
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'range' => '(32-1):0',
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| 230 |
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'intfc_name' => 'plug:wb_master[0]',
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| 231 |
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'intfc_port' => 'dat_o'
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| 232 |
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},
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| 233 |
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'D_ADR_O' => {
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| 234 |
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'intfc_port' => 'adr_o',
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| 235 |
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'range' => '(32-1):0',
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| 236 |
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'type' => 'output',
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| 237 |
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'intfc_name' => 'plug:wb_master[1]'
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| 238 |
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},
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| 239 |
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'I_BTE_O' => {
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| 240 |
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'type' => 'output',
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| 241 |
|
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'range' => '(2-1):0',
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| 242 |
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'intfc_name' => 'plug:wb_master[0]',
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| 243 |
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'intfc_port' => 'bte_o'
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| 244 |
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},
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| 245 |
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'D_STB_O' => {
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| 246 |
|
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'range' => '',
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| 247 |
|
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'type' => 'output',
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| 248 |
|
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'intfc_name' => 'plug:wb_master[1]',
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| 249 |
|
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'intfc_port' => 'stb_o'
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| 250 |
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},
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| 251 |
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'I_ACK_I' => {
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| 252 |
|
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'intfc_port' => 'ack_i',
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| 253 |
|
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'type' => 'input',
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| 254 |
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'range' => '',
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| 255 |
|
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'intfc_name' => 'plug:wb_master[0]'
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| 256 |
|
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},
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| 257 |
|
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'I_DAT_I' => {
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| 258 |
|
|
'intfc_port' => 'dat_i',
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| 259 |
|
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'type' => 'input',
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| 260 |
|
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'range' => '(32-1):0',
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| 261 |
|
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'intfc_name' => 'plug:wb_master[0]'
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| 262 |
|
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},
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| 263 |
|
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'D_CYC_O' => {
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| 264 |
|
|
'type' => 'output',
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| 265 |
|
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'intfc_name' => 'plug:wb_master[1]',
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| 266 |
|
|
'range' => '',
|
| 267 |
|
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'intfc_port' => 'cyc_o'
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| 268 |
|
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},
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| 269 |
|
|
'clk_i' => {
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| 270 |
|
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'intfc_port' => 'clk_i',
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| 271 |
|
|
'range' => '',
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| 272 |
|
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'type' => 'input',
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| 273 |
|
|
'intfc_name' => 'plug:clk[0]'
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| 274 |
|
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},
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| 275 |
|
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'I_ADR_O' => {
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| 276 |
|
|
'intfc_port' => 'adr_o',
|
| 277 |
|
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'type' => 'output',
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| 278 |
|
|
'range' => '(32-1):0',
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| 279 |
|
|
'intfc_name' => 'plug:wb_master[0]'
|
| 280 |
|
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},
|
| 281 |
|
|
'rst_i' => {
|
| 282 |
|
|
'type' => 'input',
|
| 283 |
|
|
'range' => '',
|
| 284 |
|
|
'intfc_name' => 'plug:reset[0]',
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| 285 |
|
|
'intfc_port' => 'reset_i'
|
| 286 |
|
|
},
|
| 287 |
|
|
'D_DAT_O' => {
|
| 288 |
|
|
'intfc_name' => 'plug:wb_master[1]',
|
| 289 |
|
|
'range' => '(32-1):0',
|
| 290 |
|
|
'type' => 'output',
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| 291 |
|
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'intfc_port' => 'dat_o'
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| 292 |
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},
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| 293 |
|
|
'I_STB_O' => {
|
| 294 |
|
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'range' => '',
|
| 295 |
|
|
'intfc_name' => 'plug:wb_master[0]',
|
| 296 |
|
|
'type' => 'output',
|
| 297 |
|
|
'intfc_port' => 'stb_o'
|
| 298 |
|
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},
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| 299 |
|
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'D_RTY_I' => {
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| 300 |
|
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'intfc_port' => 'rty_i',
|
| 301 |
|
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'intfc_name' => 'plug:wb_master[1]',
|
| 302 |
|
|
'range' => '',
|
| 303 |
|
|
'type' => 'input'
|
| 304 |
|
|
},
|
| 305 |
|
|
'I_RTY_I' => {
|
| 306 |
|
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'intfc_port' => 'rty_i',
|
| 307 |
|
|
'range' => '',
|
| 308 |
|
|
'intfc_name' => 'plug:wb_master[0]',
|
| 309 |
|
|
'type' => 'input'
|
| 310 |
|
|
},
|
| 311 |
|
|
'I_CYC_O' => {
|
| 312 |
|
|
'range' => '',
|
| 313 |
|
|
'intfc_name' => 'plug:wb_master[0]',
|
| 314 |
|
|
'type' => 'output',
|
| 315 |
|
|
'intfc_port' => 'cyc_o'
|
| 316 |
|
|
},
|
| 317 |
|
|
'D_CTI_O' => {
|
| 318 |
|
|
'intfc_port' => 'cti_o',
|
| 319 |
|
|
'range' => '(3-1):0',
|
| 320 |
|
|
'intfc_name' => 'plug:wb_master[1]',
|
| 321 |
|
|
'type' => 'output'
|
| 322 |
|
|
},
|
| 323 |
|
|
'D_ACK_I' => {
|
| 324 |
|
|
'intfc_port' => 'ack_i',
|
| 325 |
|
|
'type' => 'input',
|
| 326 |
|
|
'range' => '',
|
| 327 |
|
|
'intfc_name' => 'plug:wb_master[1]'
|
| 328 |
|
|
},
|
| 329 |
|
|
'I_WE_O' => {
|
| 330 |
|
|
'intfc_name' => 'plug:wb_master[0]',
|
| 331 |
|
|
'range' => '',
|
| 332 |
|
|
'type' => 'output',
|
| 333 |
|
|
'intfc_port' => 'we_o'
|
| 334 |
|
|
},
|
| 335 |
|
|
'D_DAT_I' => {
|
| 336 |
|
|
'intfc_port' => 'dat_i',
|
| 337 |
|
|
'type' => 'input',
|
| 338 |
|
|
'range' => '(32-1):0',
|
| 339 |
|
|
'intfc_name' => 'plug:wb_master[1]'
|
| 340 |
|
|
},
|
| 341 |
|
|
'D_BTE_O' => {
|
| 342 |
|
|
'intfc_name' => 'plug:wb_master[1]',
|
| 343 |
|
|
'range' => '(2-1):0',
|
| 344 |
|
|
'type' => 'output',
|
| 345 |
|
|
'intfc_port' => 'bte_o'
|
| 346 |
|
|
},
|
| 347 |
|
|
'D_WE_O' => {
|
| 348 |
|
|
'intfc_port' => 'we_o',
|
| 349 |
|
|
'intfc_name' => 'plug:wb_master[1]',
|
| 350 |
|
|
'type' => 'output',
|
| 351 |
|
|
'range' => ''
|
| 352 |
|
|
}
|
| 353 |
|
|
},
|
| 354 |
|
|
'unused' => {
|
| 355 |
|
|
'plug:wb_master[1]' => [
|
| 356 |
|
|
'tag_o'
|
| 357 |
|
|
],
|
| 358 |
|
|
'plug:wb_master[0]' => [
|
| 359 |
|
|
'tag_o'
|
| 360 |
|
|
]
|
| 361 |
|
|
},
|
| 362 |
|
|
'category' => 'Processor',
|
| 363 |
|
|
'gen_sw_files' => [
|
| 364 |
|
|
'/mpsoc/src_processor/new_lm32/sw/cpu_flags_genfrename_sep_tcpu_flags'
|
| 365 |
|
|
],
|
| 366 |
|
|
'description' => 'A fork of the original LatticeMico32 sources that includes new features. The source code is adopted from:
|
| 367 |
|
|
https://github.com/m-labs/lm32',
|
| 368 |
|
|
'plugs' => {
|
| 369 |
|
|
'enable' => {
|
| 370 |
|
|
'enable' => {},
|
| 371 |
|
|
'type' => 'num',
|
| 372 |
|
|
'0' => {
|
| 373 |
|
|
'name' => 'enable'
|
| 374 |
|
|
},
|
| 375 |
|
|
'value' => 1
|
| 376 |
|
|
},
|
| 377 |
|
|
'clk' => {
|
| 378 |
|
|
'0' => {
|
| 379 |
|
|
'name' => 'clk'
|
| 380 |
|
|
},
|
| 381 |
|
|
'type' => 'num',
|
| 382 |
|
|
'value' => 1,
|
| 383 |
|
|
'clk' => {}
|
| 384 |
|
|
},
|
| 385 |
|
|
'wb_master' => {
|
| 386 |
|
|
'value' => 2,
|
| 387 |
|
|
'type' => 'num',
|
| 388 |
|
|
'0' => {
|
| 389 |
|
|
'name' => 'iwb'
|
| 390 |
|
|
},
|
| 391 |
|
|
'1' => {
|
| 392 |
|
|
'name' => 'dwb'
|
| 393 |
|
|
},
|
| 394 |
|
|
'wb_master' => {}
|
| 395 |
|
|
},
|
| 396 |
|
|
'reset' => {
|
| 397 |
|
|
'type' => 'num',
|
| 398 |
|
|
'0' => {
|
| 399 |
|
|
'name' => 'reset'
|
| 400 |
|
|
},
|
| 401 |
|
|
'value' => 1,
|
| 402 |
|
|
'1' => {
|
| 403 |
|
|
'name' => 'reset_1'
|
| 404 |
|
|
},
|
| 405 |
|
|
'reset' => {}
|
| 406 |
|
|
}
|
| 407 |
|
|
},
|
| 408 |
|
|
'gen_hw_files' => [
|
| 409 |
|
|
'/mpsoc/src_processor/new_lm32/config/lm32_config_gen.vfrename_sep_tlib/lm32_config.v'
|
| 410 |
|
|
],
|
| 411 |
|
|
'system_c' => '#include "lm32/lm32_system.c"',
|
| 412 |
|
|
'ports_order' => [
|
| 413 |
|
|
'clk_i',
|
| 414 |
|
|
'rst_i',
|
| 415 |
|
|
'en_i',
|
| 416 |
|
|
'interrupt',
|
| 417 |
|
|
'I_DAT_I',
|
| 418 |
|
|
'I_ACK_I',
|
| 419 |
|
|
'I_ERR_I',
|
| 420 |
|
|
'I_RTY_I',
|
| 421 |
|
|
'I_DAT_O',
|
| 422 |
|
|
'I_ADR_O',
|
| 423 |
|
|
'I_CYC_O',
|
| 424 |
|
|
'I_SEL_O',
|
| 425 |
|
|
'I_STB_O',
|
| 426 |
|
|
'I_WE_O',
|
| 427 |
|
|
'I_CTI_O',
|
| 428 |
|
|
'I_BTE_O',
|
| 429 |
|
|
'D_DAT_I',
|
| 430 |
|
|
'D_ACK_I',
|
| 431 |
|
|
'D_ERR_I',
|
| 432 |
|
|
'D_RTY_I',
|
| 433 |
|
|
'D_DAT_O',
|
| 434 |
|
|
'D_ADR_O',
|
| 435 |
|
|
'D_CYC_O',
|
| 436 |
|
|
'D_SEL_O',
|
| 437 |
|
|
'D_STB_O',
|
| 438 |
|
|
'D_WE_O',
|
| 439 |
|
|
'D_CTI_O',
|
| 440 |
|
|
'D_BTE_O'
|
| 441 |
|
|
]
|
| 442 |
|
|
}, 'ip_gen' );
|
