URL https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk

Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [src_processor/] [aeMB/] [sw/] [aemb/] [semaphore.cc] - Blame information for rev 48

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#ifdef __cplusplus
extern "C" {
#endif
semaphore __mutex_rendezvous0 = 0; ///< internal rendezvous mutex
semaphore __mutex_rendezvous1 = 1; ///< internal rendezvous mutex
 
 
#ifdef __cplusplus
}
#endif

Line No.	Rev	Author	Line
1	48	alirezamon
2			`#ifdef __cplusplus`
3			`extern "C" {`
4			`#endif`
5			`semaphore __mutex_rendezvous0 = 0; ///< internal rendezvous mutex`
6			`semaphore __mutex_rendezvous1 = 1; ///< internal rendezvous mutex`
7
8
9			`#ifdef __cplusplus`
10			`}`
11			`#endif`

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Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [src_processor/] [aeMB/] [sw/] [aemb/] [semaphore.cc] - Blame information for rev 48