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/////////////////////////////////////////////////////////////////////////
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// $Id: debug.h 11580 2013-01-19 20:45:03Z sshwarts $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001-2013 The Bochs Project
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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#ifndef BX_DEBUG_H
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#define BX_DEBUG_H
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// if including from C parser, need basic types etc
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#include "config.h"
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#include "osdep.h"
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#define BX_DBG_NO_HANDLE 1000
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Bit32u crc32(const Bit8u *buf, int len);
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#if BX_DEBUGGER
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// some strict C declarations needed by the parser/lexer
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#ifdef __cplusplus
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extern "C" {
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#endif
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extern Bit32u dbg_cpu;
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void dbg_printf (const char *fmt, ...);
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typedef enum {
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BX_DBG_SREG_ES,
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BX_DBG_SREG_CS,
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BX_DBG_SREG_SS,
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BX_DBG_SREG_DS,
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BX_DBG_SREG_FS,
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BX_DBG_SREG_GS
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} SRegs;
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#if BX_SUPPORT_X86_64
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# define BX_DBG_GEN_REGISTERS 16
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#else
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# define BX_DBG_GEN_REGISTERS 8
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#endif
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typedef enum {
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BX_DBG_REG8H_AH,
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BX_DBG_REG8H_CH,
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BX_DBG_REG8H_DH,
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BX_DBG_REG8H_BH,
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} Regs8H;
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#if BX_SUPPORT_X86_64
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typedef enum {
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BX_DBG_REG8L_AL,
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BX_DBG_REG8L_CL,
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BX_DBG_REG8L_DL,
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BX_DBG_REG8L_BL,
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BX_DBG_REG8L_SPL,
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BX_DBG_REG8L_BPL,
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BX_DBG_REG8L_SIL,
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BX_DBG_REG8L_DIL,
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BX_DBG_REG8L_R8,
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BX_DBG_REG8L_R9,
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BX_DBG_REG8L_R10,
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BX_DBG_REG8L_R11,
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BX_DBG_REG8L_R12,
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BX_DBG_REG8L_R13,
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BX_DBG_REG8L_R14,
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BX_DBG_REG8L_R15
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} Regs8L;
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typedef enum {
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BX_DBG_REG16_AX,
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BX_DBG_REG16_CX,
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BX_DBG_REG16_DX,
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BX_DBG_REG16_BX,
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BX_DBG_REG16_SP,
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BX_DBG_REG16_BP,
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BX_DBG_REG16_SI,
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BX_DBG_REG16_DI,
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BX_DBG_REG16_R8,
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BX_DBG_REG16_R9,
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BX_DBG_REG16_R10,
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BX_DBG_REG16_R11,
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BX_DBG_REG16_R12,
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BX_DBG_REG16_R13,
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BX_DBG_REG16_R14,
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BX_DBG_REG16_R15
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} Regs16;
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typedef enum {
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BX_DBG_REG32_EAX,
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BX_DBG_REG32_ECX,
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BX_DBG_REG32_EDX,
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BX_DBG_REG32_EBX,
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BX_DBG_REG32_ESP,
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BX_DBG_REG32_EBP,
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BX_DBG_REG32_ESI,
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BX_DBG_REG32_EDI,
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BX_DBG_REG32_R8,
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BX_DBG_REG32_R9,
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BX_DBG_REG32_R10,
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BX_DBG_REG32_R11,
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BX_DBG_REG32_R12,
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BX_DBG_REG32_R13,
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BX_DBG_REG32_R14,
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BX_DBG_REG32_R15
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} Regs32;
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typedef enum {
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BX_DBG_REG64_RAX,
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BX_DBG_REG64_RCX,
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BX_DBG_REG64_RDX,
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BX_DBG_REG64_RBX,
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BX_DBG_REG64_RSP,
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BX_DBG_REG64_RBP,
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BX_DBG_REG64_RSI,
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BX_DBG_REG64_RDI,
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BX_DBG_REG64_R8,
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BX_DBG_REG64_R9,
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BX_DBG_REG64_R10,
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BX_DBG_REG64_R11,
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BX_DBG_REG64_R12,
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BX_DBG_REG64_R13,
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BX_DBG_REG64_R14,
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BX_DBG_REG64_R15
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} Regs64;
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#else
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typedef enum {
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BX_DBG_REG8L_AL,
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BX_DBG_REG8L_CL,
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BX_DBG_REG8L_DL,
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BX_DBG_REG8L_BL
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} Regs8L;
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typedef enum {
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BX_DBG_REG16_AX,
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BX_DBG_REG16_CX,
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BX_DBG_REG16_DX,
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BX_DBG_REG16_BX,
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BX_DBG_REG16_SP,
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BX_DBG_REG16_BP,
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BX_DBG_REG16_SI,
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BX_DBG_REG16_DI
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} Regs16;
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typedef enum {
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BX_DBG_REG32_EAX,
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BX_DBG_REG32_ECX,
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BX_DBG_REG32_EDX,
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BX_DBG_REG32_EBX,
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BX_DBG_REG32_ESP,
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BX_DBG_REG32_EBP,
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BX_DBG_REG32_ESI,
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BX_DBG_REG32_EDI
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} Regs32;
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#endif
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typedef enum
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{
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bkRegular,
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bkAtIP,
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bkStepOver
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} BreakpointKind;
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typedef enum _show_flags {
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Flag_call = 0x1,
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Flag_ret = 0x2,
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Flag_softint = 0x4,
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Flag_iret = 0x8,
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Flag_intsig = 0x10,
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Flag_mode = 0x20,
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} show_flags_t;
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// Flex defs
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extern int bxlex(void);
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extern char *bxtext; // Using the pointer option rather than array
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extern int bxwrap(void);
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void bx_add_lex_input(char *buf);
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// Yacc defs
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extern int bxparse(void);
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extern void bxerror(char *s);
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// register function for 'info device' command
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bx_bool bx_dbg_register_debug_info(const char *devname, void *dev);
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#define EMPTY_ARG (-1)
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bx_bool bx_dbg_read_linear(unsigned which_cpu, bx_address laddr, unsigned len, Bit8u *buf);
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Bit16u bx_dbg_get_selector_value(unsigned int seg_no);
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Bit16u bx_dbg_get_ip (void);
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Bit32u bx_dbg_get_eip(void);
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bx_address bx_dbg_get_instruction_pointer(void);
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Bit8u bx_dbg_get_reg8l_value(unsigned reg);
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Bit8u bx_dbg_get_reg8h_value(unsigned reg);
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Bit16u bx_dbg_get_reg16_value(unsigned reg);
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Bit32u bx_dbg_get_reg32_value(unsigned reg);
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Bit64u bx_dbg_get_reg64_value(unsigned reg);
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void bx_dbg_set_reg8l_value(unsigned reg, Bit8u value);
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void bx_dbg_set_reg8h_value(unsigned reg, Bit8u value);
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void bx_dbg_set_reg16_value(unsigned reg, Bit16u value);
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void bx_dbg_set_reg32_value(unsigned reg, Bit32u value);
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void bx_dbg_set_reg64_value(unsigned reg, Bit64u value);
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void bx_dbg_set_rip_value(bx_address value);
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void bx_dbg_load_segreg(unsigned reg, unsigned value);
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bx_address bx_dbg_get_laddr(Bit16u sel, bx_address ofs);
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void bx_dbg_step_over_command(void);
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void bx_dbg_trace_command(bx_bool enable);
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void bx_dbg_trace_reg_command(bx_bool enable);
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void bx_dbg_trace_mem_command(bx_bool enable);
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void bx_dbg_ptime_command(void);
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void bx_dbg_timebp_command(bx_bool absolute, Bit64u time);
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#define MAX_CONCURRENT_BPS 5
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extern int timebp_timer;
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extern Bit64u timebp_queue[MAX_CONCURRENT_BPS];
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extern int timebp_queue_size;
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void bx_dbg_modebp_command(void);
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void bx_dbg_vmexitbp_command(void);
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void bx_dbg_where_command(void);
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void bx_dbg_print_string_command(bx_address addr);
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void bx_dbg_xlate_address(bx_lin_address laddr);
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void bx_dbg_tlb_lookup(bx_lin_address laddr);
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void bx_dbg_show_command(const char*);
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void bx_dbg_print_stack_command(unsigned nwords);
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void bx_dbg_print_watchpoints(void);
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void bx_dbg_watchpoint_continue(bx_bool watch_continue);
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void bx_dbg_watch(int type, bx_phy_address address, Bit32u len);
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void bx_dbg_unwatch_all(void);
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void bx_dbg_unwatch(bx_phy_address handle);
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void bx_dbg_continue_command(void);
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void bx_dbg_stepN_command(int cpu, Bit32u count);
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void bx_dbg_set_auto_disassemble(bx_bool enable);
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void bx_dbg_disassemble_switch_mode(void);
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void bx_dbg_disassemble_hex_mode_switch(int mode);
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void bx_dbg_set_disassemble_size(unsigned size);
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void bx_dbg_del_breakpoint_command(unsigned handle);
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void bx_dbg_en_dis_breakpoint_command(unsigned handle, bx_bool enable);
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bx_bool bx_dbg_en_dis_pbreak(unsigned handle, bx_bool enable);
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bx_bool bx_dbg_en_dis_lbreak(unsigned handle, bx_bool enable);
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bx_bool bx_dbg_en_dis_vbreak(unsigned handle, bx_bool enable);
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bx_bool bx_dbg_del_pbreak(unsigned handle);
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bx_bool bx_dbg_del_lbreak(unsigned handle);
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bx_bool bx_dbg_del_vbreak(unsigned handle);
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int bx_dbg_vbreakpoint_command(BreakpointKind bk, Bit32u cs, bx_address eip);
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int bx_dbg_lbreakpoint_command(BreakpointKind bk, bx_address laddress);
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int bx_dbg_pbreakpoint_command(BreakpointKind bk, bx_phy_address paddress);
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void bx_dbg_info_bpoints_command(void);
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void bx_dbg_quit_command(void);
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#define BX_INFO_GENERAL_PURPOSE_REGS 0x01 /* bitmasks - choices for bx_dbg_info_registers_command */
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#define BX_INFO_FPU_REGS 0x02
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#define BX_INFO_MMX_REGS 0x04
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#define BX_INFO_SSE_REGS 0x08
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#define BX_INFO_AVX_REGS 0x10
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void bx_dbg_info_registers_command(int);
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void bx_dbg_info_ivt_command(unsigned from, unsigned to);
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void bx_dbg_info_idt_command(unsigned from, unsigned to);
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void bx_dbg_info_gdt_command(unsigned from, unsigned to);
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void bx_dbg_info_ldt_command(unsigned from, unsigned to);
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void bx_dbg_info_tss_command(void);
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void bx_dbg_info_debug_regs_command(void);
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void bx_dbg_info_control_regs_command(void);
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void bx_dbg_info_segment_regs_command(void);
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void bx_dbg_info_flags(void);
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void bx_dbg_info_linux_command(void);
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void bx_dbg_examine_command(const char *command, const char *format, bx_bool format_passed,
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bx_address addr, bx_bool addr_passed);
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Bit32u bx_dbg_lin_indirect(bx_address addr);
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Bit32u bx_dbg_phy_indirect(bx_phy_address addr);
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void bx_dbg_writemem_command(const char *filename, bx_address laddr, unsigned len);
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void bx_dbg_setpmem_command(bx_phy_address addr, unsigned len, Bit32u val);
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void bx_dbg_query_command(const char *);
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void bx_dbg_take_command(const char *, unsigned n);
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void bx_dbg_disassemble_current(const char *);
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void bx_dbg_disassemble_command(const char *, Bit64u from, Bit64u to);
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void bx_dbg_instrument_command(const char *);
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void bx_dbg_doit_command(unsigned);
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void bx_dbg_crc_command(bx_phy_address addr1, bx_phy_address addr2);
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void bx_dbg_linux_syscall(unsigned which_cpu);
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void bx_dbg_info_device(const char *, const char *);
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void bx_dbg_print_help(void);
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void bx_dbg_calc_command(Bit64u value);
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void bx_dbg_dump_table(void);
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// callbacks from CPU
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void bx_dbg_exception(unsigned cpu, Bit8u vector, Bit16u error_code);
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void bx_dbg_interrupt(unsigned cpu, Bit8u vector, Bit16u error_code);
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void bx_dbg_halt(unsigned cpu);
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// memory trace callbacks from CPU, len=1,2,4 or 8
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void bx_dbg_lin_memory_access(unsigned cpu, bx_address lin, bx_phy_address phy, unsigned len, unsigned pl, unsigned rw, Bit8u *data);
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void bx_dbg_phy_memory_access(unsigned cpu, bx_phy_address phy, unsigned len, unsigned rw, unsigned attr, Bit8u *data);
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// check memory access for watchpoints
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void bx_dbg_check_memory_watchpoints(unsigned cpu, bx_phy_address phy, unsigned len, unsigned rw);
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// commands that work with Bochs param tree
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315 |
|
|
void bx_dbg_restore_command(const char *param_name, const char *path);
|
316 |
|
|
void bx_dbg_show_param_command(const char *param);
|
317 |
|
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|
318 |
|
|
int bx_dbg_show_symbolic(void);
|
319 |
|
|
void bx_dbg_set_symbol_command(const char *symbol, bx_address val);
|
320 |
|
|
const char* bx_dbg_symbolic_address(Bit32u context, Bit32u eip, Bit32u base);
|
321 |
|
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const char* bx_dbg_symbolic_address_16bit(Bit32u eip, Bit32u cs);
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322 |
|
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int bx_dbg_symbol_command(const char* filename, bx_bool global, Bit32u offset);
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323 |
|
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void bx_dbg_info_symbols_command(const char *Symbol);
|
324 |
|
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int bx_dbg_lbreakpoint_symbol_command(const char *Symbol);
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325 |
|
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Bit32u bx_dbg_get_symbol_value(const char *Symbol);
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326 |
|
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const char* bx_dbg_disasm_symbolic_address(Bit32u eip, Bit32u base);
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327 |
|
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|
328 |
|
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#ifdef __cplusplus
|
329 |
|
|
}
|
330 |
|
|
#endif
|
331 |
|
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|
332 |
|
|
// the rest for C++
|
333 |
|
|
#ifdef __cplusplus
|
334 |
|
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|
335 |
|
|
typedef enum {
|
336 |
|
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STOP_NO_REASON = 0,
|
337 |
|
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STOP_TIME_BREAK_POINT,
|
338 |
|
|
STOP_READ_WATCH_POINT,
|
339 |
|
|
STOP_WRITE_WATCH_POINT,
|
340 |
|
|
STOP_MAGIC_BREAK_POINT,
|
341 |
|
|
STOP_MODE_BREAK_POINT,
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342 |
|
|
STOP_VMEXIT_BREAK_POINT,
|
343 |
|
|
STOP_CPU_HALTED,
|
344 |
|
|
} stop_reason_t;
|
345 |
|
|
|
346 |
|
|
typedef enum {
|
347 |
|
|
BREAK_POINT_MAGIC, BREAK_POINT_READ, BREAK_POINT_WRITE, BREAK_POINT_TIME
|
348 |
|
|
} break_point_t;
|
349 |
|
|
|
350 |
|
|
#define BX_DBG_PENDING_DMA 1
|
351 |
|
|
#define BX_DBG_PENDING_IRQ 2
|
352 |
|
|
|
353 |
|
|
void bx_debug_break(void);
|
354 |
|
|
|
355 |
|
|
void bx_dbg_exit(int code);
|
356 |
|
|
#if BX_DBG_EXTENSIONS
|
357 |
|
|
int bx_dbg_extensions(char *command);
|
358 |
|
|
#else
|
359 |
|
|
#define bx_dbg_extensions(command) 0
|
360 |
|
|
#endif
|
361 |
|
|
|
362 |
|
|
//
|
363 |
|
|
// code for guards...
|
364 |
|
|
//
|
365 |
|
|
|
366 |
|
|
#define BX_DBG_GUARD_IADDR_VIR 0x0001
|
367 |
|
|
#define BX_DBG_GUARD_IADDR_LIN 0x0002
|
368 |
|
|
#define BX_DBG_GUARD_IADDR_PHY 0x0004
|
369 |
|
|
#define BX_DBG_GUARD_IADDR_ALL (BX_DBG_GUARD_IADDR_VIR | \
|
370 |
|
|
BX_DBG_GUARD_IADDR_LIN | \
|
371 |
|
|
BX_DBG_GUARD_IADDR_PHY)
|
372 |
|
|
|
373 |
|
|
#define BX_DBG_GUARD_ICOUNT 0x0010
|
374 |
|
|
|
375 |
|
|
typedef struct {
|
376 |
|
|
unsigned guard_for;
|
377 |
|
|
|
378 |
|
|
// instruction address breakpoints
|
379 |
|
|
struct {
|
380 |
|
|
#if (BX_DBG_MAX_VIR_BPOINTS > 0)
|
381 |
|
|
unsigned num_virtual;
|
382 |
|
|
struct {
|
383 |
|
|
Bit32u cs; // only use 16 bits
|
384 |
|
|
bx_address eip;
|
385 |
|
|
unsigned bpoint_id;
|
386 |
|
|
bx_bool enabled;
|
387 |
|
|
} vir[BX_DBG_MAX_VIR_BPOINTS];
|
388 |
|
|
#endif
|
389 |
|
|
|
390 |
|
|
#if (BX_DBG_MAX_LIN_BPOINTS > 0)
|
391 |
|
|
unsigned num_linear;
|
392 |
|
|
struct {
|
393 |
|
|
bx_address addr;
|
394 |
|
|
unsigned bpoint_id;
|
395 |
|
|
bx_bool enabled;
|
396 |
|
|
} lin[BX_DBG_MAX_LIN_BPOINTS];
|
397 |
|
|
#endif
|
398 |
|
|
|
399 |
|
|
#if (BX_DBG_MAX_PHY_BPOINTS > 0)
|
400 |
|
|
unsigned num_physical;
|
401 |
|
|
struct {
|
402 |
|
|
bx_phy_address addr;
|
403 |
|
|
unsigned bpoint_id;
|
404 |
|
|
bx_bool enabled;
|
405 |
|
|
} phy[BX_DBG_MAX_PHY_BPOINTS];
|
406 |
|
|
#endif
|
407 |
|
|
} iaddr;
|
408 |
|
|
|
409 |
|
|
// user typed Ctrl-C, requesting simulator stop at next convinient spot
|
410 |
|
|
volatile bx_bool interrupt_requested;
|
411 |
|
|
|
412 |
|
|
// booleans to control whether simulator should report events
|
413 |
|
|
// to debug controller
|
414 |
|
|
struct {
|
415 |
|
|
bx_bool irq;
|
416 |
|
|
bx_bool a20;
|
417 |
|
|
bx_bool io;
|
418 |
|
|
bx_bool dma;
|
419 |
|
|
} report;
|
420 |
|
|
|
421 |
|
|
struct {
|
422 |
|
|
bx_bool irq; // should process IRQs asynchronously
|
423 |
|
|
bx_bool dma; // should process DMAs asynchronously
|
424 |
|
|
} async;
|
425 |
|
|
|
426 |
|
|
#define BX_DBG_ASYNC_PENDING_A20 0x01
|
427 |
|
|
#define BX_DBG_ASYNC_PENDING_RESET 0x02
|
428 |
|
|
#define BX_DBG_ASYNC_PENDING_NMI 0x04
|
429 |
|
|
|
430 |
|
|
// Asynchronous changes which are pending. These are Q'd by
|
431 |
|
|
// the debugger, as the master simulator is notified of a pending
|
432 |
|
|
// async change. At the simulator's next point, where it checks for
|
433 |
|
|
// such events, it notifies the debugger with acknowlegement. This
|
434 |
|
|
// field contains a logically or'd list of all events which should
|
435 |
|
|
// be checked, and ack'd.
|
436 |
|
|
struct {
|
437 |
|
|
unsigned which; // logical OR of above constants
|
438 |
|
|
bx_bool a20;
|
439 |
|
|
bx_bool reset;
|
440 |
|
|
bx_bool nmi;
|
441 |
|
|
} async_changes_pending;
|
442 |
|
|
} bx_guard_t;
|
443 |
|
|
|
444 |
|
|
// working information for each simulator to update when a guard
|
445 |
|
|
// is reached (found)
|
446 |
|
|
typedef struct bx_guard_found_t {
|
447 |
|
|
unsigned guard_found;
|
448 |
|
|
Bit64u icount_max; // stop after completing this many instructions
|
449 |
|
|
unsigned iaddr_index;
|
450 |
|
|
Bit32u cs; // cs:eip and linear addr of instruction at guard point
|
451 |
|
|
bx_address eip;
|
452 |
|
|
bx_address laddr;
|
453 |
|
|
// 00 - 16 bit, 01 - 32 bit, 10 - 64-bit, 11 - illegal
|
454 |
|
|
unsigned code_32_64; // CS seg size at guard point
|
455 |
|
|
} bx_guard_found_t;
|
456 |
|
|
|
457 |
|
|
struct bx_watchpoint {
|
458 |
|
|
bx_phy_address addr;
|
459 |
|
|
Bit32u len;
|
460 |
|
|
};
|
461 |
|
|
|
462 |
|
|
extern unsigned num_write_watchpoints;
|
463 |
|
|
extern unsigned num_read_watchpoints;
|
464 |
|
|
extern bx_watchpoint write_watchpoint[BX_DBG_MAX_WATCHPONTS];
|
465 |
|
|
extern bx_watchpoint read_watchpoint[BX_DBG_MAX_WATCHPONTS];
|
466 |
|
|
extern bx_guard_t bx_guard;
|
467 |
|
|
|
468 |
|
|
#define IS_CODE_32(code_32_64) ((code_32_64 & 1) != 0)
|
469 |
|
|
#define IS_CODE_64(code_32_64) ((code_32_64 & 2) != 0)
|
470 |
|
|
|
471 |
|
|
void bx_dbg_init_infile(void);
|
472 |
|
|
int bx_dbg_set_rcfile(const char *rcfile);
|
473 |
|
|
int bx_dbg_main(void);
|
474 |
|
|
void bx_dbg_user_input_loop(void);
|
475 |
|
|
void bx_dbg_interpret_line(char *cmd);
|
476 |
|
|
|
477 |
|
|
typedef struct {
|
478 |
|
|
Bit16u sel;
|
479 |
|
|
Bit32u des_l, des_h, valid;
|
480 |
|
|
#if BX_SUPPORT_X86_64
|
481 |
|
|
Bit32u dword3;
|
482 |
|
|
#endif
|
483 |
|
|
} bx_dbg_sreg_t;
|
484 |
|
|
|
485 |
|
|
typedef struct {
|
486 |
|
|
bx_address base;
|
487 |
|
|
Bit16u limit;
|
488 |
|
|
} bx_dbg_global_sreg_t;
|
489 |
|
|
|
490 |
|
|
void bx_dbg_dma_report(bx_phy_address addr, unsigned len, unsigned what, Bit32u val);
|
491 |
|
|
void bx_dbg_iac_report(unsigned vector, unsigned irq);
|
492 |
|
|
void bx_dbg_a20_report(unsigned val);
|
493 |
|
|
void bx_dbg_io_report(Bit32u port, unsigned size, unsigned op, Bit32u val);
|
494 |
|
|
void bx_dbg_disassemble_current(int which_cpu, int print_time);
|
495 |
|
|
|
496 |
|
|
#endif // #ifdef __cplusplus
|
497 |
|
|
|
498 |
|
|
#endif // #if BX_DEBUGGER
|
499 |
|
|
|
500 |
|
|
#endif
|