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alfik |
/////////////////////////////////////////////////////////////////////////
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// $Id: access.cc 11574 2013-01-16 17:28:20Z sshwarts $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2005-2010 The Bochs Project
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
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//
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/////////////////////////////////////////////////////////////////////////
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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bx_address bx_asize_mask[] = {
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0xffff, // as16 (asize = '00)
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0xffffffff, // as32 (asize = '01)
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#if BX_SUPPORT_X86_64
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BX_CONST64(0xffffffffffffffff), // as64 (asize = '10)
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BX_CONST64(0xffffffffffffffff) // as64 (asize = '11)
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#endif
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};
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bx_bool BX_CPP_AttrRegparmN(3)
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BX_CPU_C::write_virtual_checks(bx_segment_reg_t *seg, Bit32u offset, unsigned length)
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{
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Bit32u upper_limit;
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if (seg->cache.valid==0) {
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BX_DEBUG(("write_virtual_checks(): segment descriptor not valid"));
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return 0;
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}
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if (seg->cache.p == 0) { /* not present */
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BX_ERROR(("write_virtual_checks(): segment not present"));
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return 0;
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}
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length--;
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switch (seg->cache.type) {
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case 0: case 1: // read only
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case 4: case 5: // read only, expand down
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case 8: case 9: // execute only
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case 10: case 11: // execute/read
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case 12: case 13: // execute only, conforming
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case 14: case 15: // execute/read-only, conforming
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BX_ERROR(("write_virtual_checks(): no write access to seg"));
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return 0;
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case 2: case 3: /* read/write */
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if (offset > (seg->cache.u.segment.limit_scaled - length)
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|| length > seg->cache.u.segment.limit_scaled)
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{
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BX_ERROR(("write_virtual_checks(): write beyond limit, r/w"));
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return 0;
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}
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if (seg->cache.u.segment.limit_scaled >= 31) {
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// Mark cache as being OK type for succeeding read/writes. The limit
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// checks still needs to be done though, but is more simple. We
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// could probably also optimize that out with a flag for the case
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// when limit is the maximum 32bit value. Limit should accomodate
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// at least a dword, since we subtract from it in the simple
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// limit check in other functions, and we don't want the value to roll.
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// Only normal segments (not expand down) are handled this way.
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seg->cache.valid |= SegAccessROK | SegAccessWOK;
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}
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break;
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case 6: case 7: /* read/write, expand down */
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if (seg->cache.u.segment.d_b)
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upper_limit = 0xffffffff;
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else
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upper_limit = 0x0000ffff;
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if (offset <= seg->cache.u.segment.limit_scaled ||
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offset > upper_limit || (upper_limit - offset) < length)
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{
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BX_ERROR(("write_virtual_checks(): write beyond limit, r/w ED"));
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return 0;
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}
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break;
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default:
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BX_PANIC(("write_virtual_checks(): unknown descriptor type=%d", seg->cache.type));
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}
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return 1;
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}
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bx_bool BX_CPP_AttrRegparmN(3)
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BX_CPU_C::read_virtual_checks(bx_segment_reg_t *seg, Bit32u offset, unsigned length)
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{
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Bit32u upper_limit;
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if (seg->cache.valid==0) {
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BX_DEBUG(("read_virtual_checks(): segment descriptor not valid"));
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return 0;
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}
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if (seg->cache.p == 0) { /* not present */
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BX_ERROR(("read_virtual_checks(): segment not present"));
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return 0;
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}
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length--;
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switch (seg->cache.type) {
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case 0: case 1: /* read only */
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case 2: case 3: /* read/write */
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case 10: case 11: /* execute/read */
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case 14: case 15: /* execute/read-only, conforming */
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if (offset > (seg->cache.u.segment.limit_scaled - length)
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|| length > seg->cache.u.segment.limit_scaled)
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{
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BX_ERROR(("read_virtual_checks(): read beyond limit"));
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return 0;
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}
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| 131 |
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if (seg->cache.u.segment.limit_scaled >= 31) {
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// Mark cache as being OK type for succeeding reads. See notes for
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// write checks; similar code.
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seg->cache.valid |= SegAccessROK;
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}
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break;
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| 138 |
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case 4: case 5: /* read only, expand down */
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case 6: case 7: /* read/write, expand down */
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if (seg->cache.u.segment.d_b)
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upper_limit = 0xffffffff;
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else
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upper_limit = 0x0000ffff;
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if (offset <= seg->cache.u.segment.limit_scaled ||
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offset > upper_limit || (upper_limit - offset) < length)
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{
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BX_ERROR(("read_virtual_checks(): read beyond limit ED"));
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return 0;
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}
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break;
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case 8: case 9: /* execute only */
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case 12: case 13: /* execute only, conforming */
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/* can't read or write an execute-only segment */
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BX_ERROR(("read_virtual_checks(): execute only"));
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return 0;
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default:
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BX_PANIC(("read_virtual_checks(): unknown descriptor type=%d", seg->cache.type));
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}
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return 1;
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}
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bx_bool BX_CPP_AttrRegparmN(3)
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BX_CPU_C::execute_virtual_checks(bx_segment_reg_t *seg, Bit32u offset, unsigned length)
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{
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Bit32u upper_limit;
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if (seg->cache.valid==0) {
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BX_DEBUG(("execute_virtual_checks(): segment descriptor not valid"));
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return 0;
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}
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| 175 |
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if (seg->cache.p == 0) { /* not present */
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BX_ERROR(("execute_virtual_checks(): segment not present"));
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return 0;
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}
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| 180 |
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length--;
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| 181 |
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| 182 |
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switch (seg->cache.type) {
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case 0: case 1: /* read only */
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case 2: case 3: /* read/write */
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| 185 |
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case 10: case 11: /* execute/read */
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| 186 |
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case 14: case 15: /* execute/read-only, conforming */
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| 187 |
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if (offset > (seg->cache.u.segment.limit_scaled - length)
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| 188 |
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|| length > seg->cache.u.segment.limit_scaled)
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| 189 |
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{
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| 190 |
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BX_ERROR(("execute_virtual_checks(): read beyond limit"));
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| 191 |
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return 0;
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| 192 |
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}
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| 193 |
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if (seg->cache.u.segment.limit_scaled >= 31) {
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// Mark cache as being OK type for succeeding reads. See notes for
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| 195 |
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// write checks; similar code.
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seg->cache.valid |= SegAccessROK;
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}
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| 198 |
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break;
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| 199 |
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| 200 |
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case 8: case 9: /* execute only */
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| 201 |
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case 12: case 13: /* execute only, conforming */
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| 202 |
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if (offset > (seg->cache.u.segment.limit_scaled - length)
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| 203 |
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|| length > seg->cache.u.segment.limit_scaled)
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| 204 |
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{
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| 205 |
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BX_ERROR(("execute_virtual_checks(): read beyond limit execute only"));
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| 206 |
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return 0;
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| 207 |
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}
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| 208 |
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break;
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| 209 |
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| 210 |
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case 4: case 5: /* read only, expand down */
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| 211 |
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case 6: case 7: /* read/write, expand down */
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if (seg->cache.u.segment.d_b)
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| 213 |
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upper_limit = 0xffffffff;
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else
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| 215 |
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upper_limit = 0x0000ffff;
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| 216 |
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if (offset <= seg->cache.u.segment.limit_scaled ||
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| 217 |
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offset > upper_limit || (upper_limit - offset) < length)
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| 218 |
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{
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| 219 |
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BX_ERROR(("execute_virtual_checks(): read beyond limit ED"));
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| 220 |
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return 0;
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| 221 |
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}
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| 222 |
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break;
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| 223 |
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| 224 |
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default:
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| 225 |
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BX_PANIC(("execute_virtual_checks(): unknown descriptor type=%d", seg->cache.type));
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| 226 |
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}
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| 227 |
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| 228 |
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return 1;
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| 229 |
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}
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| 230 |
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| 231 |
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const char *BX_CPU_C::strseg(bx_segment_reg_t *seg)
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| 232 |
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{
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| 233 |
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if (seg == &BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES]) return("ES");
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| 234 |
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else if (seg == &BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS]) return("CS");
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| 235 |
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else if (seg == &BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS]) return("SS");
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| 236 |
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else if (seg == &BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS]) return("DS");
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| 237 |
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else if (seg == &BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS]) return("FS");
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| 238 |
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else if (seg == &BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS]) return("GS");
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| 239 |
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else {
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| 240 |
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BX_PANIC(("undefined segment passed to strseg()!"));
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| 241 |
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return("??");
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| 242 |
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}
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| 243 |
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}
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| 244 |
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| 245 |
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int BX_CPU_C::int_number(unsigned s)
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| 246 |
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{
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| 247 |
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if (s == BX_SEG_REG_SS)
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| 248 |
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return BX_SS_EXCEPTION;
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| 249 |
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else
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| 250 |
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return BX_GP_EXCEPTION;
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| 251 |
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}
|
| 252 |
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| 253 |
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Bit8u BX_CPP_AttrRegparmN(1)
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| 254 |
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BX_CPU_C::system_read_byte(bx_address laddr)
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| 255 |
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{
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| 256 |
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Bit8u data;
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| 257 |
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| 258 |
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unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
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| 259 |
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bx_address lpf = LPFOf(laddr);
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| 260 |
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bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
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| 261 |
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if (tlbEntry->lpf == lpf) {
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| 262 |
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// See if the TLB entry privilege level allows us read access
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| 263 |
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// from this CPL.
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| 264 |
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if (tlbEntry->accessBits & 0x01) {
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| 265 |
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bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
|
| 266 |
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Bit32u pageOffset = PAGE_OFFSET(laddr);
|
| 267 |
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Bit8u *hostAddr = (Bit8u*) (hostPageAddr | pageOffset);
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| 268 |
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data = *hostAddr;
|
| 269 |
|
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BX_NOTIFY_LIN_MEMORY_ACCESS(laddr, (tlbEntry->ppf | pageOffset), 1, 0, BX_READ, (Bit8u*) &data);
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| 270 |
|
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return data;
|
| 271 |
|
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}
|
| 272 |
|
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}
|
| 273 |
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|
| 274 |
|
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#if BX_SUPPORT_X86_64
|
| 275 |
|
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if (! IsCanonical(laddr)) {
|
| 276 |
|
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BX_ERROR(("system_read_byte(): canonical failure"));
|
| 277 |
|
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exception(BX_GP_EXCEPTION, 0);
|
| 278 |
|
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}
|
| 279 |
|
|
#endif
|
| 280 |
|
|
|
| 281 |
|
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access_read_linear(laddr, 1, 0, BX_READ, (void *) &data);
|
| 282 |
|
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return data;
|
| 283 |
|
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}
|
| 284 |
|
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|
| 285 |
|
|
Bit16u BX_CPP_AttrRegparmN(1)
|
| 286 |
|
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BX_CPU_C::system_read_word(bx_address laddr)
|
| 287 |
|
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{
|
| 288 |
|
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Bit16u data;
|
| 289 |
|
|
|
| 290 |
|
|
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 1);
|
| 291 |
|
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bx_address lpf = LPFOf(laddr);
|
| 292 |
|
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bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
|
| 293 |
|
|
if (tlbEntry->lpf == lpf) {
|
| 294 |
|
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// See if the TLB entry privilege level allows us read access
|
| 295 |
|
|
// from this CPL.
|
| 296 |
|
|
if (tlbEntry->accessBits & 0x01) {
|
| 297 |
|
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bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
|
| 298 |
|
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Bit32u pageOffset = PAGE_OFFSET(laddr);
|
| 299 |
|
|
Bit16u *hostAddr = (Bit16u*) (hostPageAddr | pageOffset);
|
| 300 |
|
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ReadHostWordFromLittleEndian(hostAddr, data);
|
| 301 |
|
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BX_NOTIFY_LIN_MEMORY_ACCESS(laddr, (tlbEntry->ppf | pageOffset), 2, 0, BX_READ, (Bit8u*) &data);
|
| 302 |
|
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return data;
|
| 303 |
|
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}
|
| 304 |
|
|
}
|
| 305 |
|
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|
| 306 |
|
|
#if BX_SUPPORT_X86_64
|
| 307 |
|
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if (! IsCanonical(laddr) || ! IsCanonical(laddr+1)) {
|
| 308 |
|
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BX_ERROR(("system_read_word(): canonical failure"));
|
| 309 |
|
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exception(BX_GP_EXCEPTION, 0);
|
| 310 |
|
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}
|
| 311 |
|
|
#endif
|
| 312 |
|
|
|
| 313 |
|
|
access_read_linear(laddr, 2, 0, BX_READ, (void *) &data);
|
| 314 |
|
|
return data;
|
| 315 |
|
|
}
|
| 316 |
|
|
|
| 317 |
|
|
Bit32u BX_CPP_AttrRegparmN(1)
|
| 318 |
|
|
BX_CPU_C::system_read_dword(bx_address laddr)
|
| 319 |
|
|
{
|
| 320 |
|
|
Bit32u data;
|
| 321 |
|
|
|
| 322 |
|
|
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 3);
|
| 323 |
|
|
bx_address lpf = LPFOf(laddr);
|
| 324 |
|
|
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
|
| 325 |
|
|
if (tlbEntry->lpf == lpf) {
|
| 326 |
|
|
// See if the TLB entry privilege level allows us read access
|
| 327 |
|
|
// from this CPL.
|
| 328 |
|
|
if (tlbEntry->accessBits & 0x01) {
|
| 329 |
|
|
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
|
| 330 |
|
|
Bit32u pageOffset = PAGE_OFFSET(laddr);
|
| 331 |
|
|
Bit32u *hostAddr = (Bit32u*) (hostPageAddr | pageOffset);
|
| 332 |
|
|
ReadHostDWordFromLittleEndian(hostAddr, data);
|
| 333 |
|
|
BX_NOTIFY_LIN_MEMORY_ACCESS(laddr, (tlbEntry->ppf | pageOffset), 4, 0, BX_READ, (Bit8u*) &data);
|
| 334 |
|
|
return data;
|
| 335 |
|
|
}
|
| 336 |
|
|
}
|
| 337 |
|
|
|
| 338 |
|
|
#if BX_SUPPORT_X86_64
|
| 339 |
|
|
if (! IsCanonical(laddr) || ! IsCanonical(laddr+3)) {
|
| 340 |
|
|
BX_ERROR(("system_read_dword(): canonical failure"));
|
| 341 |
|
|
exception(BX_GP_EXCEPTION, 0);
|
| 342 |
|
|
}
|
| 343 |
|
|
#endif
|
| 344 |
|
|
|
| 345 |
|
|
access_read_linear(laddr, 4, 0, BX_READ, (void *) &data);
|
| 346 |
|
|
return data;
|
| 347 |
|
|
}
|
| 348 |
|
|
|
| 349 |
|
|
Bit64u BX_CPP_AttrRegparmN(1)
|
| 350 |
|
|
BX_CPU_C::system_read_qword(bx_address laddr)
|
| 351 |
|
|
{
|
| 352 |
|
|
Bit64u data;
|
| 353 |
|
|
|
| 354 |
|
|
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 7);
|
| 355 |
|
|
bx_address lpf = LPFOf(laddr);
|
| 356 |
|
|
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
|
| 357 |
|
|
if (tlbEntry->lpf == lpf) {
|
| 358 |
|
|
// See if the TLB entry privilege level allows us read access
|
| 359 |
|
|
// from this CPL.
|
| 360 |
|
|
if (tlbEntry->accessBits & 0x01) {
|
| 361 |
|
|
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
|
| 362 |
|
|
Bit32u pageOffset = PAGE_OFFSET(laddr);
|
| 363 |
|
|
Bit64u *hostAddr = (Bit64u*) (hostPageAddr | pageOffset);
|
| 364 |
|
|
ReadHostQWordFromLittleEndian(hostAddr, data);
|
| 365 |
|
|
BX_NOTIFY_LIN_MEMORY_ACCESS(laddr, (tlbEntry->ppf | pageOffset), 8, 0, BX_READ, (Bit8u*) &data);
|
| 366 |
|
|
return data;
|
| 367 |
|
|
}
|
| 368 |
|
|
}
|
| 369 |
|
|
|
| 370 |
|
|
#if BX_SUPPORT_X86_64
|
| 371 |
|
|
if (! IsCanonical(laddr) || ! IsCanonical(laddr+7)) {
|
| 372 |
|
|
BX_ERROR(("system_read_qword(): canonical failure"));
|
| 373 |
|
|
exception(BX_GP_EXCEPTION, 0);
|
| 374 |
|
|
}
|
| 375 |
|
|
#endif
|
| 376 |
|
|
|
| 377 |
|
|
access_read_linear(laddr, 8, 0, BX_READ, (void *) &data);
|
| 378 |
|
|
return data;
|
| 379 |
|
|
}
|
| 380 |
|
|
|
| 381 |
|
|
void BX_CPP_AttrRegparmN(2)
|
| 382 |
|
|
BX_CPU_C::system_write_byte(bx_address laddr, Bit8u data)
|
| 383 |
|
|
{
|
| 384 |
|
|
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
|
| 385 |
|
|
Bit32u lpf = LPFOf(laddr);
|
| 386 |
|
|
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
|
| 387 |
|
|
if (tlbEntry->lpf == lpf) {
|
| 388 |
|
|
// See if the TLB entry privilege level allows us write access
|
| 389 |
|
|
// from this CPL.
|
| 390 |
|
|
if (tlbEntry->accessBits & 0x04) {
|
| 391 |
|
|
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
|
| 392 |
|
|
Bit32u pageOffset = PAGE_OFFSET(laddr);
|
| 393 |
|
|
bx_phy_address pAddr = tlbEntry->ppf | pageOffset;
|
| 394 |
|
|
BX_NOTIFY_LIN_MEMORY_ACCESS(laddr, pAddr, 1, 0, BX_WRITE, (Bit8u*) &data);
|
| 395 |
|
|
Bit8u *hostAddr = (Bit8u*) (hostPageAddr | pageOffset);
|
| 396 |
|
|
pageWriteStampTable.decWriteStamp(pAddr, 1);
|
| 397 |
|
|
*hostAddr = data;
|
| 398 |
|
|
return;
|
| 399 |
|
|
}
|
| 400 |
|
|
}
|
| 401 |
|
|
|
| 402 |
|
|
#if BX_SUPPORT_X86_64
|
| 403 |
|
|
if (! IsCanonical(laddr)) {
|
| 404 |
|
|
BX_ERROR(("system_write_byte(): canonical failure"));
|
| 405 |
|
|
exception(BX_GP_EXCEPTION, 0);
|
| 406 |
|
|
}
|
| 407 |
|
|
#endif
|
| 408 |
|
|
|
| 409 |
|
|
access_write_linear(laddr, 1, 0, (void *) &data);
|
| 410 |
|
|
}
|
| 411 |
|
|
|
| 412 |
|
|
void BX_CPP_AttrRegparmN(2)
|
| 413 |
|
|
BX_CPU_C::system_write_word(bx_address laddr, Bit16u data)
|
| 414 |
|
|
{
|
| 415 |
|
|
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 1);
|
| 416 |
|
|
Bit32u lpf = LPFOf(laddr);
|
| 417 |
|
|
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
|
| 418 |
|
|
if (tlbEntry->lpf == lpf) {
|
| 419 |
|
|
// See if the TLB entry privilege level allows us write access
|
| 420 |
|
|
// from this CPL.
|
| 421 |
|
|
if (tlbEntry->accessBits & 0x04) {
|
| 422 |
|
|
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
|
| 423 |
|
|
Bit32u pageOffset = PAGE_OFFSET(laddr);
|
| 424 |
|
|
bx_phy_address pAddr = tlbEntry->ppf | pageOffset;
|
| 425 |
|
|
BX_NOTIFY_LIN_MEMORY_ACCESS(laddr, pAddr, 2, 0, BX_WRITE, (Bit8u*) &data);
|
| 426 |
|
|
Bit16u *hostAddr = (Bit16u*) (hostPageAddr | pageOffset);
|
| 427 |
|
|
pageWriteStampTable.decWriteStamp(pAddr, 2);
|
| 428 |
|
|
WriteHostWordToLittleEndian(hostAddr, data);
|
| 429 |
|
|
return;
|
| 430 |
|
|
}
|
| 431 |
|
|
}
|
| 432 |
|
|
|
| 433 |
|
|
#if BX_SUPPORT_X86_64
|
| 434 |
|
|
if (! IsCanonical(laddr) || ! IsCanonical(laddr+1)) {
|
| 435 |
|
|
BX_ERROR(("system_write_word(): canonical failure"));
|
| 436 |
|
|
exception(BX_GP_EXCEPTION, 0);
|
| 437 |
|
|
}
|
| 438 |
|
|
#endif
|
| 439 |
|
|
|
| 440 |
|
|
access_write_linear(laddr, 2, 0, (void *) &data);
|
| 441 |
|
|
}
|
| 442 |
|
|
|
| 443 |
|
|
void BX_CPP_AttrRegparmN(2)
|
| 444 |
|
|
BX_CPU_C::system_write_dword(bx_address laddr, Bit32u data)
|
| 445 |
|
|
{
|
| 446 |
|
|
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 3);
|
| 447 |
|
|
Bit32u lpf = LPFOf(laddr);
|
| 448 |
|
|
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
|
| 449 |
|
|
if (tlbEntry->lpf == lpf) {
|
| 450 |
|
|
// See if the TLB entry privilege level allows us write access
|
| 451 |
|
|
// from this CPL.
|
| 452 |
|
|
if (tlbEntry->accessBits & 0x04) {
|
| 453 |
|
|
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
|
| 454 |
|
|
Bit32u pageOffset = PAGE_OFFSET(laddr);
|
| 455 |
|
|
bx_phy_address pAddr = tlbEntry->ppf | pageOffset;
|
| 456 |
|
|
BX_NOTIFY_LIN_MEMORY_ACCESS(laddr, pAddr, 4, 0, BX_WRITE, (Bit8u*) &data);
|
| 457 |
|
|
Bit32u *hostAddr = (Bit32u*) (hostPageAddr | pageOffset);
|
| 458 |
|
|
pageWriteStampTable.decWriteStamp(pAddr, 4);
|
| 459 |
|
|
WriteHostDWordToLittleEndian(hostAddr, data);
|
| 460 |
|
|
return;
|
| 461 |
|
|
}
|
| 462 |
|
|
}
|
| 463 |
|
|
|
| 464 |
|
|
#if BX_SUPPORT_X86_64
|
| 465 |
|
|
if (! IsCanonical(laddr) || ! IsCanonical(laddr+3)) {
|
| 466 |
|
|
BX_ERROR(("system_write_dword(): canonical failure"));
|
| 467 |
|
|
exception(BX_GP_EXCEPTION, 0);
|
| 468 |
|
|
}
|
| 469 |
|
|
#endif
|
| 470 |
|
|
|
| 471 |
|
|
access_write_linear(laddr, 4, 0, (void *) &data);
|
| 472 |
|
|
}
|
| 473 |
|
|
|
| 474 |
|
|
Bit8u* BX_CPP_AttrRegparmN(2)
|
| 475 |
|
|
BX_CPU_C::v2h_read_byte(bx_address laddr, bx_bool user)
|
| 476 |
|
|
{
|
| 477 |
|
|
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
|
| 478 |
|
|
bx_address lpf = LPFOf(laddr);
|
| 479 |
|
|
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
|
| 480 |
|
|
if (tlbEntry->lpf == lpf) {
|
| 481 |
|
|
// See if the TLB entry privilege level allows us read access
|
| 482 |
|
|
// from this CPL.
|
| 483 |
|
|
if (tlbEntry->accessBits & (0x01 << user)) {
|
| 484 |
|
|
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
|
| 485 |
|
|
Bit32u pageOffset = PAGE_OFFSET(laddr);
|
| 486 |
|
|
Bit8u *hostAddr = (Bit8u*) (hostPageAddr | pageOffset);
|
| 487 |
|
|
return hostAddr;
|
| 488 |
|
|
}
|
| 489 |
|
|
}
|
| 490 |
|
|
|
| 491 |
|
|
return 0;
|
| 492 |
|
|
}
|
| 493 |
|
|
|
| 494 |
|
|
Bit8u* BX_CPP_AttrRegparmN(2)
|
| 495 |
|
|
BX_CPU_C::v2h_write_byte(bx_address laddr, bx_bool user)
|
| 496 |
|
|
{
|
| 497 |
|
|
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
|
| 498 |
|
|
bx_address lpf = LPFOf(laddr);
|
| 499 |
|
|
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
|
| 500 |
|
|
if (tlbEntry->lpf == lpf)
|
| 501 |
|
|
{
|
| 502 |
|
|
// See if the TLB entry privilege level allows us write access
|
| 503 |
|
|
// from this CPL.
|
| 504 |
|
|
if (tlbEntry->accessBits & (0x04 << user)) {
|
| 505 |
|
|
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
|
| 506 |
|
|
Bit32u pageOffset = PAGE_OFFSET(laddr);
|
| 507 |
|
|
Bit8u *hostAddr = (Bit8u*) (hostPageAddr | pageOffset);
|
| 508 |
|
|
pageWriteStampTable.decWriteStamp(tlbEntry->ppf);
|
| 509 |
|
|
return hostAddr;
|
| 510 |
|
|
}
|
| 511 |
|
|
}
|
| 512 |
|
|
|
| 513 |
|
|
return 0;
|
| 514 |
|
|
}
|