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/////////////////////////////////////////////////////////////////////////
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// $Id: arith16.cc 11313 2012-08-05 13:52:40Z sshwarts $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001-2012 The Bochs Project
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
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/////////////////////////////////////////////////////////////////////////
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::INC_RX(bxInstruction_c *i)
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{
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Bit32u rx = ++BX_READ_16BIT_REG(i->dst());
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SET_FLAGS_OSZAP_ADD_16(rx - 1, 0, rx);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::DEC_RX(bxInstruction_c *i)
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{
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Bit32u rx = --BX_READ_16BIT_REG(i->dst());
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SET_FLAGS_OSZAP_SUB_16(rx + 1, 0, rx);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADD_EwGwM(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit32u op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
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Bit32u op2_16 = BX_READ_16BIT_REG(i->src());
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Bit32u sum_16 = op1_16 + op2_16;
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write_RMW_virtual_word(sum_16);
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SET_FLAGS_OSZAPC_ADD_16(op1_16, op2_16, sum_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADD_GwEwR(bxInstruction_c *i)
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{
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Bit32u op1_16 = BX_READ_16BIT_REG(i->dst());
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Bit32u op2_16 = BX_READ_16BIT_REG(i->src());
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Bit32u sum_16 = op1_16 + op2_16;
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BX_WRITE_16BIT_REG(i->dst(), sum_16);
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SET_FLAGS_OSZAPC_ADD_16(op1_16, op2_16, sum_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADD_GwEwM(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit32u op1_16 = BX_READ_16BIT_REG(i->dst());
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Bit32u op2_16 = read_virtual_word(i->seg(), eaddr);
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Bit32u sum_16 = op1_16 + op2_16;
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BX_WRITE_16BIT_REG(i->dst(), sum_16);
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SET_FLAGS_OSZAPC_ADD_16(op1_16, op2_16, sum_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADC_EwGwM(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit32u op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
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Bit32u op2_16 = BX_READ_16BIT_REG(i->src());
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Bit32u sum_16 = op1_16 + op2_16 + getB_CF();
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write_RMW_virtual_word(sum_16);
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SET_FLAGS_OSZAPC_ADD_16(op1_16, op2_16, sum_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADC_GwEwR(bxInstruction_c *i)
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{
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Bit32u op1_16 = BX_READ_16BIT_REG(i->dst());
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Bit32u op2_16 = BX_READ_16BIT_REG(i->src());
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Bit32u sum_16 = op1_16 + op2_16 + getB_CF();
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BX_WRITE_16BIT_REG(i->dst(), sum_16);
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SET_FLAGS_OSZAPC_ADD_16(op1_16, op2_16, sum_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADC_GwEwM(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit32u op1_16 = BX_READ_16BIT_REG(i->dst());
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Bit32u op2_16 = read_virtual_word(i->seg(), eaddr);
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Bit32u sum_16 = op1_16 + op2_16 + getB_CF();
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BX_WRITE_16BIT_REG(i->dst(), sum_16);
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SET_FLAGS_OSZAPC_ADD_16(op1_16, op2_16, sum_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SBB_EwGwM(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit32u op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
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Bit32u op2_16 = BX_READ_16BIT_REG(i->src());
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Bit32u diff_16 = op1_16 - (op2_16 + getB_CF());
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write_RMW_virtual_word(diff_16);
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SET_FLAGS_OSZAPC_SUB_16(op1_16, op2_16, diff_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SBB_GwEwR(bxInstruction_c *i)
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{
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Bit32u op1_16 = BX_READ_16BIT_REG(i->dst());
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Bit32u op2_16 = BX_READ_16BIT_REG(i->src());
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Bit32u diff_16 = op1_16 - (op2_16 + getB_CF());
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BX_WRITE_16BIT_REG(i->dst(), diff_16);
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SET_FLAGS_OSZAPC_SUB_16(op1_16, op2_16, diff_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SBB_GwEwM(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit32u op1_16 = BX_READ_16BIT_REG(i->dst());
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Bit32u op2_16 = read_virtual_word(i->seg(), eaddr);
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Bit32u diff_16 = op1_16 - (op2_16 + getB_CF());
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BX_WRITE_16BIT_REG(i->dst(), diff_16);
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SET_FLAGS_OSZAPC_SUB_16(op1_16, op2_16, diff_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SBB_EwIwM(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit32u op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
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Bit32u op2_16 = i->Iw();
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Bit32u diff_16 = op1_16 - (op2_16 + getB_CF());
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write_RMW_virtual_word(diff_16);
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SET_FLAGS_OSZAPC_SUB_16(op1_16, op2_16, diff_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SBB_EwIwR(bxInstruction_c *i)
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{
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Bit32u op1_16 = BX_READ_16BIT_REG(i->dst());
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Bit32u op2_16 = i->Iw();
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Bit32u diff_16 = op1_16 - (op2_16 + getB_CF());
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BX_WRITE_16BIT_REG(i->dst(), diff_16);
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SET_FLAGS_OSZAPC_SUB_16(op1_16, op2_16, diff_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SUB_EwGwM(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit32u op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
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Bit32u op2_16 = BX_READ_16BIT_REG(i->src());
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Bit32u diff_16 = op1_16 - op2_16;
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write_RMW_virtual_word(diff_16);
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SET_FLAGS_OSZAPC_SUB_16(op1_16, op2_16, diff_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SUB_GwEwR(bxInstruction_c *i)
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{
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Bit32u op1_16 = BX_READ_16BIT_REG(i->dst());
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Bit32u op2_16 = BX_READ_16BIT_REG(i->src());
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Bit32u diff_16 = op1_16 - op2_16;
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BX_WRITE_16BIT_REG(i->dst(), diff_16);
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SET_FLAGS_OSZAPC_SUB_16(op1_16, op2_16, diff_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SUB_GwEwM(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit32u op1_16 = BX_READ_16BIT_REG(i->dst());
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Bit32u op2_16 = read_virtual_word(i->seg(), eaddr);
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Bit32u diff_16 = op1_16 - op2_16;
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BX_WRITE_16BIT_REG(i->dst(), diff_16);
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SET_FLAGS_OSZAPC_SUB_16(op1_16, op2_16, diff_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMP_EwGwM(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit32u op1_16 = read_virtual_word(i->seg(), eaddr);
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Bit32u op2_16 = BX_READ_16BIT_REG(i->src());
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Bit32u diff_16 = op1_16 - op2_16;
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SET_FLAGS_OSZAPC_SUB_16(op1_16, op2_16, diff_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMP_GwEwR(bxInstruction_c *i)
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{
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Bit32u op1_16 = BX_READ_16BIT_REG(i->dst());
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Bit32u op2_16 = BX_READ_16BIT_REG(i->src());
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Bit32u diff_16 = op1_16 - op2_16;
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SET_FLAGS_OSZAPC_SUB_16(op1_16, op2_16, diff_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMP_GwEwM(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit32u op1_16 = BX_READ_16BIT_REG(i->dst());
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Bit32u op2_16 = read_virtual_word(i->seg(), eaddr);
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Bit32u diff_16 = op1_16 - op2_16;
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SET_FLAGS_OSZAPC_SUB_16(op1_16, op2_16, diff_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CBW(bxInstruction_c *i)
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{
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/* CBW: no flags are effected */
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AX = (Bit8s) AL;
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CWD(bxInstruction_c *i)
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{
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/* CWD: no flags are affected */
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if (AX & 0x8000) {
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DX = 0xFFFF;
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}
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else {
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DX = 0x0000;
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}
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XADD_EwGwM(bxInstruction_c *i)
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{
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/* XADD dst(r/m), src(r)
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* temp <-- src + dst | sum = op2 + op1
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* src <-- dst | op2 = op1
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* dst <-- tmp | op1 = sum
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*/
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit32u op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
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Bit32u op2_16 = BX_READ_16BIT_REG(i->src());
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Bit32u sum_16 = op1_16 + op2_16;
|
314 |
|
|
|
315 |
|
|
write_RMW_virtual_word(sum_16);
|
316 |
|
|
|
317 |
|
|
/* and write destination into source */
|
318 |
|
|
BX_WRITE_16BIT_REG(i->src(), op1_16);
|
319 |
|
|
|
320 |
|
|
SET_FLAGS_OSZAPC_ADD_16(op1_16, op2_16, sum_16);
|
321 |
|
|
|
322 |
|
|
BX_NEXT_INSTR(i);
|
323 |
|
|
}
|
324 |
|
|
|
325 |
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XADD_EwGwR(bxInstruction_c *i)
|
326 |
|
|
{
|
327 |
|
|
/* XADD dst(r/m), src(r)
|
328 |
|
|
* temp <-- src + dst | sum = op2 + op1
|
329 |
|
|
* src <-- dst | op2 = op1
|
330 |
|
|
* dst <-- tmp | op1 = sum
|
331 |
|
|
*/
|
332 |
|
|
|
333 |
|
|
Bit32u op1_16 = BX_READ_16BIT_REG(i->dst());
|
334 |
|
|
Bit32u op2_16 = BX_READ_16BIT_REG(i->src());
|
335 |
|
|
Bit32u sum_16 = op1_16 + op2_16;
|
336 |
|
|
|
337 |
|
|
// and write destination into source
|
338 |
|
|
// Note: if both op1 & op2 are registers, the last one written
|
339 |
|
|
// should be the sum, as op1 & op2 may be the same register.
|
340 |
|
|
// For example: XADD AL, AL
|
341 |
|
|
BX_WRITE_16BIT_REG(i->src(), op1_16);
|
342 |
|
|
BX_WRITE_16BIT_REG(i->dst(), sum_16);
|
343 |
|
|
|
344 |
|
|
SET_FLAGS_OSZAPC_ADD_16(op1_16, op2_16, sum_16);
|
345 |
|
|
|
346 |
|
|
BX_NEXT_INSTR(i);
|
347 |
|
|
}
|
348 |
|
|
|
349 |
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADD_EwIwM(bxInstruction_c *i)
|
350 |
|
|
{
|
351 |
|
|
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
352 |
|
|
|
353 |
|
|
Bit32u op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
|
354 |
|
|
Bit32u op2_16 = i->Iw();
|
355 |
|
|
Bit32u sum_16 = op1_16 + op2_16;
|
356 |
|
|
|
357 |
|
|
write_RMW_virtual_word(sum_16);
|
358 |
|
|
|
359 |
|
|
SET_FLAGS_OSZAPC_ADD_16(op1_16, op2_16, sum_16);
|
360 |
|
|
|
361 |
|
|
BX_NEXT_INSTR(i);
|
362 |
|
|
}
|
363 |
|
|
|
364 |
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADD_EwIwR(bxInstruction_c *i)
|
365 |
|
|
{
|
366 |
|
|
Bit32u op1_16 = BX_READ_16BIT_REG(i->dst());
|
367 |
|
|
Bit32u op2_16 = i->Iw();
|
368 |
|
|
Bit32u sum_16 = op1_16 + op2_16;
|
369 |
|
|
BX_WRITE_16BIT_REG(i->dst(), sum_16);
|
370 |
|
|
|
371 |
|
|
SET_FLAGS_OSZAPC_ADD_16(op1_16, op2_16, sum_16);
|
372 |
|
|
|
373 |
|
|
BX_NEXT_INSTR(i);
|
374 |
|
|
}
|
375 |
|
|
|
376 |
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADC_EwIwM(bxInstruction_c *i)
|
377 |
|
|
{
|
378 |
|
|
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
379 |
|
|
|
380 |
|
|
Bit32u op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
|
381 |
|
|
Bit32u op2_16 = i->Iw();
|
382 |
|
|
Bit32u sum_16 = op1_16 + op2_16 + getB_CF();
|
383 |
|
|
|
384 |
|
|
write_RMW_virtual_word(sum_16);
|
385 |
|
|
|
386 |
|
|
SET_FLAGS_OSZAPC_ADD_16(op1_16, op2_16, sum_16);
|
387 |
|
|
|
388 |
|
|
BX_NEXT_INSTR(i);
|
389 |
|
|
}
|
390 |
|
|
|
391 |
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADC_EwIwR(bxInstruction_c *i)
|
392 |
|
|
{
|
393 |
|
|
Bit32u op1_16 = BX_READ_16BIT_REG(i->dst());
|
394 |
|
|
Bit32u op2_16 = i->Iw();
|
395 |
|
|
Bit32u sum_16 = op1_16 + op2_16 + getB_CF();
|
396 |
|
|
|
397 |
|
|
BX_WRITE_16BIT_REG(i->dst(), sum_16);
|
398 |
|
|
|
399 |
|
|
SET_FLAGS_OSZAPC_ADD_16(op1_16, op2_16, sum_16);
|
400 |
|
|
|
401 |
|
|
BX_NEXT_INSTR(i);
|
402 |
|
|
}
|
403 |
|
|
|
404 |
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SUB_EwIwM(bxInstruction_c *i)
|
405 |
|
|
{
|
406 |
|
|
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
407 |
|
|
|
408 |
|
|
Bit32u op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
|
409 |
|
|
Bit32u op2_16 = i->Iw();
|
410 |
|
|
Bit32u diff_16 = op1_16 - op2_16;
|
411 |
|
|
|
412 |
|
|
write_RMW_virtual_word(diff_16);
|
413 |
|
|
|
414 |
|
|
SET_FLAGS_OSZAPC_SUB_16(op1_16, op2_16, diff_16);
|
415 |
|
|
|
416 |
|
|
BX_NEXT_INSTR(i);
|
417 |
|
|
}
|
418 |
|
|
|
419 |
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SUB_EwIwR(bxInstruction_c *i)
|
420 |
|
|
{
|
421 |
|
|
Bit32u op1_16 = BX_READ_16BIT_REG(i->dst());
|
422 |
|
|
Bit32u op2_16 = i->Iw();
|
423 |
|
|
Bit32u diff_16 = op1_16 - op2_16;
|
424 |
|
|
|
425 |
|
|
BX_WRITE_16BIT_REG(i->dst(), diff_16);
|
426 |
|
|
|
427 |
|
|
SET_FLAGS_OSZAPC_SUB_16(op1_16, op2_16, diff_16);
|
428 |
|
|
|
429 |
|
|
BX_NEXT_INSTR(i);
|
430 |
|
|
}
|
431 |
|
|
|
432 |
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMP_EwIwM(bxInstruction_c *i)
|
433 |
|
|
{
|
434 |
|
|
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
435 |
|
|
|
436 |
|
|
Bit32u op1_16 = read_virtual_word(i->seg(), eaddr);
|
437 |
|
|
Bit32u op2_16 = i->Iw();
|
438 |
|
|
Bit32u diff_16 = op1_16 - op2_16;
|
439 |
|
|
|
440 |
|
|
SET_FLAGS_OSZAPC_SUB_16(op1_16, op2_16, diff_16);
|
441 |
|
|
|
442 |
|
|
BX_NEXT_INSTR(i);
|
443 |
|
|
}
|
444 |
|
|
|
445 |
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMP_EwIwR(bxInstruction_c *i)
|
446 |
|
|
{
|
447 |
|
|
Bit32u op1_16 = BX_READ_16BIT_REG(i->dst());
|
448 |
|
|
Bit32u op2_16 = i->Iw();
|
449 |
|
|
Bit32u diff_16 = op1_16 - op2_16;
|
450 |
|
|
|
451 |
|
|
SET_FLAGS_OSZAPC_SUB_16(op1_16, op2_16, diff_16);
|
452 |
|
|
|
453 |
|
|
BX_NEXT_INSTR(i);
|
454 |
|
|
}
|
455 |
|
|
|
456 |
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::NEG_EwM(bxInstruction_c *i)
|
457 |
|
|
{
|
458 |
|
|
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
459 |
|
|
|
460 |
|
|
Bit32u op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
|
461 |
|
|
op1_16 = 0 - (Bit32s)(Bit16s)(op1_16);
|
462 |
|
|
write_RMW_virtual_word(op1_16);
|
463 |
|
|
|
464 |
|
|
SET_FLAGS_OSZAPC_SUB_16(0, 0 - op1_16, op1_16);
|
465 |
|
|
|
466 |
|
|
BX_NEXT_INSTR(i);
|
467 |
|
|
}
|
468 |
|
|
|
469 |
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::NEG_EwR(bxInstruction_c *i)
|
470 |
|
|
{
|
471 |
|
|
Bit32u op1_16 = BX_READ_16BIT_REG(i->dst());
|
472 |
|
|
op1_16 = 0 - (Bit32s)(Bit16s)(op1_16);
|
473 |
|
|
BX_WRITE_16BIT_REG(i->dst(), op1_16);
|
474 |
|
|
|
475 |
|
|
SET_FLAGS_OSZAPC_SUB_16(0, 0 - op1_16, op1_16);
|
476 |
|
|
|
477 |
|
|
BX_NEXT_INSTR(i);
|
478 |
|
|
}
|
479 |
|
|
|
480 |
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::INC_EwM(bxInstruction_c *i)
|
481 |
|
|
{
|
482 |
|
|
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
483 |
|
|
|
484 |
|
|
Bit32u op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
|
485 |
|
|
op1_16++;
|
486 |
|
|
write_RMW_virtual_word(op1_16);
|
487 |
|
|
|
488 |
|
|
SET_FLAGS_OSZAP_ADD_16(op1_16 - 1, 0, op1_16);
|
489 |
|
|
|
490 |
|
|
BX_NEXT_INSTR(i);
|
491 |
|
|
}
|
492 |
|
|
|
493 |
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::DEC_EwM(bxInstruction_c *i)
|
494 |
|
|
{
|
495 |
|
|
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
496 |
|
|
|
497 |
|
|
Bit32u op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
|
498 |
|
|
op1_16--;
|
499 |
|
|
write_RMW_virtual_word(op1_16);
|
500 |
|
|
|
501 |
|
|
SET_FLAGS_OSZAP_SUB_16(op1_16 + 1, 0, op1_16);
|
502 |
|
|
|
503 |
|
|
BX_NEXT_INSTR(i);
|
504 |
|
|
}
|
505 |
|
|
|
506 |
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMPXCHG_EwGwM(bxInstruction_c *i)
|
507 |
|
|
{
|
508 |
|
|
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
509 |
|
|
|
510 |
|
|
Bit16u op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
|
511 |
|
|
Bit16u diff_16 = AX - op1_16;
|
512 |
|
|
|
513 |
|
|
SET_FLAGS_OSZAPC_SUB_16(AX, op1_16, diff_16);
|
514 |
|
|
|
515 |
|
|
if (diff_16 == 0) { // if accumulator == dest
|
516 |
|
|
// dest <-- src
|
517 |
|
|
write_RMW_virtual_word(BX_READ_16BIT_REG(i->src()));
|
518 |
|
|
}
|
519 |
|
|
else {
|
520 |
|
|
// accumulator <-- dest
|
521 |
|
|
AX = op1_16;
|
522 |
|
|
}
|
523 |
|
|
|
524 |
|
|
BX_NEXT_INSTR(i);
|
525 |
|
|
}
|
526 |
|
|
|
527 |
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMPXCHG_EwGwR(bxInstruction_c *i)
|
528 |
|
|
{
|
529 |
|
|
Bit16u op1_16 = BX_READ_16BIT_REG(i->dst());
|
530 |
|
|
Bit16u diff_16 = AX - op1_16;
|
531 |
|
|
|
532 |
|
|
SET_FLAGS_OSZAPC_SUB_16(AX, op1_16, diff_16);
|
533 |
|
|
|
534 |
|
|
if (diff_16 == 0) { // if accumulator == dest
|
535 |
|
|
// dest <-- src
|
536 |
|
|
BX_WRITE_16BIT_REG(i->dst(), BX_READ_16BIT_REG(i->src()));
|
537 |
|
|
}
|
538 |
|
|
else {
|
539 |
|
|
// accumulator <-- dest
|
540 |
|
|
AX = op1_16;
|
541 |
|
|
}
|
542 |
|
|
|
543 |
|
|
BX_NEXT_INSTR(i);
|
544 |
|
|
}
|