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[/] [ao486/] [trunk/] [bochs486/] [cpu/] [data_xfer16.cc] - Blame information for rev 2

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/////////////////////////////////////////////////////////////////////////
// $Id: data_xfer16.cc 11313 2012-08-05 13:52:40Z sshwarts $
/////////////////////////////////////////////////////////////////////////
//
//  Copyright (C) 2001-2012  The Bochs Project
//
//  This library is free software; you can redistribute it and/or
//  modify it under the terms of the GNU Lesser General Public
//  License as published by the Free Software Foundation; either
//  version 2 of the License, or (at your option) any later version.
//
//  This library is distributed in the hope that it will be useful,
//  but WITHOUT ANY WARRANTY; without even the implied warranty of
//  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
//  Lesser General Public License for more details.
//
//  You should have received a copy of the GNU Lesser General Public
//  License along with this library; if not, write to the Free Software
//  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
/////////////////////////////////////////////////////////////////////////
 
#define NEED_CPU_REG_SHORTCUTS 1
#include "bochs.h"
#include "cpu.h"
#define LOG_THIS BX_CPU_THIS_PTR
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_RXIw(bxInstruction_c *i)
{
  BX_WRITE_16BIT_REG(i->dst(), i->Iw());
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XCHG_RXAX(bxInstruction_c *i)
{
  Bit16u temp16 = AX;
  AX = BX_READ_16BIT_REG(i->dst());
  BX_WRITE_16BIT_REG(i->dst(), temp16);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_EwGwM(bxInstruction_c *i)
{
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 
  write_virtual_word(i->seg(), eaddr, BX_READ_16BIT_REG(i->src()));
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_GwEwR(bxInstruction_c *i)
{
  BX_WRITE_16BIT_REG(i->dst(), BX_READ_16BIT_REG(i->src()));
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_GwEwM(bxInstruction_c *i)
{
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
  Bit16u val16 = read_virtual_word(i->seg(), eaddr);
  BX_WRITE_16BIT_REG(i->dst(), val16);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_EwSwR(bxInstruction_c *i)
{
  /* Illegal to use nonexisting segments */
  if (i->src() >= 6) {
    BX_INFO(("MOV_EwSw: using of nonexisting segment register %d", i->src()));
    exception(BX_UD_EXCEPTION, 0);
  }
 
  Bit16u seg_reg = BX_CPU_THIS_PTR sregs[i->src()].selector.value;
 
  if (i->os32L()) {
    BX_WRITE_32BIT_REGZ(i->dst(), seg_reg);
  }
  else {
    BX_WRITE_16BIT_REG(i->dst(), seg_reg);
  }
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_EwSwM(bxInstruction_c *i)
{
  /* Illegal to use nonexisting segments */
  if (i->src() >= 6) {
    BX_INFO(("MOV_EwSw: using of nonexisting segment register %d", i->src()));
    exception(BX_UD_EXCEPTION, 0);
  }
 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 
  Bit16u seg_reg = BX_CPU_THIS_PTR sregs[i->src()].selector.value;
  write_virtual_word(i->seg(), eaddr, seg_reg);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_SwEw(bxInstruction_c *i)
{
  Bit16u op2_16;
 
  /* Attempt to load CS or nonexisting segment register */
  if (i->dst() >= 6 || i->dst() == BX_SEG_REG_CS) {
    BX_INFO(("MOV_EwSw: can't use this segment register %d", i->dst()));
    exception(BX_UD_EXCEPTION, 0);
  }
 
  if (i->modC0()) {
    op2_16 = BX_READ_16BIT_REG(i->src());
  }
  else {
    bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
    /* pointer, segment address pair */
    op2_16 = read_virtual_word(i->seg(), eaddr);
  }
 
  load_seg_reg(&BX_CPU_THIS_PTR sregs[i->dst()], op2_16);
 
  if (i->dst() == BX_SEG_REG_SS) {
    // MOV SS inhibits interrupts, debug exceptions and single-step
    // trap exceptions until the execution boundary following the
    // next instruction is reached.
    // Same code as POP_SS()
    inhibit_interrupts(BX_INHIBIT_INTERRUPTS_BY_MOVSS);
  }
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LEA_GwM(bxInstruction_c *i)
{
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 
  BX_WRITE_16BIT_REG(i->dst(), (Bit16u) eaddr);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_AXOd(bxInstruction_c *i)
{
  AX = read_virtual_word_32(i->seg(), i->Id());
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_OdAX(bxInstruction_c *i)
{
  write_virtual_word_32(i->seg(), i->Id(), AX);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_EwIwM(bxInstruction_c *i)
{
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 
  write_virtual_word(i->seg(), eaddr, i->Iw());
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVZX_GwEbM(bxInstruction_c *i)
{
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 
  Bit8u op2_8 = read_virtual_byte(i->seg(), eaddr);
 
  /* zero extend byte op2 into word op1 */
  BX_WRITE_16BIT_REG(i->dst(), (Bit16u) op2_8);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVZX_GwEbR(bxInstruction_c *i)
{
  Bit8u op2_8 = BX_READ_8BIT_REGx(i->src(), i->extend8bitL());
 
  /* zero extend byte op2 into word op1 */
  BX_WRITE_16BIT_REG(i->dst(), (Bit16u) op2_8);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSX_GwEbM(bxInstruction_c *i)
{
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 
  Bit8u op2_8 = read_virtual_byte(i->seg(), eaddr);
 
  /* sign extend byte op2 into word op1 */
  BX_WRITE_16BIT_REG(i->dst(), (Bit8s) op2_8);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSX_GwEbR(bxInstruction_c *i)
{
  Bit8u op2_8 = BX_READ_8BIT_REGx(i->src(),i->extend8bitL());
 
  /* sign extend byte op2 into word op1 */
  BX_WRITE_16BIT_REG(i->dst(), (Bit8s) op2_8);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XCHG_EwGwM(bxInstruction_c *i)
{
  Bit16u op1_16, op2_16;
 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 
  op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
  op2_16 = BX_READ_16BIT_REG(i->src());
 
  write_RMW_virtual_word(op2_16);
  BX_WRITE_16BIT_REG(i->src(), op1_16);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XCHG_EwGwR(bxInstruction_c *i)
{
  Bit16u op1_16, op2_16;
 
#if BX_DEBUGGER
  // Note for mortals: the instruction to trigger this is "xchgw %bx,%bx"
  if (bx_dbg.magic_break_enabled && (i->src() == 3) && (i->dst() == 3))
  {
    BX_CPU_THIS_PTR magic_break = 1;
    BX_NEXT_INSTR(i);
  }
#endif
 
  op1_16 = BX_READ_16BIT_REG(i->dst());
  op2_16 = BX_READ_16BIT_REG(i->src());
 
  BX_WRITE_16BIT_REG(i->src(), op1_16);
  BX_WRITE_16BIT_REG(i->dst(), op2_16);
 
  BX_NEXT_INSTR(i);
}
 
// Note: CMOV accesses a memory source operand (read), regardless
//       of whether condition is true or not.  Thus, exceptions may
//       occur even if the MOV does not take place.
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVO_GwEwR(bxInstruction_c *i)
{
  if (get_OF())
    BX_WRITE_16BIT_REG(i->dst(), BX_READ_16BIT_REG(i->src()));
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNO_GwEwR(bxInstruction_c *i)
{
  if (!get_OF())
    BX_WRITE_16BIT_REG(i->dst(), BX_READ_16BIT_REG(i->src()));
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVB_GwEwR(bxInstruction_c *i)
{
  if (get_CF())
    BX_WRITE_16BIT_REG(i->dst(), BX_READ_16BIT_REG(i->src()));
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNB_GwEwR(bxInstruction_c *i)
{
  if (!get_CF())
    BX_WRITE_16BIT_REG(i->dst(), BX_READ_16BIT_REG(i->src()));
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVZ_GwEwR(bxInstruction_c *i)
{
  if (get_ZF())
    BX_WRITE_16BIT_REG(i->dst(), BX_READ_16BIT_REG(i->src()));
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNZ_GwEwR(bxInstruction_c *i)
{
  if (!get_ZF())
    BX_WRITE_16BIT_REG(i->dst(), BX_READ_16BIT_REG(i->src()));
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVBE_GwEwR(bxInstruction_c *i)
{
  if (get_CF() || get_ZF())
    BX_WRITE_16BIT_REG(i->dst(), BX_READ_16BIT_REG(i->src()));
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNBE_GwEwR(bxInstruction_c *i)
{
  if (! (get_CF() || get_ZF()))
    BX_WRITE_16BIT_REG(i->dst(), BX_READ_16BIT_REG(i->src()));
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVS_GwEwR(bxInstruction_c *i)
{
  if (get_SF())
    BX_WRITE_16BIT_REG(i->dst(), BX_READ_16BIT_REG(i->src()));
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNS_GwEwR(bxInstruction_c *i)
{
  if (!get_SF())
    BX_WRITE_16BIT_REG(i->dst(), BX_READ_16BIT_REG(i->src()));
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVP_GwEwR(bxInstruction_c *i)
{
  if (get_PF())
    BX_WRITE_16BIT_REG(i->dst(), BX_READ_16BIT_REG(i->src()));
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNP_GwEwR(bxInstruction_c *i)
{
  if (!get_PF())
    BX_WRITE_16BIT_REG(i->dst(), BX_READ_16BIT_REG(i->src()));
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVL_GwEwR(bxInstruction_c *i)
{
  if (getB_SF() != getB_OF())
    BX_WRITE_16BIT_REG(i->dst(), BX_READ_16BIT_REG(i->src()));
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNL_GwEwR(bxInstruction_c *i)
{
  if (getB_SF() == getB_OF())
    BX_WRITE_16BIT_REG(i->dst(), BX_READ_16BIT_REG(i->src()));
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVLE_GwEwR(bxInstruction_c *i)
{
  if (get_ZF() || (getB_SF() != getB_OF()))
    BX_WRITE_16BIT_REG(i->dst(), BX_READ_16BIT_REG(i->src()));
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNLE_GwEwR(bxInstruction_c *i)
{
  if (! get_ZF() && (getB_SF() == getB_OF()))
    BX_WRITE_16BIT_REG(i->dst(), BX_READ_16BIT_REG(i->src()));
 
  BX_NEXT_INSTR(i);
}

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[/] [ao486/] [trunk/] [bochs486/] [cpu/] [data_xfer16.cc] - Blame information for rev 2

Line No.	Rev	Author	Line
1	2	alfik	`/////////////////////////////////////////////////////////////////////////`
2			`// $Id: data_xfer16.cc 11313 2012-08-05 13:52:40Z sshwarts $`
3			`/////////////////////////////////////////////////////////////////////////`
4			`//`
5			`// Copyright (C) 2001-2012 The Bochs Project`
6			`//`
7			`// This library is free software; you can redistribute it and/or`
8			`// modify it under the terms of the GNU Lesser General Public`
9			`// License as published by the Free Software Foundation; either`
10			`// version 2 of the License, or (at your option) any later version.`
11			`//`
12			`// This library is distributed in the hope that it will be useful,`
13			`// but WITHOUT ANY WARRANTY; without even the implied warranty of`
14			`// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU`
15			`// Lesser General Public License for more details.`
16			`//`
17			`// You should have received a copy of the GNU Lesser General Public`
18			`// License along with this library; if not, write to the Free Software`
19			`// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA`
20			`/////////////////////////////////////////////////////////////////////////`
21
22			`#define NEED_CPU_REG_SHORTCUTS 1`
23			`#include "bochs.h"`
24			`#include "cpu.h"`
25			`#define LOG_THIS BX_CPU_THIS_PTR`
26
27			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_RXIw(bxInstruction_c *i)`
28			`{`
29			`BX_WRITE_16BIT_REG(i->dst(), i->Iw());`
30
31			`BX_NEXT_INSTR(i);`
32			`}`
33
34			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XCHG_RXAX(bxInstruction_c *i)`
35			`{`
36			`Bit16u temp16 = AX;`
37			`AX = BX_READ_16BIT_REG(i->dst());`
38			`BX_WRITE_16BIT_REG(i->dst(), temp16);`
39
40			`BX_NEXT_INSTR(i);`
41			`}`
42
43			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_EwGwM(bxInstruction_c *i)`
44			`{`
45			`bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));`
46
47			`write_virtual_word(i->seg(), eaddr, BX_READ_16BIT_REG(i->src()));`
48
49			`BX_NEXT_INSTR(i);`
50			`}`
51
52			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_GwEwR(bxInstruction_c *i)`
53			`{`
54			`BX_WRITE_16BIT_REG(i->dst(), BX_READ_16BIT_REG(i->src()));`
55
56			`BX_NEXT_INSTR(i);`
57			`}`
58
59			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_GwEwM(bxInstruction_c *i)`
60			`{`
61			`bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));`
62			`Bit16u val16 = read_virtual_word(i->seg(), eaddr);`
63			`BX_WRITE_16BIT_REG(i->dst(), val16);`
64
65			`BX_NEXT_INSTR(i);`
66			`}`
67
68			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_EwSwR(bxInstruction_c *i)`
69			`{`
70			`/* Illegal to use nonexisting segments */`
71			`if (i->src() >= 6) {`
72			`BX_INFO(("MOV_EwSw: using of nonexisting segment register %d", i->src()));`
73			`exception(BX_UD_EXCEPTION, 0);`
74			`}`
75
76			`Bit16u seg_reg = BX_CPU_THIS_PTR sregs[i->src()].selector.value;`
77
78			`if (i->os32L()) {`
79			`BX_WRITE_32BIT_REGZ(i->dst(), seg_reg);`
80			`}`
81			`else {`
82			`BX_WRITE_16BIT_REG(i->dst(), seg_reg);`
83			`}`
84
85			`BX_NEXT_INSTR(i);`
86			`}`
87
88			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_EwSwM(bxInstruction_c *i)`
89			`{`
90			`/* Illegal to use nonexisting segments */`
91			`if (i->src() >= 6) {`
92			`BX_INFO(("MOV_EwSw: using of nonexisting segment register %d", i->src()));`
93			`exception(BX_UD_EXCEPTION, 0);`
94			`}`
95
96			`bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));`
97
98			`Bit16u seg_reg = BX_CPU_THIS_PTR sregs[i->src()].selector.value;`
99			`write_virtual_word(i->seg(), eaddr, seg_reg);`
100
101			`BX_NEXT_INSTR(i);`
102			`}`
103
104			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_SwEw(bxInstruction_c *i)`
105			`{`
106			`Bit16u op2_16;`
107
108			`/* Attempt to load CS or nonexisting segment register */`
109			`if (i->dst() >= 6 \|\| i->dst() == BX_SEG_REG_CS) {`
110			`BX_INFO(("MOV_EwSw: can't use this segment register %d", i->dst()));`
111			`exception(BX_UD_EXCEPTION, 0);`
112			`}`
113
114			`if (i->modC0()) {`
115			`op2_16 = BX_READ_16BIT_REG(i->src());`
116			`}`
117			`else {`
118			`bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));`
119			`/* pointer, segment address pair */`
120			`op2_16 = read_virtual_word(i->seg(), eaddr);`
121			`}`
122
123			`load_seg_reg(&BX_CPU_THIS_PTR sregs[i->dst()], op2_16);`
124
125			`if (i->dst() == BX_SEG_REG_SS) {`
126			`// MOV SS inhibits interrupts, debug exceptions and single-step`
127			`// trap exceptions until the execution boundary following the`
128			`// next instruction is reached.`
129			`// Same code as POP_SS()`
130			`inhibit_interrupts(BX_INHIBIT_INTERRUPTS_BY_MOVSS);`
131			`}`
132
133			`BX_NEXT_INSTR(i);`
134			`}`
135
136			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LEA_GwM(bxInstruction_c *i)`
137			`{`
138			`bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));`
139
140			`BX_WRITE_16BIT_REG(i->dst(), (Bit16u) eaddr);`
141
142			`BX_NEXT_INSTR(i);`
143			`}`
144
145			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_AXOd(bxInstruction_c *i)`
146			`{`
147			`AX = read_virtual_word_32(i->seg(), i->Id());`
148
149			`BX_NEXT_INSTR(i);`
150			`}`
151
152			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_OdAX(bxInstruction_c *i)`
153			`{`
154			`write_virtual_word_32(i->seg(), i->Id(), AX);`
155
156			`BX_NEXT_INSTR(i);`
157			`}`
158
159			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_EwIwM(bxInstruction_c *i)`
160			`{`
161			`bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));`
162
163			`write_virtual_word(i->seg(), eaddr, i->Iw());`
164
165			`BX_NEXT_INSTR(i);`
166			`}`
167
168			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVZX_GwEbM(bxInstruction_c *i)`
169			`{`
170			`bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));`
171
172			`Bit8u op2_8 = read_virtual_byte(i->seg(), eaddr);`
173
174			`/* zero extend byte op2 into word op1 */`
175			`BX_WRITE_16BIT_REG(i->dst(), (Bit16u) op2_8);`
176
177			`BX_NEXT_INSTR(i);`
178			`}`
179
180			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVZX_GwEbR(bxInstruction_c *i)`
181			`{`
182			`Bit8u op2_8 = BX_READ_8BIT_REGx(i->src(), i->extend8bitL());`
183
184			`/* zero extend byte op2 into word op1 */`
185			`BX_WRITE_16BIT_REG(i->dst(), (Bit16u) op2_8);`
186
187			`BX_NEXT_INSTR(i);`
188			`}`
189
190			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSX_GwEbM(bxInstruction_c *i)`
191			`{`
192			`bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));`
193
194			`Bit8u op2_8 = read_virtual_byte(i->seg(), eaddr);`
195
196			`/* sign extend byte op2 into word op1 */`
197			`BX_WRITE_16BIT_REG(i->dst(), (Bit8s) op2_8);`
198
199			`BX_NEXT_INSTR(i);`
200			`}`
201
202			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSX_GwEbR(bxInstruction_c *i)`
203			`{`
204			`Bit8u op2_8 = BX_READ_8BIT_REGx(i->src(),i->extend8bitL());`
205
206			`/* sign extend byte op2 into word op1 */`
207			`BX_WRITE_16BIT_REG(i->dst(), (Bit8s) op2_8);`
208
209			`BX_NEXT_INSTR(i);`
210			`}`
211
212			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XCHG_EwGwM(bxInstruction_c *i)`
213			`{`
214			`Bit16u op1_16, op2_16;`
215
216			`bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));`
217
218			`op1_16 = read_RMW_virtual_word(i->seg(), eaddr);`
219			`op2_16 = BX_READ_16BIT_REG(i->src());`
220
221			`write_RMW_virtual_word(op2_16);`
222			`BX_WRITE_16BIT_REG(i->src(), op1_16);`
223
224			`BX_NEXT_INSTR(i);`
225			`}`
226
227			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XCHG_EwGwR(bxInstruction_c *i)`
228			`{`
229			`Bit16u op1_16, op2_16;`
230
231			`#if BX_DEBUGGER`
232			`// Note for mortals: the instruction to trigger this is "xchgw %bx,%bx"`
233			`if (bx_dbg.magic_break_enabled && (i->src() == 3) && (i->dst() == 3))`
234			`{`
235			`BX_CPU_THIS_PTR magic_break = 1;`
236			`BX_NEXT_INSTR(i);`
237			`}`
238			`#endif`
239
240			`op1_16 = BX_READ_16BIT_REG(i->dst());`
241			`op2_16 = BX_READ_16BIT_REG(i->src());`
242
243			`BX_WRITE_16BIT_REG(i->src(), op1_16);`
244			`BX_WRITE_16BIT_REG(i->dst(), op2_16);`
245
246			`BX_NEXT_INSTR(i);`
247			`}`
248
249			`// Note: CMOV accesses a memory source operand (read), regardless`
250			`// of whether condition is true or not. Thus, exceptions may`
251			`// occur even if the MOV does not take place.`
252
253			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVO_GwEwR(bxInstruction_c *i)`
254			`{`
255			`if (get_OF())`
256			`BX_WRITE_16BIT_REG(i->dst(), BX_READ_16BIT_REG(i->src()));`
257
258			`BX_NEXT_INSTR(i);`
259			`}`
260
261			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNO_GwEwR(bxInstruction_c *i)`
262			`{`
263			`if (!get_OF())`
264			`BX_WRITE_16BIT_REG(i->dst(), BX_READ_16BIT_REG(i->src()));`
265
266			`BX_NEXT_INSTR(i);`
267			`}`
268
269			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVB_GwEwR(bxInstruction_c *i)`
270			`{`
271			`if (get_CF())`
272			`BX_WRITE_16BIT_REG(i->dst(), BX_READ_16BIT_REG(i->src()));`
273
274			`BX_NEXT_INSTR(i);`
275			`}`
276
277			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNB_GwEwR(bxInstruction_c *i)`
278			`{`
279			`if (!get_CF())`
280			`BX_WRITE_16BIT_REG(i->dst(), BX_READ_16BIT_REG(i->src()));`
281
282			`BX_NEXT_INSTR(i);`
283			`}`
284
285			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVZ_GwEwR(bxInstruction_c *i)`
286			`{`
287			`if (get_ZF())`
288			`BX_WRITE_16BIT_REG(i->dst(), BX_READ_16BIT_REG(i->src()));`
289
290			`BX_NEXT_INSTR(i);`
291			`}`
292
293			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNZ_GwEwR(bxInstruction_c *i)`
294			`{`
295			`if (!get_ZF())`
296			`BX_WRITE_16BIT_REG(i->dst(), BX_READ_16BIT_REG(i->src()));`
297
298			`BX_NEXT_INSTR(i);`
299			`}`
300
301			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVBE_GwEwR(bxInstruction_c *i)`
302			`{`
303			`if (get_CF() \|\| get_ZF())`
304			`BX_WRITE_16BIT_REG(i->dst(), BX_READ_16BIT_REG(i->src()));`
305
306			`BX_NEXT_INSTR(i);`
307			`}`
308
309			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNBE_GwEwR(bxInstruction_c *i)`
310			`{`
311			`if (! (get_CF() \|\| get_ZF()))`
312			`BX_WRITE_16BIT_REG(i->dst(), BX_READ_16BIT_REG(i->src()));`
313
314			`BX_NEXT_INSTR(i);`
315			`}`
316
317			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVS_GwEwR(bxInstruction_c *i)`
318			`{`
319			`if (get_SF())`
320			`BX_WRITE_16BIT_REG(i->dst(), BX_READ_16BIT_REG(i->src()));`
321
322			`BX_NEXT_INSTR(i);`
323			`}`
324
325			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNS_GwEwR(bxInstruction_c *i)`
326			`{`
327			`if (!get_SF())`
328			`BX_WRITE_16BIT_REG(i->dst(), BX_READ_16BIT_REG(i->src()));`
329
330			`BX_NEXT_INSTR(i);`
331			`}`
332
333			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVP_GwEwR(bxInstruction_c *i)`
334			`{`
335			`if (get_PF())`
336			`BX_WRITE_16BIT_REG(i->dst(), BX_READ_16BIT_REG(i->src()));`
337
338			`BX_NEXT_INSTR(i);`
339			`}`
340
341			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNP_GwEwR(bxInstruction_c *i)`
342			`{`
343			`if (!get_PF())`
344			`BX_WRITE_16BIT_REG(i->dst(), BX_READ_16BIT_REG(i->src()));`
345
346			`BX_NEXT_INSTR(i);`
347			`}`
348
349			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVL_GwEwR(bxInstruction_c *i)`
350			`{`
351			`if (getB_SF() != getB_OF())`
352			`BX_WRITE_16BIT_REG(i->dst(), BX_READ_16BIT_REG(i->src()));`
353
354			`BX_NEXT_INSTR(i);`
355			`}`
356
357			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNL_GwEwR(bxInstruction_c *i)`
358			`{`
359			`if (getB_SF() == getB_OF())`
360			`BX_WRITE_16BIT_REG(i->dst(), BX_READ_16BIT_REG(i->src()));`
361
362			`BX_NEXT_INSTR(i);`
363			`}`
364
365			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVLE_GwEwR(bxInstruction_c *i)`
366			`{`
367			`if (get_ZF() \|\| (getB_SF() != getB_OF()))`
368			`BX_WRITE_16BIT_REG(i->dst(), BX_READ_16BIT_REG(i->src()));`
369
370			`BX_NEXT_INSTR(i);`
371			`}`
372
373			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNLE_GwEwR(bxInstruction_c *i)`
374			`{`
375			`if (! get_ZF() && (getB_SF() == getB_OF()))`
376			`BX_WRITE_16BIT_REG(i->dst(), BX_READ_16BIT_REG(i->src()));`
377
378			`BX_NEXT_INSTR(i);`
379			`}`