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alfik |
/////////////////////////////////////////////////////////////////////////
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// $Id: fetchdecode.cc 11565 2012-12-27 19:31:21Z sshwarts $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001-2012 The Bochs Project
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
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//
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/////////////////////////////////////////////////////////////////////////
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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///////////////////////////
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// prefix bytes
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// opcode bytes
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// modrm/sib
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// address displacement
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// immediate constant
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///////////////////////////
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#define X 0 /* undefined opcode */
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static const Bit8u BxOpcodeHasModrm32[512] = {
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/* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
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/* ------------------------------- */
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/* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,X,
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/* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0,
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/* 20 */ 1,1,1,1,0,0,X,0,1,1,1,1,0,0,X,0,
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/* 30 */ 1,1,1,1,0,0,X,0,1,1,1,1,0,0,X,0,
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/* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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/* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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/* 60 */ 0,0,1,1,X,X,X,X,0,1,0,1,0,0,0,0,
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/* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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/* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
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/* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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/* A0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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/* B0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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/* C0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0,
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/* D0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1,
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/* E0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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/* F0 */ X,0,X,X,0,0,1,1,0,0,0,0,0,0,1,1,
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/* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
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/* ------------------------------- */
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1,1,1,1,X,0,0,0,0,0,X,0,X,0,0,0,//AO1,1,1,1,X,0,0,0,0,0,X,0,X,1,0,1, /* 0F 00 */
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,//AO1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 0F 10 */
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1,1,1,1,0,X,0,X,0,0,0,0,0,0,0,0,//AO1,1,1,1,1,X,1,X,1,1,1,1,1,1,1,1, /* 0F 20 */
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,//AO0,0,0,0,0,0,X,X,1,X,1,X,X,X,X,X, /* 0F 30 */
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,//AO1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 0F 40 */
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,//AO1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 0F 50 */
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,//AO1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 0F 60 */
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,//AO1,1,1,1,1,1,1,0,1,1,X,X,1,1,1,1, /* 0F 70 */
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0F 80 */
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1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 0F 90 */
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0,0,0,1,1,1,0,0,0,0,0,1,1,1,0,1,//AO0,0,0,1,1,1,0,0,0,0,0,1,1,1,1,1, /* 0F A0 */
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1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1,//AO1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 0F B0 */
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1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,//AO1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* 0F C0 */
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,//AO1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 0F D0 */
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,//AO1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 0F E0 */
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,//AO1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,X /* 0F F0 */
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/* ------------------------------- */
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/* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
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};
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#undef X
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// Some info on the opcodes at {0F A6} and {0F A7}
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//
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// On 386 steps A0-B0:
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// {OF A6} = XBTS
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// {OF A7} = IBTS
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// On 486 steps A0-B0:
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// {OF A6} = CMPXCHG 8
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// {OF A7} = CMPXCHG 16|32
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//
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// On 486 >= B steps, and further processors, the
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// CMPXCHG instructions were moved to opcodes:
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// {OF B0} = CMPXCHG 8
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// {OF B1} = CMPXCHG 16|32
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static unsigned Resolve16BaseReg[8] = {
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BX_16BIT_REG_BX,
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BX_16BIT_REG_BX,
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BX_16BIT_REG_BP,
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BX_16BIT_REG_BP,
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BX_16BIT_REG_SI,
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BX_16BIT_REG_DI,
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BX_16BIT_REG_BP,
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BX_16BIT_REG_BX
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};
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static unsigned Resolve16IndexReg[8] = {
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BX_16BIT_REG_SI,
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BX_16BIT_REG_DI,
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BX_16BIT_REG_SI,
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BX_16BIT_REG_DI,
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BX_NIL_REGISTER,
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BX_NIL_REGISTER,
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BX_NIL_REGISTER,
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BX_NIL_REGISTER
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};
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// decoding instructions; accessing seg reg's by index
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static unsigned sreg_mod00_rm16[8] = {
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BX_SEG_REG_DS,
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BX_SEG_REG_DS,
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BX_SEG_REG_SS,
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BX_SEG_REG_SS,
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BX_SEG_REG_DS,
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BX_SEG_REG_DS,
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BX_SEG_REG_DS,
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BX_SEG_REG_DS
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};
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static unsigned sreg_mod01or10_rm16[8] = {
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BX_SEG_REG_DS,
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BX_SEG_REG_DS,
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BX_SEG_REG_SS,
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BX_SEG_REG_SS,
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BX_SEG_REG_DS,
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BX_SEG_REG_DS,
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BX_SEG_REG_SS,
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BX_SEG_REG_DS
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};
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// decoding instructions; accessing seg reg's by index
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static unsigned sreg_mod0_base32[8] = {
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BX_SEG_REG_DS,
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BX_SEG_REG_DS,
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BX_SEG_REG_DS,
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BX_SEG_REG_DS,
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BX_SEG_REG_SS,
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BX_SEG_REG_DS,
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BX_SEG_REG_DS,
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BX_SEG_REG_DS
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};
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static unsigned sreg_mod1or2_base32[8] = {
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BX_SEG_REG_DS,
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BX_SEG_REG_DS,
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BX_SEG_REG_DS,
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BX_SEG_REG_DS,
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BX_SEG_REG_SS,
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BX_SEG_REG_SS,
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BX_SEG_REG_DS,
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BX_SEG_REG_DS
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};
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// common fetchdecode32/64 opcode tables
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#include "fetchdecode.h"
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// table of all Bochs opcodes
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bxIAOpcodeTable BxOpcodesTable[] = {
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#define bx_define_opcode(a, b, c, d, s1, s2, s3, s4, e) { b, c, { s1, s2, s3, (s4) | (e) } },
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#include "ia_opcodes.h"
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};
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#undef bx_define_opcode
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/* ************************** */
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/* 512 entries for 16bit mode */
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/* 512 entries for 32bit mode */
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/* ************************** */
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static const BxOpcodeInfo_t BxOpcodeInfo32[512*2] = {
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// 512 entries for 16bit mode
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/* 00 /w */ { BxLockable, BX_IA_ADD_EbGb },
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/* 01 /w */ { BxLockable, BX_IA_ADD_EwGw },
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/* 02 /w */ { 0, BX_IA_ADD_GbEb },
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/* 03 /w */ { 0, BX_IA_ADD_GwEw },
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/* 04 /w */ { BxImmediate_Ib, BX_IA_ADD_ALIb },
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/* 05 /w */ { BxImmediate_Iw, BX_IA_ADD_AXIw },
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/* 06 /w */ { 0, BX_IA_PUSH16_ES },
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/* 07 /w */ { 0, BX_IA_POP16_ES },
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/* 08 /w */ { BxLockable, BX_IA_OR_EbGb },
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/* 09 /w */ { BxLockable, BX_IA_OR_EwGw },
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/* 0A /w */ { 0, BX_IA_OR_GbEb },
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/* 0B /w */ { 0, BX_IA_OR_GwEw },
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/* 0C /w */ { BxImmediate_Ib, BX_IA_OR_ALIb },
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/* 0D /w */ { BxImmediate_Iw, BX_IA_OR_AXIw },
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/* 0E /w */ { 0, BX_IA_PUSH16_CS },
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/* 0F /w */ { 0, BX_IA_ERROR }, // 2-byte escape
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/* 10 /w */ { BxLockable, BX_IA_ADC_EbGb },
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/* 11 /w */ { BxLockable, BX_IA_ADC_EwGw },
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/* 12 /w */ { 0, BX_IA_ADC_GbEb },
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/* 13 /w */ { 0, BX_IA_ADC_GwEw },
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/* 14 /w */ { BxImmediate_Ib, BX_IA_ADC_ALIb },
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| 201 |
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/* 15 /w */ { BxImmediate_Iw, BX_IA_ADC_AXIw },
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/* 16 /w */ { 0, BX_IA_PUSH16_SS },
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/* 17 /w */ { 0, BX_IA_POP16_SS },
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/* 18 /w */ { BxLockable, BX_IA_SBB_EbGb },
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/* 19 /w */ { BxLockable, BX_IA_SBB_EwGw },
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/* 1A /w */ { 0, BX_IA_SBB_GbEb },
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/* 1B /w */ { 0, BX_IA_SBB_GwEw },
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| 208 |
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/* 1C /w */ { BxImmediate_Ib, BX_IA_SBB_ALIb },
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| 209 |
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/* 1D /w */ { BxImmediate_Iw, BX_IA_SBB_AXIw },
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| 210 |
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/* 1E /w */ { 0, BX_IA_PUSH16_DS },
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| 211 |
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/* 1F /w */ { 0, BX_IA_POP16_DS },
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| 212 |
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/* 20 /w */ { BxLockable, BX_IA_AND_EbGb },
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| 213 |
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/* 21 /w */ { BxLockable, BX_IA_AND_EwGw },
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| 214 |
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/* 22 /w */ { 0, BX_IA_AND_GbEb },
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| 215 |
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/* 23 /w */ { 0, BX_IA_AND_GwEw },
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| 216 |
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/* 24 /w */ { BxImmediate_Ib, BX_IA_AND_ALIb },
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| 217 |
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/* 25 /w */ { BxImmediate_Iw, BX_IA_AND_AXIw },
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| 218 |
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/* 26 /w */ { 0, BX_IA_ERROR }, // ES:
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| 219 |
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/* 27 /w */ { 0, BX_IA_DAA },
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| 220 |
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/* 28 /w */ { BxLockable, BX_IA_SUB_EbGb },
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| 221 |
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/* 29 /w */ { BxLockable, BX_IA_SUB_EwGw },
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| 222 |
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/* 2A /w */ { 0, BX_IA_SUB_GbEb },
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| 223 |
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/* 2B /w */ { 0, BX_IA_SUB_GwEw },
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| 224 |
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/* 2C /w */ { BxImmediate_Ib, BX_IA_SUB_ALIb },
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| 225 |
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/* 2D /w */ { BxImmediate_Iw, BX_IA_SUB_AXIw },
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| 226 |
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/* 2E /w */ { 0, BX_IA_ERROR }, // CS:
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| 227 |
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/* 2F /w */ { 0, BX_IA_DAS },
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| 228 |
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/* 30 /w */ { BxLockable, BX_IA_XOR_EbGb },
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| 229 |
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/* 31 /w */ { BxLockable, BX_IA_XOR_EwGw },
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| 230 |
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/* 32 /w */ { 0, BX_IA_XOR_GbEb },
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| 231 |
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/* 33 /w */ { 0, BX_IA_XOR_GwEw },
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| 232 |
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/* 34 /w */ { BxImmediate_Ib, BX_IA_XOR_ALIb },
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| 233 |
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/* 35 /w */ { BxImmediate_Iw, BX_IA_XOR_AXIw },
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| 234 |
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/* 36 /w */ { 0, BX_IA_ERROR }, // SS:
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| 235 |
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/* 37 /w */ { 0, BX_IA_AAA },
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| 236 |
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/* 38 /w */ { 0, BX_IA_CMP_EbGb },
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| 237 |
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/* 39 /w */ { 0, BX_IA_CMP_EwGw },
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| 238 |
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/* 3A /w */ { 0, BX_IA_CMP_GbEb },
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| 239 |
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/* 3B /w */ { 0, BX_IA_CMP_GwEw },
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| 240 |
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/* 3C /w */ { BxImmediate_Ib, BX_IA_CMP_ALIb },
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| 241 |
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/* 3D /w */ { BxImmediate_Iw, BX_IA_CMP_AXIw },
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| 242 |
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/* 3E /w */ { 0, BX_IA_ERROR }, // DS:
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| 243 |
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/* 3F /w */ { 0, BX_IA_AAS },
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| 244 |
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/* 40 /w */ { 0, BX_IA_INC_RX },
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| 245 |
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/* 41 /w */ { 0, BX_IA_INC_RX },
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| 246 |
|
|
/* 42 /w */ { 0, BX_IA_INC_RX },
|
| 247 |
|
|
/* 43 /w */ { 0, BX_IA_INC_RX },
|
| 248 |
|
|
/* 44 /w */ { 0, BX_IA_INC_RX },
|
| 249 |
|
|
/* 45 /w */ { 0, BX_IA_INC_RX },
|
| 250 |
|
|
/* 46 /w */ { 0, BX_IA_INC_RX },
|
| 251 |
|
|
/* 47 /w */ { 0, BX_IA_INC_RX },
|
| 252 |
|
|
/* 48 /w */ { 0, BX_IA_DEC_RX },
|
| 253 |
|
|
/* 49 /w */ { 0, BX_IA_DEC_RX },
|
| 254 |
|
|
/* 4A /w */ { 0, BX_IA_DEC_RX },
|
| 255 |
|
|
/* 4B /w */ { 0, BX_IA_DEC_RX },
|
| 256 |
|
|
/* 4C /w */ { 0, BX_IA_DEC_RX },
|
| 257 |
|
|
/* 4D /w */ { 0, BX_IA_DEC_RX },
|
| 258 |
|
|
/* 4E /w */ { 0, BX_IA_DEC_RX },
|
| 259 |
|
|
/* 4F /w */ { 0, BX_IA_DEC_RX },
|
| 260 |
|
|
/* 50 /w */ { 0, BX_IA_PUSH_RX },
|
| 261 |
|
|
/* 51 /w */ { 0, BX_IA_PUSH_RX },
|
| 262 |
|
|
/* 52 /w */ { 0, BX_IA_PUSH_RX },
|
| 263 |
|
|
/* 53 /w */ { 0, BX_IA_PUSH_RX },
|
| 264 |
|
|
/* 54 /w */ { 0, BX_IA_PUSH_RX },
|
| 265 |
|
|
/* 55 /w */ { 0, BX_IA_PUSH_RX },
|
| 266 |
|
|
/* 56 /w */ { 0, BX_IA_PUSH_RX },
|
| 267 |
|
|
/* 57 /w */ { 0, BX_IA_PUSH_RX },
|
| 268 |
|
|
/* 58 /w */ { 0, BX_IA_POP_RX },
|
| 269 |
|
|
/* 59 /w */ { 0, BX_IA_POP_RX },
|
| 270 |
|
|
/* 5A /w */ { 0, BX_IA_POP_RX },
|
| 271 |
|
|
/* 5B /w */ { 0, BX_IA_POP_RX },
|
| 272 |
|
|
/* 5C /w */ { 0, BX_IA_POP_RX },
|
| 273 |
|
|
/* 5D /w */ { 0, BX_IA_POP_RX },
|
| 274 |
|
|
/* 5E /w */ { 0, BX_IA_POP_RX },
|
| 275 |
|
|
/* 5F /w */ { 0, BX_IA_POP_RX },
|
| 276 |
|
|
/* 60 /w */ { 0, BX_IA_PUSHAD16 },
|
| 277 |
|
|
/* 61 /w */ { 0, BX_IA_POPAD16 },
|
| 278 |
|
|
/* 62 /w */ { 0, BX_IA_BOUND_GwMa },
|
| 279 |
|
|
/* 63 /w */ { 0, BX_IA_ARPL_EwGw },
|
| 280 |
|
|
/* 64 /w */ { 0, BX_IA_ERROR }, // FS:
|
| 281 |
|
|
/* 65 /w */ { 0, BX_IA_ERROR }, // GS:
|
| 282 |
|
|
/* 66 /w */ { 0, BX_IA_ERROR }, // OS:
|
| 283 |
|
|
/* 67 /w */ { 0, BX_IA_ERROR }, // AS:
|
| 284 |
|
|
/* 68 /w */ { BxImmediate_Iw, BX_IA_PUSH_Iw },
|
| 285 |
|
|
/* 69 /w */ { BxImmediate_Iw, BX_IA_IMUL_GwEwIw },
|
| 286 |
|
|
/* 6A /w */ { BxImmediate_Ib_SE, BX_IA_PUSH_Iw },
|
| 287 |
|
|
/* 6B /w */ { BxImmediate_Ib_SE, BX_IA_IMUL_GwEwIw },
|
| 288 |
|
|
/* 6C /w */ { BxRepeatable, BX_IA_REP_INSB_YbDX },
|
| 289 |
|
|
/* 6D /w */ { BxRepeatable, BX_IA_REP_INSW_YwDX },
|
| 290 |
|
|
/* 6E /w */ { BxRepeatable, BX_IA_REP_OUTSB_DXXb },
|
| 291 |
|
|
/* 6F /w */ { BxRepeatable, BX_IA_REP_OUTSW_DXXw },
|
| 292 |
|
|
/* 70 /w */ { BxImmediate_BrOff8 | BxTraceJCC, BX_IA_JO_Jw },
|
| 293 |
|
|
/* 71 /w */ { BxImmediate_BrOff8 | BxTraceJCC, BX_IA_JNO_Jw },
|
| 294 |
|
|
/* 72 /w */ { BxImmediate_BrOff8 | BxTraceJCC, BX_IA_JB_Jw },
|
| 295 |
|
|
/* 73 /w */ { BxImmediate_BrOff8 | BxTraceJCC, BX_IA_JNB_Jw },
|
| 296 |
|
|
/* 74 /w */ { BxImmediate_BrOff8 | BxTraceJCC, BX_IA_JZ_Jw },
|
| 297 |
|
|
/* 75 /w */ { BxImmediate_BrOff8 | BxTraceJCC, BX_IA_JNZ_Jw },
|
| 298 |
|
|
/* 76 /w */ { BxImmediate_BrOff8 | BxTraceJCC, BX_IA_JBE_Jw },
|
| 299 |
|
|
/* 77 /w */ { BxImmediate_BrOff8 | BxTraceJCC, BX_IA_JNBE_Jw },
|
| 300 |
|
|
/* 78 /w */ { BxImmediate_BrOff8 | BxTraceJCC, BX_IA_JS_Jw },
|
| 301 |
|
|
/* 79 /w */ { BxImmediate_BrOff8 | BxTraceJCC, BX_IA_JNS_Jw },
|
| 302 |
|
|
/* 7A /w */ { BxImmediate_BrOff8 | BxTraceJCC, BX_IA_JP_Jw },
|
| 303 |
|
|
/* 7B /w */ { BxImmediate_BrOff8 | BxTraceJCC, BX_IA_JNP_Jw },
|
| 304 |
|
|
/* 7C /w */ { BxImmediate_BrOff8 | BxTraceJCC, BX_IA_JL_Jw },
|
| 305 |
|
|
/* 7D /w */ { BxImmediate_BrOff8 | BxTraceJCC, BX_IA_JNL_Jw },
|
| 306 |
|
|
/* 7E /w */ { BxImmediate_BrOff8 | BxTraceJCC, BX_IA_JLE_Jw },
|
| 307 |
|
|
/* 7F /w */ { BxImmediate_BrOff8 | BxTraceJCC, BX_IA_JNLE_Jw },
|
| 308 |
|
|
/* 80 /w */ { BxGroup1 | BxImmediate_Ib, BX_IA_ERROR, BxOpcodeInfoG1EbIb },
|
| 309 |
|
|
/* 81 /w */ { BxGroup1 | BxImmediate_Iw, BX_IA_ERROR, BxOpcodeInfoG1Ew },
|
| 310 |
|
|
/* 82 /w */ { BxGroup1 | BxImmediate_Ib, BX_IA_ERROR, BxOpcodeInfoG1EbIb },
|
| 311 |
|
|
/* 83 /w */ { BxGroup1 | BxImmediate_Ib_SE, BX_IA_ERROR, BxOpcodeInfoG1Ew },
|
| 312 |
|
|
/* 84 /w */ { 0, BX_IA_TEST_EbGb },
|
| 313 |
|
|
/* 85 /w */ { 0, BX_IA_TEST_EwGw },
|
| 314 |
|
|
/* 86 /w */ { BxLockable, BX_IA_XCHG_EbGb },
|
| 315 |
|
|
/* 87 /w */ { BxLockable, BX_IA_XCHG_EwGw },
|
| 316 |
|
|
/* 88 /w */ { 0, BX_IA_MOV_EbGb },
|
| 317 |
|
|
/* 89 /w */ { 0, BX_IA_MOV_EwGw },
|
| 318 |
|
|
/* 8A /w */ { 0, BX_IA_MOV_GbEb },
|
| 319 |
|
|
/* 8B /w */ { 0, BX_IA_MOV_GwEw },
|
| 320 |
|
|
/* 8C /w */ { 0, BX_IA_MOV_EwSw },
|
| 321 |
|
|
/* 8D /w */ { 0, BX_IA_LEA_GwM },
|
| 322 |
|
|
/* 8E /w */ { 0, BX_IA_MOV_SwEw },
|
| 323 |
|
|
/* 8F /w */ { BxGroup1A, BX_IA_ERROR, BxOpcodeInfoG1AEw },
|
| 324 |
|
|
/* 90 /w */ { 0, BX_IA_NOP },//AO{ BxPrefixSSE, BX_IA_NOP, BxOpcodeGroupSSE_PAUSE },
|
| 325 |
|
|
/* 91 /w */ { 0, BX_IA_XCHG_RXAX },
|
| 326 |
|
|
/* 92 /w */ { 0, BX_IA_XCHG_RXAX },
|
| 327 |
|
|
/* 93 /w */ { 0, BX_IA_XCHG_RXAX },
|
| 328 |
|
|
/* 94 /w */ { 0, BX_IA_XCHG_RXAX },
|
| 329 |
|
|
/* 95 /w */ { 0, BX_IA_XCHG_RXAX },
|
| 330 |
|
|
/* 96 /w */ { 0, BX_IA_XCHG_RXAX },
|
| 331 |
|
|
/* 97 /w */ { 0, BX_IA_XCHG_RXAX },
|
| 332 |
|
|
/* 98 /w */ { 0, BX_IA_CBW },
|
| 333 |
|
|
/* 99 /w */ { 0, BX_IA_CWD },
|
| 334 |
|
|
/* 9A /w */ { BxImmediate_Iw | BxImmediate_Iw2 | BxTraceEnd, BX_IA_CALL16_Ap },
|
| 335 |
|
|
/* 9B /w */ { 0, BX_IA_FWAIT },
|
| 336 |
|
|
/* 9C /w */ { 0, BX_IA_PUSHF_Fw },
|
| 337 |
|
|
/* 9D /w */ { BxTraceEnd, BX_IA_POPF_Fw },
|
| 338 |
|
|
/* 9E /w */ { 0, BX_IA_SAHF },
|
| 339 |
|
|
/* 9F /w */ { 0, BX_IA_LAHF },
|
| 340 |
|
|
/* A0 /w */ { BxImmediate_O, BX_IA_MOV_ALOd },
|
| 341 |
|
|
/* A1 /w */ { BxImmediate_O, BX_IA_MOV_AXOd },
|
| 342 |
|
|
/* A2 /w */ { BxImmediate_O, BX_IA_MOV_OdAL },
|
| 343 |
|
|
/* A3 /w */ { BxImmediate_O, BX_IA_MOV_OdAX },
|
| 344 |
|
|
/* A4 /w */ { BxRepeatable, BX_IA_REP_MOVSB_XbYb },
|
| 345 |
|
|
/* A5 /w */ { BxRepeatable, BX_IA_REP_MOVSW_XwYw },
|
| 346 |
|
|
/* A6 /w */ { BxRepeatable, BX_IA_REP_CMPSB_XbYb },
|
| 347 |
|
|
/* A7 /w */ { BxRepeatable, BX_IA_REP_CMPSW_XwYw },
|
| 348 |
|
|
/* A8 /w */ { BxImmediate_Ib, BX_IA_TEST_ALIb },
|
| 349 |
|
|
/* A9 /w */ { BxImmediate_Iw, BX_IA_TEST_AXIw },
|
| 350 |
|
|
/* AA /w */ { BxRepeatable, BX_IA_REP_STOSB_YbAL },
|
| 351 |
|
|
/* AB /w */ { BxRepeatable, BX_IA_REP_STOSW_YwAX },
|
| 352 |
|
|
/* AC /w */ { BxRepeatable, BX_IA_REP_LODSB_ALXb },
|
| 353 |
|
|
/* AD /w */ { BxRepeatable, BX_IA_REP_LODSW_AXXw },
|
| 354 |
|
|
/* AE /w */ { BxRepeatable, BX_IA_REP_SCASB_ALXb },
|
| 355 |
|
|
/* AF /w */ { BxRepeatable, BX_IA_REP_SCASW_AXXw },
|
| 356 |
|
|
/* B0 /w */ { BxImmediate_Ib, BX_IA_MOV_RLIb },
|
| 357 |
|
|
/* B1 /w */ { BxImmediate_Ib, BX_IA_MOV_RLIb },
|
| 358 |
|
|
/* B2 /w */ { BxImmediate_Ib, BX_IA_MOV_RLIb },
|
| 359 |
|
|
/* B3 /w */ { BxImmediate_Ib, BX_IA_MOV_RLIb },
|
| 360 |
|
|
/* B4 /w */ { BxImmediate_Ib, BX_IA_MOV_RHIb },
|
| 361 |
|
|
/* B5 /w */ { BxImmediate_Ib, BX_IA_MOV_RHIb },
|
| 362 |
|
|
/* B6 /w */ { BxImmediate_Ib, BX_IA_MOV_RHIb },
|
| 363 |
|
|
/* B7 /w */ { BxImmediate_Ib, BX_IA_MOV_RHIb },
|
| 364 |
|
|
/* B8 /w */ { BxImmediate_Iw, BX_IA_MOV_RXIw },
|
| 365 |
|
|
/* B9 /w */ { BxImmediate_Iw, BX_IA_MOV_RXIw },
|
| 366 |
|
|
/* BA /w */ { BxImmediate_Iw, BX_IA_MOV_RXIw },
|
| 367 |
|
|
/* BB /w */ { BxImmediate_Iw, BX_IA_MOV_RXIw },
|
| 368 |
|
|
/* BC /w */ { BxImmediate_Iw, BX_IA_MOV_RXIw },
|
| 369 |
|
|
/* BD /w */ { BxImmediate_Iw, BX_IA_MOV_RXIw },
|
| 370 |
|
|
/* BE /w */ { BxImmediate_Iw, BX_IA_MOV_RXIw },
|
| 371 |
|
|
/* BF /w */ { BxImmediate_Iw, BX_IA_MOV_RXIw },
|
| 372 |
|
|
/* C0 /w */ { BxGroup2 | BxImmediate_Ib, BX_IA_ERROR, BxOpcodeInfoG2EbIb },
|
| 373 |
|
|
/* C1 /w */ { BxGroup2 | BxImmediate_Ib, BX_IA_ERROR, BxOpcodeInfoG2EwIb },
|
| 374 |
|
|
/* C2 /w */ { BxImmediate_Iw | BxTraceEnd, BX_IA_RETnear16_Iw },
|
| 375 |
|
|
/* C3 /w */ { BxTraceEnd, BX_IA_RETnear16 },
|
| 376 |
|
|
/* C4 /w */ { BxPrefixVEX, BX_IA_LES_GwMp },
|
| 377 |
|
|
/* C5 /w */ { BxPrefixVEX, BX_IA_LDS_GwMp },
|
| 378 |
|
|
/* C6 /w */ { BxGroup11, BX_IA_ERROR, BxOpcodeInfoG11Eb },
|
| 379 |
|
|
/* C7 /w */ { BxGroup11, BX_IA_ERROR, BxOpcodeInfoG11Ew },
|
| 380 |
|
|
/* C8 /w */ { BxImmediate_Iw | BxImmediate_Ib2, BX_IA_ENTER16_IwIb },
|
| 381 |
|
|
/* C9 /w */ { 0, BX_IA_LEAVE16 },
|
| 382 |
|
|
/* CA /w */ { BxImmediate_Iw | BxTraceEnd, BX_IA_RETfar16_Iw },
|
| 383 |
|
|
/* CB /w */ { BxTraceEnd, BX_IA_RETfar16 },
|
| 384 |
|
|
/* CC /w */ { BxTraceEnd, BX_IA_INT3 },
|
| 385 |
|
|
/* CD /w */ { BxImmediate_Ib | BxTraceEnd, BX_IA_INT_Ib },
|
| 386 |
|
|
/* CE /w */ { BxTraceEnd, BX_IA_INTO },
|
| 387 |
|
|
/* CF /w */ { BxTraceEnd, BX_IA_IRET16 },
|
| 388 |
|
|
/* D0 /w */ { BxGroup2 | BxImmediate_I1, BX_IA_ERROR, BxOpcodeInfoG2EbIb },
|
| 389 |
|
|
/* D1 /w */ { BxGroup2 | BxImmediate_I1, BX_IA_ERROR, BxOpcodeInfoG2EwIb },
|
| 390 |
|
|
/* D2 /w */ { BxGroup2, BX_IA_ERROR, BxOpcodeInfoG2Eb },
|
| 391 |
|
|
/* D3 /w */ { BxGroup2, BX_IA_ERROR, BxOpcodeInfoG2Ew },
|
| 392 |
|
|
/* D4 /w */ { BxImmediate_Ib, BX_IA_AAM },
|
| 393 |
|
|
/* D5 /w */ { BxImmediate_Ib, BX_IA_AAD },
|
| 394 |
|
|
/* D6 /w */ { 0, BX_IA_SALC },
|
| 395 |
|
|
/* D7 /w */ { 0, BX_IA_XLAT },
|
| 396 |
|
|
#if BX_SUPPORT_FPU
|
| 397 |
|
|
/* D8 /w */ { BxGroupFP, BX_IA_ERROR, BxOpcodeInfo_FPGroupD8 },
|
| 398 |
|
|
/* D9 /w */ { BxFPEscape, BX_IA_ERROR, BxOpcodeInfo_FloatingPointD9 },
|
| 399 |
|
|
/* DA /w */ { BxFPEscape, BX_IA_ERROR, BxOpcodeInfo_FloatingPointDA },
|
| 400 |
|
|
/* DB /w */ { BxFPEscape, BX_IA_ERROR, BxOpcodeInfo_FloatingPointDB },
|
| 401 |
|
|
/* DC /w */ { BxGroupFP, BX_IA_ERROR, BxOpcodeInfo_FPGroupDC },
|
| 402 |
|
|
/* DD /w */ { BxGroupFP, BX_IA_ERROR, BxOpcodeInfo_FPGroupDD },
|
| 403 |
|
|
/* DE /w */ { BxFPEscape, BX_IA_ERROR, BxOpcodeInfo_FloatingPointDE },
|
| 404 |
|
|
/* DF /w */ { BxFPEscape, BX_IA_ERROR, BxOpcodeInfo_FloatingPointDF },
|
| 405 |
|
|
#else
|
| 406 |
|
|
/* D8 /w */ { 0, BX_IA_FPU_ESC },
|
| 407 |
|
|
/* D9 /w */ { 0, BX_IA_FPU_ESC },
|
| 408 |
|
|
/* DA /w */ { 0, BX_IA_FPU_ESC },
|
| 409 |
|
|
/* DB /w */ { 0, BX_IA_FPU_ESC },
|
| 410 |
|
|
/* DC /w */ { 0, BX_IA_FPU_ESC },
|
| 411 |
|
|
/* DD /w */ { 0, BX_IA_FPU_ESC },
|
| 412 |
|
|
/* DE /w */ { 0, BX_IA_FPU_ESC },
|
| 413 |
|
|
/* DF /w */ { 0, BX_IA_FPU_ESC },
|
| 414 |
|
|
#endif
|
| 415 |
|
|
/* E0 /w */ { BxImmediate_BrOff8 | BxTraceEnd, BX_IA_LOOPNE16_Jb },
|
| 416 |
|
|
/* E1 /w */ { BxImmediate_BrOff8 | BxTraceEnd, BX_IA_LOOPE16_Jb },
|
| 417 |
|
|
/* E2 /w */ { BxImmediate_BrOff8 | BxTraceEnd, BX_IA_LOOP16_Jb },
|
| 418 |
|
|
/* E3 /w */ { BxImmediate_BrOff8 | BxTraceEnd, BX_IA_JCXZ_Jb },
|
| 419 |
|
|
/* E4 /w */ { BxImmediate_Ib, BX_IA_IN_ALIb },
|
| 420 |
|
|
/* E5 /w */ { BxImmediate_Ib, BX_IA_IN_AXIb },
|
| 421 |
|
|
/* E6 /w */ { BxImmediate_Ib, BX_IA_OUT_IbAL },
|
| 422 |
|
|
/* E7 /w */ { BxImmediate_Ib, BX_IA_OUT_IbAX },
|
| 423 |
|
|
/* E8 /w */ { BxImmediate_BrOff16 | BxTraceEnd, BX_IA_CALL_Jw },
|
| 424 |
|
|
/* E9 /w */ { BxImmediate_BrOff16 | BxTraceEnd, BX_IA_JMP_Jw },
|
| 425 |
|
|
/* EA /w */ { BxImmediate_Iw | BxImmediate_Iw2 | BxTraceEnd, BX_IA_JMP_Ap },
|
| 426 |
|
|
/* EB /w */ { BxImmediate_BrOff8 | BxTraceEnd, BX_IA_JMP_Jw },
|
| 427 |
|
|
/* EC /w */ { 0, BX_IA_IN_ALDX },
|
| 428 |
|
|
/* ED /w */ { 0, BX_IA_IN_AXDX },
|
| 429 |
|
|
/* EE /w */ { 0, BX_IA_OUT_DXAL },
|
| 430 |
|
|
/* EF /w */ { 0, BX_IA_OUT_DXAX },
|
| 431 |
|
|
/* F0 /w */ { 0, BX_IA_ERROR }, // LOCK
|
| 432 |
|
|
/* F1 /w */ { BxTraceEnd, BX_IA_INT1 },
|
| 433 |
|
|
/* F2 /w */ { 0, BX_IA_ERROR }, // REPNE/REPNZ
|
| 434 |
|
|
/* F3 /w */ { 0, BX_IA_ERROR }, // REP, REPE/REPZ
|
| 435 |
|
|
/* F4 /w */ { BxTraceEnd, BX_IA_HLT },
|
| 436 |
|
|
/* F5 /w */ { 0, BX_IA_CMC },
|
| 437 |
|
|
/* F6 /w */ { BxGroup3, BX_IA_ERROR, BxOpcodeInfoG3Eb },
|
| 438 |
|
|
/* F7 /w */ { BxGroup3, BX_IA_ERROR, BxOpcodeInfoG3Ew },
|
| 439 |
|
|
/* F8 /w */ { 0, BX_IA_CLC },
|
| 440 |
|
|
/* F9 /w */ { 0, BX_IA_STC },
|
| 441 |
|
|
/* FA /w */ { 0, BX_IA_CLI },
|
| 442 |
|
|
/* FB /w */ { 0, BX_IA_STI },
|
| 443 |
|
|
/* FC /w */ { 0, BX_IA_CLD },
|
| 444 |
|
|
/* FD /w */ { 0, BX_IA_STD },
|
| 445 |
|
|
/* FE /w */ { BxGroup4, BX_IA_ERROR, BxOpcodeInfoG4 },
|
| 446 |
|
|
/* FF /w */ { BxGroup5, BX_IA_ERROR, BxOpcodeInfoG5w },
|
| 447 |
|
|
|
| 448 |
|
|
/* 0F 00 /w */ { BxGroup6, BX_IA_ERROR, BxOpcodeInfoG6 },
|
| 449 |
|
|
/* 0F 01 /w */ { BxGroup7, BX_IA_ERROR, BxOpcodeInfoG7 },
|
| 450 |
|
|
/* 0F 02 /w */ { 0, BX_IA_LAR_GvEw },
|
| 451 |
|
|
/* 0F 03 /w */ { 0, BX_IA_LSL_GvEw },
|
| 452 |
|
|
/* 0F 04 /w */ { 0, BX_IA_ERROR },
|
| 453 |
|
|
/* 0F 05 /w */ { 0, BX_IA_ERROR },//AO{ BxTraceEnd, BX_IA_SYSCALL_LEGACY },
|
| 454 |
|
|
/* 0F 06 /w */ { BxTraceEnd, BX_IA_CLTS },
|
| 455 |
|
|
/* 0F 07 /w */ { 0, BX_IA_ERROR },//AO{ BxTraceEnd, BX_IA_SYSRET_LEGACY },
|
| 456 |
|
|
/* 0F 08 /w */ { BxTraceEnd, BX_IA_INVD },
|
| 457 |
|
|
/* 0F 09 /w */ { 0, BX_IA_WBINVD },
|
| 458 |
|
|
/* 0F 0A /w */ { 0, BX_IA_ERROR },
|
| 459 |
|
|
/* 0F 0B /w */ { 0, BX_IA_ERROR },//AO{ BxTraceEnd, BX_IA_UD2A },
|
| 460 |
|
|
/* 0F 0C /w */ { 0, BX_IA_ERROR },
|
| 461 |
|
|
/* 0F 0D /w */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_PREFETCHW }, // 3DNow! PREFETCHW on AMD, NOP on Intel
|
| 462 |
|
|
/* 0F 0E /w */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_FEMMS }, // 3DNow! FEMMS
|
| 463 |
|
|
/* 0F 0F /w */ { 0, BX_IA_ERROR },//AO{ BxImmediate_Ib, BX_IA_ERROR }, // 3DNow! Opcode Table
|
| 464 |
|
|
/* 0F 10 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MOVUPS_VpsWps, BxOpcodeGroupSSE_0f10 },
|
| 465 |
|
|
/* 0F 11 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MOVUPS_WpsVps, BxOpcodeGroupSSE_0f11 },
|
| 466 |
|
|
/* 0F 12 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MOVLPS_VpsMq, BxOpcodeGroupSSE_0f12 },
|
| 467 |
|
|
/* 0F 13 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MOVLPS_MqVps, BxOpcodeGroupSSE_0f13M },
|
| 468 |
|
|
/* 0F 14 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_UNPCKLPS_VpsWdq, BxOpcodeGroupSSE_0f14 },
|
| 469 |
|
|
/* 0F 15 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_UNPCKHPS_VpsWdq, BxOpcodeGroupSSE_0f15 },
|
| 470 |
|
|
/* 0F 16 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MOVHPS_VpsMq, BxOpcodeGroupSSE_0f16 },
|
| 471 |
|
|
/* 0F 17 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MOVHPS_MqVps, BxOpcodeGroupSSE_0f17M },
|
| 472 |
|
|
#if BX_CPU_LEVEL >= 6
|
| 473 |
|
|
/* 0F 18 /w */ { 0, BX_IA_PREFETCH }, // opcode group G16, PREFETCH hints
|
| 474 |
|
|
/* 0F 19 /w */ { 0, BX_IA_NOP }, // multi-byte NOP
|
| 475 |
|
|
/* 0F 1A /w */ { 0, BX_IA_NOP }, // multi-byte NOP
|
| 476 |
|
|
/* 0F 1B /w */ { 0, BX_IA_NOP }, // multi-byte NOP
|
| 477 |
|
|
/* 0F 1C /w */ { 0, BX_IA_NOP }, // multi-byte NOP
|
| 478 |
|
|
/* 0F 1D /w */ { 0, BX_IA_NOP }, // multi-byte NOP
|
| 479 |
|
|
/* 0F 1E /w */ { 0, BX_IA_NOP }, // multi-byte NOP
|
| 480 |
|
|
/* 0F 1F /w */ { 0, BX_IA_NOP }, // multi-byte NOP
|
| 481 |
|
|
#else
|
| 482 |
|
|
/* 0F 18 /w */ { 0, BX_IA_ERROR },
|
| 483 |
|
|
/* 0F 19 /w */ { 0, BX_IA_ERROR },
|
| 484 |
|
|
/* 0F 1A /w */ { 0, BX_IA_ERROR },
|
| 485 |
|
|
/* 0F 1B /w */ { 0, BX_IA_ERROR },
|
| 486 |
|
|
/* 0F 1C /w */ { 0, BX_IA_ERROR },
|
| 487 |
|
|
/* 0F 1D /w */ { 0, BX_IA_ERROR },
|
| 488 |
|
|
/* 0F 1E /w */ { 0, BX_IA_ERROR },
|
| 489 |
|
|
/* 0F 1F /w */ { 0, BX_IA_ERROR },
|
| 490 |
|
|
#endif
|
| 491 |
|
|
/* 0F 20 /w */ { BxGroupN, BX_IA_ERROR, BxOpcodeInfoMOV_RdCd },
|
| 492 |
|
|
/* 0F 21 /w */ { 0, BX_IA_MOV_RdDd },
|
| 493 |
|
|
/* 0F 22 /w */ { BxGroupN, BX_IA_ERROR, BxOpcodeInfoMOV_CdRd },
|
| 494 |
|
|
/* 0F 23 /w */ { BxTraceEnd, BX_IA_MOV_DdRd },
|
| 495 |
|
|
/* 0F 24 /w */ { 0, BX_IA_ERROR }, // BX_IA_MOV_RdTd not implemented
|
| 496 |
|
|
/* 0F 25 /w */ { 0, BX_IA_ERROR },
|
| 497 |
|
|
/* 0F 26 /w */ { 0, BX_IA_ERROR }, // BX_IA_MOV_TdRd not implemented
|
| 498 |
|
|
/* 0F 27 /w */ { 0, BX_IA_ERROR },
|
| 499 |
|
|
/* 0F 28 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MOVAPS_VpsWps, BxOpcodeGroupSSE_0f28 },
|
| 500 |
|
|
/* 0F 29 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MOVAPS_WpsVps, BxOpcodeGroupSSE_0f29 },
|
| 501 |
|
|
/* 0F 2A /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_CVTPI2PS_VpsQq, BxOpcodeGroupSSE_0f2a },
|
| 502 |
|
|
/* 0F 2B /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MOVNTPS_MpsVps, BxOpcodeGroupSSE_0f2bM },
|
| 503 |
|
|
/* 0F 2C /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_CVTTPS2PI_PqWps, BxOpcodeGroupSSE_0f2c },
|
| 504 |
|
|
/* 0F 2D /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_CVTPS2PI_PqWps, BxOpcodeGroupSSE_0f2d },
|
| 505 |
|
|
/* 0F 2E /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_UCOMISS_VssWss, BxOpcodeGroupSSE_0f2e },
|
| 506 |
|
|
/* 0F 2F /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_COMISS_VpsWps, BxOpcodeGroupSSE_0f2f },
|
| 507 |
|
|
/* 0F 30 /w */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_WRMSR },
|
| 508 |
|
|
/* 0F 31 /w */ { 0, BX_IA_ERROR },//AO{ BxTraceEnd, BX_IA_RDTSC }, // end trace to avoid multiple TSC samples in one cycle
|
| 509 |
|
|
/* 0F 32 /w */ { 0, BX_IA_ERROR },//AO{ BxTraceEnd, BX_IA_RDMSR }, // end trace to avoid multiple TSC samples in one cycle
|
| 510 |
|
|
/* 0F 33 /w */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_RDPMC },
|
| 511 |
|
|
/* 0F 34 /w */ { 0, BX_IA_ERROR },//AO{ BxTraceEnd, BX_IA_SYSENTER },
|
| 512 |
|
|
/* 0F 35 /w */ { 0, BX_IA_ERROR },//AO{ BxTraceEnd, BX_IA_SYSEXIT },
|
| 513 |
|
|
/* 0F 36 /w */ { 0, BX_IA_ERROR },
|
| 514 |
|
|
/* 0F 37 /w */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_GETSEC },
|
| 515 |
|
|
#if BX_CPU_LEVEL >= 6
|
| 516 |
|
|
/* 0F 38 /w */ { Bx3ByteOp, BX_IA_ERROR, BxOpcode3ByteTable0f38 }, // 3-byte escape
|
| 517 |
|
|
#else
|
| 518 |
|
|
/* 0F 38 /w */ { 0, BX_IA_ERROR },
|
| 519 |
|
|
#endif
|
| 520 |
|
|
/* 0F 39 /w */ { 0, BX_IA_ERROR },
|
| 521 |
|
|
#if BX_CPU_LEVEL >= 6
|
| 522 |
|
|
/* 0F 3A /w */ { Bx3ByteOp | BxImmediate_Ib, BX_IA_ERROR, BxOpcode3ByteTable0f3a }, // 3-byte escape
|
| 523 |
|
|
#else
|
| 524 |
|
|
/* 0F 3A /w */ { 0, BX_IA_ERROR },
|
| 525 |
|
|
#endif
|
| 526 |
|
|
/* 0F 3B /w */ { 0, BX_IA_ERROR },
|
| 527 |
|
|
/* 0F 3C /w */ { 0, BX_IA_ERROR },
|
| 528 |
|
|
/* 0F 3D /w */ { 0, BX_IA_ERROR },
|
| 529 |
|
|
/* 0F 3E /w */ { 0, BX_IA_ERROR },
|
| 530 |
|
|
/* 0F 3F /w */ { 0, BX_IA_ERROR },
|
| 531 |
|
|
/* 0F 40 /w */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_CMOVO_GwEw },
|
| 532 |
|
|
/* 0F 41 /w */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_CMOVNO_GwEw },
|
| 533 |
|
|
/* 0F 42 /w */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_CMOVB_GwEw },
|
| 534 |
|
|
/* 0F 43 /w */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_CMOVNB_GwEw },
|
| 535 |
|
|
/* 0F 44 /w */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_CMOVZ_GwEw },
|
| 536 |
|
|
/* 0F 45 /w */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_CMOVNZ_GwEw },
|
| 537 |
|
|
/* 0F 46 /w */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_CMOVBE_GwEw },
|
| 538 |
|
|
/* 0F 47 /w */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_CMOVNBE_GwEw },
|
| 539 |
|
|
/* 0F 48 /w */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_CMOVS_GwEw },
|
| 540 |
|
|
/* 0F 49 /w */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_CMOVNS_GwEw },
|
| 541 |
|
|
/* 0F 4A /w */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_CMOVP_GwEw },
|
| 542 |
|
|
/* 0F 4B /w */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_CMOVNP_GwEw },
|
| 543 |
|
|
/* 0F 4C /w */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_CMOVL_GwEw },
|
| 544 |
|
|
/* 0F 4D /w */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_CMOVNL_GwEw },
|
| 545 |
|
|
/* 0F 4E /w */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_CMOVLE_GwEw },
|
| 546 |
|
|
/* 0F 4F /w */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_CMOVNLE_GwEw },
|
| 547 |
|
|
/* 0F 50 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MOVMSKPS_GdVRps, BxOpcodeGroupSSE_0f50R },
|
| 548 |
|
|
/* 0F 51 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_SQRTPS_VpsWps, BxOpcodeGroupSSE_0f51 },
|
| 549 |
|
|
/* 0F 52 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_RSQRTPS_VpsWps, BxOpcodeGroupSSE_0f52 },
|
| 550 |
|
|
/* 0F 53 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_RCPPS_VpsWps, BxOpcodeGroupSSE_0f53 },
|
| 551 |
|
|
/* 0F 54 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_ANDPS_VpsWps, BxOpcodeGroupSSE_0f54 },
|
| 552 |
|
|
/* 0F 55 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_ANDNPS_VpsWps, BxOpcodeGroupSSE_0f55 },
|
| 553 |
|
|
/* 0F 56 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_ORPS_VpsWps, BxOpcodeGroupSSE_0f56 },
|
| 554 |
|
|
/* 0F 57 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_XORPS_VpsWps, BxOpcodeGroupSSE_0f57 },
|
| 555 |
|
|
/* 0F 58 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_ADDPS_VpsWps, BxOpcodeGroupSSE_0f58 },
|
| 556 |
|
|
/* 0F 59 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MULPS_VpsWps, BxOpcodeGroupSSE_0f59 },
|
| 557 |
|
|
/* 0F 5A /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_CVTPS2PD_VpdWps, BxOpcodeGroupSSE_0f5a },
|
| 558 |
|
|
/* 0F 5B /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_CVTDQ2PS_VpsWdq, BxOpcodeGroupSSE_0f5b },
|
| 559 |
|
|
/* 0F 5C /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_SUBPS_VpsWps, BxOpcodeGroupSSE_0f5c },
|
| 560 |
|
|
/* 0F 5D /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MINPS_VpsWps, BxOpcodeGroupSSE_0f5d },
|
| 561 |
|
|
/* 0F 5E /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_DIVPS_VpsWps, BxOpcodeGroupSSE_0f5e },
|
| 562 |
|
|
/* 0F 5F /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MAXPS_VpsWps, BxOpcodeGroupSSE_0f5f },
|
| 563 |
|
|
/* 0F 60 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PUNPCKLBW_PqQd, BxOpcodeGroupSSE_0f60 },
|
| 564 |
|
|
/* 0F 61 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PUNPCKLWD_PqQd, BxOpcodeGroupSSE_0f61 },
|
| 565 |
|
|
/* 0F 62 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PUNPCKLDQ_PqQd, BxOpcodeGroupSSE_0f62 },
|
| 566 |
|
|
/* 0F 63 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PACKSSWB_PqQq, BxOpcodeGroupSSE_0f63 },
|
| 567 |
|
|
/* 0F 64 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PCMPGTB_PqQq, BxOpcodeGroupSSE_0f64 },
|
| 568 |
|
|
/* 0F 65 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PCMPGTW_PqQq, BxOpcodeGroupSSE_0f65 },
|
| 569 |
|
|
/* 0F 66 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PCMPGTD_PqQq, BxOpcodeGroupSSE_0f66 },
|
| 570 |
|
|
/* 0F 67 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PACKUSWB_PqQq, BxOpcodeGroupSSE_0f67 },
|
| 571 |
|
|
/* 0F 68 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PUNPCKHBW_PqQq, BxOpcodeGroupSSE_0f68 },
|
| 572 |
|
|
/* 0F 69 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PUNPCKHWD_PqQq, BxOpcodeGroupSSE_0f69 },
|
| 573 |
|
|
/* 0F 6A /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PUNPCKHDQ_PqQq, BxOpcodeGroupSSE_0f6a },
|
| 574 |
|
|
/* 0F 6B /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PACKSSDW_PqQq, BxOpcodeGroupSSE_0f6b },
|
| 575 |
|
|
/* 0F 6C /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE66, BX_IA_PUNPCKLQDQ_VdqWdq },
|
| 576 |
|
|
/* 0F 6D /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE66, BX_IA_PUNPCKHQDQ_VdqWdq },
|
| 577 |
|
|
/* 0F 6E /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MOVD_PqEd, BxOpcodeGroupSSE_0f6e },
|
| 578 |
|
|
/* 0F 6F /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MOVQ_PqQq, BxOpcodeGroupSSE_0f6f },
|
| 579 |
|
|
/* 0F 70 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE | BxImmediate_Ib, BX_IA_PSHUFW_PqQqIb, BxOpcodeGroupSSE_0f70 },
|
| 580 |
|
|
/* 0F 71 /w */ { 0, BX_IA_ERROR },//AO{ BxGroup12, BX_IA_ERROR, BxOpcodeInfoG12R },
|
| 581 |
|
|
/* 0F 72 /w */ { 0, BX_IA_ERROR },//AO{ BxGroup13, BX_IA_ERROR, BxOpcodeInfoG13R },
|
| 582 |
|
|
/* 0F 73 /w */ { 0, BX_IA_ERROR },//AO{ BxGroup14, BX_IA_ERROR, BxOpcodeInfoG14R },
|
| 583 |
|
|
/* 0F 74 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PCMPEQB_PqQq, BxOpcodeGroupSSE_0f74 },
|
| 584 |
|
|
/* 0F 75 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PCMPEQW_PqQq, BxOpcodeGroupSSE_0f75 },
|
| 585 |
|
|
/* 0F 76 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PCMPEQD_PqQq, BxOpcodeGroupSSE_0f76 },
|
| 586 |
|
|
/* 0F 77 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_EMMS, BxOpcodeGroupSSE_ERR },
|
| 587 |
|
|
/* 0F 78 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_VMREAD_EdGd, BxOpcodeGroupSSE4A_0f78 },
|
| 588 |
|
|
/* 0F 79 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_VMWRITE_GdEd, BxOpcodeGroupSSE4A_0f79 },
|
| 589 |
|
|
/* 0F 7A /w */ { 0, BX_IA_ERROR },
|
| 590 |
|
|
/* 0F 7B /w */ { 0, BX_IA_ERROR },
|
| 591 |
|
|
/* 0F 7C /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_ERROR, BxOpcodeGroupSSE_0f7c },
|
| 592 |
|
|
/* 0F 7D /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_ERROR, BxOpcodeGroupSSE_0f7d },
|
| 593 |
|
|
/* 0F 7E /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MOVD_EdPd, BxOpcodeGroupSSE_0f7e },
|
| 594 |
|
|
/* 0F 7F /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MOVQ_QqPq, BxOpcodeGroupSSE_0f7f },
|
| 595 |
|
|
/* 0F 80 /w */ { BxImmediate_BrOff16 | BxTraceJCC, BX_IA_JO_Jw },
|
| 596 |
|
|
/* 0F 81 /w */ { BxImmediate_BrOff16 | BxTraceJCC, BX_IA_JNO_Jw },
|
| 597 |
|
|
/* 0F 82 /w */ { BxImmediate_BrOff16 | BxTraceJCC, BX_IA_JB_Jw },
|
| 598 |
|
|
/* 0F 83 /w */ { BxImmediate_BrOff16 | BxTraceJCC, BX_IA_JNB_Jw },
|
| 599 |
|
|
/* 0F 84 /w */ { BxImmediate_BrOff16 | BxTraceJCC, BX_IA_JZ_Jw },
|
| 600 |
|
|
/* 0F 85 /w */ { BxImmediate_BrOff16 | BxTraceJCC, BX_IA_JNZ_Jw },
|
| 601 |
|
|
/* 0F 86 /w */ { BxImmediate_BrOff16 | BxTraceJCC, BX_IA_JBE_Jw },
|
| 602 |
|
|
/* 0F 87 /w */ { BxImmediate_BrOff16 | BxTraceJCC, BX_IA_JNBE_Jw },
|
| 603 |
|
|
/* 0F 88 /w */ { BxImmediate_BrOff16 | BxTraceJCC, BX_IA_JS_Jw },
|
| 604 |
|
|
/* 0F 89 /w */ { BxImmediate_BrOff16 | BxTraceJCC, BX_IA_JNS_Jw },
|
| 605 |
|
|
/* 0F 8A /w */ { BxImmediate_BrOff16 | BxTraceJCC, BX_IA_JP_Jw },
|
| 606 |
|
|
/* 0F 8B /w */ { BxImmediate_BrOff16 | BxTraceJCC, BX_IA_JNP_Jw },
|
| 607 |
|
|
/* 0F 8C /w */ { BxImmediate_BrOff16 | BxTraceJCC, BX_IA_JL_Jw },
|
| 608 |
|
|
/* 0F 8D /w */ { BxImmediate_BrOff16 | BxTraceJCC, BX_IA_JNL_Jw },
|
| 609 |
|
|
/* 0F 8E /w */ { BxImmediate_BrOff16 | BxTraceJCC, BX_IA_JLE_Jw },
|
| 610 |
|
|
/* 0F 8F /w */ { BxImmediate_BrOff16 | BxTraceJCC, BX_IA_JNLE_Jw },
|
| 611 |
|
|
/* 0F 90 /w */ { 0, BX_IA_SETO_Eb },
|
| 612 |
|
|
/* 0F 91 /w */ { 0, BX_IA_SETNO_Eb },
|
| 613 |
|
|
/* 0F 92 /w */ { 0, BX_IA_SETB_Eb },
|
| 614 |
|
|
/* 0F 93 /w */ { 0, BX_IA_SETNB_Eb },
|
| 615 |
|
|
/* 0F 94 /w */ { 0, BX_IA_SETZ_Eb },
|
| 616 |
|
|
/* 0F 95 /w */ { 0, BX_IA_SETNZ_Eb },
|
| 617 |
|
|
/* 0F 96 /w */ { 0, BX_IA_SETBE_Eb },
|
| 618 |
|
|
/* 0F 97 /w */ { 0, BX_IA_SETNBE_Eb },
|
| 619 |
|
|
/* 0F 98 /w */ { 0, BX_IA_SETS_Eb },
|
| 620 |
|
|
/* 0F 99 /w */ { 0, BX_IA_SETNS_Eb },
|
| 621 |
|
|
/* 0F 9A /w */ { 0, BX_IA_SETP_Eb },
|
| 622 |
|
|
/* 0F 9B /w */ { 0, BX_IA_SETNP_Eb },
|
| 623 |
|
|
/* 0F 9C /w */ { 0, BX_IA_SETL_Eb },
|
| 624 |
|
|
/* 0F 9D /w */ { 0, BX_IA_SETNL_Eb },
|
| 625 |
|
|
/* 0F 9E /w */ { 0, BX_IA_SETLE_Eb },
|
| 626 |
|
|
/* 0F 9F /w */ { 0, BX_IA_SETNLE_Eb },
|
| 627 |
|
|
/* 0F A0 /w */ { 0, BX_IA_PUSH16_FS },
|
| 628 |
|
|
/* 0F A1 /w */ { 0, BX_IA_POP16_FS },
|
| 629 |
|
|
/* 0F A2 /w */ { 0, BX_IA_CPUID },
|
| 630 |
|
|
/* 0F A3 /w */ { 0, BX_IA_BT_EwGw },
|
| 631 |
|
|
/* 0F A4 /w */ { BxImmediate_Ib, BX_IA_SHLD_EwGwIb },
|
| 632 |
|
|
/* 0F A5 /w */ { 0, BX_IA_SHLD_EwGw },
|
| 633 |
|
|
/* 0F A6 /w */ { 0, BX_IA_ERROR }, // CMPXCHG_XBTS not implemented
|
| 634 |
|
|
/* 0F A7 /w */ { 0, BX_IA_ERROR }, // CMPXCHG_IBTS not implemented
|
| 635 |
|
|
/* 0F A8 /w */ { 0, BX_IA_PUSH16_GS },
|
| 636 |
|
|
/* 0F A9 /w */ { 0, BX_IA_POP16_GS },
|
| 637 |
|
|
/* 0F AA /w */ { 0, BX_IA_ERROR },//AO{ BxTraceEnd, BX_IA_RSM },
|
| 638 |
|
|
/* 0F AB /w */ { BxLockable, BX_IA_BTS_EwGw },
|
| 639 |
|
|
/* 0F AC /w */ { BxImmediate_Ib, BX_IA_SHRD_EwGwIb },
|
| 640 |
|
|
/* 0F AD /w */ { 0, BX_IA_SHRD_EwGw },
|
| 641 |
|
|
/* 0F AE /w */ { BxGroup15, BX_IA_ERROR, BxOpcodeInfoG15 },
|
| 642 |
|
|
/* 0F AF /w */ { 0, BX_IA_IMUL_GwEw },
|
| 643 |
|
|
/* 0F B0 /w */ { BxLockable, BX_IA_CMPXCHG_EbGb },
|
| 644 |
|
|
/* 0F B1 /w */ { BxLockable, BX_IA_CMPXCHG_EwGw },
|
| 645 |
|
|
/* 0F B2 /w */ { 0, BX_IA_LSS_GwMp },
|
| 646 |
|
|
/* 0F B3 /w */ { BxLockable, BX_IA_BTR_EwGw },
|
| 647 |
|
|
/* 0F B4 /w */ { 0, BX_IA_LFS_GwMp },
|
| 648 |
|
|
/* 0F B5 /w */ { 0, BX_IA_LGS_GwMp },
|
| 649 |
|
|
/* 0F B6 /w */ { 0, BX_IA_MOVZX_GwEb },
|
| 650 |
|
|
/* 0F B7 /w */ { 0, BX_IA_MOV_GwEw }, // MOVZX_GwEw
|
| 651 |
|
|
/* 0F B8 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSEF3, BX_IA_POPCNT_GwEw },
|
| 652 |
|
|
/* 0F B9 /w */ { 0, BX_IA_ERROR },//AO{ BxTraceEnd, BX_IA_UD2B },
|
| 653 |
|
|
/* 0F BA /w */ { BxGroup8, BX_IA_ERROR, BxOpcodeInfoG8EwIb },
|
| 654 |
|
|
/* 0F BB /w */ { BxLockable, BX_IA_BTC_EwGw },
|
| 655 |
|
|
/* 0F BC /w */ { 0, BX_IA_BSF_GwEw },//AO{ BxPrefixSSE, BX_IA_BSF_GwEw, BxOpcodeGroupSSE_TZCNT16 },
|
| 656 |
|
|
/* 0F BD /w */ { 0, BX_IA_BSR_GwEw },//AO{ BxPrefixSSE, BX_IA_BSR_GwEw, BxOpcodeGroupSSE_LZCNT16 },
|
| 657 |
|
|
/* 0F BE /w */ { 0, BX_IA_MOVSX_GwEb },
|
| 658 |
|
|
/* 0F BF /w */ { 0, BX_IA_MOV_GwEw }, // MOVSX_GwEw
|
| 659 |
|
|
/* 0F C0 /w */ { BxLockable, BX_IA_XADD_EbGb },
|
| 660 |
|
|
/* 0F C1 /w */ { BxLockable, BX_IA_XADD_EwGw },
|
| 661 |
|
|
/* 0F C2 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE | BxImmediate_Ib, BX_IA_CMPPS_VpsWpsIb, BxOpcodeGroupSSE_0fc2 },
|
| 662 |
|
|
/* 0F C3 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MOVNTI32_MdGd, BxOpcodeGroupSSE_ERR },
|
| 663 |
|
|
/* 0F C4 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE | BxImmediate_Ib, BX_IA_PINSRW_PqEwIb, BxOpcodeGroupSSE_0fc4 },
|
| 664 |
|
|
/* 0F C5 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE | BxImmediate_Ib, BX_IA_PEXTRW_GdPqIb, BxOpcodeGroupSSE_0fc5R },
|
| 665 |
|
|
/* 0F C6 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE | BxImmediate_Ib, BX_IA_SHUFPS_VpsWpsIb, BxOpcodeGroupSSE_0fc6 },
|
| 666 |
|
|
/* 0F C7 /w */ { BxGroup9, BX_IA_ERROR, BxOpcodeInfoG9w },
|
| 667 |
|
|
/* 0F C8 /w */ { 0, BX_IA_BSWAP_RX },
|
| 668 |
|
|
/* 0F C9 /w */ { 0, BX_IA_BSWAP_RX },
|
| 669 |
|
|
/* 0F CA /w */ { 0, BX_IA_BSWAP_RX },
|
| 670 |
|
|
/* 0F CB /w */ { 0, BX_IA_BSWAP_RX },
|
| 671 |
|
|
/* 0F CC /w */ { 0, BX_IA_BSWAP_RX },
|
| 672 |
|
|
/* 0F CD /w */ { 0, BX_IA_BSWAP_RX },
|
| 673 |
|
|
/* 0F CE /w */ { 0, BX_IA_BSWAP_RX },
|
| 674 |
|
|
/* 0F CF /w */ { 0, BX_IA_BSWAP_RX },
|
| 675 |
|
|
/* 0F D0 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_ERROR, BxOpcodeGroupSSE_0fd0 },
|
| 676 |
|
|
/* 0F D1 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PSRLW_PqQq, BxOpcodeGroupSSE_0fd1 },
|
| 677 |
|
|
/* 0F D2 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PSRLD_PqQq, BxOpcodeGroupSSE_0fd2 },
|
| 678 |
|
|
/* 0F D3 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PSRLQ_PqQq, BxOpcodeGroupSSE_0fd3 },
|
| 679 |
|
|
/* 0F D4 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PADDQ_PqQq, BxOpcodeGroupSSE_0fd4 },
|
| 680 |
|
|
/* 0F D5 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PMULLW_PqQq, BxOpcodeGroupSSE_0fd5 },
|
| 681 |
|
|
/* 0F D6 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_ERROR, BxOpcodeGroupSSE_0fd6 },
|
| 682 |
|
|
/* 0F D7 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PMOVMSKB_GdPRq, BxOpcodeGroupSSE_0fd7R },
|
| 683 |
|
|
/* 0F D8 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PSUBUSB_PqQq, BxOpcodeGroupSSE_0fd8 },
|
| 684 |
|
|
/* 0F D9 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PSUBUSW_PqQq, BxOpcodeGroupSSE_0fd9 },
|
| 685 |
|
|
/* 0F DA /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PMINUB_PqQq, BxOpcodeGroupSSE_0fda },
|
| 686 |
|
|
/* 0F DB /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PAND_PqQq, BxOpcodeGroupSSE_0fdb },
|
| 687 |
|
|
/* 0F DC /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PADDUSB_PqQq, BxOpcodeGroupSSE_0fdc },
|
| 688 |
|
|
/* 0F DD /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PADDUSW_PqQq, BxOpcodeGroupSSE_0fdd },
|
| 689 |
|
|
/* 0F DE /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PMAXUB_PqQq, BxOpcodeGroupSSE_0fde },
|
| 690 |
|
|
/* 0F DF /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PANDN_PqQq, BxOpcodeGroupSSE_0fdf },
|
| 691 |
|
|
/* 0F E0 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PAVGB_PqQq, BxOpcodeGroupSSE_0fe0 },
|
| 692 |
|
|
/* 0F E1 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PSRAW_PqQq, BxOpcodeGroupSSE_0fe1 },
|
| 693 |
|
|
/* 0F E2 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PSRAD_PqQq, BxOpcodeGroupSSE_0fe2 },
|
| 694 |
|
|
/* 0F E3 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PAVGW_PqQq, BxOpcodeGroupSSE_0fe3 },
|
| 695 |
|
|
/* 0F E4 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PMULHUW_PqQq, BxOpcodeGroupSSE_0fe4 },
|
| 696 |
|
|
/* 0F E5 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PMULHW_PqQq, BxOpcodeGroupSSE_0fe5 },
|
| 697 |
|
|
/* 0F E6 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_ERROR, BxOpcodeGroupSSE_0fe6 },
|
| 698 |
|
|
/* 0F E7 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MOVNTQ_MqPq, BxOpcodeGroupSSE_0fe7M },
|
| 699 |
|
|
/* 0F E8 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PSUBSB_PqQq, BxOpcodeGroupSSE_0fe8 },
|
| 700 |
|
|
/* 0F E9 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PSUBSW_PqQq, BxOpcodeGroupSSE_0fe9 },
|
| 701 |
|
|
/* 0F EA /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PMINSW_PqQq, BxOpcodeGroupSSE_0fea },
|
| 702 |
|
|
/* 0F EB /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_POR_PqQq, BxOpcodeGroupSSE_0feb },
|
| 703 |
|
|
/* 0F EC /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PADDSB_PqQq, BxOpcodeGroupSSE_0fec },
|
| 704 |
|
|
/* 0F ED /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PADDSW_PqQq, BxOpcodeGroupSSE_0fed },
|
| 705 |
|
|
/* 0F EE /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PMAXSW_PqQq, BxOpcodeGroupSSE_0fee },
|
| 706 |
|
|
/* 0F EF /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PXOR_PqQq, BxOpcodeGroupSSE_0fef },
|
| 707 |
|
|
/* 0F F0 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSEF2, BX_IA_LDDQU_VdqMdq },
|
| 708 |
|
|
/* 0F F1 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PSLLW_PqQq, BxOpcodeGroupSSE_0ff1 },
|
| 709 |
|
|
/* 0F F2 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PSLLD_PqQq, BxOpcodeGroupSSE_0ff2 },
|
| 710 |
|
|
/* 0F F3 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PSLLQ_PqQq, BxOpcodeGroupSSE_0ff3 },
|
| 711 |
|
|
/* 0F F4 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PMULUDQ_PqQq, BxOpcodeGroupSSE_0ff4 },
|
| 712 |
|
|
/* 0F F5 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PMADDWD_PqQq, BxOpcodeGroupSSE_0ff5 },
|
| 713 |
|
|
/* 0F F6 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PSADBW_PqQq, BxOpcodeGroupSSE_0ff6 },
|
| 714 |
|
|
/* 0F F7 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MASKMOVQ_PqPRq, BxOpcodeGroupSSE_0ff7R },
|
| 715 |
|
|
/* 0F F8 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PSUBB_PqQq, BxOpcodeGroupSSE_0ff8 },
|
| 716 |
|
|
/* 0F F9 /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PSUBW_PqQq, BxOpcodeGroupSSE_0ff9 },
|
| 717 |
|
|
/* 0F FA /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PSUBD_PqQq, BxOpcodeGroupSSE_0ffa },
|
| 718 |
|
|
/* 0F FB /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PSUBQ_PqQq, BxOpcodeGroupSSE_0ffb },
|
| 719 |
|
|
/* 0F FC /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PADDB_PqQq, BxOpcodeGroupSSE_0ffc },
|
| 720 |
|
|
/* 0F FD /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PADDW_PqQq, BxOpcodeGroupSSE_0ffd },
|
| 721 |
|
|
/* 0F FE /w */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PADDD_PqQq, BxOpcodeGroupSSE_0ffe },
|
| 722 |
|
|
/* 0F FF /w */ { 0, BX_IA_ERROR },
|
| 723 |
|
|
|
| 724 |
|
|
// 512 entries for 32bit mode
|
| 725 |
|
|
/* 00 /d */ { BxLockable, BX_IA_ADD_EbGb },
|
| 726 |
|
|
/* 01 /d */ { BxLockable, BX_IA_ADD_EdGd },
|
| 727 |
|
|
/* 02 /d */ { 0, BX_IA_ADD_GbEb },
|
| 728 |
|
|
/* 03 /d */ { 0, BX_IA_ADD_GdEd },
|
| 729 |
|
|
/* 04 /d */ { BxImmediate_Ib, BX_IA_ADD_ALIb },
|
| 730 |
|
|
/* 05 /d */ { BxImmediate_Id, BX_IA_ADD_EAXId },
|
| 731 |
|
|
/* 06 /d */ { 0, BX_IA_PUSH32_ES },
|
| 732 |
|
|
/* 07 /d */ { 0, BX_IA_POP32_ES },
|
| 733 |
|
|
/* 08 /d */ { BxLockable, BX_IA_OR_EbGb },
|
| 734 |
|
|
/* 09 /d */ { BxLockable, BX_IA_OR_EdGd },
|
| 735 |
|
|
/* 0A /d */ { 0, BX_IA_OR_GbEb },
|
| 736 |
|
|
/* 0B /d */ { 0, BX_IA_OR_GdEd },
|
| 737 |
|
|
/* 0C /d */ { BxImmediate_Ib, BX_IA_OR_ALIb },
|
| 738 |
|
|
/* 0D /d */ { BxImmediate_Id, BX_IA_OR_EAXId },
|
| 739 |
|
|
/* 0E /d */ { 0, BX_IA_PUSH32_CS },
|
| 740 |
|
|
/* 0F /d */ { 0, BX_IA_ERROR }, // 2-byte escape
|
| 741 |
|
|
/* 10 /d */ { BxLockable, BX_IA_ADC_EbGb },
|
| 742 |
|
|
/* 11 /d */ { BxLockable, BX_IA_ADC_EdGd },
|
| 743 |
|
|
/* 12 /d */ { 0, BX_IA_ADC_GbEb },
|
| 744 |
|
|
/* 13 /d */ { 0, BX_IA_ADC_GdEd },
|
| 745 |
|
|
/* 14 /d */ { BxImmediate_Ib, BX_IA_ADC_ALIb },
|
| 746 |
|
|
/* 15 /d */ { BxImmediate_Id, BX_IA_ADC_EAXId },
|
| 747 |
|
|
/* 16 /d */ { 0, BX_IA_PUSH32_SS },
|
| 748 |
|
|
/* 17 /d */ { 0, BX_IA_POP32_SS },
|
| 749 |
|
|
/* 18 /d */ { BxLockable, BX_IA_SBB_EbGb },
|
| 750 |
|
|
/* 19 /d */ { BxLockable, BX_IA_SBB_EdGd },
|
| 751 |
|
|
/* 1A /d */ { 0, BX_IA_SBB_GbEb },
|
| 752 |
|
|
/* 1B /d */ { 0, BX_IA_SBB_GdEd },
|
| 753 |
|
|
/* 1C /d */ { BxImmediate_Ib, BX_IA_SBB_ALIb },
|
| 754 |
|
|
/* 1D /d */ { BxImmediate_Id, BX_IA_SBB_EAXId },
|
| 755 |
|
|
/* 1E /d */ { 0, BX_IA_PUSH32_DS },
|
| 756 |
|
|
/* 1F /d */ { 0, BX_IA_POP32_DS },
|
| 757 |
|
|
/* 20 /d */ { BxLockable, BX_IA_AND_EbGb },
|
| 758 |
|
|
/* 21 /d */ { BxLockable, BX_IA_AND_EdGd },
|
| 759 |
|
|
/* 22 /d */ { 0, BX_IA_AND_GbEb },
|
| 760 |
|
|
/* 23 /d */ { 0, BX_IA_AND_GdEd },
|
| 761 |
|
|
/* 24 /d */ { BxImmediate_Ib, BX_IA_AND_ALIb },
|
| 762 |
|
|
/* 25 /d */ { BxImmediate_Id, BX_IA_AND_EAXId },
|
| 763 |
|
|
/* 26 /d */ { 0, BX_IA_ERROR }, // ES:
|
| 764 |
|
|
/* 27 /d */ { 0, BX_IA_DAA },
|
| 765 |
|
|
/* 28 /d */ { BxLockable, BX_IA_SUB_EbGb },
|
| 766 |
|
|
/* 29 /d */ { BxLockable, BX_IA_SUB_EdGd },
|
| 767 |
|
|
/* 2A /d */ { 0, BX_IA_SUB_GbEb },
|
| 768 |
|
|
/* 2B /d */ { 0, BX_IA_SUB_GdEd },
|
| 769 |
|
|
/* 2C /d */ { BxImmediate_Ib, BX_IA_SUB_ALIb },
|
| 770 |
|
|
/* 2D /d */ { BxImmediate_Id, BX_IA_SUB_EAXId },
|
| 771 |
|
|
/* 2E /d */ { 0, BX_IA_ERROR }, // CS:
|
| 772 |
|
|
/* 2F /d */ { 0, BX_IA_DAS },
|
| 773 |
|
|
/* 30 /d */ { BxLockable, BX_IA_XOR_EbGb },
|
| 774 |
|
|
/* 31 /d */ { BxLockable, BX_IA_XOR_EdGd },
|
| 775 |
|
|
/* 32 /d */ { 0, BX_IA_XOR_GbEb },
|
| 776 |
|
|
/* 33 /d */ { 0, BX_IA_XOR_GdEd },
|
| 777 |
|
|
/* 34 /d */ { BxImmediate_Ib, BX_IA_XOR_ALIb },
|
| 778 |
|
|
/* 35 /d */ { BxImmediate_Id, BX_IA_XOR_EAXId },
|
| 779 |
|
|
/* 36 /d */ { 0, BX_IA_ERROR }, // SS:
|
| 780 |
|
|
/* 37 /d */ { 0, BX_IA_AAA },
|
| 781 |
|
|
/* 38 /d */ { 0, BX_IA_CMP_EbGb },
|
| 782 |
|
|
/* 39 /d */ { 0, BX_IA_CMP_EdGd },
|
| 783 |
|
|
/* 3A /d */ { 0, BX_IA_CMP_GbEb },
|
| 784 |
|
|
/* 3B /d */ { 0, BX_IA_CMP_GdEd },
|
| 785 |
|
|
/* 3C /d */ { BxImmediate_Ib, BX_IA_CMP_ALIb },
|
| 786 |
|
|
/* 3D /d */ { BxImmediate_Id, BX_IA_CMP_EAXId },
|
| 787 |
|
|
/* 3E /d */ { 0, BX_IA_ERROR }, // DS:
|
| 788 |
|
|
/* 3F /d */ { 0, BX_IA_AAS },
|
| 789 |
|
|
/* 40 /d */ { 0, BX_IA_INC_ERX },
|
| 790 |
|
|
/* 41 /d */ { 0, BX_IA_INC_ERX },
|
| 791 |
|
|
/* 42 /d */ { 0, BX_IA_INC_ERX },
|
| 792 |
|
|
/* 43 /d */ { 0, BX_IA_INC_ERX },
|
| 793 |
|
|
/* 44 /d */ { 0, BX_IA_INC_ERX },
|
| 794 |
|
|
/* 45 /d */ { 0, BX_IA_INC_ERX },
|
| 795 |
|
|
/* 46 /d */ { 0, BX_IA_INC_ERX },
|
| 796 |
|
|
/* 47 /d */ { 0, BX_IA_INC_ERX },
|
| 797 |
|
|
/* 48 /d */ { 0, BX_IA_DEC_ERX },
|
| 798 |
|
|
/* 49 /d */ { 0, BX_IA_DEC_ERX },
|
| 799 |
|
|
/* 4A /d */ { 0, BX_IA_DEC_ERX },
|
| 800 |
|
|
/* 4B /d */ { 0, BX_IA_DEC_ERX },
|
| 801 |
|
|
/* 4C /d */ { 0, BX_IA_DEC_ERX },
|
| 802 |
|
|
/* 4D /d */ { 0, BX_IA_DEC_ERX },
|
| 803 |
|
|
/* 4E /d */ { 0, BX_IA_DEC_ERX },
|
| 804 |
|
|
/* 4F /d */ { 0, BX_IA_DEC_ERX },
|
| 805 |
|
|
/* 50 /d */ { 0, BX_IA_PUSH_ERX },
|
| 806 |
|
|
/* 51 /d */ { 0, BX_IA_PUSH_ERX },
|
| 807 |
|
|
/* 52 /d */ { 0, BX_IA_PUSH_ERX },
|
| 808 |
|
|
/* 53 /d */ { 0, BX_IA_PUSH_ERX },
|
| 809 |
|
|
/* 54 /d */ { 0, BX_IA_PUSH_ERX },
|
| 810 |
|
|
/* 55 /d */ { 0, BX_IA_PUSH_ERX },
|
| 811 |
|
|
/* 56 /d */ { 0, BX_IA_PUSH_ERX },
|
| 812 |
|
|
/* 57 /d */ { 0, BX_IA_PUSH_ERX },
|
| 813 |
|
|
/* 58 /d */ { 0, BX_IA_POP_ERX },
|
| 814 |
|
|
/* 59 /d */ { 0, BX_IA_POP_ERX },
|
| 815 |
|
|
/* 5A /d */ { 0, BX_IA_POP_ERX },
|
| 816 |
|
|
/* 5B /d */ { 0, BX_IA_POP_ERX },
|
| 817 |
|
|
/* 5C /d */ { 0, BX_IA_POP_ERX },
|
| 818 |
|
|
/* 5D /d */ { 0, BX_IA_POP_ERX },
|
| 819 |
|
|
/* 5E /d */ { 0, BX_IA_POP_ERX },
|
| 820 |
|
|
/* 5F /d */ { 0, BX_IA_POP_ERX },
|
| 821 |
|
|
/* 60 /d */ { 0, BX_IA_PUSHAD32 },
|
| 822 |
|
|
/* 61 /d */ { 0, BX_IA_POPAD32 },
|
| 823 |
|
|
/* 62 /d */ { 0, BX_IA_BOUND_GdMa },
|
| 824 |
|
|
/* 63 /d */ { 0, BX_IA_ARPL_EwGw },
|
| 825 |
|
|
/* 64 /d */ { 0, BX_IA_ERROR }, // FS:
|
| 826 |
|
|
/* 65 /d */ { 0, BX_IA_ERROR }, // GS:
|
| 827 |
|
|
/* 66 /d */ { 0, BX_IA_ERROR }, // OS:
|
| 828 |
|
|
/* 67 /d */ { 0, BX_IA_ERROR }, // AS:
|
| 829 |
|
|
/* 68 /d */ { BxImmediate_Id, BX_IA_PUSH_Id },
|
| 830 |
|
|
/* 69 /d */ { BxImmediate_Id, BX_IA_IMUL_GdEdId },
|
| 831 |
|
|
/* 6A /d */ { BxImmediate_Ib_SE, BX_IA_PUSH_Id },
|
| 832 |
|
|
/* 6B /d */ { BxImmediate_Ib_SE, BX_IA_IMUL_GdEdId },
|
| 833 |
|
|
/* 6C /d */ { BxRepeatable, BX_IA_REP_INSB_YbDX },
|
| 834 |
|
|
/* 6D /d */ { BxRepeatable, BX_IA_REP_INSD_YdDX },
|
| 835 |
|
|
/* 6E /d */ { BxRepeatable, BX_IA_REP_OUTSB_DXXb },
|
| 836 |
|
|
/* 6F /d */ { BxRepeatable, BX_IA_REP_OUTSD_DXXd },
|
| 837 |
|
|
/* 70 /d */ { BxImmediate_BrOff8 | BxTraceJCC, BX_IA_JO_Jd },
|
| 838 |
|
|
/* 71 /d */ { BxImmediate_BrOff8 | BxTraceJCC, BX_IA_JNO_Jd },
|
| 839 |
|
|
/* 72 /d */ { BxImmediate_BrOff8 | BxTraceJCC, BX_IA_JB_Jd },
|
| 840 |
|
|
/* 73 /d */ { BxImmediate_BrOff8 | BxTraceJCC, BX_IA_JNB_Jd },
|
| 841 |
|
|
/* 74 /d */ { BxImmediate_BrOff8 | BxTraceJCC, BX_IA_JZ_Jd },
|
| 842 |
|
|
/* 75 /d */ { BxImmediate_BrOff8 | BxTraceJCC, BX_IA_JNZ_Jd },
|
| 843 |
|
|
/* 76 /d */ { BxImmediate_BrOff8 | BxTraceJCC, BX_IA_JBE_Jd },
|
| 844 |
|
|
/* 77 /d */ { BxImmediate_BrOff8 | BxTraceJCC, BX_IA_JNBE_Jd },
|
| 845 |
|
|
/* 78 /d */ { BxImmediate_BrOff8 | BxTraceJCC, BX_IA_JS_Jd },
|
| 846 |
|
|
/* 79 /d */ { BxImmediate_BrOff8 | BxTraceJCC, BX_IA_JNS_Jd },
|
| 847 |
|
|
/* 7A /d */ { BxImmediate_BrOff8 | BxTraceJCC, BX_IA_JP_Jd },
|
| 848 |
|
|
/* 7B /d */ { BxImmediate_BrOff8 | BxTraceJCC, BX_IA_JNP_Jd },
|
| 849 |
|
|
/* 7C /d */ { BxImmediate_BrOff8 | BxTraceJCC, BX_IA_JL_Jd },
|
| 850 |
|
|
/* 7D /d */ { BxImmediate_BrOff8 | BxTraceJCC, BX_IA_JNL_Jd },
|
| 851 |
|
|
/* 7E /d */ { BxImmediate_BrOff8 | BxTraceJCC, BX_IA_JLE_Jd },
|
| 852 |
|
|
/* 7F /d */ { BxImmediate_BrOff8 | BxTraceJCC, BX_IA_JNLE_Jd },
|
| 853 |
|
|
/* 80 /d */ { BxGroup1 | BxImmediate_Ib, BX_IA_ERROR, BxOpcodeInfoG1EbIb },
|
| 854 |
|
|
/* 81 /d */ { BxGroup1 | BxImmediate_Id, BX_IA_ERROR, BxOpcodeInfoG1Ed },
|
| 855 |
|
|
/* 82 /d */ { BxGroup1 | BxImmediate_Ib, BX_IA_ERROR, BxOpcodeInfoG1EbIb },
|
| 856 |
|
|
/* 83 /d */ { BxGroup1 | BxImmediate_Ib_SE, BX_IA_ERROR, BxOpcodeInfoG1Ed },
|
| 857 |
|
|
/* 84 /d */ { 0, BX_IA_TEST_EbGb },
|
| 858 |
|
|
/* 85 /d */ { 0, BX_IA_TEST_EdGd },
|
| 859 |
|
|
/* 86 /d */ { BxLockable, BX_IA_XCHG_EbGb },
|
| 860 |
|
|
/* 87 /d */ { BxLockable, BX_IA_XCHG_EdGd },
|
| 861 |
|
|
/* 88 /d */ { 0, BX_IA_MOV_EbGb },
|
| 862 |
|
|
/* 89 /d */ { 0, BX_IA_MOV32_EdGd },
|
| 863 |
|
|
/* 8A /d */ { 0, BX_IA_MOV_GbEb },
|
| 864 |
|
|
/* 8B /d */ { 0, BX_IA_MOV32_GdEd },
|
| 865 |
|
|
/* 8C /d */ { 0, BX_IA_MOV_EwSw },
|
| 866 |
|
|
/* 8D /d */ { 0, BX_IA_LEA_GdM },
|
| 867 |
|
|
/* 8E /d */ { 0, BX_IA_MOV_SwEw },
|
| 868 |
|
|
/* 8F /d */ { BxGroup1A, BX_IA_ERROR, BxOpcodeInfoG1AEd },
|
| 869 |
|
|
/* 90 /d */ { 0, BX_IA_NOP },//AO{ BxPrefixSSE, BX_IA_NOP, BxOpcodeGroupSSE_PAUSE },
|
| 870 |
|
|
/* 91 /d */ { 0, BX_IA_XCHG_ERXEAX },
|
| 871 |
|
|
/* 92 /d */ { 0, BX_IA_XCHG_ERXEAX },
|
| 872 |
|
|
/* 93 /d */ { 0, BX_IA_XCHG_ERXEAX },
|
| 873 |
|
|
/* 94 /d */ { 0, BX_IA_XCHG_ERXEAX },
|
| 874 |
|
|
/* 95 /d */ { 0, BX_IA_XCHG_ERXEAX },
|
| 875 |
|
|
/* 96 /d */ { 0, BX_IA_XCHG_ERXEAX },
|
| 876 |
|
|
/* 97 /d */ { 0, BX_IA_XCHG_ERXEAX },
|
| 877 |
|
|
/* 98 /d */ { 0, BX_IA_CWDE },
|
| 878 |
|
|
/* 99 /d */ { 0, BX_IA_CDQ },
|
| 879 |
|
|
/* 9A /d */ { BxImmediate_Id | BxImmediate_Iw2 | BxTraceEnd, BX_IA_CALL32_Ap },
|
| 880 |
|
|
/* 9B /d */ { 0, BX_IA_FWAIT },
|
| 881 |
|
|
/* 9C /d */ { 0, BX_IA_PUSHF_Fd },
|
| 882 |
|
|
/* 9D /d */ { BxTraceEnd, BX_IA_POPF_Fd },
|
| 883 |
|
|
/* 9E /d */ { 0, BX_IA_SAHF },
|
| 884 |
|
|
/* 9F /d */ { 0, BX_IA_LAHF },
|
| 885 |
|
|
/* A0 /d */ { BxImmediate_O, BX_IA_MOV_ALOd },
|
| 886 |
|
|
/* A1 /d */ { BxImmediate_O, BX_IA_MOV_EAXOd },
|
| 887 |
|
|
/* A2 /d */ { BxImmediate_O, BX_IA_MOV_OdAL },
|
| 888 |
|
|
/* A3 /d */ { BxImmediate_O, BX_IA_MOV_OdEAX },
|
| 889 |
|
|
/* A4 /d */ { BxRepeatable, BX_IA_REP_MOVSB_XbYb },
|
| 890 |
|
|
/* A5 /d */ { BxRepeatable, BX_IA_REP_MOVSD_XdYd },
|
| 891 |
|
|
/* A6 /d */ { BxRepeatable, BX_IA_REP_CMPSB_XbYb },
|
| 892 |
|
|
/* A7 /d */ { BxRepeatable, BX_IA_REP_CMPSD_XdYd },
|
| 893 |
|
|
/* A8 /d */ { BxImmediate_Ib, BX_IA_TEST_ALIb },
|
| 894 |
|
|
/* A9 /d */ { BxImmediate_Id, BX_IA_TEST_EAXId },
|
| 895 |
|
|
/* AA /d */ { BxRepeatable, BX_IA_REP_STOSB_YbAL },
|
| 896 |
|
|
/* AB /d */ { BxRepeatable, BX_IA_REP_STOSD_YdEAX },
|
| 897 |
|
|
/* AC /d */ { BxRepeatable, BX_IA_REP_LODSB_ALXb },
|
| 898 |
|
|
/* AD /d */ { BxRepeatable, BX_IA_REP_LODSD_EAXXd },
|
| 899 |
|
|
/* AE /d */ { BxRepeatable, BX_IA_REP_SCASB_ALXb },
|
| 900 |
|
|
/* AF /d */ { BxRepeatable, BX_IA_REP_SCASD_EAXXd },
|
| 901 |
|
|
/* B0 /d */ { BxImmediate_Ib, BX_IA_MOV_RLIb },
|
| 902 |
|
|
/* B1 /d */ { BxImmediate_Ib, BX_IA_MOV_RLIb },
|
| 903 |
|
|
/* B2 /d */ { BxImmediate_Ib, BX_IA_MOV_RLIb },
|
| 904 |
|
|
/* B3 /d */ { BxImmediate_Ib, BX_IA_MOV_RLIb },
|
| 905 |
|
|
/* B4 /d */ { BxImmediate_Ib, BX_IA_MOV_RHIb },
|
| 906 |
|
|
/* B5 /d */ { BxImmediate_Ib, BX_IA_MOV_RHIb },
|
| 907 |
|
|
/* B6 /d */ { BxImmediate_Ib, BX_IA_MOV_RHIb },
|
| 908 |
|
|
/* B7 /d */ { BxImmediate_Ib, BX_IA_MOV_RHIb },
|
| 909 |
|
|
/* B8 /d */ { BxImmediate_Id, BX_IA_MOV_ERXId },
|
| 910 |
|
|
/* B9 /d */ { BxImmediate_Id, BX_IA_MOV_ERXId },
|
| 911 |
|
|
/* BA /d */ { BxImmediate_Id, BX_IA_MOV_ERXId },
|
| 912 |
|
|
/* BB /d */ { BxImmediate_Id, BX_IA_MOV_ERXId },
|
| 913 |
|
|
/* BC /d */ { BxImmediate_Id, BX_IA_MOV_ERXId },
|
| 914 |
|
|
/* BD /d */ { BxImmediate_Id, BX_IA_MOV_ERXId },
|
| 915 |
|
|
/* BE /d */ { BxImmediate_Id, BX_IA_MOV_ERXId },
|
| 916 |
|
|
/* BF /d */ { BxImmediate_Id, BX_IA_MOV_ERXId },
|
| 917 |
|
|
/* C0 /d */ { BxGroup2 | BxImmediate_Ib, BX_IA_ERROR, BxOpcodeInfoG2EbIb },
|
| 918 |
|
|
/* C1 /d */ { BxGroup2 | BxImmediate_Ib, BX_IA_ERROR, BxOpcodeInfoG2EdIb },
|
| 919 |
|
|
/* C2 /d */ { BxImmediate_Iw | BxTraceEnd, BX_IA_RETnear32_Iw },
|
| 920 |
|
|
/* C3 /d */ { BxTraceEnd, BX_IA_RETnear32 },
|
| 921 |
|
|
/* C4 /d */ { BxPrefixVEX, BX_IA_LES_GdMp },
|
| 922 |
|
|
/* C5 /d */ { BxPrefixVEX, BX_IA_LDS_GdMp },
|
| 923 |
|
|
/* C6 /d */ { BxGroup11, BX_IA_ERROR, BxOpcodeInfoG11Eb },
|
| 924 |
|
|
/* C7 /d */ { BxGroup11, BX_IA_ERROR, BxOpcodeInfoG11Ed },
|
| 925 |
|
|
/* C8 /d */ { BxImmediate_Iw | BxImmediate_Ib2, BX_IA_ENTER32_IwIb },
|
| 926 |
|
|
/* C9 /d */ { 0, BX_IA_LEAVE32 },
|
| 927 |
|
|
/* CA /d */ { BxImmediate_Iw | BxTraceEnd, BX_IA_RETfar32_Iw },
|
| 928 |
|
|
/* CB /d */ { BxTraceEnd, BX_IA_RETfar32 },
|
| 929 |
|
|
/* CC /d */ { BxTraceEnd, BX_IA_INT3 },
|
| 930 |
|
|
/* CD /d */ { BxImmediate_Ib | BxTraceEnd, BX_IA_INT_Ib },
|
| 931 |
|
|
/* CE /d */ { BxTraceEnd, BX_IA_INTO },
|
| 932 |
|
|
/* CF /d */ { BxTraceEnd, BX_IA_IRET32 },
|
| 933 |
|
|
/* D0 /d */ { BxGroup2 | BxImmediate_I1, BX_IA_ERROR, BxOpcodeInfoG2EbIb },
|
| 934 |
|
|
/* D1 /d */ { BxGroup2 | BxImmediate_I1, BX_IA_ERROR, BxOpcodeInfoG2EdIb },
|
| 935 |
|
|
/* D2 /d */ { BxGroup2, BX_IA_ERROR, BxOpcodeInfoG2Eb },
|
| 936 |
|
|
/* D3 /d */ { BxGroup2, BX_IA_ERROR, BxOpcodeInfoG2Ed },
|
| 937 |
|
|
/* D4 /d */ { BxImmediate_Ib, BX_IA_AAM },
|
| 938 |
|
|
/* D5 /d */ { BxImmediate_Ib, BX_IA_AAD },
|
| 939 |
|
|
/* D6 /d */ { 0, BX_IA_SALC },
|
| 940 |
|
|
/* D7 /d */ { 0, BX_IA_XLAT },
|
| 941 |
|
|
#if BX_SUPPORT_FPU
|
| 942 |
|
|
/* D8 /d */ { BxGroupFP, BX_IA_ERROR, BxOpcodeInfo_FPGroupD8 },
|
| 943 |
|
|
/* D9 /d */ { BxFPEscape, BX_IA_ERROR, BxOpcodeInfo_FloatingPointD9 },
|
| 944 |
|
|
/* DA /d */ { BxFPEscape, BX_IA_ERROR, BxOpcodeInfo_FloatingPointDA },
|
| 945 |
|
|
/* DB /d */ { BxFPEscape, BX_IA_ERROR, BxOpcodeInfo_FloatingPointDB },
|
| 946 |
|
|
/* DC /d */ { BxGroupFP, BX_IA_ERROR, BxOpcodeInfo_FPGroupDC },
|
| 947 |
|
|
/* DD /d */ { BxGroupFP, BX_IA_ERROR, BxOpcodeInfo_FPGroupDD },
|
| 948 |
|
|
/* DE /d */ { BxFPEscape, BX_IA_ERROR, BxOpcodeInfo_FloatingPointDE },
|
| 949 |
|
|
/* DF /d */ { BxFPEscape, BX_IA_ERROR, BxOpcodeInfo_FloatingPointDF },
|
| 950 |
|
|
#else
|
| 951 |
|
|
/* D8 /d */ { 0, BX_IA_FPU_ESC },
|
| 952 |
|
|
/* D9 /d */ { 0, BX_IA_FPU_ESC },
|
| 953 |
|
|
/* DA /d */ { 0, BX_IA_FPU_ESC },
|
| 954 |
|
|
/* DB /d */ { 0, BX_IA_FPU_ESC },
|
| 955 |
|
|
/* DC /d */ { 0, BX_IA_FPU_ESC },
|
| 956 |
|
|
/* DD /d */ { 0, BX_IA_FPU_ESC },
|
| 957 |
|
|
/* DE /d */ { 0, BX_IA_FPU_ESC },
|
| 958 |
|
|
/* DF /d */ { 0, BX_IA_FPU_ESC },
|
| 959 |
|
|
#endif
|
| 960 |
|
|
/* E0 /d */ { BxImmediate_BrOff8 | BxTraceEnd, BX_IA_LOOPNE32_Jb },
|
| 961 |
|
|
/* E1 /d */ { BxImmediate_BrOff8 | BxTraceEnd, BX_IA_LOOPE32_Jb },
|
| 962 |
|
|
/* E2 /d */ { BxImmediate_BrOff8 | BxTraceEnd, BX_IA_LOOP32_Jb },
|
| 963 |
|
|
/* E3 /d */ { BxImmediate_BrOff8 | BxTraceEnd, BX_IA_JECXZ_Jb },
|
| 964 |
|
|
/* E4 /d */ { BxImmediate_Ib, BX_IA_IN_ALIb },
|
| 965 |
|
|
/* E5 /d */ { BxImmediate_Ib, BX_IA_IN_EAXIb },
|
| 966 |
|
|
/* E6 /d */ { BxImmediate_Ib, BX_IA_OUT_IbAL },
|
| 967 |
|
|
/* E7 /d */ { BxImmediate_Ib, BX_IA_OUT_IbEAX },
|
| 968 |
|
|
/* E8 /d */ { BxImmediate_BrOff32 | BxTraceEnd, BX_IA_CALL_Jd },
|
| 969 |
|
|
/* E9 /d */ { BxImmediate_BrOff32 | BxTraceEnd, BX_IA_JMP_Jd },
|
| 970 |
|
|
/* EA /d */ { BxImmediate_Id | BxImmediate_Iw2 | BxTraceEnd, BX_IA_JMP_Ap },
|
| 971 |
|
|
/* EB /d */ { BxImmediate_BrOff8 | BxTraceEnd, BX_IA_JMP_Jd },
|
| 972 |
|
|
/* EC /d */ { 0, BX_IA_IN_ALDX },
|
| 973 |
|
|
/* ED /d */ { 0, BX_IA_IN_EAXDX },
|
| 974 |
|
|
/* EE /d */ { 0, BX_IA_OUT_DXAL },
|
| 975 |
|
|
/* EF /d */ { 0, BX_IA_OUT_DXEAX },
|
| 976 |
|
|
/* F0 /d */ { 0, BX_IA_ERROR }, // LOCK:
|
| 977 |
|
|
/* F1 /d */ { BxTraceEnd, BX_IA_INT1 },
|
| 978 |
|
|
/* F2 /d */ { 0, BX_IA_ERROR }, // REPNE/REPNZ
|
| 979 |
|
|
/* F3 /d */ { 0, BX_IA_ERROR }, // REP,REPE/REPZ
|
| 980 |
|
|
/* F4 /d */ { BxTraceEnd, BX_IA_HLT },
|
| 981 |
|
|
/* F5 /d */ { 0, BX_IA_CMC },
|
| 982 |
|
|
/* F6 /d */ { BxGroup3, BX_IA_ERROR, BxOpcodeInfoG3Eb },
|
| 983 |
|
|
/* F7 /d */ { BxGroup3, BX_IA_ERROR, BxOpcodeInfoG3Ed },
|
| 984 |
|
|
/* F8 /d */ { 0, BX_IA_CLC },
|
| 985 |
|
|
/* F9 /d */ { 0, BX_IA_STC },
|
| 986 |
|
|
/* FA /d */ { 0, BX_IA_CLI },
|
| 987 |
|
|
/* FB /d */ { 0, BX_IA_STI },
|
| 988 |
|
|
/* FC /d */ { 0, BX_IA_CLD },
|
| 989 |
|
|
/* FD /d */ { 0, BX_IA_STD },
|
| 990 |
|
|
/* FE /d */ { BxGroup4, BX_IA_ERROR, BxOpcodeInfoG4 },
|
| 991 |
|
|
/* FF /d */ { BxGroup5, BX_IA_ERROR, BxOpcodeInfoG5d },
|
| 992 |
|
|
|
| 993 |
|
|
/* 0F 00 /d */ { BxGroup6, BX_IA_ERROR, BxOpcodeInfoG6 },
|
| 994 |
|
|
/* 0F 01 /d */ { BxGroup7, BX_IA_ERROR, BxOpcodeInfoG7 },
|
| 995 |
|
|
/* 0F 02 /d */ { 0, BX_IA_LAR_GvEw },
|
| 996 |
|
|
/* 0F 03 /d */ { 0, BX_IA_LSL_GvEw },
|
| 997 |
|
|
/* 0F 04 /d */ { 0, BX_IA_ERROR },
|
| 998 |
|
|
/* 0F 05 /d */ { 0, BX_IA_ERROR },//AO{ BxTraceEnd, BX_IA_SYSCALL_LEGACY },
|
| 999 |
|
|
/* 0F 06 /d */ { BxTraceEnd, BX_IA_CLTS },
|
| 1000 |
|
|
/* 0F 07 /d */ { 0, BX_IA_ERROR },//AO{ BxTraceEnd, BX_IA_SYSRET_LEGACY },
|
| 1001 |
|
|
/* 0F 08 /d */ { BxTraceEnd, BX_IA_INVD },
|
| 1002 |
|
|
/* 0F 09 /d */ { 0, BX_IA_WBINVD },
|
| 1003 |
|
|
/* 0F 0A /d */ { 0, BX_IA_ERROR },
|
| 1004 |
|
|
/* 0F 0B /d */ { 0, BX_IA_ERROR },//AO{ BxTraceEnd, BX_IA_UD2A },
|
| 1005 |
|
|
/* 0F 0C /d */ { 0, BX_IA_ERROR },
|
| 1006 |
|
|
/* 0F 0D /d */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_PREFETCHW }, // 3DNow! PREFETCHW on AMD, NOP on Intel
|
| 1007 |
|
|
/* 0F 0E /d */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_FEMMS }, // 3DNow! FEMMS
|
| 1008 |
|
|
/* 0F 0F /d */ { 0, BX_IA_ERROR },//AO{ BxImmediate_Ib, BX_IA_ERROR }, // 3DNow! Opcode Table
|
| 1009 |
|
|
/* 0F 10 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MOVUPS_VpsWps, BxOpcodeGroupSSE_0f10 },
|
| 1010 |
|
|
/* 0F 11 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MOVUPS_WpsVps, BxOpcodeGroupSSE_0f11 },
|
| 1011 |
|
|
/* 0F 12 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MOVLPS_VpsMq, BxOpcodeGroupSSE_0f12 },
|
| 1012 |
|
|
/* 0F 13 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MOVLPS_MqVps, BxOpcodeGroupSSE_0f13M },
|
| 1013 |
|
|
/* 0F 14 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_UNPCKLPS_VpsWdq, BxOpcodeGroupSSE_0f14 },
|
| 1014 |
|
|
/* 0F 15 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_UNPCKHPS_VpsWdq, BxOpcodeGroupSSE_0f15 },
|
| 1015 |
|
|
/* 0F 16 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MOVHPS_VpsMq, BxOpcodeGroupSSE_0f16 },
|
| 1016 |
|
|
/* 0F 17 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MOVHPS_MqVps, BxOpcodeGroupSSE_0f17M },
|
| 1017 |
|
|
#if BX_CPU_LEVEL >= 6
|
| 1018 |
|
|
/* 0F 18 /d */ { 0, BX_IA_PREFETCH }, // opcode group G16, PREFETCH hints
|
| 1019 |
|
|
/* 0F 19 /d */ { 0, BX_IA_NOP }, // multi-byte NOP
|
| 1020 |
|
|
/* 0F 1A /d */ { 0, BX_IA_NOP }, // multi-byte NOP
|
| 1021 |
|
|
/* 0F 1B /d */ { 0, BX_IA_NOP }, // multi-byte NOP
|
| 1022 |
|
|
/* 0F 1C /d */ { 0, BX_IA_NOP }, // multi-byte NOP
|
| 1023 |
|
|
/* 0F 1D /d */ { 0, BX_IA_NOP }, // multi-byte NOP
|
| 1024 |
|
|
/* 0F 1E /d */ { 0, BX_IA_NOP }, // multi-byte NOP
|
| 1025 |
|
|
/* 0F 1F /d */ { 0, BX_IA_NOP }, // multi-byte NOP
|
| 1026 |
|
|
#else
|
| 1027 |
|
|
/* 0F 18 /d */ { 0, BX_IA_ERROR },
|
| 1028 |
|
|
/* 0F 19 /d */ { 0, BX_IA_ERROR },
|
| 1029 |
|
|
/* 0F 1A /d */ { 0, BX_IA_ERROR },
|
| 1030 |
|
|
/* 0F 1B /d */ { 0, BX_IA_ERROR },
|
| 1031 |
|
|
/* 0F 1C /d */ { 0, BX_IA_ERROR },
|
| 1032 |
|
|
/* 0F 1D /d */ { 0, BX_IA_ERROR },
|
| 1033 |
|
|
/* 0F 1E /d */ { 0, BX_IA_ERROR },
|
| 1034 |
|
|
/* 0F 1F /d */ { 0, BX_IA_ERROR },
|
| 1035 |
|
|
#endif
|
| 1036 |
|
|
/* 0F 20 /d */ { BxGroupN, BX_IA_ERROR, BxOpcodeInfoMOV_RdCd },
|
| 1037 |
|
|
/* 0F 21 /d */ { 0, BX_IA_MOV_RdDd },
|
| 1038 |
|
|
/* 0F 22 /d */ { BxGroupN, BX_IA_ERROR, BxOpcodeInfoMOV_CdRd },
|
| 1039 |
|
|
/* 0F 23 /d */ { BxTraceEnd, BX_IA_MOV_DdRd },
|
| 1040 |
|
|
/* 0F 24 /d */ { 0, BX_IA_ERROR }, // BX_IA_MOV_RdTd not implemented
|
| 1041 |
|
|
/* 0F 25 /d */ { 0, BX_IA_ERROR },
|
| 1042 |
|
|
/* 0F 26 /d */ { 0, BX_IA_ERROR }, // BX_IA_MOV_TdRd not implemented
|
| 1043 |
|
|
/* 0F 27 /d */ { 0, BX_IA_ERROR },
|
| 1044 |
|
|
/* 0F 28 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MOVAPS_VpsWps, BxOpcodeGroupSSE_0f28 },
|
| 1045 |
|
|
/* 0F 29 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MOVAPS_WpsVps, BxOpcodeGroupSSE_0f29 },
|
| 1046 |
|
|
/* 0F 2A /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_CVTPI2PS_VpsQq, BxOpcodeGroupSSE_0f2a },
|
| 1047 |
|
|
/* 0F 2B /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MOVNTPS_MpsVps, BxOpcodeGroupSSE_0f2bM },
|
| 1048 |
|
|
/* 0F 2C /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_CVTTPS2PI_PqWps, BxOpcodeGroupSSE_0f2c },
|
| 1049 |
|
|
/* 0F 2D /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_CVTPS2PI_PqWps, BxOpcodeGroupSSE_0f2d },
|
| 1050 |
|
|
/* 0F 2E /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_UCOMISS_VssWss, BxOpcodeGroupSSE_0f2e },
|
| 1051 |
|
|
/* 0F 2F /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_COMISS_VpsWps, BxOpcodeGroupSSE_0f2f },
|
| 1052 |
|
|
/* 0F 30 /d */ { 0, BX_IA_ERROR },//AO{ BxTraceEnd, BX_IA_WRMSR },
|
| 1053 |
|
|
/* 0F 31 /d */ { 0, BX_IA_ERROR },//AO{ BxTraceEnd, BX_IA_RDTSC }, // end trace to avoid multiple TSC samples in one cycle
|
| 1054 |
|
|
/* 0F 32 /d */ { 0, BX_IA_ERROR },//AO{ BxTraceEnd, BX_IA_RDMSR }, // end trace to avoid multiple TSC samples in one cycle
|
| 1055 |
|
|
/* 0F 33 /d */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_RDPMC },
|
| 1056 |
|
|
/* 0F 34 /d */ { 0, BX_IA_ERROR },//AO{ BxTraceEnd, BX_IA_SYSENTER },
|
| 1057 |
|
|
/* 0F 35 /d */ { 0, BX_IA_ERROR },//AO{ BxTraceEnd, BX_IA_SYSEXIT },
|
| 1058 |
|
|
/* 0F 36 /d */ { 0, BX_IA_ERROR },
|
| 1059 |
|
|
/* 0F 37 /d */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_GETSEC },
|
| 1060 |
|
|
#if BX_CPU_LEVEL >= 6
|
| 1061 |
|
|
/* 0F 38 /d */ { Bx3ByteOp, BX_IA_ERROR, BxOpcode3ByteTable0f38 }, // 3-byte escape
|
| 1062 |
|
|
#else
|
| 1063 |
|
|
/* 0F 38 /d */ { 0, BX_IA_ERROR },
|
| 1064 |
|
|
#endif
|
| 1065 |
|
|
/* 0F 39 /d */ { 0, BX_IA_ERROR },
|
| 1066 |
|
|
#if BX_CPU_LEVEL >= 6
|
| 1067 |
|
|
/* 0F 3A /d */ { Bx3ByteOp | BxImmediate_Ib, BX_IA_ERROR, BxOpcode3ByteTable0f3a }, // 3-byte escape
|
| 1068 |
|
|
#else
|
| 1069 |
|
|
/* 0F 3A /d */ { 0, BX_IA_ERROR },
|
| 1070 |
|
|
#endif
|
| 1071 |
|
|
/* 0F 3B /d */ { 0, BX_IA_ERROR },
|
| 1072 |
|
|
/* 0F 3C /d */ { 0, BX_IA_ERROR },
|
| 1073 |
|
|
/* 0F 3D /d */ { 0, BX_IA_ERROR },
|
| 1074 |
|
|
/* 0F 3E /d */ { 0, BX_IA_ERROR },
|
| 1075 |
|
|
/* 0F 3F /d */ { 0, BX_IA_ERROR },
|
| 1076 |
|
|
/* 0F 40 /d */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_CMOVO_GdEd },
|
| 1077 |
|
|
/* 0F 41 /d */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_CMOVNO_GdEd },
|
| 1078 |
|
|
/* 0F 42 /d */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_CMOVB_GdEd },
|
| 1079 |
|
|
/* 0F 43 /d */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_CMOVNB_GdEd },
|
| 1080 |
|
|
/* 0F 44 /d */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_CMOVZ_GdEd },
|
| 1081 |
|
|
/* 0F 45 /d */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_CMOVNZ_GdEd },
|
| 1082 |
|
|
/* 0F 46 /d */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_CMOVBE_GdEd },
|
| 1083 |
|
|
/* 0F 47 /d */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_CMOVNBE_GdEd },
|
| 1084 |
|
|
/* 0F 48 /d */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_CMOVS_GdEd },
|
| 1085 |
|
|
/* 0F 49 /d */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_CMOVNS_GdEd },
|
| 1086 |
|
|
/* 0F 4A /d */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_CMOVP_GdEd },
|
| 1087 |
|
|
/* 0F 4B /d */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_CMOVNP_GdEd },
|
| 1088 |
|
|
/* 0F 4C /d */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_CMOVL_GdEd },
|
| 1089 |
|
|
/* 0F 4D /d */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_CMOVNL_GdEd },
|
| 1090 |
|
|
/* 0F 4E /d */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_CMOVLE_GdEd },
|
| 1091 |
|
|
/* 0F 4F /d */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_CMOVNLE_GdEd },
|
| 1092 |
|
|
/* 0F 50 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MOVMSKPS_GdVRps, BxOpcodeGroupSSE_0f50R },
|
| 1093 |
|
|
/* 0F 51 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_SQRTPS_VpsWps, BxOpcodeGroupSSE_0f51 },
|
| 1094 |
|
|
/* 0F 52 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_RSQRTPS_VpsWps, BxOpcodeGroupSSE_0f52 },
|
| 1095 |
|
|
/* 0F 53 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_RCPPS_VpsWps, BxOpcodeGroupSSE_0f53 },
|
| 1096 |
|
|
/* 0F 54 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_ANDPS_VpsWps, BxOpcodeGroupSSE_0f54 },
|
| 1097 |
|
|
/* 0F 55 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_ANDNPS_VpsWps, BxOpcodeGroupSSE_0f55 },
|
| 1098 |
|
|
/* 0F 56 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_ORPS_VpsWps, BxOpcodeGroupSSE_0f56 },
|
| 1099 |
|
|
/* 0F 57 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_XORPS_VpsWps, BxOpcodeGroupSSE_0f57 },
|
| 1100 |
|
|
/* 0F 58 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_ADDPS_VpsWps, BxOpcodeGroupSSE_0f58 },
|
| 1101 |
|
|
/* 0F 59 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MULPS_VpsWps, BxOpcodeGroupSSE_0f59 },
|
| 1102 |
|
|
/* 0F 5A /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_CVTPS2PD_VpdWps, BxOpcodeGroupSSE_0f5a },
|
| 1103 |
|
|
/* 0F 5B /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_CVTDQ2PS_VpsWdq, BxOpcodeGroupSSE_0f5b },
|
| 1104 |
|
|
/* 0F 5C /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_SUBPS_VpsWps, BxOpcodeGroupSSE_0f5c },
|
| 1105 |
|
|
/* 0F 5D /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MINPS_VpsWps, BxOpcodeGroupSSE_0f5d },
|
| 1106 |
|
|
/* 0F 5E /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_DIVPS_VpsWps, BxOpcodeGroupSSE_0f5e },
|
| 1107 |
|
|
/* 0F 5F /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MAXPS_VpsWps, BxOpcodeGroupSSE_0f5f },
|
| 1108 |
|
|
/* 0F 60 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PUNPCKLBW_PqQd, BxOpcodeGroupSSE_0f60 },
|
| 1109 |
|
|
/* 0F 61 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PUNPCKLWD_PqQd, BxOpcodeGroupSSE_0f61 },
|
| 1110 |
|
|
/* 0F 62 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PUNPCKLDQ_PqQd, BxOpcodeGroupSSE_0f62 },
|
| 1111 |
|
|
/* 0F 63 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PACKSSWB_PqQq, BxOpcodeGroupSSE_0f63 },
|
| 1112 |
|
|
/* 0F 64 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PCMPGTB_PqQq, BxOpcodeGroupSSE_0f64 },
|
| 1113 |
|
|
/* 0F 65 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PCMPGTW_PqQq, BxOpcodeGroupSSE_0f65 },
|
| 1114 |
|
|
/* 0F 66 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PCMPGTD_PqQq, BxOpcodeGroupSSE_0f66 },
|
| 1115 |
|
|
/* 0F 67 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PACKUSWB_PqQq, BxOpcodeGroupSSE_0f67 },
|
| 1116 |
|
|
/* 0F 68 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PUNPCKHBW_PqQq, BxOpcodeGroupSSE_0f68 },
|
| 1117 |
|
|
/* 0F 69 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PUNPCKHWD_PqQq, BxOpcodeGroupSSE_0f69 },
|
| 1118 |
|
|
/* 0F 6A /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PUNPCKHDQ_PqQq, BxOpcodeGroupSSE_0f6a },
|
| 1119 |
|
|
/* 0F 6B /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PACKSSDW_PqQq, BxOpcodeGroupSSE_0f6b },
|
| 1120 |
|
|
/* 0F 6C /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE66, BX_IA_PUNPCKLQDQ_VdqWdq },
|
| 1121 |
|
|
/* 0F 6D /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE66, BX_IA_PUNPCKHQDQ_VdqWdq },
|
| 1122 |
|
|
/* 0F 6E /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MOVD_PqEd, BxOpcodeGroupSSE_0f6e },
|
| 1123 |
|
|
/* 0F 6F /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MOVQ_PqQq, BxOpcodeGroupSSE_0f6f },
|
| 1124 |
|
|
/* 0F 70 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE | BxImmediate_Ib, BX_IA_PSHUFW_PqQqIb, BxOpcodeGroupSSE_0f70 },
|
| 1125 |
|
|
/* 0F 71 /d */ { 0, BX_IA_ERROR },//AO{ BxGroup12, BX_IA_ERROR, BxOpcodeInfoG12R },
|
| 1126 |
|
|
/* 0F 72 /d */ { 0, BX_IA_ERROR },//AO{ BxGroup13, BX_IA_ERROR, BxOpcodeInfoG13R },
|
| 1127 |
|
|
/* 0F 73 /d */ { 0, BX_IA_ERROR },//AO{ BxGroup14, BX_IA_ERROR, BxOpcodeInfoG14R },
|
| 1128 |
|
|
/* 0F 74 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PCMPEQB_PqQq, BxOpcodeGroupSSE_0f74 },
|
| 1129 |
|
|
/* 0F 75 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PCMPEQW_PqQq, BxOpcodeGroupSSE_0f75 },
|
| 1130 |
|
|
/* 0F 76 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PCMPEQD_PqQq, BxOpcodeGroupSSE_0f76 },
|
| 1131 |
|
|
/* 0F 77 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_EMMS, BxOpcodeGroupSSE_ERR },
|
| 1132 |
|
|
/* 0F 78 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_VMREAD_EdGd, BxOpcodeGroupSSE4A_0f78 },
|
| 1133 |
|
|
/* 0F 79 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_VMWRITE_GdEd, BxOpcodeGroupSSE4A_0f79 },
|
| 1134 |
|
|
/* 0F 7A /d */ { 0, BX_IA_ERROR },
|
| 1135 |
|
|
/* 0F 7B /d */ { 0, BX_IA_ERROR },
|
| 1136 |
|
|
/* 0F 7C /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_ERROR, BxOpcodeGroupSSE_0f7c },
|
| 1137 |
|
|
/* 0F 7D /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_ERROR, BxOpcodeGroupSSE_0f7d },
|
| 1138 |
|
|
/* 0F 7E /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MOVD_EdPd, BxOpcodeGroupSSE_0f7e },
|
| 1139 |
|
|
/* 0F 7F /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MOVQ_QqPq, BxOpcodeGroupSSE_0f7f },
|
| 1140 |
|
|
/* 0F 80 /d */ { BxImmediate_BrOff32 | BxTraceJCC, BX_IA_JO_Jd },
|
| 1141 |
|
|
/* 0F 81 /d */ { BxImmediate_BrOff32 | BxTraceJCC, BX_IA_JNO_Jd },
|
| 1142 |
|
|
/* 0F 82 /d */ { BxImmediate_BrOff32 | BxTraceJCC, BX_IA_JB_Jd },
|
| 1143 |
|
|
/* 0F 83 /d */ { BxImmediate_BrOff32 | BxTraceJCC, BX_IA_JNB_Jd },
|
| 1144 |
|
|
/* 0F 84 /d */ { BxImmediate_BrOff32 | BxTraceJCC, BX_IA_JZ_Jd },
|
| 1145 |
|
|
/* 0F 85 /d */ { BxImmediate_BrOff32 | BxTraceJCC, BX_IA_JNZ_Jd },
|
| 1146 |
|
|
/* 0F 86 /d */ { BxImmediate_BrOff32 | BxTraceJCC, BX_IA_JBE_Jd },
|
| 1147 |
|
|
/* 0F 87 /d */ { BxImmediate_BrOff32 | BxTraceJCC, BX_IA_JNBE_Jd },
|
| 1148 |
|
|
/* 0F 88 /d */ { BxImmediate_BrOff32 | BxTraceJCC, BX_IA_JS_Jd },
|
| 1149 |
|
|
/* 0F 89 /d */ { BxImmediate_BrOff32 | BxTraceJCC, BX_IA_JNS_Jd },
|
| 1150 |
|
|
/* 0F 8A /d */ { BxImmediate_BrOff32 | BxTraceJCC, BX_IA_JP_Jd },
|
| 1151 |
|
|
/* 0F 8B /d */ { BxImmediate_BrOff32 | BxTraceJCC, BX_IA_JNP_Jd },
|
| 1152 |
|
|
/* 0F 8C /d */ { BxImmediate_BrOff32 | BxTraceJCC, BX_IA_JL_Jd },
|
| 1153 |
|
|
/* 0F 8D /d */ { BxImmediate_BrOff32 | BxTraceJCC, BX_IA_JNL_Jd },
|
| 1154 |
|
|
/* 0F 8E /d */ { BxImmediate_BrOff32 | BxTraceJCC, BX_IA_JLE_Jd },
|
| 1155 |
|
|
/* 0F 8F /d */ { BxImmediate_BrOff32 | BxTraceJCC, BX_IA_JNLE_Jd },
|
| 1156 |
|
|
/* 0F 90 /d */ { 0, BX_IA_SETO_Eb },
|
| 1157 |
|
|
/* 0F 91 /d */ { 0, BX_IA_SETNO_Eb },
|
| 1158 |
|
|
/* 0F 92 /d */ { 0, BX_IA_SETB_Eb },
|
| 1159 |
|
|
/* 0F 93 /d */ { 0, BX_IA_SETNB_Eb },
|
| 1160 |
|
|
/* 0F 94 /d */ { 0, BX_IA_SETZ_Eb },
|
| 1161 |
|
|
/* 0F 95 /d */ { 0, BX_IA_SETNZ_Eb },
|
| 1162 |
|
|
/* 0F 96 /d */ { 0, BX_IA_SETBE_Eb },
|
| 1163 |
|
|
/* 0F 97 /d */ { 0, BX_IA_SETNBE_Eb },
|
| 1164 |
|
|
/* 0F 98 /d */ { 0, BX_IA_SETS_Eb },
|
| 1165 |
|
|
/* 0F 99 /d */ { 0, BX_IA_SETNS_Eb },
|
| 1166 |
|
|
/* 0F 9A /d */ { 0, BX_IA_SETP_Eb },
|
| 1167 |
|
|
/* 0F 9B /d */ { 0, BX_IA_SETNP_Eb },
|
| 1168 |
|
|
/* 0F 9C /d */ { 0, BX_IA_SETL_Eb },
|
| 1169 |
|
|
/* 0F 9D /d */ { 0, BX_IA_SETNL_Eb },
|
| 1170 |
|
|
/* 0F 9E /d */ { 0, BX_IA_SETLE_Eb },
|
| 1171 |
|
|
/* 0F 9F /d */ { 0, BX_IA_SETNLE_Eb },
|
| 1172 |
|
|
/* 0F A0 /d */ { 0, BX_IA_PUSH32_FS },
|
| 1173 |
|
|
/* 0F A1 /d */ { 0, BX_IA_POP32_FS },
|
| 1174 |
|
|
/* 0F A2 /d */ { 0, BX_IA_CPUID },
|
| 1175 |
|
|
/* 0F A3 /d */ { 0, BX_IA_BT_EdGd },
|
| 1176 |
|
|
/* 0F A4 /d */ { BxImmediate_Ib, BX_IA_SHLD_EdGdIb },
|
| 1177 |
|
|
/* 0F A5 /d */ { 0, BX_IA_SHLD_EdGd },
|
| 1178 |
|
|
/* 0F A6 /d */ { 0, BX_IA_ERROR }, // CMPXCHG_XBTS not implemented
|
| 1179 |
|
|
/* 0F A7 /d */ { 0, BX_IA_ERROR }, // CMPXCHG_IBTS not implemented
|
| 1180 |
|
|
/* 0F A8 /d */ { 0, BX_IA_PUSH32_GS },
|
| 1181 |
|
|
/* 0F A9 /d */ { 0, BX_IA_POP32_GS },
|
| 1182 |
|
|
/* 0F AA /d */ { 0, BX_IA_ERROR },//AO{ BxTraceEnd, BX_IA_RSM },
|
| 1183 |
|
|
/* 0F AB /d */ { BxLockable, BX_IA_BTS_EdGd },
|
| 1184 |
|
|
/* 0F AC /d */ { BxImmediate_Ib, BX_IA_SHRD_EdGdIb },
|
| 1185 |
|
|
/* 0F AD /d */ { 0, BX_IA_SHRD_EdGd },
|
| 1186 |
|
|
/* 0F AE /d */ { BxGroup15, BX_IA_ERROR, BxOpcodeInfoG15 },
|
| 1187 |
|
|
/* 0F AF /d */ { 0, BX_IA_IMUL_GdEd },
|
| 1188 |
|
|
/* 0F B0 /d */ { BxLockable, BX_IA_CMPXCHG_EbGb },
|
| 1189 |
|
|
/* 0F B1 /d */ { BxLockable, BX_IA_CMPXCHG_EdGd },
|
| 1190 |
|
|
/* 0F B2 /d */ { 0, BX_IA_LSS_GdMp },
|
| 1191 |
|
|
/* 0F B3 /d */ { BxLockable, BX_IA_BTR_EdGd },
|
| 1192 |
|
|
/* 0F B4 /d */ { 0, BX_IA_LFS_GdMp },
|
| 1193 |
|
|
/* 0F B5 /d */ { 0, BX_IA_LGS_GdMp },
|
| 1194 |
|
|
/* 0F B6 /d */ { 0, BX_IA_MOVZX_GdEb },
|
| 1195 |
|
|
/* 0F B7 /d */ { 0, BX_IA_MOVZX_GdEw },
|
| 1196 |
|
|
/* 0F B8 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSEF3, BX_IA_POPCNT_GdEd },
|
| 1197 |
|
|
/* 0F B9 /d */ { 0, BX_IA_ERROR },//AO{ BxTraceEnd, BX_IA_UD2B },
|
| 1198 |
|
|
/* 0F BA /d */ { BxGroup8, BX_IA_ERROR, BxOpcodeInfoG8EdIb },
|
| 1199 |
|
|
/* 0F BB /d */ { BxLockable, BX_IA_BTC_EdGd },
|
| 1200 |
|
|
/* 0F BC /d */ { 0, BX_IA_BSF_GdEd },//AO{ BxPrefixSSE, BX_IA_BSF_GdEd, BxOpcodeGroupSSE_TZCNT32 },
|
| 1201 |
|
|
/* 0F BD /d */ { 0, BX_IA_BSR_GdEd },//AO{ BxPrefixSSE, BX_IA_BSR_GdEd, BxOpcodeGroupSSE_LZCNT32 },
|
| 1202 |
|
|
/* 0F BE /d */ { 0, BX_IA_MOVSX_GdEb },
|
| 1203 |
|
|
/* 0F BF /d */ { 0, BX_IA_MOVSX_GdEw },
|
| 1204 |
|
|
/* 0F C0 /d */ { BxLockable, BX_IA_XADD_EbGb },
|
| 1205 |
|
|
/* 0F C1 /d */ { BxLockable, BX_IA_XADD_EdGd },
|
| 1206 |
|
|
/* 0F C2 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE | BxImmediate_Ib, BX_IA_CMPPS_VpsWpsIb, BxOpcodeGroupSSE_0fc2 },
|
| 1207 |
|
|
/* 0F C3 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MOVNTI32_MdGd, BxOpcodeGroupSSE_ERR },
|
| 1208 |
|
|
/* 0F C4 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE | BxImmediate_Ib, BX_IA_PINSRW_PqEwIb, BxOpcodeGroupSSE_0fc4 },
|
| 1209 |
|
|
/* 0F C5 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE | BxImmediate_Ib, BX_IA_PEXTRW_GdPqIb, BxOpcodeGroupSSE_0fc5R },
|
| 1210 |
|
|
/* 0F C6 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE | BxImmediate_Ib, BX_IA_SHUFPS_VpsWpsIb, BxOpcodeGroupSSE_0fc6 },
|
| 1211 |
|
|
/* 0F C7 /d */ { BxGroup9, BX_IA_ERROR, BxOpcodeInfoG9d },
|
| 1212 |
|
|
/* 0F C8 /d */ { 0, BX_IA_BSWAP_ERX },
|
| 1213 |
|
|
/* 0F C9 /d */ { 0, BX_IA_BSWAP_ERX },
|
| 1214 |
|
|
/* 0F CA /d */ { 0, BX_IA_BSWAP_ERX },
|
| 1215 |
|
|
/* 0F CB /d */ { 0, BX_IA_BSWAP_ERX },
|
| 1216 |
|
|
/* 0F CC /d */ { 0, BX_IA_BSWAP_ERX },
|
| 1217 |
|
|
/* 0F CD /d */ { 0, BX_IA_BSWAP_ERX },
|
| 1218 |
|
|
/* 0F CE /d */ { 0, BX_IA_BSWAP_ERX },
|
| 1219 |
|
|
/* 0F CF /d */ { 0, BX_IA_BSWAP_ERX },
|
| 1220 |
|
|
/* 0F D0 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_ERROR, BxOpcodeGroupSSE_0fd0 },
|
| 1221 |
|
|
/* 0F D1 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PSRLW_PqQq, BxOpcodeGroupSSE_0fd1 },
|
| 1222 |
|
|
/* 0F D2 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PSRLD_PqQq, BxOpcodeGroupSSE_0fd2 },
|
| 1223 |
|
|
/* 0F D3 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PSRLQ_PqQq, BxOpcodeGroupSSE_0fd3 },
|
| 1224 |
|
|
/* 0F D4 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PADDQ_PqQq, BxOpcodeGroupSSE_0fd4 },
|
| 1225 |
|
|
/* 0F D5 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PMULLW_PqQq, BxOpcodeGroupSSE_0fd5 },
|
| 1226 |
|
|
/* 0F D6 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_ERROR, BxOpcodeGroupSSE_0fd6 },
|
| 1227 |
|
|
/* 0F D7 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PMOVMSKB_GdPRq, BxOpcodeGroupSSE_0fd7R },
|
| 1228 |
|
|
/* 0F D8 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PSUBUSB_PqQq, BxOpcodeGroupSSE_0fd8 },
|
| 1229 |
|
|
/* 0F D9 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PSUBUSW_PqQq, BxOpcodeGroupSSE_0fd9 },
|
| 1230 |
|
|
/* 0F DA /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PMINUB_PqQq, BxOpcodeGroupSSE_0fda },
|
| 1231 |
|
|
/* 0F DB /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PAND_PqQq, BxOpcodeGroupSSE_0fdb },
|
| 1232 |
|
|
/* 0F DC /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PADDUSB_PqQq, BxOpcodeGroupSSE_0fdc },
|
| 1233 |
|
|
/* 0F DD /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PADDUSW_PqQq, BxOpcodeGroupSSE_0fdd },
|
| 1234 |
|
|
/* 0F DE /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PMAXUB_PqQq, BxOpcodeGroupSSE_0fde },
|
| 1235 |
|
|
/* 0F DF /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PANDN_PqQq, BxOpcodeGroupSSE_0fdf },
|
| 1236 |
|
|
/* 0F E0 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PAVGB_PqQq, BxOpcodeGroupSSE_0fe0 },
|
| 1237 |
|
|
/* 0F E1 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PSRAW_PqQq, BxOpcodeGroupSSE_0fe1 },
|
| 1238 |
|
|
/* 0F E2 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PSRAD_PqQq, BxOpcodeGroupSSE_0fe2 },
|
| 1239 |
|
|
/* 0F E3 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PAVGW_PqQq, BxOpcodeGroupSSE_0fe3 },
|
| 1240 |
|
|
/* 0F E4 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PMULHUW_PqQq, BxOpcodeGroupSSE_0fe4 },
|
| 1241 |
|
|
/* 0F E5 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PMULHW_PqQq, BxOpcodeGroupSSE_0fe5 },
|
| 1242 |
|
|
/* 0F E6 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_ERROR, BxOpcodeGroupSSE_0fe6 },
|
| 1243 |
|
|
/* 0F E7 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MOVNTQ_MqPq, BxOpcodeGroupSSE_0fe7M },
|
| 1244 |
|
|
/* 0F E8 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PSUBSB_PqQq, BxOpcodeGroupSSE_0fe8 },
|
| 1245 |
|
|
/* 0F E9 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PSUBSW_PqQq, BxOpcodeGroupSSE_0fe9 },
|
| 1246 |
|
|
/* 0F EA /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PMINSW_PqQq, BxOpcodeGroupSSE_0fea },
|
| 1247 |
|
|
/* 0F EB /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_POR_PqQq, BxOpcodeGroupSSE_0feb },
|
| 1248 |
|
|
/* 0F EC /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PADDSB_PqQq, BxOpcodeGroupSSE_0fec },
|
| 1249 |
|
|
/* 0F ED /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PADDSW_PqQq, BxOpcodeGroupSSE_0fed },
|
| 1250 |
|
|
/* 0F EE /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PMAXSW_PqQq, BxOpcodeGroupSSE_0fee },
|
| 1251 |
|
|
/* 0F EF /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PXOR_PqQq, BxOpcodeGroupSSE_0fef },
|
| 1252 |
|
|
/* 0F F0 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSEF2, BX_IA_LDDQU_VdqMdq },
|
| 1253 |
|
|
/* 0F F1 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PSLLW_PqQq, BxOpcodeGroupSSE_0ff1 },
|
| 1254 |
|
|
/* 0F F2 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PSLLD_PqQq, BxOpcodeGroupSSE_0ff2 },
|
| 1255 |
|
|
/* 0F F3 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PSLLQ_PqQq, BxOpcodeGroupSSE_0ff3 },
|
| 1256 |
|
|
/* 0F F4 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PMULUDQ_PqQq, BxOpcodeGroupSSE_0ff4 },
|
| 1257 |
|
|
/* 0F F5 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PMADDWD_PqQq, BxOpcodeGroupSSE_0ff5 },
|
| 1258 |
|
|
/* 0F F6 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PSADBW_PqQq, BxOpcodeGroupSSE_0ff6 },
|
| 1259 |
|
|
/* 0F F7 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MASKMOVQ_PqPRq, BxOpcodeGroupSSE_0ff7R },
|
| 1260 |
|
|
/* 0F F8 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PSUBB_PqQq, BxOpcodeGroupSSE_0ff8 },
|
| 1261 |
|
|
/* 0F F9 /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PSUBW_PqQq, BxOpcodeGroupSSE_0ff9 },
|
| 1262 |
|
|
/* 0F FA /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PSUBD_PqQq, BxOpcodeGroupSSE_0ffa },
|
| 1263 |
|
|
/* 0F FB /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PSUBQ_PqQq, BxOpcodeGroupSSE_0ffb },
|
| 1264 |
|
|
/* 0F FC /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PADDB_PqQq, BxOpcodeGroupSSE_0ffc },
|
| 1265 |
|
|
/* 0F FD /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PADDW_PqQq, BxOpcodeGroupSSE_0ffd },
|
| 1266 |
|
|
/* 0F FE /d */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_PADDD_PqQq, BxOpcodeGroupSSE_0ffe },
|
| 1267 |
|
|
/* 0F FF /d */ { 0, BX_IA_ERROR }
|
| 1268 |
|
|
};
|
| 1269 |
|
|
|
| 1270 |
|
|
//AO start
|
| 1271 |
|
|
static const BxOpcodeInfo_t BxOpcodeGroupSSE_ERR[3] = {
|
| 1272 |
|
|
/* 66 */ { 0, BX_IA_ERROR },
|
| 1273 |
|
|
/* F3 */ { 0, BX_IA_ERROR },
|
| 1274 |
|
|
/* F2 */ { 0, BX_IA_ERROR }
|
| 1275 |
|
|
};
|
| 1276 |
|
|
//AO end
|
| 1277 |
|
|
|
| 1278 |
|
|
int BX_CPP_AttrRegparmN(3)
|
| 1279 |
|
|
BX_CPU_C::fetchDecode32(const Bit8u *iptr, bxInstruction_c *i, unsigned remainingInPage)
|
| 1280 |
|
|
{
|
| 1281 |
|
|
//AO start
|
| 1282 |
|
|
printf("#i:");
|
| 1283 |
|
|
for(int iii=0; iii<16; iii++) printf(" %02x", iptr[iii]);
|
| 1284 |
|
|
printf("\n");
|
| 1285 |
|
|
//AO end
|
| 1286 |
|
|
if (remainingInPage > 15) remainingInPage = 15;
|
| 1287 |
|
|
|
| 1288 |
|
|
unsigned remain = remainingInPage; // remain must be at least 1
|
| 1289 |
|
|
bx_bool is_32, lock=0;
|
| 1290 |
|
|
unsigned b1, b2 = 0, os_32, ia_opcode = 0;
|
| 1291 |
|
|
unsigned rm = 0, mod=0, nnn=0, mod_mem = 0, rep = 0;
|
| 1292 |
|
|
unsigned seg = BX_SEG_REG_DS, seg_override = BX_SEG_REG_NULL;
|
| 1293 |
|
|
|
| 1294 |
|
|
#define SSE_PREFIX_NONE 0
|
| 1295 |
|
|
#define SSE_PREFIX_66 1
|
| 1296 |
|
|
#define SSE_PREFIX_F3 2
|
| 1297 |
|
|
#define SSE_PREFIX_F2 3
|
| 1298 |
|
|
unsigned sse_prefix = SSE_PREFIX_NONE;
|
| 1299 |
|
|
|
| 1300 |
|
|
#if BX_SUPPORT_AVX
|
| 1301 |
|
|
int had_vex = 0, had_xop = 0, use_vvv = 0, vvv = -1;
|
| 1302 |
|
|
bx_bool vex_w = 0, vex_l = 0;
|
| 1303 |
|
|
#endif
|
| 1304 |
|
|
|
| 1305 |
|
|
os_32 = is_32 =
|
| 1306 |
|
|
BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.d_b;
|
| 1307 |
|
|
|
| 1308 |
|
|
i->ResolveModrm = 0;
|
| 1309 |
|
|
i->init(/*os32*/ is_32, /*as32*/ is_32,
|
| 1310 |
|
|
/*os64*/ 0, /*as64*/ 0);
|
| 1311 |
|
|
|
| 1312 |
|
|
fetch_b1:
|
| 1313 |
|
|
b1 = *iptr++;
|
| 1314 |
|
|
remain--;
|
| 1315 |
|
|
|
| 1316 |
|
|
switch (b1) {
|
| 1317 |
|
|
case 0x0f: // 2-byte escape
|
| 1318 |
|
|
if (remain != 0) {
|
| 1319 |
|
|
remain--;
|
| 1320 |
|
|
b1 = 0x100 | *iptr++;
|
| 1321 |
|
|
break;
|
| 1322 |
|
|
}
|
| 1323 |
|
|
return(-1);
|
| 1324 |
|
|
case 0x66: // OpSize
|
| 1325 |
|
|
os_32 = !is_32;
|
| 1326 |
|
|
if(!sse_prefix) sse_prefix = SSE_PREFIX_66;
|
| 1327 |
|
|
i->setOs32B(os_32);
|
| 1328 |
|
|
if (remain != 0) {
|
| 1329 |
|
|
goto fetch_b1;
|
| 1330 |
|
|
}
|
| 1331 |
|
|
return(-1);
|
| 1332 |
|
|
case 0x67: // AddrSize
|
| 1333 |
|
|
i->setAs32B(!is_32);
|
| 1334 |
|
|
if (remain != 0) {
|
| 1335 |
|
|
goto fetch_b1;
|
| 1336 |
|
|
}
|
| 1337 |
|
|
return(-1);
|
| 1338 |
|
|
case 0xf2: // REPNE/REPNZ
|
| 1339 |
|
|
case 0xf3: // REP/REPE/REPZ
|
| 1340 |
|
|
sse_prefix = (b1 & 3) ^ 1;
|
| 1341 |
|
|
rep = b1 & 3;
|
| 1342 |
|
|
if (remain != 0) {
|
| 1343 |
|
|
goto fetch_b1;
|
| 1344 |
|
|
}
|
| 1345 |
|
|
return(-1);
|
| 1346 |
|
|
case 0x26: // ES:
|
| 1347 |
|
|
case 0x2e: // CS:
|
| 1348 |
|
|
case 0x36: // SS:
|
| 1349 |
|
|
case 0x3e: // DS:
|
| 1350 |
|
|
seg_override = (b1 >> 3) & 3;
|
| 1351 |
|
|
if (remain != 0) {
|
| 1352 |
|
|
goto fetch_b1;
|
| 1353 |
|
|
}
|
| 1354 |
|
|
return(-1);
|
| 1355 |
|
|
case 0x64: // FS:
|
| 1356 |
|
|
case 0x65: // GS:
|
| 1357 |
|
|
seg_override = (b1 & 0xf);
|
| 1358 |
|
|
if (remain != 0) {
|
| 1359 |
|
|
goto fetch_b1;
|
| 1360 |
|
|
}
|
| 1361 |
|
|
return(-1);
|
| 1362 |
|
|
case 0xf0: // LOCK:
|
| 1363 |
|
|
lock = 1;
|
| 1364 |
|
|
if (remain != 0) {
|
| 1365 |
|
|
goto fetch_b1;
|
| 1366 |
|
|
}
|
| 1367 |
|
|
return(-1);
|
| 1368 |
|
|
default:
|
| 1369 |
|
|
break;
|
| 1370 |
|
|
}
|
| 1371 |
|
|
//AO start
|
| 1372 |
|
|
i->bochs486_opcode = b1;
|
| 1373 |
|
|
i->bochs486_lock = lock;
|
| 1374 |
|
|
i->bochs486_modregrm = 0;
|
| 1375 |
|
|
i->bochs486_rep = rep;
|
| 1376 |
|
|
//AO end
|
| 1377 |
|
|
i->modRMForm.Id = 0;
|
| 1378 |
|
|
|
| 1379 |
|
|
unsigned index = b1 + (os_32 << 9); // *512
|
| 1380 |
|
|
|
| 1381 |
|
|
unsigned attr = BxOpcodeInfo32[index].Attr;
|
| 1382 |
|
|
|
| 1383 |
|
|
bx_bool has_modrm = 0;
|
| 1384 |
|
|
|
| 1385 |
|
|
#if BX_SUPPORT_AVX
|
| 1386 |
|
|
if ((attr & BxGroupX) == BxPrefixVEX && (*iptr & 0xc0) == 0xc0) {
|
| 1387 |
|
|
// VEX
|
| 1388 |
|
|
had_vex = 1;
|
| 1389 |
|
|
if (sse_prefix) had_vex = -1;
|
| 1390 |
|
|
if (! protected_mode()) had_vex = -1;
|
| 1391 |
|
|
unsigned vex, vex_opcext = 1;
|
| 1392 |
|
|
|
| 1393 |
|
|
if (remain != 0) {
|
| 1394 |
|
|
remain--;
|
| 1395 |
|
|
vex = *iptr++;
|
| 1396 |
|
|
}
|
| 1397 |
|
|
else
|
| 1398 |
|
|
return(-1);
|
| 1399 |
|
|
|
| 1400 |
|
|
if (b1 == 0xc4) {
|
| 1401 |
|
|
// decode 3-byte VEX prefix
|
| 1402 |
|
|
vex_opcext = vex & 0x1f;
|
| 1403 |
|
|
if (remain != 0) {
|
| 1404 |
|
|
remain--;
|
| 1405 |
|
|
vex = *iptr++; // fetch VEX3
|
| 1406 |
|
|
}
|
| 1407 |
|
|
else
|
| 1408 |
|
|
return(-1);
|
| 1409 |
|
|
|
| 1410 |
|
|
vex_w = (vex >> 7) & 0x1;
|
| 1411 |
|
|
}
|
| 1412 |
|
|
|
| 1413 |
|
|
vvv = 15 - ((vex >> 3) & 0xf);
|
| 1414 |
|
|
vex_l = (vex >> 2) & 0x1;
|
| 1415 |
|
|
i->setVL(BX_VL128 + vex_l);
|
| 1416 |
|
|
sse_prefix = vex & 0x3;
|
| 1417 |
|
|
|
| 1418 |
|
|
if (remain != 0) {
|
| 1419 |
|
|
remain--;
|
| 1420 |
|
|
b1 = *iptr++; // fetch new b1
|
| 1421 |
|
|
}
|
| 1422 |
|
|
else
|
| 1423 |
|
|
return(-1);
|
| 1424 |
|
|
|
| 1425 |
|
|
b1 += 256 * vex_opcext;
|
| 1426 |
|
|
if (b1 < 256 || b1 >= 1024) had_vex = -1;
|
| 1427 |
|
|
else {
|
| 1428 |
|
|
if (b1 >= 512)
|
| 1429 |
|
|
has_modrm = 1;
|
| 1430 |
|
|
else
|
| 1431 |
|
|
has_modrm = BxOpcodeHasModrm32[b1];
|
| 1432 |
|
|
}
|
| 1433 |
|
|
}
|
| 1434 |
|
|
else if (b1 == 0x8f && (*iptr & 0xc8) == 0xc8) {
|
| 1435 |
|
|
// 3 byte XOP prefix
|
| 1436 |
|
|
had_xop = 1;
|
| 1437 |
|
|
if (! protected_mode()) had_xop = -1;
|
| 1438 |
|
|
unsigned vex;
|
| 1439 |
|
|
|
| 1440 |
|
|
if (remain != 0) {
|
| 1441 |
|
|
remain--;
|
| 1442 |
|
|
vex = *iptr++; // fetch XOP2
|
| 1443 |
|
|
}
|
| 1444 |
|
|
else
|
| 1445 |
|
|
return(-1);
|
| 1446 |
|
|
|
| 1447 |
|
|
unsigned xop_opcext = (vex & 0x1f) - 8;
|
| 1448 |
|
|
if (xop_opcext >= 3)
|
| 1449 |
|
|
had_xop = -1;
|
| 1450 |
|
|
|
| 1451 |
|
|
if (remain != 0) {
|
| 1452 |
|
|
remain--;
|
| 1453 |
|
|
vex = *iptr++; // fetch XOP3
|
| 1454 |
|
|
}
|
| 1455 |
|
|
else
|
| 1456 |
|
|
return(-1);
|
| 1457 |
|
|
|
| 1458 |
|
|
vex_w = (vex >> 7) & 0x1;
|
| 1459 |
|
|
vvv = 15 - ((vex >> 3) & 0xf);
|
| 1460 |
|
|
vex_l = (vex >> 2) & 0x1;
|
| 1461 |
|
|
i->setVL(BX_VL128 + vex_l);
|
| 1462 |
|
|
sse_prefix = vex & 0x3;
|
| 1463 |
|
|
if (sse_prefix) had_xop = -1;
|
| 1464 |
|
|
|
| 1465 |
|
|
if (remain != 0) {
|
| 1466 |
|
|
remain--;
|
| 1467 |
|
|
b1 = *iptr++; // fetch new b1
|
| 1468 |
|
|
}
|
| 1469 |
|
|
else
|
| 1470 |
|
|
return(-1);
|
| 1471 |
|
|
|
| 1472 |
|
|
has_modrm = 1;
|
| 1473 |
|
|
b1 += 256 * xop_opcext;
|
| 1474 |
|
|
}
|
| 1475 |
|
|
else
|
| 1476 |
|
|
#endif
|
| 1477 |
|
|
{
|
| 1478 |
|
|
has_modrm = BxOpcodeHasModrm32[b1];
|
| 1479 |
|
|
}
|
| 1480 |
|
|
|
| 1481 |
|
|
if (has_modrm) {
|
| 1482 |
|
|
|
| 1483 |
|
|
#if BX_CPU_LEVEL >= 6
|
| 1484 |
|
|
unsigned b3 = 0;
|
| 1485 |
|
|
// handle 3-byte escape
|
| 1486 |
|
|
if ((attr & BxGroupX) == Bx3ByteOp) {
|
| 1487 |
|
|
if (remain != 0) {
|
| 1488 |
|
|
remain--;
|
| 1489 |
|
|
b3 = *iptr++;
|
| 1490 |
|
|
}
|
| 1491 |
|
|
else
|
| 1492 |
|
|
return(-1);
|
| 1493 |
|
|
}
|
| 1494 |
|
|
#endif
|
| 1495 |
|
|
|
| 1496 |
|
|
// opcode requires modrm byte
|
| 1497 |
|
|
if (remain != 0) {
|
| 1498 |
|
|
remain--;
|
| 1499 |
|
|
b2 = *iptr++;
|
| 1500 |
|
|
//AO start
|
| 1501 |
|
|
i->bochs486_modregrm = b2;
|
| 1502 |
|
|
//AO end
|
| 1503 |
|
|
}
|
| 1504 |
|
|
else
|
| 1505 |
|
|
return(-1);
|
| 1506 |
|
|
|
| 1507 |
|
|
// Parse mod-nnn-rm and related bytes
|
| 1508 |
|
|
mod = b2 & 0xc0; // leave unshifted
|
| 1509 |
|
|
nnn = (b2 >> 3) & 0x7;
|
| 1510 |
|
|
rm = b2 & 0x7;
|
| 1511 |
|
|
|
| 1512 |
|
|
i->setFoo((b2 | (b1 << 8)) & 0x7ff); /* for x87 */
|
| 1513 |
|
|
|
| 1514 |
|
|
// MOVs with CRx and DRx always use register ops and ignore the mod field.
|
| 1515 |
|
|
if ((b1 & ~3) == 0x120)
|
| 1516 |
|
|
mod = 0xc0;
|
| 1517 |
|
|
|
| 1518 |
|
|
if (mod == 0xc0) { // mod == 11b
|
| 1519 |
|
|
i->assertModC0();
|
| 1520 |
|
|
goto modrm_done;
|
| 1521 |
|
|
}
|
| 1522 |
|
|
|
| 1523 |
|
|
mod_mem = 1;
|
| 1524 |
|
|
i->setSibBase(rm); // initialize with rm to use BxResolve32Base
|
| 1525 |
|
|
i->setSibIndex(BX_NIL_REGISTER);
|
| 1526 |
|
|
// initialize displ32 with zero to include cases with no diplacement
|
| 1527 |
|
|
i->modRMForm.displ32u = 0;
|
| 1528 |
|
|
|
| 1529 |
|
|
if (i->as32L()) {
|
| 1530 |
|
|
// 32-bit addressing modes; note that mod==11b handled above
|
| 1531 |
|
|
i->ResolveModrm = &BX_CPU_C::BxResolve32Base;
|
| 1532 |
|
|
if (rm != 4) { // no s-i-b byte
|
| 1533 |
|
|
if (mod == 0x00) { // mod == 00b
|
| 1534 |
|
|
if (rm == 5) {
|
| 1535 |
|
|
i->setSibBase(BX_NIL_REGISTER);
|
| 1536 |
|
|
if (remain > 3) {
|
| 1537 |
|
|
i->modRMForm.displ32u = FetchDWORD(iptr);
|
| 1538 |
|
|
iptr += 4;
|
| 1539 |
|
|
remain -= 4;
|
| 1540 |
|
|
}
|
| 1541 |
|
|
else return(-1);
|
| 1542 |
|
|
}
|
| 1543 |
|
|
// mod==00b, rm!=4, rm!=5
|
| 1544 |
|
|
goto modrm_done;
|
| 1545 |
|
|
}
|
| 1546 |
|
|
seg = sreg_mod1or2_base32[rm];
|
| 1547 |
|
|
}
|
| 1548 |
|
|
else { // mod!=11b, rm==4, s-i-b byte follows
|
| 1549 |
|
|
unsigned sib, base, index, scale;
|
| 1550 |
|
|
if (remain != 0) {
|
| 1551 |
|
|
sib = *iptr++;
|
| 1552 |
|
|
remain--;
|
| 1553 |
|
|
}
|
| 1554 |
|
|
else {
|
| 1555 |
|
|
return(-1);
|
| 1556 |
|
|
}
|
| 1557 |
|
|
base = sib & 0x7; sib >>= 3;
|
| 1558 |
|
|
index = sib & 0x7; sib >>= 3;
|
| 1559 |
|
|
scale = sib;
|
| 1560 |
|
|
i->setSibScale(scale);
|
| 1561 |
|
|
i->setSibBase(base);
|
| 1562 |
|
|
// this part is a little tricky - assign index value always,
|
| 1563 |
|
|
// it will be really used if the instruction is Gather. Others
|
| 1564 |
|
|
// assume that BxResolve32Base will do the right thing.
|
| 1565 |
|
|
i->setSibIndex(index);
|
| 1566 |
|
|
if (index != 4) {
|
| 1567 |
|
|
i->ResolveModrm = &BX_CPU_C::BxResolve32BaseIndex;
|
| 1568 |
|
|
}
|
| 1569 |
|
|
if (mod == 0x00) { // mod==00b, rm==4
|
| 1570 |
|
|
seg = sreg_mod0_base32[base];
|
| 1571 |
|
|
if (base == 5) {
|
| 1572 |
|
|
i->setSibBase(BX_NIL_REGISTER);
|
| 1573 |
|
|
if (remain > 3) {
|
| 1574 |
|
|
i->modRMForm.displ32u = FetchDWORD(iptr);
|
| 1575 |
|
|
iptr += 4;
|
| 1576 |
|
|
remain -= 4;
|
| 1577 |
|
|
}
|
| 1578 |
|
|
else {
|
| 1579 |
|
|
return(-1);
|
| 1580 |
|
|
}
|
| 1581 |
|
|
}
|
| 1582 |
|
|
// mod==00b, rm==4, base!=5
|
| 1583 |
|
|
goto modrm_done;
|
| 1584 |
|
|
}
|
| 1585 |
|
|
seg = sreg_mod1or2_base32[base];
|
| 1586 |
|
|
}
|
| 1587 |
|
|
|
| 1588 |
|
|
if (mod == 0x40) { // mod==01b
|
| 1589 |
|
|
if (remain != 0) {
|
| 1590 |
|
|
// 8 sign extended to 32
|
| 1591 |
|
|
i->modRMForm.displ32u = (Bit8s) *iptr++;
|
| 1592 |
|
|
remain--;
|
| 1593 |
|
|
goto modrm_done;
|
| 1594 |
|
|
}
|
| 1595 |
|
|
else {
|
| 1596 |
|
|
return(-1);
|
| 1597 |
|
|
}
|
| 1598 |
|
|
}
|
| 1599 |
|
|
|
| 1600 |
|
|
// (mod == 0x80), mod==10b
|
| 1601 |
|
|
if (remain > 3) {
|
| 1602 |
|
|
i->modRMForm.displ32u = FetchDWORD(iptr);
|
| 1603 |
|
|
iptr += 4;
|
| 1604 |
|
|
remain -= 4;
|
| 1605 |
|
|
}
|
| 1606 |
|
|
else {
|
| 1607 |
|
|
return(-1);
|
| 1608 |
|
|
}
|
| 1609 |
|
|
}
|
| 1610 |
|
|
else {
|
| 1611 |
|
|
// 16-bit addressing modes, mod==11b handled above
|
| 1612 |
|
|
i->ResolveModrm = &BX_CPU_C::BxResolve16BaseIndex;
|
| 1613 |
|
|
i->setSibBase(Resolve16BaseReg[rm]);
|
| 1614 |
|
|
i->setSibIndex(Resolve16IndexReg[rm]);
|
| 1615 |
|
|
if (mod == 0x00) { // mod == 00b
|
| 1616 |
|
|
seg = sreg_mod00_rm16[rm];
|
| 1617 |
|
|
if (rm == 6) {
|
| 1618 |
|
|
i->setSibBase(BX_NIL_REGISTER);
|
| 1619 |
|
|
if (remain > 1) {
|
| 1620 |
|
|
i->modRMForm.displ16u = FetchWORD(iptr);
|
| 1621 |
|
|
iptr += 2;
|
| 1622 |
|
|
remain -= 2;
|
| 1623 |
|
|
goto modrm_done;
|
| 1624 |
|
|
}
|
| 1625 |
|
|
else return(-1);
|
| 1626 |
|
|
}
|
| 1627 |
|
|
goto modrm_done;
|
| 1628 |
|
|
}
|
| 1629 |
|
|
seg = sreg_mod01or10_rm16[rm];
|
| 1630 |
|
|
if (mod == 0x40) { // mod == 01b
|
| 1631 |
|
|
if (remain != 0) {
|
| 1632 |
|
|
// 8 sign extended to 16
|
| 1633 |
|
|
i->modRMForm.displ16u = (Bit8s) *iptr++;
|
| 1634 |
|
|
remain--;
|
| 1635 |
|
|
goto modrm_done;
|
| 1636 |
|
|
}
|
| 1637 |
|
|
else {
|
| 1638 |
|
|
return(-1);
|
| 1639 |
|
|
}
|
| 1640 |
|
|
}
|
| 1641 |
|
|
// (mod == 0x80) mod == 10b
|
| 1642 |
|
|
if (remain > 1) {
|
| 1643 |
|
|
i->modRMForm.displ16u = FetchWORD(iptr);
|
| 1644 |
|
|
iptr += 2;
|
| 1645 |
|
|
remain -= 2;
|
| 1646 |
|
|
}
|
| 1647 |
|
|
else {
|
| 1648 |
|
|
return(-1);
|
| 1649 |
|
|
}
|
| 1650 |
|
|
}
|
| 1651 |
|
|
|
| 1652 |
|
|
modrm_done:
|
| 1653 |
|
|
|
| 1654 |
|
|
// Resolve ExecutePtr and additional opcode Attr
|
| 1655 |
|
|
const BxOpcodeInfo_t *OpcodeInfoPtr = &(BxOpcodeInfo32[index]);
|
| 1656 |
|
|
|
| 1657 |
|
|
#if BX_SUPPORT_AVX
|
| 1658 |
|
|
if (had_vex != 0) {
|
| 1659 |
|
|
if (had_vex < 0)
|
| 1660 |
|
|
OpcodeInfoPtr = &BxOpcodeGroupSSE_ERR[0]; // BX_IA_ERROR
|
| 1661 |
|
|
else
|
| 1662 |
|
|
OpcodeInfoPtr = &BxOpcodeTableAVX[(b1-256) + 768*vex_l];
|
| 1663 |
|
|
}
|
| 1664 |
|
|
else if (had_xop != 0) {
|
| 1665 |
|
|
if (had_xop < 0)
|
| 1666 |
|
|
OpcodeInfoPtr = &BxOpcodeGroupSSE_ERR[0]; // BX_IA_ERROR
|
| 1667 |
|
|
else
|
| 1668 |
|
|
OpcodeInfoPtr = &BxOpcodeTableXOP[b1 + 768*vex_l];
|
| 1669 |
|
|
}
|
| 1670 |
|
|
#endif
|
| 1671 |
|
|
|
| 1672 |
|
|
attr = OpcodeInfoPtr->Attr;
|
| 1673 |
|
|
|
| 1674 |
|
|
while(attr & BxGroupX) {
|
| 1675 |
|
|
Bit32u group = attr & BxGroupX;
|
| 1676 |
|
|
attr &= ~BxGroupX;
|
| 1677 |
|
|
|
| 1678 |
|
|
// ignore 0x66 SSE prefix is required
|
| 1679 |
|
|
if (group == BxPrefixSSEF2F3) {
|
| 1680 |
|
|
if (sse_prefix == SSE_PREFIX_66) sse_prefix = SSE_PREFIX_NONE;
|
| 1681 |
|
|
group = BxPrefixSSE;
|
| 1682 |
|
|
}
|
| 1683 |
|
|
|
| 1684 |
|
|
if (group < BxPrefixSSE) {
|
| 1685 |
|
|
/* For opcodes with only one allowed SSE prefix */
|
| 1686 |
|
|
if (sse_prefix != (group >> 4)) {
|
| 1687 |
|
|
OpcodeInfoPtr = &BxOpcodeGroupSSE_ERR[0]; // BX_IA_ERROR
|
| 1688 |
|
|
}
|
| 1689 |
|
|
/* get additional attributes from group table */
|
| 1690 |
|
|
attr |= OpcodeInfoPtr->Attr;
|
| 1691 |
|
|
break;
|
| 1692 |
|
|
}
|
| 1693 |
|
|
|
| 1694 |
|
|
switch(group) {
|
| 1695 |
|
|
case BxGroupN:
|
| 1696 |
|
|
OpcodeInfoPtr = &(OpcodeInfoPtr->AnotherArray[nnn]);
|
| 1697 |
|
|
break;
|
| 1698 |
|
|
case BxSplitGroupN:
|
| 1699 |
|
|
OpcodeInfoPtr = &(OpcodeInfoPtr->AnotherArray[nnn + (mod_mem << 3)]);
|
| 1700 |
|
|
break;
|
| 1701 |
|
|
#if BX_SUPPORT_AVX
|
| 1702 |
|
|
case BxSplitVexW64: // VexW is ignored in 32-bit mode
|
| 1703 |
|
|
BX_ASSERT(had_vex != 0 || had_xop != 0);
|
| 1704 |
|
|
OpcodeInfoPtr = &(OpcodeInfoPtr->AnotherArray[0]);
|
| 1705 |
|
|
break;
|
| 1706 |
|
|
case BxSplitVexW: // VexW is a real opcode extension
|
| 1707 |
|
|
BX_ASSERT(had_vex != 0 || had_xop != 0);
|
| 1708 |
|
|
OpcodeInfoPtr = &(OpcodeInfoPtr->AnotherArray[vex_w]);
|
| 1709 |
|
|
break;
|
| 1710 |
|
|
case BxSplitMod11B:
|
| 1711 |
|
|
OpcodeInfoPtr = &(OpcodeInfoPtr->AnotherArray[mod_mem]);
|
| 1712 |
|
|
break;
|
| 1713 |
|
|
#endif
|
| 1714 |
|
|
#if BX_CPU_LEVEL >= 6
|
| 1715 |
|
|
case Bx3ByteOp:
|
| 1716 |
|
|
OpcodeInfoPtr = &(OpcodeInfoPtr->AnotherArray[b3]);
|
| 1717 |
|
|
break;
|
| 1718 |
|
|
#endif
|
| 1719 |
|
|
case BxOSizeGrp:
|
| 1720 |
|
|
OpcodeInfoPtr = &(OpcodeInfoPtr->AnotherArray[os_32]);
|
| 1721 |
|
|
break;
|
| 1722 |
|
|
case BxPrefixSSE:
|
| 1723 |
|
|
/* For SSE opcodes look into another table
|
| 1724 |
|
|
with the opcode prefixes (NONE, 0x66, 0xF3, 0xF2) */
|
| 1725 |
|
|
if (sse_prefix) {
|
| 1726 |
|
|
OpcodeInfoPtr = &(OpcodeInfoPtr->AnotherArray[sse_prefix-1]);
|
| 1727 |
|
|
break;
|
| 1728 |
|
|
}
|
| 1729 |
|
|
continue;
|
| 1730 |
|
|
case BxFPEscape:
|
| 1731 |
|
|
if (mod_mem)
|
| 1732 |
|
|
OpcodeInfoPtr = &(OpcodeInfoPtr->AnotherArray[nnn]);
|
| 1733 |
|
|
else
|
| 1734 |
|
|
OpcodeInfoPtr = &(OpcodeInfoPtr->AnotherArray[(b2 & 0x3f) + 8]);
|
| 1735 |
|
|
break;
|
| 1736 |
|
|
case BxPrefixVEX:
|
| 1737 |
|
|
continue;
|
| 1738 |
|
|
default:
|
| 1739 |
|
|
BX_PANIC(("fetchdecode32: Unknown opcode group %d", group));
|
| 1740 |
|
|
}
|
| 1741 |
|
|
|
| 1742 |
|
|
/* get additional attributes from group table */
|
| 1743 |
|
|
attr |= OpcodeInfoPtr->Attr;
|
| 1744 |
|
|
}
|
| 1745 |
|
|
|
| 1746 |
|
|
ia_opcode = OpcodeInfoPtr->IA;
|
| 1747 |
|
|
}
|
| 1748 |
|
|
else {
|
| 1749 |
|
|
// Opcode does not require a MODRM byte.
|
| 1750 |
|
|
// Note that a 2-byte opcode (0F XX) will jump to before
|
| 1751 |
|
|
// the if() above after fetching the 2nd byte, so this path is
|
| 1752 |
|
|
// taken in all cases if a modrm byte is NOT required.
|
| 1753 |
|
|
|
| 1754 |
|
|
const BxOpcodeInfo_t *OpcodeInfoPtr = &(BxOpcodeInfo32[index]);
|
| 1755 |
|
|
|
| 1756 |
|
|
#if BX_SUPPORT_AVX
|
| 1757 |
|
|
if (had_vex != 0) {
|
| 1758 |
|
|
if (had_vex < 0)
|
| 1759 |
|
|
OpcodeInfoPtr = &BxOpcodeGroupSSE_ERR[0]; // BX_IA_ERROR
|
| 1760 |
|
|
else
|
| 1761 |
|
|
OpcodeInfoPtr = &BxOpcodeTableAVX[(b1-256) + 768*vex_l];
|
| 1762 |
|
|
}
|
| 1763 |
|
|
else if (had_xop != 0) {
|
| 1764 |
|
|
if (had_xop < 0)
|
| 1765 |
|
|
OpcodeInfoPtr = &BxOpcodeGroupSSE_ERR[0]; // BX_IA_ERROR
|
| 1766 |
|
|
else
|
| 1767 |
|
|
OpcodeInfoPtr = &BxOpcodeTableXOP[b1 + 768*vex_l];
|
| 1768 |
|
|
}
|
| 1769 |
|
|
#endif
|
| 1770 |
|
|
|
| 1771 |
|
|
unsigned group = attr & BxGroupX;
|
| 1772 |
|
|
if (group == BxPrefixSSE && sse_prefix) {
|
| 1773 |
|
|
OpcodeInfoPtr = &(OpcodeInfoPtr->AnotherArray[sse_prefix-1]);
|
| 1774 |
|
|
}
|
| 1775 |
|
|
|
| 1776 |
|
|
ia_opcode = OpcodeInfoPtr->IA;
|
| 1777 |
|
|
rm = b1 & 0x7;
|
| 1778 |
|
|
nnn = (b1 >> 3) & 0x7;
|
| 1779 |
|
|
}
|
| 1780 |
|
|
|
| 1781 |
|
|
if (lock) { // lock prefix invalid opcode
|
| 1782 |
|
|
// lock prefix not allowed or destination operand is not memory
|
| 1783 |
|
|
if (!mod_mem || !(attr & BxLockable)) {
|
| 1784 |
|
|
#if BX_CPU_LEVEL >= 6
|
| 1785 |
|
|
if (BX_CPUID_SUPPORT_CPU_EXTENSION(BX_CPU_ALT_MOV_CR8) &&
|
| 1786 |
|
|
(ia_opcode == BX_IA_MOV_CR0Rd || ia_opcode == BX_IA_MOV_RdCR0)) {
|
| 1787 |
|
|
nnn = 8; // extend CR0 -> CR8
|
| 1788 |
|
|
}
|
| 1789 |
|
|
else
|
| 1790 |
|
|
#endif
|
| 1791 |
|
|
{
|
| 1792 |
|
|
BX_INFO(("LOCK prefix unallowed (op1=0x%x, modrm=0x%02x)", b1, b2));
|
| 1793 |
|
|
// replace execution function with undefined-opcode
|
| 1794 |
|
|
ia_opcode = BX_IA_ERROR;
|
| 1795 |
|
|
}
|
| 1796 |
|
|
}
|
| 1797 |
|
|
}
|
| 1798 |
|
|
|
| 1799 |
|
|
if (attr & BxRepeatable)
|
| 1800 |
|
|
i->setRepUsed(rep);
|
| 1801 |
|
|
|
| 1802 |
|
|
unsigned imm_mode = attr & BxImmediate;
|
| 1803 |
|
|
if (imm_mode) {
|
| 1804 |
|
|
// make sure iptr was advanced after Ib(), Iw() and Id()
|
| 1805 |
|
|
switch (imm_mode) {
|
| 1806 |
|
|
case BxImmediate_I1:
|
| 1807 |
|
|
i->modRMForm.Ib = 1;
|
| 1808 |
|
|
break;
|
| 1809 |
|
|
case BxImmediate_Ib:
|
| 1810 |
|
|
if (remain != 0) {
|
| 1811 |
|
|
i->modRMForm.Ib = *iptr++;
|
| 1812 |
|
|
remain--;
|
| 1813 |
|
|
}
|
| 1814 |
|
|
else {
|
| 1815 |
|
|
return(-1);
|
| 1816 |
|
|
}
|
| 1817 |
|
|
break;
|
| 1818 |
|
|
case BxImmediate_BrOff8:
|
| 1819 |
|
|
case BxImmediate_Ib_SE: // Sign extend to OS size
|
| 1820 |
|
|
if (remain != 0) {
|
| 1821 |
|
|
Bit8s temp8s = *iptr;
|
| 1822 |
|
|
// this code works correctly both for LE and BE hosts
|
| 1823 |
|
|
if (i->os32L())
|
| 1824 |
|
|
i->modRMForm.Id = (Bit32s) temp8s;
|
| 1825 |
|
|
else
|
| 1826 |
|
|
i->modRMForm.Iw = (Bit16s) temp8s;
|
| 1827 |
|
|
remain--;
|
| 1828 |
|
|
}
|
| 1829 |
|
|
else {
|
| 1830 |
|
|
return(-1);
|
| 1831 |
|
|
}
|
| 1832 |
|
|
break;
|
| 1833 |
|
|
case BxImmediate_Iw:
|
| 1834 |
|
|
if (remain > 1) {
|
| 1835 |
|
|
i->modRMForm.Iw = FetchWORD(iptr);
|
| 1836 |
|
|
iptr += 2;
|
| 1837 |
|
|
remain -= 2;
|
| 1838 |
|
|
}
|
| 1839 |
|
|
else {
|
| 1840 |
|
|
return(-1);
|
| 1841 |
|
|
}
|
| 1842 |
|
|
break;
|
| 1843 |
|
|
case BxImmediate_Id:
|
| 1844 |
|
|
if (remain > 3) {
|
| 1845 |
|
|
i->modRMForm.Id = FetchDWORD(iptr);
|
| 1846 |
|
|
iptr += 4;
|
| 1847 |
|
|
remain -= 4;
|
| 1848 |
|
|
}
|
| 1849 |
|
|
else {
|
| 1850 |
|
|
return(-1);
|
| 1851 |
|
|
}
|
| 1852 |
|
|
break;
|
| 1853 |
|
|
case BxImmediate_O:
|
| 1854 |
|
|
// For instructions which embed the address in the opcode.
|
| 1855 |
|
|
if (i->as32L()) {
|
| 1856 |
|
|
// fetch 32bit address into Id
|
| 1857 |
|
|
if (remain > 3) {
|
| 1858 |
|
|
i->modRMForm.Id = FetchDWORD(iptr);
|
| 1859 |
|
|
remain -= 4;
|
| 1860 |
|
|
}
|
| 1861 |
|
|
else return(-1);
|
| 1862 |
|
|
}
|
| 1863 |
|
|
else {
|
| 1864 |
|
|
// fetch 16bit address into Id
|
| 1865 |
|
|
if (remain > 1) {
|
| 1866 |
|
|
i->modRMForm.Id = (Bit32u) FetchWORD(iptr);
|
| 1867 |
|
|
remain -= 2;
|
| 1868 |
|
|
}
|
| 1869 |
|
|
else return(-1);
|
| 1870 |
|
|
}
|
| 1871 |
|
|
break;
|
| 1872 |
|
|
default:
|
| 1873 |
|
|
BX_INFO(("b1 was %x", b1));
|
| 1874 |
|
|
BX_PANIC(("fetchdecode32: imm_mode = %u", imm_mode));
|
| 1875 |
|
|
}
|
| 1876 |
|
|
|
| 1877 |
|
|
unsigned imm_mode2 = attr & BxImmediate2;
|
| 1878 |
|
|
if (imm_mode2) {
|
| 1879 |
|
|
switch (imm_mode2) {
|
| 1880 |
|
|
case BxImmediate_Ib2:
|
| 1881 |
|
|
if (remain != 0) {
|
| 1882 |
|
|
i->modRMForm.Ib2 = *iptr;
|
| 1883 |
|
|
remain--;
|
| 1884 |
|
|
}
|
| 1885 |
|
|
else {
|
| 1886 |
|
|
return(-1);
|
| 1887 |
|
|
}
|
| 1888 |
|
|
break;
|
| 1889 |
|
|
case BxImmediate_Iw2:
|
| 1890 |
|
|
if (remain > 1) {
|
| 1891 |
|
|
i->modRMForm.Iw2 = FetchWORD(iptr);
|
| 1892 |
|
|
remain -= 2;
|
| 1893 |
|
|
}
|
| 1894 |
|
|
else {
|
| 1895 |
|
|
return(-1);
|
| 1896 |
|
|
}
|
| 1897 |
|
|
break;
|
| 1898 |
|
|
default:
|
| 1899 |
|
|
BX_INFO(("b1 was %x", b1));
|
| 1900 |
|
|
BX_PANIC(("fetchdecode: imm_mode2 = %u", imm_mode2));
|
| 1901 |
|
|
}
|
| 1902 |
|
|
}
|
| 1903 |
|
|
}
|
| 1904 |
|
|
|
| 1905 |
|
|
#if BX_SUPPORT_3DNOW
|
| 1906 |
|
|
if(b1 == 0x10f)
|
| 1907 |
|
|
ia_opcode = Bx3DNowOpcode[i->modRMForm.Ib];
|
| 1908 |
|
|
#endif
|
| 1909 |
|
|
|
| 1910 |
|
|
// assign sources
|
| 1911 |
|
|
for (unsigned n = 0; n <= 3; n++) {
|
| 1912 |
|
|
unsigned def = (unsigned) BxOpcodesTable[ia_opcode].src[n] & 0xf;
|
| 1913 |
|
|
#if BX_SUPPORT_AVX
|
| 1914 |
|
|
if (def == BX_SRC_RM_VIB) {
|
| 1915 |
|
|
def = (vex_w) ? BX_SRC_RM : BX_SRC_VIB;
|
| 1916 |
|
|
}
|
| 1917 |
|
|
else if (def == BX_SRC_VIB_RM) {
|
| 1918 |
|
|
def = (vex_w) ? BX_SRC_VIB : BX_SRC_RM;
|
| 1919 |
|
|
}
|
| 1920 |
|
|
else if (def == BX_SRC_RM_VVV) {
|
| 1921 |
|
|
def = (vex_w) ? BX_SRC_RM : BX_SRC_VVV;
|
| 1922 |
|
|
}
|
| 1923 |
|
|
else if (def == BX_SRC_VVV_RM) {
|
| 1924 |
|
|
def = (vex_w) ? BX_SRC_VVV : BX_SRC_RM;
|
| 1925 |
|
|
}
|
| 1926 |
|
|
#endif
|
| 1927 |
|
|
switch(def) {
|
| 1928 |
|
|
case BX_SRC_EAX:
|
| 1929 |
|
|
i->setSrcReg(n, 0);
|
| 1930 |
|
|
break;
|
| 1931 |
|
|
case BX_SRC_NNN:
|
| 1932 |
|
|
i->setSrcReg(n, nnn);
|
| 1933 |
|
|
break;
|
| 1934 |
|
|
case BX_SRC_RM:
|
| 1935 |
|
|
i->setSrcReg(n, mod_mem ? BX_TMP_REGISTER : rm);
|
| 1936 |
|
|
break;
|
| 1937 |
|
|
#if BX_SUPPORT_AVX
|
| 1938 |
|
|
case BX_SRC_MEM_NO_VVV:
|
| 1939 |
|
|
if (mod_mem) break;
|
| 1940 |
|
|
// else fall through
|
| 1941 |
|
|
case BX_SRC_VVV:
|
| 1942 |
|
|
i->setSrcReg(n, vvv);
|
| 1943 |
|
|
use_vvv = 1;
|
| 1944 |
|
|
break;
|
| 1945 |
|
|
case BX_SRC_VIB:
|
| 1946 |
|
|
i->setSrcReg(n, (i->Ib() >> 4) & 7);
|
| 1947 |
|
|
break;
|
| 1948 |
|
|
#endif
|
| 1949 |
|
|
default:
|
| 1950 |
|
|
if (def != BX_SRC_NONE)
|
| 1951 |
|
|
BX_PANIC(("fetchdecode32: unknown definition %d for src %d", def, n));
|
| 1952 |
|
|
}
|
| 1953 |
|
|
}
|
| 1954 |
|
|
|
| 1955 |
|
|
// assign memory segment override
|
| 1956 |
|
|
if (! BX_NULL_SEG_REG(seg_override))
|
| 1957 |
|
|
seg = seg_override;
|
| 1958 |
|
|
i->setSeg(seg);
|
| 1959 |
|
|
|
| 1960 |
|
|
i->setILen(remainingInPage - remain);
|
| 1961 |
|
|
i->setIaOpcode(ia_opcode);
|
| 1962 |
|
|
|
| 1963 |
|
|
#if BX_SUPPORT_AVX
|
| 1964 |
|
|
if (had_vex > 0 || had_xop > 0) {
|
| 1965 |
|
|
if (! use_vvv && vvv != 0) {
|
| 1966 |
|
|
ia_opcode = BX_IA_ERROR;
|
| 1967 |
|
|
}
|
| 1968 |
|
|
if ((attr & BxVexW0) != 0 && vex_w) {
|
| 1969 |
|
|
ia_opcode = BX_IA_ERROR;
|
| 1970 |
|
|
}
|
| 1971 |
|
|
if ((attr & BxVexW1) != 0 && !vex_w) {
|
| 1972 |
|
|
ia_opcode = BX_IA_ERROR;
|
| 1973 |
|
|
}
|
| 1974 |
|
|
}
|
| 1975 |
|
|
else {
|
| 1976 |
|
|
BX_ASSERT(! use_vvv);
|
| 1977 |
|
|
}
|
| 1978 |
|
|
#endif
|
| 1979 |
|
|
|
| 1980 |
|
|
if (mod_mem) {
|
| 1981 |
|
|
i->execute1 = BxOpcodesTable[ia_opcode].execute1;
|
| 1982 |
|
|
i->handlers.execute2 = BxOpcodesTable[ia_opcode].execute2;
|
| 1983 |
|
|
|
| 1984 |
|
|
if (ia_opcode == BX_IA_MOV32_GdEd) {
|
| 1985 |
|
|
if (seg == BX_SEG_REG_SS)
|
| 1986 |
|
|
i->execute1 = &BX_CPU_C::MOV32S_GdEdM;
|
| 1987 |
|
|
}
|
| 1988 |
|
|
if (ia_opcode == BX_IA_MOV32_EdGd) {
|
| 1989 |
|
|
if (seg == BX_SEG_REG_SS)
|
| 1990 |
|
|
i->execute1 = &BX_CPU_C::MOV32S_EdGdM;
|
| 1991 |
|
|
}
|
| 1992 |
|
|
}
|
| 1993 |
|
|
else {
|
| 1994 |
|
|
i->execute1 = BxOpcodesTable[ia_opcode].execute2;
|
| 1995 |
|
|
i->handlers.execute2 = NULL;
|
| 1996 |
|
|
}
|
| 1997 |
|
|
|
| 1998 |
|
|
BX_ASSERT(i->execute1);
|
| 1999 |
|
|
|
| 2000 |
|
|
#if BX_CPU_LEVEL >= 6
|
| 2001 |
|
|
Bit32u op_flags = BxOpcodesTable[ia_opcode].src[3];
|
| 2002 |
|
|
if (! BX_CPU_THIS_PTR sse_ok) {
|
| 2003 |
|
|
if (op_flags & BX_PREPARE_SSE) {
|
| 2004 |
|
|
if (i->execute1 != &BX_CPU_C::BxError) i->execute1 = &BX_CPU_C::BxNoSSE;
|
| 2005 |
|
|
return(1);
|
| 2006 |
|
|
}
|
| 2007 |
|
|
}
|
| 2008 |
|
|
#if BX_SUPPORT_AVX
|
| 2009 |
|
|
if (! BX_CPU_THIS_PTR avx_ok) {
|
| 2010 |
|
|
if (op_flags & BX_PREPARE_AVX) {
|
| 2011 |
|
|
if (i->execute1 != &BX_CPU_C::BxError) i->execute1 = &BX_CPU_C::BxNoAVX;
|
| 2012 |
|
|
return(1);
|
| 2013 |
|
|
}
|
| 2014 |
|
|
}
|
| 2015 |
|
|
#endif
|
| 2016 |
|
|
#endif
|
| 2017 |
|
|
|
| 2018 |
|
|
if ((attr & BxTraceEnd) || ia_opcode == BX_IA_ERROR)
|
| 2019 |
|
|
return(1);
|
| 2020 |
|
|
|
| 2021 |
|
|
return(0);
|
| 2022 |
|
|
}
|
| 2023 |
|
|
|
| 2024 |
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BxError(bxInstruction_c *i)
|
| 2025 |
|
|
{
|
| 2026 |
|
|
unsigned ia_opcode = i->getIaOpcode();
|
| 2027 |
|
|
|
| 2028 |
|
|
if (ia_opcode == BX_IA_ERROR) {
|
| 2029 |
|
|
BX_DEBUG(("BxError: Encountered an unknown instruction (signalling #UD)"));
|
| 2030 |
|
|
|
| 2031 |
|
|
#if BX_DISASM && BX_DEBUGGER == 0 // with debugger it easy to see the #UD
|
| 2032 |
|
|
if (LOG_THIS getonoff(LOGLEV_DEBUG))
|
| 2033 |
|
|
debug_disasm_instruction(BX_CPU_THIS_PTR prev_rip);
|
| 2034 |
|
|
#endif
|
| 2035 |
|
|
}
|
| 2036 |
|
|
else {
|
| 2037 |
|
|
BX_DEBUG(("%s: instruction not supported - signalling #UD (features bitmask: 0x%08x)",
|
| 2038 |
|
|
get_bx_opcode_name(ia_opcode), BX_CPU_THIS_PTR isa_extensions_bitmask));
|
| 2039 |
|
|
}
|
| 2040 |
|
|
|
| 2041 |
|
|
exception(BX_UD_EXCEPTION, 0);
|
| 2042 |
|
|
|
| 2043 |
|
|
BX_NEXT_TRACE(i); // keep compiler happy
|
| 2044 |
|
|
}
|
| 2045 |
|
|
|
| 2046 |
|
|
const char *get_bx_opcode_name(Bit16u ia_opcode)
|
| 2047 |
|
|
{
|
| 2048 |
|
|
static const char* BxOpcodeNamesTable[BX_IA_LAST] =
|
| 2049 |
|
|
{
|
| 2050 |
|
|
#define bx_define_opcode(a, b, c, d, s1, s2, s3, s4, e) #a,
|
| 2051 |
|
|
#include "ia_opcodes.h"
|
| 2052 |
|
|
};
|
| 2053 |
|
|
#undef bx_define_opcode
|
| 2054 |
|
|
|
| 2055 |
|
|
return (ia_opcode < BX_IA_LAST) ? BxOpcodeNamesTable[ia_opcode] : 0;
|
| 2056 |
|
|
}
|
| 2057 |
|
|
|
| 2058 |
|
|
void BX_CPU_C::init_FetchDecodeTables(void)
|
| 2059 |
|
|
{
|
| 2060 |
|
|
static Bit64u BxOpcodeFeatures[BX_IA_LAST] =
|
| 2061 |
|
|
{
|
| 2062 |
|
|
#define bx_define_opcode(a, b, c, d, s1, s2, s3, s4, e) d,
|
| 2063 |
|
|
#include "ia_opcodes.h"
|
| 2064 |
|
|
};
|
| 2065 |
|
|
#undef bx_define_opcode
|
| 2066 |
|
|
|
| 2067 |
|
|
Bit64u features = BX_CPU_THIS_PTR isa_extensions_bitmask;
|
| 2068 |
|
|
#if BX_CPU_LEVEL > 3
|
| 2069 |
|
|
if (! features)
|
| 2070 |
|
|
BX_PANIC(("init_FetchDecodeTables: CPU features bitmask is empty !"));
|
| 2071 |
|
|
#endif
|
| 2072 |
|
|
|
| 2073 |
|
|
if (BX_IA_LAST > 0xfff)
|
| 2074 |
|
|
BX_PANIC(("init_FetchDecodeTables: too many opcodes defined !"));
|
| 2075 |
|
|
|
| 2076 |
|
|
for (unsigned n=0; n < BX_IA_LAST; n++) {
|
| 2077 |
|
|
Bit64u ia_opcode_features = BxOpcodeFeatures[n];
|
| 2078 |
|
|
if (ia_opcode_features && (ia_opcode_features & features) == 0) {
|
| 2079 |
|
|
BxOpcodesTable[n].execute1 = &BX_CPU_C::BxError;
|
| 2080 |
|
|
BxOpcodesTable[n].execute2 = &BX_CPU_C::BxError;
|
| 2081 |
|
|
// won't allow this new #UD opcode to check prepare_SSE and similar
|
| 2082 |
|
|
BxOpcodesTable[n].src[3] = 0;
|
| 2083 |
|
|
}
|
| 2084 |
|
|
}
|
| 2085 |
|
|
|
| 2086 |
|
|
// handle special case - BSF/BSR vs TZCNT/LZCNT
|
| 2087 |
|
|
if (! BX_CPUID_SUPPORT_ISA_EXTENSION(BX_ISA_LZCNT)) {
|
| 2088 |
|
|
BxOpcodesTable[BX_IA_LZCNT_GwEw] = BxOpcodesTable[BX_IA_BSR_GwEw];
|
| 2089 |
|
|
BxOpcodesTable[BX_IA_LZCNT_GdEd] = BxOpcodesTable[BX_IA_BSR_GdEd];
|
| 2090 |
|
|
#if BX_SUPPORT_X86_64
|
| 2091 |
|
|
BxOpcodesTable[BX_IA_LZCNT_GqEq] = BxOpcodesTable[BX_IA_BSR_GqEq];
|
| 2092 |
|
|
#endif
|
| 2093 |
|
|
}
|
| 2094 |
|
|
|
| 2095 |
|
|
if (! BX_CPUID_SUPPORT_ISA_EXTENSION(BX_ISA_BMI1)) {
|
| 2096 |
|
|
BxOpcodesTable[BX_IA_TZCNT_GwEw] = BxOpcodesTable[BX_IA_BSF_GwEw];
|
| 2097 |
|
|
BxOpcodesTable[BX_IA_TZCNT_GdEd] = BxOpcodesTable[BX_IA_BSF_GdEd];
|
| 2098 |
|
|
#if BX_SUPPORT_X86_64
|
| 2099 |
|
|
BxOpcodesTable[BX_IA_TZCNT_GqEq] = BxOpcodesTable[BX_IA_BSF_GqEq];
|
| 2100 |
|
|
#endif
|
| 2101 |
|
|
}
|
| 2102 |
|
|
}
|