OpenCores
URL https://opencores.org/ocsvn/ao486/ao486/trunk

Subversion Repositories ao486

[/] [ao486/] [trunk/] [bochs486/] [cpu/] [fetchdecode.h] - Blame information for rev 2

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 alfik 
/////////////////////////////////////////////////////////////////////////
2 
// $Id: fetchdecode.h 11565 2012-12-27 19:31:21Z sshwarts $
3 
/////////////////////////////////////////////////////////////////////////
4 
//
5 
//   Copyright (c) 2005-2012 Stanislav Shwartsman
6 
//          Written by Stanislav Shwartsman [sshwarts at sourceforge net]
7 
//
8 
//  This library is free software; you can redistribute it and/or
9 
//  modify it under the terms of the GNU Lesser General Public
10 
//  License as published by the Free Software Foundation; either
11 
//  version 2 of the License, or (at your option) any later version.
12 
//
13 
//  This library is distributed in the hope that it will be useful,
14 
//  but WITHOUT ANY WARRANTY; without even the implied warranty of
15 
//  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
16 
//  Lesser General Public License for more details.
17 
//
18 
//  You should have received a copy of the GNU Lesser General Public
19 
//  License along with this library; if not, write to the Free Software
20 
//  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
21 
//
22 
/////////////////////////////////////////////////////////////////////////
23 
 
24 
#ifndef BX_COMMON_FETCHDECODE_TABLES_H
25 
#define BX_COMMON_FETCHDECODE_TABLES_H
26 
 
27 
typedef struct BxOpcodeInfo_t {
28 
  Bit16u Attr;
29 
  Bit16u IA;
30 
  const BxOpcodeInfo_t *AnotherArray;
31 
} BxOpcodeInfo_t;
32 
 
33 
//
34 
// This file contains common IA-32/X86-64 opcode tables, like FPU opcode
35 
// table, 3DNow! opcode table or SSE opcode groups (choose the opcode
36 
// according to instruction prefixes)
37 
//
38 
 
39 
BX_CPP_INLINE Bit16u FetchWORD(const Bit8u *iptr)
40 
{
41 
   Bit16u data;
42 
   ReadHostWordFromLittleEndian(iptr, data);
43 
   return data;
44 
}
45 
 
46 
BX_CPP_INLINE Bit32u FetchDWORD(const Bit8u *iptr)
47 
{
48 
   Bit32u data;
49 
   ReadHostDWordFromLittleEndian(iptr, data);
50 
   return data;
51 
}
52 
 
53 
#if BX_SUPPORT_X86_64
54 
BX_CPP_INLINE Bit64u FetchQWORD(const Bit8u *iptr)
55 
{
56 
   Bit64u data;
57 
   ReadHostQWordFromLittleEndian(iptr, data);
58 
   return data;
59 
}
60 
#endif
61 
 
62 
#define BX_PREPARE_SSE (0x80)
63 
#define BX_PREPARE_AVX (0x40)
64 
 
65 
struct bxIAOpcodeTable {
66 
  BxExecutePtr_tR execute1;
67 
  BxExecutePtr_tR execute2;
68 
  Bit8u src[4];
69 
};
70 
 
71 
enum {
72 
  BX_SRC_NONE = 0,
73 
  BX_SRC_EAX,
74 
  BX_SRC_NNN,
75 
  BX_SRC_RM,
76 
  BX_SRC_MEM_NO_VVV,
77 
  BX_SRC_VVV,
78 
  BX_SRC_VIB,
79 
  BX_SRC_VIB_RM, // RM when VEX.W = 1, VIB otherwise
80 
  BX_SRC_RM_VIB, // RM when VEX.W = 0, VIB otherwise
81 
  BX_SRC_RM_VVV, // RM when VEX.W = 1, VVV otherwise
82 
  BX_SRC_VVV_RM  // RM when VEX.W = 0, VVV otherwise
83 
};
84 
 
85 
#define BX_SRC_XMM0 (BX_SRC_EAX)
86 
 
87 
//
88 
// Common FetchDecode Opcode Tables
89 
//
90 
 
91 
#include "fetchdecode_x87.h"
92 
//AO#include "fetchdecode_sse.h"
93 
#include "fetchdecode_avx.h"
94 
#include "fetchdecode_xop.h"
95 
 
96 
/* ************************************************************************ */
97 
/* Opcode Groups */
98 
 
99 
/* ******* */
100 
/* Group 1 */
101 
/* ******* */
102 
 
103 
static const BxOpcodeInfo_t BxOpcodeInfoG1EbIb[8] = {
104 
  // attributes defined in main area
105 
  /* 0 */ { BxLockable, BX_IA_ADD_EbIb },
106 
  /* 1 */ { BxLockable, BX_IA_OR_EbIb  },
107 
  /* 2 */ { BxLockable, BX_IA_ADC_EbIb },
108 
  /* 3 */ { BxLockable, BX_IA_SBB_EbIb },
109 
  /* 4 */ { BxLockable, BX_IA_AND_EbIb },
110 
  /* 5 */ { BxLockable, BX_IA_SUB_EbIb },
111 
  /* 6 */ { BxLockable, BX_IA_XOR_EbIb },
112 
  /* 7 */ { 0,          BX_IA_CMP_EbIb }
113 
};
114 
 
115 
static const BxOpcodeInfo_t BxOpcodeInfoG1Ew[8] = {
116 
  // attributes defined in main area
117 
  /* 0 */ { BxLockable, BX_IA_ADD_EwIw },
118 
  /* 1 */ { BxLockable, BX_IA_OR_EwIw },
119 
  /* 2 */ { BxLockable, BX_IA_ADC_EwIw },
120 
  /* 3 */ { BxLockable, BX_IA_SBB_EwIw },
121 
  /* 4 */ { BxLockable, BX_IA_AND_EwIw },
122 
  /* 5 */ { BxLockable, BX_IA_SUB_EwIw },
123 
  /* 6 */ { BxLockable, BX_IA_XOR_EwIw },
124 
  /* 7 */ { 0,          BX_IA_CMP_EwIw }
125 
};
126 
 
127 
static const BxOpcodeInfo_t BxOpcodeInfoG1Ed[8] = {
128 
  // attributes defined in main area
129 
  /* 0 */ { BxLockable, BX_IA_ADD_EdId },
130 
  /* 1 */ { BxLockable, BX_IA_OR_EdId },
131 
  /* 2 */ { BxLockable, BX_IA_ADC_EdId },
132 
  /* 3 */ { BxLockable, BX_IA_SBB_EdId },
133 
  /* 4 */ { BxLockable, BX_IA_AND_EdId },
134 
  /* 5 */ { BxLockable, BX_IA_SUB_EdId },
135 
  /* 6 */ { BxLockable, BX_IA_XOR_EdId },
136 
  /* 7 */ { 0,          BX_IA_CMP_EdId }
137 
};
138 
 
139 
#if BX_SUPPORT_X86_64
140 
static const BxOpcodeInfo_t BxOpcodeInfo64G1Eq[8] = {
141 
  // attributes defined in main area
142 
  /* 0 */ { BxLockable, BX_IA_ADD_EqId },
143 
  /* 1 */ { BxLockable, BX_IA_OR_EqId },
144 
  /* 2 */ { BxLockable, BX_IA_ADC_EqId },
145 
  /* 3 */ { BxLockable, BX_IA_SBB_EqId },
146 
  /* 4 */ { BxLockable, BX_IA_AND_EqId },
147 
  /* 5 */ { BxLockable, BX_IA_SUB_EqId },
148 
  /* 6 */ { BxLockable, BX_IA_XOR_EqId },
149 
  /* 7 */ { 0,          BX_IA_CMP_EqId }
150 
};
151 
#endif
152 
 
153 
/* ******** */
154 
/* Group 1A */
155 
/* ******** */
156 
 
157 
static const BxOpcodeInfo_t BxOpcodeInfoG1AEw[8] = {
158 
  /* 0 */ { 0, BX_IA_POP_Ew },
159 
  /* 1 */ { 0, BX_IA_ERROR },
160 
  /* 2 */ { 0, BX_IA_ERROR },
161 
  /* 3 */ { 0, BX_IA_ERROR },
162 
  /* 4 */ { 0, BX_IA_ERROR },
163 
  /* 5 */ { 0, BX_IA_ERROR },
164 
  /* 6 */ { 0, BX_IA_ERROR },
165 
  /* 7 */ { 0, BX_IA_ERROR }
166 
};
167 
 
168 
static const BxOpcodeInfo_t BxOpcodeInfoG1AEd[8] = {
169 
  /* 0 */ { 0, BX_IA_POP_Ed },
170 
  /* 1 */ { 0, BX_IA_ERROR },
171 
  /* 2 */ { 0, BX_IA_ERROR },
172 
  /* 3 */ { 0, BX_IA_ERROR },
173 
  /* 4 */ { 0, BX_IA_ERROR },
174 
  /* 5 */ { 0, BX_IA_ERROR },
175 
  /* 6 */ { 0, BX_IA_ERROR },
176 
  /* 7 */ { 0, BX_IA_ERROR }
177 
};
178 
 
179 
#if BX_SUPPORT_X86_64
180 
static const BxOpcodeInfo_t BxOpcodeInfo64G1AEq[8] = {
181 
  /* 0 */ { 0, BX_IA_POP_Eq },
182 
  /* 1 */ { 0, BX_IA_ERROR },
183 
  /* 2 */ { 0, BX_IA_ERROR },
184 
  /* 3 */ { 0, BX_IA_ERROR },
185 
  /* 4 */ { 0, BX_IA_ERROR },
186 
  /* 5 */ { 0, BX_IA_ERROR },
187 
  /* 6 */ { 0, BX_IA_ERROR },
188 
  /* 7 */ { 0, BX_IA_ERROR }
189 
};
190 
#endif
191 
 
192 
/* ******* */
193 
/* Group 2 */
194 
/* ******* */
195 
 
196 
static const BxOpcodeInfo_t BxOpcodeInfoG2Eb[8] = {
197 
  /* 0 */ { 0, BX_IA_ROL_Eb },
198 
  /* 1 */ { 0, BX_IA_ROR_Eb },
199 
  /* 2 */ { 0, BX_IA_RCL_Eb },
200 
  /* 3 */ { 0, BX_IA_RCR_Eb },
201 
  /* 4 */ { 0, BX_IA_SHL_Eb },
202 
  /* 5 */ { 0, BX_IA_SHR_Eb },
203 
  /* 6 */ { 0, BX_IA_SHL_Eb },
204 
  /* 7 */ { 0, BX_IA_SAR_Eb }
205 
};
206 
 
207 
static const BxOpcodeInfo_t BxOpcodeInfoG2Ew[8] = {
208 
  /* 0 */ { 0, BX_IA_ROL_Ew },
209 
  /* 1 */ { 0, BX_IA_ROR_Ew },
210 
  /* 2 */ { 0, BX_IA_RCL_Ew },
211 
  /* 3 */ { 0, BX_IA_RCR_Ew },
212 
  /* 4 */ { 0, BX_IA_SHL_Ew },
213 
  /* 5 */ { 0, BX_IA_SHR_Ew },
214 
  /* 6 */ { 0, BX_IA_SHL_Ew },
215 
  /* 7 */ { 0, BX_IA_SAR_Ew }
216 
};
217 
 
218 
static const BxOpcodeInfo_t BxOpcodeInfoG2Ed[8] = {
219 
  /* 0 */ { 0, BX_IA_ROL_Ed },
220 
  /* 1 */ { 0, BX_IA_ROR_Ed },
221 
  /* 2 */ { 0, BX_IA_RCL_Ed },
222 
  /* 3 */ { 0, BX_IA_RCR_Ed },
223 
  /* 4 */ { 0, BX_IA_SHL_Ed },
224 
  /* 5 */ { 0, BX_IA_SHR_Ed },
225 
  /* 6 */ { 0, BX_IA_SHL_Ed },
226 
  /* 7 */ { 0, BX_IA_SAR_Ed }
227 
};
228 
 
229 
#if BX_SUPPORT_X86_64
230 
static const BxOpcodeInfo_t BxOpcodeInfo64G2Eq[8] = {
231 
  /* 0 */ { 0, BX_IA_ROL_Eq },
232 
  /* 1 */ { 0, BX_IA_ROR_Eq },
233 
  /* 2 */ { 0, BX_IA_RCL_Eq },
234 
  /* 3 */ { 0, BX_IA_RCR_Eq },
235 
  /* 4 */ { 0, BX_IA_SHL_Eq },
236 
  /* 5 */ { 0, BX_IA_SHR_Eq },
237 
  /* 6 */ { 0, BX_IA_SHL_Eq },
238 
  /* 7 */ { 0, BX_IA_SAR_Eq }
239 
};
240 
#endif
241 
 
242 
/* ********* */
243 
/* Group2 Ib */
244 
/* ********* */
245 
 
246 
static const BxOpcodeInfo_t BxOpcodeInfoG2EbIb[8] = {
247 
  // attributes defined in main area
248 
  /* 0 */ { 0, BX_IA_ROL_EbIb },
249 
  /* 1 */ { 0, BX_IA_ROR_EbIb },
250 
  /* 2 */ { 0, BX_IA_RCL_EbIb },
251 
  /* 3 */ { 0, BX_IA_RCR_EbIb },
252 
  /* 4 */ { 0, BX_IA_SHL_EbIb },
253 
  /* 5 */ { 0, BX_IA_SHR_EbIb },
254 
  /* 6 */ { 0, BX_IA_SHL_EbIb },
255 
  /* 7 */ { 0, BX_IA_SAR_EbIb }
256 
};
257 
 
258 
static const BxOpcodeInfo_t BxOpcodeInfoG2EwIb[8] = {
259 
  // attributes defined in main area
260 
  /* 0 */ { 0, BX_IA_ROL_EwIb },
261 
  /* 1 */ { 0, BX_IA_ROR_EwIb },
262 
  /* 2 */ { 0, BX_IA_RCL_EwIb },
263 
  /* 3 */ { 0, BX_IA_RCR_EwIb },
264 
  /* 4 */ { 0, BX_IA_SHL_EwIb },
265 
  /* 5 */ { 0, BX_IA_SHR_EwIb },
266 
  /* 6 */ { 0, BX_IA_SHL_EwIb },
267 
  /* 7 */ { 0, BX_IA_SAR_EwIb }
268 
};
269 
 
270 
static const BxOpcodeInfo_t BxOpcodeInfoG2EdIb[8] = {
271 
  // attributes defined in main area
272 
  /* 0 */ { 0, BX_IA_ROL_EdIb },
273 
  /* 1 */ { 0, BX_IA_ROR_EdIb },
274 
  /* 2 */ { 0, BX_IA_RCL_EdIb },
275 
  /* 3 */ { 0, BX_IA_RCR_EdIb },
276 
  /* 4 */ { 0, BX_IA_SHL_EdIb },
277 
  /* 5 */ { 0, BX_IA_SHR_EdIb },
278 
  /* 6 */ { 0, BX_IA_SHL_EdIb },
279 
  /* 7 */ { 0, BX_IA_SAR_EdIb }
280 
};
281 
 
282 
#if BX_SUPPORT_X86_64
283 
static const BxOpcodeInfo_t BxOpcodeInfo64G2EqIb[8] = {
284 
  // attributes defined in main area
285 
  /* 0 */ { 0, BX_IA_ROL_EqIb },
286 
  /* 1 */ { 0, BX_IA_ROR_EqIb },
287 
  /* 2 */ { 0, BX_IA_RCL_EqIb },
288 
  /* 3 */ { 0, BX_IA_RCR_EqIb },
289 
  /* 4 */ { 0, BX_IA_SHL_EqIb },
290 
  /* 5 */ { 0, BX_IA_SHR_EqIb },
291 
  /* 6 */ { 0, BX_IA_SHL_EqIb },
292 
  /* 7 */ { 0, BX_IA_SAR_EqIb }
293 
};
294 
#endif
295 
 
296 
/* ******* */
297 
/* Group 3 */
298 
/* ******* */
299 
 
300 
static const BxOpcodeInfo_t BxOpcodeInfoG3Eb[8] = {
301 
  /* 0 */ { BxImmediate_Ib, BX_IA_TEST_EbIb },
302 
  /* 1 */ { BxImmediate_Ib, BX_IA_TEST_EbIb },
303 
  /* 2 */ { BxLockable,     BX_IA_NOT_Eb },
304 
  /* 3 */ { BxLockable,     BX_IA_NEG_Eb },
305 
  /* 4 */ { 0,              BX_IA_MUL_ALEb },
306 
  /* 5 */ { 0,              BX_IA_IMUL_ALEb },
307 
  /* 6 */ { 0,              BX_IA_DIV_ALEb },
308 
  /* 7 */ { 0,              BX_IA_IDIV_ALEb }
309 
};
310 
 
311 
static const BxOpcodeInfo_t BxOpcodeInfoG3Ew[8] = {
312 
  /* 0 */ { BxImmediate_Iw, BX_IA_TEST_EwIw },
313 
  /* 1 */ { BxImmediate_Iw, BX_IA_TEST_EwIw },
314 
  /* 2 */ { BxLockable,     BX_IA_NOT_Ew },
315 
  /* 3 */ { BxLockable,     BX_IA_NEG_Ew },
316 
  /* 4 */ { 0,              BX_IA_MUL_AXEw },
317 
  /* 5 */ { 0,              BX_IA_IMUL_AXEw },
318 
  /* 6 */ { 0,              BX_IA_DIV_AXEw },
319 
  /* 7 */ { 0,              BX_IA_IDIV_AXEw }
320 
};
321 
 
322 
static const BxOpcodeInfo_t BxOpcodeInfoG3Ed[8] = {
323 
  /* 0 */ { BxImmediate_Id, BX_IA_TEST_EdId },
324 
  /* 1 */ { BxImmediate_Id, BX_IA_TEST_EdId },
325 
  /* 2 */ { BxLockable,     BX_IA_NOT_Ed },
326 
  /* 3 */ { BxLockable,     BX_IA_NEG_Ed },
327 
  /* 4 */ { 0,              BX_IA_MUL_EAXEd },
328 
  /* 5 */ { 0,              BX_IA_IMUL_EAXEd },
329 
  /* 6 */ { 0,              BX_IA_DIV_EAXEd },
330 
  /* 7 */ { 0,              BX_IA_IDIV_EAXEd }
331 
};
332 
 
333 
#if BX_SUPPORT_X86_64
334 
static const BxOpcodeInfo_t BxOpcodeInfo64G3Eq[8] = {
335 
  /* 0 */ { BxImmediate_Id, BX_IA_TEST_EqId },
336 
  /* 1 */ { BxImmediate_Id, BX_IA_TEST_EqId },
337 
  /* 2 */ { BxLockable,     BX_IA_NOT_Eq },
338 
  /* 3 */ { BxLockable,     BX_IA_NEG_Eq },
339 
  /* 4 */ { 0,              BX_IA_MUL_RAXEq },
340 
  /* 5 */ { 0,              BX_IA_IMUL_RAXEq },
341 
  /* 6 */ { 0,              BX_IA_DIV_RAXEq },
342 
  /* 7 */ { 0,              BX_IA_IDIV_RAXEq }
343 
};
344 
#endif
345 
 
346 
/* ******* */
347 
/* Group 4 */
348 
/* ******* */
349 
 
350 
static const BxOpcodeInfo_t BxOpcodeInfoG4[8] = {
351 
  /* 0 */ { BxLockable, BX_IA_INC_Eb },
352 
  /* 1 */ { BxLockable, BX_IA_DEC_Eb },
353 
  /* 2 */ { 0, BX_IA_ERROR },
354 
  /* 3 */ { 0, BX_IA_ERROR },
355 
  /* 4 */ { 0, BX_IA_ERROR },
356 
  /* 5 */ { 0, BX_IA_ERROR },
357 
  /* 6 */ { 0, BX_IA_ERROR },
358 
  /* 7 */ { 0, BX_IA_ERROR }
359 
};
360 
 
361 
/* ******* */
362 
/* Group 5 */
363 
/* ******* */
364 
 
365 
static const BxOpcodeInfo_t BxOpcodeInfoG5w[8] = {
366 
  // attributes defined in main area
367 
  /* 0 */ { BxLockable, BX_IA_INC_Ew },
368 
  /* 1 */ { BxLockable, BX_IA_DEC_Ew },
369 
  /* 2 */ { BxTraceEnd, BX_IA_CALL_Ew },
370 
  /* 3 */ { BxTraceEnd, BX_IA_CALL16_Ep },
371 
  /* 4 */ { BxTraceEnd, BX_IA_JMP_Ew },
372 
  /* 5 */ { BxTraceEnd, BX_IA_JMP16_Ep },
373 
  /* 6 */ { 0, BX_IA_PUSH_Ew },
374 
  /* 7 */ { 0, BX_IA_ERROR }
375 
};
376 
 
377 
static const BxOpcodeInfo_t BxOpcodeInfoG5d[8] = {
378 
  // attributes defined in main area
379 
  /* 0 */ { BxLockable, BX_IA_INC_Ed },
380 
  /* 1 */ { BxLockable, BX_IA_DEC_Ed },
381 
  /* 2 */ { BxTraceEnd, BX_IA_CALL_Ed },
382 
  /* 3 */ { BxTraceEnd, BX_IA_CALL32_Ep },
383 
  /* 4 */ { BxTraceEnd, BX_IA_JMP_Ed },
384 
  /* 5 */ { BxTraceEnd, BX_IA_JMP32_Ep },
385 
  /* 6 */ { 0, BX_IA_PUSH_Ed },
386 
  /* 7 */ { 0, BX_IA_ERROR }
387 
};
388 
 
389 
#if BX_SUPPORT_X86_64
390 
static const BxOpcodeInfo_t BxOpcodeInfo64G5w[8] = {
391 
  /* 0 */ { BxLockable, BX_IA_INC_Ew },
392 
  /* 1 */ { BxLockable, BX_IA_DEC_Ew },
393 
  /* 2 */ { BxTraceEnd, BX_IA_CALL_Eq },
394 
  /* 3 */ { BxTraceEnd, BX_IA_CALL16_Ep },
395 
  /* 4 */ { BxTraceEnd, BX_IA_JMP_Eq },
396 
  /* 5 */ { BxTraceEnd, BX_IA_JMP16_Ep },
397 
  /* 6 */ { 0, BX_IA_PUSH_Ew },
398 
  /* 7 */ { 0, BX_IA_ERROR }
399 
};
400 
 
401 
static const BxOpcodeInfo_t BxOpcodeInfo64G5d[8] = {
402 
  /* 0 */ { BxLockable, BX_IA_INC_Ed },
403 
  /* 1 */ { BxLockable, BX_IA_DEC_Ed },
404 
  /* 2 */ { BxTraceEnd, BX_IA_CALL_Eq },
405 
  /* 3 */ { BxTraceEnd, BX_IA_CALL32_Ep },
406 
  /* 4 */ { BxTraceEnd, BX_IA_JMP_Eq },
407 
  /* 5 */ { BxTraceEnd, BX_IA_JMP32_Ep },
408 
  /* 6 */ { 0, BX_IA_PUSH_Eq },
409 
  /* 7 */ { 0, BX_IA_ERROR }
410 
};
411 
 
412 
static const BxOpcodeInfo_t BxOpcodeInfo64G5q[8] = {
413 
  /* 0 */ { BxLockable, BX_IA_INC_Eq },
414 
  /* 1 */ { BxLockable, BX_IA_DEC_Eq },
415 
  /* 2 */ { BxTraceEnd, BX_IA_CALL_Eq },
416 
  /* 3 */ { BxTraceEnd, BX_IA_CALL64_Ep }, // TODO: 64-bit offset for Intel
417 
  /* 4 */ { BxTraceEnd, BX_IA_JMP_Eq },
418 
  /* 5 */ { BxTraceEnd, BX_IA_JMP64_Ep },  // TODO: 64-bit offset for Intel
419 
  /* 6 */ { 0, BX_IA_PUSH_Eq },
420 
  /* 7 */ { 0, BX_IA_ERROR }
421 
};
422 
#endif
423 
 
424 
/* ******* */
425 
/* Group 6 */
426 
/* ******* */
427 
 
428 
static const BxOpcodeInfo_t BxOpcodeInfoG6[8] = {
429 
  /* 0 */ { 0, BX_IA_SLDT_Ew },
430 
  /* 1 */ { 0, BX_IA_STR_Ew },
431 
  /* 2 */ { 0, BX_IA_LLDT_Ew },
432 
  /* 3 */ { 0, BX_IA_LTR_Ew },
433 
  /* 4 */ { 0, BX_IA_VERR_Ew },
434 
  /* 5 */ { 0, BX_IA_VERW_Ew },
435 
  /* 6 */ { 0, BX_IA_ERROR },
436 
  /* 7 */ { 0, BX_IA_ERROR }
437 
};
438 
 
439 
/* ******* */
440 
/* Group 7 */
441 
/* ******* */
442 
 
443 
static const BxOpcodeInfo_t BxOpcodeInfoG7[64+8] = {
444 
  /* /m form */
445 
  /* 0 */ { 0, BX_IA_SGDT_Ms },
446 
  /* 1 */ { 0, BX_IA_SIDT_Ms },
447 
  /* 2 */ { 0, BX_IA_LGDT_Ms },
448 
  /* 3 */ { 0, BX_IA_LIDT_Ms },
449 
  /* 4 */ { 0, BX_IA_SMSW_Ew },
450 
  /* 5 */ { 0, BX_IA_ERROR },
451 
  /* 6 */ { BxTraceEnd, BX_IA_LMSW_Ew },
452 
  /* 7 */ { BxTraceEnd, BX_IA_INVLPG },
453 
 
454 
  /* /r form */
455 
  /* 0F 01 C0 */ { 0, BX_IA_ERROR },
456 
  /* 0F 01 C1 */ { 0, BX_IA_ERROR },//AO{ BxTraceEnd | BxPrefixSSE, BX_IA_VMCALL, BxOpcodeGroupSSE_ERR },
457 
  /* 0F 01 C2 */ { 0, BX_IA_ERROR },//AO{ BxTraceEnd | BxPrefixSSE, BX_IA_VMLAUNCH, BxOpcodeGroupSSE_ERR },
458 
  /* 0F 01 C3 */ { 0, BX_IA_ERROR },//AO{ BxTraceEnd | BxPrefixSSE, BX_IA_VMRESUME, BxOpcodeGroupSSE_ERR },
459 
  /* 0F 01 C4 */ { 0, BX_IA_ERROR },//AO{ BxTraceEnd | BxPrefixSSE, BX_IA_VMXOFF, BxOpcodeGroupSSE_ERR },
460 
  /* 0F 01 C5 */ { 0, BX_IA_ERROR },
461 
  /* 0F 01 C6 */ { 0, BX_IA_ERROR },
462 
  /* 0F 01 C7 */ { 0, BX_IA_ERROR },
463 
  /* 0F 01 C8 */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MONITOR, BxOpcodeGroupSSE_ERR },
464 
  /* 0F 01 C9 */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE | BxTraceEnd, BX_IA_MWAIT, BxOpcodeGroupSSE_ERR },
465 
  /* 0F 01 CA */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_CLAC },
466 
  /* 0F 01 CB */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_STAC },
467 
  /* 0F 01 CC */ { 0, BX_IA_ERROR },
468 
  /* 0F 01 CD */ { 0, BX_IA_ERROR },
469 
  /* 0F 01 CE */ { 0, BX_IA_ERROR },
470 
  /* 0F 01 CF */ { 0, BX_IA_ERROR },
471 
  /* 0F 01 D0 */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_XGETBV, BxOpcodeGroupSSE_ERR },
472 
  /* 0F 01 D1 */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE | BxTraceEnd, BX_IA_XSETBV, BxOpcodeGroupSSE_ERR },
473 
  /* 0F 01 D2 */ { 0, BX_IA_ERROR },
474 
  /* 0F 01 D3 */ { 0, BX_IA_ERROR },
475 
  /* 0F 01 D4 */ { 0, BX_IA_ERROR },//AO{ BxTraceEnd | BxPrefixSSE, BX_IA_VMFUNC, BxOpcodeGroupSSE_ERR },
476 
  /* 0F 01 D5 */ { 0, BX_IA_ERROR },
477 
  /* 0F 01 D6 */ { 0, BX_IA_ERROR },
478 
  /* 0F 01 D7 */ { 0, BX_IA_ERROR },
479 
  /* 0F 01 D8 */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_VMRUN },
480 
  /* 0F 01 D9 */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_VMMCALL },
481 
  /* 0F 01 DA */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_VMLOAD },
482 
  /* 0F 01 DB */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_VMSAVE },
483 
  /* 0F 01 DC */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_STGI },
484 
  /* 0F 01 DD */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_CLGI },
485 
  /* 0F 01 DE */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_SKINIT },
486 
  /* 0F 01 DF */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_INVLPGA },
487 
  /* 0F 01 E0 */ { 0, BX_IA_SMSW_Ew },
488 
  /* 0F 01 E1 */ { 0, BX_IA_SMSW_Ew },
489 
  /* 0F 01 E2 */ { 0, BX_IA_SMSW_Ew },
490 
  /* 0F 01 E3 */ { 0, BX_IA_SMSW_Ew },
491 
  /* 0F 01 E4 */ { 0, BX_IA_SMSW_Ew },
492 
  /* 0F 01 E5 */ { 0, BX_IA_SMSW_Ew },
493 
  /* 0F 01 E6 */ { 0, BX_IA_SMSW_Ew },
494 
  /* 0F 01 E7 */ { 0, BX_IA_SMSW_Ew },
495 
  /* 0F 01 E8 */ { 0, BX_IA_ERROR },
496 
  /* 0F 01 E9 */ { 0, BX_IA_ERROR },
497 
  /* 0F 01 EA */ { 0, BX_IA_ERROR },
498 
  /* 0F 01 EB */ { 0, BX_IA_ERROR },
499 
  /* 0F 01 EC */ { 0, BX_IA_ERROR },
500 
  /* 0F 01 ED */ { 0, BX_IA_ERROR },
501 
  /* 0F 01 EE */ { 0, BX_IA_ERROR },
502 
  /* 0F 01 EF */ { 0, BX_IA_ERROR },
503 
  /* 0F 01 F0 */ { BxTraceEnd, BX_IA_LMSW_Ew },
504 
  /* 0F 01 F1 */ { BxTraceEnd, BX_IA_LMSW_Ew },
505 
  /* 0F 01 F2 */ { BxTraceEnd, BX_IA_LMSW_Ew },
506 
  /* 0F 01 F3 */ { BxTraceEnd, BX_IA_LMSW_Ew },
507 
  /* 0F 01 F4 */ { BxTraceEnd, BX_IA_LMSW_Ew },
508 
  /* 0F 01 F5 */ { BxTraceEnd, BX_IA_LMSW_Ew },
509 
  /* 0F 01 F6 */ { BxTraceEnd, BX_IA_LMSW_Ew },
510 
  /* 0F 01 F7 */ { BxTraceEnd, BX_IA_LMSW_Ew },
511 
  /* 0F 01 F8 */ { 0, BX_IA_ERROR },
512 
  /* 0F 01 F9 */ { 0, BX_IA_ERROR },//AO{ BxTraceEnd, BX_IA_RDTSCP }, // end trace to avoid multiple TSC samples in one cycle
513 
  /* 0F 01 FA */ { 0, BX_IA_ERROR },
514 
  /* 0F 01 FB */ { 0, BX_IA_ERROR },
515 
  /* 0F 01 FC */ { 0, BX_IA_ERROR },
516 
  /* 0F 01 FD */ { 0, BX_IA_ERROR },
517 
  /* 0F 01 FE */ { 0, BX_IA_ERROR },
518 
  /* 0F 01 FF */ { 0, BX_IA_ERROR }
519 
};
520 
 
521 
#if BX_SUPPORT_X86_64
522 
static const BxOpcodeInfo_t BxOpcodeInfoG7q[64+8] = {
523 
  /* /m form */
524 
  /* 0 */ { 0, BX_IA_SGDT64_Ms },
525 
  /* 1 */ { 0, BX_IA_SIDT64_Ms },
526 
  /* 2 */ { 0, BX_IA_LGDT64_Ms },
527 
  /* 3 */ { 0, BX_IA_LIDT64_Ms },
528 
  /* 4 */ { 0, BX_IA_SMSW_Ew },
529 
  /* 5 */ { 0, BX_IA_ERROR },
530 
  /* 6 */ { BxTraceEnd, BX_IA_LMSW_Ew },
531 
  /* 7 */ { BxTraceEnd, BX_IA_INVLPG },
532 
 
533 
  /* /r form */
534 
  /* 0F 01 C0 */ { 0, BX_IA_ERROR },
535 
  /* 0F 01 C1 */ { BxTraceEnd | BxPrefixSSE, BX_IA_VMCALL, BxOpcodeGroupSSE_ERR },
536 
  /* 0F 01 C2 */ { BxTraceEnd | BxPrefixSSE, BX_IA_VMLAUNCH, BxOpcodeGroupSSE_ERR },
537 
  /* 0F 01 C3 */ { BxTraceEnd | BxPrefixSSE, BX_IA_VMRESUME, BxOpcodeGroupSSE_ERR },
538 
  /* 0F 01 C4 */ { BxTraceEnd | BxPrefixSSE, BX_IA_VMXOFF, BxOpcodeGroupSSE_ERR },
539 
  /* 0F 01 C5 */ { 0, BX_IA_ERROR },
540 
  /* 0F 01 C6 */ { 0, BX_IA_ERROR },
541 
  /* 0F 01 C7 */ { 0, BX_IA_ERROR },
542 
  /* 0F 01 C8 */ { BxPrefixSSE, BX_IA_MONITOR, BxOpcodeGroupSSE_ERR },
543 
  /* 0F 01 C9 */ { BxPrefixSSE | BxTraceEnd, BX_IA_MWAIT, BxOpcodeGroupSSE_ERR },
544 
  /* 0F 01 CA */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_CLAC },
545 
  /* 0F 01 CB */ { 0, BX_IA_ERROR },//AO{ 0, BX_IA_STAC },
546 
  /* 0F 01 CC */ { 0, BX_IA_ERROR },
547 
  /* 0F 01 CD */ { 0, BX_IA_ERROR },
548 
  /* 0F 01 CE */ { 0, BX_IA_ERROR },
549 
  /* 0F 01 CF */ { 0, BX_IA_ERROR },
550 
  /* 0F 01 D0 */ { BxPrefixSSE, BX_IA_XGETBV, BxOpcodeGroupSSE_ERR },
551 
  /* 0F 01 D1 */ { BxPrefixSSE | BxTraceEnd, BX_IA_XSETBV, BxOpcodeGroupSSE_ERR },
552 
  /* 0F 01 D2 */ { 0, BX_IA_ERROR },
553 
  /* 0F 01 D3 */ { 0, BX_IA_ERROR },
554 
  /* 0F 01 D4 */ { BxTraceEnd | BxPrefixSSE, BX_IA_VMFUNC, BxOpcodeGroupSSE_ERR },
555 
  /* 0F 01 D5 */ { 0, BX_IA_ERROR },
556 
  /* 0F 01 D6 */ { 0, BX_IA_ERROR },
557 
  /* 0F 01 D7 */ { 0, BX_IA_ERROR },
558 
  /* 0F 01 D8 */ { 0, BX_IA_VMRUN },
559 
  /* 0F 01 D9 */ { 0, BX_IA_VMMCALL },
560 
  /* 0F 01 DA */ { 0, BX_IA_VMLOAD },
561 
  /* 0F 01 DB */ { 0, BX_IA_VMSAVE },
562 
  /* 0F 01 DC */ { 0, BX_IA_STGI },
563 
  /* 0F 01 DD */ { 0, BX_IA_CLGI },
564 
  /* 0F 01 DE */ { 0, BX_IA_SKINIT },
565 
  /* 0F 01 DF */ { 0, BX_IA_INVLPGA },
566 
  /* 0F 01 E0 */ { 0, BX_IA_SMSW_Ew },
567 
  /* 0F 01 E1 */ { 0, BX_IA_SMSW_Ew },
568 
  /* 0F 01 E2 */ { 0, BX_IA_SMSW_Ew },
569 
  /* 0F 01 E3 */ { 0, BX_IA_SMSW_Ew },
570 
  /* 0F 01 E4 */ { 0, BX_IA_SMSW_Ew },
571 
  /* 0F 01 E5 */ { 0, BX_IA_SMSW_Ew },
572 
  /* 0F 01 E6 */ { 0, BX_IA_SMSW_Ew },
573 
  /* 0F 01 E7 */ { 0, BX_IA_SMSW_Ew },
574 
  /* 0F 01 E8 */ { 0, BX_IA_ERROR },
575 
  /* 0F 01 E9 */ { 0, BX_IA_ERROR },
576 
  /* 0F 01 EA */ { 0, BX_IA_ERROR },
577 
  /* 0F 01 EB */ { 0, BX_IA_ERROR },
578 
  /* 0F 01 EC */ { 0, BX_IA_ERROR },
579 
  /* 0F 01 ED */ { 0, BX_IA_ERROR },
580 
  /* 0F 01 EE */ { 0, BX_IA_ERROR },
581 
  /* 0F 01 EF */ { 0, BX_IA_ERROR },
582 
  /* 0F 01 F0 */ { BxTraceEnd, BX_IA_LMSW_Ew },
583 
  /* 0F 01 F1 */ { BxTraceEnd, BX_IA_LMSW_Ew },
584 
  /* 0F 01 F2 */ { BxTraceEnd, BX_IA_LMSW_Ew },
585 
  /* 0F 01 F3 */ { BxTraceEnd, BX_IA_LMSW_Ew },
586 
  /* 0F 01 F4 */ { BxTraceEnd, BX_IA_LMSW_Ew },
587 
  /* 0F 01 F5 */ { BxTraceEnd, BX_IA_LMSW_Ew },
588 
  /* 0F 01 F6 */ { BxTraceEnd, BX_IA_LMSW_Ew },
589 
  /* 0F 01 F7 */ { BxTraceEnd, BX_IA_LMSW_Ew },
590 
  /* 0F 01 F8 */ { 0, BX_IA_SWAPGS },
591 
  /* 0F 01 F9 */ { BxTraceEnd, BX_IA_RDTSCP }, // end trace to avoid multiple TSC samples in one cycle
592 
  /* 0F 01 FA */ { 0, BX_IA_ERROR },
593 
  /* 0F 01 FB */ { 0, BX_IA_ERROR },
594 
  /* 0F 01 FC */ { 0, BX_IA_ERROR },
595 
  /* 0F 01 FD */ { 0, BX_IA_ERROR },
596 
  /* 0F 01 FE */ { 0, BX_IA_ERROR },
597 
  /* 0F 01 FF */ { 0, BX_IA_ERROR }
598 
};
599 
#endif
600 
 
601 
/* ******* */
602 
/* Group 8 */
603 
/* ******* */
604 
 
605 
static const BxOpcodeInfo_t BxOpcodeInfoG8EwIb[8] = {
606 
  /* 0 */ { 0, BX_IA_ERROR },
607 
  /* 1 */ { 0, BX_IA_ERROR },
608 
  /* 2 */ { 0, BX_IA_ERROR },
609 
  /* 3 */ { 0, BX_IA_ERROR },
610 
  /* 4 */ { BxImmediate_Ib,              BX_IA_BT_EwIb },
611 
  /* 5 */ { BxImmediate_Ib | BxLockable, BX_IA_BTS_EwIb },
612 
  /* 6 */ { BxImmediate_Ib | BxLockable, BX_IA_BTR_EwIb },
613 
  /* 7 */ { BxImmediate_Ib | BxLockable, BX_IA_BTC_EwIb }
614 
};
615 
 
616 
static const BxOpcodeInfo_t BxOpcodeInfoG8EdIb[8] = {
617 
  /* 0 */ { 0, BX_IA_ERROR },
618 
  /* 1 */ { 0, BX_IA_ERROR },
619 
  /* 2 */ { 0, BX_IA_ERROR },
620 
  /* 3 */ { 0, BX_IA_ERROR },
621 
  /* 4 */ { BxImmediate_Ib,              BX_IA_BT_EdIb },
622 
  /* 5 */ { BxImmediate_Ib | BxLockable, BX_IA_BTS_EdIb },
623 
  /* 6 */ { BxImmediate_Ib | BxLockable, BX_IA_BTR_EdIb },
624 
  /* 7 */ { BxImmediate_Ib | BxLockable, BX_IA_BTC_EdIb }
625 
};
626 
 
627 
#if BX_SUPPORT_X86_64
628 
static const BxOpcodeInfo_t BxOpcodeInfo64G8EqIb[8] = {
629 
  /* 0 */ { 0, BX_IA_ERROR },
630 
  /* 1 */ { 0, BX_IA_ERROR },
631 
  /* 2 */ { 0, BX_IA_ERROR },
632 
  /* 3 */ { 0, BX_IA_ERROR },
633 
  /* 4 */ { BxImmediate_Ib,              BX_IA_BT_EqIb },
634 
  /* 5 */ { BxImmediate_Ib | BxLockable, BX_IA_BTS_EqIb },
635 
  /* 6 */ { BxImmediate_Ib | BxLockable, BX_IA_BTR_EqIb },
636 
  /* 7 */ { BxImmediate_Ib | BxLockable, BX_IA_BTC_EqIb }
637 
};
638 
#endif
639 
 
640 
/* ******* */
641 
/* Group 9 */
642 
/* ******* */
643 
 
644 
static const BxOpcodeInfo_t BxOpcodeInfoG9w[8*2] = {
645 
  /* /r form */
646 
  /* 0 */ { 0, BX_IA_ERROR },
647 
  /* 1 */ { 0, BX_IA_ERROR },
648 
  /* 2 */ { 0, BX_IA_ERROR },
649 
  /* 3 */ { 0, BX_IA_ERROR },
650 
  /* 4 */ { 0, BX_IA_ERROR },
651 
  /* 5 */ { 0, BX_IA_ERROR },
652 
  /* 6 */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSEF2F3, BX_IA_RDRAND_Ew, BxOpcodeGroupSSE_ERR },
653 
  /* 7 */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSEF2F3, BX_IA_RDSEED_Ew, BxOpcodeGroupSSE_ERR },
654 
 
655 
  /* /m form */
656 
  /* 0 */ { 0, BX_IA_ERROR },
657 
  /* 1 */ { 0, BX_IA_ERROR },//AO{ BxLockable, BX_IA_CMPXCHG8B },
658 
  /* 2 */ { 0, BX_IA_ERROR },
659 
  /* 3 */ { 0, BX_IA_ERROR },
660 
  /* 4 */ { 0, BX_IA_ERROR },
661 
  /* 5 */ { 0, BX_IA_ERROR },
662 
  /* 6 */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_VMPTRLD_Mq, BxOpcodeGroupSSE_G9VMX6 },
663 
  /* 7 */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_VMPTRST_Mq, BxOpcodeGroupSSE_ERR }
664 
};
665 
 
666 
static const BxOpcodeInfo_t BxOpcodeInfoG9d[8*2] = {
667 
  /* /r form */
668 
  /* 0 */ { 0, BX_IA_ERROR },
669 
  /* 1 */ { 0, BX_IA_ERROR },
670 
  /* 2 */ { 0, BX_IA_ERROR },
671 
  /* 3 */ { 0, BX_IA_ERROR },
672 
  /* 4 */ { 0, BX_IA_ERROR },
673 
  /* 5 */ { 0, BX_IA_ERROR },
674 
  /* 6 */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSEF2F3, BX_IA_RDRAND_Ed, BxOpcodeGroupSSE_ERR },
675 
  /* 7 */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSEF2F3, BX_IA_RDSEED_Ed, BxOpcodeGroupSSE_ERR },
676 
 
677 
  /* /m form */
678 
  /* 0 */ { 0, BX_IA_ERROR },
679 
  /* 1 */ { 0, BX_IA_ERROR },//AO{ BxLockable, BX_IA_CMPXCHG8B },
680 
  /* 2 */ { 0, BX_IA_ERROR },
681 
  /* 3 */ { 0, BX_IA_ERROR },
682 
  /* 4 */ { 0, BX_IA_ERROR },
683 
  /* 5 */ { 0, BX_IA_ERROR },
684 
  /* 6 */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_VMPTRLD_Mq, BxOpcodeGroupSSE_G9VMX6 },
685 
  /* 7 */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_VMPTRST_Mq, BxOpcodeGroupSSE_ERR }
686 
};
687 
 
688 
#if BX_SUPPORT_X86_64
689 
static const BxOpcodeInfo_t BxOpcodeInfo64G9q[8*2] = {
690 
  /* /r form */
691 
  /* 0 */ { 0, BX_IA_ERROR },
692 
  /* 1 */ { 0, BX_IA_ERROR },
693 
  /* 2 */ { 0, BX_IA_ERROR },
694 
  /* 3 */ { 0, BX_IA_ERROR },
695 
  /* 4 */ { 0, BX_IA_ERROR },
696 
  /* 5 */ { 0, BX_IA_ERROR },
697 
  /* 6 */ { BxPrefixSSEF2F3, BX_IA_RDRAND_Eq, BxOpcodeGroupSSE_ERR },
698 
  /* 7 */ { BxPrefixSSEF2F3, BX_IA_RDSEED_Eq, BxOpcodeGroupSSE_ERR },
699 
 
700 
  /* /m form */
701 
  /* 0 */ { 0, BX_IA_ERROR },
702 
  /* 1 */ { BxLockable, BX_IA_CMPXCHG16B },
703 
  /* 2 */ { 0, BX_IA_ERROR },
704 
  /* 3 */ { 0, BX_IA_ERROR },
705 
  /* 4 */ { 0, BX_IA_ERROR },
706 
  /* 5 */ { 0, BX_IA_ERROR },
707 
  /* 6 */ { BxPrefixSSE, BX_IA_VMPTRLD_Mq, BxOpcodeGroupSSE_G9VMX6 },
708 
  /* 7 */ { BxPrefixSSE, BX_IA_VMPTRST_Mq, BxOpcodeGroupSSE_ERR }
709 
};
710 
#endif
711 
 
712 
/* ******** */
713 
/* Group 11 */
714 
/* ******** */
715 
 
716 
static const BxOpcodeInfo_t BxOpcodeInfoG11Eb[8] = {
717 
  /* 0 */ { BxImmediate_Ib, BX_IA_MOV_EbIb },
718 
  /* 1 */ { 0, BX_IA_ERROR },
719 
  /* 2 */ { 0, BX_IA_ERROR },
720 
  /* 3 */ { 0, BX_IA_ERROR },
721 
  /* 4 */ { 0, BX_IA_ERROR },
722 
  /* 5 */ { 0, BX_IA_ERROR },
723 
  /* 6 */ { 0, BX_IA_ERROR },
724 
  /* 7 */ { 0, BX_IA_ERROR }
725 
};
726 
 
727 
static const BxOpcodeInfo_t BxOpcodeInfoG11Ew[8] = {
728 
  /* 0 */ { BxImmediate_Iw, BX_IA_MOV_EwIw },
729 
  /* 1 */ { 0, BX_IA_ERROR },
730 
  /* 2 */ { 0, BX_IA_ERROR },
731 
  /* 3 */ { 0, BX_IA_ERROR },
732 
  /* 4 */ { 0, BX_IA_ERROR },
733 
  /* 5 */ { 0, BX_IA_ERROR },
734 
  /* 6 */ { 0, BX_IA_ERROR },
735 
  /* 7 */ { 0, BX_IA_ERROR }
736 
};
737 
 
738 
static const BxOpcodeInfo_t BxOpcodeInfoG11Ed[8] = {
739 
  /* 0 */ { BxImmediate_Id, BX_IA_MOV_EdId },
740 
  /* 1 */ { 0, BX_IA_ERROR },
741 
  /* 2 */ { 0, BX_IA_ERROR },
742 
  /* 3 */ { 0, BX_IA_ERROR },
743 
  /* 4 */ { 0, BX_IA_ERROR },
744 
  /* 5 */ { 0, BX_IA_ERROR },
745 
  /* 6 */ { 0, BX_IA_ERROR },
746 
  /* 7 */ { 0, BX_IA_ERROR }
747 
};
748 
 
749 
#if BX_SUPPORT_X86_64
750 
static const BxOpcodeInfo_t BxOpcodeInfo64G11Eq[8] = {
751 
  /* 0 */ { BxImmediate_Id, BX_IA_MOV_EqId },
752 
  /* 1 */ { 0, BX_IA_ERROR },
753 
  /* 2 */ { 0, BX_IA_ERROR },
754 
  /* 3 */ { 0, BX_IA_ERROR },
755 
  /* 4 */ { 0, BX_IA_ERROR },
756 
  /* 5 */ { 0, BX_IA_ERROR },
757 
  /* 6 */ { 0, BX_IA_ERROR },
758 
  /* 7 */ { 0, BX_IA_ERROR }
759 
};
760 
#endif
761 
 
762 
/* ******** */
763 
/* Group 12 */
764 
/* ******** */
765 
 
766 
static const BxOpcodeInfo_t BxOpcodeInfoG12R[8] = {
767 
  /* 0 */ { 0, BX_IA_ERROR },
768 
  /* 1 */ { 0, BX_IA_ERROR },
769 
  /* 2 */ { 0, BX_IA_ERROR },//AO{ BxImmediate_Ib | BxPrefixSSE, BX_IA_PSRLW_PqIb, BxOpcodeGroupSSE_G1202 },
770 
  /* 3 */ { 0, BX_IA_ERROR },
771 
  /* 4 */ { 0, BX_IA_ERROR },//AO{ BxImmediate_Ib | BxPrefixSSE, BX_IA_PSRAW_PqIb, BxOpcodeGroupSSE_G1204 },
772 
  /* 5 */ { 0, BX_IA_ERROR },
773 
  /* 6 */ { 0, BX_IA_ERROR },//AO{ BxImmediate_Ib | BxPrefixSSE, BX_IA_PSLLW_PqIb, BxOpcodeGroupSSE_G1206 },
774 
  /* 7 */ { 0, BX_IA_ERROR }
775 
};
776 
 
777 
/* ******** */
778 
/* Group 13 */
779 
/* ******** */
780 
 
781 
static const BxOpcodeInfo_t BxOpcodeInfoG13R[8] = {
782 
  /* 0 */ { 0, BX_IA_ERROR },
783 
  /* 1 */ { 0, BX_IA_ERROR },
784 
  /* 2 */ { 0, BX_IA_ERROR },//AO{ BxImmediate_Ib | BxPrefixSSE, BX_IA_PSRLD_PqIb, BxOpcodeGroupSSE_G1302 },
785 
  /* 3 */ { 0, BX_IA_ERROR },
786 
  /* 4 */ { 0, BX_IA_ERROR },//AO{ BxImmediate_Ib | BxPrefixSSE, BX_IA_PSRAD_PqIb, BxOpcodeGroupSSE_G1304 },
787 
  /* 5 */ { 0, BX_IA_ERROR },
788 
  /* 6 */ { 0, BX_IA_ERROR },//AO{ BxImmediate_Ib | BxPrefixSSE, BX_IA_PSLLD_PqIb, BxOpcodeGroupSSE_G1306 },
789 
  /* 7 */ { 0, BX_IA_ERROR }
790 
};
791 
 
792 
/* ******** */
793 
/* Group 14 */
794 
/* ******** */
795 
 
796 
static const BxOpcodeInfo_t BxOpcodeInfoG14R[8] = {
797 
  /* 0 */ { 0, BX_IA_ERROR },
798 
  /* 1 */ { 0, BX_IA_ERROR },
799 
  /* 2 */ { 0, BX_IA_ERROR },//AO{ BxImmediate_Ib | BxPrefixSSE, BX_IA_PSRLQ_PqIb, BxOpcodeGroupSSE_G1402 },
800 
  /* 3 */ { 0, BX_IA_ERROR },//AO{ BxImmediate_Ib | BxPrefixSSE66, BX_IA_PSRLDQ_UdqIb },
801 
  /* 4 */ { 0, BX_IA_ERROR },
802 
  /* 5 */ { 0, BX_IA_ERROR },
803 
  /* 6 */ { 0, BX_IA_ERROR },//AO{ BxImmediate_Ib | BxPrefixSSE, BX_IA_PSLLQ_PqIb, BxOpcodeGroupSSE_G1406 },
804 
  /* 7 */ { 0, BX_IA_ERROR },//AO{ BxImmediate_Ib | BxPrefixSSE66, BX_IA_PSLLDQ_UdqIb }
805 
};
806 
 
807 
/* ******** */
808 
/* Group 15 */
809 
/* ******** */
810 
 
811 
static const BxOpcodeInfo_t BxOpcodeInfoG15[8*2] = {
812 
  /* /r form */
813 
  /* 0 */ { 0, BX_IA_ERROR },
814 
  /* 1 */ { 0, BX_IA_ERROR },
815 
  /* 2 */ { 0, BX_IA_ERROR },
816 
  /* 3 */ { 0, BX_IA_ERROR },
817 
  /* 4 */ { 0, BX_IA_ERROR },
818 
  /* 5 */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_LFENCE, BxOpcodeGroupSSE_ERR },
819 
  /* 6 */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_MFENCE, BxOpcodeGroupSSE_ERR },
820 
  /* 7 */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_SFENCE, BxOpcodeGroupSSE_ERR },
821 
 
822 
  /* /m form */
823 
  /* 0 */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_FXSAVE,   BxOpcodeGroupSSE_ERR },
824 
  /* 1 */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_FXRSTOR,  BxOpcodeGroupSSE_ERR },
825 
  /* 2 */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_LDMXCSR,  BxOpcodeGroupSSE_ERR },
826 
  /* 3 */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_STMXCSR,  BxOpcodeGroupSSE_ERR },
827 
  /* 4 */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_XSAVE,    BxOpcodeGroupSSE_ERR },
828 
  /* 5 */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_XRSTOR,   BxOpcodeGroupSSE_ERR },
829 
  /* 6 */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_XSAVEOPT, BxOpcodeGroupSSE_ERR },
830 
  /* 7 */ { 0, BX_IA_ERROR },//AO{ BxPrefixSSE, BX_IA_CLFLUSH,  BxOpcodeGroupSSE_ERR }
831 
};
832 
 
833 
#if BX_SUPPORT_X86_64
834 
static const BxOpcodeInfo_t BxOpcodeInfoG15q[8*2] = {
835 
  /* /r form */
836 
  /* 0 */ { BxPrefixSSEF3, BX_IA_RDFSBASE },
837 
  /* 1 */ { BxPrefixSSEF3, BX_IA_RDGSBASE },
838 
  /* 2 */ { BxPrefixSSEF3, BX_IA_WRFSBASE },
839 
  /* 3 */ { BxPrefixSSEF3, BX_IA_WRGSBASE },
840 
  /* 4 */ { 0, BX_IA_ERROR },
841 
  /* 5 */ { BxPrefixSSE, BX_IA_LFENCE, BxOpcodeGroupSSE_ERR },
842 
  /* 6 */ { BxPrefixSSE, BX_IA_MFENCE, BxOpcodeGroupSSE_ERR },
843 
  /* 7 */ { BxPrefixSSE, BX_IA_SFENCE, BxOpcodeGroupSSE_ERR },
844 
 
845 
  /* /m form */
846 
  /* 0 */ { BxPrefixSSE, BX_IA_FXSAVE,   BxOpcodeGroupSSE_ERR },
847 
  /* 1 */ { BxPrefixSSE, BX_IA_FXRSTOR,  BxOpcodeGroupSSE_ERR },
848 
  /* 2 */ { BxPrefixSSE, BX_IA_LDMXCSR,  BxOpcodeGroupSSE_ERR },
849 
  /* 3 */ { BxPrefixSSE, BX_IA_STMXCSR,  BxOpcodeGroupSSE_ERR },
850 
  /* 4 */ { BxPrefixSSE, BX_IA_XSAVE,    BxOpcodeGroupSSE_ERR },
851 
  /* 5 */ { BxPrefixSSE, BX_IA_XRSTOR,   BxOpcodeGroupSSE_ERR },
852 
  /* 6 */ { BxPrefixSSE, BX_IA_XSAVEOPT, BxOpcodeGroupSSE_ERR },
853 
  /* 7 */ { BxPrefixSSE, BX_IA_CLFLUSH,  BxOpcodeGroupSSE_ERR }
854 
};
855 
#endif
856 
 
857 
static const BxOpcodeInfo_t BxOpcodeInfoMOV_RdCd[8] = {
858 
  /* 0 */ { 0, BX_IA_MOV_RdCR0 },
859 
  /* 1 */ { 0, BX_IA_ERROR },
860 
  /* 2 */ { 0, BX_IA_MOV_RdCR2 },
861 
  /* 3 */ { 0, BX_IA_MOV_RdCR3 },
862 
  /* 4 */ { 0, BX_IA_ERROR }, //AO{ 0, BX_IA_MOV_RdCR4 },
863 
  /* 5 */ { 0, BX_IA_ERROR },
864 
  /* 6 */ { 0, BX_IA_ERROR },
865 
  /* 7 */ { 0, BX_IA_ERROR }
866 
};
867 
 
868 
static const BxOpcodeInfo_t BxOpcodeInfoMOV_CdRd[8] = {
869 
  /* 0 */ { BxTraceEnd, BX_IA_MOV_CR0Rd },
870 
  /* 1 */ { 0, BX_IA_ERROR },
871 
  /* 2 */ { 0, BX_IA_MOV_CR2Rd },
872 
  /* 3 */ { BxTraceEnd, BX_IA_MOV_CR3Rd },
873 
  /* 4 */ { 0, BX_IA_ERROR }, //AO{ BxTraceEnd, BX_IA_MOV_CR4Rd },
874 
  /* 5 */ { 0, BX_IA_ERROR },
875 
  /* 6 */ { 0, BX_IA_ERROR },
876 
  /* 7 */ { 0, BX_IA_ERROR }
877 
};
878 
 
879 
#if BX_SUPPORT_X86_64
880 
static const BxOpcodeInfo_t BxOpcodeInfoMOV_RqCq[8] = {
881 
  /* 0 */ { 0, BX_IA_MOV_RqCR0 },
882 
  /* 1 */ { 0, BX_IA_ERROR },
883 
  /* 2 */ { 0, BX_IA_MOV_RqCR2 },
884 
  /* 3 */ { 0, BX_IA_MOV_RqCR3 },
885 
  /* 4 */ { 0, BX_IA_MOV_RqCR4 },
886 
  /* 5 */ { 0, BX_IA_ERROR },
887 
  /* 6 */ { 0, BX_IA_ERROR },
888 
  /* 7 */ { 0, BX_IA_ERROR }
889 
};
890 
 
891 
static const BxOpcodeInfo_t BxOpcodeInfoMOV_CqRq[8] = {
892 
  /* 0 */ { BxTraceEnd, BX_IA_MOV_CR0Rq },
893 
  /* 1 */ { 0, BX_IA_ERROR },
894 
  /* 2 */ { 0, BX_IA_MOV_CR2Rq },
895 
  /* 3 */ { BxTraceEnd, BX_IA_MOV_CR3Rq },
896 
  /* 4 */ { BxTraceEnd, BX_IA_MOV_CR4Rq },
897 
  /* 5 */ { 0, BX_IA_ERROR },
898 
  /* 6 */ { 0, BX_IA_ERROR },
899 
  /* 7 */ { 0, BX_IA_ERROR }
900 
};
901 
#endif
902 
 
903 
#endif // BX_COMMON_FETCHDECODE_TABLES_H

powered by: WebSVN 2.1.0

© copyright 1999-2025 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.