URL https://opencores.org/ocsvn/ao486/ao486/trunk

Subversion Repositories ao486

[/] [ao486/] [trunk/] [bochs486/] [cpu/] [instr.h] - Blame information for rev 2

Details | Compare with Previous | View Log


/////////////////////////////////////////////////////////////////////////
// $Id: instr.h 11555 2012-11-27 15:40:45Z sshwarts $
/////////////////////////////////////////////////////////////////////////
//
//   Copyright (c) 2008-2012 Stanislav Shwartsman
//          Written by Stanislav Shwartsman [sshwarts at sourceforge net]
//
//  This library is free software; you can redistribute it and/or
//  modify it under the terms of the GNU Lesser General Public
//  License as published by the Free Software Foundation; either
//  version 2 of the License, or (at your option) any later version.
//
//  This library is distributed in the hope that it will be useful,
//  but WITHOUT ANY WARRANTY; without even the implied warranty of
//  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
//  Lesser General Public License for more details.
//
//  You should have received a copy of the GNU Lesser General Public
//  License along with this library; if not, write to the Free Software
//  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
//
/////////////////////////////////////////////////////////////////////////
 
#ifndef BX_INSTR_H
#define BX_INSTR_H
 
class bxInstruction_c;
 
typedef void BX_INSF_TYPE;
 
#if BX_SUPPORT_HANDLERS_CHAINING_SPEEDUPS
 
#define BX_SYNC_TIME_IF_SINGLE_PROCESSOR(allowed_delta) {                     \
  if (BX_SMP_PROCESSORS == 1) {                                               \
    Bit32u delta = (Bit32u)(BX_CPU_THIS_PTR icount - BX_CPU_THIS_PTR icount_last_sync); \
    if (delta >= allowed_delta) {                                             \
      BX_CPU_THIS_PTR sync_icount();                                          \
      BX_TICKN(delta);                                                        \
    }                                                                         \
  }                                                                           \
}
 
#define BX_COMMIT_INSTRUCTION(i) {                     \
  BX_CPU_THIS_PTR prev_rip = RIP; /* commit new RIP */ \
  BX_INSTR_AFTER_EXECUTION(BX_CPU_ID, (i));            \
  BX_CPU_THIS_PTR icount++;                            \
}
 
#define BX_EXECUTE_INSTRUCTION(i) {                    \
  BX_INSTR_BEFORE_EXECUTION(BX_CPU_ID, (i));           \
  RIP += (i)->ilen();                                  \
  return BX_CPU_CALL_METHOD(i->execute1, (i));         \
}
 
#define BX_NEXT_TRACE(i) {                             \
  BX_COMMIT_INSTRUCTION(i);                            \
  return;                                              \
}
 
#define BX_LINK_TRACE(i) {                             \
  BX_COMMIT_INSTRUCTION(i);                            \
  linkTrace(i);                                        \
  return;                                              \
}
 
#define BX_NEXT_INSTR(i) {                             \
  BX_COMMIT_INSTRUCTION(i);                            \
  if (BX_CPU_THIS_PTR async_event) return;             \
  ++i;                                                 \
  BX_EXECUTE_INSTRUCTION(i);                           \
}
 
#else // BX_SUPPORT_HANDLERS_CHAINING_SPEEDUPS
 
#define BX_NEXT_TRACE(i) { return; }
#define BX_NEXT_INSTR(i) { return; }
#define BX_LINK_TRACE(i) { return; }
 
#define BX_SYNC_TIME_IF_SINGLE_PROCESSOR(allowed_delta) \
  if (BX_SMP_PROCESSORS == 1) BX_TICK1()
 
#endif
 
// <TAG-TYPE-EXECUTEPTR-START>
#if BX_USE_CPU_SMF
typedef BX_INSF_TYPE (BX_CPP_AttrRegparmN(1) *BxExecutePtr_tR)(bxInstruction_c *);
typedef bx_address (BX_CPP_AttrRegparmN(1) *BxResolvePtr_tR)(bxInstruction_c *);
typedef void (BX_CPP_AttrRegparmN(1) *BxRepIterationPtr_tR)(bxInstruction_c *);
#else
typedef BX_INSF_TYPE (BX_CPU_C::*BxExecutePtr_tR)(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
typedef bx_address (BX_CPU_C::*BxResolvePtr_tR)(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
typedef void (BX_CPU_C::*BxRepIterationPtr_tR)(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
#endif
// <TAG-TYPE-EXECUTEPTR-END>
 
extern bx_address bx_asize_mask[];
 
const char *get_bx_opcode_name(Bit16u ia_opcode);
 
// <TAG-CLASS-INSTRUCTION-START>
class bxInstruction_c {
public:
  // Function pointers; a function to resolve the modRM address
  // given the current state of the CPU and the instruction data,
  // and a function to execute the instruction after resolving
  // the memory address (if any).
  BxExecutePtr_tR execute1;
 
  union {
    BxExecutePtr_tR execute2;
    bxInstruction_c *next;
  } handlers;
 
  BxResolvePtr_tR ResolveModrm;
//AO start
unsigned bochs486_opcode;
Bit8u bochs486_modregrm;
Bit8u bochs486_lock;
Bit8u bochs486_rep;
//AO end
  struct {
    // 15...0 opcode
    Bit16u ia_opcode;
 
    //  7...4 (unused)
    //  3...0 ilen (0..15)
    Bit8u ilen;
 
    //  7...6 VEX Vector Length (0=no VL, 1=128 bit, 2=256 bit)
    //        repUsed (0=none, 2=0xF2, 3=0xF3)
    //  5...5 extend8bit
    //  4...4 mod==c0 (modrm)
    //  3...3 os64
    //  2...2 os32
    //  1...1 as64
    //  0...0 as32
    Bit8u metaInfo1;
  } metaInfo;
 
#define BX_INSTR_METADATA_DST   0
#define BX_INSTR_METADATA_SRC1  1
#define BX_INSTR_METADATA_SRC2  2
#define BX_INSTR_METADATA_SRC3  3
#define BX_INSTR_METADATA_SEG   4
#define BX_INSTR_METADATA_BASE  5
#define BX_INSTR_METADATA_INDEX 6
#define BX_INSTR_METADATA_SCALE 7
 
  // using 5-bit field for registers (16 regs in 64-bit, RIP, NIL)
  Bit8u metaData[8];
 
  union {
    // Form (longest case): [opcode+modrm+sib/displacement32/immediate32]
    struct {
      union {
        Bit32u Id;
        Bit16u Iw;
        Bit8u  Ib;
      };
      union {
        Bit16u displ16u; // for 16-bit modrm forms
        Bit32u displ32u; // for 32-bit modrm forms
 
        Bit32u Id2;
        Bit16u Iw2;
        Bit8u  Ib2;
      };
    } modRMForm;
 
#if BX_SUPPORT_X86_64
    struct {
      Bit64u   Iq;  // for MOV Rx,imm64
    } IqForm;
#endif
  };
 
#ifdef BX_INSTR_STORE_OPCODE_BYTES
  Bit8u opcode_bytes[16];
 
  BX_CPP_INLINE const Bit8u* get_opcode_bytes(void) const {
    return opcode_bytes;
  }
 
  BX_CPP_INLINE void set_opcode_bytes(const Bit8u *opcode) {
    memcpy(opcode_bytes, opcode, ilen());
  }
#endif
 
  BX_CPP_INLINE BxExecutePtr_tR execute2(void) const {
    return handlers.execute2;
  }
 
  BX_CPP_INLINE unsigned seg(void) const {
    return metaData[BX_INSTR_METADATA_SEG];
  }
  BX_CPP_INLINE void setSeg(unsigned val) {
    metaData[BX_INSTR_METADATA_SEG] = val;
  }
 
  BX_CPP_INLINE void setFoo(unsigned foo) {
    // none of x87 instructions has immediate
    modRMForm.Iw = foo;
  }
  BX_CPP_INLINE unsigned foo() const {
    return modRMForm.Iw;
  }
  BX_CPP_INLINE unsigned b1() const {
    return modRMForm.Iw >> 8;
  }
 
  BX_CPP_INLINE void setSibScale(unsigned scale) {
    metaData[BX_INSTR_METADATA_SCALE] = scale;
  }
  BX_CPP_INLINE unsigned sibScale() const {
    return metaData[BX_INSTR_METADATA_SCALE];
  }
  BX_CPP_INLINE void setSibIndex(unsigned index) {
    metaData[BX_INSTR_METADATA_INDEX] = index;
  }
  BX_CPP_INLINE unsigned sibIndex() const {
    return metaData[BX_INSTR_METADATA_INDEX];
  }
  BX_CPP_INLINE void setSibBase(unsigned base) {
    metaData[BX_INSTR_METADATA_BASE] = base;
  }
  BX_CPP_INLINE unsigned sibBase() const {
    return metaData[BX_INSTR_METADATA_BASE];
  }
  BX_CPP_INLINE Bit32s displ32s() const { return (Bit32s) modRMForm.displ32u; }
  BX_CPP_INLINE Bit16s displ16s() const { return (Bit16s) modRMForm.displ16u; }
  BX_CPP_INLINE Bit32u Id() const  { return modRMForm.Id; }
  BX_CPP_INLINE Bit16u Iw() const  { return modRMForm.Iw; }
  BX_CPP_INLINE Bit8u  Ib() const  { return modRMForm.Ib; }
  BX_CPP_INLINE Bit16u Id2() const { return modRMForm.Id2; }
  BX_CPP_INLINE Bit16u Iw2() const { return modRMForm.Iw2; }
  BX_CPP_INLINE Bit8u  Ib2() const { return modRMForm.Ib2; }
#if BX_SUPPORT_X86_64
  BX_CPP_INLINE Bit64u Iq() const  { return IqForm.Iq; }
#endif
 
  // Info in the metaInfo field.
  // Note: the 'L' at the end of certain flags, means the value returned
  // is for Logical comparisons, eg if (i->os32L() && i->as32L()).  If you
  // want a bx_bool value, use os32B() etc.  This makes for smaller
  // code, when a strict 0 or 1 is not necessary.
  BX_CPP_INLINE void init(unsigned os32, unsigned as32, unsigned os64, unsigned as64)
  {
    metaInfo.metaInfo1 = (os32<<2) | (os64<<3) | (as32<<0) | (as64<<1); // VL = 0
  }
 
  BX_CPP_INLINE unsigned os32L(void) const {
    return metaInfo.metaInfo1 & (1<<2);
  }
  BX_CPP_INLINE void setOs32B(unsigned bit) {
    metaInfo.metaInfo1 = (metaInfo.metaInfo1 & ~(1<<2)) | (bit<<2);
  }
  BX_CPP_INLINE void assertOs32(void) {
    metaInfo.metaInfo1 |= (1<<2);
  }
 
#if BX_SUPPORT_X86_64
  BX_CPP_INLINE unsigned os64L(void) const {
    return metaInfo.metaInfo1 & (1<<3);
  }
  BX_CPP_INLINE void assertOs64(void) {
    metaInfo.metaInfo1 |= (1<<3);
  }
#else
  BX_CPP_INLINE unsigned os64L(void) const { return 0; }
#endif
 
 
  BX_CPP_INLINE unsigned as32L(void) const {
    return metaInfo.metaInfo1 & 0x1;
  }
  BX_CPP_INLINE void setAs32B(unsigned bit) {
    metaInfo.metaInfo1 = (metaInfo.metaInfo1 & ~0x1) | (bit);
  }
 
#if BX_SUPPORT_X86_64
  BX_CPP_INLINE unsigned as64L(void) const {
    return metaInfo.metaInfo1 & (1<<1);
  }
  BX_CPP_INLINE void clearAs64(void) {
    metaInfo.metaInfo1 &= ~(1<<1);
  }
#else
  BX_CPP_INLINE unsigned as64L(void) const { return 0; }
#endif
 
  BX_CPP_INLINE unsigned asize(void) const {
    return metaInfo.metaInfo1 & 0x3;
  }
  BX_CPP_INLINE bx_address asize_mask(void) const {
    return bx_asize_mask[asize()];
  }
 
#if BX_SUPPORT_X86_64
  BX_CPP_INLINE unsigned extend8bitL(void) const {
    return metaInfo.metaInfo1 & (1<<5);
  }
  BX_CPP_INLINE void assertExtend8bit(void) {
    metaInfo.metaInfo1 |= (1<<5);
  }
#endif
 
  BX_CPP_INLINE unsigned ilen(void) const {
    return metaInfo.ilen;
  }
  BX_CPP_INLINE void setILen(unsigned ilen) {
    metaInfo.ilen = ilen;
  }
 
  BX_CPP_INLINE unsigned getIaOpcode(void) const {
    return metaInfo.ia_opcode;
  }
  BX_CPP_INLINE void setIaOpcode(Bit16u op) {
    metaInfo.ia_opcode = op;
  }
  BX_CPP_INLINE const char* getIaOpcodeName(void) const {
    return get_bx_opcode_name(getIaOpcode());
  }
 
  BX_CPP_INLINE unsigned repUsedL(void) const {
    return metaInfo.metaInfo1 >> 6;
  }
  BX_CPP_INLINE unsigned repUsedValue(void) const {
    return metaInfo.metaInfo1 >> 6;
  }
  BX_CPP_INLINE void setRepUsed(unsigned value) {
    metaInfo.metaInfo1 = (metaInfo.metaInfo1 & 0x3f) | (value << 6);
  }
 
  BX_CPP_INLINE unsigned getVL(void) const {
#if BX_SUPPORT_AVX
    return metaInfo.metaInfo1 >> 6;
#else
    return 0;
#endif
  }
  BX_CPP_INLINE void setVL(unsigned value) {
    metaInfo.metaInfo1 = (metaInfo.metaInfo1 & 0x3f) | (value << 6);
  }
 
  BX_CPP_INLINE void setSrcReg(unsigned src, unsigned reg) {
    metaData[src] = reg;
  }
 
  BX_CPP_INLINE unsigned dst() const {
    return metaData[BX_INSTR_METADATA_DST];
  }
 
  BX_CPP_INLINE unsigned src1() const {
    return metaData[BX_INSTR_METADATA_SRC1];
  }
  BX_CPP_INLINE unsigned src2() const {
    return metaData[BX_INSTR_METADATA_SRC2];
  }
  BX_CPP_INLINE unsigned src3() const {
    return metaData[BX_INSTR_METADATA_SRC3];
  }
 
  BX_CPP_INLINE unsigned src() const { return src1(); }
 
  BX_CPP_INLINE unsigned modC0() const
  {
    // This is a cheaper way to test for modRM instructions where
    // the mod field is 0xc0.  FetchDecode flags this condition since
    // it is quite common to be tested for.
    return metaInfo.metaInfo1 & (1<<4);
  }
  BX_CPP_INLINE void assertModC0()
  {
    metaInfo.metaInfo1 |= (1<<4);
  }
 
#if BX_SUPPORT_HANDLERS_CHAINING_SPEEDUPS
  BX_CPP_INLINE bxInstruction_c* getNextTrace() const {
    return handlers.next;
  }
  BX_CPP_INLINE void setNextTrace(bxInstruction_c* iptr) {
    handlers.next = iptr;
  }
#endif
 
};
// <TAG-CLASS-INSTRUCTION-END>
 
enum {
#define bx_define_opcode(a, b, c, d, s1, s2, s3, s4, e) a,
#include "ia_opcodes.h"
   BX_IA_LAST
};
#undef  bx_define_opcode
 
#endif

Browse

Tools

Subversion Repositories ao486

[/] [ao486/] [trunk/] [bochs486/] [cpu/] [instr.h] - Blame information for rev 2

Line No.	Rev	Author	Line
1	2	alfik	`/////////////////////////////////////////////////////////////////////////`
2			`// $Id: instr.h 11555 2012-11-27 15:40:45Z sshwarts $`
3			`/////////////////////////////////////////////////////////////////////////`
4			`//`
5			`// Copyright (c) 2008-2012 Stanislav Shwartsman`
6			`// Written by Stanislav Shwartsman [sshwarts at sourceforge net]`
7			`//`
8			`// This library is free software; you can redistribute it and/or`
9			`// modify it under the terms of the GNU Lesser General Public`
10			`// License as published by the Free Software Foundation; either`
11			`// version 2 of the License, or (at your option) any later version.`
12			`//`
13			`// This library is distributed in the hope that it will be useful,`
14			`// but WITHOUT ANY WARRANTY; without even the implied warranty of`
15			`// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU`
16			`// Lesser General Public License for more details.`
17			`//`
18			`// You should have received a copy of the GNU Lesser General Public`
19			`// License along with this library; if not, write to the Free Software`
20			`// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA`
21			`//`
22			`/////////////////////////////////////////////////////////////////////////`
23
24			`#ifndef BX_INSTR_H`
25			`#define BX_INSTR_H`
26
27			`class bxInstruction_c;`
28
29			`typedef void BX_INSF_TYPE;`
30
31			`#if BX_SUPPORT_HANDLERS_CHAINING_SPEEDUPS`
32
33			`#define BX_SYNC_TIME_IF_SINGLE_PROCESSOR(allowed_delta) { \`
34			`if (BX_SMP_PROCESSORS == 1) { \`
35			`Bit32u delta = (Bit32u)(BX_CPU_THIS_PTR icount - BX_CPU_THIS_PTR icount_last_sync); \`
36			`if (delta >= allowed_delta) { \`
37			`BX_CPU_THIS_PTR sync_icount(); \`
38			`BX_TICKN(delta); \`
39			`} \`
40			`} \`
41			`}`
42
43			`#define BX_COMMIT_INSTRUCTION(i) { \`
44			`BX_CPU_THIS_PTR prev_rip = RIP; /* commit new RIP */ \`
45			`BX_INSTR_AFTER_EXECUTION(BX_CPU_ID, (i)); \`
46			`BX_CPU_THIS_PTR icount++; \`
47			`}`
48
49			`#define BX_EXECUTE_INSTRUCTION(i) { \`
50			`BX_INSTR_BEFORE_EXECUTION(BX_CPU_ID, (i)); \`
51			`RIP += (i)->ilen(); \`
52			`return BX_CPU_CALL_METHOD(i->execute1, (i)); \`
53			`}`
54
55			`#define BX_NEXT_TRACE(i) { \`
56			`BX_COMMIT_INSTRUCTION(i); \`
57			`return; \`
58			`}`
59
60			`#define BX_LINK_TRACE(i) { \`
61			`BX_COMMIT_INSTRUCTION(i); \`
62			`linkTrace(i); \`
63			`return; \`
64			`}`
65
66			`#define BX_NEXT_INSTR(i) { \`
67			`BX_COMMIT_INSTRUCTION(i); \`
68			`if (BX_CPU_THIS_PTR async_event) return; \`
69			`++i; \`
70			`BX_EXECUTE_INSTRUCTION(i); \`
71			`}`
72
73			`#else // BX_SUPPORT_HANDLERS_CHAINING_SPEEDUPS`
74
75			`#define BX_NEXT_TRACE(i) { return; }`
76			`#define BX_NEXT_INSTR(i) { return; }`
77			`#define BX_LINK_TRACE(i) { return; }`
78
79			`#define BX_SYNC_TIME_IF_SINGLE_PROCESSOR(allowed_delta) \`
80			`if (BX_SMP_PROCESSORS == 1) BX_TICK1()`
81
82			`#endif`
83
84			`// <TAG-TYPE-EXECUTEPTR-START>`
85			`#if BX_USE_CPU_SMF`
86			`typedef BX_INSF_TYPE (BX_CPP_AttrRegparmN(1) BxExecutePtr_tR)(bxInstruction_c );`
87			`typedef bx_address (BX_CPP_AttrRegparmN(1) BxResolvePtr_tR)(bxInstruction_c );`
88			`typedef void (BX_CPP_AttrRegparmN(1) BxRepIterationPtr_tR)(bxInstruction_c );`
89			`#else`
90			`typedef BX_INSF_TYPE (BX_CPU_C::BxExecutePtr_tR)(bxInstruction_c ) BX_CPP_AttrRegparmN(1);`
91			`typedef bx_address (BX_CPU_C::BxResolvePtr_tR)(bxInstruction_c ) BX_CPP_AttrRegparmN(1);`
92			`typedef void (BX_CPU_C::BxRepIterationPtr_tR)(bxInstruction_c ) BX_CPP_AttrRegparmN(1);`
93			`#endif`
94			`// <TAG-TYPE-EXECUTEPTR-END>`
95
96			`extern bx_address bx_asize_mask[];`
97
98			`const char *get_bx_opcode_name(Bit16u ia_opcode);`
99
100			`// <TAG-CLASS-INSTRUCTION-START>`
101			`class bxInstruction_c {`
102			`public:`
103			`// Function pointers; a function to resolve the modRM address`
104			`// given the current state of the CPU and the instruction data,`
105			`// and a function to execute the instruction after resolving`
106			`// the memory address (if any).`
107			`BxExecutePtr_tR execute1;`
108
109			`union {`
110			`BxExecutePtr_tR execute2;`
111			`bxInstruction_c *next;`
112			`} handlers;`
113
114			`BxResolvePtr_tR ResolveModrm;`
115			`//AO start`
116			`unsigned bochs486_opcode;`
117			`Bit8u bochs486_modregrm;`
118			`Bit8u bochs486_lock;`
119			`Bit8u bochs486_rep;`
120			`//AO end`
121			`struct {`
122			`// 15...0 opcode`
123			`Bit16u ia_opcode;`
124
125			`// 7...4 (unused)`
126			`// 3...0 ilen (0..15)`
127			`Bit8u ilen;`
128
129			`// 7...6 VEX Vector Length (0=no VL, 1=128 bit, 2=256 bit)`
130			`// repUsed (0=none, 2=0xF2, 3=0xF3)`
131			`// 5...5 extend8bit`
132			`// 4...4 mod==c0 (modrm)`
133			`// 3...3 os64`
134			`// 2...2 os32`
135			`// 1...1 as64`
136			`// 0...0 as32`
137			`Bit8u metaInfo1;`
138			`} metaInfo;`
139
140			`#define BX_INSTR_METADATA_DST 0`
141			`#define BX_INSTR_METADATA_SRC1 1`
142			`#define BX_INSTR_METADATA_SRC2 2`
143			`#define BX_INSTR_METADATA_SRC3 3`
144			`#define BX_INSTR_METADATA_SEG 4`
145			`#define BX_INSTR_METADATA_BASE 5`
146			`#define BX_INSTR_METADATA_INDEX 6`
147			`#define BX_INSTR_METADATA_SCALE 7`
148
149			`// using 5-bit field for registers (16 regs in 64-bit, RIP, NIL)`
150			`Bit8u metaData[8];`
151
152			`union {`
153			`// Form (longest case): [opcode+modrm+sib/displacement32/immediate32]`
154			`struct {`
155			`union {`
156			`Bit32u Id;`
157			`Bit16u Iw;`
158			`Bit8u Ib;`
159			`};`
160			`union {`
161			`Bit16u displ16u; // for 16-bit modrm forms`
162			`Bit32u displ32u; // for 32-bit modrm forms`
163
164			`Bit32u Id2;`
165			`Bit16u Iw2;`
166			`Bit8u Ib2;`
167			`};`
168			`} modRMForm;`
169
170			`#if BX_SUPPORT_X86_64`
171			`struct {`
172			`Bit64u Iq; // for MOV Rx,imm64`
173			`} IqForm;`
174			`#endif`
175			`};`
176
177			`#ifdef BX_INSTR_STORE_OPCODE_BYTES`
178			`Bit8u opcode_bytes[16];`
179
180			`BX_CPP_INLINE const Bit8u* get_opcode_bytes(void) const {`
181			`return opcode_bytes;`
182			`}`
183
184			`BX_CPP_INLINE void set_opcode_bytes(const Bit8u *opcode) {`
185			`memcpy(opcode_bytes, opcode, ilen());`
186			`}`
187			`#endif`
188
189			`BX_CPP_INLINE BxExecutePtr_tR execute2(void) const {`
190			`return handlers.execute2;`
191			`}`
192
193			`BX_CPP_INLINE unsigned seg(void) const {`
194			`return metaData[BX_INSTR_METADATA_SEG];`
195			`}`
196			`BX_CPP_INLINE void setSeg(unsigned val) {`
197			`metaData[BX_INSTR_METADATA_SEG] = val;`
198			`}`
199
200			`BX_CPP_INLINE void setFoo(unsigned foo) {`
201			`// none of x87 instructions has immediate`
202			`modRMForm.Iw = foo;`
203			`}`
204			`BX_CPP_INLINE unsigned foo() const {`
205			`return modRMForm.Iw;`
206			`}`
207			`BX_CPP_INLINE unsigned b1() const {`
208			`return modRMForm.Iw >> 8;`
209			`}`
210
211			`BX_CPP_INLINE void setSibScale(unsigned scale) {`
212			`metaData[BX_INSTR_METADATA_SCALE] = scale;`
213			`}`
214			`BX_CPP_INLINE unsigned sibScale() const {`
215			`return metaData[BX_INSTR_METADATA_SCALE];`
216			`}`
217			`BX_CPP_INLINE void setSibIndex(unsigned index) {`
218			`metaData[BX_INSTR_METADATA_INDEX] = index;`
219			`}`
220			`BX_CPP_INLINE unsigned sibIndex() const {`
221			`return metaData[BX_INSTR_METADATA_INDEX];`
222			`}`
223			`BX_CPP_INLINE void setSibBase(unsigned base) {`
224			`metaData[BX_INSTR_METADATA_BASE] = base;`
225			`}`
226			`BX_CPP_INLINE unsigned sibBase() const {`
227			`return metaData[BX_INSTR_METADATA_BASE];`
228			`}`
229			`BX_CPP_INLINE Bit32s displ32s() const { return (Bit32s) modRMForm.displ32u; }`
230			`BX_CPP_INLINE Bit16s displ16s() const { return (Bit16s) modRMForm.displ16u; }`
231			`BX_CPP_INLINE Bit32u Id() const { return modRMForm.Id; }`
232			`BX_CPP_INLINE Bit16u Iw() const { return modRMForm.Iw; }`
233			`BX_CPP_INLINE Bit8u Ib() const { return modRMForm.Ib; }`
234			`BX_CPP_INLINE Bit16u Id2() const { return modRMForm.Id2; }`
235			`BX_CPP_INLINE Bit16u Iw2() const { return modRMForm.Iw2; }`
236			`BX_CPP_INLINE Bit8u Ib2() const { return modRMForm.Ib2; }`
237			`#if BX_SUPPORT_X86_64`
238			`BX_CPP_INLINE Bit64u Iq() const { return IqForm.Iq; }`
239			`#endif`
240
241			`// Info in the metaInfo field.`
242			`// Note: the 'L' at the end of certain flags, means the value returned`
243			`// is for Logical comparisons, eg if (i->os32L() && i->as32L()). If you`
244			`// want a bx_bool value, use os32B() etc. This makes for smaller`
245			`// code, when a strict 0 or 1 is not necessary.`
246			`BX_CPP_INLINE void init(unsigned os32, unsigned as32, unsigned os64, unsigned as64)`
247			`{`
248			`metaInfo.metaInfo1 = (os32<<2) \| (os64<<3) \| (as32<<0) \| (as64<<1); // VL = 0`
249			`}`
250
251			`BX_CPP_INLINE unsigned os32L(void) const {`
252			`return metaInfo.metaInfo1 & (1<<2);`
253			`}`
254			`BX_CPP_INLINE void setOs32B(unsigned bit) {`
255			`metaInfo.metaInfo1 = (metaInfo.metaInfo1 & ~(1<<2)) \| (bit<<2);`
256			`}`
257			`BX_CPP_INLINE void assertOs32(void) {`
258			`metaInfo.metaInfo1 \|= (1<<2);`
259			`}`
260
261			`#if BX_SUPPORT_X86_64`
262			`BX_CPP_INLINE unsigned os64L(void) const {`
263			`return metaInfo.metaInfo1 & (1<<3);`
264			`}`
265			`BX_CPP_INLINE void assertOs64(void) {`
266			`metaInfo.metaInfo1 \|= (1<<3);`
267			`}`
268			`#else`
269			`BX_CPP_INLINE unsigned os64L(void) const { return 0; }`
270			`#endif`
271
272
273			`BX_CPP_INLINE unsigned as32L(void) const {`
274			`return metaInfo.metaInfo1 & 0x1;`
275			`}`
276			`BX_CPP_INLINE void setAs32B(unsigned bit) {`
277			`metaInfo.metaInfo1 = (metaInfo.metaInfo1 & ~0x1) \| (bit);`
278			`}`
279
280			`#if BX_SUPPORT_X86_64`
281			`BX_CPP_INLINE unsigned as64L(void) const {`
282			`return metaInfo.metaInfo1 & (1<<1);`
283			`}`
284			`BX_CPP_INLINE void clearAs64(void) {`
285			`metaInfo.metaInfo1 &= ~(1<<1);`
286			`}`
287			`#else`
288			`BX_CPP_INLINE unsigned as64L(void) const { return 0; }`
289			`#endif`
290
291			`BX_CPP_INLINE unsigned asize(void) const {`
292			`return metaInfo.metaInfo1 & 0x3;`
293			`}`
294			`BX_CPP_INLINE bx_address asize_mask(void) const {`
295			`return bx_asize_mask[asize()];`
296			`}`
297
298			`#if BX_SUPPORT_X86_64`
299			`BX_CPP_INLINE unsigned extend8bitL(void) const {`
300			`return metaInfo.metaInfo1 & (1<<5);`
301			`}`
302			`BX_CPP_INLINE void assertExtend8bit(void) {`
303			`metaInfo.metaInfo1 \|= (1<<5);`
304			`}`
305			`#endif`
306
307			`BX_CPP_INLINE unsigned ilen(void) const {`
308			`return metaInfo.ilen;`
309			`}`
310			`BX_CPP_INLINE void setILen(unsigned ilen) {`
311			`metaInfo.ilen = ilen;`
312			`}`
313
314			`BX_CPP_INLINE unsigned getIaOpcode(void) const {`
315			`return metaInfo.ia_opcode;`
316			`}`
317			`BX_CPP_INLINE void setIaOpcode(Bit16u op) {`
318			`metaInfo.ia_opcode = op;`
319			`}`
320			`BX_CPP_INLINE const char* getIaOpcodeName(void) const {`
321			`return get_bx_opcode_name(getIaOpcode());`
322			`}`
323
324			`BX_CPP_INLINE unsigned repUsedL(void) const {`
325			`return metaInfo.metaInfo1 >> 6;`
326			`}`
327			`BX_CPP_INLINE unsigned repUsedValue(void) const {`
328			`return metaInfo.metaInfo1 >> 6;`
329			`}`
330			`BX_CPP_INLINE void setRepUsed(unsigned value) {`
331			`metaInfo.metaInfo1 = (metaInfo.metaInfo1 & 0x3f) \| (value << 6);`
332			`}`
333
334			`BX_CPP_INLINE unsigned getVL(void) const {`
335			`#if BX_SUPPORT_AVX`
336			`return metaInfo.metaInfo1 >> 6;`
337			`#else`
338			`return 0;`
339			`#endif`
340			`}`
341			`BX_CPP_INLINE void setVL(unsigned value) {`
342			`metaInfo.metaInfo1 = (metaInfo.metaInfo1 & 0x3f) \| (value << 6);`
343			`}`
344
345			`BX_CPP_INLINE void setSrcReg(unsigned src, unsigned reg) {`
346			`metaData[src] = reg;`
347			`}`
348
349			`BX_CPP_INLINE unsigned dst() const {`
350			`return metaData[BX_INSTR_METADATA_DST];`
351			`}`
352
353			`BX_CPP_INLINE unsigned src1() const {`
354			`return metaData[BX_INSTR_METADATA_SRC1];`
355			`}`
356			`BX_CPP_INLINE unsigned src2() const {`
357			`return metaData[BX_INSTR_METADATA_SRC2];`
358			`}`
359			`BX_CPP_INLINE unsigned src3() const {`
360			`return metaData[BX_INSTR_METADATA_SRC3];`
361			`}`
362
363			`BX_CPP_INLINE unsigned src() const { return src1(); }`
364
365			`BX_CPP_INLINE unsigned modC0() const`
366			`{`
367			`// This is a cheaper way to test for modRM instructions where`
368			`// the mod field is 0xc0. FetchDecode flags this condition since`
369			`// it is quite common to be tested for.`
370			`return metaInfo.metaInfo1 & (1<<4);`
371			`}`
372			`BX_CPP_INLINE void assertModC0()`
373			`{`
374			`metaInfo.metaInfo1 \|= (1<<4);`
375			`}`
376
377			`#if BX_SUPPORT_HANDLERS_CHAINING_SPEEDUPS`
378			`BX_CPP_INLINE bxInstruction_c* getNextTrace() const {`
379			`return handlers.next;`
380			`}`
381			`BX_CPP_INLINE void setNextTrace(bxInstruction_c* iptr) {`
382			`handlers.next = iptr;`
383			`}`
384			`#endif`
385
386			`};`
387			`// <TAG-CLASS-INSTRUCTION-END>`
388
389			`enum {`
390			`#define bx_define_opcode(a, b, c, d, s1, s2, s3, s4, e) a,`
391			`#include "ia_opcodes.h"`
392			`BX_IA_LAST`
393			`};`
394			`#undef bx_define_opcode`
395
396			`#endif`