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`define CMD_PUSHA       #AUTOGEN_NEXT_CMD

`define CMDEX_PUSHA_STEP_0  4'd0

`define CMDEX_PUSHA_STEP_1  4'd1

`define CMDEX_PUSHA_STEP_2  4'd2

`define CMDEX_PUSHA_STEP_3  4'd3

`define CMDEX_PUSHA_STEP_4  4'd4

`define CMDEX_PUSHA_STEP_5  4'd5

`define CMDEX_PUSHA_STEP_6  4'd6

`define CMDEX_PUSHA_STEP_7  4'd7

dec_ready_one && decoder[7:0] == 8'h60

`CMD_PUSHA

SET(dec_cmdex, `CMDEX_PUSHA_STEP_0);

SET(consume_one);

SET(dec_is_complex);

IF(mc_cmd == `CMD_PUSHA && mc_step < 6'd7);

    DIRECT(mc_cmd, mc_step[3:0]);

ENDIF();

IF(mc_cmd == `CMD_PUSHA && mc_step == 6'd7);

    LAST(`CMDEX_PUSHA_STEP_7);

ENDIF();

IF(rd_cmd == `CMD_PUSHA);

    SET(rd_src_is_cmdex);

    SET(rd_req_esp);

    SET(rd_req_memory);

    IF((rd_cmdex == `CMDEX_PUSHA_STEP_0 && rd_mutex_busy_eax) || (rd_cmdex == `CMDEX_PUSHA_STEP_1 && rd_mutex_busy_ecx) || (rd_cmdex == `CMDEX_PUSHA_STEP_2 && rd_mutex_busy_edx)); SET(rd_waiting); ENDIF();

ENDIF();

IF(exe_cmd == `CMD_PUSHA);

    IF(exe_cmdex[2:0] == 3'd4);

        SET(exe_result_push, wr_esp_prev);

    ELSE();

        SET(exe_result_push, src);

    ENDIF();

    IF(exe_mutex_current[`MUTEX_ESP_BIT]); SET(exe_waiting); ENDIF();

ENDIF();

IF(wr_cmd == `CMD_PUSHA);

    SET(wr_push_ss_fault_check);

    SET(wr_one_cycle_wait);

    IF(~(write_for_wr_ready)); SET(wr_waiting); ENDIF();

    IF(wr_cmdex[2:0] == 3'd0); SET(wr_make_esp_speculative); ENDIF();

    IF(wr_cmdex[2:0] < 3'd7);

        SET(wr_not_finished);

    ENDIF();

    IF(~(wr_push_ss_fault));

        SET(write_stack_virtual);

        SAVE(esp, wr_stack_esp);

    ENDIF();

    IF(wr_cmdex[2:0] == 3'd7 && write_for_wr_ready && ~(wr_push_ss_fault));

        SET(wr_make_esp_commit);

    ENDIF();

ENDIF();