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[/] [ao486/] [trunk/] [rtl/] [ao486/] [commands/] [CMD_TEST.txt] - Blame information for rev 2

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`define CMD_TEST        #AUTOGEN_NEXT_CMD
 
`define CMDEX_TEST_immediate        4'd0
`define CMDEX_TEST_modregrm         4'd1
`define CMDEX_TEST_modregrm_imm     4'd2

 

dec_ready_one_imm && { decoder[7:1], 1'b0 } == 8'hA8
`CMD_TEST
SET(dec_cmdex, `CMDEX_TEST_immediate);
IF(decoder[0] == 1'b0); SET(dec_is_8bit); ENDIF();
SET(consume_one_imm);

 

dec_ready_modregrm_one && { decoder[7:1], 1'b0 } == 8'h84
`CMD_TEST
SET(dec_cmdex, `CMDEX_TEST_modregrm);
IF(decoder[0] == 1'b0); SET(dec_is_8bit); ENDIF();
SET(consume_modregrm_one);

 

dec_ready_modregrm_imm && { decoder[7:1], 1'b0 } == 8'hF6 && { decoder[13:12], 1'b0 } == 3'd0
`CMD_TEST
SET(dec_cmdex, `CMDEX_TEST_modregrm_imm);
IF(decoder[0] == 1'b0); SET(dec_is_8bit); ENDIF();
SET(consume_modregrm_imm);

 

IF(rd_cmd == `CMD_TEST && rd_cmdex == `CMDEX_TEST_modregrm);
 
    SET(rd_src_is_reg);
    SET(rd_req_eflags);
 
    // dst: reg, src: reg
    IF(rd_modregrm_mod == 2'b11);
 
        // reg, reg
        SET(rd_dst_is_rm);
 
        IF(rd_mutex_busy_modregrm_reg || rd_mutex_busy_modregrm_rm); SET(rd_waiting); ENDIF();
    ENDIF();
 
    // dst: memory, src: reg
    IF(rd_modregrm_mod != 2'b11);
 
        SET(rd_dst_is_memory);
 
        IF(rd_mutex_busy_memory || rd_mutex_busy_modregrm_reg); SET(rd_waiting);
        ELSE();
            SET(read_virtual);
 
            IF(~(read_for_rd_ready)); SET(rd_waiting); ENDIF();
        ENDIF();
    ENDIF();
ENDIF();

 

IF(rd_cmd == `CMD_TEST && rd_cmdex == `CMDEX_TEST_modregrm_imm);
 
    SET(rd_src_is_modregrm_imm);
 
    SET(rd_req_eflags);
 
    // dst: reg, src: imm
    IF(rd_modregrm_mod == 2'b11);
 
        // reg, reg
        SET(rd_dst_is_rm);
 
        IF(rd_mutex_busy_modregrm_rm); SET(rd_waiting); ENDIF();
    ENDIF();
 
    // dst: memory, src: imm
    IF(rd_modregrm_mod != 2'b11);
 
        SET(rd_dst_is_memory);
 
        IF(rd_mutex_busy_memory); SET(rd_waiting);
        ELSE();
            SET(read_virtual);
 
            IF(~(read_for_rd_ready)); SET(rd_waiting); ENDIF();
        ENDIF();
    ENDIF();
ENDIF();

 

IF(rd_cmd == `CMD_TEST && rd_cmdex == `CMDEX_TEST_immediate);
 
    SET(rd_src_is_imm);
    SET(rd_dst_is_eax);
 
    SET(rd_req_eflags);
 
    // dst: eAX, src: imm
    IF(rd_mutex_busy_eax); SET(rd_waiting); ENDIF();
ENDIF();

 

IF(exe_cmd == `CMD_TEST);
 
    SET(exe_result, exe_arith_and);
    SET(exe_arith_index, (`ARITH_VALID | `ARITH_AND));
ENDIF();

 

IF(wr_cmd == `CMD_TEST);
    SAVE(zflag, zflag_result);
    SAVE(sflag, sflag_result);
    SAVE(pflag, pflag_result);
 
    SAVE(aflag, aflag_arith);
    SAVE(cflag, cflag_arith);
    SAVE(oflag, oflag_arith);
ENDIF();


Line No.	Rev	Author	Line
1	2	alfik
2
3			`define CMD_TEST #AUTOGEN_NEXT_CMD
4
5			`define CMDEX_TEST_immediate 4'd0
6			`define CMDEX_TEST_modregrm 4'd1
7			`define CMDEX_TEST_modregrm_imm 4'd2
8
9
10
11			`dec_ready_one_imm && { decoder[7:1], 1'b0 } == 8'hA8`
12			`CMD_TEST
13			SET(dec_cmdex, `CMDEX_TEST_immediate);
14			`IF(decoder[0] == 1'b0); SET(dec_is_8bit); ENDIF();`
15			`SET(consume_one_imm);`
16
17
18
19			`dec_ready_modregrm_one && { decoder[7:1], 1'b0 } == 8'h84`
20			`CMD_TEST
21			SET(dec_cmdex, `CMDEX_TEST_modregrm);
22			`IF(decoder[0] == 1'b0); SET(dec_is_8bit); ENDIF();`
23			`SET(consume_modregrm_one);`
24
25
26
27			`dec_ready_modregrm_imm && { decoder[7:1], 1'b0 } == 8'hF6 && { decoder[13:12], 1'b0 } == 3'd0`
28			`CMD_TEST
29			SET(dec_cmdex, `CMDEX_TEST_modregrm_imm);
30			`IF(decoder[0] == 1'b0); SET(dec_is_8bit); ENDIF();`
31			`SET(consume_modregrm_imm);`
32
33
34
35			IF(rd_cmd == `CMD_TEST && rd_cmdex == `CMDEX_TEST_modregrm);
36
37			`SET(rd_src_is_reg);`
38			`SET(rd_req_eflags);`
39
40			`// dst: reg, src: reg`
41			`IF(rd_modregrm_mod == 2'b11);`
42
43			`// reg, reg`
44			`SET(rd_dst_is_rm);`
45
46			`IF(rd_mutex_busy_modregrm_reg \|\| rd_mutex_busy_modregrm_rm); SET(rd_waiting); ENDIF();`
47			`ENDIF();`
48
49			`// dst: memory, src: reg`
50			`IF(rd_modregrm_mod != 2'b11);`
51
52			`SET(rd_dst_is_memory);`
53
54			`IF(rd_mutex_busy_memory \|\| rd_mutex_busy_modregrm_reg); SET(rd_waiting);`
55			`ELSE();`
56			`SET(read_virtual);`
57
58			`IF(~(read_for_rd_ready)); SET(rd_waiting); ENDIF();`
59			`ENDIF();`
60			`ENDIF();`
61			`ENDIF();`
62
63
64
65			IF(rd_cmd == `CMD_TEST && rd_cmdex == `CMDEX_TEST_modregrm_imm);
66
67			`SET(rd_src_is_modregrm_imm);`
68
69			`SET(rd_req_eflags);`
70
71			`// dst: reg, src: imm`
72			`IF(rd_modregrm_mod == 2'b11);`
73
74			`// reg, reg`
75			`SET(rd_dst_is_rm);`
76
77			`IF(rd_mutex_busy_modregrm_rm); SET(rd_waiting); ENDIF();`
78			`ENDIF();`
79
80			`// dst: memory, src: imm`
81			`IF(rd_modregrm_mod != 2'b11);`
82
83			`SET(rd_dst_is_memory);`
84
85			`IF(rd_mutex_busy_memory); SET(rd_waiting);`
86			`ELSE();`
87			`SET(read_virtual);`
88
89			`IF(~(read_for_rd_ready)); SET(rd_waiting); ENDIF();`
90			`ENDIF();`
91			`ENDIF();`
92			`ENDIF();`
93
94
95
96			IF(rd_cmd == `CMD_TEST && rd_cmdex == `CMDEX_TEST_immediate);
97
98			`SET(rd_src_is_imm);`
99			`SET(rd_dst_is_eax);`
100
101			`SET(rd_req_eflags);`
102
103			`// dst: eAX, src: imm`
104			`IF(rd_mutex_busy_eax); SET(rd_waiting); ENDIF();`
105			`ENDIF();`
106
107
108
109			IF(exe_cmd == `CMD_TEST);
110
111			`SET(exe_result, exe_arith_and);`
112			SET(exe_arith_index, (`ARITH_VALID \| `ARITH_AND));
113			`ENDIF();`
114
115
116
117			IF(wr_cmd == `CMD_TEST);
118			`SAVE(zflag, zflag_result);`
119			`SAVE(sflag, sflag_result);`
120			`SAVE(pflag, pflag_result);`
121
122			`SAVE(aflag, aflag_arith);`
123			`SAVE(cflag, cflag_arith);`
124			`SAVE(oflag, oflag_arith);`
125			`ENDIF();`
126

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[/] [ao486/] [trunk/] [rtl/] [ao486/] [commands/] [CMD_TEST.txt] - Blame information for rev 2