| 1 |
2 |
alfik |
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//------------------------------------------------------------------------------
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//----------------------------------- get SS, ESP from TSS
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wire [31:0] rd_offset_for_esp_from_tss;
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wire [31:0] rd_offset_for_ss_from_tss;
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wire [31:0] r_limit_for_ss_esp_from_tss;
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wire rd_ss_esp_from_tss_386;
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assign rd_ss_esp_from_tss_386 = tr_cache[`DESC_BITS_TYPE] == `DESC_TSS_AVAIL_386 || tr_cache[`DESC_BITS_TYPE] == `DESC_TSS_BUSY_386;
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assign r_limit_for_ss_esp_from_tss =
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(rd_ss_esp_from_tss_386)? { 27'd0, glob_descriptor[`DESC_BITS_DPL], 3'd0 } + 32'd11 :
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{ 28'd0, glob_descriptor[`DESC_BITS_DPL], 2'd0 } + 32'd5;
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assign rd_offset_for_ss_from_tss =
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(rd_ss_esp_from_tss_386)? { 27'd0, glob_descriptor[`DESC_BITS_DPL], 3'd0 } + 32'd8 :
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{ 28'd0, glob_descriptor[`DESC_BITS_DPL], 2'd0 } + 32'd4;
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assign rd_offset_for_esp_from_tss =
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(rd_ss_esp_from_tss_386)? { 27'd0, glob_descriptor[`DESC_BITS_DPL], 3'd0 } + 32'd4 :
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{ 28'd0, glob_descriptor[`DESC_BITS_DPL], 2'd0 } + 32'd2;
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assign rd_ss_esp_from_tss_fault =
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( (rd_cmd == `CMD_CALL_2 && rd_cmdex == `CMDEX_CALL_2_call_gate_more_STEP_0) ||
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(rd_cmd == `CMD_int_2 && rd_cmdex == `CMDEX_int_2_int_trap_gate_more_STEP_0) ) &&
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r_limit_for_ss_esp_from_tss > tr_limit;
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IF( (rd_cmd == `CMD_int_2 && rd_cmdex == `CMDEX_int_2_int_trap_gate_more_STEP_0) ||
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(rd_cmd == `CMD_CALL_2 && rd_cmdex == `CMDEX_CALL_2_call_gate_more_STEP_0) );
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SET(rd_error_code, `SELECTOR_FOR_CODE(tr));
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SET(rd_system_linear, tr_base + rd_offset_for_ss_from_tss);
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IF(rd_ss_esp_from_tss_fault); SET(rd_waiting);
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ELSE();
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SET(read_system_word);
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SET(rd_glob_param_3_set);
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SET(rd_glob_param_3_value, { 16'd0, read_4[15:0] });
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IF(~(read_for_rd_ready)); SET(rd_waiting); ENDIF();
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ENDIF();
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ENDIF();
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IF( (rd_cmd == `CMD_int_2 && rd_cmdex == `CMDEX_int_2_int_trap_gate_more_STEP_1) ||
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(rd_cmd == `CMD_CALL_2 && rd_cmdex == `CMDEX_CALL_2_call_gate_more_STEP_1) );
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SET(rd_system_linear, tr_base + rd_offset_for_esp_from_tss);
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SET(read_system_word, ~(rd_ss_esp_from_tss_386));
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SET(read_system_dword, rd_ss_esp_from_tss_386);
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SET(rd_glob_param_4_set);
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SET(rd_glob_param_4_value, (rd_ss_esp_from_tss_386)? read_4 : { 16'd0, read_4[15:0] });
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IF(~(read_for_rd_ready)); SET(rd_waiting); ENDIF();
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ENDIF();
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IF( (rd_cmd == `CMD_int_2 && rd_cmdex == `CMDEX_int_2_int_trap_gate_more_STEP_2) ||
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(rd_cmd == `CMD_CALL_2 && rd_cmdex == `CMDEX_CALL_2_call_gate_more_STEP_2) );
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IF(rd_mutex_busy_active); SET(rd_waiting); // wait for previous step -- exception possible, move glob_param_1
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ELSE();
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IF(~(rd_descriptor_not_in_limits));
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SET(rd_glob_descriptor_set);
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SET(rd_glob_descriptor_value, read_8);
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SET(rd_glob_param_5_set);
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SET(rd_glob_param_5_value, 32'd0);
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SET(read_system_descriptor);
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IF(~(read_for_rd_ready)); SET(rd_waiting); ENDIF();
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ELSE();
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SET(rd_glob_param_5_set);
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SET(rd_glob_param_5_value, { 31'd0, rd_descriptor_not_in_limits });
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ENDIF();
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ENDIF();
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ENDIF();
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IF((exe_cmd == `CMD_CALL && exe_cmdex == `CMDEX_CALL_protected_STEP_0) ||
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(exe_cmd == `CMD_JMP && exe_cmdex == `CMDEX_JMP_protected_STEP_0));
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IF(glob_param_1[15:2] == 14'd0 ||
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(exe_descriptor[`DESC_BIT_SEG] == `FALSE && (
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exe_descriptor[`DESC_BITS_DPL] < cpl ||
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exe_descriptor[`DESC_BITS_DPL] < exe_selector[`SELECTOR_BITS_RPL] ||
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((exe_descriptor[`DESC_BITS_TYPE] == 4'd1 || exe_descriptor[`DESC_BITS_TYPE] == 4'd9) && exe_selector[`SELECTOR_BIT_TI]) || //AVAIL_286_TSS, AVAIL_386_TSS
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exe_descriptor[`DESC_BITS_TYPE] == 4'd0 || exe_descriptor[`DESC_BITS_TYPE] == 4'd8 ||
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exe_descriptor[`DESC_BITS_TYPE] == 4'd10 || exe_descriptor[`DESC_BITS_TYPE] == 4'd13 ||
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exe_descriptor[`DESC_BITS_TYPE] == 4'd2 || exe_descriptor[`DESC_BITS_TYPE] == 4'd3 ||
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exe_descriptor[`DESC_BITS_TYPE] == 4'd6 || exe_descriptor[`DESC_BITS_TYPE] == 4'd7 ||
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exe_descriptor[`DESC_BITS_TYPE] == 4'd11 || exe_descriptor[`DESC_BITS_TYPE] == 4'd14 ||
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exe_descriptor[`DESC_BITS_TYPE] == 4'd15) //new_cs_descriptor.valid == 0, system not valid
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)
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||
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(exe_descriptor[`DESC_BIT_SEG] && (
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`DESC_IS_DATA(exe_descriptor) ||
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(`DESC_IS_CODE_NON_CONFORMING(exe_descriptor) && (exe_descriptor[`DESC_BITS_DPL] != cpl || exe_selector[`SELECTOR_BITS_RPL] > cpl)) ||
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(`DESC_IS_CODE_CONFORMING(exe_descriptor) && exe_descriptor[`DESC_BITS_DPL] > cpl)) //check_cs()
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)
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);
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SET(exe_waiting);
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SET(exe_trigger_gp_fault); //exception GP(val)
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SET(exe_error_code, `SELECTOR_FOR_CODE(glob_param_1));
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ENDIF();
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IF(~(exe_trigger_gp_fault) && exe_descriptor[`DESC_BIT_P] == `FALSE && //check_cs()
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(exe_descriptor[`DESC_BIT_SEG] || exe_descriptor[`DESC_BITS_TYPE] == 4'd1 || exe_descriptor[`DESC_BITS_TYPE] == 4'd9 || //AVAIL_286_TSS, AVAIL_386_TSS
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exe_descriptor[`DESC_BITS_TYPE] == 4'd4 || exe_descriptor[`DESC_BITS_TYPE] == 4'd12 || //286_CALL_GATE, 386_CALL_GATE
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exe_descriptor[`DESC_BITS_TYPE] == 4'd5) //TASK_GATE
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);
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SET(exe_waiting);
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SET(exe_trigger_np_fault); //exception GP(val)
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SET(exe_error_code, `SELECTOR_FOR_CODE(glob_param_1));
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ENDIF();
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ENDIF();
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IF((exe_cmd == `CMD_CALL_2 && exe_cmdex == `CMDEX_CALL_2_task_switch_STEP_0) ||
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(exe_cmd == `CMD_JMP && exe_cmdex == `CMDEX_JMP_task_switch_STEP_0));
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// task switch:
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// glob_param_1[15:0] --> new_tr
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// glob_param_1[17:16] --> source
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// glob_param_2 --> [used internal]
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// glob_param_3[15:0] --> error_code
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// glob_param_3[16] --> push code flag
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// glob_param_3[17] --> [internal] is push 32 bit (TSS386)
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// glob_param_3[21:18] --> cmd_len
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// glob_descriptor --> new_tr_cache
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IF(exe_cmd == `CMD_CALL_2);
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SET(exe_glob_param_1_set);
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SET(exe_glob_param_1_value, { 14'd0, `TASK_SWITCH_FROM_CALL, glob_param_1[15:0] });
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ENDIF();
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IF(exe_cmd == `CMD_JMP);
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SET(exe_glob_param_1_set);
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SET(exe_glob_param_1_value, { 14'd0, `TASK_SWITCH_FROM_JUMP, glob_param_1[15:0] });
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ENDIF();
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SET(exe_glob_param_3_set);
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SET(exe_glob_param_3_value, { 10'd0, exe_consumed, 1'd0, 1'd0, 16'd0 });
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ENDIF();
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IF((exe_cmd == `CMD_CALL_2 && exe_cmdex == `CMDEX_CALL_2_task_gate_STEP_1) ||
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(exe_cmd == `CMD_JMP && exe_cmdex == `CMDEX_JMP_task_gate_STEP_1) ||
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(exe_cmd == `CMD_int && exe_cmdex == `CMDEX_int_task_gate_STEP_1));
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IF(glob_param_1[`SELECTOR_BIT_TI] || glob_descriptor[`DESC_BIT_SEG] || (glob_descriptor[`DESC_BITS_TYPE] != `DESC_TSS_AVAIL_386 && glob_descriptor[`DESC_BITS_TYPE] != `DESC_TSS_AVAIL_286));
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SET(exe_waiting);
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SET(exe_trigger_gp_fault); //exception GP(val)
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SET(exe_error_code, `SELECTOR_FOR_CODE(glob_param_1));
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ENDIF();
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IF(~(exe_trigger_gp_fault) && exe_descriptor[`DESC_BIT_P] == `FALSE);
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SET(exe_waiting);
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SET(exe_trigger_np_fault); //exception GP(val)
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SET(exe_error_code, `SELECTOR_FOR_CODE(glob_param_1));
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ENDIF();
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// task switch:
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// glob_param_1[15:0] --> new_tr
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// glob_param_1[17:16] --> source
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// glob_param_2 --> [used internal]
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// glob_param_3[15:0] --> error_code
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// glob_param_3[16] --> push code flag
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// glob_param_3[17] --> [internal] is push 32 bit (TSS386)
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// glob_param_3[21:18] --> cmd_len
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// glob_descriptor --> new_tr_cache
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IF(exe_cmd == `CMD_CALL_2);
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SET(exe_glob_param_1_set);
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SET(exe_glob_param_1_value, { 14'd0, `TASK_SWITCH_FROM_CALL, glob_param_1[15:0] });
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ENDIF();
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IF(exe_cmd == `CMD_JMP);
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SET(exe_glob_param_1_set);
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SET(exe_glob_param_1_value, { 14'd0, `TASK_SWITCH_FROM_JUMP, glob_param_1[15:0] });
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ENDIF();
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IF(exe_cmd == `CMD_int);
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SET(exe_glob_param_1_set);
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SET(exe_glob_param_1_value, { 14'd0, `TASK_SWITCH_FROM_INT, glob_param_1[15:0] });
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ENDIF();
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| 213 |
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IF(exe_cmd != `CMD_int);
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SET(exe_glob_param_3_set);
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SET(exe_glob_param_3_value, { 10'd0, exe_consumed, 1'd0, 1'd0, 16'd0 });
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ENDIF();
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| 218 |
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IF(exe_cmd == `CMD_int);
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| 219 |
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SET(exe_glob_param_3_set);
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SET(exe_glob_param_3_value, { 10'd0, exe_consumed, 1'd0, exc_push_error, exc_error_code[15:0] });
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| 221 |
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ENDIF();
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| 222 |
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ENDIF();
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| 223 |
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| 224 |
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| 225 |
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| 226 |
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IF((exe_cmd == `CMD_CALL_2 && exe_cmdex == `CMDEX_CALL_2_call_gate_STEP_1) ||
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| 227 |
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(exe_cmd == `CMD_int && exe_cmdex == `CMDEX_int_int_trap_gate_STEP_1));
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| 228 |
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| 229 |
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IF(glob_param_1[15:2] == 14'd0 || glob_descriptor[`DESC_BIT_SEG] == `FALSE ||
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| 230 |
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`DESC_IS_DATA(glob_descriptor) || glob_descriptor[`DESC_BITS_DPL] > cpl);
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| 231 |
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| 232 |
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SET(exe_waiting);
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| 233 |
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SET(exe_trigger_gp_fault); //exception GP(val)
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| 234 |
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SET(exe_error_code, `SELECTOR_FOR_CODE(glob_param_1));
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| 235 |
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ENDIF();
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| 236 |
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| 237 |
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IF(~(exe_trigger_gp_fault) && exe_descriptor[`DESC_BIT_P] == `FALSE);
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| 238 |
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SET(exe_waiting);
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| 239 |
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SET(exe_trigger_np_fault); //exception GP(val)
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| 240 |
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SET(exe_error_code, `SELECTOR_FOR_CODE(glob_param_1));
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| 241 |
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ENDIF();
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| 242 |
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ENDIF();
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| 243 |
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| 244 |
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| 245 |
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| 246 |
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IF((exe_cmd == `CMD_CALL_2 && exe_cmdex == `CMDEX_CALL_2_call_gate_more_STEP_2) ||
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| 247 |
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(exe_cmd == `CMD_int_2 && exe_cmdex == `CMDEX_int_2_int_trap_gate_more_STEP_2));
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| 248 |
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| 249 |
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IF(exe_cmd == `CMD_CALL_2);
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| 250 |
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SET(exe_result_push, { 16'd0, ss[15:0] });
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| 251 |
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SET(offset_new_stack_minus);
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| 252 |
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ENDIF();
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| 253 |
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| 254 |
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IF(glob_param_5[0] || glob_param_1[`SELECTOR_BITS_RPL] != glob_descriptor_2[`DESC_BITS_DPL] || // selector not in limits,
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| 255 |
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glob_descriptor[`DESC_BITS_DPL] != glob_descriptor_2[`DESC_BITS_DPL] ||
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| 256 |
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glob_descriptor[`DESC_BIT_SEG] == `FALSE || `DESC_IS_CODE(glob_descriptor) || `DESC_IS_DATA_RO(glob_descriptor));
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| 257 |
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| 258 |
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SET(exe_waiting);
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| 259 |
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| 260 |
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SET(exe_trigger_ts_fault);
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| 261 |
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SET(exe_error_code, `SELECTOR_FOR_CODE(glob_param_1));
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| 262 |
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ENDIF();
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| 263 |
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| 264 |
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IF(glob_param_5[0] == 1'b0 && ~(exe_trigger_ts_fault) && ~(glob_descriptor[`DESC_BIT_P]));
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| 265 |
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SET(exe_waiting);
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| 266 |
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| 267 |
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SET(exe_trigger_ss_fault);
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| 268 |
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SET(exe_error_code, `SELECTOR_FOR_CODE(glob_param_1));
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| 269 |
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ENDIF();
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| 270 |
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ENDIF();
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| 271 |
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| 272 |
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| 273 |
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| 274 |
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IF((wr_cmd == `CMD_RET_far && wr_cmdex == `CMDEX_RET_far_same_STEP_3) ||
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| 275 |
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(wr_cmd == `CMD_IRET_2 && wr_cmdex == `CMDEX_IRET_2_protected_same_STEP_0) ||
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| 276 |
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(wr_cmd == `CMD_CALL_2 && wr_cmdex == `CMDEX_CALL_2_protected_seg_STEP_3) ||
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| 277 |
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(wr_cmd == `CMD_CALL_2 && wr_cmdex == `CMDEX_CALL_2_call_gate_same_STEP_2) ||
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| 278 |
|
|
(wr_cmd == `CMD_JMP && wr_cmdex == `CMDEX_JMP_protected_seg_STEP_0) ||
|
| 279 |
|
|
(wr_cmd == `CMD_JMP_2 && wr_cmdex == `CMDEX_JMP_2_call_gate_STEP_2) ||
|
| 280 |
|
|
(wr_cmd == `CMD_int_2 && wr_cmdex == `CMDEX_int_2_int_trap_gate_same_STEP_4));
|
| 281 |
|
|
|
| 282 |
|
|
SET(wr_not_finished);
|
| 283 |
|
|
|
| 284 |
|
|
// save esp
|
| 285 |
|
|
// touch
|
| 286 |
|
|
// save descriptor
|
| 287 |
|
|
|
| 288 |
|
|
SET(wr_seg_rpl, (wr_cmd == `CMD_CALL_2 || wr_cmd == `CMD_JMP || wr_cmd == `CMD_JMP_2 || wr_cmd == `CMD_int_2)? cpl : glob_param_1[1:0]);
|
| 289 |
|
|
SET(wr_seg_cache_valid, `TRUE);
|
| 290 |
|
|
SET(wr_seg_sel, (wr_cmd == `CMD_CALL_2 || wr_cmd == `CMD_JMP || wr_cmd == `CMD_JMP_2 || wr_cmd == `CMD_int_2)? { glob_param_1[15:2], cpl } : glob_param_1[15:0]); // CPL = RPL
|
| 291 |
|
|
|
| 292 |
|
|
IF(`DESC_IS_NOT_ACCESSED(glob_descriptor));
|
| 293 |
|
|
|
| 294 |
|
|
SET(write_system_touch);
|
| 295 |
|
|
|
| 296 |
|
|
IF(~(write_for_wr_ready)); SET(wr_waiting);
|
| 297 |
|
|
ELSE();
|
| 298 |
|
|
SET(write_seg_cache);
|
| 299 |
|
|
//wr_seg_cache_mask zero
|
| 300 |
|
|
|
| 301 |
|
|
SET(write_seg_sel);
|
| 302 |
|
|
SET(write_seg_cache_valid);
|
| 303 |
|
|
SET(write_seg_rpl);
|
| 304 |
|
|
|
| 305 |
|
|
IF(wr_cmd != `CMD_JMP && wr_cmd != `CMD_JMP_2 && wr_cmd != `CMD_int_2); SAVE(esp, wr_stack_esp); ENDIF();
|
| 306 |
|
|
SET(wr_make_esp_commit);
|
| 307 |
|
|
ENDIF();
|
| 308 |
|
|
ELSE();
|
| 309 |
|
|
SET(write_seg_cache);
|
| 310 |
|
|
//wr_seg_cache_mask zero
|
| 311 |
|
|
|
| 312 |
|
|
SET(write_seg_sel);
|
| 313 |
|
|
SET(write_seg_cache_valid);
|
| 314 |
|
|
SET(write_seg_rpl);
|
| 315 |
|
|
|
| 316 |
|
|
IF(wr_cmd != `CMD_JMP && wr_cmd != `CMD_JMP_2 && wr_cmd != `CMD_int_2); SAVE(esp, wr_stack_esp); ENDIF();
|
| 317 |
|
|
SET(wr_make_esp_commit);
|
| 318 |
|
|
ENDIF();
|
| 319 |
|
|
ENDIF();
|
| 320 |
|
|
|
| 321 |
|
|
|
| 322 |
|
|
|
| 323 |
|
|
IF((wr_cmd == `CMD_CALL_3 && wr_cmdex == `CMDEX_CALL_3_call_gate_more_STEP_9) ||
|
| 324 |
|
|
(wr_cmd == `CMD_int_3 && wr_cmdex == `CMDEX_int_3_int_trap_gate_more_STEP_4));
|
| 325 |
|
|
|
| 326 |
|
|
SET(wr_not_finished);
|
| 327 |
|
|
|
| 328 |
|
|
// touch
|
| 329 |
|
|
// save descriptor
|
| 330 |
|
|
|
| 331 |
|
|
SET(wr_seg_rpl, glob_descriptor[`DESC_BITS_DPL]);
|
| 332 |
|
|
SET(wr_seg_cache_valid, `TRUE);
|
| 333 |
|
|
SET(wr_seg_sel, { glob_param_1[15:2], glob_descriptor[`DESC_BITS_DPL] });
|
| 334 |
|
|
|
| 335 |
|
|
IF(`DESC_IS_NOT_ACCESSED(glob_descriptor));
|
| 336 |
|
|
|
| 337 |
|
|
SET(write_system_touch);
|
| 338 |
|
|
|
| 339 |
|
|
IF(~(write_for_wr_ready)); SET(wr_waiting);
|
| 340 |
|
|
ELSE();
|
| 341 |
|
|
SET(write_seg_cache);
|
| 342 |
|
|
//wr_seg_cache_mask zero
|
| 343 |
|
|
|
| 344 |
|
|
SET(write_seg_sel);
|
| 345 |
|
|
SET(write_seg_cache_valid);
|
| 346 |
|
|
SET(write_seg_rpl);
|
| 347 |
|
|
ENDIF();
|
| 348 |
|
|
ELSE();
|
| 349 |
|
|
SET(write_seg_cache);
|
| 350 |
|
|
//wr_seg_cache_mask zero
|
| 351 |
|
|
|
| 352 |
|
|
SET(write_seg_sel);
|
| 353 |
|
|
SET(write_seg_cache_valid);
|
| 354 |
|
|
SET(write_seg_rpl);
|
| 355 |
|
|
ENDIF();
|
| 356 |
|
|
ENDIF();
|
| 357 |
|
|
|
| 358 |
|
|
|
| 359 |
|
|
|
| 360 |
|
|
IF((wr_cmd == `CMD_RET_far && wr_cmdex == `CMDEX_RET_far_same_STEP_4) ||
|
| 361 |
|
|
(wr_cmd == `CMD_CALL_2 && wr_cmdex == `CMDEX_CALL_2_protected_seg_STEP_4) ||
|
| 362 |
|
|
(wr_cmd == `CMD_CALL_2 && wr_cmdex == `CMDEX_CALL_2_call_gate_same_STEP_3) ||
|
| 363 |
|
|
(wr_cmd == `CMD_CALL_3 && wr_cmdex == `CMDEX_CALL_3_call_gate_more_STEP_10) ||
|
| 364 |
|
|
(wr_cmd == `CMD_JMP && wr_cmdex == `CMDEX_JMP_protected_seg_STEP_1) ||
|
| 365 |
|
|
(wr_cmd == `CMD_JMP_2 && wr_cmdex == `CMDEX_JMP_2_call_gate_STEP_3));
|
| 366 |
|
|
|
| 367 |
|
|
// clear pipeline
|
| 368 |
|
|
SET(wr_req_reset_pr);
|
| 369 |
|
|
SET(wr_req_reset_dec);
|
| 370 |
|
|
SET(wr_req_reset_micro);
|
| 371 |
|
|
SET(wr_req_reset_rd);
|
| 372 |
|
|
SET(wr_req_reset_exe);
|
| 373 |
|
|
ENDIF();
|
| 374 |
|
|
|
| 375 |
|
|
|
| 376 |
|
|
|
| 377 |
|
|
IF((wr_cmd == `CMD_RET_far && wr_cmdex == `CMDEX_RET_far_outer_STEP_5) ||
|
| 378 |
|
|
(wr_cmd == `CMD_IRET_2 && wr_cmdex == `CMDEX_IRET_2_protected_outer_STEP_3));
|
| 379 |
|
|
|
| 380 |
|
|
SET(wr_not_finished);
|
| 381 |
|
|
|
| 382 |
|
|
SAVE(wr_task_rpl, cpl);
|
| 383 |
|
|
|
| 384 |
|
|
// touch
|
| 385 |
|
|
// save descriptor
|
| 386 |
|
|
|
| 387 |
|
|
SET(wr_seg_rpl, glob_param_1[1:0]);
|
| 388 |
|
|
SET(wr_seg_cache_valid, `TRUE);
|
| 389 |
|
|
SET(wr_seg_sel, glob_param_1[15:0]); // CPL = RPL
|
| 390 |
|
|
|
| 391 |
|
|
IF(`DESC_IS_NOT_ACCESSED(glob_descriptor));
|
| 392 |
|
|
|
| 393 |
|
|
SET(write_system_touch);
|
| 394 |
|
|
|
| 395 |
|
|
IF(~(write_for_wr_ready)); SET(wr_waiting);
|
| 396 |
|
|
ELSE();
|
| 397 |
|
|
SET(write_seg_cache);
|
| 398 |
|
|
//wr_seg_cache_mask zero
|
| 399 |
|
|
|
| 400 |
|
|
SET(write_seg_sel);
|
| 401 |
|
|
SET(write_seg_cache_valid);
|
| 402 |
|
|
SET(write_seg_rpl);
|
| 403 |
|
|
ENDIF();
|
| 404 |
|
|
ELSE();
|
| 405 |
|
|
SET(write_seg_cache);
|
| 406 |
|
|
//wr_seg_cache_mask zero
|
| 407 |
|
|
|
| 408 |
|
|
SET(write_seg_sel);
|
| 409 |
|
|
SET(write_seg_cache_valid);
|
| 410 |
|
|
SET(write_seg_rpl);
|
| 411 |
|
|
ENDIF();
|
| 412 |
|
|
ENDIF();
|
| 413 |
|
|
|
| 414 |
|
|
|
| 415 |
|
|
|
| 416 |
|
|
IF((wr_cmd == `CMD_RET_far && wr_cmdex == `CMDEX_RET_far_outer_STEP_6) ||
|
| 417 |
|
|
(wr_cmd == `CMD_IRET_2 && wr_cmdex == `CMDEX_IRET_2_protected_outer_STEP_5) ||
|
| 418 |
|
|
(wr_cmd == `CMD_CALL_3 && wr_cmdex == `CMDEX_CALL_3_call_gate_more_STEP_8) ||
|
| 419 |
|
|
(wr_cmd == `CMD_int_3 && wr_cmdex == `CMDEX_int_3_int_trap_gate_more_STEP_5));
|
| 420 |
|
|
|
| 421 |
|
|
SET(wr_not_finished);
|
| 422 |
|
|
|
| 423 |
|
|
// touch
|
| 424 |
|
|
// save descriptor
|
| 425 |
|
|
|
| 426 |
|
|
SET(wr_seg_rpl, glob_param_1[1:0]);
|
| 427 |
|
|
SET(wr_seg_cache_valid, `TRUE);
|
| 428 |
|
|
SET(wr_seg_sel, glob_param_1[15:0]); // ss.rpl == cs.rpl (checked before)
|
| 429 |
|
|
|
| 430 |
|
|
IF(`DESC_IS_NOT_ACCESSED(glob_descriptor) && glob_param_1[15:2] != 14'd0);
|
| 431 |
|
|
|
| 432 |
|
|
SET(write_system_touch);
|
| 433 |
|
|
|
| 434 |
|
|
IF(~(write_for_wr_ready)); SET(wr_waiting);
|
| 435 |
|
|
ELSE();
|
| 436 |
|
|
SET(write_seg_cache);
|
| 437 |
|
|
//wr_seg_cache_mask zero
|
| 438 |
|
|
|
| 439 |
|
|
SET(write_seg_sel);
|
| 440 |
|
|
SET(write_seg_cache_valid);
|
| 441 |
|
|
SET(write_seg_rpl);
|
| 442 |
|
|
ENDIF();
|
| 443 |
|
|
ELSE();
|
| 444 |
|
|
SET(write_seg_cache);
|
| 445 |
|
|
//wr_seg_cache_mask zero
|
| 446 |
|
|
|
| 447 |
|
|
SET(write_seg_sel);
|
| 448 |
|
|
SET(write_seg_cache_valid);
|
| 449 |
|
|
SET(write_seg_rpl);
|
| 450 |
|
|
ENDIF();
|
| 451 |
|
|
ENDIF();
|
| 452 |
|
|
|
| 453 |
|
|
|
| 454 |
|
|
|
| 455 |
|
|
IF((wr_cmd == `CMD_RET_far && wr_cmdex == `CMDEX_RET_far_outer_STEP_7) || +
|
| 456 |
|
|
(wr_cmd == `CMD_IRET_2 && wr_cmdex == `CMDEX_IRET_2_protected_outer_STEP_6));
|
| 457 |
|
|
// save esp
|
| 458 |
|
|
|
| 459 |
|
|
SAVE(esp, wr_stack_esp);
|
| 460 |
|
|
SET(wr_make_esp_commit);
|
| 461 |
|
|
|
| 462 |
|
|
// validate seg regs
|
| 463 |
|
|
SET(wr_validate_seg_regs);
|
| 464 |
|
|
|
| 465 |
|
|
// clear pipeline
|
| 466 |
|
|
SET(wr_req_reset_pr);
|
| 467 |
|
|
SET(wr_req_reset_dec);
|
| 468 |
|
|
SET(wr_req_reset_micro);
|
| 469 |
|
|
SET(wr_req_reset_rd);
|
| 470 |
|
|
SET(wr_req_reset_exe);
|
| 471 |
|
|
ENDIF();
|
| 472 |
|
|
|
| 473 |
|
|
|
| 474 |
|
|
|
| 475 |
|
|
IF((wr_cmd == `CMD_CALL && (wr_cmdex == `CMDEX_CALL_protected_STEP_0 || wr_cmdex == `CMDEX_CALL_protected_STEP_1)) ||
|
| 476 |
|
|
(wr_cmd == `CMD_JMP && (wr_cmdex == `CMDEX_JMP_protected_STEP_0 || wr_cmdex == `CMDEX_JMP_protected_STEP_1)));
|
| 477 |
|
|
|
| 478 |
|
|
SET(wr_not_finished);
|
| 479 |
|
|
ENDIF();
|
| 480 |
|
|
|
| 481 |
|
|
|
| 482 |
|
|
|
| 483 |
|
|
IF((wr_cmd == `CMD_CALL_2 && wr_cmdex == `CMDEX_CALL_2_task_gate_STEP_0) ||
|
| 484 |
|
|
(wr_cmd == `CMD_JMP && wr_cmdex == `CMDEX_JMP_task_gate_STEP_0) ||
|
| 485 |
|
|
(wr_cmd == `CMD_int && wr_cmdex == `CMDEX_int_task_gate_STEP_0));
|
| 486 |
|
|
|
| 487 |
|
|
SET(wr_not_finished);
|
| 488 |
|
|
ENDIF();
|
| 489 |
|
|
|
| 490 |
|
|
|
| 491 |
|
|
|
| 492 |
|
|
IF((wr_cmd == `CMD_CALL_2 && wr_cmdex == `CMDEX_CALL_2_task_gate_STEP_1) ||
|
| 493 |
|
|
(wr_cmd == `CMD_JMP && wr_cmdex == `CMDEX_JMP_task_gate_STEP_1) ||
|
| 494 |
|
|
(wr_cmd == `CMD_int && wr_cmdex == `CMDEX_int_task_gate_STEP_1));
|
| 495 |
|
|
|
| 496 |
|
|
SET(wr_not_finished);
|
| 497 |
|
|
ENDIF();
|
| 498 |
|
|
|
| 499 |
|
|
|
| 500 |
|
|
|
| 501 |
|
|
IF((wr_cmd == `CMD_CALL_2 && wr_cmdex == `CMDEX_CALL_2_call_gate_STEP_0) ||
|
| 502 |
|
|
(wr_cmd == `CMD_int && wr_cmdex == `CMDEX_int_int_trap_gate_STEP_0));
|
| 503 |
|
|
|
| 504 |
|
|
SET(wr_not_finished);
|
| 505 |
|
|
ENDIF();
|
| 506 |
|
|
|
| 507 |
|
|
|
| 508 |
|
|
|
| 509 |
|
|
IF((wr_cmd == `CMD_CALL_2 && wr_cmdex == `CMDEX_CALL_2_call_gate_STEP_1) ||
|
| 510 |
|
|
(wr_cmd == `CMD_int && wr_cmdex == `CMDEX_int_int_trap_gate_STEP_1));
|
| 511 |
|
|
|
| 512 |
|
|
SET(wr_not_finished);
|
| 513 |
|
|
ENDIF();
|
| 514 |
|
|
|
| 515 |
|
|
|
| 516 |
|
|
|
| 517 |
|
|
IF((wr_cmd == `CMD_CALL_2 && wr_cmdex == `CMDEX_CALL_2_call_gate_STEP_2) ||
|
| 518 |
|
|
(wr_cmd == `CMD_int && wr_cmdex == `CMDEX_int_int_trap_gate_STEP_2));
|
| 519 |
|
|
|
| 520 |
|
|
SET(wr_not_finished);
|
| 521 |
|
|
ENDIF();
|
| 522 |
|
|
|
| 523 |
|
|
|
| 524 |
|
|
|
| 525 |
|
|
IF((wr_cmd == `CMD_CALL_2 && (wr_cmdex == `CMDEX_CALL_2_call_gate_same_STEP_0 || wr_cmdex == `CMDEX_CALL_2_call_gate_same_STEP_1)) ||
|
| 526 |
|
|
(wr_cmd == `CMD_int_2 && (wr_cmdex == `CMDEX_int_2_int_trap_gate_same_STEP_0 || wr_cmdex == `CMDEX_int_2_int_trap_gate_same_STEP_1 ||
|
| 527 |
|
|
wr_cmdex == `CMDEX_int_2_int_trap_gate_same_STEP_2 || wr_cmdex == `CMDEX_int_2_int_trap_gate_same_STEP_3)));
|
| 528 |
|
|
|
| 529 |
|
|
SET(wr_not_finished);
|
| 530 |
|
|
|
| 531 |
|
|
SET(wr_push_ss_fault_check);
|
| 532 |
|
|
SET(wr_one_cycle_wait);
|
| 533 |
|
|
|
| 534 |
|
|
SET(wr_push_length_word, ~(glob_param_1[19]));
|
| 535 |
|
|
SET(wr_push_length_dword, glob_param_1[19]);
|
| 536 |
|
|
|
| 537 |
|
|
IF(~(write_for_wr_ready)); SET(wr_waiting); ENDIF();
|
| 538 |
|
|
|
| 539 |
|
|
IF(~(wr_push_ss_fault));
|
| 540 |
|
|
SET(write_stack_virtual);
|
| 541 |
|
|
|
| 542 |
|
|
SAVE(esp, wr_stack_esp); //speculative set before
|
| 543 |
|
|
ENDIF();
|
| 544 |
|
|
ENDIF();
|
| 545 |
|
|
|
| 546 |
|
|
|
| 547 |
|
|
|
| 548 |
|
|
IF((wr_cmd == `CMD_CALL_2 && wr_cmdex == `CMDEX_CALL_2_call_gate_more_STEP_0) ||
|
| 549 |
|
|
(wr_cmd == `CMD_int_2 && wr_cmdex == `CMDEX_int_2_int_trap_gate_more_STEP_0));
|
| 550 |
|
|
|
| 551 |
|
|
SET(wr_not_finished);
|
| 552 |
|
|
ENDIF();
|
| 553 |
|
|
|
| 554 |
|
|
|
| 555 |
|
|
|
| 556 |
|
|
IF((wr_cmd == `CMD_CALL_2 && wr_cmdex == `CMDEX_CALL_2_call_gate_more_STEP_1) ||
|
| 557 |
|
|
(wr_cmd == `CMD_int_2 && wr_cmdex == `CMDEX_int_2_int_trap_gate_more_STEP_1));
|
| 558 |
|
|
|
| 559 |
|
|
SET(wr_not_finished);
|
| 560 |
|
|
ENDIF();
|
| 561 |
|
|
|