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alfik |
/*
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* Copyright (c) 2014, Aleksander Osman
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* * Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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`include "defines.v"
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module memory(
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input clk,
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input rst_n,
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input rst_internal_n,
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//REQ:
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input read_do,
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output read_done,
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output read_page_fault,
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output read_ac_fault,
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input [1:0] read_cpl,
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input [31:0] read_address,
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input [3:0] read_length,
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input read_lock,
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input read_rmw,
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output [63:0] read_data,
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//END
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//REQ:
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input write_do,
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output write_done,
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output write_page_fault,
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output write_ac_fault,
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input [1:0] write_cpl,
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input [31:0] write_address,
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input [2:0] write_length,
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input write_lock,
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input write_rmw,
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input [31:0] write_data,
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//END
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//REQ:
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input tlbcheck_do,
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output tlbcheck_done,
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output tlbcheck_page_fault,
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input [31:0] tlbcheck_address,
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input tlbcheck_rw,
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//END
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output dcache_busy,
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//RESP:
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input tlbflushsingle_do,
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output tlbflushsingle_done,
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input [31:0] tlbflushsingle_address,
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//END
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//RESP:
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input tlbflushall_do,
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//END
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//RESP:
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input invdcode_do,
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output invdcode_done,
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//END
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//RESP:
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input invddata_do,
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output invddata_done,
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//END
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//RESP:
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input wbinvddata_do,
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output wbinvddata_done,
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//END
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// prefetch exported
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input [1:0] prefetch_cpl,
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input [31:0] prefetch_eip,
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input [63:0] cs_cache,
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input cr0_pg,
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input cr0_wp,
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input cr0_am,
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input cr0_cd,
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input cr0_nw,
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input acflag,
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input [31:0] cr3,
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// prefetch_fifo exported
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input prefetchfifo_accept_do,
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output [67:0] prefetchfifo_accept_data,
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output prefetchfifo_accept_empty,
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input pipeline_after_read_empty,
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input pipeline_after_prefetch_empty,
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output [31:0] tlb_code_pf_cr2,
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output [15:0] tlb_code_pf_error_code,
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output [31:0] tlb_check_pf_cr2,
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output [15:0] tlb_check_pf_error_code,
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output [31:0] tlb_write_pf_cr2,
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output [15:0] tlb_write_pf_error_code,
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output [31:0] tlb_read_pf_cr2,
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output [15:0] tlb_read_pf_error_code,
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// reset exported
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input pr_reset,
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input rd_reset,
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input exe_reset,
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input wr_reset,
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// avalon master
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output [31:0] avm_address,
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output [31:0] avm_writedata,
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output [3:0] avm_byteenable,
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output [2:0] avm_burstcount,
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output avm_write,
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output avm_read,
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input avm_waitrequest,
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input avm_readdatavalid,
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input [31:0] avm_readdata
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);
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//------------------------------------------------------------------------------
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wire req_writeburst_do;
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wire req_writeburst_done;
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wire [31:0] req_writeburst_address;
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wire [1:0] req_writeburst_dword_length;
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wire [3:0] req_writeburst_byteenable_0;
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wire [3:0] req_writeburst_byteenable_1;
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wire [55:0] req_writeburst_data;
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wire resp_writeburst_do;
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wire resp_writeburst_done;
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wire [31:0] resp_writeburst_address;
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wire [1:0] resp_writeburst_dword_length;
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wire [3:0] resp_writeburst_byteenable_0;
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wire [3:0] resp_writeburst_byteenable_1;
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wire [55:0] resp_writeburst_data;
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link_writeburst link_writeburst_inst(
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.clk (clk),
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.rst_n (rst_internal_n),
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// writeburst REQ
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.req_writeburst_do (req_writeburst_do), //input
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.req_writeburst_done (req_writeburst_done), //output
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.req_writeburst_address (req_writeburst_address), //input [31:0]
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.req_writeburst_dword_length (req_writeburst_dword_length), //input [1:0]
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.req_writeburst_byteenable_0 (req_writeburst_byteenable_0), //input [3:0]
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.req_writeburst_byteenable_1 (req_writeburst_byteenable_1), //input [3:0]
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.req_writeburst_data (req_writeburst_data), //input [55:0]
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// writeburst RESP
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.resp_writeburst_do (resp_writeburst_do), //output
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.resp_writeburst_done (resp_writeburst_done), //input
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.resp_writeburst_address (resp_writeburst_address), //output [31:0]
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.resp_writeburst_dword_length (resp_writeburst_dword_length), //output [1:0]
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.resp_writeburst_byteenable_0 (resp_writeburst_byteenable_0), //output [3:0]
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.resp_writeburst_byteenable_1 (resp_writeburst_byteenable_1), //output [3:0]
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.resp_writeburst_data (resp_writeburst_data) //output [55:0]
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);
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//------------------------------------------------------------------------------
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wire req_writeline_do;
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wire req_writeline_done;
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wire [31:0] req_writeline_address;
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wire [127:0] req_writeline_line;
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wire resp_writeline_do;
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wire resp_writeline_done;
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wire [31:0] resp_writeline_address;
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wire [127:0] resp_writeline_line;
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link_writeline link_writeline_inst(
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.clk (clk),
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.rst_n (rst_internal_n),
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// writeline REQ
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.req_writeline_do (req_writeline_do), //input
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.req_writeline_done (req_writeline_done), //output
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.req_writeline_address (req_writeline_address), //input [31:0]
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.req_writeline_line (req_writeline_line), //input [127:0]
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// writeline RESP
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.resp_writeline_do (resp_writeline_do), //output
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.resp_writeline_done (resp_writeline_done), //input
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.resp_writeline_address (resp_writeline_address), //output [31:0]
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.resp_writeline_line (resp_writeline_line) //output [127:0]
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);
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//------------------------------------------------------------------------------
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wire req_readburst_do;
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wire req_readburst_done;
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wire [31:0] req_readburst_address;
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wire [1:0] req_readburst_dword_length;
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wire [3:0] req_readburst_byte_length;
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wire [95:0] req_readburst_data;
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wire resp_readburst_do;
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wire resp_readburst_done;
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wire [31:0] resp_readburst_address;
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wire [1:0] resp_readburst_dword_length;
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wire [3:0] resp_readburst_byte_length;
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wire [95:0] resp_readburst_data;
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link_readburst link_readburst_inst(
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.clk (clk),
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.rst_n (rst_internal_n),
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// readburst REQ
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.req_readburst_do (req_readburst_do), //input
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.req_readburst_done (req_readburst_done), //output
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.req_readburst_address (req_readburst_address), //input [31:0]
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.req_readburst_dword_length (req_readburst_dword_length), //input [1:0]
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.req_readburst_byte_length (req_readburst_byte_length), //input [11:0]
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.req_readburst_data (req_readburst_data), //output [95:0]
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// readburst RESP
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.resp_readburst_do (resp_readburst_do), //output
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.resp_readburst_done (resp_readburst_done), //input
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.resp_readburst_address (resp_readburst_address), //output [31:0]
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.resp_readburst_dword_length (resp_readburst_dword_length), //output [1:0]
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.resp_readburst_byte_length (resp_readburst_byte_length), //output [3:0]
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.resp_readburst_data (resp_readburst_data) //input [95:0]
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);
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//------------------------------------------------------------------------------
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wire req_readline_do;
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wire req_readline_done;
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wire [31:0] req_readline_address;
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wire [127:0] req_readline_line;
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wire resp_readline_do;
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wire resp_readline_done;
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wire [31:0] resp_readline_address;
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wire [127:0] resp_readline_line;
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link_readline link_readline_inst(
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.clk (clk),
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.rst_n (rst_internal_n),
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// readline REQ
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.req_readline_do (req_readline_do), //input
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.req_readline_done (req_readline_done), //output
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.req_readline_address (req_readline_address), //input [31:0]
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.req_readline_line (req_readline_line), //output [127:0]
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// readline RESP
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.resp_readline_do (resp_readline_do), //output
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.resp_readline_done (resp_readline_done), //input
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.resp_readline_address (resp_readline_address),//output [31:0]
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.resp_readline_line (resp_readline_line) //input [127:0]
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);
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//------------------------------------------------------------------------------
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wire req_readcode_do;
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wire req_readcode_done;
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wire [31:0] req_readcode_address;
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wire [127:0] req_readcode_line;
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wire [31:0] req_readcode_partial;
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wire req_readcode_partial_done;
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wire resp_readcode_do;
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wire resp_readcode_done;
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wire [31:0] resp_readcode_address;
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wire [127:0] resp_readcode_line;
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wire [31:0] resp_readcode_partial;
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wire resp_readcode_partial_done;
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link_readcode link_readcode_inst(
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.clk (clk),
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.rst_n (rst_internal_n),
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// readcode REQ
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.req_readcode_do (req_readcode_do), //input
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.req_readcode_done (req_readcode_done), //output
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.req_readcode_address (req_readcode_address), //input [31:0]
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.req_readcode_line (req_readcode_line), //output [127:0]
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.req_readcode_partial (req_readcode_partial), //output [31:0]
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.req_readcode_partial_done (req_readcode_partial_done), //output
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// readcode RESP
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.resp_readcode_do (resp_readcode_do), //output
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.resp_readcode_done (resp_readcode_done), //input
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.resp_readcode_address (resp_readcode_address), //output [31:0]
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.resp_readcode_line (resp_readcode_line), //input [127:0]
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.resp_readcode_partial (resp_readcode_partial), //input [31:0]
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.resp_readcode_partial_done (resp_readcode_partial_done) //input
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);
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//------------------------------------------------------------------------------
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wire req_dcacheread_do;
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wire req_dcacheread_done;
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wire [3:0] req_dcacheread_length;
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wire req_dcacheread_cache_disable;
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wire [31:0] req_dcacheread_address;
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wire [63:0] req_dcacheread_data;
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wire resp_dcacheread_do;
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350 |
|
|
wire resp_dcacheread_done;
|
351 |
|
|
wire [3:0] resp_dcacheread_length;
|
352 |
|
|
wire resp_dcacheread_cache_disable;
|
353 |
|
|
wire [31:0] resp_dcacheread_address;
|
354 |
|
|
wire [63:0] resp_dcacheread_data;
|
355 |
|
|
|
356 |
|
|
link_dcacheread link_dcacheread_inst(
|
357 |
|
|
.clk (clk),
|
358 |
|
|
.rst_n (rst_internal_n),
|
359 |
|
|
|
360 |
|
|
// dcacheread REQ
|
361 |
|
|
.req_dcacheread_do (req_dcacheread_do), //input
|
362 |
|
|
.req_dcacheread_done (req_dcacheread_done), //output
|
363 |
|
|
|
364 |
|
|
.req_dcacheread_length (req_dcacheread_length), //input [3:0]
|
365 |
|
|
.req_dcacheread_cache_disable (req_dcacheread_cache_disable), //input
|
366 |
|
|
.req_dcacheread_address (req_dcacheread_address), //input [31:0]
|
367 |
|
|
.req_dcacheread_data (req_dcacheread_data), //output [63:0]
|
368 |
|
|
|
369 |
|
|
// dcacheread RESP
|
370 |
|
|
.resp_dcacheread_do (resp_dcacheread_do), //output
|
371 |
|
|
.resp_dcacheread_done (resp_dcacheread_done), //input
|
372 |
|
|
|
373 |
|
|
.resp_dcacheread_length (resp_dcacheread_length), //output [3:0]
|
374 |
|
|
.resp_dcacheread_cache_disable (resp_dcacheread_cache_disable), //output
|
375 |
|
|
.resp_dcacheread_address (resp_dcacheread_address), //output [31:0]
|
376 |
|
|
.resp_dcacheread_data (resp_dcacheread_data) //input [63:0]
|
377 |
|
|
);
|
378 |
|
|
|
379 |
|
|
//------------------------------------------------------------------------------
|
380 |
|
|
|
381 |
|
|
wire req_dcachewrite_do;
|
382 |
|
|
wire req_dcachewrite_done;
|
383 |
|
|
wire [2:0] req_dcachewrite_length;
|
384 |
|
|
wire req_dcachewrite_cache_disable;
|
385 |
|
|
wire [31:0] req_dcachewrite_address;
|
386 |
|
|
wire req_dcachewrite_write_through;
|
387 |
|
|
wire [31:0] req_dcachewrite_data;
|
388 |
|
|
|
389 |
|
|
wire resp_dcachewrite_do;
|
390 |
|
|
wire resp_dcachewrite_done;
|
391 |
|
|
wire [2:0] resp_dcachewrite_length;
|
392 |
|
|
wire resp_dcachewrite_cache_disable;
|
393 |
|
|
wire [31:0] resp_dcachewrite_address;
|
394 |
|
|
wire resp_dcachewrite_write_through;
|
395 |
|
|
wire [31:0] resp_dcachewrite_data;
|
396 |
|
|
|
397 |
|
|
link_dcachewrite link_dcachewrite_inst(
|
398 |
|
|
.clk (clk),
|
399 |
|
|
.rst_n (rst_internal_n),
|
400 |
|
|
|
401 |
|
|
// dcachewrite REQ
|
402 |
|
|
.req_dcachewrite_do (req_dcachewrite_do), //input
|
403 |
|
|
.req_dcachewrite_done (req_dcachewrite_done), //output
|
404 |
|
|
|
405 |
|
|
.req_dcachewrite_length (req_dcachewrite_length), //input [2:0]
|
406 |
|
|
.req_dcachewrite_cache_disable (req_dcachewrite_cache_disable), //input
|
407 |
|
|
.req_dcachewrite_address (req_dcachewrite_address), //input [31:0]
|
408 |
|
|
.req_dcachewrite_write_through (req_dcachewrite_write_through), //input
|
409 |
|
|
.req_dcachewrite_data (req_dcachewrite_data), //input [31:0]
|
410 |
|
|
|
411 |
|
|
// dcachewrite RESP
|
412 |
|
|
.resp_dcachewrite_do (resp_dcachewrite_do), //output
|
413 |
|
|
.resp_dcachewrite_done (resp_dcachewrite_done), //input
|
414 |
|
|
|
415 |
|
|
.resp_dcachewrite_length (resp_dcachewrite_length), //output [2:0]
|
416 |
|
|
.resp_dcachewrite_cache_disable (resp_dcachewrite_cache_disable), //output
|
417 |
|
|
.resp_dcachewrite_address (resp_dcachewrite_address), //output [31:0]
|
418 |
|
|
.resp_dcachewrite_write_through (resp_dcachewrite_write_through), //output
|
419 |
|
|
.resp_dcachewrite_data (resp_dcachewrite_data) //output [31:0]
|
420 |
|
|
);
|
421 |
|
|
|
422 |
|
|
//------------------------------------------------------------------------------
|
423 |
|
|
|
424 |
|
|
wire tlbread_do;
|
425 |
|
|
wire tlbread_done;
|
426 |
|
|
wire tlbread_page_fault;
|
427 |
|
|
wire tlbread_ac_fault;
|
428 |
|
|
wire tlbread_retry;
|
429 |
|
|
|
430 |
|
|
wire [1:0] tlbread_cpl;
|
431 |
|
|
wire [31:0] tlbread_address;
|
432 |
|
|
wire [3:0] tlbread_length;
|
433 |
|
|
wire [3:0] tlbread_length_full;
|
434 |
|
|
wire tlbread_lock;
|
435 |
|
|
wire tlbread_rmw;
|
436 |
|
|
wire [63:0] tlbread_data;
|
437 |
|
|
|
438 |
|
|
|
439 |
|
|
//------------------------------------------------------------------------------
|
440 |
|
|
|
441 |
|
|
wire tlbwrite_do;
|
442 |
|
|
wire tlbwrite_done;
|
443 |
|
|
wire tlbwrite_page_fault;
|
444 |
|
|
wire tlbwrite_ac_fault;
|
445 |
|
|
|
446 |
|
|
wire [1:0] tlbwrite_cpl;
|
447 |
|
|
wire [31:0] tlbwrite_address;
|
448 |
|
|
wire [2:0] tlbwrite_length;
|
449 |
|
|
wire [2:0] tlbwrite_length_full;
|
450 |
|
|
wire tlbwrite_lock;
|
451 |
|
|
wire tlbwrite_rmw;
|
452 |
|
|
wire [31:0] tlbwrite_data;
|
453 |
|
|
|
454 |
|
|
//------------------------------------------------------------------------------
|
455 |
|
|
|
456 |
|
|
wire dcachetoicache_write_do;
|
457 |
|
|
wire [31:0] dcachetoicache_write_address;
|
458 |
|
|
|
459 |
|
|
//------------------------------------------------------------------------------
|
460 |
|
|
|
461 |
|
|
wire dcachetoicache_accept_do;
|
462 |
|
|
wire [31:0] dcachetoicache_accept_address;
|
463 |
|
|
wire dcachetoicache_accept_empty;
|
464 |
|
|
|
465 |
|
|
//------------------------------------------------------------------------------
|
466 |
|
|
|
467 |
|
|
wire icacheread_do;
|
468 |
|
|
wire [31:0] icacheread_address;
|
469 |
|
|
wire [4:0] icacheread_length; // takes into account: page size and cs segment limit
|
470 |
|
|
wire icacheread_cache_disable;
|
471 |
|
|
|
472 |
|
|
//------------------------------------------------------------------------------
|
473 |
|
|
|
474 |
|
|
wire prefetchfifo_write_do;
|
475 |
|
|
wire [135:0] prefetchfifo_write_data;
|
476 |
|
|
|
477 |
|
|
//------------------------------------------------------------------------------
|
478 |
|
|
|
479 |
|
|
wire prefetched_do;
|
480 |
|
|
wire [4:0] prefetched_length;
|
481 |
|
|
|
482 |
|
|
//------------------------------------------------------------------------------
|
483 |
|
|
|
484 |
|
|
wire [31:0] prefetch_address;
|
485 |
|
|
wire [4:0] prefetch_length;
|
486 |
|
|
wire prefetch_su;
|
487 |
|
|
|
488 |
|
|
//------------------------------------------------------------------------------
|
489 |
|
|
|
490 |
|
|
wire prefetchfifo_signal_limit_do;
|
491 |
|
|
wire prefetchfifo_signal_pf_do;
|
492 |
|
|
wire [4:0] prefetchfifo_used;
|
493 |
|
|
|
494 |
|
|
//------------------------------------------------------------------------------
|
495 |
|
|
|
496 |
|
|
wire tlbcoderequest_do;
|
497 |
|
|
wire [31:0] tlbcoderequest_address;
|
498 |
|
|
wire tlbcoderequest_su;
|
499 |
|
|
|
500 |
|
|
//------------------------------------------------------------------------------
|
501 |
|
|
|
502 |
|
|
wire tlbcode_do;
|
503 |
|
|
wire [31:0] tlbcode_linear;
|
504 |
|
|
wire [31:0] tlbcode_physical;
|
505 |
|
|
wire tlbcode_cache_disable;
|
506 |
|
|
|
507 |
|
|
//------------------------------------------------------------------------------
|
508 |
|
|
|
509 |
|
|
//------------------------------------------------------------------------------
|
510 |
|
|
|
511 |
|
|
avalon_mem avalon_mem_inst(
|
512 |
|
|
// global
|
513 |
|
|
.clk (clk),
|
514 |
|
|
.rst_n (rst_n),
|
515 |
|
|
|
516 |
|
|
//RESP:
|
517 |
|
|
.writeburst_do (resp_writeburst_do), //input
|
518 |
|
|
.writeburst_done (resp_writeburst_done), //output
|
519 |
|
|
|
520 |
|
|
.writeburst_address (resp_writeburst_address), //input [31:0]
|
521 |
|
|
.writeburst_dword_length (resp_writeburst_dword_length), //input [1:0]
|
522 |
|
|
.writeburst_byteenable_0 (resp_writeburst_byteenable_0), //input [3:0]
|
523 |
|
|
.writeburst_byteenable_1 (resp_writeburst_byteenable_1), //input [3:0]
|
524 |
|
|
.writeburst_data (resp_writeburst_data), //input [55:0]
|
525 |
|
|
//END
|
526 |
|
|
|
527 |
|
|
//RESP:
|
528 |
|
|
.writeline_do (resp_writeline_do), //input
|
529 |
|
|
.writeline_done (resp_writeline_done), //output
|
530 |
|
|
|
531 |
|
|
.writeline_address (resp_writeline_address), //input [31:0]
|
532 |
|
|
.writeline_line (resp_writeline_line), //input [127:0]
|
533 |
|
|
//END
|
534 |
|
|
|
535 |
|
|
//RESP:
|
536 |
|
|
.readburst_do (resp_readburst_do), //input
|
537 |
|
|
.readburst_done (resp_readburst_done), //output
|
538 |
|
|
|
539 |
|
|
.readburst_address (resp_readburst_address), //input [31:0]
|
540 |
|
|
.readburst_dword_length (resp_readburst_dword_length), //input [1:0]
|
541 |
|
|
.readburst_byte_length (resp_readburst_byte_length), //input [3:0]
|
542 |
|
|
.readburst_data (resp_readburst_data), //output [95:0]
|
543 |
|
|
//END
|
544 |
|
|
|
545 |
|
|
//RESP:
|
546 |
|
|
.readline_do (resp_readline_do), //input
|
547 |
|
|
.readline_done (resp_readline_done), //output
|
548 |
|
|
|
549 |
|
|
.readline_address (resp_readline_address), //input [31:0]
|
550 |
|
|
.readline_line (resp_readline_line), //output [127:0]
|
551 |
|
|
//END
|
552 |
|
|
|
553 |
|
|
//RESP:
|
554 |
|
|
.readcode_do (resp_readcode_do), //input
|
555 |
|
|
.readcode_done (resp_readcode_done), //output
|
556 |
|
|
|
557 |
|
|
.readcode_address (resp_readcode_address), //input [31:0]
|
558 |
|
|
.readcode_line (resp_readcode_line), //output [127:0]
|
559 |
|
|
.readcode_partial (resp_readcode_partial), //output [31:0]
|
560 |
|
|
.readcode_partial_done (resp_readcode_partial_done), //output
|
561 |
|
|
//END
|
562 |
|
|
|
563 |
|
|
// avalon master
|
564 |
|
|
.avm_address (avm_address), //output [31:0]
|
565 |
|
|
.avm_writedata (avm_writedata), //output [31:0]
|
566 |
|
|
.avm_byteenable (avm_byteenable), //output [3:0]
|
567 |
|
|
.avm_burstcount (avm_burstcount), //output [2:0]
|
568 |
|
|
.avm_write (avm_write), //output
|
569 |
|
|
.avm_read (avm_read), //output
|
570 |
|
|
|
571 |
|
|
.avm_waitrequest (avm_waitrequest), //input
|
572 |
|
|
.avm_readdatavalid (avm_readdatavalid), //input
|
573 |
|
|
.avm_readdata (avm_readdata) //input [31:0]
|
574 |
|
|
);
|
575 |
|
|
|
576 |
|
|
//------------------------------------------------------------------------------
|
577 |
|
|
|
578 |
|
|
dcache dcache_inst(
|
579 |
|
|
// global
|
580 |
|
|
.clk (clk),
|
581 |
|
|
.rst_n (rst_internal_n),
|
582 |
|
|
|
583 |
|
|
//RESP:
|
584 |
|
|
.dcacheread_do (resp_dcacheread_do), //input
|
585 |
|
|
.dcacheread_done (resp_dcacheread_done), //output
|
586 |
|
|
|
587 |
|
|
.dcacheread_length (resp_dcacheread_length), //input [3:0]
|
588 |
|
|
.dcacheread_cache_disable (resp_dcacheread_cache_disable), //input
|
589 |
|
|
.dcacheread_address (resp_dcacheread_address), //input [31:0]
|
590 |
|
|
.dcacheread_data (resp_dcacheread_data), //output [63:0]
|
591 |
|
|
//END
|
592 |
|
|
|
593 |
|
|
//RESP:
|
594 |
|
|
.dcachewrite_do (resp_dcachewrite_do), //input
|
595 |
|
|
.dcachewrite_done (resp_dcachewrite_done), //output
|
596 |
|
|
|
597 |
|
|
.dcachewrite_length (resp_dcachewrite_length), //input [2:0]
|
598 |
|
|
.dcachewrite_cache_disable (resp_dcachewrite_cache_disable), //input
|
599 |
|
|
.dcachewrite_address (resp_dcachewrite_address), //input [31:0]
|
600 |
|
|
.dcachewrite_write_through (resp_dcachewrite_write_through), //input
|
601 |
|
|
.dcachewrite_data (resp_dcachewrite_data), //input [31:0]
|
602 |
|
|
//END
|
603 |
|
|
|
604 |
|
|
//REQ:
|
605 |
|
|
.readline_do (req_readline_do), //output
|
606 |
|
|
.readline_done (req_readline_done), //input
|
607 |
|
|
|
608 |
|
|
.readline_address (req_readline_address), //output [31:0]
|
609 |
|
|
.readline_line (req_readline_line), //input [127:0]
|
610 |
|
|
//END
|
611 |
|
|
|
612 |
|
|
//REQ:
|
613 |
|
|
.readburst_do (req_readburst_do), //output
|
614 |
|
|
.readburst_done (req_readburst_done), //input
|
615 |
|
|
|
616 |
|
|
.readburst_address (req_readburst_address), //output [31:0]
|
617 |
|
|
.readburst_dword_length (req_readburst_dword_length), //output [1:0]
|
618 |
|
|
.readburst_byte_length (req_readburst_byte_length), //output [3:0]
|
619 |
|
|
.readburst_data (req_readburst_data), //input [95:0]
|
620 |
|
|
//END
|
621 |
|
|
|
622 |
|
|
//REQ:
|
623 |
|
|
.writeline_do (req_writeline_do), //output
|
624 |
|
|
.writeline_done (req_writeline_done), //input
|
625 |
|
|
|
626 |
|
|
.writeline_address (req_writeline_address), //output [31:0]
|
627 |
|
|
.writeline_line (req_writeline_line), //output [127:0]
|
628 |
|
|
//END
|
629 |
|
|
|
630 |
|
|
//REQ:
|
631 |
|
|
.writeburst_do (req_writeburst_do), //output
|
632 |
|
|
.writeburst_done (req_writeburst_done), //input
|
633 |
|
|
|
634 |
|
|
.writeburst_address (req_writeburst_address), //output [31:0]
|
635 |
|
|
.writeburst_dword_length (req_writeburst_dword_length), //output [1:0]
|
636 |
|
|
.writeburst_byteenable_0 (req_writeburst_byteenable_0), //output [3:0]
|
637 |
|
|
.writeburst_byteenable_1 (req_writeburst_byteenable_1), //output [3:0]
|
638 |
|
|
.writeburst_data (req_writeburst_data), //output [55:0]
|
639 |
|
|
//END
|
640 |
|
|
|
641 |
|
|
.dcachetoicache_write_do (dcachetoicache_write_do), //output
|
642 |
|
|
.dcachetoicache_write_address (dcachetoicache_write_address), //output [31:0]
|
643 |
|
|
|
644 |
|
|
|
645 |
|
|
//RESP:
|
646 |
|
|
.invddata_do (invddata_do), //input
|
647 |
|
|
.invddata_done (invddata_done), //output
|
648 |
|
|
//END
|
649 |
|
|
|
650 |
|
|
//RESP:
|
651 |
|
|
.wbinvddata_do (wbinvddata_do), //input
|
652 |
|
|
.wbinvddata_done (wbinvddata_done), //output
|
653 |
|
|
//END
|
654 |
|
|
|
655 |
|
|
.dcache_busy (dcache_busy) //output
|
656 |
|
|
);
|
657 |
|
|
|
658 |
|
|
//------------------------------------------------------------------------------
|
659 |
|
|
|
660 |
|
|
dcache_to_icache_fifo dcache_to_icache_fifo_inst(
|
661 |
|
|
.clk (clk),
|
662 |
|
|
.rst_n (rst_internal_n),
|
663 |
|
|
|
664 |
|
|
//RESP:
|
665 |
|
|
.dcachetoicache_write_do (dcachetoicache_write_do), //input
|
666 |
|
|
.dcachetoicache_write_address (dcachetoicache_write_address), //input [31:0]
|
667 |
|
|
//END
|
668 |
|
|
|
669 |
|
|
|
670 |
|
|
//RESP:
|
671 |
|
|
.dcachetoicache_accept_do (dcachetoicache_accept_do), //input
|
672 |
|
|
.dcachetoicache_accept_address (dcachetoicache_accept_address), //output [31:0]
|
673 |
|
|
.dcachetoicache_accept_empty (dcachetoicache_accept_empty) //output
|
674 |
|
|
//END
|
675 |
|
|
);
|
676 |
|
|
|
677 |
|
|
//------------------------------------------------------------------------------
|
678 |
|
|
|
679 |
|
|
icache icache_inst(
|
680 |
|
|
.clk (clk),
|
681 |
|
|
.rst_n (rst_internal_n),
|
682 |
|
|
|
683 |
|
|
//RESP:
|
684 |
|
|
.pr_reset (pr_reset), //input
|
685 |
|
|
//END
|
686 |
|
|
|
687 |
|
|
//RESP:
|
688 |
|
|
.icacheread_do (icacheread_do), //input
|
689 |
|
|
.icacheread_address (icacheread_address), //input [31:0]
|
690 |
|
|
.icacheread_length (icacheread_length), //input [4:0] // takes into account: page size and cs segment limit
|
691 |
|
|
.icacheread_cache_disable (icacheread_cache_disable), //input
|
692 |
|
|
|
693 |
|
|
//REQ:
|
694 |
|
|
.readcode_do (req_readcode_do), //output
|
695 |
|
|
.readcode_done (req_readcode_done), //input
|
696 |
|
|
|
697 |
|
|
.readcode_address (req_readcode_address), //output [31:0]
|
698 |
|
|
.readcode_line (req_readcode_line), //input [127:0]
|
699 |
|
|
.readcode_partial (req_readcode_partial), //input [31:0]
|
700 |
|
|
.readcode_partial_done (req_readcode_partial_done), //input
|
701 |
|
|
//END
|
702 |
|
|
|
703 |
|
|
//REQ:
|
704 |
|
|
.dcachetoicache_accept_do (dcachetoicache_accept_do), //output
|
705 |
|
|
.dcachetoicache_accept_address (dcachetoicache_accept_address), //input [31:0]
|
706 |
|
|
.dcachetoicache_accept_empty (dcachetoicache_accept_empty), //input
|
707 |
|
|
//END
|
708 |
|
|
|
709 |
|
|
//REQ:
|
710 |
|
|
.prefetchfifo_write_do (prefetchfifo_write_do), //output
|
711 |
|
|
.prefetchfifo_write_data (prefetchfifo_write_data), //output [135:0]
|
712 |
|
|
//END
|
713 |
|
|
|
714 |
|
|
//REQ:
|
715 |
|
|
.prefetched_do (prefetched_do), //output
|
716 |
|
|
.prefetched_length (prefetched_length), //output [4:0]
|
717 |
|
|
//END
|
718 |
|
|
|
719 |
|
|
//RESP:
|
720 |
|
|
.invdcode_do (invdcode_do), //input
|
721 |
|
|
.invdcode_done (invdcode_done) //output
|
722 |
|
|
//END
|
723 |
|
|
);
|
724 |
|
|
|
725 |
|
|
//------------------------------------------------------------------------------
|
726 |
|
|
|
727 |
|
|
memory_read memory_read_inst(
|
728 |
|
|
// global
|
729 |
|
|
.clk (clk),
|
730 |
|
|
.rst_n (rst_internal_n),
|
731 |
|
|
|
732 |
|
|
// read step
|
733 |
|
|
.rd_reset (rd_reset), //input
|
734 |
|
|
|
735 |
|
|
//RESP:
|
736 |
|
|
.read_do (read_do), //input
|
737 |
|
|
.read_done (read_done), //output
|
738 |
|
|
.read_page_fault (read_page_fault), //output
|
739 |
|
|
.read_ac_fault (read_ac_fault), //output
|
740 |
|
|
|
741 |
|
|
.read_cpl (read_cpl), //input [1:0]
|
742 |
|
|
.read_address (read_address), //input [31:0]
|
743 |
|
|
.read_length (read_length), //input [3:0]
|
744 |
|
|
.read_lock (read_lock), //input
|
745 |
|
|
.read_rmw (read_rmw), //input
|
746 |
|
|
.read_data (read_data), //output [63:0]
|
747 |
|
|
//END
|
748 |
|
|
|
749 |
|
|
//REQ:
|
750 |
|
|
.tlbread_do (tlbread_do), //output
|
751 |
|
|
.tlbread_done (tlbread_done), //input
|
752 |
|
|
.tlbread_page_fault (tlbread_page_fault), //input
|
753 |
|
|
.tlbread_ac_fault (tlbread_ac_fault), //input
|
754 |
|
|
.tlbread_retry (tlbread_retry), //input
|
755 |
|
|
|
756 |
|
|
.tlbread_cpl (tlbread_cpl), //output [1:0]
|
757 |
|
|
.tlbread_address (tlbread_address), //output [31:0]
|
758 |
|
|
.tlbread_length (tlbread_length), //output [3:0]
|
759 |
|
|
.tlbread_length_full (tlbread_length_full), //output [3:0]
|
760 |
|
|
.tlbread_lock (tlbread_lock), //output
|
761 |
|
|
.tlbread_rmw (tlbread_rmw), //output
|
762 |
|
|
.tlbread_data (tlbread_data) //input [63:0]
|
763 |
|
|
//END
|
764 |
|
|
|
765 |
|
|
);
|
766 |
|
|
|
767 |
|
|
//------------------------------------------------------------------------------
|
768 |
|
|
|
769 |
|
|
memory_write memory_write_inst(
|
770 |
|
|
.clk (clk),
|
771 |
|
|
.rst_n (rst_internal_n),
|
772 |
|
|
|
773 |
|
|
// write step
|
774 |
|
|
.wr_reset (wr_reset), //input
|
775 |
|
|
|
776 |
|
|
//RESP:
|
777 |
|
|
.write_do (write_do), //input
|
778 |
|
|
.write_done (write_done), //output
|
779 |
|
|
.write_page_fault (write_page_fault), //output
|
780 |
|
|
.write_ac_fault (write_ac_fault), //output
|
781 |
|
|
|
782 |
|
|
.write_cpl (write_cpl), //input [1:0]
|
783 |
|
|
.write_address (write_address), //input [31:0]
|
784 |
|
|
.write_length (write_length), //input [2:0]
|
785 |
|
|
.write_lock (write_lock), //input
|
786 |
|
|
.write_rmw (write_rmw), //input
|
787 |
|
|
.write_data (write_data), //input [31:0]
|
788 |
|
|
//END
|
789 |
|
|
|
790 |
|
|
//REQ:
|
791 |
|
|
.tlbwrite_do (tlbwrite_do), //output
|
792 |
|
|
.tlbwrite_done (tlbwrite_done), //input
|
793 |
|
|
.tlbwrite_page_fault (tlbwrite_page_fault), //input
|
794 |
|
|
.tlbwrite_ac_fault (tlbwrite_ac_fault), //input
|
795 |
|
|
|
796 |
|
|
.tlbwrite_cpl (tlbwrite_cpl), //output [1:0]
|
797 |
|
|
.tlbwrite_address (tlbwrite_address), //output [31:0]
|
798 |
|
|
.tlbwrite_length (tlbwrite_length), //output [2:0]
|
799 |
|
|
.tlbwrite_length_full (tlbwrite_length_full), //output [2:0]
|
800 |
|
|
.tlbwrite_lock (tlbwrite_lock), //output
|
801 |
|
|
.tlbwrite_rmw (tlbwrite_rmw), //output
|
802 |
|
|
.tlbwrite_data (tlbwrite_data) //output [31:0]
|
803 |
|
|
//END
|
804 |
|
|
|
805 |
|
|
);
|
806 |
|
|
|
807 |
|
|
//------------------------------------------------------------------------------
|
808 |
|
|
|
809 |
|
|
prefetch prefetch_inst(
|
810 |
|
|
.clk (clk),
|
811 |
|
|
.rst_n (rst_internal_n),
|
812 |
|
|
|
813 |
|
|
.pr_reset (pr_reset), //input
|
814 |
|
|
|
815 |
|
|
// prefetch exported
|
816 |
|
|
.prefetch_cpl (prefetch_cpl), //input [1:0]
|
817 |
|
|
.prefetch_eip (prefetch_eip), //input [31:0]
|
818 |
|
|
.cs_cache (cs_cache), //input [63:0]
|
819 |
|
|
|
820 |
|
|
//to prefetch_control
|
821 |
|
|
.prefetch_address (prefetch_address), //output [31:0]
|
822 |
|
|
.prefetch_length (prefetch_length), //output [4:0]
|
823 |
|
|
.prefetch_su (prefetch_su), //output
|
824 |
|
|
|
825 |
|
|
//RESP:
|
826 |
|
|
.prefetched_do (prefetched_do), //input
|
827 |
|
|
.prefetched_length (prefetched_length), //input [4:0]
|
828 |
|
|
//END
|
829 |
|
|
|
830 |
|
|
//REQ:
|
831 |
|
|
.prefetchfifo_signal_limit_do (prefetchfifo_signal_limit_do) //output
|
832 |
|
|
//END
|
833 |
|
|
);
|
834 |
|
|
|
835 |
|
|
//------------------------------------------------------------------------------
|
836 |
|
|
|
837 |
|
|
prefetch_fifo prefetch_fifo_inst(
|
838 |
|
|
.clk (clk),
|
839 |
|
|
.rst_n (rst_internal_n),
|
840 |
|
|
|
841 |
|
|
.pr_reset (pr_reset), //input
|
842 |
|
|
|
843 |
|
|
//RESP:
|
844 |
|
|
.prefetchfifo_signal_limit_do (prefetchfifo_signal_limit_do), //input
|
845 |
|
|
//END
|
846 |
|
|
|
847 |
|
|
//RESP:
|
848 |
|
|
.prefetchfifo_signal_pf_do (prefetchfifo_signal_pf_do), //input
|
849 |
|
|
//END
|
850 |
|
|
|
851 |
|
|
//RESP:
|
852 |
|
|
.prefetchfifo_write_do (prefetchfifo_write_do), //input
|
853 |
|
|
.prefetchfifo_write_data (prefetchfifo_write_data), //input [135:0]
|
854 |
|
|
//END
|
855 |
|
|
|
856 |
|
|
.prefetchfifo_used (prefetchfifo_used), //output [4:0]
|
857 |
|
|
|
858 |
|
|
//RESP:
|
859 |
|
|
.prefetchfifo_accept_do (prefetchfifo_accept_do), //input
|
860 |
|
|
.prefetchfifo_accept_data (prefetchfifo_accept_data), //output [67:0]
|
861 |
|
|
.prefetchfifo_accept_empty (prefetchfifo_accept_empty) //output
|
862 |
|
|
//END
|
863 |
|
|
);
|
864 |
|
|
|
865 |
|
|
//------------------------------------------------------------------------------
|
866 |
|
|
|
867 |
|
|
|
868 |
|
|
prefetch_control prefetch_control_inst(
|
869 |
|
|
.clk (clk),
|
870 |
|
|
.rst_n (rst_internal_n),
|
871 |
|
|
|
872 |
|
|
.pr_reset (pr_reset), //input //same as reset to icache
|
873 |
|
|
|
874 |
|
|
//REQ:
|
875 |
|
|
.tlbcoderequest_do (tlbcoderequest_do), //output
|
876 |
|
|
.tlbcoderequest_address (tlbcoderequest_address), //output [31:0]
|
877 |
|
|
.tlbcoderequest_su (tlbcoderequest_su), //output
|
878 |
|
|
//END
|
879 |
|
|
|
880 |
|
|
//RESP:
|
881 |
|
|
.tlbcode_do (tlbcode_do), //input
|
882 |
|
|
.tlbcode_linear (tlbcode_linear), //input [31:0]
|
883 |
|
|
.tlbcode_physical (tlbcode_physical), //input [31:0]
|
884 |
|
|
.tlbcode_cache_disable (tlbcode_cache_disable), //input
|
885 |
|
|
//END
|
886 |
|
|
|
887 |
|
|
//from prefetch
|
888 |
|
|
.prefetch_address (prefetch_address), //input [31:0]
|
889 |
|
|
.prefetch_length (prefetch_length), //input [4:0]
|
890 |
|
|
.prefetch_su (prefetch_su), //input
|
891 |
|
|
|
892 |
|
|
//from prefetchfifo
|
893 |
|
|
.prefetchfifo_used (prefetchfifo_used), //input [4:0]
|
894 |
|
|
|
895 |
|
|
//REQ
|
896 |
|
|
.icacheread_do (icacheread_do), //output
|
897 |
|
|
.icacheread_address (icacheread_address), //output [31:0]
|
898 |
|
|
.icacheread_length (icacheread_length), //output [4:0] // takes into account: page size and cs segment limit
|
899 |
|
|
.icacheread_cache_disable (icacheread_cache_disable) //output
|
900 |
|
|
//END
|
901 |
|
|
);
|
902 |
|
|
|
903 |
|
|
|
904 |
|
|
|
905 |
|
|
//------------------------------------------------------------------------------
|
906 |
|
|
|
907 |
|
|
tlb tlb_inst(
|
908 |
|
|
.clk (clk),
|
909 |
|
|
.rst_n (rst_internal_n),
|
910 |
|
|
|
911 |
|
|
.pr_reset (pr_reset), //input
|
912 |
|
|
.rd_reset (rd_reset), //input
|
913 |
|
|
.exe_reset (exe_reset), //input
|
914 |
|
|
.wr_reset (wr_reset), //input
|
915 |
|
|
|
916 |
|
|
// tlb exported
|
917 |
|
|
.cr0_pg (cr0_pg), //input
|
918 |
|
|
.cr0_wp (cr0_wp), //input
|
919 |
|
|
.cr0_am (cr0_am), //input
|
920 |
|
|
.cr0_cd (cr0_cd), //input
|
921 |
|
|
.cr0_nw (cr0_nw), //input
|
922 |
|
|
|
923 |
|
|
.acflag (acflag), //input
|
924 |
|
|
|
925 |
|
|
.cr3 (cr3), //input [31:0]
|
926 |
|
|
|
927 |
|
|
.pipeline_after_read_empty (pipeline_after_read_empty), //input
|
928 |
|
|
.pipeline_after_prefetch_empty (pipeline_after_prefetch_empty), //input
|
929 |
|
|
|
930 |
|
|
.tlb_code_pf_cr2 (tlb_code_pf_cr2), //output [31:0]
|
931 |
|
|
.tlb_code_pf_error_code (tlb_code_pf_error_code), //output [15:0]
|
932 |
|
|
|
933 |
|
|
.tlb_check_pf_cr2 (tlb_check_pf_cr2), //output [31:0]
|
934 |
|
|
.tlb_check_pf_error_code (tlb_check_pf_error_code), //output [15:0]
|
935 |
|
|
|
936 |
|
|
.tlb_write_pf_cr2 (tlb_write_pf_cr2), //output [31:0]
|
937 |
|
|
.tlb_write_pf_error_code (tlb_write_pf_error_code), //output [15:0]
|
938 |
|
|
|
939 |
|
|
.tlb_read_pf_cr2 (tlb_read_pf_cr2), //output [31:0]
|
940 |
|
|
.tlb_read_pf_error_code (tlb_read_pf_error_code), //output [15:0]
|
941 |
|
|
|
942 |
|
|
//RESP:
|
943 |
|
|
.tlbflushsingle_do (tlbflushsingle_do), //input
|
944 |
|
|
.tlbflushsingle_done (tlbflushsingle_done), //output
|
945 |
|
|
|
946 |
|
|
.tlbflushsingle_address (tlbflushsingle_address), //input
|
947 |
|
|
//END
|
948 |
|
|
|
949 |
|
|
//RESP:
|
950 |
|
|
.tlbflushall_do (tlbflushall_do), //input
|
951 |
|
|
//END
|
952 |
|
|
|
953 |
|
|
//RESP:
|
954 |
|
|
.tlbread_do (tlbread_do), //input
|
955 |
|
|
.tlbread_done (tlbread_done), //output
|
956 |
|
|
.tlbread_page_fault (tlbread_page_fault), //output
|
957 |
|
|
.tlbread_ac_fault (tlbread_ac_fault), //output
|
958 |
|
|
.tlbread_retry (tlbread_retry), //output
|
959 |
|
|
|
960 |
|
|
.tlbread_cpl (tlbread_cpl), //input [1:0]
|
961 |
|
|
.tlbread_address (tlbread_address), //input [31:0]
|
962 |
|
|
.tlbread_length (tlbread_length), //input [3:0]
|
963 |
|
|
.tlbread_length_full (tlbread_length_full), //input [3:0]
|
964 |
|
|
.tlbread_lock (tlbread_lock), //input
|
965 |
|
|
.tlbread_rmw (tlbread_rmw), //input
|
966 |
|
|
.tlbread_data (tlbread_data), //output [63:0]
|
967 |
|
|
//END
|
968 |
|
|
|
969 |
|
|
//RESP:
|
970 |
|
|
.tlbwrite_do (tlbwrite_do), //input
|
971 |
|
|
.tlbwrite_done (tlbwrite_done), //output
|
972 |
|
|
.tlbwrite_page_fault (tlbwrite_page_fault), //output
|
973 |
|
|
.tlbwrite_ac_fault (tlbwrite_ac_fault), //output
|
974 |
|
|
|
975 |
|
|
.tlbwrite_cpl (tlbwrite_cpl), //input [1:0]
|
976 |
|
|
.tlbwrite_address (tlbwrite_address), //input [31:0]
|
977 |
|
|
.tlbwrite_length (tlbwrite_length), //input [2:0]
|
978 |
|
|
.tlbwrite_length_full (tlbwrite_length_full), //input [2:0]
|
979 |
|
|
.tlbwrite_lock (tlbwrite_lock), //input
|
980 |
|
|
.tlbwrite_rmw (tlbwrite_rmw), //input
|
981 |
|
|
.tlbwrite_data (tlbwrite_data), //input [31:0]
|
982 |
|
|
//END
|
983 |
|
|
|
984 |
|
|
//RESP:
|
985 |
|
|
.tlbcheck_do (tlbcheck_do), //input
|
986 |
|
|
.tlbcheck_done (tlbcheck_done), //output
|
987 |
|
|
.tlbcheck_page_fault (tlbcheck_page_fault), //output
|
988 |
|
|
|
989 |
|
|
.tlbcheck_address (tlbcheck_address), //input [31:0]
|
990 |
|
|
.tlbcheck_rw (tlbcheck_rw), //input
|
991 |
|
|
//END
|
992 |
|
|
|
993 |
|
|
//REQ:
|
994 |
|
|
.dcacheread_do (req_dcacheread_do),
|
995 |
|
|
.dcacheread_done (req_dcacheread_done),
|
996 |
|
|
|
997 |
|
|
.dcacheread_length (req_dcacheread_length),
|
998 |
|
|
.dcacheread_cache_disable (req_dcacheread_cache_disable),
|
999 |
|
|
.dcacheread_address (req_dcacheread_address),
|
1000 |
|
|
.dcacheread_data (req_dcacheread_data),
|
1001 |
|
|
//END
|
1002 |
|
|
|
1003 |
|
|
//REQ:
|
1004 |
|
|
.dcachewrite_do (req_dcachewrite_do), //output
|
1005 |
|
|
.dcachewrite_done (req_dcachewrite_done), //input
|
1006 |
|
|
|
1007 |
|
|
.dcachewrite_length (req_dcachewrite_length), //output [2:0]
|
1008 |
|
|
.dcachewrite_cache_disable (req_dcachewrite_cache_disable), //output
|
1009 |
|
|
.dcachewrite_address (req_dcachewrite_address), //output [31:0]
|
1010 |
|
|
.dcachewrite_write_through (req_dcachewrite_write_through), //output
|
1011 |
|
|
.dcachewrite_data (req_dcachewrite_data), //output [31:0]
|
1012 |
|
|
//END
|
1013 |
|
|
|
1014 |
|
|
//RESP:
|
1015 |
|
|
.tlbcoderequest_do (tlbcoderequest_do), //input
|
1016 |
|
|
.tlbcoderequest_address (tlbcoderequest_address), //input [31:0]
|
1017 |
|
|
.tlbcoderequest_su (tlbcoderequest_su), //input
|
1018 |
|
|
//END
|
1019 |
|
|
|
1020 |
|
|
//REQ:
|
1021 |
|
|
.tlbcode_do (tlbcode_do), //output
|
1022 |
|
|
.tlbcode_linear (tlbcode_linear), //output [31:0]
|
1023 |
|
|
.tlbcode_physical (tlbcode_physical), //output [31:0]
|
1024 |
|
|
.tlbcode_cache_disable (tlbcode_cache_disable), //output
|
1025 |
|
|
//END
|
1026 |
|
|
|
1027 |
|
|
//REQ:
|
1028 |
|
|
.prefetchfifo_signal_pf_do (prefetchfifo_signal_pf_do) //output
|
1029 |
|
|
//END
|
1030 |
|
|
);
|
1031 |
|
|
|
1032 |
|
|
|
1033 |
|
|
|
1034 |
|
|
endmodule
|