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alfik |
# TCL File Generated by Component Editor 13.1
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# Fri Jan 17 23:09:02 CET 2014
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# DO NOT MODIFY
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#
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# hdd "hdd" v1.0
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# 2014.01.17.23:09:02
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#
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#
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#
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# request TCL package from ACDS 13.1
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#
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package require -exact qsys 13.1
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#
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# module hdd
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#
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set_module_property DESCRIPTION ""
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set_module_property NAME hdd
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set_module_property VERSION 1.0
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set_module_property INTERNAL false
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set_module_property OPAQUE_ADDRESS_MAP true
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set_module_property GROUP ao486
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set_module_property AUTHOR ""
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set_module_property DISPLAY_NAME hdd
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set_module_property INSTANTIATE_IN_SYSTEM_MODULE true
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set_module_property EDITABLE true
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set_module_property ANALYZE_HDL AUTO
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set_module_property REPORT_TO_TALKBACK false
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set_module_property ALLOW_GREYBOX_GENERATION false
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#
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# file sets
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#
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add_fileset QUARTUS_SYNTH QUARTUS_SYNTH "" ""
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set_fileset_property QUARTUS_SYNTH TOP_LEVEL hdd
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set_fileset_property QUARTUS_SYNTH ENABLE_RELATIVE_INCLUDE_PATHS false
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add_fileset_file hdd.v VERILOG PATH hdd.v TOP_LEVEL_FILE
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#
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# parameters
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#
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#
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# display items
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#
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#
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# connection point clock
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#
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add_interface clock clock end
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set_interface_property clock clockRate 0
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set_interface_property clock ENABLED true
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set_interface_property clock EXPORT_OF ""
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set_interface_property clock PORT_NAME_MAP ""
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set_interface_property clock CMSIS_SVD_VARIABLES ""
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set_interface_property clock SVD_ADDRESS_GROUP ""
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add_interface_port clock clk clk Input 1
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#
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# connection point io
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#
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add_interface io avalon end
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set_interface_property io addressUnits WORDS
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set_interface_property io associatedClock clock
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set_interface_property io associatedReset reset_sink
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set_interface_property io bitsPerSymbol 8
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set_interface_property io burstOnBurstBoundariesOnly false
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set_interface_property io burstcountUnits WORDS
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set_interface_property io explicitAddressSpan 0
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set_interface_property io holdTime 0
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set_interface_property io linewrapBursts false
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set_interface_property io maximumPendingReadTransactions 0
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set_interface_property io readLatency 0
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set_interface_property io readWaitTime 1
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set_interface_property io setupTime 0
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set_interface_property io timingUnits Cycles
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set_interface_property io writeWaitTime 0
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set_interface_property io ENABLED true
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set_interface_property io EXPORT_OF ""
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set_interface_property io PORT_NAME_MAP ""
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set_interface_property io CMSIS_SVD_VARIABLES ""
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set_interface_property io SVD_ADDRESS_GROUP ""
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add_interface_port io io_address address Input 1
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add_interface_port io io_byteenable byteenable Input 4
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add_interface_port io io_read read Input 1
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add_interface_port io io_readdata readdata Output 32
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add_interface_port io io_write write Input 1
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add_interface_port io io_writedata writedata Input 32
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set_interface_assignment io embeddedsw.configuration.isFlash 0
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set_interface_assignment io embeddedsw.configuration.isMemoryDevice 0
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set_interface_assignment io embeddedsw.configuration.isNonVolatileStorage 0
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set_interface_assignment io embeddedsw.configuration.isPrintableDevice 0
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#
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# connection point sd_slave
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#
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add_interface sd_slave avalon end
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set_interface_property sd_slave addressUnits WORDS
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set_interface_property sd_slave associatedClock clock
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set_interface_property sd_slave associatedReset reset_sink
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set_interface_property sd_slave bitsPerSymbol 8
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set_interface_property sd_slave burstOnBurstBoundariesOnly false
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set_interface_property sd_slave burstcountUnits WORDS
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set_interface_property sd_slave explicitAddressSpan 0
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set_interface_property sd_slave holdTime 0
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set_interface_property sd_slave linewrapBursts false
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set_interface_property sd_slave maximumPendingReadTransactions 0
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set_interface_property sd_slave readLatency 0
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set_interface_property sd_slave readWaitTime 1
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set_interface_property sd_slave setupTime 0
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set_interface_property sd_slave timingUnits Cycles
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set_interface_property sd_slave writeWaitTime 0
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set_interface_property sd_slave ENABLED true
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set_interface_property sd_slave EXPORT_OF ""
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set_interface_property sd_slave PORT_NAME_MAP ""
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set_interface_property sd_slave CMSIS_SVD_VARIABLES ""
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set_interface_property sd_slave SVD_ADDRESS_GROUP ""
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add_interface_port sd_slave sd_slave_address address Input 9
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add_interface_port sd_slave sd_slave_read read Input 1
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add_interface_port sd_slave sd_slave_readdata readdata Output 32
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add_interface_port sd_slave sd_slave_write write Input 1
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add_interface_port sd_slave sd_slave_writedata writedata Input 32
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set_interface_assignment sd_slave embeddedsw.configuration.isFlash 0
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set_interface_assignment sd_slave embeddedsw.configuration.isMemoryDevice 0
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set_interface_assignment sd_slave embeddedsw.configuration.isNonVolatileStorage 0
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set_interface_assignment sd_slave embeddedsw.configuration.isPrintableDevice 0
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#
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# connection point mgmt
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#
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add_interface mgmt avalon end
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set_interface_property mgmt addressUnits WORDS
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set_interface_property mgmt associatedClock clock
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set_interface_property mgmt associatedReset reset_sink
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set_interface_property mgmt bitsPerSymbol 8
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set_interface_property mgmt burstOnBurstBoundariesOnly false
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set_interface_property mgmt burstcountUnits WORDS
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set_interface_property mgmt explicitAddressSpan 0
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set_interface_property mgmt holdTime 0
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set_interface_property mgmt linewrapBursts false
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set_interface_property mgmt maximumPendingReadTransactions 0
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set_interface_property mgmt readLatency 0
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set_interface_property mgmt readWaitTime 1
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set_interface_property mgmt setupTime 0
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set_interface_property mgmt timingUnits Cycles
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set_interface_property mgmt writeWaitTime 0
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set_interface_property mgmt ENABLED true
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set_interface_property mgmt EXPORT_OF ""
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set_interface_property mgmt PORT_NAME_MAP ""
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set_interface_property mgmt CMSIS_SVD_VARIABLES ""
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set_interface_property mgmt SVD_ADDRESS_GROUP ""
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add_interface_port mgmt mgmt_address address Input 3
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add_interface_port mgmt mgmt_write write Input 1
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add_interface_port mgmt mgmt_writedata writedata Input 32
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set_interface_assignment mgmt embeddedsw.configuration.isFlash 0
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set_interface_assignment mgmt embeddedsw.configuration.isMemoryDevice 0
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set_interface_assignment mgmt embeddedsw.configuration.isNonVolatileStorage 0
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set_interface_assignment mgmt embeddedsw.configuration.isPrintableDevice 0
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#
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# connection point reset_sink
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#
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add_interface reset_sink reset end
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set_interface_property reset_sink associatedClock clock
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set_interface_property reset_sink synchronousEdges DEASSERT
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set_interface_property reset_sink ENABLED true
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set_interface_property reset_sink EXPORT_OF ""
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set_interface_property reset_sink PORT_NAME_MAP ""
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set_interface_property reset_sink CMSIS_SVD_VARIABLES ""
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set_interface_property reset_sink SVD_ADDRESS_GROUP ""
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add_interface_port reset_sink rst_n reset_n Input 1
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#
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# connection point interrupt_sender
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#
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add_interface interrupt_sender interrupt end
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set_interface_property interrupt_sender associatedAddressablePoint io
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set_interface_property interrupt_sender associatedClock clock
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set_interface_property interrupt_sender associatedReset reset_sink
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set_interface_property interrupt_sender ENABLED true
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set_interface_property interrupt_sender EXPORT_OF ""
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set_interface_property interrupt_sender PORT_NAME_MAP ""
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set_interface_property interrupt_sender CMSIS_SVD_VARIABLES ""
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set_interface_property interrupt_sender SVD_ADDRESS_GROUP ""
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add_interface_port interrupt_sender irq irq Output 1
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#
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# connection point avalon_master
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#
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add_interface avalon_master avalon start
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set_interface_property avalon_master addressUnits SYMBOLS
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set_interface_property avalon_master associatedClock clock
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set_interface_property avalon_master associatedReset reset_sink
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set_interface_property avalon_master bitsPerSymbol 8
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set_interface_property avalon_master burstOnBurstBoundariesOnly false
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set_interface_property avalon_master burstcountUnits WORDS
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set_interface_property avalon_master doStreamReads false
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set_interface_property avalon_master doStreamWrites false
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set_interface_property avalon_master holdTime 0
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set_interface_property avalon_master linewrapBursts false
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set_interface_property avalon_master maximumPendingReadTransactions 0
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set_interface_property avalon_master readLatency 0
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set_interface_property avalon_master readWaitTime 1
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set_interface_property avalon_master setupTime 0
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set_interface_property avalon_master timingUnits Cycles
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set_interface_property avalon_master writeWaitTime 0
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set_interface_property avalon_master ENABLED true
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set_interface_property avalon_master EXPORT_OF ""
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set_interface_property avalon_master PORT_NAME_MAP ""
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set_interface_property avalon_master CMSIS_SVD_VARIABLES ""
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set_interface_property avalon_master SVD_ADDRESS_GROUP ""
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add_interface_port avalon_master sd_master_address address Output 32
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add_interface_port avalon_master sd_master_waitrequest waitrequest Input 1
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add_interface_port avalon_master sd_master_read read Output 1
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add_interface_port avalon_master sd_master_readdatavalid readdatavalid Input 1
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add_interface_port avalon_master sd_master_readdata readdata Input 32
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add_interface_port avalon_master sd_master_write write Output 1
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add_interface_port avalon_master sd_master_writedata writedata Output 32
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#
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# connection point conduit_ide_3f6
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#
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add_interface conduit_ide_3f6 conduit end
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set_interface_property conduit_ide_3f6 associatedClock clock
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set_interface_property conduit_ide_3f6 associatedReset reset_sink
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set_interface_property conduit_ide_3f6 ENABLED true
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set_interface_property conduit_ide_3f6 EXPORT_OF ""
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set_interface_property conduit_ide_3f6 PORT_NAME_MAP ""
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set_interface_property conduit_ide_3f6 CMSIS_SVD_VARIABLES ""
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set_interface_property conduit_ide_3f6 SVD_ADDRESS_GROUP ""
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add_interface_port conduit_ide_3f6 ide_3f6_read export Input 1
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add_interface_port conduit_ide_3f6 ide_3f6_readdata export Output 8
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add_interface_port conduit_ide_3f6 ide_3f6_write export Input 1
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add_interface_port conduit_ide_3f6 ide_3f6_writedata export Input 8
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