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[/] [ao486/] [trunk/] [rtl/] [soc/] [pit/] [pit_hw.tcl] - Blame information for rev 2

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Line No. Rev Author Line
1 2 alfik
# TCL File Generated by Component Editor 13.1
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# Fri Jan 17 20:06:36 CET 2014
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# DO NOT MODIFY
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# 
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# pit "pit" v1.0
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#  2014.01.17.20:06:36
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# 
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# 
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# 
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# request TCL package from ACDS 13.1
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# 
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package require -exact qsys 13.1
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# 
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# module pit
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# 
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set_module_property DESCRIPTION ""
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set_module_property NAME pit
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set_module_property VERSION 1.0
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set_module_property INTERNAL false
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set_module_property OPAQUE_ADDRESS_MAP true
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set_module_property GROUP ao486
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set_module_property AUTHOR ""
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set_module_property DISPLAY_NAME pit
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set_module_property INSTANTIATE_IN_SYSTEM_MODULE true
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set_module_property EDITABLE true
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set_module_property ANALYZE_HDL AUTO
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set_module_property REPORT_TO_TALKBACK false
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set_module_property ALLOW_GREYBOX_GENERATION false
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# 
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# file sets
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# 
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add_fileset QUARTUS_SYNTH QUARTUS_SYNTH "" ""
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set_fileset_property QUARTUS_SYNTH TOP_LEVEL pit
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set_fileset_property QUARTUS_SYNTH ENABLE_RELATIVE_INCLUDE_PATHS false
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add_fileset_file pit.v VERILOG PATH pit.v TOP_LEVEL_FILE
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add_fileset_file pit_counter.v VERILOG PATH pit_counter.v
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# 
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# parameters
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# 
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# 
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# display items
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# 
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# 
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# connection point clock
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# 
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add_interface clock clock end
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set_interface_property clock clockRate 0
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set_interface_property clock ENABLED true
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set_interface_property clock EXPORT_OF ""
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set_interface_property clock PORT_NAME_MAP ""
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set_interface_property clock CMSIS_SVD_VARIABLES ""
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set_interface_property clock SVD_ADDRESS_GROUP ""
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add_interface_port clock clk clk Input 1
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# 
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# connection point io
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# 
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add_interface io avalon end
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set_interface_property io addressUnits WORDS
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set_interface_property io associatedClock clock
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set_interface_property io associatedReset reset_sink
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set_interface_property io bitsPerSymbol 8
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set_interface_property io burstOnBurstBoundariesOnly false
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set_interface_property io burstcountUnits WORDS
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set_interface_property io explicitAddressSpan 0
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set_interface_property io holdTime 0
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set_interface_property io linewrapBursts false
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set_interface_property io maximumPendingReadTransactions 0
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set_interface_property io readLatency 0
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set_interface_property io readWaitTime 1
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set_interface_property io setupTime 0
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set_interface_property io timingUnits Cycles
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set_interface_property io writeWaitTime 0
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set_interface_property io ENABLED true
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set_interface_property io EXPORT_OF ""
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set_interface_property io PORT_NAME_MAP ""
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set_interface_property io CMSIS_SVD_VARIABLES ""
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set_interface_property io SVD_ADDRESS_GROUP ""
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add_interface_port io io_address address Input 2
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add_interface_port io io_read read Input 1
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add_interface_port io io_readdata readdata Output 8
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add_interface_port io io_write write Input 1
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add_interface_port io io_writedata writedata Input 8
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set_interface_assignment io embeddedsw.configuration.isFlash 0
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set_interface_assignment io embeddedsw.configuration.isMemoryDevice 0
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set_interface_assignment io embeddedsw.configuration.isNonVolatileStorage 0
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set_interface_assignment io embeddedsw.configuration.isPrintableDevice 0
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# 
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# connection point mgmt
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# 
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add_interface mgmt avalon end
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set_interface_property mgmt addressUnits WORDS
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set_interface_property mgmt associatedClock clock
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set_interface_property mgmt associatedReset reset_sink
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set_interface_property mgmt bitsPerSymbol 8
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set_interface_property mgmt burstOnBurstBoundariesOnly false
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set_interface_property mgmt burstcountUnits WORDS
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set_interface_property mgmt explicitAddressSpan 0
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set_interface_property mgmt holdTime 0
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set_interface_property mgmt linewrapBursts false
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set_interface_property mgmt maximumPendingReadTransactions 0
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set_interface_property mgmt readLatency 0
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set_interface_property mgmt readWaitTime 1
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set_interface_property mgmt setupTime 0
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set_interface_property mgmt timingUnits Cycles
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set_interface_property mgmt writeWaitTime 0
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set_interface_property mgmt ENABLED true
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set_interface_property mgmt EXPORT_OF ""
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set_interface_property mgmt PORT_NAME_MAP ""
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set_interface_property mgmt CMSIS_SVD_VARIABLES ""
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set_interface_property mgmt SVD_ADDRESS_GROUP ""
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add_interface_port mgmt mgmt_address address Input 1
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add_interface_port mgmt mgmt_write write Input 1
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add_interface_port mgmt mgmt_writedata writedata Input 32
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set_interface_assignment mgmt embeddedsw.configuration.isFlash 0
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set_interface_assignment mgmt embeddedsw.configuration.isMemoryDevice 0
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set_interface_assignment mgmt embeddedsw.configuration.isNonVolatileStorage 0
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set_interface_assignment mgmt embeddedsw.configuration.isPrintableDevice 0
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# 
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# connection point reset_sink
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# 
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add_interface reset_sink reset end
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set_interface_property reset_sink associatedClock clock
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set_interface_property reset_sink synchronousEdges DEASSERT
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set_interface_property reset_sink ENABLED true
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set_interface_property reset_sink EXPORT_OF ""
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set_interface_property reset_sink PORT_NAME_MAP ""
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set_interface_property reset_sink CMSIS_SVD_VARIABLES ""
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set_interface_property reset_sink SVD_ADDRESS_GROUP ""
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add_interface_port reset_sink rst_n reset_n Input 1
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# 
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# connection point conduit_speaker_61h
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# 
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add_interface conduit_speaker_61h conduit end
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set_interface_property conduit_speaker_61h associatedClock clock
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set_interface_property conduit_speaker_61h associatedReset reset_sink
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set_interface_property conduit_speaker_61h ENABLED true
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set_interface_property conduit_speaker_61h EXPORT_OF ""
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set_interface_property conduit_speaker_61h PORT_NAME_MAP ""
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set_interface_property conduit_speaker_61h CMSIS_SVD_VARIABLES ""
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set_interface_property conduit_speaker_61h SVD_ADDRESS_GROUP ""
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add_interface_port conduit_speaker_61h speaker_61h_read export Input 1
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add_interface_port conduit_speaker_61h speaker_61h_readdata export Output 8
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add_interface_port conduit_speaker_61h speaker_61h_write export Input 1
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add_interface_port conduit_speaker_61h speaker_61h_writedata export Input 8
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# 
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# connection point conduit_speaker
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# 
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add_interface conduit_speaker conduit end
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set_interface_property conduit_speaker associatedClock clock
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set_interface_property conduit_speaker associatedReset reset_sink
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set_interface_property conduit_speaker ENABLED true
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set_interface_property conduit_speaker EXPORT_OF ""
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set_interface_property conduit_speaker PORT_NAME_MAP ""
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set_interface_property conduit_speaker CMSIS_SVD_VARIABLES ""
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set_interface_property conduit_speaker SVD_ADDRESS_GROUP ""
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add_interface_port conduit_speaker speaker_enable export Output 1
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add_interface_port conduit_speaker speaker_out export Output 1
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# 
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# connection point interrupt_pit
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# 
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add_interface interrupt_pit interrupt end
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set_interface_property interrupt_pit associatedAddressablePoint io
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set_interface_property interrupt_pit associatedClock clock
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set_interface_property interrupt_pit associatedReset reset_sink
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set_interface_property interrupt_pit ENABLED true
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set_interface_property interrupt_pit EXPORT_OF ""
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set_interface_property interrupt_pit PORT_NAME_MAP ""
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set_interface_property interrupt_pit CMSIS_SVD_VARIABLES ""
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set_interface_property interrupt_pit SVD_ADDRESS_GROUP ""
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add_interface_port interrupt_pit irq irq Output 1
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