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alfik |
`timescale 1ps/1ps
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`include "defines.v"
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module tb_ao486();
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reg clk;
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reg rst_n;
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//interrupt
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reg [7:0] interrupt_vector;
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reg interrupt_do;
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wire interrupt_ack;
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//data
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wire [31:0] avm_address;
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wire [31:0] avm_writedata;
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wire [3:0] avm_byteenable;
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wire [2:0] avm_burstcount;
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wire avm_write;
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wire avm_read;
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reg avm_waitrequest;
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reg avm_readdatavalid;
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reg [31:0] avm_readdata;
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//io
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wire [15:0] avalon_io_address;
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wire [31:0] avalon_io_writedata;
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wire [3:0] avalon_io_byteenable;
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wire avalon_io_read;
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wire avalon_io_write;
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reg avalon_io_waitrequest;
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reg avalon_io_readdatavalid;
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reg [31:0] avalon_io_readdata;
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//debug
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wire [17:0] SW = { 10'd0, 8'h00 };
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ao486 ao486_inst(
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.clk (clk),
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.rst_n (rst_n),
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.rst_internal_n (rst_n), //input
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//-------------------------------------------------------------------------- interrupt
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.interrupt_vector (interrupt_vector), //input [7:0]
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.interrupt_do (interrupt_do), //input
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.interrupt_done (interrupt_done), //output
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//-------------------------------------------------------------------------- Altera Avalon memory bus
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.avm_address (avm_address), //output [31:0]
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.avm_writedata (avm_writedata), //output [31:0]
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.avm_byteenable (avm_byteenable), //output [3:0]
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.avm_burstcount (avm_burstcount), //output [2:0]
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.avm_write (avm_write), //output
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.avm_read (avm_read), //output
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.avm_waitrequest (avm_waitrequest), //input
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.avm_readdatavalid (avm_readdatavalid), //input
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.avm_readdata (avm_readdata), //input [31:0]
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//-------------------------------------------------------------------------- Altera Avalon io bus
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.avalon_io_address (avalon_io_address), //output [15:0]
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.avalon_io_writedata (avalon_io_writedata), //output [31:0]
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.avalon_io_byteenable (avalon_io_byteenable), //output [3:0]
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.avalon_io_read (avalon_io_read), //output
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.avalon_io_write (avalon_io_write), //output
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.avalon_io_waitrequest (avalon_io_waitrequest), //input
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.avalon_io_readdatavalid (avalon_io_readdatavalid), //input
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.avalon_io_readdata (avalon_io_readdata), //input [31:0]
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//debug
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.SW (SW) //input[17:0]
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);
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integer fscanf_ret;
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reg [255:0] name;
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reg [63:0] value;
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integer do_loop;
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integer test_type;
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task initialize;
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begin
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$fwrite(STDOUT, "start_input: %x\n", $time);
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$fwrite(STDOUT, "\n");
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$fflush(STDOUT);
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do_loop = 1;
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while(do_loop == 1) begin
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fscanf_ret = $fscanf(STDIN, "%s", name);
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fscanf_ret = $fscanf(STDIN, "%x", value);
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case(name)
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"quit:": begin $dumpoff(); $finish_and_return(0); end
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"continue:": begin
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do_loop = 0;
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#1
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ao486_inst.memory_inst.prefetch_inst.limit = ao486_inst.memory_inst.prefetch_inst.cs_limit - ao486_inst.pipeline_inst.decode_inst.eip + 32'd1;
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ao486_inst.memory_inst.prefetch_inst.linear = ao486_inst.memory_inst.prefetch_inst.cs_base + ao486_inst.pipeline_inst.decode_inst.eip;
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ao486_inst.exception_inst.exc_eip = ao486_inst.pipeline_inst.decode_inst.eip;
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end
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"rst_n:": rst_n = value[0];
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"test_type:": test_type = value;
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"eax:": ao486_inst.pipeline_inst.write_inst.write_register_inst.eax = value[31:0];
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"ebx:": ao486_inst.pipeline_inst.write_inst.write_register_inst.ebx = value[31:0];
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"ecx:": ao486_inst.pipeline_inst.write_inst.write_register_inst.ecx = value[31:0];
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"edx:": ao486_inst.pipeline_inst.write_inst.write_register_inst.edx = value[31:0];
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"esi:": ao486_inst.pipeline_inst.write_inst.write_register_inst.esi = value[31:0];
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"edi:": ao486_inst.pipeline_inst.write_inst.write_register_inst.edi = value[31:0];
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"ebp:": ao486_inst.pipeline_inst.write_inst.write_register_inst.ebp = value[31:0];
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"esp:": ao486_inst.pipeline_inst.write_inst.write_register_inst.esp = value[31:0];
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"eip:": ao486_inst.pipeline_inst.decode_inst.eip = value[31:0];
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"cflag:": ao486_inst.pipeline_inst.write_inst.write_register_inst.cflag = value[0];
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"pflag:": ao486_inst.pipeline_inst.write_inst.write_register_inst.pflag = value[0];
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"aflag:": ao486_inst.pipeline_inst.write_inst.write_register_inst.aflag = value[0];
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"zflag:": ao486_inst.pipeline_inst.write_inst.write_register_inst.zflag = value[0];
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"sflag:": ao486_inst.pipeline_inst.write_inst.write_register_inst.sflag = value[0];
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"tflag:": ao486_inst.pipeline_inst.write_inst.write_register_inst.tflag = value[0];
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"iflag:": ao486_inst.pipeline_inst.write_inst.write_register_inst.iflag = value[0];
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"dflag:": ao486_inst.pipeline_inst.write_inst.write_register_inst.dflag = value[0];
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"oflag:": ao486_inst.pipeline_inst.write_inst.write_register_inst.oflag = value[0];
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"iopl:": ao486_inst.pipeline_inst.write_inst.write_register_inst.iopl = value[1:0];
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"ntflag:": ao486_inst.pipeline_inst.write_inst.write_register_inst.ntflag = value[0];
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"rflag:": ao486_inst.pipeline_inst.write_inst.write_register_inst.rflag = value[0];
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"vmflag:": ao486_inst.pipeline_inst.write_inst.write_register_inst.vmflag = value[0];
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"acflag:": ao486_inst.pipeline_inst.write_inst.write_register_inst.acflag = value[0];
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"idflag:": ao486_inst.pipeline_inst.write_inst.write_register_inst.idflag = value[0];
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"cs_cache_valid:": ao486_inst.pipeline_inst.write_inst.write_register_inst.cs_cache_valid = value[0];
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"cs:": { ao486_inst.pipeline_inst.write_inst.write_register_inst.cs,
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ao486_inst.pipeline_inst.write_inst.write_register_inst.cs_rpl } = { value[15:0], value[1:0] };
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"cs_rpl:": ao486_inst.pipeline_inst.write_inst.write_register_inst.cs_rpl = value[1:0];
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"cs_base:": { ao486_inst.pipeline_inst.write_inst.write_register_inst.cs_cache[63:56],
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ao486_inst.pipeline_inst.write_inst.write_register_inst.cs_cache[39:32],
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ao486_inst.pipeline_inst.write_inst.write_register_inst.cs_cache[31:16] } = value[31:0];
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"cs_limit:": { ao486_inst.pipeline_inst.write_inst.write_register_inst.cs_cache[51:48],
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ao486_inst.pipeline_inst.write_inst.write_register_inst.cs_cache[15:0] } = value[19:0];
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"cs_g:": ao486_inst.pipeline_inst.write_inst.write_register_inst.cs_cache[55] = value[0];
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"cs_d_b:": ao486_inst.pipeline_inst.write_inst.write_register_inst.cs_cache[54] = value[0];
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| 153 |
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"cs_avl:": ao486_inst.pipeline_inst.write_inst.write_register_inst.cs_cache[52] = value[0];
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| 154 |
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"cs_p:": ao486_inst.pipeline_inst.write_inst.write_register_inst.cs_cache[47] = value[0];
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| 155 |
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"cs_dpl:": ao486_inst.pipeline_inst.write_inst.write_register_inst.cs_cache[46:45] = value[1:0];
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| 156 |
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"cs_s:": ao486_inst.pipeline_inst.write_inst.write_register_inst.cs_cache[44] = value[0];
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| 157 |
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"cs_type:": ao486_inst.pipeline_inst.write_inst.write_register_inst.cs_cache[43:40] = value[3:0];
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| 158 |
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| 159 |
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"ds_cache_valid:": ao486_inst.pipeline_inst.write_inst.write_register_inst.ds_cache_valid = value[0];
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| 160 |
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"ds:": { ao486_inst.pipeline_inst.write_inst.write_register_inst.ds,
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ao486_inst.pipeline_inst.write_inst.write_register_inst.ds_rpl } = { value[15:0], value[1:0] };
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| 162 |
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"ds_rpl:": ao486_inst.pipeline_inst.write_inst.write_register_inst.ds_rpl = value[1:0];
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"ds_base:": { ao486_inst.pipeline_inst.write_inst.write_register_inst.ds_cache[63:56],
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| 164 |
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ao486_inst.pipeline_inst.write_inst.write_register_inst.ds_cache[39:32],
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ao486_inst.pipeline_inst.write_inst.write_register_inst.ds_cache[31:16] } = value[31:0];
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"ds_limit:": { ao486_inst.pipeline_inst.write_inst.write_register_inst.ds_cache[51:48],
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ao486_inst.pipeline_inst.write_inst.write_register_inst.ds_cache[15:0] } = value[19:0];
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"ds_g:": ao486_inst.pipeline_inst.write_inst.write_register_inst.ds_cache[55] = value[0];
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| 169 |
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"ds_d_b:": ao486_inst.pipeline_inst.write_inst.write_register_inst.ds_cache[54] = value[0];
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| 170 |
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"ds_avl:": ao486_inst.pipeline_inst.write_inst.write_register_inst.ds_cache[52] = value[0];
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| 171 |
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"ds_p:": ao486_inst.pipeline_inst.write_inst.write_register_inst.ds_cache[47] = value[0];
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| 172 |
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"ds_dpl:": ao486_inst.pipeline_inst.write_inst.write_register_inst.ds_cache[46:45] = value[1:0];
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| 173 |
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"ds_s:": ao486_inst.pipeline_inst.write_inst.write_register_inst.ds_cache[44] = value[0];
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| 174 |
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"ds_type:": ao486_inst.pipeline_inst.write_inst.write_register_inst.ds_cache[43:40] = value[3:0];
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| 175 |
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| 176 |
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"es_cache_valid:": ao486_inst.pipeline_inst.write_inst.write_register_inst.es_cache_valid = value[0];
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| 177 |
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"es:": { ao486_inst.pipeline_inst.write_inst.write_register_inst.es,
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| 178 |
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ao486_inst.pipeline_inst.write_inst.write_register_inst.es_rpl } = { value[15:0], value[1:0] };
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| 179 |
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"es_rpl:": ao486_inst.pipeline_inst.write_inst.write_register_inst.es_rpl = value[1:0];
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| 180 |
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"es_base:": { ao486_inst.pipeline_inst.write_inst.write_register_inst.es_cache[63:56],
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| 181 |
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ao486_inst.pipeline_inst.write_inst.write_register_inst.es_cache[39:32],
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| 182 |
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ao486_inst.pipeline_inst.write_inst.write_register_inst.es_cache[31:16] } = value[31:0];
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| 183 |
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"es_limit:": { ao486_inst.pipeline_inst.write_inst.write_register_inst.es_cache[51:48],
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| 184 |
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ao486_inst.pipeline_inst.write_inst.write_register_inst.es_cache[15:0] } = value[19:0];
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| 185 |
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"es_g:": ao486_inst.pipeline_inst.write_inst.write_register_inst.es_cache[55] = value[0];
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| 186 |
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"es_d_b:": ao486_inst.pipeline_inst.write_inst.write_register_inst.es_cache[54] = value[0];
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| 187 |
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"es_avl:": ao486_inst.pipeline_inst.write_inst.write_register_inst.es_cache[52] = value[0];
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| 188 |
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"es_p:": ao486_inst.pipeline_inst.write_inst.write_register_inst.es_cache[47] = value[0];
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| 189 |
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"es_dpl:": ao486_inst.pipeline_inst.write_inst.write_register_inst.es_cache[46:45] = value[1:0];
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| 190 |
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"es_s:": ao486_inst.pipeline_inst.write_inst.write_register_inst.es_cache[44] = value[0];
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| 191 |
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"es_type:": ao486_inst.pipeline_inst.write_inst.write_register_inst.es_cache[43:40] = value[3:0];
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| 192 |
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| 193 |
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"fs_cache_valid:": ao486_inst.pipeline_inst.write_inst.write_register_inst.fs_cache_valid = value[0];
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| 194 |
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"fs:": { ao486_inst.pipeline_inst.write_inst.write_register_inst.fs,
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| 195 |
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ao486_inst.pipeline_inst.write_inst.write_register_inst.fs_rpl } = { value[15:0], value[1:0] };
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| 196 |
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"fs_rpl:": ao486_inst.pipeline_inst.write_inst.write_register_inst.fs_rpl = value[1:0];
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| 197 |
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"fs_base:": { ao486_inst.pipeline_inst.write_inst.write_register_inst.fs_cache[63:56],
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| 198 |
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ao486_inst.pipeline_inst.write_inst.write_register_inst.fs_cache[39:32],
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| 199 |
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ao486_inst.pipeline_inst.write_inst.write_register_inst.fs_cache[31:16] } = value[31:0];
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| 200 |
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"fs_limit:": { ao486_inst.pipeline_inst.write_inst.write_register_inst.fs_cache[51:48],
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| 201 |
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ao486_inst.pipeline_inst.write_inst.write_register_inst.fs_cache[15:0] } = value[19:0];
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| 202 |
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"fs_g:": ao486_inst.pipeline_inst.write_inst.write_register_inst.fs_cache[55] = value[0];
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| 203 |
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"fs_d_b:": ao486_inst.pipeline_inst.write_inst.write_register_inst.fs_cache[54] = value[0];
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| 204 |
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"fs_avl:": ao486_inst.pipeline_inst.write_inst.write_register_inst.fs_cache[52] = value[0];
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| 205 |
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"fs_p:": ao486_inst.pipeline_inst.write_inst.write_register_inst.fs_cache[47] = value[0];
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| 206 |
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"fs_dpl:": ao486_inst.pipeline_inst.write_inst.write_register_inst.fs_cache[46:45] = value[1:0];
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| 207 |
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"fs_s:": ao486_inst.pipeline_inst.write_inst.write_register_inst.fs_cache[44] = value[0];
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| 208 |
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"fs_type:": ao486_inst.pipeline_inst.write_inst.write_register_inst.fs_cache[43:40] = value[3:0];
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| 209 |
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| 210 |
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"gs_cache_valid:": ao486_inst.pipeline_inst.write_inst.write_register_inst.gs_cache_valid = value[0];
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| 211 |
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"gs:": { ao486_inst.pipeline_inst.write_inst.write_register_inst.gs,
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| 212 |
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ao486_inst.pipeline_inst.write_inst.write_register_inst.gs_rpl } = { value[15:0], value[1:0] };
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| 213 |
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"gs_rpl:": ao486_inst.pipeline_inst.write_inst.write_register_inst.gs_rpl = value[1:0];
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| 214 |
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"gs_base:": { ao486_inst.pipeline_inst.write_inst.write_register_inst.gs_cache[63:56],
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| 215 |
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ao486_inst.pipeline_inst.write_inst.write_register_inst.gs_cache[39:32],
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| 216 |
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ao486_inst.pipeline_inst.write_inst.write_register_inst.gs_cache[31:16] } = value[31:0];
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| 217 |
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"gs_limit:": { ao486_inst.pipeline_inst.write_inst.write_register_inst.gs_cache[51:48],
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| 218 |
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ao486_inst.pipeline_inst.write_inst.write_register_inst.gs_cache[15:0] } = value[19:0];
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| 219 |
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"gs_g:": ao486_inst.pipeline_inst.write_inst.write_register_inst.gs_cache[55] = value[0];
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| 220 |
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"gs_d_b:": ao486_inst.pipeline_inst.write_inst.write_register_inst.gs_cache[54] = value[0];
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| 221 |
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"gs_avl:": ao486_inst.pipeline_inst.write_inst.write_register_inst.gs_cache[52] = value[0];
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| 222 |
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"gs_p:": ao486_inst.pipeline_inst.write_inst.write_register_inst.gs_cache[47] = value[0];
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| 223 |
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"gs_dpl:": ao486_inst.pipeline_inst.write_inst.write_register_inst.gs_cache[46:45] = value[1:0];
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| 224 |
|
|
"gs_s:": ao486_inst.pipeline_inst.write_inst.write_register_inst.gs_cache[44] = value[0];
|
| 225 |
|
|
"gs_type:": ao486_inst.pipeline_inst.write_inst.write_register_inst.gs_cache[43:40] = value[3:0];
|
| 226 |
|
|
|
| 227 |
|
|
"ss_cache_valid:": ao486_inst.pipeline_inst.write_inst.write_register_inst.ss_cache_valid = value[0];
|
| 228 |
|
|
"ss:": { ao486_inst.pipeline_inst.write_inst.write_register_inst.ss,
|
| 229 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.ss_rpl } = { value[15:0], value[1:0] };
|
| 230 |
|
|
"ss_rpl:": ao486_inst.pipeline_inst.write_inst.write_register_inst.ss_rpl = value[1:0];
|
| 231 |
|
|
"ss_base:": { ao486_inst.pipeline_inst.write_inst.write_register_inst.ss_cache[63:56],
|
| 232 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.ss_cache[39:32],
|
| 233 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.ss_cache[31:16] } = value[31:0];
|
| 234 |
|
|
"ss_limit:": { ao486_inst.pipeline_inst.write_inst.write_register_inst.ss_cache[51:48],
|
| 235 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.ss_cache[15:0] } = value[19:0];
|
| 236 |
|
|
"ss_g:": ao486_inst.pipeline_inst.write_inst.write_register_inst.ss_cache[55] = value[0];
|
| 237 |
|
|
"ss_d_b:": ao486_inst.pipeline_inst.write_inst.write_register_inst.ss_cache[54] = value[0];
|
| 238 |
|
|
"ss_avl:": ao486_inst.pipeline_inst.write_inst.write_register_inst.ss_cache[52] = value[0];
|
| 239 |
|
|
"ss_p:": ao486_inst.pipeline_inst.write_inst.write_register_inst.ss_cache[47] = value[0];
|
| 240 |
|
|
"ss_dpl:": ao486_inst.pipeline_inst.write_inst.write_register_inst.ss_cache[46:45] = value[1:0];
|
| 241 |
|
|
"ss_s:": ao486_inst.pipeline_inst.write_inst.write_register_inst.ss_cache[44] = value[0];
|
| 242 |
|
|
"ss_type:": ao486_inst.pipeline_inst.write_inst.write_register_inst.ss_cache[43:40] = value[3:0];
|
| 243 |
|
|
|
| 244 |
|
|
"ldtr_cache_valid:": ao486_inst.pipeline_inst.write_inst.write_register_inst.ldtr_cache_valid = value[0];
|
| 245 |
|
|
"ldtr:": { ao486_inst.pipeline_inst.write_inst.write_register_inst.ldtr,
|
| 246 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.ldtr_rpl } = { value[15:0], value[1:0] };
|
| 247 |
|
|
"ldtr_rpl:": ao486_inst.pipeline_inst.write_inst.write_register_inst.ldtr_rpl = value[1:0];
|
| 248 |
|
|
"ldtr_base:": { ao486_inst.pipeline_inst.write_inst.write_register_inst.ldtr_cache[63:56],
|
| 249 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.ldtr_cache[39:32],
|
| 250 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.ldtr_cache[31:16] } = value[31:0];
|
| 251 |
|
|
"ldtr_limit:": { ao486_inst.pipeline_inst.write_inst.write_register_inst.ldtr_cache[51:48],
|
| 252 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.ldtr_cache[15:0] } = value[19:0];
|
| 253 |
|
|
"ldtr_g:": ao486_inst.pipeline_inst.write_inst.write_register_inst.ldtr_cache[55] = value[0];
|
| 254 |
|
|
"ldtr_d_b:": ao486_inst.pipeline_inst.write_inst.write_register_inst.ldtr_cache[54] = value[0];
|
| 255 |
|
|
"ldtr_avl:": ao486_inst.pipeline_inst.write_inst.write_register_inst.ldtr_cache[52] = value[0];
|
| 256 |
|
|
"ldtr_p:": ao486_inst.pipeline_inst.write_inst.write_register_inst.ldtr_cache[47] = value[0];
|
| 257 |
|
|
"ldtr_dpl:": ao486_inst.pipeline_inst.write_inst.write_register_inst.ldtr_cache[46:45] = value[1:0];
|
| 258 |
|
|
"ldtr_s:": ao486_inst.pipeline_inst.write_inst.write_register_inst.ldtr_cache[44] = value[0];
|
| 259 |
|
|
"ldtr_type:": ao486_inst.pipeline_inst.write_inst.write_register_inst.ldtr_cache[43:40] = value[3:0];
|
| 260 |
|
|
|
| 261 |
|
|
"tr_cache_valid:": ao486_inst.pipeline_inst.write_inst.write_register_inst.tr_cache_valid = value[0];
|
| 262 |
|
|
"tr:": { ao486_inst.pipeline_inst.write_inst.write_register_inst.tr,
|
| 263 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.tr_rpl } = { value[15:0], value[1:0] };
|
| 264 |
|
|
"tr_rpl:": ao486_inst.pipeline_inst.write_inst.write_register_inst.tr_rpl = value[1:0];
|
| 265 |
|
|
"tr_base:": { ao486_inst.pipeline_inst.write_inst.write_register_inst.tr_cache[63:56],
|
| 266 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.tr_cache[39:32],
|
| 267 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.tr_cache[31:16] } = value[31:0];
|
| 268 |
|
|
"tr_limit:": { ao486_inst.pipeline_inst.write_inst.write_register_inst.tr_cache[51:48],
|
| 269 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.tr_cache[15:0] } = value[19:0];
|
| 270 |
|
|
"tr_g:": ao486_inst.pipeline_inst.write_inst.write_register_inst.tr_cache[55] = value[0];
|
| 271 |
|
|
"tr_d_b:": ao486_inst.pipeline_inst.write_inst.write_register_inst.tr_cache[54] = value[0];
|
| 272 |
|
|
"tr_avl:": ao486_inst.pipeline_inst.write_inst.write_register_inst.tr_cache[52] = value[0];
|
| 273 |
|
|
"tr_p:": ao486_inst.pipeline_inst.write_inst.write_register_inst.tr_cache[47] = value[0];
|
| 274 |
|
|
"tr_dpl:": ao486_inst.pipeline_inst.write_inst.write_register_inst.tr_cache[46:45] = value[1:0];
|
| 275 |
|
|
"tr_s:": ao486_inst.pipeline_inst.write_inst.write_register_inst.tr_cache[44] = value[0];
|
| 276 |
|
|
"tr_type:": ao486_inst.pipeline_inst.write_inst.write_register_inst.tr_cache[43:40] = value[3:0];
|
| 277 |
|
|
|
| 278 |
|
|
"gdtr_base:": ao486_inst.pipeline_inst.write_inst.write_register_inst.gdtr_base = value[31:0];
|
| 279 |
|
|
"gdtr_limit:": ao486_inst.pipeline_inst.write_inst.write_register_inst.gdtr_limit = value[15:0];
|
| 280 |
|
|
|
| 281 |
|
|
"idtr_base:": ao486_inst.pipeline_inst.write_inst.write_register_inst.idtr_base = value[31:0];
|
| 282 |
|
|
"idtr_limit:": ao486_inst.pipeline_inst.write_inst.write_register_inst.idtr_limit = value[15:0];
|
| 283 |
|
|
|
| 284 |
|
|
"cr0_pe:": ao486_inst.pipeline_inst.write_inst.write_register_inst.cr0_pe = value[0];
|
| 285 |
|
|
"cr0_mp:": ao486_inst.pipeline_inst.write_inst.write_register_inst.cr0_mp = value[0];
|
| 286 |
|
|
"cr0_em:": ao486_inst.pipeline_inst.write_inst.write_register_inst.cr0_em = value[0];
|
| 287 |
|
|
"cr0_ts:": ao486_inst.pipeline_inst.write_inst.write_register_inst.cr0_ts = value[0];
|
| 288 |
|
|
"cr0_ne:": ao486_inst.pipeline_inst.write_inst.write_register_inst.cr0_ne = value[0];
|
| 289 |
|
|
"cr0_wp:": ao486_inst.pipeline_inst.write_inst.write_register_inst.cr0_wp = value[0];
|
| 290 |
|
|
"cr0_am:": ao486_inst.pipeline_inst.write_inst.write_register_inst.cr0_am = value[0];
|
| 291 |
|
|
"cr0_nw:": ao486_inst.pipeline_inst.write_inst.write_register_inst.cr0_nw = value[0];
|
| 292 |
|
|
"cr0_cd:": ao486_inst.pipeline_inst.write_inst.write_register_inst.cr0_cd = value[0];
|
| 293 |
|
|
"cr0_pg:": ao486_inst.pipeline_inst.write_inst.write_register_inst.cr0_pg = value[0];
|
| 294 |
|
|
|
| 295 |
|
|
"cr2:": ao486_inst.pipeline_inst.write_inst.write_register_inst.cr2 = value[31:0];
|
| 296 |
|
|
"cr3:": ao486_inst.pipeline_inst.write_inst.write_register_inst.cr3 = value[31:0];
|
| 297 |
|
|
|
| 298 |
|
|
"dr0:": ao486_inst.pipeline_inst.write_inst.write_register_inst.dr0 = value[31:0];
|
| 299 |
|
|
"dr1:": ao486_inst.pipeline_inst.write_inst.write_register_inst.dr1 = value[31:0];
|
| 300 |
|
|
"dr2:": ao486_inst.pipeline_inst.write_inst.write_register_inst.dr2 = value[31:0];
|
| 301 |
|
|
"dr3:": ao486_inst.pipeline_inst.write_inst.write_register_inst.dr3 = value[31:0];
|
| 302 |
|
|
|
| 303 |
|
|
"dr6:": { ao486_inst.pipeline_inst.write_inst.write_register_inst.dr6_bt,
|
| 304 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.dr6_bs,
|
| 305 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.dr6_bd,
|
| 306 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.dr6_b12,
|
| 307 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.dr6_breakpoints } = { value[15:12], value[3:0] };
|
| 308 |
|
|
|
| 309 |
|
|
"dr7:": { ao486_inst.pipeline_inst.write_inst.write_register_inst.dr7[31:11],
|
| 310 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.dr7[9:0] } = { value[31:11], value[9:0] };
|
| 311 |
|
|
|
| 312 |
|
|
default: begin $display("Unknown name: %s", name); $finish_and_return(-1); end
|
| 313 |
|
|
endcase
|
| 314 |
|
|
end
|
| 315 |
|
|
end
|
| 316 |
|
|
endtask
|
| 317 |
|
|
|
| 318 |
|
|
task output_cpu_state;
|
| 319 |
|
|
begin
|
| 320 |
|
|
|
| 321 |
|
|
$fwrite(STDOUT, "start_output: %x\n", $time);
|
| 322 |
|
|
|
| 323 |
|
|
$fwrite(STDOUT, "tb_wr_cmd_last: %02x\n", tb_wr_cmd_last);
|
| 324 |
|
|
$fwrite(STDOUT, "tb_can_ignore: %x\n", finished);
|
| 325 |
|
|
|
| 326 |
|
|
$fwrite(STDOUT, "eax: %08x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.eax);
|
| 327 |
|
|
$fwrite(STDOUT, "ebx: %08x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.ebx);
|
| 328 |
|
|
$fwrite(STDOUT, "ecx: %08x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.ecx);
|
| 329 |
|
|
$fwrite(STDOUT, "edx: %08x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.edx);
|
| 330 |
|
|
$fwrite(STDOUT, "esi: %08x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.esi);
|
| 331 |
|
|
$fwrite(STDOUT, "edi: %08x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.edi);
|
| 332 |
|
|
$fwrite(STDOUT, "ebp: %08x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.ebp);
|
| 333 |
|
|
$fwrite(STDOUT, "esp: %08x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.esp);
|
| 334 |
|
|
|
| 335 |
|
|
if(tb_wr_ready_last) $fwrite(STDOUT, "eip: %08x\n", tb_wr_eip);
|
| 336 |
|
|
else $fwrite(STDOUT, "eip: %08x\n", ao486_inst.exception_inst.exc_eip);
|
| 337 |
|
|
|
| 338 |
|
|
$fwrite(STDOUT, "cflag: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.cflag);
|
| 339 |
|
|
$fwrite(STDOUT, "pflag: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.pflag);
|
| 340 |
|
|
$fwrite(STDOUT, "aflag: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.aflag);
|
| 341 |
|
|
$fwrite(STDOUT, "zflag: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.zflag);
|
| 342 |
|
|
$fwrite(STDOUT, "sflag: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.sflag);
|
| 343 |
|
|
$fwrite(STDOUT, "tflag: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.tflag);
|
| 344 |
|
|
$fwrite(STDOUT, "iflag: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.iflag);
|
| 345 |
|
|
$fwrite(STDOUT, "dflag: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.dflag);
|
| 346 |
|
|
$fwrite(STDOUT, "oflag: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.oflag);
|
| 347 |
|
|
$fwrite(STDOUT, "iopl: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.iopl);
|
| 348 |
|
|
$fwrite(STDOUT, "ntflag: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.ntflag);
|
| 349 |
|
|
|
| 350 |
|
|
if(tb_wr_ready_last) $fwrite(STDOUT, "rflag: %01x\n", tb_rflag_last);
|
| 351 |
|
|
else $fwrite(STDOUT, "rflag: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.rflag);
|
| 352 |
|
|
|
| 353 |
|
|
$fwrite(STDOUT, "vmflag: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.vmflag);
|
| 354 |
|
|
$fwrite(STDOUT, "acflag: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.acflag);
|
| 355 |
|
|
$fwrite(STDOUT, "idflag: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.idflag);
|
| 356 |
|
|
|
| 357 |
|
|
$fwrite(STDOUT, "cs_cache_valid: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.cs_cache_valid);
|
| 358 |
|
|
$fwrite(STDOUT, "cs: %04x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.cs);
|
| 359 |
|
|
$fwrite(STDOUT, "cs_rpl: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.cs_rpl);
|
| 360 |
|
|
$fwrite(STDOUT, "cs_base: %08x\n", { ao486_inst.pipeline_inst.write_inst.write_register_inst.cs_cache[63:56],
|
| 361 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.cs_cache[39:32],
|
| 362 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.cs_cache[31:16] });
|
| 363 |
|
|
$fwrite(STDOUT, "cs_limit: %08x\n", { 12'd0,
|
| 364 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.cs_cache[51:48],
|
| 365 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.cs_cache[15:0] });
|
| 366 |
|
|
$fwrite(STDOUT, "cs_g: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.cs_cache[55]);
|
| 367 |
|
|
$fwrite(STDOUT, "cs_d_b: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.cs_cache[54]);
|
| 368 |
|
|
$fwrite(STDOUT, "cs_avl: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.cs_cache[52]);
|
| 369 |
|
|
$fwrite(STDOUT, "cs_p: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.cs_cache[47]);
|
| 370 |
|
|
$fwrite(STDOUT, "cs_dpl: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.cs_cache[46:45]);
|
| 371 |
|
|
$fwrite(STDOUT, "cs_s: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.cs_cache[44]);
|
| 372 |
|
|
$fwrite(STDOUT, "cs_type: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.cs_cache[43:40]);
|
| 373 |
|
|
|
| 374 |
|
|
$fwrite(STDOUT, "ds_cache_valid: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.ds_cache_valid);
|
| 375 |
|
|
$fwrite(STDOUT, "ds: %04x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.ds);
|
| 376 |
|
|
$fwrite(STDOUT, "ds_rpl: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.ds_rpl);
|
| 377 |
|
|
$fwrite(STDOUT, "ds_base: %08x\n", { ao486_inst.pipeline_inst.write_inst.write_register_inst.ds_cache[63:56],
|
| 378 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.ds_cache[39:32],
|
| 379 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.ds_cache[31:16] });
|
| 380 |
|
|
$fwrite(STDOUT, "ds_limit: %08x\n", { 12'd0,
|
| 381 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.ds_cache[51:48],
|
| 382 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.ds_cache[15:0] });
|
| 383 |
|
|
$fwrite(STDOUT, "ds_g: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.ds_cache[55]);
|
| 384 |
|
|
$fwrite(STDOUT, "ds_d_b: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.ds_cache[54]);
|
| 385 |
|
|
$fwrite(STDOUT, "ds_avl: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.ds_cache[52]);
|
| 386 |
|
|
$fwrite(STDOUT, "ds_p: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.ds_cache[47]);
|
| 387 |
|
|
$fwrite(STDOUT, "ds_dpl: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.ds_cache[46:45]);
|
| 388 |
|
|
$fwrite(STDOUT, "ds_s: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.ds_cache[44]);
|
| 389 |
|
|
$fwrite(STDOUT, "ds_type: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.ds_cache[43:40]);
|
| 390 |
|
|
|
| 391 |
|
|
$fwrite(STDOUT, "es_cache_valid: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.es_cache_valid);
|
| 392 |
|
|
$fwrite(STDOUT, "es: %04x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.es);
|
| 393 |
|
|
$fwrite(STDOUT, "es_rpl: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.es_rpl);
|
| 394 |
|
|
$fwrite(STDOUT, "es_base: %08x\n", { ao486_inst.pipeline_inst.write_inst.write_register_inst.es_cache[63:56],
|
| 395 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.es_cache[39:32],
|
| 396 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.es_cache[31:16] });
|
| 397 |
|
|
$fwrite(STDOUT, "es_limit: %08x\n", { 12'd0,
|
| 398 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.es_cache[51:48],
|
| 399 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.es_cache[15:0] });
|
| 400 |
|
|
$fwrite(STDOUT, "es_g: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.es_cache[55]);
|
| 401 |
|
|
$fwrite(STDOUT, "es_d_b: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.es_cache[54]);
|
| 402 |
|
|
$fwrite(STDOUT, "es_avl: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.es_cache[52]);
|
| 403 |
|
|
$fwrite(STDOUT, "es_p: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.es_cache[47]);
|
| 404 |
|
|
$fwrite(STDOUT, "es_dpl: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.es_cache[46:45]);
|
| 405 |
|
|
$fwrite(STDOUT, "es_s: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.es_cache[44]);
|
| 406 |
|
|
$fwrite(STDOUT, "es_type: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.es_cache[43:40]);
|
| 407 |
|
|
|
| 408 |
|
|
$fwrite(STDOUT, "fs_cache_valid: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.fs_cache_valid);
|
| 409 |
|
|
$fwrite(STDOUT, "fs: %04x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.fs);
|
| 410 |
|
|
$fwrite(STDOUT, "fs_rpl: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.fs_rpl);
|
| 411 |
|
|
$fwrite(STDOUT, "fs_base: %08x\n", { ao486_inst.pipeline_inst.write_inst.write_register_inst.fs_cache[63:56],
|
| 412 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.fs_cache[39:32],
|
| 413 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.fs_cache[31:16] });
|
| 414 |
|
|
$fwrite(STDOUT, "fs_limit: %08x\n", { 12'd0,
|
| 415 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.fs_cache[51:48],
|
| 416 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.fs_cache[15:0] });
|
| 417 |
|
|
$fwrite(STDOUT, "fs_g: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.fs_cache[55]);
|
| 418 |
|
|
$fwrite(STDOUT, "fs_d_b: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.fs_cache[54]);
|
| 419 |
|
|
$fwrite(STDOUT, "fs_avl: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.fs_cache[52]);
|
| 420 |
|
|
$fwrite(STDOUT, "fs_p: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.fs_cache[47]);
|
| 421 |
|
|
$fwrite(STDOUT, "fs_dpl: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.fs_cache[46:45]);
|
| 422 |
|
|
$fwrite(STDOUT, "fs_s: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.fs_cache[44]);
|
| 423 |
|
|
$fwrite(STDOUT, "fs_type: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.fs_cache[43:40]);
|
| 424 |
|
|
|
| 425 |
|
|
$fwrite(STDOUT, "gs_cache_valid: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.gs_cache_valid);
|
| 426 |
|
|
$fwrite(STDOUT, "gs: %04x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.gs);
|
| 427 |
|
|
$fwrite(STDOUT, "gs_rpl: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.gs_rpl);
|
| 428 |
|
|
$fwrite(STDOUT, "gs_base: %08x\n", { ao486_inst.pipeline_inst.write_inst.write_register_inst.gs_cache[63:56],
|
| 429 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.gs_cache[39:32],
|
| 430 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.gs_cache[31:16] });
|
| 431 |
|
|
$fwrite(STDOUT, "gs_limit: %08x\n", { 12'd0,
|
| 432 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.gs_cache[51:48],
|
| 433 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.gs_cache[15:0] });
|
| 434 |
|
|
$fwrite(STDOUT, "gs_g: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.gs_cache[55]);
|
| 435 |
|
|
$fwrite(STDOUT, "gs_d_b: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.gs_cache[54]);
|
| 436 |
|
|
$fwrite(STDOUT, "gs_avl: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.gs_cache[52]);
|
| 437 |
|
|
$fwrite(STDOUT, "gs_p: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.gs_cache[47]);
|
| 438 |
|
|
$fwrite(STDOUT, "gs_dpl: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.gs_cache[46:45]);
|
| 439 |
|
|
$fwrite(STDOUT, "gs_s: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.gs_cache[44]);
|
| 440 |
|
|
$fwrite(STDOUT, "gs_type: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.gs_cache[43:40]);
|
| 441 |
|
|
|
| 442 |
|
|
$fwrite(STDOUT, "ss_cache_valid: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.ss_cache_valid);
|
| 443 |
|
|
$fwrite(STDOUT, "ss: %04x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.ss);
|
| 444 |
|
|
$fwrite(STDOUT, "ss_rpl: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.ss_rpl);
|
| 445 |
|
|
$fwrite(STDOUT, "ss_base: %08x\n", { ao486_inst.pipeline_inst.write_inst.write_register_inst.ss_cache[63:56],
|
| 446 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.ss_cache[39:32],
|
| 447 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.ss_cache[31:16] });
|
| 448 |
|
|
$fwrite(STDOUT, "ss_limit: %08x\n", { 12'd0,
|
| 449 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.ss_cache[51:48],
|
| 450 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.ss_cache[15:0] });
|
| 451 |
|
|
$fwrite(STDOUT, "ss_g: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.ss_cache[55]);
|
| 452 |
|
|
$fwrite(STDOUT, "ss_d_b: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.ss_cache[54]);
|
| 453 |
|
|
$fwrite(STDOUT, "ss_avl: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.ss_cache[52]);
|
| 454 |
|
|
$fwrite(STDOUT, "ss_p: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.ss_cache[47]);
|
| 455 |
|
|
$fwrite(STDOUT, "ss_dpl: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.ss_cache[46:45]);
|
| 456 |
|
|
$fwrite(STDOUT, "ss_s: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.ss_cache[44]);
|
| 457 |
|
|
$fwrite(STDOUT, "ss_type: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.ss_cache[43:40]);
|
| 458 |
|
|
|
| 459 |
|
|
$fwrite(STDOUT, "ldtr_cache_valid: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.ldtr_cache_valid);
|
| 460 |
|
|
$fwrite(STDOUT, "ldtr: %04x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.ldtr);
|
| 461 |
|
|
$fwrite(STDOUT, "ldtr_rpl: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.ldtr_rpl);
|
| 462 |
|
|
$fwrite(STDOUT, "ldtr_base: %08x\n", { ao486_inst.pipeline_inst.write_inst.write_register_inst.ldtr_cache[63:56],
|
| 463 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.ldtr_cache[39:32],
|
| 464 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.ldtr_cache[31:16] });
|
| 465 |
|
|
$fwrite(STDOUT, "ldtr_limit: %08x\n", { 12'd0,
|
| 466 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.ldtr_cache[51:48],
|
| 467 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.ldtr_cache[15:0] });
|
| 468 |
|
|
$fwrite(STDOUT, "ldtr_g: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.ldtr_cache[55]);
|
| 469 |
|
|
$fwrite(STDOUT, "ldtr_d_b: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.ldtr_cache[54]);
|
| 470 |
|
|
$fwrite(STDOUT, "ldtr_avl: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.ldtr_cache[52]);
|
| 471 |
|
|
$fwrite(STDOUT, "ldtr_p: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.ldtr_cache[47]);
|
| 472 |
|
|
$fwrite(STDOUT, "ldtr_dpl: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.ldtr_cache[46:45]);
|
| 473 |
|
|
$fwrite(STDOUT, "ldtr_s: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.ldtr_cache[44]);
|
| 474 |
|
|
$fwrite(STDOUT, "ldtr_type: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.ldtr_cache[43:40]);
|
| 475 |
|
|
|
| 476 |
|
|
$fwrite(STDOUT, "tr_cache_valid: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.tr_cache_valid);
|
| 477 |
|
|
$fwrite(STDOUT, "tr: %04x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.tr);
|
| 478 |
|
|
$fwrite(STDOUT, "tr_rpl: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.tr_rpl);
|
| 479 |
|
|
$fwrite(STDOUT, "tr_base: %08x\n", { ao486_inst.pipeline_inst.write_inst.write_register_inst.tr_cache[63:56],
|
| 480 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.tr_cache[39:32],
|
| 481 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.tr_cache[31:16] });
|
| 482 |
|
|
$fwrite(STDOUT, "tr_limit: %08x\n", { 12'd0,
|
| 483 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.tr_cache[51:48],
|
| 484 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.tr_cache[15:0] });
|
| 485 |
|
|
$fwrite(STDOUT, "tr_g: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.tr_cache[55]);
|
| 486 |
|
|
$fwrite(STDOUT, "tr_d_b: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.tr_cache[54]);
|
| 487 |
|
|
$fwrite(STDOUT, "tr_avl: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.tr_cache[52]);
|
| 488 |
|
|
$fwrite(STDOUT, "tr_p: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.tr_cache[47]);
|
| 489 |
|
|
$fwrite(STDOUT, "tr_dpl: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.tr_cache[46:45]);
|
| 490 |
|
|
$fwrite(STDOUT, "tr_s: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.tr_cache[44]);
|
| 491 |
|
|
$fwrite(STDOUT, "tr_type: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.tr_cache[43:40]);
|
| 492 |
|
|
|
| 493 |
|
|
$fwrite(STDOUT, "gdtr_base: %08x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.gdtr_base);
|
| 494 |
|
|
$fwrite(STDOUT, "gdtr_limit: %04x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.gdtr_limit);
|
| 495 |
|
|
|
| 496 |
|
|
$fwrite(STDOUT, "idtr_base: %08x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.idtr_base);
|
| 497 |
|
|
$fwrite(STDOUT, "idtr_limit: %04x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.idtr_limit);
|
| 498 |
|
|
|
| 499 |
|
|
$fwrite(STDOUT, "cr0_pe: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.cr0_pe);
|
| 500 |
|
|
$fwrite(STDOUT, "cr0_mp: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.cr0_mp);
|
| 501 |
|
|
$fwrite(STDOUT, "cr0_em: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.cr0_em);
|
| 502 |
|
|
$fwrite(STDOUT, "cr0_ts: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.cr0_ts);
|
| 503 |
|
|
$fwrite(STDOUT, "cr0_ne: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.cr0_ne);
|
| 504 |
|
|
$fwrite(STDOUT, "cr0_wp: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.cr0_wp);
|
| 505 |
|
|
$fwrite(STDOUT, "cr0_am: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.cr0_am);
|
| 506 |
|
|
$fwrite(STDOUT, "cr0_nw: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.cr0_nw);
|
| 507 |
|
|
$fwrite(STDOUT, "cr0_cd: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.cr0_cd);
|
| 508 |
|
|
$fwrite(STDOUT, "cr0_pg: %01x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.cr0_pg);
|
| 509 |
|
|
|
| 510 |
|
|
$fwrite(STDOUT, "cr2: %08x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.cr2);
|
| 511 |
|
|
$fwrite(STDOUT, "cr3: %08x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.cr3);
|
| 512 |
|
|
|
| 513 |
|
|
$fwrite(STDOUT, "dr0: %08x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.dr0);
|
| 514 |
|
|
$fwrite(STDOUT, "dr1: %08x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.dr1);
|
| 515 |
|
|
$fwrite(STDOUT, "dr2: %08x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.dr2);
|
| 516 |
|
|
$fwrite(STDOUT, "dr3: %08x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.dr3);
|
| 517 |
|
|
|
| 518 |
|
|
$fwrite(STDOUT, "dr6: ffff%01xff%01x\n", { ao486_inst.pipeline_inst.write_inst.write_register_inst.dr6_bt,
|
| 519 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.dr6_bs,
|
| 520 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.dr6_bd,
|
| 521 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.dr6_b12 },
|
| 522 |
|
|
ao486_inst.pipeline_inst.write_inst.write_register_inst.dr6_breakpoints);
|
| 523 |
|
|
$fwrite(STDOUT, "dr7: %08x\n", ao486_inst.pipeline_inst.write_inst.write_register_inst.dr7);
|
| 524 |
|
|
|
| 525 |
|
|
$fwrite(STDOUT, "\n");
|
| 526 |
|
|
$fflush(STDOUT);
|
| 527 |
|
|
end
|
| 528 |
|
|
endtask
|
| 529 |
|
|
|
| 530 |
|
|
parameter STDIN = 32'h8000_0000;
|
| 531 |
|
|
parameter STDOUT = 32'h8000_0001;
|
| 532 |
|
|
|
| 533 |
|
|
initial begin
|
| 534 |
|
|
clk = 1'b0;
|
| 535 |
|
|
forever #5 clk = ~clk;
|
| 536 |
|
|
end
|
| 537 |
|
|
|
| 538 |
|
|
reg [255:0] dumpfile_name;
|
| 539 |
|
|
initial begin
|
| 540 |
|
|
if( $value$plusargs("dumpfile=%s", dumpfile_name) == 0 ) begin
|
| 541 |
|
|
dumpfile_name = "default.vcd";
|
| 542 |
|
|
end
|
| 543 |
|
|
|
| 544 |
|
|
$dumpfile(dumpfile_name);
|
| 545 |
|
|
$dumpvars(0);
|
| 546 |
|
|
$dumpon();
|
| 547 |
|
|
|
| 548 |
|
|
$display("START");
|
| 549 |
|
|
|
| 550 |
|
|
//--------------------------------------------------------------------------
|
| 551 |
|
|
|
| 552 |
|
|
rst_n = 1'b0;
|
| 553 |
|
|
#10 rst_n = 1'b1;
|
| 554 |
|
|
|
| 555 |
|
|
initialize();
|
| 556 |
|
|
output_cpu_state();
|
| 557 |
|
|
|
| 558 |
|
|
while(finished == 0) begin
|
| 559 |
|
|
if($time > 18000) $finish_and_return(-1);
|
| 560 |
|
|
#10;
|
| 561 |
|
|
|
| 562 |
|
|
$dumpflush();
|
| 563 |
|
|
end
|
| 564 |
|
|
|
| 565 |
|
|
#60;
|
| 566 |
|
|
|
| 567 |
|
|
$dumpoff();
|
| 568 |
|
|
$finish_and_return(0);
|
| 569 |
|
|
end
|
| 570 |
|
|
|
| 571 |
|
|
//------------------------------------------------------------------------------
|
| 572 |
|
|
|
| 573 |
|
|
reg tb_procedure_exception_delay;
|
| 574 |
|
|
always @(posedge clk or negedge rst_n) begin
|
| 575 |
|
|
if(rst_n == 1'b0) tb_procedure_exception_delay <= `FALSE;
|
| 576 |
|
|
else tb_procedure_exception_delay <= ao486_inst.exception_inst.exc_load && ao486_inst.exception_inst.interrupt_load == `FALSE;
|
| 577 |
|
|
end
|
| 578 |
|
|
|
| 579 |
|
|
reg tb_procedure_interrupt_delay;
|
| 580 |
|
|
always @(posedge clk or negedge rst_n) begin
|
| 581 |
|
|
if(rst_n == 1'b0) tb_procedure_interrupt_delay <= `FALSE;
|
| 582 |
|
|
else tb_procedure_interrupt_delay <= ao486_inst.exception_inst.interrupt_done;
|
| 583 |
|
|
end
|
| 584 |
|
|
|
| 585 |
|
|
//------------------------------------------------------------------------------
|
| 586 |
|
|
|
| 587 |
|
|
integer processing_exception_interrupt = 0;
|
| 588 |
|
|
|
| 589 |
|
|
integer finished = 0;
|
| 590 |
|
|
always @(posedge clk) begin
|
| 591 |
|
|
if(finished == 0) begin
|
| 592 |
|
|
if(tb_procedure_interrupt_delay) begin
|
| 593 |
|
|
$fwrite(STDOUT, "start_interrupt: %x\n", $time);
|
| 594 |
|
|
$fwrite(STDOUT, "vector: %02x\n", ao486_inst.exception_inst.exc_vector);
|
| 595 |
|
|
|
| 596 |
|
|
$fwrite(STDOUT, "\n");
|
| 597 |
|
|
$fflush(STDOUT);
|
| 598 |
|
|
|
| 599 |
|
|
output_cpu_state();
|
| 600 |
|
|
processing_exception_interrupt = 1;
|
| 601 |
|
|
if(test_type == 0) finished = 1;
|
| 602 |
|
|
|
| 603 |
|
|
instruction_count = instruction_count + 1;
|
| 604 |
|
|
if(test_type > 0 && instruction_count == test_type) finished = 1;
|
| 605 |
|
|
end
|
| 606 |
|
|
else if(tb_procedure_exception_delay) begin
|
| 607 |
|
|
$fwrite(STDOUT, "start_exception: %x\n", $time);
|
| 608 |
|
|
$fwrite(STDOUT, "vector: %02x\n", ao486_inst.exception_inst.exc_vector);
|
| 609 |
|
|
$fwrite(STDOUT, "push_error: %01x\n", ao486_inst.exception_inst.exc_push_error);
|
| 610 |
|
|
$fwrite(STDOUT, "error_code: %04x\n", ao486_inst.exception_inst.exc_error_code);
|
| 611 |
|
|
|
| 612 |
|
|
$fwrite(STDOUT, "\n");
|
| 613 |
|
|
$fflush(STDOUT);
|
| 614 |
|
|
|
| 615 |
|
|
output_cpu_state();
|
| 616 |
|
|
processing_exception_interrupt = 1;
|
| 617 |
|
|
if(test_type == 0) finished = 1;
|
| 618 |
|
|
|
| 619 |
|
|
instruction_count = instruction_count + 1;
|
| 620 |
|
|
if(test_type > 0 && instruction_count == test_type) finished = 1;
|
| 621 |
|
|
end
|
| 622 |
|
|
else if(ao486_inst.exception_inst.shutdown) begin
|
| 623 |
|
|
$fwrite(STDOUT, "start_shutdown: %d\n", $time);
|
| 624 |
|
|
|
| 625 |
|
|
$fwrite(STDOUT, "\n");
|
| 626 |
|
|
$fflush(STDOUT);
|
| 627 |
|
|
|
| 628 |
|
|
finished = 1;
|
| 629 |
|
|
end
|
| 630 |
|
|
else if(ao486_inst.pipeline_inst.decode_inst.dec_consumed > 4'd0) begin
|
| 631 |
|
|
$fwrite(STDOUT, "#start_decoded: %d\n", $time);
|
| 632 |
|
|
$fwrite(STDOUT, "#decoded_rep: %x\n",
|
| 633 |
|
|
(ao486_inst.pipeline_inst.decode_inst.dec_prefix_group_1_rep == 2'd0)? 2'd0 :
|
| 634 |
|
|
(ao486_inst.pipeline_inst.decode_inst.dec_prefix_group_1_rep == 2'd1)? 2'd2 :
|
| 635 |
|
|
(ao486_inst.pipeline_inst.decode_inst.dec_prefix_group_1_rep == 2'd2)? 2'd3 :
|
| 636 |
|
|
2'd0);
|
| 637 |
|
|
|
| 638 |
|
|
$fwrite(STDOUT, "#decoded_seg: %x\n", ao486_inst.pipeline_inst.decode_inst.dec_prefix_group_2_seg);
|
| 639 |
|
|
$fwrite(STDOUT, "#decoded_lock: %x\n", ao486_inst.pipeline_inst.decode_inst.dec_prefix_group_1_lock);
|
| 640 |
|
|
$fwrite(STDOUT, "#decoded_os32: %x\n", ao486_inst.pipeline_inst.decode_inst.dec_operand_32bit);
|
| 641 |
|
|
$fwrite(STDOUT, "#decoded_as32: %x\n", ao486_inst.pipeline_inst.decode_inst.dec_address_32bit);
|
| 642 |
|
|
$fwrite(STDOUT, "#decoded_consumed: %x\n", ao486_inst.pipeline_inst.decode_inst.dec_consumed);
|
| 643 |
|
|
$fwrite(STDOUT, "\n");
|
| 644 |
|
|
$fflush(STDOUT);
|
| 645 |
|
|
end
|
| 646 |
|
|
end
|
| 647 |
|
|
end
|
| 648 |
|
|
|
| 649 |
|
|
reg tb_wr_ready_last;
|
| 650 |
|
|
reg [31:0] tb_wr_eip;
|
| 651 |
|
|
reg tb_rflag_last;
|
| 652 |
|
|
reg [6:0] tb_wr_cmd_last = 7'h7F;
|
| 653 |
|
|
|
| 654 |
|
|
wire tb_wr_finished = ao486_inst.pipeline_inst.write_inst.wr_finished ||
|
| 655 |
|
|
(ao486_inst.pipeline_inst.write_inst.wr_ready && ao486_inst.pipeline_inst.write_inst.wr_hlt_in_progress);
|
| 656 |
|
|
|
| 657 |
|
|
always @(posedge clk) begin
|
| 658 |
|
|
if(tb_wr_finished) begin
|
| 659 |
|
|
tb_wr_ready_last <= 1'b1;
|
| 660 |
|
|
|
| 661 |
|
|
tb_wr_eip <= ao486_inst.pipeline_inst.write_inst.wr_eip;
|
| 662 |
|
|
tb_wr_cmd_last <= ao486_inst.pipeline_inst.write_inst.wr_cmd;
|
| 663 |
|
|
|
| 664 |
|
|
//(ao486_inst.pipeline_inst.write_inst.wr_clear_rflag)? ignored
|
| 665 |
|
|
tb_rflag_last <= ao486_inst.pipeline_inst.write_inst.rflag_to_reg;
|
| 666 |
|
|
end
|
| 667 |
|
|
else begin
|
| 668 |
|
|
tb_wr_ready_last <= 1'b0;
|
| 669 |
|
|
end
|
| 670 |
|
|
|
| 671 |
|
|
if(tb_wr_finished) begin
|
| 672 |
|
|
|
| 673 |
|
|
if(processing_exception_interrupt == 0) begin
|
| 674 |
|
|
if(test_type == 0 || instruction_count < (test_type-1) || (instruction_count == (test_type-1) && ~(tb_wr_ready_last))) begin
|
| 675 |
|
|
$fwrite(STDOUT, "start_completed: %d\n", $time);
|
| 676 |
|
|
$fwrite(STDOUT, "rep: %x\n",
|
| 677 |
|
|
(ao486_inst.pipeline_inst.write_inst.wr_prefix_group_1_rep == 2'd0)? 2'd0 :
|
| 678 |
|
|
(ao486_inst.pipeline_inst.write_inst.wr_prefix_group_1_rep == 2'd1)? 2'd2 :
|
| 679 |
|
|
(ao486_inst.pipeline_inst.write_inst.wr_prefix_group_1_rep == 2'd2)? 2'd3 :
|
| 680 |
|
|
2'd0);
|
| 681 |
|
|
|
| 682 |
|
|
$fwrite(STDOUT, "seg: ff\n");
|
| 683 |
|
|
$fwrite(STDOUT, "lock: %x\n", ao486_inst.pipeline_inst.write_inst.wr_prefix_group_1_lock);
|
| 684 |
|
|
$fwrite(STDOUT, "os32: %x\n", ao486_inst.pipeline_inst.write_inst.wr_operand_32bit);
|
| 685 |
|
|
$fwrite(STDOUT, "as32: %x\n", ao486_inst.pipeline_inst.write_inst.wr_address_32bit);
|
| 686 |
|
|
$fwrite(STDOUT, "consumed: %x\n", ao486_inst.pipeline_inst.write_inst.wr_consumed);
|
| 687 |
|
|
$fwrite(STDOUT, "\n");
|
| 688 |
|
|
$fflush(STDOUT);
|
| 689 |
|
|
end
|
| 690 |
|
|
end
|
| 691 |
|
|
end
|
| 692 |
|
|
end
|
| 693 |
|
|
|
| 694 |
|
|
integer instruction_count = 0;
|
| 695 |
|
|
|
| 696 |
|
|
always @(posedge clk) begin
|
| 697 |
|
|
if(tb_wr_ready_last) begin
|
| 698 |
|
|
if(processing_exception_interrupt == 0) begin
|
| 699 |
|
|
output_cpu_state();
|
| 700 |
|
|
|
| 701 |
|
|
instruction_count = instruction_count + 1;
|
| 702 |
|
|
if(test_type > 0 && instruction_count == test_type) finished = 1;
|
| 703 |
|
|
|
| 704 |
|
|
//if(test_type == 0 && ao486_inst.pipeline_inst.write_inst.wr_hlt_in_progress) finished = 1;
|
| 705 |
|
|
end
|
| 706 |
|
|
else begin
|
| 707 |
|
|
processing_exception_interrupt = 0;
|
| 708 |
|
|
end
|
| 709 |
|
|
end
|
| 710 |
|
|
end
|
| 711 |
|
|
|
| 712 |
|
|
//------------------------------------------------------------------------------ interrupt
|
| 713 |
|
|
|
| 714 |
|
|
integer interrupt_fscanf;
|
| 715 |
|
|
reg [8:0] interrupt_fscanf_reg;
|
| 716 |
|
|
initial begin
|
| 717 |
|
|
interrupt_do = 1'b0;
|
| 718 |
|
|
interrupt_vector = 8'd0;
|
| 719 |
|
|
|
| 720 |
|
|
#27;
|
| 721 |
|
|
|
| 722 |
|
|
forever begin
|
| 723 |
|
|
if(tb_wr_finished) begin
|
| 724 |
|
|
|
| 725 |
|
|
if(processing_exception_interrupt == 0) begin
|
| 726 |
|
|
$fwrite(STDOUT, "start_check_interrupt: %x\n", $time);
|
| 727 |
|
|
$fwrite(STDOUT, "\n");
|
| 728 |
|
|
$fflush(STDOUT);
|
| 729 |
|
|
|
| 730 |
|
|
interrupt_fscanf = $fscanf(STDIN, "%x", interrupt_fscanf_reg);
|
| 731 |
|
|
interrupt_vector = interrupt_fscanf_reg[7:0];
|
| 732 |
|
|
interrupt_do = ~(interrupt_fscanf_reg[8]);
|
| 733 |
|
|
end
|
| 734 |
|
|
end
|
| 735 |
|
|
#10;
|
| 736 |
|
|
end
|
| 737 |
|
|
end
|
| 738 |
|
|
|
| 739 |
|
|
always @(posedge clk) begin
|
| 740 |
|
|
if(interrupt_done) begin
|
| 741 |
|
|
interrupt_vector = 8'd0;
|
| 742 |
|
|
interrupt_do = `FALSE;
|
| 743 |
|
|
end
|
| 744 |
|
|
end
|
| 745 |
|
|
|
| 746 |
|
|
//------------------------------------------------------------------------------ avalon memory and io
|
| 747 |
|
|
|
| 748 |
|
|
initial begin
|
| 749 |
|
|
avm_waitrequest <= `FALSE;
|
| 750 |
|
|
avm_readdatavalid <= `FALSE;
|
| 751 |
|
|
|
| 752 |
|
|
avalon_io_waitrequest <= `FALSE;
|
| 753 |
|
|
avalon_io_readdatavalid <= `FALSE;
|
| 754 |
|
|
|
| 755 |
|
|
avm_readdata <= 32'd0;
|
| 756 |
|
|
avalon_io_readdata <= 32'd0;
|
| 757 |
|
|
end
|
| 758 |
|
|
|
| 759 |
|
|
reg [2:0] write_burst_count = 3'd0;
|
| 760 |
|
|
reg [31:0] write_burst_address;
|
| 761 |
|
|
always @(posedge clk) begin
|
| 762 |
|
|
if(avm_write && avm_burstcount > 3'd1 && write_burst_count == 3'd0) begin
|
| 763 |
|
|
write_burst_count <= avm_burstcount - 3'd1;
|
| 764 |
|
|
write_burst_address <= avm_address + 3'd4;
|
| 765 |
|
|
end
|
| 766 |
|
|
else if(write_burst_count > 3'd0) begin
|
| 767 |
|
|
write_burst_count <= write_burst_count - 3'd1;
|
| 768 |
|
|
write_burst_address <= write_burst_address + 3'd4;
|
| 769 |
|
|
end
|
| 770 |
|
|
end
|
| 771 |
|
|
|
| 772 |
|
|
integer write_i;
|
| 773 |
|
|
reg [31:0] write_val;
|
| 774 |
|
|
always @(posedge clk) begin
|
| 775 |
|
|
if(avm_write) begin
|
| 776 |
|
|
$fwrite(STDOUT, "start_write: %x\n", $time);
|
| 777 |
|
|
$fwrite(STDOUT, "address: %08x\n", (write_burst_count > 3'd0)? write_burst_address : avm_address);
|
| 778 |
|
|
$fwrite(STDOUT, "data: %08x\n", avm_writedata);
|
| 779 |
|
|
$fwrite(STDOUT, "byteena: %01x\n", avm_byteenable);
|
| 780 |
|
|
$fwrite(STDOUT, "can_ignore: %x\n", finished);
|
| 781 |
|
|
|
| 782 |
|
|
$fwrite(STDOUT, "\n");
|
| 783 |
|
|
$fflush(STDOUT);
|
| 784 |
|
|
end
|
| 785 |
|
|
end
|
| 786 |
|
|
|
| 787 |
|
|
integer io_write_i;
|
| 788 |
|
|
reg [31:0] io_write_val;
|
| 789 |
|
|
always @(posedge clk) begin
|
| 790 |
|
|
if(avalon_io_write || ((ao486_inst.avalon_io_inst.state == 3'd1 || ao486_inst.avalon_io_inst.state == 3'd2) && ao486_inst.avalon_io_inst.address_out_of_bounds)) begin
|
| 791 |
|
|
$fwrite(STDOUT, "start_io_write: %x\n", $time);
|
| 792 |
|
|
$fwrite(STDOUT, "address: %04x\n", avalon_io_address);
|
| 793 |
|
|
$fwrite(STDOUT, "data: %08x\n", avalon_io_writedata);
|
| 794 |
|
|
$fwrite(STDOUT, "byteena: %01x\n", avalon_io_byteenable);
|
| 795 |
|
|
$fwrite(STDOUT, "can_ignore: %x\n", finished);
|
| 796 |
|
|
|
| 797 |
|
|
$fwrite(STDOUT, "\n");
|
| 798 |
|
|
$fflush(STDOUT);
|
| 799 |
|
|
end
|
| 800 |
|
|
end
|
| 801 |
|
|
|
| 802 |
|
|
reg [2:0] read_burst_count = 3'd0;
|
| 803 |
|
|
reg [31:0] read_burst_address;
|
| 804 |
|
|
always @(posedge clk) begin
|
| 805 |
|
|
if(avm_read && avm_burstcount > 3'd1 && read_burst_count == 3'd0) begin
|
| 806 |
|
|
read_burst_count <= avm_burstcount - 3'd1;
|
| 807 |
|
|
read_burst_address <= avm_address + 3'd4;
|
| 808 |
|
|
end
|
| 809 |
|
|
else if(read_burst_count > 3'd0) begin
|
| 810 |
|
|
read_burst_count <= read_burst_count - 3'd1;
|
| 811 |
|
|
read_burst_address <= read_burst_address + 3'd4;
|
| 812 |
|
|
end
|
| 813 |
|
|
end
|
| 814 |
|
|
|
| 815 |
|
|
integer fscanf_avm_ret;
|
| 816 |
|
|
always @(posedge clk) begin
|
| 817 |
|
|
if((avm_read || read_burst_count > 3'd0) && ao486_inst.memory_inst.avalon_mem_inst.state == 2'd3) begin
|
| 818 |
|
|
|
| 819 |
|
|
$fwrite(STDOUT, "start_read_code: %x\n", $time);
|
| 820 |
|
|
$fwrite(STDOUT, "address: %08x\n", (read_burst_count > 3'd0)? read_burst_address : avm_address);
|
| 821 |
|
|
$fwrite(STDOUT, "byteena: %01x\n", avm_byteenable);
|
| 822 |
|
|
|
| 823 |
|
|
$fwrite(STDOUT, "\n");
|
| 824 |
|
|
$fflush(STDOUT);
|
| 825 |
|
|
|
| 826 |
|
|
fscanf_avm_ret= $fscanf(STDIN, "%x", avm_readdata);
|
| 827 |
|
|
|
| 828 |
|
|
avm_readdatavalid <= `TRUE;
|
| 829 |
|
|
end
|
| 830 |
|
|
else if(avm_read || read_burst_count > 3'd0) begin
|
| 831 |
|
|
|
| 832 |
|
|
if(ao486_inst.memory_inst.read_do && ao486_inst.memory_inst.memory_read_inst.reset_waiting == `FALSE) begin
|
| 833 |
|
|
$fwrite(STDOUT, "start_read: %x\n", $time);
|
| 834 |
|
|
$fwrite(STDOUT, "address: %08x\n", (read_burst_count > 3'd0)? read_burst_address : avm_address);
|
| 835 |
|
|
$fwrite(STDOUT, "byteena: %01x\n", avm_byteenable);
|
| 836 |
|
|
$fwrite(STDOUT, "can_ignore: %01x\n", finished);
|
| 837 |
|
|
|
| 838 |
|
|
$fwrite(STDOUT, "\n");
|
| 839 |
|
|
$fflush(STDOUT);
|
| 840 |
|
|
|
| 841 |
|
|
fscanf_avm_ret= $fscanf(STDIN, "%x", avm_readdata);
|
| 842 |
|
|
end
|
| 843 |
|
|
|
| 844 |
|
|
avm_readdatavalid <= `TRUE;
|
| 845 |
|
|
end
|
| 846 |
|
|
else begin
|
| 847 |
|
|
avm_readdatavalid <= `FALSE;
|
| 848 |
|
|
end
|
| 849 |
|
|
end
|
| 850 |
|
|
|
| 851 |
|
|
reg avalon_io_read_delayed;
|
| 852 |
|
|
always @(posedge clk) begin
|
| 853 |
|
|
avalon_io_read_delayed <= avalon_io_read;
|
| 854 |
|
|
end
|
| 855 |
|
|
|
| 856 |
|
|
integer fscanf_io_ret;
|
| 857 |
|
|
always @(posedge clk) begin
|
| 858 |
|
|
if(avalon_io_read_delayed || ((ao486_inst.avalon_io_inst.state == 3'd3 || ao486_inst.avalon_io_inst.state == 3'd4) && ao486_inst.avalon_io_inst.address_out_of_bounds)) begin
|
| 859 |
|
|
|
| 860 |
|
|
$fwrite(STDOUT, "start_io_read: %x\n", $time);
|
| 861 |
|
|
$fwrite(STDOUT, "address: %04x\n", avalon_io_address);
|
| 862 |
|
|
$fwrite(STDOUT, "byteena: %01x\n", avalon_io_byteenable);
|
| 863 |
|
|
$fwrite(STDOUT, "can_ignore: %x\n", finished);
|
| 864 |
|
|
|
| 865 |
|
|
$fwrite(STDOUT, "\n");
|
| 866 |
|
|
$fflush(STDOUT);
|
| 867 |
|
|
|
| 868 |
|
|
fscanf_io_ret= $fscanf(STDIN, "%x", avalon_io_readdata);
|
| 869 |
|
|
|
| 870 |
|
|
if(avalon_io_read_delayed) avalon_io_readdatavalid <= `TRUE;
|
| 871 |
|
|
end
|
| 872 |
|
|
else begin
|
| 873 |
|
|
avalon_io_readdatavalid <= `FALSE;
|
| 874 |
|
|
end
|
| 875 |
|
|
end
|
| 876 |
|
|
|
| 877 |
|
|
endmodule
|
