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alfik |
#include <cstdio>
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#include <cstdlib>
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#include <sys/mman.h>
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#include <sys/types.h>
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#include <sys/stat.h>
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#include <fcntl.h>
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#include <unistd.h>
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#include "Vmain.h"
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#include "verilated.h"
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#include "verilated_vcd_c.h"
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#include "shared_mem.h"
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//------------------------------------------------------------------------------
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volatile shared_mem_t *shared_ptr = NULL;
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//------------------------------------------------------------------------------
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int main(int argc, char **argv) {
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//map shared memory
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int fd = open("./../../../sim/sim_pc/shared_mem.dat", O_RDWR, S_IRUSR | S_IWUSR);
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if(fd == -1) {
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perror("open() failed for shared_mem.dat");
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return -1;
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}
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shared_ptr = (shared_mem_t *)mmap(NULL, sizeof(shared_mem_t), PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0);
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if(shared_ptr == MAP_FAILED) {
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perror("mmap() failed");
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close(fd);
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return -2;
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}
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//wait for ack
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shared_ptr->ao486.starting = STEP_REQ;
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printf("Waiting for startup ack...");
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fflush(stdout);
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while(shared_ptr->ao486.starting != STEP_ACK) {
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usleep(100000);
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}
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printf("done.\n");
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//--------------------------------------------------------------------------
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Verilated::commandArgs(argc, argv);
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Verilated::traceEverOn(true);
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VerilatedVcdC* tracer = new VerilatedVcdC;
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Vmain *top = new Vmain();
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top->trace (tracer, 99);
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tracer->rolloverMB(1000000);
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tracer->open("ao486.vcd");
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//tracer->flush();
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//return 0;
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//reset
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top->clk = 0; top->rst_n = 1; top->eval();
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top->clk = 1; top->rst_n = 1; top->eval();
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top->clk = 1; top->rst_n = 0; top->eval();
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top->clk = 0; top->rst_n = 0; top->eval();
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top->clk = 0; top->rst_n = 1; top->eval();
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//--------------------------------------------------------------------------
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uint32 sdram_read_count = 0;
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uint32 sdram_read_data[4];
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uint32 sdram_write_count = 0;
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uint32 sdram_write_address = 0;
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uint32 vga_read_count = 0;
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uint32 vga_read_address = 0;
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uint32 vga_read_byteenable = 0;
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uint32 vga_write_count = 0;
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uint32 vga_write_address = 0;
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uint32 io_read_count = 0;
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uint32 io_read_address = 0;
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uint32 io_read_byteenable = 0;
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uint32 ignored_intr_counter = 0;
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//--------------------------------------------------------------------------
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uint64 cycle = 0;
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while(!Verilated::gotFinish()) {
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//----------------------------------------------------------------------
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if(top->tb_finish_instr) {
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shared_ptr->ao486.instr_counter++;
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if(shared_ptr->ao486.stop == STEP_REQ) {
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shared_ptr->ao486.stop = STEP_ACK;
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while(shared_ptr->ao486.stop != STEP_IDLE) {
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usleep(500);
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}
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}
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}
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//---------------------------------------------------------------------- sdram
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top->sdram_readdatavalid = 0;
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if(top->sdram_read) {
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uint32 address = top->sdram_address & 0x07FFFFFC;
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for(uint32 i=0; i<4; i++) {
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sdram_read_data[i] = shared_ptr->mem.ints[(address + i*4)/4];
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if(((top->sdram_byteenable >> 0) & 1) == 0) sdram_read_data[i] &= 0xFFFFFF00;
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if(((top->sdram_byteenable >> 1) & 1) == 0) sdram_read_data[i] &= 0xFFFF00FF;
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if(((top->sdram_byteenable >> 2) & 1) == 0) sdram_read_data[i] &= 0xFF00FFFF;
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if(((top->sdram_byteenable >> 3) & 1) == 0) sdram_read_data[i] &= 0x00FFFFFF;
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}
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sdram_read_count = top->sdram_burstcount;
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//printf("sdram read: %08x %x [%08x %08x %08x %08x]\n", address, top->sdram_byteenable, sdram_read_data[0], sdram_read_data[1], sdram_read_data[2], sdram_read_data[3]);
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}
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else if(sdram_read_count > 0) {
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top->sdram_readdatavalid = 1;
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top->sdram_readdata = sdram_read_data[0];
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//printf("r: %08x\n", top->sdram_readdata);
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memmove(sdram_read_data, &sdram_read_data[1], sizeof(sdram_read_data)-sizeof(uint32));
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sdram_read_count--;
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}
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| 133 |
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if(top->sdram_write) {
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uint32 address = (sdram_write_count > 0)? sdram_write_address : top->sdram_address & 0x07FFFFFC;
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uint32 data = top->sdram_writedata;
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if((top->sdram_byteenable & 0x1) == 0) data &= 0xFFFFFF00;
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if((top->sdram_byteenable & 0x2) == 0) data &= 0xFFFF00FF;
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if((top->sdram_byteenable & 0x4) == 0) data &= 0xFF00FFFF;
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if((top->sdram_byteenable & 0x8) == 0) data &= 0x00FFFFFF;
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printf("sdram write: %08x %x %08x %d", address, top->sdram_byteenable, data, sdram_write_count);
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shared_ptr->ao486.mem_address = address;
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shared_ptr->ao486.mem_byteenable = top->sdram_byteenable;
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shared_ptr->ao486.mem_is_write = 1;
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shared_ptr->ao486.mem_data = data;
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shared_ptr->ao486.mem_step = STEP_REQ;
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while(shared_ptr->ao486.mem_step != STEP_ACK) {
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fflush(stdout);
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usleep(10);
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}
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shared_ptr->ao486.mem_step = STEP_IDLE;
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if(sdram_write_count == 0) {
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sdram_write_address = (address + 4) & 0x07FFFFFC;
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sdram_write_count = top->sdram_burstcount;
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}
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if(sdram_write_count > 0) sdram_write_count--;
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printf("\n");
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}
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//---------------------------------------------------------------------- vga
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top->vga_readdatavalid = 0;
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if(top->vga_read) {
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vga_read_address = top->vga_address & 0x000FFFFC;
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vga_read_count = top->vga_burstcount;
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vga_read_byteenable = top->vga_byteenable;
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printf("vga read: %08x %x %d\n", vga_read_address, vga_read_byteenable, vga_read_count);
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}
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else if(vga_read_count > 0) {
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shared_ptr->ao486.mem_address = vga_read_address;
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shared_ptr->ao486.mem_byteenable = vga_read_byteenable;
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shared_ptr->ao486.mem_is_write = 0;
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shared_ptr->ao486.mem_step = STEP_REQ;
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while(shared_ptr->ao486.mem_step != STEP_ACK) {
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fflush(stdout);
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usleep(10);
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}
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| 183 |
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uint32 value = shared_ptr->ao486.mem_data;
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shared_ptr->ao486.mem_step = STEP_IDLE;
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| 186 |
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top->vga_readdatavalid = 1;
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top->vga_readdata = value;
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| 189 |
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vga_read_address = (vga_read_address + 4) & 0x000FFFFC;
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| 190 |
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vga_read_count--;
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| 191 |
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printf("\n");
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| 192 |
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}
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| 193 |
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| 194 |
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if(top->vga_write) {
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uint32 address = (vga_write_count > 0)? vga_write_address : top->vga_address & 0x000FFFFC;
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uint32 data = top->vga_writedata;
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| 198 |
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if((top->vga_byteenable & 0x1) == 0) data &= 0xFFFFFF00;
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| 199 |
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if((top->vga_byteenable & 0x2) == 0) data &= 0xFFFF00FF;
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| 200 |
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if((top->vga_byteenable & 0x4) == 0) data &= 0xFF00FFFF;
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| 201 |
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if((top->vga_byteenable & 0x8) == 0) data &= 0x00FFFFFF;
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| 202 |
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| 203 |
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printf("vga write: %08x %x %08x %d", address, top->sdram_byteenable, data, vga_write_count);
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shared_ptr->ao486.mem_address = address;
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shared_ptr->ao486.mem_byteenable = top->vga_byteenable;
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| 206 |
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shared_ptr->ao486.mem_is_write = 1;
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| 207 |
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shared_ptr->ao486.mem_data = data;
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| 208 |
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shared_ptr->ao486.mem_step = STEP_REQ;
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| 209 |
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while(shared_ptr->ao486.mem_step != STEP_ACK) {
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| 210 |
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fflush(stdout);
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| 211 |
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usleep(10);
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| 212 |
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}
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| 213 |
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shared_ptr->ao486.mem_step = STEP_IDLE;
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| 214 |
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| 215 |
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if(vga_write_count == 0) {
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| 216 |
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vga_write_address = (address + 4) & 0x07FFFFFC;
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| 217 |
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vga_write_count = top->vga_burstcount;
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| 218 |
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}
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| 219 |
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| 220 |
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if(vga_write_count > 0) vga_write_count--;
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| 221 |
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printf("\n", vga_write_count);
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| 222 |
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}
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| 223 |
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| 224 |
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//---------------------------------------------------------------------- io
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| 225 |
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| 226 |
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top->avalon_io_readdatavalid = 0;
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| 227 |
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| 228 |
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if(top->avalon_io_read) {
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| 229 |
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io_read_address = top->avalon_io_address & 0x0000FFFC;
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| 230 |
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| 231 |
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io_read_count = 1;
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| 232 |
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io_read_byteenable = top->avalon_io_byteenable;
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| 233 |
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printf("io read: %08x %x %d", io_read_address, io_read_byteenable, io_read_count);
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| 234 |
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}
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| 235 |
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else if(io_read_count > 0) {
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| 236 |
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shared_ptr->ao486.io_address = io_read_address;
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| 237 |
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shared_ptr->ao486.io_byteenable = io_read_byteenable;
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| 238 |
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shared_ptr->ao486.io_is_write = 0;
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| 239 |
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shared_ptr->ao486.io_step = STEP_REQ;
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| 240 |
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while(shared_ptr->ao486.io_step != STEP_ACK) {
|
| 241 |
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fflush(stdout);
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| 242 |
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usleep(10);
|
| 243 |
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}
|
| 244 |
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uint32 value = shared_ptr->ao486.io_data;
|
| 245 |
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shared_ptr->ao486.io_step = STEP_IDLE;
|
| 246 |
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| 247 |
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top->avalon_io_readdatavalid = 1;
|
| 248 |
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top->avalon_io_readdata = value;
|
| 249 |
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| 250 |
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io_read_count--;
|
| 251 |
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printf("\n");
|
| 252 |
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}
|
| 253 |
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|
| 254 |
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if(top->avalon_io_write) {
|
| 255 |
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uint32 data = top->avalon_io_writedata;
|
| 256 |
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| 257 |
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if((top->avalon_io_byteenable & 0x1) == 0) data &= 0xFFFFFF00;
|
| 258 |
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if((top->avalon_io_byteenable & 0x2) == 0) data &= 0xFFFF00FF;
|
| 259 |
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if((top->avalon_io_byteenable & 0x4) == 0) data &= 0xFF00FFFF;
|
| 260 |
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if((top->avalon_io_byteenable & 0x8) == 0) data &= 0x00FFFFFF;
|
| 261 |
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| 262 |
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printf("io write: %08x %x %08x", (top->avalon_io_address & 0x0000FFFC), top->avalon_io_byteenable, data);
|
| 263 |
|
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shared_ptr->ao486.io_address = top->avalon_io_address & 0x0000FFFC;
|
| 264 |
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shared_ptr->ao486.io_byteenable = top->avalon_io_byteenable;
|
| 265 |
|
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shared_ptr->ao486.io_is_write = 1;
|
| 266 |
|
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shared_ptr->ao486.io_data = data;
|
| 267 |
|
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shared_ptr->ao486.io_step = STEP_REQ;
|
| 268 |
|
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while(shared_ptr->ao486.io_step != STEP_ACK) {
|
| 269 |
|
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fflush(stdout);
|
| 270 |
|
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usleep(10);
|
| 271 |
|
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}
|
| 272 |
|
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shared_ptr->ao486.io_step = STEP_IDLE;
|
| 273 |
|
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printf("\n");
|
| 274 |
|
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}
|
| 275 |
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|
| 276 |
|
|
//---------------------------------------------------------------------- interrupt
|
| 277 |
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|
| 278 |
|
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top->interrupt_vector = shared_ptr->interrupt_vector;
|
| 279 |
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|
| 280 |
|
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if(top->interrupt_do && top->interrupt_done) {
|
| 281 |
|
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printf("irq done at %d\n", shared_ptr->ao486.instr_counter);
|
| 282 |
|
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top->interrupt_do = 0;
|
| 283 |
|
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ignored_intr_counter = shared_ptr->ao486.instr_counter;
|
| 284 |
|
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}
|
| 285 |
|
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else if(ignored_intr_counter != shared_ptr->ao486.instr_counter && shared_ptr->interrupt_at_counter == shared_ptr->ao486.instr_counter) {
|
| 286 |
|
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printf("irq do %02x at %d\n", top->interrupt_vector, shared_ptr->ao486.instr_counter);
|
| 287 |
|
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top->interrupt_do = 1;
|
| 288 |
|
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}
|
| 289 |
|
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else if(shared_ptr->interrupt_at_counter == 0) {
|
| 290 |
|
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printf("irq lower at %d\n", shared_ptr->ao486.instr_counter);
|
| 291 |
|
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top->interrupt_do = 0;
|
| 292 |
|
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}
|
| 293 |
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|
| 294 |
|
|
//----------------------------------------------------------------------
|
| 295 |
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|
| 296 |
|
|
//if(shared_ptr->ao486.instr_counter > 7728000) shared_ptr->dump_enabled = 0;
|
| 297 |
|
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//else if(cycle > 142400000 || shared_ptr->ao486.instr_counter > 7720000) shared_ptr->dump_enabled = 1;
|
| 298 |
|
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//else if(shared_ptr->ao486.instr_counter > 712000) shared_ptr->dump_enabled = 1;
|
| 299 |
|
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// shared_ptr->dump_enabled = 1;
|
| 300 |
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|
| 301 |
|
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top->clk = 0;
|
| 302 |
|
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top->eval();
|
| 303 |
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|
| 304 |
|
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cycle++;
|
| 305 |
|
|
if(shared_ptr->dump_enabled) tracer->dump(cycle);
|
| 306 |
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|
| 307 |
|
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top->clk = 1;
|
| 308 |
|
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top->eval();
|
| 309 |
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|
| 310 |
|
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cycle++;
|
| 311 |
|
|
if(shared_ptr->dump_enabled) tracer->dump(cycle);
|
| 312 |
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|
|
| 313 |
|
|
if((cycle % 10000) == 0) printf("half-cycle: %lld\n", cycle);
|
| 314 |
|
|
//12320000
|
| 315 |
|
|
|
| 316 |
|
|
tracer->flush();
|
| 317 |
|
|
//usleep(1);
|
| 318 |
|
|
}
|
| 319 |
|
|
delete top;
|
| 320 |
|
|
return 0;
|
| 321 |
|
|
}
|
| 322 |
|
|
|
| 323 |
|
|
/*
|
| 324 |
|
|
uint32 interrupt_vector;
|
| 325 |
|
|
uint64 interrupt_timestamp;
|
| 326 |
|
|
uint32 interrupt_valid;
|
| 327 |
|
|
|
| 328 |
|
|
----
|
| 329 |
|
|
|
| 330 |
|
|
VL_IN8(clk,0,0);
|
| 331 |
|
|
VL_IN8(rst_n,0,0);
|
| 332 |
|
|
|
| 333 |
|
|
VL_IN8(interrupt_do,0,0);
|
| 334 |
|
|
VL_IN8(interrupt_vector,7,0);
|
| 335 |
|
|
VL_OUT8(interrupt_done,0,0);
|
| 336 |
|
|
|
| 337 |
|
|
VL_OUT8(avalon_io_byteenable,3,0);
|
| 338 |
|
|
VL_OUT8(avalon_io_read,0,0);
|
| 339 |
|
|
VL_IN8(avalon_io_readdatavalid,0,0);
|
| 340 |
|
|
VL_OUT8(avalon_io_write,0,0);
|
| 341 |
|
|
VL_IN8(avalon_io_waitrequest,0,0);
|
| 342 |
|
|
VL_OUT16(avalon_io_address,15,0);
|
| 343 |
|
|
VL_IN(avalon_io_readdata,31,0);
|
| 344 |
|
|
VL_OUT(avalon_io_writedata,31,0);
|
| 345 |
|
|
|
| 346 |
|
|
VL_OUT8(sdram_byteenable,3,0);
|
| 347 |
|
|
VL_OUT8(sdram_read,0,0);
|
| 348 |
|
|
VL_OUT8(sdram_write,0,0);
|
| 349 |
|
|
VL_OUT8(sdram_burstcount,2,0);
|
| 350 |
|
|
VL_OUT(sdram_address,31,0);
|
| 351 |
|
|
VL_OUT(sdram_writedata,31,0);
|
| 352 |
|
|
VL_IN8(sdram_waitrequest,0,0);
|
| 353 |
|
|
VL_IN8(sdram_readdatavalid,0,0);
|
| 354 |
|
|
VL_IN(sdram_readdata,31,0);
|
| 355 |
|
|
|
| 356 |
|
|
VL_OUT8(vga_byteenable,3,0);
|
| 357 |
|
|
VL_OUT8(vga_read,0,0);
|
| 358 |
|
|
VL_OUT8(vga_write,0,0);
|
| 359 |
|
|
VL_IN8(vga_waitrequest,0,0);
|
| 360 |
|
|
VL_IN8(vga_readdatavalid,0,0);
|
| 361 |
|
|
VL_OUT8(vga_burstcount,2,0);
|
| 362 |
|
|
VL_OUT(vga_address,31,0);
|
| 363 |
|
|
VL_IN(vga_readdata,31,0);
|
| 364 |
|
|
VL_OUT(vga_writedata,31,0);
|
| 365 |
|
|
*/
|
