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/******************************************************************************
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* *
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* License Agreement *
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* *
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* Copyright (c) 2006 Altera Corporation, San Jose, California, USA. *
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* All rights reserved. *
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* *
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* Permission is hereby granted, free of charge, to any person obtaining a *
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* copy of this software and associated documentation files (the "Software"), *
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* to deal in the Software without restriction, including without limitation *
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* the rights to use, copy, modify, merge, publish, distribute, sublicense, *
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* and/or sell copies of the Software, and to permit persons to whom the *
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* Software is furnished to do so, subject to the following conditions: *
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* *
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* The above copyright notice and this permission notice shall be included in *
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* all copies or substantial portions of the Software. *
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* *
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR *
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, *
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE *
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER *
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING *
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER *
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* DEALINGS IN THE SOFTWARE. *
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* *
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* This agreement shall be governed in all respects by the laws of the State *
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* of California and by the laws of the United States of America. *
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* *
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******************************************************************************/
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#include "system.h"
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#include "nios2.h"
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/* Setup header files to work with assembler code. */
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#define ALT_ASM_SRC
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/* Debug logging facility */
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#include "sys/alt_log_printf.h"
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/*************************************************************************\
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| MACROS |
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\*************************************************************************/
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/*
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* The new build tools explicitly define macros when alt_load()
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* must be called. The define ALT_LOAD_EXPLICITLY_CONTROLLED tells us that
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* those macros are controlling if alt_load() needs to be called.
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*/
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#ifdef ALT_LOAD_EXPLICITLY_CONTROLLED
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/* Need to call alt_load() if any of these sections are being copied. */
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#if defined(ALT_LOAD_COPY_RODATA) || defined(ALT_LOAD_COPY_RWDATA) || defined(ALT_LOAD_COPY_EXCEPTIONS)
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#define CALL_ALT_LOAD
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#endif
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#else /* !ALT_LOAD_EXPLICITLY_CONTROLLED */
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/*
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* The legacy build tools use the following macros to detect when alt_load()
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* needs to be called.
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*/
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#define __ALT_LOAD_SECTIONS(res, text, rodata, exc) \
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((res##_BASE != rodata##_BASE) || \
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(res##_BASE != rwdata##_BASE) || \
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(res##_BASE != exc##_BASE))
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#define _ALT_LOAD_SECTIONS(res, text, rodata, exc) \
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__ALT_LOAD_SECTIONS(res, text, rodata, exc)
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#define ALT_LOAD_SECTIONS _ALT_LOAD_SECTIONS(ALT_RESET_DEVICE, \
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ALT_RODATA_DEVICE, \
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ALT_RWDATA_DEVICE, \
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ALT_EXCEPTIONS_DEVICE)
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/* Call alt_load() if there is no bootloader and ALT_LOAD_SECTIONS isn't 0. */
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#if defined(ALT_NO_BOOTLOADER) && ALT_LOAD_SECTIONS
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#define CALL_ALT_LOAD
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#endif
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#endif /* !ALT_LOAD_EXPLICITLY_CONTROLLED */
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/*
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* When the legacy build tools define a macro called ALT_NO_BOOTLOADER,
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* it indicates that initialization code is allowed at the reset address.
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* The new build tools define a macro called ALT_ALLOW_CODE_AT_RESET for
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* the same purpose.
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*/
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#ifdef ALT_NO_BOOTLOADER
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#define ALT_ALLOW_CODE_AT_RESET
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#endif
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/*************************************************************************\
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| EXTERNAL REFERENCES |
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\*************************************************************************/
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/*
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* The entry point for user code is either "main" in hosted mode, or
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* "alt_main" in standalone mode. These are explicitly referenced here,
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* to ensure they are built into the executable. This allows the user
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* to build them into libraries, rather than supplying them in object
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* files at link time.
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*/
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.globl main
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.globl alt_main
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/*
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* Create a reference to the software multiply/divide and trap handers,
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* so that if they are provided, they will appear in the executable.
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*/
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#ifndef ALT_NO_INSTRUCTION_EMULATION
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.globl alt_exception_muldiv
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#endif
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#ifdef ALT_TRAP_HANDLER
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.globl alt_exception_trap
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#endif
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/*
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* Linker defined symbols used to initialize bss.
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*/
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.globl __bss_start
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.globl __bss_end
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/*************************************************************************\
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| RESET SECTION (.entry) |
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\*************************************************************************/
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/*
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* This is the reset entry point for Nios II.
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*
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* At reset, only the cache line which contain the reset vector is
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* initialized by the hardware. The code within the first cache line
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* initializes the remainder of the instruction cache.
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*/
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.section .entry, "xa"
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.align 5
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/*
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* Explicitly allow the use of r1 (the assembler temporary register)
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* within this code. This register is normally reserved for the use of
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* the assembler.
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*/
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.set noat
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/*
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* Some tools want to know where the reset vector is.
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* Code isn't always provided at the reset vector but at least the
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* __reset label always contains the reset vector address because
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* it is defined at the start of the .entry section.
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*/
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.globl __reset
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.type __reset, @function
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__reset:
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/*
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* Initialize the instruction cache if present (i.e. size > 0) and
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* reset code is allowed unless optimizing for RTL simulation.
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* RTL simulations can ensure the instruction cache is already initialized
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* so skipping this loop speeds up RTL simulation.
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*/
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#if NIOS2_ICACHE_SIZE > 0 && defined(ALT_ALLOW_CODE_AT_RESET) && !defined(ALT_SIM_OPTIMIZE)
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/* Assume the instruction cache size is always a power of two. */
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#if NIOS2_ICACHE_SIZE > 0x8000
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movhi r2, %hi(NIOS2_ICACHE_SIZE)
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#else
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movui r2, NIOS2_ICACHE_SIZE
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#endif
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0:
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initi r2
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addi r2, r2, -NIOS2_ICACHE_LINE_SIZE
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bgt r2, zero, 0b
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1:
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/*
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* The following debug information tells the ISS not to run the loop above
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* but to perform its actions using faster internal code.
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*/
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.pushsection .debug_alt_sim_info
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.int 1, 1, 0b, 1b
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.popsection
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#endif /* Initialize Instruction Cache */
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/*
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* Jump to the _start entry point in the .text section if reset code
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* is allowed or if optimizing for RTL simulation.
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*/
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#if defined(ALT_ALLOW_CODE_AT_RESET) || defined(ALT_SIM_OPTIMIZE)
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/* Jump to the _start entry point in the .text section. */
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movhi r1, %hi(_start)
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ori r1, r1, %lo(_start)
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jmp r1
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.size __reset, . - __reset
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#endif /* Jump to _start */
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/*
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* When not using exit, provide an _exit symbol to prevent unresolved
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* references to _exit from the linker script.
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*/
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#ifdef ALT_NO_EXIT
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.globl _exit
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_exit:
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#endif
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/*************************************************************************\
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| TEXT SECTION (.text) |
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\*************************************************************************/
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/*
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* Start of the .text section, and also the code entry point when
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* the code is executed by a bootloader rather than directly from reset.
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*/
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.section .text
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.align 2
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.globl _start
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.type _start, @function
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_start:
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#if (NIOS2_NUM_OF_SHADOW_REG_SETS > 0)
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/*
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* Ensure that the current register set is 0 upon
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* entry to this code. Switch register set to 0 by
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* writing zero to SSTATUS register and executing an ERET instruction
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* to set STATUS.CRS to 0.
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*/
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/* Get the current register set number (STATUS.CRS). */
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rdctl r2, status
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andi r2, r2, NIOS2_STATUS_CRS_MSK
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/* Skip switching register set if STATUS.CRS is 0. */
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beq r2, zero, 0f
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/* Set SSTATUS to 0 to get to set SSTATUS.PRS to 0. */
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.set nobreak
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movui sstatus, 0
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.set break
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/* Switch to register set 0 and jump to label. */
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movhi ea, %hi(0f)
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ori ea, ea, %lo(0f)
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eret
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0:
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#endif /* NIOS2_NUM_OF_SHADOW_REG_SETS > 0 */
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/*
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* Initialize the data cache if present (i.e. size > 0).
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* Skip initialization if optimizing for RTL simulation and ECC isn't present.
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* RTL simulations can ensure the data cache tag RAM is already initialized
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* (but not the data RAM for ECC) so skipping this speeds up RTL simulation.
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*
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* When ECC is present, need to execute initd for each word address
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* to ensure ECC parity bits in data RAM get initialized.
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* Otherwise, only need to execute initd for each line address.
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*/
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#if NIOS2_DCACHE_SIZE > 0 && (!defined(ALT_SIM_OPTIMIZE) || defined(NIOS2_ECC_PRESENT))
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/* Assume the data cache size is always a power of two. */
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#if NIOS2_DCACHE_SIZE > 0x8000
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movhi r2, %hi(NIOS2_DCACHE_SIZE)
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#else
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movui r2, NIOS2_DCACHE_SIZE
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#endif
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0:
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initd 0(r2)
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#ifdef NIOS2_ECC_PRESENT
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addi r2, r2, -4
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#else
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addi r2, r2, -NIOS2_DCACHE_LINE_SIZE
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#endif
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bgt r2, zero, 0b
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1:
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281 |
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/*
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283 |
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* The following debug information tells the ISS not to run the loop above
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* but to perform its actions using faster internal code.
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*/
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.pushsection .debug_alt_sim_info
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.int 2, 1, 0b, 1b
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.popsection
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#endif /* Initialize Data Cache */
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290 |
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291 |
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/* Log that caches have been initialized. */
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ALT_LOG_PUTS(alt_log_msg_cache)
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293 |
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294 |
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/* Log that the stack pointer is about to be setup. */
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295 |
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ALT_LOG_PUTS(alt_log_msg_stackpointer)
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296 |
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297 |
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/*
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298 |
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* Now that the caches are initialized, set up the stack pointer and global pointer.
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299 |
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* The values provided by the linker are assumed to be correctly aligned.
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300 |
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*/
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301 |
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movhi sp, %hi(__alt_stack_pointer)
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ori sp, sp, %lo(__alt_stack_pointer)
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movhi gp, %hi(_gp)
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ori gp, gp, %lo(_gp)
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305 |
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306 |
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#ifdef NIOS2_ECC_PRESENT
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307 |
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/*
|
308 |
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* Initialize all general-purpose registers so that ECC can be enabled
|
309 |
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* later without accidentally triggering a spurious ECC error.
|
310 |
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*/
|
311 |
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movui r1, 0
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312 |
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movui r2, 0
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313 |
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movui r3, 0
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314 |
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movui r4, 0
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315 |
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movui r5, 0
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316 |
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movui r6, 0
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317 |
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movui r7, 0
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318 |
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movui r8, 0
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319 |
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movui r9, 0
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320 |
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movui r10, 0
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321 |
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movui r11, 0
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322 |
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movui r12, 0
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323 |
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movui r13, 0
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324 |
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movui r14, 0
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325 |
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movui r15, 0
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326 |
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movui r16, 0
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327 |
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movui r17, 0
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328 |
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movui r18, 0
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329 |
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movui r19, 0
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330 |
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movui r20, 0
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331 |
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movui r21, 0
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332 |
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movui r22, 0
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333 |
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movui r23, 0
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334 |
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/* Skip r24 (et) because only exception handler should write it. */
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335 |
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/* Skip r25 (bt) because only debugger should write it. */
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336 |
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/* Skip r26 (gp) because it is already been initialized. */
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337 |
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/* Skip r27 (sp) because it is already been initialized. */
|
338 |
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movui r28, 0 /* fp */
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339 |
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movui r29, 0 /* ea */
|
340 |
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.set nobreak
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341 |
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movui r30, 0 /* sstatus */
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342 |
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.set break
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343 |
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movui r31, 0 /* ra */
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344 |
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345 |
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#endif /* NIOS2_ECC_PRESENT */
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346 |
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|
347 |
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#if (NIOS2_NUM_OF_SHADOW_REG_SETS > 0)
|
348 |
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/*
|
349 |
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* Setup registers in shadow register sets
|
350 |
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* from 1 to NIOS2_NUM_OF_SHADOW_REG_SETS.
|
351 |
|
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*/
|
352 |
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|
353 |
|
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movui r2, 0 /* Contains value written into STATUS */
|
354 |
|
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movui r3, NIOS2_NUM_OF_SHADOW_REG_SETS /* counter */
|
355 |
|
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movhi r4, 1 /* Constant to increment STATUS.PRS */
|
356 |
|
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|
357 |
|
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.Linitialize_shadow_registers:
|
358 |
|
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/* Increment STATUS.PRS */
|
359 |
|
|
add r2, r2, r4
|
360 |
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wrctl status, r2
|
361 |
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|
362 |
|
|
/* Clear r0 in the shadow register set (not done by hardware) */
|
363 |
|
|
wrprs r0, r0
|
364 |
|
|
|
365 |
|
|
/* Write the GP in previous register set */
|
366 |
|
|
wrprs gp, gp
|
367 |
|
|
|
368 |
|
|
/*
|
369 |
|
|
* Only write the SP in previous register set
|
370 |
|
|
* if using the separate exception stack. For normal case (single stack),
|
371 |
|
|
* funnel code would read the SP from previous register set with a RDPRS.
|
372 |
|
|
*/
|
373 |
|
|
#ifdef ALT_INTERRUPT_STACK
|
374 |
|
|
movhi et, %hiadj(__alt_interrupt_stack_pointer)
|
375 |
|
|
addi et, et, %lo(__alt_interrupt_stack_pointer)
|
376 |
|
|
wrprs sp, et
|
377 |
|
|
#endif /* ALT_INTERRUPT_STACK */
|
378 |
|
|
|
379 |
|
|
#ifdef NIOS2_ECC_PRESENT
|
380 |
|
|
/*
|
381 |
|
|
* Initialize all general-purpose registers so that ECC can be enabled
|
382 |
|
|
* later without accidentally triggering a spurious ECC error.
|
383 |
|
|
*/
|
384 |
|
|
wrprs r1, r0
|
385 |
|
|
wrprs r2, r0
|
386 |
|
|
wrprs r3, r0
|
387 |
|
|
wrprs r4, r0
|
388 |
|
|
wrprs r5, r0
|
389 |
|
|
wrprs r6, r0
|
390 |
|
|
wrprs r7, r0
|
391 |
|
|
wrprs r8, r0
|
392 |
|
|
wrprs r9, r0
|
393 |
|
|
wrprs r10, r0
|
394 |
|
|
wrprs r11, r0
|
395 |
|
|
wrprs r12, r0
|
396 |
|
|
wrprs r13, r0
|
397 |
|
|
wrprs r14, r0
|
398 |
|
|
wrprs r15, r0
|
399 |
|
|
wrprs r16, r0
|
400 |
|
|
wrprs r17, r0
|
401 |
|
|
wrprs r18, r0
|
402 |
|
|
wrprs r19, r0
|
403 |
|
|
wrprs r20, r0
|
404 |
|
|
wrprs r21, r0
|
405 |
|
|
wrprs r22, r0
|
406 |
|
|
wrprs r23, r0
|
407 |
|
|
/* Skip r24 (et) because only exception handler should write it. */
|
408 |
|
|
/* Skip r25 (bt) because only debugger should write it. */
|
409 |
|
|
/* Skip r26 (gp) because it is already been initialized. */
|
410 |
|
|
/* Skip r27 (sp) because it was initialized above or will be by a rdprs if not above */
|
411 |
|
|
wrprs r28, r0 /* fp */
|
412 |
|
|
wrprs r29, r0 /* ea */
|
413 |
|
|
wrprs r30, r0 /* ba */
|
414 |
|
|
wrprs r31, r0 /* ra */
|
415 |
|
|
#endif /* NIOS2_ECC_PRESENT */
|
416 |
|
|
|
417 |
|
|
/* Decrement shadow register set counter */
|
418 |
|
|
addi r3, r3, -1
|
419 |
|
|
|
420 |
|
|
/* Done if index is 0. */
|
421 |
|
|
bne r3, zero, .Linitialize_shadow_registers
|
422 |
|
|
#endif /* (NIOS2_NUM_OF_SHADOW_REG_SETS > 0) */
|
423 |
|
|
|
424 |
|
|
/*
|
425 |
|
|
* Clear the BSS if not optimizing for RTL simulation.
|
426 |
|
|
*
|
427 |
|
|
* This uses the symbols: __bss_start and __bss_end, which are defined
|
428 |
|
|
* by the linker script. They mark the begining and the end of the bss
|
429 |
|
|
* region. The linker script guarantees that these values are word aligned.
|
430 |
|
|
*/
|
431 |
|
|
#ifndef ALT_SIM_OPTIMIZE
|
432 |
|
|
/* Log that the BSS is about to be cleared. */
|
433 |
|
|
ALT_LOG_PUTS(alt_log_msg_bss)
|
434 |
|
|
|
435 |
|
|
movhi r2, %hi(__bss_start)
|
436 |
|
|
ori r2, r2, %lo(__bss_start)
|
437 |
|
|
|
438 |
|
|
movhi r3, %hi(__bss_end)
|
439 |
|
|
ori r3, r3, %lo(__bss_end)
|
440 |
|
|
|
441 |
|
|
beq r2, r3, 1f
|
442 |
|
|
|
443 |
|
|
0:
|
444 |
|
|
stw zero, (r2)
|
445 |
|
|
addi r2, r2, 4
|
446 |
|
|
bltu r2, r3, 0b
|
447 |
|
|
|
448 |
|
|
1:
|
449 |
|
|
|
450 |
|
|
/*
|
451 |
|
|
* The following debug information tells the ISS not to run the loop above
|
452 |
|
|
* but to perform its actions using faster internal code.
|
453 |
|
|
*/
|
454 |
|
|
.pushsection .debug_alt_sim_info
|
455 |
|
|
.int 3, 1, 0b, 1b
|
456 |
|
|
.popsection
|
457 |
|
|
#endif /* ALT_SIM_OPTIMIZE */
|
458 |
|
|
|
459 |
|
|
/*
|
460 |
|
|
* Turn off the use of r1 (the assembler temporary register)
|
461 |
|
|
* so that call instructions can be safely relaxed across a
|
462 |
|
|
* 256MB boundary if needed
|
463 |
|
|
*/
|
464 |
|
|
.set at
|
465 |
|
|
|
466 |
|
|
/*
|
467 |
|
|
* The alt_load() facility is normally used when there is no bootloader.
|
468 |
|
|
* It copies some sections into RAM so it acts like a mini-bootloader.
|
469 |
|
|
*/
|
470 |
|
|
#ifdef CALL_ALT_LOAD
|
471 |
|
|
|
472 |
|
|
#ifdef ALT_STACK_CHECK
|
473 |
|
|
/*
|
474 |
|
|
* If the user has selected stack checking then we need to set up a safe
|
475 |
|
|
* value in the stack limit register so that the relocation functions
|
476 |
|
|
* don't think the stack has overflowed (the contents of the rwdata
|
477 |
|
|
* section aren't defined until alt_load() has been called).
|
478 |
|
|
*/
|
479 |
|
|
mov et, zero
|
480 |
|
|
#endif
|
481 |
|
|
|
482 |
|
|
call alt_load
|
483 |
|
|
|
484 |
|
|
#endif /* CALL_ALT_LOAD */
|
485 |
|
|
|
486 |
|
|
#ifdef ALT_STACK_CHECK
|
487 |
|
|
/*
|
488 |
|
|
* Set up the stack limit (if required). The linker has set up the
|
489 |
|
|
* copy of the variable which is in memory.
|
490 |
|
|
*/
|
491 |
|
|
|
492 |
|
|
ldw et, %gprel(alt_stack_limit_value)(gp)
|
493 |
|
|
#endif
|
494 |
|
|
|
495 |
|
|
/* Log that alt_main is about to be called. */
|
496 |
|
|
ALT_LOG_PUTS(alt_log_msg_alt_main)
|
497 |
|
|
|
498 |
|
|
/* Call the C entry point. It should never return. */
|
499 |
|
|
call alt_main
|
500 |
|
|
|
501 |
|
|
/* Wait in infinite loop in case alt_main does return. */
|
502 |
|
|
alt_after_alt_main:
|
503 |
|
|
br alt_after_alt_main
|
504 |
|
|
|
505 |
|
|
.size _start, . - _start
|
506 |
|
|
|
507 |
|
|
/*
|
508 |
|
|
* Add information about the stack base if stack overflow checking is enabled.
|
509 |
|
|
*/
|
510 |
|
|
#ifdef ALT_STACK_CHECK
|
511 |
|
|
.globl alt_stack_limit_value
|
512 |
|
|
.section .sdata,"aws",@progbits
|
513 |
|
|
.align 2
|
514 |
|
|
.type alt_stack_limit_value, @object
|
515 |
|
|
.size alt_stack_limit_value, 4
|
516 |
|
|
alt_stack_limit_value:
|
517 |
|
|
.long __alt_stack_limit
|
518 |
|
|
#endif
|