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[/] [ao486/] [trunk/] [syn/] [components/] [sound/] [soc.html] - Blame information for rev 2

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1 2 alfik 
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
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<html xmlns="http://www.w3.org/1999/xhtml">
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 <head>
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  <title>datasheet for soc</title>
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 </head>
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 <body>
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  <table class="topTitle">
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   <tr>
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    <td class="l">soc</td>
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    <td class="r">
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     <br/>
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     <br/>
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    </td>
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   </tr>
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  </table>
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  <table class="blueBar">
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   <tr>
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    <td class="l">2013.10.29.11:17:35</td>
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    <td class="r">Datasheet</td>
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   </tr>
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  </table>
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  <div style="width:100% ;  height:10px"> </div>
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  <div class="label">Overview</div>
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  <div class="greydiv">
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   <div style="display:inline-block ; text-align:left">
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    <table class="connectionboxes">
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     <tr>
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      <td class="lefthandwire">&#160;&#160;clk_sys&#160;</td>
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      <td class="main" rowspan="4">soc</td>
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     </tr>
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     <tr style="height:6px">
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      <td></td>
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     </tr>
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     <tr>
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      <td class="lefthandwire">&#160;&#160;clk_12&#160;</td>
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     </tr>
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     <tr style="height:6px">
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      <td></td>
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     </tr>
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    </table>
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   </div><span style="display:inline-block ; width:28px"> </span>
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   <div style="display:inline-block ; text-align:left"><span>Processor
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     <br/>&#160;&#160;
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     <a href="#module_nios2_qsys_0"><b>nios2_qsys_0</b>
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     </a> Nios II 13.0
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     <br/>All Components
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     <br/>&#160;&#160;
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     <a href="#module_onchip_memory2_0"><b>onchip_memory2_0</b>
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     </a> altera_avalon_onchip_memory2 13.0.1.99.2
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     <br/>&#160;&#160;
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     <a href="#module_nios2_qsys_0"><b>nios2_qsys_0</b>
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     </a> altera_nios2_qsys 13.0
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     <br/>&#160;&#160;
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     <a href="#module_jtag_uart_0"><b>jtag_uart_0</b>
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     </a> altera_avalon_jtag_uart 13.0.1.99.2
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     <br/>&#160;&#160;
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     <a href="#module_sound_0"><b>sound_0</b>
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     </a> sound 1.0</span>
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   </div>
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  </div>
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  <div style="width:100% ;  height:10px"> </div>
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  <div class="label">Memory Map</div>
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  <table class="mmap">
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   <tr>
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    <td class="empty" rowspan="2"></td>
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    <td class="mastermodule" colspan="2">
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     <a href="#module_nios2_qsys_0"><b>nios2_qsys_0</b>
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     </a>
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    </td>
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   </tr>
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   <tr>
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    <td class="masterl">&#160;data_master</td>
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    <td class="masterr">&#160;instruction_master</td>
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   </tr>
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   <tr>
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    <td class="slavemodule">&#160;
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     <a href="#module_onchip_memory2_0"><b>onchip_memory2_0</b>
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     </a>
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    </td>
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    <td class="empty"></td>
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    <td class="empty"></td>
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   </tr>
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   <tr>
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    <td class="slaveb">s1&#160;</td>
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    <td class="addr"><span style="color:#989898">0x</span>00008000</td>
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    <td class="addr"><span style="color:#989898">0x</span>00008000</td>
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   </tr>
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   <tr>
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    <td class="slavemodule">&#160;
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     <a href="#module_nios2_qsys_0"><b>nios2_qsys_0</b>
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     </a>
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    </td>
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    <td class="empty"></td>
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    <td class="empty"></td>
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   </tr>
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   <tr>
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    <td class="slaveb">jtag_debug_module&#160;</td>
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    <td class="addr"><span style="color:#989898">0x</span>00011000</td>
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    <td class="addr"><span style="color:#989898">0x</span>00011000</td>
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   </tr>
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   <tr>
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    <td class="slavemodule">&#160;
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     <a href="#module_jtag_uart_0"><b>jtag_uart_0</b>
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     </a>
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    </td>
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    <td class="empty"></td>
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    <td class="empty"></td>
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   </tr>
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   <tr>
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    <td class="slaveb">avalon_jtag_slave&#160;</td>
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    <td class="addr"><span style="color:#989898">0x</span>00011810</td>
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    <td class="empty"></td>
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   </tr>
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   <tr>
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    <td class="slavemodule">&#160;
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     <a href="#module_sound_0"><b>sound_0</b>
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     </a>
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    </td>
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    <td class="empty"></td>
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    <td class="empty"></td>
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   </tr>
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   <tr>
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    <td class="slavem">io&#160;</td>
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    <td class="addr"><span style="color:#989898">0x</span>00011800</td>
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    <td class="empty"></td>
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   </tr>
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   <tr>
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    <td class="slavem">fm&#160;</td>
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    <td class="addr"><span style="color:#989898">0x</span>00011818</td>
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    <td class="empty"></td>
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   </tr>
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   <tr>
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    <td class="slavem">mgmt&#160;</td>
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    <td class="addr"><span style="color:#989898">0x</span>00010800</td>
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    <td class="empty"></td>
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   </tr>
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  </table>
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  <a name="module_clk_sys"> </a>
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  <div>
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   <hr/>
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   <h2>clk_sys</h2>clock_source v13.0
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   <br/>
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   <br/>
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   <br/>
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   <table class="flowbox">
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    <tr>
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     <td class="parametersbox">
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      <h2>Parameters</h2>
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      <table>
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       <tr>
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        <td class="parametername">clockFrequency</td>
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        <td class="parametervalue">50000000</td>
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       </tr>
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       <tr>
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        <td class="parametername">clockFrequencyKnown</td>
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        <td class="parametervalue">true</td>
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       </tr>
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       <tr>
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        <td class="parametername">inputClockFrequency</td>
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        <td class="parametervalue">0</td>
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       </tr>
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       <tr>
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        <td class="parametername">resetSynchronousEdges</td>
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        <td class="parametervalue">NONE</td>
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       </tr>
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       <tr>
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        <td class="parametername">deviceFamily</td>
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        <td class="parametervalue">UNKNOWN</td>
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       </tr>
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       <tr>
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        <td class="parametername">generateLegacySim</td>
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        <td class="parametervalue">false</td>
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       </tr>
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      </table>
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     </td>
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    </tr>
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   </table>&#160;&#160;
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   <table class="flowbox">
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    <tr>
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     <td class="parametersbox">
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      <h2>Software Assignments</h2>(none)</td>
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    </tr>
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   </table>
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  </div>
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  <a name="module_onchip_memory2_0"> </a>
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  <div>
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   <hr/>
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   <h2>onchip_memory2_0</h2>altera_avalon_onchip_memory2 v13.0.1.99.2
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   <br/>
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   <div class="greydiv">
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    <table class="connectionboxes">
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     <tr>
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      <td class="neighbor" rowspan="4">
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       <a href="#module_clk_sys">clk_sys</a>
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      </td>
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      <td class="from">clk&#160;&#160;</td>
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      <td class="main" rowspan="9">onchip_memory2_0</td>
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     </tr>
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     <tr>
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      <td class="to">&#160;&#160;clk1</td>
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     </tr>
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     <tr>
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      <td class="from">clk_reset&#160;&#160;</td>
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     </tr>
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     <tr>
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      <td class="to">&#160;&#160;reset1</td>
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     </tr>
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     <tr style="height:6px">
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      <td></td>
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     </tr>
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     <tr>
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      <td class="neighbor" rowspan="4">
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       <a href="#module_nios2_qsys_0">nios2_qsys_0</a>
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      </td>
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      <td class="from">data_master&#160;&#160;</td>
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     </tr>
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     <tr>
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      <td class="to">&#160;&#160;s1</td>
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     </tr>
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     <tr>
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      <td class="from">instruction_master&#160;&#160;</td>
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     </tr>
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     <tr>
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      <td class="to">&#160;&#160;s1</td>
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     </tr>
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    </table>
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   </div>
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   <br/>
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   <br/>
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   <table class="flowbox">
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    <tr>
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     <td class="parametersbox">
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      <h2>Parameters</h2>
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      <table>
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       <tr>
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        <td class="parametername">allowInSystemMemoryContentEditor</td>
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        <td class="parametervalue">false</td>
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       </tr>
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       <tr>
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        <td class="parametername">blockType</td>
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        <td class="parametervalue">AUTO</td>
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       </tr>
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       <tr>
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        <td class="parametername">dataWidth</td>
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        <td class="parametervalue">32</td>
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       </tr>
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       <tr>
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        <td class="parametername">dualPort</td>
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        <td class="parametervalue">false</td>
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       </tr>
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       <tr>
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        <td class="parametername">initMemContent</td>
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        <td class="parametervalue">true</td>
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       </tr>
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       <tr>
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        <td class="parametername">initializationFileName</td>
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        <td class="parametervalue">onchip_mem.hex</td>
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       </tr>
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       <tr>
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        <td class="parametername">instanceID</td>
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        <td class="parametervalue">NONE</td>
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       </tr>
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       <tr>
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        <td class="parametername">memorySize</td>
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        <td class="parametervalue">32768</td>
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       </tr>
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       <tr>
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        <td class="parametername">readDuringWriteMode</td>
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        <td class="parametervalue">DONT_CARE</td>
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       </tr>
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       <tr>
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        <td class="parametername">simAllowMRAMContentsFile</td>
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        <td class="parametervalue">false</td>
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       </tr>
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       <tr>
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        <td class="parametername">simMemInitOnlyFilename</td>
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        <td class="parametervalue">0</td>
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       </tr>
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       <tr>
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        <td class="parametername">singleClockOperation</td>
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        <td class="parametervalue">false</td>
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       </tr>
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       <tr>
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        <td class="parametername">slave1Latency</td>
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        <td class="parametervalue">1</td>
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       </tr>
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       <tr>
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        <td class="parametername">slave2Latency</td>
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        <td class="parametervalue">1</td>
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       </tr>
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       <tr>
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        <td class="parametername">useNonDefaultInitFile</td>
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        <td class="parametervalue">false</td>
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       </tr>
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       <tr>
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        <td class="parametername">useShallowMemBlocks</td>
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        <td class="parametervalue">false</td>
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       </tr>
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       <tr>
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        <td class="parametername">writable</td>
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        <td class="parametervalue">true</td>
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       </tr>
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       <tr>
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        <td class="parametername">autoInitializationFileName</td>
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        <td class="parametervalue">soc_onchip_memory2_0</td>
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       </tr>
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       <tr>
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        <td class="parametername">deviceFamily</td>
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        <td class="parametervalue">CYCLONEIVE</td>
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       </tr>
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       <tr>
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        <td class="parametername">deviceFeatures</td>
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        <td class="parametervalue">ADDRESS_STALL 1 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 1 FITTER_USE_FALLING_EDGE_DELAY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 1 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 1 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_EARLY_TIMING_ESTIMATE_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 1 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 0 HAS_IBISO_WRITER_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_INTERFACE_PLANNER_SUPPORT 0 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LIMITED_TCL_FITTER_SUPPORT 0 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 1 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 1 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_HARDCOPY_FAMILY 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_SUPPORT 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1</td>
366 
       </tr>
367 
       <tr>
368 
        <td class="parametername">derived_set_addr_width</td>
369 
        <td class="parametervalue">13</td>
370 
       </tr>
371 
       <tr>
372 
        <td class="parametername">derived_gui_ram_block_type</td>
373 
        <td class="parametervalue">Automatic</td>
374 
       </tr>
375 
       <tr>
376 
        <td class="parametername">derived_is_hardcopy</td>
377 
        <td class="parametervalue">false</td>
378 
       </tr>
379 
       <tr>
380 
        <td class="parametername">derived_init_file_name</td>
381 
        <td class="parametervalue">soc_onchip_memory2_0.hex</td>
382 
       </tr>
383 
       <tr>
384 
        <td class="parametername">generateLegacySim</td>
385 
        <td class="parametervalue">false</td>
386 
       </tr>
387 
      </table>
388 
     </td>
389 
    </tr>
390 
   </table>&#160;&#160;
391 
   <table class="flowbox">
392 
    <tr>
393 
     <td class="parametersbox">
394 
      <h2>Software Assignments</h2>
395 
      <table>
396 
       <tr>
397 
        <td class="parametername">ALLOW_IN_SYSTEM_MEMORY_CONTENT_EDITOR</td>
398 
        <td class="parametervalue">0</td>
399 
       </tr>
400 
       <tr>
401 
        <td class="parametername">ALLOW_MRAM_SIM_CONTENTS_ONLY_FILE</td>
402 
        <td class="parametervalue">0</td>
403 
       </tr>
404 
       <tr>
405 
        <td class="parametername">CONTENTS_INFO</td>
406 
        <td class="parametervalue">""</td>
407 
       </tr>
408 
       <tr>
409 
        <td class="parametername">DUAL_PORT</td>
410 
        <td class="parametervalue">0</td>
411 
       </tr>
412 
       <tr>
413 
        <td class="parametername">GUI_RAM_BLOCK_TYPE</td>
414 
        <td class="parametervalue">AUTO</td>
415 
       </tr>
416 
       <tr>
417 
        <td class="parametername">INIT_CONTENTS_FILE</td>
418 
        <td class="parametervalue">soc_onchip_memory2_0</td>
419 
       </tr>
420 
       <tr>
421 
        <td class="parametername">INIT_MEM_CONTENT</td>
422 
        <td class="parametervalue">1</td>
423 
       </tr>
424 
       <tr>
425 
        <td class="parametername">INSTANCE_ID</td>
426 
        <td class="parametervalue">NONE</td>
427 
       </tr>
428 
       <tr>
429 
        <td class="parametername">NON_DEFAULT_INIT_FILE_ENABLED</td>
430 
        <td class="parametervalue">0</td>
431 
       </tr>
432 
       <tr>
433 
        <td class="parametername">RAM_BLOCK_TYPE</td>
434 
        <td class="parametervalue">AUTO</td>
435 
       </tr>
436 
       <tr>
437 
        <td class="parametername">READ_DURING_WRITE_MODE</td>
438 
        <td class="parametervalue">DONT_CARE</td>
439 
       </tr>
440 
       <tr>
441 
        <td class="parametername">SINGLE_CLOCK_OP</td>
442 
        <td class="parametervalue">0</td>
443 
       </tr>
444 
       <tr>
445 
        <td class="parametername">SIZE_MULTIPLE</td>
446 
        <td class="parametervalue">1</td>
447 
       </tr>
448 
       <tr>
449 
        <td class="parametername">SIZE_VALUE</td>
450 
        <td class="parametervalue">32768</td>
451 
       </tr>
452 
       <tr>
453 
        <td class="parametername">WRITABLE</td>
454 
        <td class="parametervalue">1</td>
455 
       </tr>
456 
      </table>
457 
     </td>
458 
    </tr>
459 
   </table>
460 
  </div>
461 
  <a name="module_nios2_qsys_0"> </a>
462 
  <div>
463 
   <hr/>
464 
   <h2>nios2_qsys_0</h2>altera_nios2_qsys v13.0
465 
   <br/>
466 
   <div class="greydiv">
467 
    <table class="connectionboxes">
468 
     <tr>
469 
      <td class="neighbor" rowspan="4">
470 
       <a href="#module_clk_sys">clk_sys</a>
471 
      </td>
472 
      <td class="from">clk&#160;&#160;</td>
473 
      <td class="main" rowspan="22">nios2_qsys_0</td>
474 
     </tr>
475 
     <tr>
476 
      <td class="to">&#160;&#160;clk</td>
477 
     </tr>
478 
     <tr>
479 
      <td class="from">clk_reset&#160;&#160;</td>
480 
     </tr>
481 
     <tr>
482 
      <td class="to">&#160;&#160;reset_n</td>
483 
     </tr>
484 
     <tr>
485 
      <td></td>
486 
      <td></td>
487 
      <td class="from">data_master&#160;&#160;</td>
488 
      <td class="neighbor" rowspan="4">
489 
       <a href="#module_onchip_memory2_0">onchip_memory2_0</a>
490 
      </td>
491 
     </tr>
492 
     <tr>
493 
      <td></td>
494 
      <td></td>
495 
      <td class="to">&#160;&#160;s1</td>
496 
     </tr>
497 
     <tr>
498 
      <td></td>
499 
      <td></td>
500 
      <td class="from">instruction_master&#160;&#160;</td>
501 
     </tr>
502 
     <tr>
503 
      <td></td>
504 
      <td></td>
505 
      <td class="to">&#160;&#160;s1</td>
506 
     </tr>
507 
     <tr style="height:6px">
508 
      <td></td>
509 
     </tr>
510 
     <tr>
511 
      <td></td>
512 
      <td></td>
513 
      <td class="from">data_master&#160;&#160;</td>
514 
      <td class="neighbor" rowspan="4">
515 
       <a href="#module_jtag_uart_0">jtag_uart_0</a>
516 
      </td>
517 
     </tr>
518 
     <tr>
519 
      <td></td>
520 
      <td></td>
521 
      <td class="to">&#160;&#160;avalon_jtag_slave</td>
522 
     </tr>
523 
     <tr>
524 
      <td></td>
525 
      <td></td>
526 
      <td class="from">d_irq&#160;&#160;</td>
527 
     </tr>
528 
     <tr>
529 
      <td></td>
530 
      <td></td>
531 
      <td class="to">&#160;&#160;irq</td>
532 
     </tr>
533 
     <tr style="height:6px">
534 
      <td></td>
535 
     </tr>
536 
     <tr>
537 
      <td></td>
538 
      <td></td>
539 
      <td class="from">data_master&#160;&#160;</td>
540 
      <td class="neighbor" rowspan="8">
541 
       <a href="#module_sound_0">sound_0</a>
542 
      </td>
543 
     </tr>
544 
     <tr>
545 
      <td></td>
546 
      <td></td>
547 
      <td class="to">&#160;&#160;io</td>
548 
     </tr>
549 
     <tr>
550 
      <td></td>
551 
      <td></td>
552 
      <td class="from">data_master&#160;&#160;</td>
553 
     </tr>
554 
     <tr>
555 
      <td></td>
556 
      <td></td>
557 
      <td class="to">&#160;&#160;fm</td>
558 
     </tr>
559 
     <tr>
560 
      <td></td>
561 
      <td></td>
562 
      <td class="from">data_master&#160;&#160;</td>
563 
     </tr>
564 
     <tr>
565 
      <td></td>
566 
      <td></td>
567 
      <td class="to">&#160;&#160;mgmt</td>
568 
     </tr>
569 
     <tr>
570 
      <td></td>
571 
      <td></td>
572 
      <td class="from">d_irq&#160;&#160;</td>
573 
     </tr>
574 
     <tr>
575 
      <td></td>
576 
      <td></td>
577 
      <td class="to">&#160;&#160;interrupt_sender</td>
578 
     </tr>
579 
    </table>
580 
   </div>
581 
   <br/>
582 
   <br/>
583 
   <table class="flowbox">
584 
    <tr>
585 
     <td class="parametersbox">
586 
      <h2>Parameters</h2>
587 
      <table>
588 
       <tr>
589 
        <td class="parametername">setting_showUnpublishedSettings</td>
590 
        <td class="parametervalue">false</td>
591 
       </tr>
592 
       <tr>
593 
        <td class="parametername">setting_showInternalSettings</td>
594 
        <td class="parametervalue">false</td>
595 
       </tr>
596 
       <tr>
597 
        <td class="parametername">setting_preciseSlaveAccessErrorException</td>
598 
        <td class="parametervalue">false</td>
599 
       </tr>
600 
       <tr>
601 
        <td class="parametername">setting_preciseIllegalMemAccessException</td>
602 
        <td class="parametervalue">false</td>
603 
       </tr>
604 
       <tr>
605 
        <td class="parametername">setting_preciseDivisionErrorException</td>
606 
        <td class="parametervalue">false</td>
607 
       </tr>
608 
       <tr>
609 
        <td class="parametername">setting_performanceCounter</td>
610 
        <td class="parametervalue">false</td>
611 
       </tr>
612 
       <tr>
613 
        <td class="parametername">setting_illegalMemAccessDetection</td>
614 
        <td class="parametervalue">false</td>
615 
       </tr>
616 
       <tr>
617 
        <td class="parametername">setting_illegalInstructionsTrap</td>
618 
        <td class="parametervalue">false</td>
619 
       </tr>
620 
       <tr>
621 
        <td class="parametername">setting_fullWaveformSignals</td>
622 
        <td class="parametervalue">false</td>
623 
       </tr>
624 
       <tr>
625 
        <td class="parametername">setting_extraExceptionInfo</td>
626 
        <td class="parametervalue">false</td>
627 
       </tr>
628 
       <tr>
629 
        <td class="parametername">setting_exportPCB</td>
630 
        <td class="parametervalue">false</td>
631 
       </tr>
632 
       <tr>
633 
        <td class="parametername">setting_debugSimGen</td>
634 
        <td class="parametervalue">false</td>
635 
       </tr>
636 
       <tr>
637 
        <td class="parametername">setting_clearXBitsLDNonBypass</td>
638 
        <td class="parametervalue">true</td>
639 
       </tr>
640 
       <tr>
641 
        <td class="parametername">setting_bit31BypassDCache</td>
642 
        <td class="parametervalue">true</td>
643 
       </tr>
644 
       <tr>
645 
        <td class="parametername">setting_bigEndian</td>
646 
        <td class="parametervalue">false</td>
647 
       </tr>
648 
       <tr>
649 
        <td class="parametername">setting_export_large_RAMs</td>
650 
        <td class="parametervalue">false</td>
651 
       </tr>
652 
       <tr>
653 
        <td class="parametername">setting_asic_enabled</td>
654 
        <td class="parametervalue">false</td>
655 
       </tr>
656 
       <tr>
657 
        <td class="parametername">setting_asic_synopsys_translate_on_off</td>
658 
        <td class="parametervalue">false</td>
659 
       </tr>
660 
       <tr>
661 
        <td class="parametername">setting_oci_export_jtag_signals</td>
662 
        <td class="parametervalue">false</td>
663 
       </tr>
664 
       <tr>
665 
        <td class="parametername">setting_bhtIndexPcOnly</td>
666 
        <td class="parametervalue">false</td>
667 
       </tr>
668 
       <tr>
669 
        <td class="parametername">setting_avalonDebugPortPresent</td>
670 
        <td class="parametervalue">false</td>
671 
       </tr>
672 
       <tr>
673 
        <td class="parametername">setting_alwaysEncrypt</td>
674 
        <td class="parametervalue">true</td>
675 
       </tr>
676 
       <tr>
677 
        <td class="parametername">setting_allowFullAddressRange</td>
678 
        <td class="parametervalue">false</td>
679 
       </tr>
680 
       <tr>
681 
        <td class="parametername">setting_activateTrace</td>
682 
        <td class="parametervalue">true</td>
683 
       </tr>
684 
       <tr>
685 
        <td class="parametername">setting_activateTestEndChecker</td>
686 
        <td class="parametervalue">false</td>
687 
       </tr>
688 
       <tr>
689 
        <td class="parametername">setting_activateMonitors</td>
690 
        <td class="parametervalue">true</td>
691 
       </tr>
692 
       <tr>
693 
        <td class="parametername">setting_activateModelChecker</td>
694 
        <td class="parametervalue">false</td>
695 
       </tr>
696 
       <tr>
697 
        <td class="parametername">setting_HDLSimCachesCleared</td>
698 
        <td class="parametervalue">true</td>
699 
       </tr>
700 
       <tr>
701 
        <td class="parametername">setting_HBreakTest</td>
702 
        <td class="parametervalue">false</td>
703 
       </tr>
704 
       <tr>
705 
        <td class="parametername">muldiv_divider</td>
706 
        <td class="parametervalue">false</td>
707 
       </tr>
708 
       <tr>
709 
        <td class="parametername">mpu_useLimit</td>
710 
        <td class="parametervalue">false</td>
711 
       </tr>
712 
       <tr>
713 
        <td class="parametername">mpu_enabled</td>
714 
        <td class="parametervalue">false</td>
715 
       </tr>
716 
       <tr>
717 
        <td class="parametername">mmu_enabled</td>
718 
        <td class="parametervalue">false</td>
719 
       </tr>
720 
       <tr>
721 
        <td class="parametername">mmu_autoAssignTlbPtrSz</td>
722 
        <td class="parametervalue">true</td>
723 
       </tr>
724 
       <tr>
725 
        <td class="parametername">manuallyAssignCpuID</td>
726 
        <td class="parametervalue">true</td>
727 
       </tr>
728 
       <tr>
729 
        <td class="parametername">debug_triggerArming</td>
730 
        <td class="parametervalue">true</td>
731 
       </tr>
732 
       <tr>
733 
        <td class="parametername">debug_embeddedPLL</td>
734 
        <td class="parametervalue">true</td>
735 
       </tr>
736 
       <tr>
737 
        <td class="parametername">debug_debugReqSignals</td>
738 
        <td class="parametervalue">false</td>
739 
       </tr>
740 
       <tr>
741 
        <td class="parametername">debug_assignJtagInstanceID</td>
742 
        <td class="parametervalue">false</td>
743 
       </tr>
744 
       <tr>
745 
        <td class="parametername">dcache_omitDataMaster</td>
746 
        <td class="parametervalue">false</td>
747 
       </tr>
748 
       <tr>
749 
        <td class="parametername">cpuReset</td>
750 
        <td class="parametervalue">false</td>
751 
       </tr>
752 
       <tr>
753 
        <td class="parametername">is_hardcopy_compatible</td>
754 
        <td class="parametervalue">false</td>
755 
       </tr>
756 
       <tr>
757 
        <td class="parametername">setting_shadowRegisterSets</td>
758 
        <td class="parametervalue">0</td>
759 
       </tr>
760 
       <tr>
761 
        <td class="parametername">mpu_numOfInstRegion</td>
762 
        <td class="parametervalue">8</td>
763 
       </tr>
764 
       <tr>
765 
        <td class="parametername">mpu_numOfDataRegion</td>
766 
        <td class="parametervalue">8</td>
767 
       </tr>
768 
       <tr>
769 
        <td class="parametername">mmu_TLBMissExcOffset</td>
770 
        <td class="parametervalue">0</td>
771 
       </tr>
772 
       <tr>
773 
        <td class="parametername">debug_jtagInstanceID</td>
774 
        <td class="parametervalue">0</td>
775 
       </tr>
776 
       <tr>
777 
        <td class="parametername">resetOffset</td>
778 
        <td class="parametervalue">0</td>
779 
       </tr>
780 
       <tr>
781 
        <td class="parametername">exceptionOffset</td>
782 
        <td class="parametervalue">32</td>
783 
       </tr>
784 
       <tr>
785 
        <td class="parametername">cpuID</td>
786 
        <td class="parametervalue">0</td>
787 
       </tr>
788 
       <tr>
789 
        <td class="parametername">cpuID_stored</td>
790 
        <td class="parametervalue">0</td>
791 
       </tr>
792 
       <tr>
793 
        <td class="parametername">breakOffset</td>
794 
        <td class="parametervalue">32</td>
795 
       </tr>
796 
       <tr>
797 
        <td class="parametername">userDefinedSettings</td>
798 
        <td class="parametervalue"></td>
799 
       </tr>
800 
       <tr>
801 
        <td class="parametername">resetSlave</td>
802 
        <td class="parametervalue">onchip_memory2_0.s1</td>
803 
       </tr>
804 
       <tr>
805 
        <td class="parametername">mmu_TLBMissExcSlave</td>
806 
        <td class="parametervalue">None</td>
807 
       </tr>
808 
       <tr>
809 
        <td class="parametername">exceptionSlave</td>
810 
        <td class="parametervalue">onchip_memory2_0.s1</td>
811 
       </tr>
812 
       <tr>
813 
        <td class="parametername">breakSlave</td>
814 
        <td class="parametervalue">nios2_qsys_0.jtag_debug_module</td>
815 
       </tr>
816 
       <tr>
817 
        <td class="parametername">setting_perfCounterWidth</td>
818 
        <td class="parametervalue">32</td>
819 
       </tr>
820 
       <tr>
821 
        <td class="parametername">setting_interruptControllerType</td>
822 
        <td class="parametervalue">Internal</td>
823 
       </tr>
824 
       <tr>
825 
        <td class="parametername">setting_branchPredictionType</td>
826 
        <td class="parametervalue">Automatic</td>
827 
       </tr>
828 
       <tr>
829 
        <td class="parametername">setting_bhtPtrSz</td>
830 
        <td class="parametervalue">8</td>
831 
       </tr>
832 
       <tr>
833 
        <td class="parametername">muldiv_multiplierType</td>
834 
        <td class="parametervalue">EmbeddedMulFast</td>
835 
       </tr>
836 
       <tr>
837 
        <td class="parametername">mpu_minInstRegionSize</td>
838 
        <td class="parametervalue">12</td>
839 
       </tr>
840 
       <tr>
841 
        <td class="parametername">mpu_minDataRegionSize</td>
842 
        <td class="parametervalue">12</td>
843 
       </tr>
844 
       <tr>
845 
        <td class="parametername">mmu_uitlbNumEntries</td>
846 
        <td class="parametervalue">4</td>
847 
       </tr>
848 
       <tr>
849 
        <td class="parametername">mmu_udtlbNumEntries</td>
850 
        <td class="parametervalue">6</td>
851 
       </tr>
852 
       <tr>
853 
        <td class="parametername">mmu_tlbPtrSz</td>
854 
        <td class="parametervalue">7</td>
855 
       </tr>
856 
       <tr>
857 
        <td class="parametername">mmu_tlbNumWays</td>
858 
        <td class="parametervalue">16</td>
859 
       </tr>
860 
       <tr>
861 
        <td class="parametername">mmu_processIDNumBits</td>
862 
        <td class="parametervalue">8</td>
863 
       </tr>
864 
       <tr>
865 
        <td class="parametername">impl</td>
866 
        <td class="parametervalue">Tiny</td>
867 
       </tr>
868 
       <tr>
869 
        <td class="parametername">icache_size</td>
870 
        <td class="parametervalue">4096</td>
871 
       </tr>
872 
       <tr>
873 
        <td class="parametername">icache_tagramBlockType</td>
874 
        <td class="parametervalue">Automatic</td>
875 
       </tr>
876 
       <tr>
877 
        <td class="parametername">icache_ramBlockType</td>
878 
        <td class="parametervalue">Automatic</td>
879 
       </tr>
880 
       <tr>
881 
        <td class="parametername">icache_numTCIM</td>
882 
        <td class="parametervalue">0</td>
883 
       </tr>
884 
       <tr>
885 
        <td class="parametername">icache_burstType</td>
886 
        <td class="parametervalue">None</td>
887 
       </tr>
888 
       <tr>
889 
        <td class="parametername">dcache_bursts</td>
890 
        <td class="parametervalue">false</td>
891 
       </tr>
892 
       <tr>
893 
        <td class="parametername">dcache_victim_buf_impl</td>
894 
        <td class="parametervalue">ram</td>
895 
       </tr>
896 
       <tr>
897 
        <td class="parametername">debug_level</td>
898 
        <td class="parametervalue">Level1</td>
899 
       </tr>
900 
       <tr>
901 
        <td class="parametername">debug_OCIOnchipTrace</td>
902 
        <td class="parametervalue">_128</td>
903 
       </tr>
904 
       <tr>
905 
        <td class="parametername">dcache_size</td>
906 
        <td class="parametervalue">2048</td>
907 
       </tr>
908 
       <tr>
909 
        <td class="parametername">dcache_tagramBlockType</td>
910 
        <td class="parametervalue">Automatic</td>
911 
       </tr>
912 
       <tr>
913 
        <td class="parametername">dcache_ramBlockType</td>
914 
        <td class="parametervalue">Automatic</td>
915 
       </tr>
916 
       <tr>
917 
        <td class="parametername">dcache_numTCDM</td>
918 
        <td class="parametervalue">0</td>
919 
       </tr>
920 
       <tr>
921 
        <td class="parametername">dcache_lineSize</td>
922 
        <td class="parametervalue">32</td>
923 
       </tr>
924 
       <tr>
925 
        <td class="parametername">setting_exportvectors</td>
926 
        <td class="parametervalue">false</td>
927 
       </tr>
928 
       <tr>
929 
        <td class="parametername">setting_ecc_present</td>
930 
        <td class="parametervalue">false</td>
931 
       </tr>
932 
       <tr>
933 
        <td class="parametername">regfile_ramBlockType</td>
934 
        <td class="parametervalue">Automatic</td>
935 
       </tr>
936 
       <tr>
937 
        <td class="parametername">ocimem_ramBlockType</td>
938 
        <td class="parametervalue">Automatic</td>
939 
       </tr>
940 
       <tr>
941 
        <td class="parametername">mmu_ramBlockType</td>
942 
        <td class="parametervalue">Automatic</td>
943 
       </tr>
944 
       <tr>
945 
        <td class="parametername">bht_ramBlockType</td>
946 
        <td class="parametervalue">Automatic</td>
947 
       </tr>
948 
       <tr>
949 
        <td class="parametername">resetAbsoluteAddr</td>
950 
        <td class="parametervalue">32768</td>
951 
       </tr>
952 
       <tr>
953 
        <td class="parametername">exceptionAbsoluteAddr</td>
954 
        <td class="parametervalue">32800</td>
955 
       </tr>
956 
       <tr>
957 
        <td class="parametername">breakAbsoluteAddr</td>
958 
        <td class="parametervalue">69664</td>
959 
       </tr>
960 
       <tr>
961 
        <td class="parametername">mmu_TLBMissExcAbsAddr</td>
962 
        <td class="parametervalue">0</td>
963 
       </tr>
964 
       <tr>
965 
        <td class="parametername">dcache_bursts_derived</td>
966 
        <td class="parametervalue">false</td>
967 
       </tr>
968 
       <tr>
969 
        <td class="parametername">dcache_size_derived</td>
970 
        <td class="parametervalue">2048</td>
971 
       </tr>
972 
       <tr>
973 
        <td class="parametername">dcache_lineSize_derived</td>
974 
        <td class="parametervalue">32</td>
975 
       </tr>
976 
       <tr>
977 
        <td class="parametername">translate_on</td>
978 
        <td class="parametervalue"> "synthesis translate_on"  </td>
979 
       </tr>
980 
       <tr>
981 
        <td class="parametername">translate_off</td>
982 
        <td class="parametervalue"> "synthesis translate_off" </td>
983 
       </tr>
984 
       <tr>
985 
        <td class="parametername">instAddrWidth</td>
986 
        <td class="parametervalue">17</td>
987 
       </tr>
988 
       <tr>
989 
        <td class="parametername">dataAddrWidth</td>
990 
        <td class="parametervalue">17</td>
991 
       </tr>
992 
       <tr>
993 
        <td class="parametername">tightlyCoupledDataMaster0AddrWidth</td>
994 
        <td class="parametervalue">1</td>
995 
       </tr>
996 
       <tr>
997 
        <td class="parametername">tightlyCoupledDataMaster1AddrWidth</td>
998 
        <td class="parametervalue">1</td>
999 
       </tr>
1000 
       <tr>
1001 
        <td class="parametername">tightlyCoupledDataMaster2AddrWidth</td>
1002 
        <td class="parametervalue">1</td>
1003 
       </tr>
1004 
       <tr>
1005 
        <td class="parametername">tightlyCoupledDataMaster3AddrWidth</td>
1006 
        <td class="parametervalue">1</td>
1007 
       </tr>
1008 
       <tr>
1009 
        <td class="parametername">tightlyCoupledInstructionMaster0AddrWidth</td>
1010 
        <td class="parametervalue">1</td>
1011 
       </tr>
1012 
       <tr>
1013 
        <td class="parametername">tightlyCoupledInstructionMaster1AddrWidth</td>
1014 
        <td class="parametervalue">1</td>
1015 
       </tr>
1016 
       <tr>
1017 
        <td class="parametername">tightlyCoupledInstructionMaster2AddrWidth</td>
1018 
        <td class="parametervalue">1</td>
1019 
       </tr>
1020 
       <tr>
1021 
        <td class="parametername">tightlyCoupledInstructionMaster3AddrWidth</td>
1022 
        <td class="parametervalue">1</td>
1023 
       </tr>
1024 
       <tr>
1025 
        <td class="parametername">instSlaveMapParam</td>
1026 
        <td class="parametervalue">&lt;address-map&gt;&lt;slave name='onchip_memory2_0.s1' start='0x8000' end='0x10000' /&gt;&lt;slave name='nios2_qsys_0.jtag_debug_module' start='0x11000' end='0x11800' /&gt;&lt;/address-map&gt;</td>
1027 
       </tr>
1028 
       <tr>
1029 
        <td class="parametername">dataSlaveMapParam</td>
1030 
        <td class="parametervalue">&lt;address-map&gt;&lt;slave name='onchip_memory2_0.s1' start='0x8000' end='0x10000' /&gt;&lt;slave name='sound_0.mgmt' start='0x10800' end='0x11000' /&gt;&lt;slave name='nios2_qsys_0.jtag_debug_module' start='0x11000' end='0x11800' /&gt;&lt;slave name='sound_0.io' start='0x11800' end='0x11810' /&gt;&lt;slave name='jtag_uart_0.avalon_jtag_slave' start='0x11810' end='0x11818' /&gt;&lt;slave name='sound_0.fm' start='0x11818' end='0x1181A' /&gt;&lt;/address-map&gt;</td>
1031 
       </tr>
1032 
       <tr>
1033 
        <td class="parametername">clockFrequency</td>
1034 
        <td class="parametervalue">50000000</td>
1035 
       </tr>
1036 
       <tr>
1037 
        <td class="parametername">deviceFamilyName</td>
1038 
        <td class="parametervalue">CYCLONEIVE</td>
1039 
       </tr>
1040 
       <tr>
1041 
        <td class="parametername">internalIrqMaskSystemInfo</td>
1042 
        <td class="parametervalue">3</td>
1043 
       </tr>
1044 
       <tr>
1045 
        <td class="parametername">customInstSlavesSystemInfo</td>
1046 
        <td class="parametervalue">&lt;info/&gt;</td>
1047 
       </tr>
1048 
       <tr>
1049 
        <td class="parametername">deviceFeaturesSystemInfo</td>
1050 
        <td class="parametervalue">ADDRESS_STALL 1 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 1 FITTER_USE_FALLING_EDGE_DELAY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 1 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 1 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_EARLY_TIMING_ESTIMATE_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 1 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 0 HAS_IBISO_WRITER_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_INTERFACE_PLANNER_SUPPORT 0 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LIMITED_TCL_FITTER_SUPPORT 0 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 1 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 1 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_HARDCOPY_FAMILY 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_SUPPORT 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1</td>
1051 
       </tr>
1052 
       <tr>
1053 
        <td class="parametername">tightlyCoupledDataMaster0MapParam</td>
1054 
        <td class="parametervalue"></td>
1055 
       </tr>
1056 
       <tr>
1057 
        <td class="parametername">tightlyCoupledDataMaster1MapParam</td>
1058 
        <td class="parametervalue"></td>
1059 
       </tr>
1060 
       <tr>
1061 
        <td class="parametername">tightlyCoupledDataMaster2MapParam</td>
1062 
        <td class="parametervalue"></td>
1063 
       </tr>
1064 
       <tr>
1065 
        <td class="parametername">tightlyCoupledDataMaster3MapParam</td>
1066 
        <td class="parametervalue"></td>
1067 
       </tr>
1068 
       <tr>
1069 
        <td class="parametername">tightlyCoupledInstructionMaster0MapParam</td>
1070 
        <td class="parametervalue"></td>
1071 
       </tr>
1072 
       <tr>
1073 
        <td class="parametername">tightlyCoupledInstructionMaster1MapParam</td>
1074 
        <td class="parametervalue"></td>
1075 
       </tr>
1076 
       <tr>
1077 
        <td class="parametername">tightlyCoupledInstructionMaster2MapParam</td>
1078 
        <td class="parametervalue"></td>
1079 
       </tr>
1080 
       <tr>
1081 
        <td class="parametername">tightlyCoupledInstructionMaster3MapParam</td>
1082 
        <td class="parametervalue"></td>
1083 
       </tr>
1084 
       <tr>
1085 
        <td class="parametername">deviceFamily</td>
1086 
        <td class="parametervalue">UNKNOWN</td>
1087 
       </tr>
1088 
       <tr>
1089 
        <td class="parametername">generateLegacySim</td>
1090 
        <td class="parametervalue">false</td>
1091 
       </tr>
1092 
      </table>
1093 
     </td>
1094 
    </tr>
1095 
   </table>&#160;&#160;
1096 
   <table class="flowbox">
1097 
    <tr>
1098 
     <td class="parametersbox">
1099 
      <h2>Software Assignments</h2>
1100 
      <table>
1101 
       <tr>
1102 
        <td class="parametername">BIG_ENDIAN</td>
1103 
        <td class="parametervalue">0</td>
1104 
       </tr>
1105 
       <tr>
1106 
        <td class="parametername">BREAK_ADDR</td>
1107 
        <td class="parametervalue">0x00011020</td>
1108 
       </tr>
1109 
       <tr>
1110 
        <td class="parametername">CPU_FREQ</td>
1111 
        <td class="parametervalue">50000000u</td>
1112 
       </tr>
1113 
       <tr>
1114 
        <td class="parametername">CPU_ID_SIZE</td>
1115 
        <td class="parametervalue">1</td>
1116 
       </tr>
1117 
       <tr>
1118 
        <td class="parametername">CPU_ID_VALUE</td>
1119 
        <td class="parametervalue">0x00000000</td>
1120 
       </tr>
1121 
       <tr>
1122 
        <td class="parametername">CPU_IMPLEMENTATION</td>
1123 
        <td class="parametervalue">"tiny"</td>
1124 
       </tr>
1125 
       <tr>
1126 
        <td class="parametername">DATA_ADDR_WIDTH</td>
1127 
        <td class="parametervalue">17</td>
1128 
       </tr>
1129 
       <tr>
1130 
        <td class="parametername">DCACHE_LINE_SIZE</td>
1131 
        <td class="parametervalue">0</td>
1132 
       </tr>
1133 
       <tr>
1134 
        <td class="parametername">DCACHE_LINE_SIZE_LOG2</td>
1135 
        <td class="parametervalue">0</td>
1136 
       </tr>
1137 
       <tr>
1138 
        <td class="parametername">DCACHE_SIZE</td>
1139 
        <td class="parametervalue">0</td>
1140 
       </tr>
1141 
       <tr>
1142 
        <td class="parametername">EXCEPTION_ADDR</td>
1143 
        <td class="parametervalue">0x00008020</td>
1144 
       </tr>
1145 
       <tr>
1146 
        <td class="parametername">FLUSHDA_SUPPORTED</td>
1147 
        <td class="parametervalue"></td>
1148 
       </tr>
1149 
       <tr>
1150 
        <td class="parametername">HARDWARE_DIVIDE_PRESENT</td>
1151 
        <td class="parametervalue">0</td>
1152 
       </tr>
1153 
       <tr>
1154 
        <td class="parametername">HARDWARE_MULTIPLY_PRESENT</td>
1155 
        <td class="parametervalue">0</td>
1156 
       </tr>
1157 
       <tr>
1158 
        <td class="parametername">HARDWARE_MULX_PRESENT</td>
1159 
        <td class="parametervalue">0</td>
1160 
       </tr>
1161 
       <tr>
1162 
        <td class="parametername">HAS_DEBUG_CORE</td>
1163 
        <td class="parametervalue">1</td>
1164 
       </tr>
1165 
       <tr>
1166 
        <td class="parametername">HAS_DEBUG_STUB</td>
1167 
        <td class="parametervalue"></td>
1168 
       </tr>
1169 
       <tr>
1170 
        <td class="parametername">HAS_JMPI_INSTRUCTION</td>
1171 
        <td class="parametervalue"></td>
1172 
       </tr>
1173 
       <tr>
1174 
        <td class="parametername">ICACHE_LINE_SIZE</td>
1175 
        <td class="parametervalue">0</td>
1176 
       </tr>
1177 
       <tr>
1178 
        <td class="parametername">ICACHE_LINE_SIZE_LOG2</td>
1179 
        <td class="parametervalue">0</td>
1180 
       </tr>
1181 
       <tr>
1182 
        <td class="parametername">ICACHE_SIZE</td>
1183 
        <td class="parametervalue">0</td>
1184 
       </tr>
1185 
       <tr>
1186 
        <td class="parametername">INST_ADDR_WIDTH</td>
1187 
        <td class="parametervalue">17</td>
1188 
       </tr>
1189 
       <tr>
1190 
        <td class="parametername">RESET_ADDR</td>
1191 
        <td class="parametervalue">0x00008000</td>
1192 
       </tr>
1193 
      </table>
1194 
     </td>
1195 
    </tr>
1196 
   </table>
1197 
  </div>
1198 
  <a name="module_jtag_uart_0"> </a>
1199 
  <div>
1200 
   <hr/>
1201 
   <h2>jtag_uart_0</h2>altera_avalon_jtag_uart v13.0.1.99.2
1202 
   <br/>
1203 
   <div class="greydiv">
1204 
    <table class="connectionboxes">
1205 
     <tr>
1206 
      <td class="neighbor" rowspan="4">
1207 
       <a href="#module_clk_sys">clk_sys</a>
1208 
      </td>
1209 
      <td class="from">clk&#160;&#160;</td>
1210 
      <td class="main" rowspan="9">jtag_uart_0</td>
1211 
     </tr>
1212 
     <tr>
1213 
      <td class="to">&#160;&#160;clk</td>
1214 
     </tr>
1215 
     <tr>
1216 
      <td class="from">clk_reset&#160;&#160;</td>
1217 
     </tr>
1218 
     <tr>
1219 
      <td class="to">&#160;&#160;reset</td>
1220 
     </tr>
1221 
     <tr style="height:6px">
1222 
      <td></td>
1223 
     </tr>
1224 
     <tr>
1225 
      <td class="neighbor" rowspan="4">
1226 
       <a href="#module_nios2_qsys_0">nios2_qsys_0</a>
1227 
      </td>
1228 
      <td class="from">data_master&#160;&#160;</td>
1229 
     </tr>
1230 
     <tr>
1231 
      <td class="to">&#160;&#160;avalon_jtag_slave</td>
1232 
     </tr>
1233 
     <tr>
1234 
      <td class="from">d_irq&#160;&#160;</td>
1235 
     </tr>
1236 
     <tr>
1237 
      <td class="to">&#160;&#160;irq</td>
1238 
     </tr>
1239 
    </table>
1240 
   </div>
1241 
   <br/>
1242 
   <br/>
1243 
   <table class="flowbox">
1244 
    <tr>
1245 
     <td class="parametersbox">
1246 
      <h2>Parameters</h2>
1247 
      <table>
1248 
       <tr>
1249 
        <td class="parametername">allowMultipleConnections</td>
1250 
        <td class="parametervalue">false</td>
1251 
       </tr>
1252 
       <tr>
1253 
        <td class="parametername">hubInstanceID</td>
1254 
        <td class="parametervalue">0</td>
1255 
       </tr>
1256 
       <tr>
1257 
        <td class="parametername">readBufferDepth</td>
1258 
        <td class="parametervalue">64</td>
1259 
       </tr>
1260 
       <tr>
1261 
        <td class="parametername">readIRQThreshold</td>
1262 
        <td class="parametervalue">8</td>
1263 
       </tr>
1264 
       <tr>
1265 
        <td class="parametername">simInputCharacterStream</td>
1266 
        <td class="parametervalue"></td>
1267 
       </tr>
1268 
       <tr>
1269 
        <td class="parametername">simInteractiveOptions</td>
1270 
        <td class="parametervalue">NO_INTERACTIVE_WINDOWS</td>
1271 
       </tr>
1272 
       <tr>
1273 
        <td class="parametername">useRegistersForReadBuffer</td>
1274 
        <td class="parametervalue">false</td>
1275 
       </tr>
1276 
       <tr>
1277 
        <td class="parametername">useRegistersForWriteBuffer</td>
1278 
        <td class="parametervalue">false</td>
1279 
       </tr>
1280 
       <tr>
1281 
        <td class="parametername">useRelativePathForSimFile</td>
1282 
        <td class="parametervalue">false</td>
1283 
       </tr>
1284 
       <tr>
1285 
        <td class="parametername">writeBufferDepth</td>
1286 
        <td class="parametervalue">64</td>
1287 
       </tr>
1288 
       <tr>
1289 
        <td class="parametername">writeIRQThreshold</td>
1290 
        <td class="parametervalue">8</td>
1291 
       </tr>
1292 
       <tr>
1293 
        <td class="parametername">avalonSpec</td>
1294 
        <td class="parametervalue">2.0</td>
1295 
       </tr>
1296 
       <tr>
1297 
        <td class="parametername">legacySignalAllow</td>
1298 
        <td class="parametervalue">false</td>
1299 
       </tr>
1300 
       <tr>
1301 
        <td class="parametername">enableInteractiveInput</td>
1302 
        <td class="parametervalue">false</td>
1303 
       </tr>
1304 
       <tr>
1305 
        <td class="parametername">enableInteractiveOutput</td>
1306 
        <td class="parametervalue">false</td>
1307 
       </tr>
1308 
       <tr>
1309 
        <td class="parametername">deviceFamily</td>
1310 
        <td class="parametervalue">UNKNOWN</td>
1311 
       </tr>
1312 
       <tr>
1313 
        <td class="parametername">generateLegacySim</td>
1314 
        <td class="parametervalue">false</td>
1315 
       </tr>
1316 
      </table>
1317 
     </td>
1318 
    </tr>
1319 
   </table>&#160;&#160;
1320 
   <table class="flowbox">
1321 
    <tr>
1322 
     <td class="parametersbox">
1323 
      <h2>Software Assignments</h2>
1324 
      <table>
1325 
       <tr>
1326 
        <td class="parametername">READ_DEPTH</td>
1327 
        <td class="parametervalue">64</td>
1328 
       </tr>
1329 
       <tr>
1330 
        <td class="parametername">READ_THRESHOLD</td>
1331 
        <td class="parametervalue">8</td>
1332 
       </tr>
1333 
       <tr>
1334 
        <td class="parametername">WRITE_DEPTH</td>
1335 
        <td class="parametervalue">64</td>
1336 
       </tr>
1337 
       <tr>
1338 
        <td class="parametername">WRITE_THRESHOLD</td>
1339 
        <td class="parametervalue">8</td>
1340 
       </tr>
1341 
      </table>
1342 
     </td>
1343 
    </tr>
1344 
   </table>
1345 
  </div>
1346 
  <a name="module_clk_12"> </a>
1347 
  <div>
1348 
   <hr/>
1349 
   <h2>clk_12</h2>clock_source v13.0
1350 
   <br/>
1351 
   <br/>
1352 
   <br/>
1353 
   <table class="flowbox">
1354 
    <tr>
1355 
     <td class="parametersbox">
1356 
      <h2>Parameters</h2>
1357 
      <table>
1358 
       <tr>
1359 
        <td class="parametername">clockFrequency</td>
1360 
        <td class="parametervalue">12000000</td>
1361 
       </tr>
1362 
       <tr>
1363 
        <td class="parametername">clockFrequencyKnown</td>
1364 
        <td class="parametervalue">true</td>
1365 
       </tr>
1366 
       <tr>
1367 
        <td class="parametername">inputClockFrequency</td>
1368 
        <td class="parametervalue">0</td>
1369 
       </tr>
1370 
       <tr>
1371 
        <td class="parametername">resetSynchronousEdges</td>
1372 
        <td class="parametervalue">NONE</td>
1373 
       </tr>
1374 
       <tr>
1375 
        <td class="parametername">deviceFamily</td>
1376 
        <td class="parametervalue">UNKNOWN</td>
1377 
       </tr>
1378 
       <tr>
1379 
        <td class="parametername">generateLegacySim</td>
1380 
        <td class="parametervalue">false</td>
1381 
       </tr>
1382 
      </table>
1383 
     </td>
1384 
    </tr>
1385 
   </table>&#160;&#160;
1386 
   <table class="flowbox">
1387 
    <tr>
1388 
     <td class="parametersbox">
1389 
      <h2>Software Assignments</h2>(none)</td>
1390 
    </tr>
1391 
   </table>
1392 
  </div>
1393 
  <a name="module_sound_0"> </a>
1394 
  <div>
1395 
   <hr/>
1396 
   <h2>sound_0</h2>sound v1.0
1397 
   <br/>
1398 
   <div class="greydiv">
1399 
    <table class="connectionboxes">
1400 
     <tr>
1401 
      <td class="neighbor" rowspan="4">
1402 
       <a href="#module_clk_sys">clk_sys</a>
1403 
      </td>
1404 
      <td class="from">clk&#160;&#160;</td>
1405 
      <td class="main" rowspan="16">sound_0</td>
1406 
     </tr>
1407 
     <tr>
1408 
      <td class="to">&#160;&#160;clock</td>
1409 
     </tr>
1410 
     <tr>
1411 
      <td class="from">clk_reset&#160;&#160;</td>
1412 
     </tr>
1413 
     <tr>
1414 
      <td class="to">&#160;&#160;reset_sink</td>
1415 
     </tr>
1416 
     <tr style="height:6px">
1417 
      <td></td>
1418 
     </tr>
1419 
     <tr>
1420 
      <td class="neighbor" rowspan="8">
1421 
       <a href="#module_nios2_qsys_0">nios2_qsys_0</a>
1422 
      </td>
1423 
      <td class="from">data_master&#160;&#160;</td>
1424 
     </tr>
1425 
     <tr>
1426 
      <td class="to">&#160;&#160;io</td>
1427 
     </tr>
1428 
     <tr>
1429 
      <td class="from">data_master&#160;&#160;</td>
1430 
     </tr>
1431 
     <tr>
1432 
      <td class="to">&#160;&#160;fm</td>
1433 
     </tr>
1434 
     <tr>
1435 
      <td class="from">data_master&#160;&#160;</td>
1436 
     </tr>
1437 
     <tr>
1438 
      <td class="to">&#160;&#160;mgmt</td>
1439 
     </tr>
1440 
     <tr>
1441 
      <td class="from">d_irq&#160;&#160;</td>
1442 
     </tr>
1443 
     <tr>
1444 
      <td class="to">&#160;&#160;interrupt_sender</td>
1445 
     </tr>
1446 
     <tr style="height:6px">
1447 
      <td></td>
1448 
     </tr>
1449 
     <tr>
1450 
      <td class="neighbor" rowspan="2">
1451 
       <a href="#module_clk_12">clk_12</a>
1452 
      </td>
1453 
      <td class="from">clk&#160;&#160;</td>
1454 
     </tr>
1455 
     <tr>
1456 
      <td class="to">&#160;&#160;clock_sink</td>
1457 
     </tr>
1458 
    </table>
1459 
   </div>
1460 
   <br/>
1461 
   <br/>
1462 
   <table class="flowbox">
1463 
    <tr>
1464 
     <td class="parametersbox">
1465 
      <h2>Parameters</h2>
1466 
      <table>
1467 
       <tr>
1468 
        <td class="parametername">deviceFamily</td>
1469 
        <td class="parametervalue">UNKNOWN</td>
1470 
       </tr>
1471 
       <tr>
1472 
        <td class="parametername">generateLegacySim</td>
1473 
        <td class="parametervalue">false</td>
1474 
       </tr>
1475 
      </table>
1476 
     </td>
1477 
    </tr>
1478 
   </table>&#160;&#160;
1479 
   <table class="flowbox">
1480 
    <tr>
1481 
     <td class="parametersbox">
1482 
      <h2>Software Assignments</h2>(none)</td>
1483 
    </tr>
1484 
   </table>
1485 
  </div>
1486 
  <table class="blueBar">
1487 
   <tr>
1488 
    <td class="l">generation took 0.01 seconds</td>
1489 
    <td class="r">rendering took 0.08 seconds</td>
1490 
   </tr>
1491 
  </table>
1492 
 </body>
1493 
</html>

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