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2 |
alfik |
#include <stdio.h>
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2 |
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#include <unistd.h>
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3 |
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4 |
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#include "system.h"
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5 |
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#include "io.h"
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6 |
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static unsigned char palette3[256][3]=
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8 |
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{
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9 |
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0x00,0x00,0x00, 0x00,0x00,0x2a, 0x00,0x2a,0x00, 0x00,0x2a,0x2a, 0x2a,0x00,0x00, 0x2a,0x00,0x2a, 0x2a,0x15,0x00, 0x2a,0x2a,0x2a,
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10 |
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0x15,0x15,0x15, 0x15,0x15,0x3f, 0x15,0x3f,0x15, 0x15,0x3f,0x3f, 0x3f,0x15,0x15, 0x3f,0x15,0x3f, 0x3f,0x3f,0x15, 0x3f,0x3f,0x3f,
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11 |
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0x00,0x00,0x00, 0x05,0x05,0x05, 0x08,0x08,0x08, 0x0b,0x0b,0x0b, 0x0e,0x0e,0x0e, 0x11,0x11,0x11, 0x14,0x14,0x14, 0x18,0x18,0x18,
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12 |
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0x1c,0x1c,0x1c, 0x20,0x20,0x20, 0x24,0x24,0x24, 0x28,0x28,0x28, 0x2d,0x2d,0x2d, 0x32,0x32,0x32, 0x38,0x38,0x38, 0x3f,0x3f,0x3f,
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13 |
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0x00,0x00,0x3f, 0x10,0x00,0x3f, 0x1f,0x00,0x3f, 0x2f,0x00,0x3f, 0x3f,0x00,0x3f, 0x3f,0x00,0x2f, 0x3f,0x00,0x1f, 0x3f,0x00,0x10,
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14 |
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0x3f,0x00,0x00, 0x3f,0x10,0x00, 0x3f,0x1f,0x00, 0x3f,0x2f,0x00, 0x3f,0x3f,0x00, 0x2f,0x3f,0x00, 0x1f,0x3f,0x00, 0x10,0x3f,0x00,
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15 |
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0x00,0x3f,0x00, 0x00,0x3f,0x10, 0x00,0x3f,0x1f, 0x00,0x3f,0x2f, 0x00,0x3f,0x3f, 0x00,0x2f,0x3f, 0x00,0x1f,0x3f, 0x00,0x10,0x3f,
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16 |
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0x1f,0x1f,0x3f, 0x27,0x1f,0x3f, 0x2f,0x1f,0x3f, 0x37,0x1f,0x3f, 0x3f,0x1f,0x3f, 0x3f,0x1f,0x37, 0x3f,0x1f,0x2f, 0x3f,0x1f,0x27,
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17 |
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18 |
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0x3f,0x1f,0x1f, 0x3f,0x27,0x1f, 0x3f,0x2f,0x1f, 0x3f,0x37,0x1f, 0x3f,0x3f,0x1f, 0x37,0x3f,0x1f, 0x2f,0x3f,0x1f, 0x27,0x3f,0x1f,
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19 |
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0x1f,0x3f,0x1f, 0x1f,0x3f,0x27, 0x1f,0x3f,0x2f, 0x1f,0x3f,0x37, 0x1f,0x3f,0x3f, 0x1f,0x37,0x3f, 0x1f,0x2f,0x3f, 0x1f,0x27,0x3f,
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20 |
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0x2d,0x2d,0x3f, 0x31,0x2d,0x3f, 0x36,0x2d,0x3f, 0x3a,0x2d,0x3f, 0x3f,0x2d,0x3f, 0x3f,0x2d,0x3a, 0x3f,0x2d,0x36, 0x3f,0x2d,0x31,
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21 |
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0x3f,0x2d,0x2d, 0x3f,0x31,0x2d, 0x3f,0x36,0x2d, 0x3f,0x3a,0x2d, 0x3f,0x3f,0x2d, 0x3a,0x3f,0x2d, 0x36,0x3f,0x2d, 0x31,0x3f,0x2d,
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22 |
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0x2d,0x3f,0x2d, 0x2d,0x3f,0x31, 0x2d,0x3f,0x36, 0x2d,0x3f,0x3a, 0x2d,0x3f,0x3f, 0x2d,0x3a,0x3f, 0x2d,0x36,0x3f, 0x2d,0x31,0x3f,
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0x00,0x00,0x1c, 0x07,0x00,0x1c, 0x0e,0x00,0x1c, 0x15,0x00,0x1c, 0x1c,0x00,0x1c, 0x1c,0x00,0x15, 0x1c,0x00,0x0e, 0x1c,0x00,0x07,
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0x1c,0x00,0x00, 0x1c,0x07,0x00, 0x1c,0x0e,0x00, 0x1c,0x15,0x00, 0x1c,0x1c,0x00, 0x15,0x1c,0x00, 0x0e,0x1c,0x00, 0x07,0x1c,0x00,
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0x00,0x1c,0x00, 0x00,0x1c,0x07, 0x00,0x1c,0x0e, 0x00,0x1c,0x15, 0x00,0x1c,0x1c, 0x00,0x15,0x1c, 0x00,0x0e,0x1c, 0x00,0x07,0x1c,
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0x0e,0x0e,0x1c, 0x11,0x0e,0x1c, 0x15,0x0e,0x1c, 0x18,0x0e,0x1c, 0x1c,0x0e,0x1c, 0x1c,0x0e,0x18, 0x1c,0x0e,0x15, 0x1c,0x0e,0x11,
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28 |
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0x1c,0x0e,0x0e, 0x1c,0x11,0x0e, 0x1c,0x15,0x0e, 0x1c,0x18,0x0e, 0x1c,0x1c,0x0e, 0x18,0x1c,0x0e, 0x15,0x1c,0x0e, 0x11,0x1c,0x0e,
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29 |
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0x0e,0x1c,0x0e, 0x0e,0x1c,0x11, 0x0e,0x1c,0x15, 0x0e,0x1c,0x18, 0x0e,0x1c,0x1c, 0x0e,0x18,0x1c, 0x0e,0x15,0x1c, 0x0e,0x11,0x1c,
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30 |
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0x14,0x14,0x1c, 0x16,0x14,0x1c, 0x18,0x14,0x1c, 0x1a,0x14,0x1c, 0x1c,0x14,0x1c, 0x1c,0x14,0x1a, 0x1c,0x14,0x18, 0x1c,0x14,0x16,
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31 |
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0x1c,0x14,0x14, 0x1c,0x16,0x14, 0x1c,0x18,0x14, 0x1c,0x1a,0x14, 0x1c,0x1c,0x14, 0x1a,0x1c,0x14, 0x18,0x1c,0x14, 0x16,0x1c,0x14,
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32 |
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0x14,0x1c,0x14, 0x14,0x1c,0x16, 0x14,0x1c,0x18, 0x14,0x1c,0x1a, 0x14,0x1c,0x1c, 0x14,0x1a,0x1c, 0x14,0x18,0x1c, 0x14,0x16,0x1c,
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0x00,0x00,0x10, 0x04,0x00,0x10, 0x08,0x00,0x10, 0x0c,0x00,0x10, 0x10,0x00,0x10, 0x10,0x00,0x0c, 0x10,0x00,0x08, 0x10,0x00,0x04,
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0x10,0x00,0x00, 0x10,0x04,0x00, 0x10,0x08,0x00, 0x10,0x0c,0x00, 0x10,0x10,0x00, 0x0c,0x10,0x00, 0x08,0x10,0x00, 0x04,0x10,0x00,
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35 |
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36 |
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0x00,0x10,0x00, 0x00,0x10,0x04, 0x00,0x10,0x08, 0x00,0x10,0x0c, 0x00,0x10,0x10, 0x00,0x0c,0x10, 0x00,0x08,0x10, 0x00,0x04,0x10,
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37 |
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0x08,0x08,0x10, 0x0a,0x08,0x10, 0x0c,0x08,0x10, 0x0e,0x08,0x10, 0x10,0x08,0x10, 0x10,0x08,0x0e, 0x10,0x08,0x0c, 0x10,0x08,0x0a,
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38 |
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0x10,0x08,0x08, 0x10,0x0a,0x08, 0x10,0x0c,0x08, 0x10,0x0e,0x08, 0x10,0x10,0x08, 0x0e,0x10,0x08, 0x0c,0x10,0x08, 0x0a,0x10,0x08,
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0x08,0x10,0x08, 0x08,0x10,0x0a, 0x08,0x10,0x0c, 0x08,0x10,0x0e, 0x08,0x10,0x10, 0x08,0x0e,0x10, 0x08,0x0c,0x10, 0x08,0x0a,0x10,
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0x0b,0x0b,0x10, 0x0c,0x0b,0x10, 0x0d,0x0b,0x10, 0x0f,0x0b,0x10, 0x10,0x0b,0x10, 0x10,0x0b,0x0f, 0x10,0x0b,0x0d, 0x10,0x0b,0x0c,
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0x10,0x0b,0x0b, 0x10,0x0c,0x0b, 0x10,0x0d,0x0b, 0x10,0x0f,0x0b, 0x10,0x10,0x0b, 0x0f,0x10,0x0b, 0x0d,0x10,0x0b, 0x0c,0x10,0x0b,
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0x0b,0x10,0x0b, 0x0b,0x10,0x0c, 0x0b,0x10,0x0d, 0x0b,0x10,0x0f, 0x0b,0x10,0x10, 0x0b,0x0f,0x10, 0x0b,0x0d,0x10, 0x0b,0x0c,0x10,
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0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00
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};
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static unsigned char palette0[63+1][3]=
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{
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0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00,
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0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a,
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0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a,
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0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f,
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0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00,
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0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a,
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54 |
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0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a,
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0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f
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};
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static unsigned char palette1[63+1][3]=
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{
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0x00,0x00,0x00, 0x00,0x00,0x2a, 0x00,0x2a,0x00, 0x00,0x2a,0x2a, 0x2a,0x00,0x00, 0x2a,0x00,0x2a, 0x2a,0x15,0x00, 0x2a,0x2a,0x2a,
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0x00,0x00,0x00, 0x00,0x00,0x2a, 0x00,0x2a,0x00, 0x00,0x2a,0x2a, 0x2a,0x00,0x00, 0x2a,0x00,0x2a, 0x2a,0x15,0x00, 0x2a,0x2a,0x2a,
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62 |
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0x15,0x15,0x15, 0x15,0x15,0x3f, 0x15,0x3f,0x15, 0x15,0x3f,0x3f, 0x3f,0x15,0x15, 0x3f,0x15,0x3f, 0x3f,0x3f,0x15, 0x3f,0x3f,0x3f,
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63 |
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0x15,0x15,0x15, 0x15,0x15,0x3f, 0x15,0x3f,0x15, 0x15,0x3f,0x3f, 0x3f,0x15,0x15, 0x3f,0x15,0x3f, 0x3f,0x3f,0x15, 0x3f,0x3f,0x3f,
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64 |
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0x00,0x00,0x00, 0x00,0x00,0x2a, 0x00,0x2a,0x00, 0x00,0x2a,0x2a, 0x2a,0x00,0x00, 0x2a,0x00,0x2a, 0x2a,0x15,0x00, 0x2a,0x2a,0x2a,
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0x00,0x00,0x00, 0x00,0x00,0x2a, 0x00,0x2a,0x00, 0x00,0x2a,0x2a, 0x2a,0x00,0x00, 0x2a,0x00,0x2a, 0x2a,0x15,0x00, 0x2a,0x2a,0x2a,
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66 |
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0x15,0x15,0x15, 0x15,0x15,0x3f, 0x15,0x3f,0x15, 0x15,0x3f,0x3f, 0x3f,0x15,0x15, 0x3f,0x15,0x3f, 0x3f,0x3f,0x15, 0x3f,0x3f,0x3f,
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67 |
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0x15,0x15,0x15, 0x15,0x15,0x3f, 0x15,0x3f,0x15, 0x15,0x3f,0x3f, 0x3f,0x15,0x15, 0x3f,0x15,0x3f, 0x3f,0x3f,0x15, 0x3f,0x3f,0x3f
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68 |
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};
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static unsigned char palette2[63+1][3]=
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70 |
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{
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0x00,0x00,0x00, 0x00,0x00,0x2a, 0x00,0x2a,0x00, 0x00,0x2a,0x2a, 0x2a,0x00,0x00, 0x2a,0x00,0x2a, 0x2a,0x2a,0x00, 0x2a,0x2a,0x2a,
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72 |
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0x00,0x00,0x15, 0x00,0x00,0x3f, 0x00,0x2a,0x15, 0x00,0x2a,0x3f, 0x2a,0x00,0x15, 0x2a,0x00,0x3f, 0x2a,0x2a,0x15, 0x2a,0x2a,0x3f,
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73 |
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0x00,0x15,0x00, 0x00,0x15,0x2a, 0x00,0x3f,0x00, 0x00,0x3f,0x2a, 0x2a,0x15,0x00, 0x2a,0x15,0x2a, 0x2a,0x3f,0x00, 0x2a,0x3f,0x2a,
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74 |
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0x00,0x15,0x15, 0x00,0x15,0x3f, 0x00,0x3f,0x15, 0x00,0x3f,0x3f, 0x2a,0x15,0x15, 0x2a,0x15,0x3f, 0x2a,0x3f,0x15, 0x2a,0x3f,0x3f,
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75 |
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0x15,0x00,0x00, 0x15,0x00,0x2a, 0x15,0x2a,0x00, 0x15,0x2a,0x2a, 0x3f,0x00,0x00, 0x3f,0x00,0x2a, 0x3f,0x2a,0x00, 0x3f,0x2a,0x2a,
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76 |
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0x15,0x00,0x15, 0x15,0x00,0x3f, 0x15,0x2a,0x15, 0x15,0x2a,0x3f, 0x3f,0x00,0x15, 0x3f,0x00,0x3f, 0x3f,0x2a,0x15, 0x3f,0x2a,0x3f,
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77 |
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0x15,0x15,0x00, 0x15,0x15,0x2a, 0x15,0x3f,0x00, 0x15,0x3f,0x2a, 0x3f,0x15,0x00, 0x3f,0x15,0x2a, 0x3f,0x3f,0x00, 0x3f,0x3f,0x2a,
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78 |
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0x15,0x15,0x15, 0x15,0x15,0x3f, 0x15,0x3f,0x15, 0x15,0x3f,0x3f, 0x3f,0x15,0x15, 0x3f,0x15,0x3f, 0x3f,0x3f,0x15, 0x3f,0x3f,0x3f
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79 |
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};
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80 |
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81 |
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void test_mode13() {
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82 |
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int i;
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83 |
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84 |
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/*
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85 |
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unsigned char *mem = (unsigned char *)VGA_0_MEM_BASE;
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86 |
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87 |
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mem[0] = 1;
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88 |
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mem[1] = 2;
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89 |
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mem[2] = 3;
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90 |
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mem[3] = 4;
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*/
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92 |
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for(i=0; i<320; i++) IOWR_8DIRECT(VGA_0_MEM_BASE, i, (i%2)? 2 : 1);
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94 |
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95 |
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for(i=0; i<320; i++) IOWR_8DIRECT(VGA_0_MEM_BASE, 63680+i, (i%2)? 2 : 1);
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96 |
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97 |
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for(i=0; i<200; i++) IOWR_8DIRECT(VGA_0_MEM_BASE, i*320, (i%2)? 2 : 1);
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98 |
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99 |
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for(i=0; i<200; i++) IOWR_8DIRECT(VGA_0_MEM_BASE, 319+i*320, (i%2)? 2 : 1);
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100 |
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101 |
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for(i=0; i<64000; i++) IOWR_8DIRECT(VGA_0_MEM_BASE, i, i);
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102 |
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103 |
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104 |
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/*
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105 |
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IOWR_8DIRECT(VGA_0_IO_C_BASE, 9, 0x00);
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106 |
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IOWR_8DIRECT(VGA_0_IO_C_BASE, 9, 0x00);
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107 |
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IOWR_8DIRECT(VGA_0_IO_C_BASE, 9, 0xFF);
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108 |
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109 |
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IOWR_8DIRECT(VGA_0_IO_C_BASE, 9, 0xFF);
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110 |
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IOWR_8DIRECT(VGA_0_IO_C_BASE, 9, 0x00);
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111 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 9, 0x00);
|
112 |
|
|
*/
|
113 |
|
|
}
|
114 |
|
|
|
115 |
|
|
void test_text_mode() {
|
116 |
|
|
int i;
|
117 |
|
|
|
118 |
|
|
//disable chained mode and odd/even mode
|
119 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 4, 4);
|
120 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 5, 0x6);
|
121 |
|
|
|
122 |
|
|
//enable page 2 write
|
123 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 4, 2);
|
124 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 5, 0x4);
|
125 |
|
|
|
126 |
|
|
//load font data
|
127 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 0, 0x81);
|
128 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 1, 0x42);
|
129 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 2, 0x24);
|
130 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 3, 0x18);
|
131 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 4, 0x18);
|
132 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 5, 0x24);
|
133 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 6, 0x42);
|
134 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 7, 0x81);
|
135 |
|
|
|
136 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 8, 0x81);
|
137 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 9, 0x42);
|
138 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 10, 0x24);
|
139 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 11, 0x18);
|
140 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 12, 0x18);
|
141 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 13, 0x24);
|
142 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 14, 0x42);
|
143 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 15, 0x81);
|
144 |
|
|
|
145 |
|
|
unsigned char mode_01[] =
|
146 |
|
|
{
|
147 |
|
|
/* index=0x17 vga mode 0x01 */
|
148 |
|
|
40, 24, 16, 0x00, 0x08, /* tw, th-1, ch, slength */
|
149 |
|
|
0x08, 0x03, 0x00, 0x02, /* sequ_regs */
|
150 |
|
|
0x67, /* miscreg */
|
151 |
|
|
0x2d, 0x27, 0x28, 0x90, 0x2b, 0xa0, 0xbf, 0x1f,
|
152 |
|
|
0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00,
|
153 |
|
|
0x9c, 0x8e, 0x8f, 0x14, 0x1f, 0x96, 0xb9, 0xa3,
|
154 |
|
|
0xff, /* crtc_regs */
|
155 |
|
|
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
|
156 |
|
|
0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
|
157 |
|
|
0x0c, 0x00, 0x0f, 0x08, /* actl_regs */
|
158 |
|
|
0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x0f, 0xff, /* grdc_regs */
|
159 |
|
|
};
|
160 |
|
|
unsigned char mode_03[] =
|
161 |
|
|
{
|
162 |
|
|
/* index=0x18 vga mode 0x03 */
|
163 |
|
|
80, 24, 16, 0x00, 0x10, /* tw, th-1, ch, slength */
|
164 |
|
|
0x00, 0x03, 0x00, 0x02, /* sequ_regs */
|
165 |
|
|
0x67, /* miscreg */
|
166 |
|
|
0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
|
167 |
|
|
0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00,
|
168 |
|
|
0x9c, 0x8e, 0x8f, 0x28, 0x1f, 0x96, 0xb9, 0xa3,
|
169 |
|
|
0xff, /* crtc_regs */
|
170 |
|
|
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
|
171 |
|
|
0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
|
172 |
|
|
0x0c, 0x00, 0x0f, 0x08, /* actl_regs */
|
173 |
|
|
0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x0f, 0xff, /* grdc_regs */
|
174 |
|
|
};
|
175 |
|
|
|
176 |
|
|
unsigned char mode_07[] =
|
177 |
|
|
{
|
178 |
|
|
/* index=0x19 vga mode 0x07 */
|
179 |
|
|
80, 24, 16, 0x00, 0x10, /* tw, th-1, ch, slength */
|
180 |
|
|
0x00, 0x03, 0x00, 0x02, /* sequ_regs */
|
181 |
|
|
0x66, /* miscreg */
|
182 |
|
|
0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
|
183 |
|
|
0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00,
|
184 |
|
|
0x9c, 0x8e, 0x8f, 0x28, 0x0f, 0x96, 0xb9, 0xa3,
|
185 |
|
|
0xff, /* crtc_regs */
|
186 |
|
|
0x00, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08,
|
187 |
|
|
0x10, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
|
188 |
|
|
0x0e, 0x00, 0x0f, 0x08, /* actl_regs */
|
189 |
|
|
0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0a, 0x0f, 0xff, /* grdc_regs */
|
190 |
|
|
};
|
191 |
|
|
|
192 |
|
|
unsigned char *mode = mode_07;
|
193 |
|
|
int mode_num = 0x07;
|
194 |
|
|
|
195 |
|
|
//load sequencer
|
196 |
|
|
for(i=0; i<4; i++) {
|
197 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 4, i+1);
|
198 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 5, mode[5+i]);
|
199 |
|
|
}
|
200 |
|
|
|
201 |
|
|
//load misc
|
202 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 2, mode[9]);
|
203 |
|
|
|
204 |
|
|
//load crtc -- disable protect
|
205 |
|
|
if(mode_num != 0x07) {
|
206 |
|
|
IOWR_8DIRECT(VGA_0_IO_D_BASE, 4, 0x11);
|
207 |
|
|
IOWR_8DIRECT(VGA_0_IO_D_BASE, 5, mode[27] & 0x7F);
|
208 |
|
|
|
209 |
|
|
for(i=0; i<0x18; i++) {
|
210 |
|
|
IOWR_8DIRECT(VGA_0_IO_D_BASE, 4, i);
|
211 |
|
|
IOWR_8DIRECT(VGA_0_IO_D_BASE, 5, mode[10+i]);
|
212 |
|
|
}
|
213 |
|
|
}
|
214 |
|
|
else {
|
215 |
|
|
IOWR_8DIRECT(VGA_0_IO_B_BASE, 4, 0x11);
|
216 |
|
|
IOWR_8DIRECT(VGA_0_IO_B_BASE, 5, mode[27] & 0x7F);
|
217 |
|
|
|
218 |
|
|
for(i=0; i<0x18; i++) {
|
219 |
|
|
IOWR_8DIRECT(VGA_0_IO_B_BASE, 4, i);
|
220 |
|
|
IOWR_8DIRECT(VGA_0_IO_B_BASE, 5, mode[10+i]);
|
221 |
|
|
}
|
222 |
|
|
}
|
223 |
|
|
//load attrib
|
224 |
|
|
for(i=0; i<0x14; i++) {
|
225 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 0, 0x20 | i);
|
226 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 0, mode[35+i]);
|
227 |
|
|
}
|
228 |
|
|
|
229 |
|
|
//load graphic
|
230 |
|
|
for(i=0; i<0x09; i++) {
|
231 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 0xE, i);
|
232 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 0xF, mode[55+i]);
|
233 |
|
|
}
|
234 |
|
|
|
235 |
|
|
//clear memory
|
236 |
|
|
for(i=0; i<4000; i++) IOWR_8DIRECT(VGA_0_MEM_BASE, 0x18000 + i, 0x00);
|
237 |
|
|
for(i=0; i<4000; i++) IOWR_8DIRECT(VGA_0_MEM_BASE, 0x10000 + i, 0x00);
|
238 |
|
|
|
239 |
|
|
// for mode 0,3
|
240 |
|
|
if(mode_num == 0x01 || mode_num == 0x03) {
|
241 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 0x18001, 0x04);
|
242 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 0x1804f, 0x04);
|
243 |
|
|
|
244 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 0x18000 + 1920 + 1, 0x04);
|
245 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 0x18000 + 1999, 0x04);
|
246 |
|
|
|
247 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 0x18000 + 160 - 1, 0x04);
|
248 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 0x18000 + 3840 + 1, 0x04);
|
249 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 0x18000 + 3999, 0x04);
|
250 |
|
|
}
|
251 |
|
|
|
252 |
|
|
//for mode 7
|
253 |
|
|
if(mode_num == 0x07) {
|
254 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 0x10000 + 1, 0x04);
|
255 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 0x10000 + 160 -1, 0x04);
|
256 |
|
|
|
257 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 0x10000 + 3840 + 1, 0x04);
|
258 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 0x10000 + 4000 - 1, 0x04);
|
259 |
|
|
}
|
260 |
|
|
}
|
261 |
|
|
|
262 |
|
|
int main() {
|
263 |
|
|
|
264 |
|
|
IOWR(VGA_0_SYS_BASE, 0, 0xC000);
|
265 |
|
|
|
266 |
|
|
int i;
|
267 |
|
|
for(i=0; i<128; i++) {
|
268 |
|
|
IOWR(VGA_0_SYS_BASE, i, ('0'+(i%10)));
|
269 |
|
|
}
|
270 |
|
|
|
271 |
|
|
usleep(1000000);
|
272 |
|
|
|
273 |
|
|
IOWR(VGA_0_SYS_BASE, 0, 0x8000);
|
274 |
|
|
|
275 |
|
|
//--------------------
|
276 |
|
|
|
277 |
|
|
//load dac
|
278 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 8, 0);
|
279 |
|
|
|
280 |
|
|
/*
|
281 |
|
|
for(i=0; i<256; i++) {
|
282 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 9, palette3[i][0]);
|
283 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 9, palette3[i][1]);
|
284 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 9, palette3[i][2]);
|
285 |
|
|
}
|
286 |
|
|
*/
|
287 |
|
|
|
288 |
|
|
for(i=0; i<64; i++) {
|
289 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 9, palette2[i][0]);
|
290 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 9, palette2[i][1]);
|
291 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 9, palette2[i][2]);
|
292 |
|
|
}
|
293 |
|
|
|
294 |
|
|
|
295 |
|
|
//test_mode13();
|
296 |
|
|
//return 0;
|
297 |
|
|
|
298 |
|
|
//test_text_mode();
|
299 |
|
|
//return 0;
|
300 |
|
|
|
301 |
|
|
unsigned char mode_04[] =
|
302 |
|
|
{
|
303 |
|
|
/* index=0x04 vga mode 0x04 */
|
304 |
|
|
40, 24, 8, 0x00, 0x08, /* tw, th-1, ch, slength */
|
305 |
|
|
0x09, 0x03, 0x00, 0x02, /* sequ_regs */
|
306 |
|
|
0x63, /* miscreg */
|
307 |
|
|
0x2d, 0x27, 0x28, 0x90, 0x2b, 0x80, 0xbf, 0x1f,
|
308 |
|
|
0x00, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
309 |
|
|
0x9c, 0x8e, 0x8f, 0x14, 0x00, 0x96, 0xb9, 0xa2,
|
310 |
|
|
0xff, /* crtc_regs */
|
311 |
|
|
0x00, 0x13, 0x15, 0x17, 0x02, 0x04, 0x06, 0x07,
|
312 |
|
|
0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
|
313 |
|
|
0x01, 0x00, 0x03, 0x00, /* actl_regs */
|
314 |
|
|
0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x0f, 0x0f, 0xff, /* grdc_regs */
|
315 |
|
|
};
|
316 |
|
|
|
317 |
|
|
unsigned char mode_05[] =
|
318 |
|
|
{
|
319 |
|
|
/* index=0x05 vga mode 0x05 */
|
320 |
|
|
40, 24, 8, 0x00, 0x08, /* tw, th-1, ch, slength */
|
321 |
|
|
0x09, 0x03, 0x00, 0x02, /* sequ_regs */
|
322 |
|
|
0x63, /* miscreg */
|
323 |
|
|
0x2d, 0x27, 0x28, 0x90, 0x2b, 0x80, 0xbf, 0x1f,
|
324 |
|
|
0x00, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
325 |
|
|
0x9c, 0x8e, 0x8f, 0x14, 0x00, 0x96, 0xb9, 0xa2,
|
326 |
|
|
0xff, /* crtc_regs */
|
327 |
|
|
0x00, 0x13, 0x15, 0x17, 0x02, 0x04, 0x06, 0x07,
|
328 |
|
|
0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
|
329 |
|
|
0x01, 0x00, 0x03, 0x00, /* actl_regs */
|
330 |
|
|
0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x0f, 0x0f, 0xff, /* grdc_regs */
|
331 |
|
|
};
|
332 |
|
|
unsigned char mode_06[] =
|
333 |
|
|
{
|
334 |
|
|
/* index=0x06 vga mode 0x06 */
|
335 |
|
|
80, 24, 8, 0x00, 0x10, /* tw, th-1, ch, slength */
|
336 |
|
|
0x01, 0x01, 0x00, 0x06, /* sequ_regs */
|
337 |
|
|
0x63, /* miscreg */
|
338 |
|
|
0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f,
|
339 |
|
|
0x00, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
340 |
|
|
0x9c, 0x8e, 0x8f, 0x28, 0x00, 0x96, 0xb9, 0xc2,
|
341 |
|
|
0xff, /* crtc_regs */
|
342 |
|
|
0x00, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17,
|
343 |
|
|
0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17,
|
344 |
|
|
0x01, 0x00, 0x01, 0x00, /* actl_regs */
|
345 |
|
|
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0d, 0x0f, 0xff, /* grdc_regs */
|
346 |
|
|
};
|
347 |
|
|
unsigned char mode_0d[] =
|
348 |
|
|
{
|
349 |
|
|
/* index=0x0d vga mode 0x0d */
|
350 |
|
|
40, 24, 8, 0x00, 0x20, /* tw, th-1, ch, slength */
|
351 |
|
|
0x09, 0x0f, 0x00, 0x06, /* sequ_regs */
|
352 |
|
|
0x63, /* miscreg */
|
353 |
|
|
0x2d, 0x27, 0x28, 0x90, 0x2b, 0x80, 0xbf, 0x1f,
|
354 |
|
|
0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
355 |
|
|
0x9c, 0x8e, 0x8f, 0x14, 0x00, 0x96, 0xb9, 0xe3,
|
356 |
|
|
0xff, /* crtc_regs */
|
357 |
|
|
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
|
358 |
|
|
0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
|
359 |
|
|
0x01, 0x00, 0x0f, 0x00, /* actl_regs */
|
360 |
|
|
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f, 0xff, /* grdc_regs */
|
361 |
|
|
};
|
362 |
|
|
unsigned char mode_0e[] =
|
363 |
|
|
{
|
364 |
|
|
/* index=0x0e vga mode 0x0e */
|
365 |
|
|
80, 24, 8, 0x00, 0x40, /* tw, th-1, ch, slength */
|
366 |
|
|
0x01, 0x0f, 0x00, 0x06, /* sequ_regs */
|
367 |
|
|
0x63, /* miscreg */
|
368 |
|
|
0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f,
|
369 |
|
|
0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
370 |
|
|
0x9c, 0x8e, 0x8f, 0x28, 0x00, 0x96, 0xb9, 0xe3,
|
371 |
|
|
0xff, /* crtc_regs */
|
372 |
|
|
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
|
373 |
|
|
0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
|
374 |
|
|
0x01, 0x00, 0x0f, 0x00, /* actl_regs */
|
375 |
|
|
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f, 0xff, /* grdc_regs */
|
376 |
|
|
};
|
377 |
|
|
unsigned char mode_0f[] =
|
378 |
|
|
{
|
379 |
|
|
/* index=0x11 vga mode 0x0f */
|
380 |
|
|
80, 24, 14, 0x00, 0x80, /* tw, th-1, ch, slength */
|
381 |
|
|
0x01, 0x0f, 0x00, 0x06, /* sequ_regs */
|
382 |
|
|
0xa3, /* miscreg */
|
383 |
|
|
0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f,
|
384 |
|
|
0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
385 |
|
|
0x83, 0x85, 0x5d, 0x28, 0x0f, 0x63, 0xba, 0xe3,
|
386 |
|
|
0xff, /* crtc_regs */
|
387 |
|
|
0x00, 0x08, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00,
|
388 |
|
|
0x00, 0x08, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00,
|
389 |
|
|
0x01, 0x00, 0x01, 0x00, /* actl_regs */
|
390 |
|
|
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f, 0xff, /* grdc_regs */
|
391 |
|
|
};
|
392 |
|
|
unsigned char mode_10[] =
|
393 |
|
|
{
|
394 |
|
|
/* index=0x12 vga mode 0x10 */
|
395 |
|
|
80, 24, 14, 0x00, 0x80, /* tw, th-1, ch, slength */
|
396 |
|
|
0x01, 0x0f, 0x00, 0x06, /* sequ_regs */
|
397 |
|
|
0xa3, /* miscreg */
|
398 |
|
|
0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f,
|
399 |
|
|
0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
400 |
|
|
0x83, 0x85, 0x5d, 0x28, 0x0f, 0x63, 0xba, 0xe3,
|
401 |
|
|
0xff, /* crtc_regs */
|
402 |
|
|
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
|
403 |
|
|
0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
|
404 |
|
|
0x01, 0x00, 0x0f, 0x00, /* actl_regs */
|
405 |
|
|
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f, 0xff, /* grdc_regs */
|
406 |
|
|
};
|
407 |
|
|
unsigned char mode_11[] =
|
408 |
|
|
{
|
409 |
|
|
/* index=0x1a vga mode 0x11 */
|
410 |
|
|
80, 29, 16, 0x00, 0x00, /* tw, th-1, ch, slength */
|
411 |
|
|
0x01, 0x0f, 0x00, 0x06, /* sequ_regs */
|
412 |
|
|
0xe3, /* miscreg */
|
413 |
|
|
0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0x0b, 0x3e,
|
414 |
|
|
0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
415 |
|
|
0xea, 0x8c, 0xdf, 0x28, 0x00, 0xe7, 0x04, 0xe3,
|
416 |
|
|
0xff, /* crtc_regs */
|
417 |
|
|
0x00, 0x3f, 0x00, 0x3f, 0x00, 0x3f, 0x00, 0x3f,
|
418 |
|
|
0x00, 0x3f, 0x00, 0x3f, 0x00, 0x3f, 0x00, 0x3f,
|
419 |
|
|
0x01, 0x00, 0x0f, 0x00, /* actl_regs */
|
420 |
|
|
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f, 0xff, /* grdc_regs */
|
421 |
|
|
};
|
422 |
|
|
unsigned char mode_12[] =
|
423 |
|
|
{
|
424 |
|
|
/* index=0x1b vga mode 0x12 */
|
425 |
|
|
80, 29, 16, 0x00, 0x00, /* tw, th-1, ch, slength */
|
426 |
|
|
0x01, 0x0f, 0x00, 0x06, /* sequ_regs */
|
427 |
|
|
0xe3, /* miscreg */
|
428 |
|
|
0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0x0b, 0x3e,
|
429 |
|
|
0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
430 |
|
|
0xea, 0x8c, 0xdf, 0x28, 0x00, 0xe7, 0x04, 0xe3,
|
431 |
|
|
0xff, /* crtc_regs */
|
432 |
|
|
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
|
433 |
|
|
0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
|
434 |
|
|
0x01, 0x00, 0x0f, 0x00, /* actl_regs */
|
435 |
|
|
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f, 0xff, /* grdc_regs */
|
436 |
|
|
};
|
437 |
|
|
|
438 |
|
|
unsigned char *mode = mode_12;
|
439 |
|
|
int mode_num = 0x12;
|
440 |
|
|
|
441 |
|
|
//load sequencer
|
442 |
|
|
for(i=0; i<4; i++) {
|
443 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 4, i+1);
|
444 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 5, mode[5+i]);
|
445 |
|
|
}
|
446 |
|
|
|
447 |
|
|
//load misc
|
448 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 2, mode[9]);
|
449 |
|
|
|
450 |
|
|
//load crtc -- disable protect
|
451 |
|
|
if(mode_num != 0x07) {
|
452 |
|
|
IOWR_8DIRECT(VGA_0_IO_D_BASE, 4, 0x11);
|
453 |
|
|
IOWR_8DIRECT(VGA_0_IO_D_BASE, 5, mode[27] & 0x7F);
|
454 |
|
|
|
455 |
|
|
for(i=0; i<0x18; i++) {
|
456 |
|
|
IOWR_8DIRECT(VGA_0_IO_D_BASE, 4, i);
|
457 |
|
|
IOWR_8DIRECT(VGA_0_IO_D_BASE, 5, mode[10+i]);
|
458 |
|
|
}
|
459 |
|
|
}
|
460 |
|
|
else {
|
461 |
|
|
IOWR_8DIRECT(VGA_0_IO_B_BASE, 4, 0x11);
|
462 |
|
|
IOWR_8DIRECT(VGA_0_IO_B_BASE, 5, mode[27] & 0x7F);
|
463 |
|
|
|
464 |
|
|
for(i=0; i<0x18; i++) {
|
465 |
|
|
IOWR_8DIRECT(VGA_0_IO_B_BASE, 4, i);
|
466 |
|
|
IOWR_8DIRECT(VGA_0_IO_B_BASE, 5, mode[10+i]);
|
467 |
|
|
}
|
468 |
|
|
}
|
469 |
|
|
//load attrib
|
470 |
|
|
for(i=0; i<0x14; i++) {
|
471 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 0, 0x20 | i);
|
472 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 0, mode[35+i]);
|
473 |
|
|
}
|
474 |
|
|
|
475 |
|
|
//load graphic
|
476 |
|
|
for(i=0; i<0x09; i++) {
|
477 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 0xE, i);
|
478 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 0xF, mode[55+i]);
|
479 |
|
|
}
|
480 |
|
|
|
481 |
|
|
//draw pixels
|
482 |
|
|
if(mode_num == 0x04 || mode_num == 0x05) {
|
483 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 0x18000, (3 << 6) | (2 << 4) | (1 << 2) | (3 << 0));
|
484 |
|
|
|
485 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 0x18000 + 1, (2 << 6) | (2 << 4) | (2 << 2) | (3 << 0));
|
486 |
|
|
|
487 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 0x18000 + 79, (1 << 6) | (1 << 4) | (1 << 2) | (2 << 0));
|
488 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 0x18000 + 80, (3 << 6) | (3 << 4) | (3 << 2) | (1 << 0));
|
489 |
|
|
|
490 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 0x18000 + 80*99, (3 << 6) | (3 << 4) | (3 << 2) | (3 << 0));
|
491 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 0x1A000 + 80*99, (2 << 6) | (2 << 4) | (2 << 2) | (2 << 0));
|
492 |
|
|
|
493 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 0x1A000, (3 << 6) | (2 << 4) | (1 << 2) | (3 << 0));
|
494 |
|
|
|
495 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 0x18000 + 80*99 + 79, (1 << 6) | (1 << 4) | (1 << 2) | (1 << 0));
|
496 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 0x1A000 + 80*99 + 79, (3 << 6) | (2 << 4) | (3 << 2) | (2 << 0));
|
497 |
|
|
}
|
498 |
|
|
if(mode_num == 0x06) {
|
499 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 0x18000, 0x81);
|
500 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 0x18000 + 1, 0x81);
|
501 |
|
|
|
502 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 0x18000 + 79, 0x81);
|
503 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 0x18000 + 80, 0xFF);
|
504 |
|
|
|
505 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 0x1A000, 0x42);
|
506 |
|
|
|
507 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 0x18000 + 80*99, 0xd0);
|
508 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 0x1A000 + 80*99, 0xb0);
|
509 |
|
|
|
510 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 0x18000 + 80*99 + 79, 0xd0);
|
511 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 0x1A000 + 80*99 + 79, 0xb0);
|
512 |
|
|
|
513 |
|
|
//for(i=0; i<100; i++) {
|
514 |
|
|
// IOWR_8DIRECT(VGA_0_MEM_BASE, 0x18000 + 80*i, 0x80);
|
515 |
|
|
// IOWR_8DIRECT(VGA_0_MEM_BASE, 0x1A000 + 80*i, 0x80);
|
516 |
|
|
//}
|
517 |
|
|
}
|
518 |
|
|
|
519 |
|
|
|
520 |
|
|
if(mode_num == 0x0d) {
|
521 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 4, 2);
|
522 |
|
|
|
523 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 5, 0x1);
|
524 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 0, 0x81);
|
525 |
|
|
|
526 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 5, 0x2);
|
527 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 39, 0x81);
|
528 |
|
|
|
529 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 5, 0x4);
|
530 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 40, 0x81);
|
531 |
|
|
|
532 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 5, 0x8);
|
533 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 199*40, 0x81);
|
534 |
|
|
|
535 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 5, 0xe);
|
536 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 199*40+39, 0x81);
|
537 |
|
|
}
|
538 |
|
|
if(mode_num == 0x0e) {
|
539 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 4, 2);
|
540 |
|
|
|
541 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 5, 0x1);
|
542 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 0, 0x81);
|
543 |
|
|
|
544 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 5, 0x2);
|
545 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 79, 0x81);
|
546 |
|
|
|
547 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 5, 0x4);
|
548 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 80, 0x81);
|
549 |
|
|
|
550 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 5, 0x8);
|
551 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 199*80, 0x81);
|
552 |
|
|
|
553 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 5, 0xe);
|
554 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 199*80+79, 0x81);
|
555 |
|
|
}
|
556 |
|
|
if(mode_num == 0x0f) {
|
557 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 4, 2);
|
558 |
|
|
|
559 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 5, 0x1);
|
560 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 0, 0x81);
|
561 |
|
|
|
562 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 5, 0x1);
|
563 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 79, 0x81);
|
564 |
|
|
|
565 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 5, 0x5);
|
566 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 80, 0x81);
|
567 |
|
|
|
568 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 5, 0x2);
|
569 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 81, 0x81);
|
570 |
|
|
|
571 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 5, 0x4);
|
572 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 82, 0x81);
|
573 |
|
|
|
574 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 5, 0x8);
|
575 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 83, 0x81);
|
576 |
|
|
|
577 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 5, 0xf);
|
578 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 84, 0x81);
|
579 |
|
|
|
580 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 5, 0xf);
|
581 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 349*80, 0x81);
|
582 |
|
|
|
583 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 5, 0xf);
|
584 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 349*80 + 79, 0xc1);
|
585 |
|
|
}
|
586 |
|
|
if(mode_num == 0x10) {
|
587 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 4, 2);
|
588 |
|
|
|
589 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 5, 0x1);
|
590 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 0, 0x81);
|
591 |
|
|
|
592 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 5, 0x2);
|
593 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 79, 0x81);
|
594 |
|
|
|
595 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 5, 0x4);
|
596 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 80, 0x81);
|
597 |
|
|
|
598 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 5, 0x8);
|
599 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 349*80, 0x81);
|
600 |
|
|
|
601 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 5, 0xe);
|
602 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 349*80+79, 0x81);
|
603 |
|
|
}
|
604 |
|
|
if(mode_num == 0x11) {
|
605 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 0, 0x81);
|
606 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 79, 0x81);
|
607 |
|
|
|
608 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 80, 0x42);
|
609 |
|
|
|
610 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 479*80, 0x81);
|
611 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 479*80 + 79, 0x81);
|
612 |
|
|
}
|
613 |
|
|
if(mode_num == 0x12) {
|
614 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 4, 2);
|
615 |
|
|
|
616 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 5, 0x1);
|
617 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 0, 0x81);
|
618 |
|
|
|
619 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 5, 0x1);
|
620 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 79, 0x81);
|
621 |
|
|
|
622 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 5, 0x5);
|
623 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 80, 0x81);
|
624 |
|
|
|
625 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 5, 0x2);
|
626 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 81, 0x81);
|
627 |
|
|
|
628 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 5, 0x4);
|
629 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 82, 0x81);
|
630 |
|
|
|
631 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 5, 0x8);
|
632 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 83, 0x81);
|
633 |
|
|
|
634 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 5, 0xf);
|
635 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 84, 0x81);
|
636 |
|
|
|
637 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 5, 0xf);
|
638 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 479*80, 0x81);
|
639 |
|
|
|
640 |
|
|
IOWR_8DIRECT(VGA_0_IO_C_BASE, 5, 0xf);
|
641 |
|
|
IOWR_8DIRECT(VGA_0_MEM_BASE, 479*80 + 79, 0xc1);
|
642 |
|
|
}
|
643 |
|
|
return 0;
|
644 |
|
|
}
|
645 |
|
|
|
646 |
|
|
|