OpenCores
URL https://opencores.org/ocsvn/ao486/ao486/trunk

Subversion Repositories ao486

[/] [ao486/] [trunk/] [syn/] [soc/] [firmware/] [exe_bsp/] [HAL/] [src/] [alt_iic_isr_register.c] - Blame information for rev 2

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 alfik
/******************************************************************************
2
*                                                                             *
3
* License Agreement                                                           *
4
*                                                                             *
5
* Copyright (c) 2009      Altera Corporation, San Jose, California, USA.      *
6
* All rights reserved.                                                        *
7
*                                                                             *
8
* Permission is hereby granted, free of charge, to any person obtaining a     *
9
* copy of this software and associated documentation files (the "Software"),  *
10
* to deal in the Software without restriction, including without limitation   *
11
* the rights to use, copy, modify, merge, publish, distribute, sublicense,    *
12
* and/or sell copies of the Software, and to permit persons to whom the       *
13
* Software is furnished to do so, subject to the following conditions:        *
14
*                                                                             *
15
* The above copyright notice and this permission notice shall be included in  *
16
* all copies or substantial portions of the Software.                         *
17
*                                                                             *
18
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR  *
19
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,    *
20
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE *
21
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER      *
22
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING     *
23
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER         *
24
* DEALINGS IN THE SOFTWARE.                                                   *
25
*                                                                             *
26
* This agreement shall be governed in all respects by the laws of the State   *
27
* of California and by the laws of the United States of America.              *
28
*                                                                             *
29
* Altera does not recommend, suggest or require that this reference design    *
30
* file be used in conjunction or combination with any other product.          *
31
******************************************************************************/
32
#include <errno.h>
33
#include "system.h"
34
 
35
/*
36
 * Provides an interrupt registry mechanism for the any CPUs internal interrupt
37
 * controller (IIC) when the enhanced interrupt API is active.
38
 */
39
#ifndef ALT_CPU_EIC_PRESENT
40
#ifdef ALT_ENHANCED_INTERRUPT_API_PRESENT
41
 
42
#include "alt_types.h"
43
#include "sys/alt_irq.h"
44
#include "priv/alt_iic_isr_register.h"
45
 
46
/*
47
 * The header, alt_irq_entry.h, contains the exception entry point, and is
48
 * provided by the processor component. It is included here, so that the code
49
 * will be added to the executable only if alt_irq_register() is present, i.e.
50
 * if no interrupts are registered - there's no need to provide any
51
 * interrupt handling.
52
 */
53
 
54
#include "sys/alt_irq_entry.h"
55
 
56
/*
57
 * The header, alt_irq_table.h contains a table describing which function
58
 * handles each interrupt.
59
 */
60
 
61
#include "priv/alt_irq_table.h"
62
 
63
/** @Function Description:  This function registers an interrupt handler.
64
  * If the function is succesful, then the requested interrupt will be enabled
65
  * upon return. Registering a NULL handler will disable the interrupt.
66
  *
67
  * @API Type:              External
68
  * @param ic_id            Interrupt controller ID
69
  * @param irq              IRQ ID number
70
  * @param isr              Pointer to interrupt service routine
71
  * @param isr_context      Opaque pointer passed to ISR
72
  * @param flags
73
  * @return                 0 if successful, else error (-1)
74
  */
75
int alt_iic_isr_register(alt_u32 ic_id, alt_u32 irq, alt_isr_func isr,
76
  void *isr_context, void *flags)
77
{
78
  int rc = -EINVAL;
79
  int id = irq;             /* IRQ interpreted as the interrupt ID. */
80
  alt_irq_context status;
81
 
82
  if (id < ALT_NIRQ)
83
  {
84
    /*
85
     * interrupts are disabled while the handler tables are updated to ensure
86
     * that an interrupt doesn't occur while the tables are in an inconsistant
87
     * state.
88
     */
89
 
90
    status = alt_irq_disable_all();
91
 
92
    alt_irq[id].handler = isr;
93
    alt_irq[id].context = isr_context;
94
 
95
    rc = (isr) ? alt_ic_irq_enable(ic_id, id) : alt_ic_irq_disable(ic_id, id);
96
 
97
    alt_irq_enable_all(status);
98
  }
99
 
100
  return rc;
101
}
102
 
103
#endif /* ALT_ENHANCED_INTERRUPT_API_PRESENT */
104
#endif /* ALT_CPU_EIC_PRESENT */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.